15 Sep, 2015
6 commits
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Adding required mux/div/gate clocks for UFS controller
present on Exynos7.Signed-off-by: Alim Akhtar
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Sylwester Nawrocki -
This patch renames CMU_FSYS1 clocks names to match with user manual.
And also adds missing gate clock for aclk_fsys1_200.Signed-off-by: Alim Akhtar
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Sylwester Nawrocki -
This patch renames CMU_FSYS0 clocks names to match with user manual.
And also adds missing gate clock for aclk_fsys0_200.Signed-off-by: Alim Akhtar
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Sylwester Nawrocki -
This patch renames CMU_PERIC1 clocks names to match with user manual.
And also adds missing gate clock for aclk_peric1_66.Signed-off-by: Alim Akhtar
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Sylwester Nawrocki -
This patch renames CMU_PERIC0 clocks names to match with user manual.
And also adds missing gate clock for aclk_peric0_66.Signed-off-by: Alim Akhtar
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Sylwester Nawrocki -
This adds some of the missing GATE clocks of CMU_TOPC block.
Signed-off-by: Alim Akhtar
Signed-off-by: Sylwester Nawrocki
15 Jan, 2015
3 commits
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Add required clk support for I2S, PCM and SPDIF.
Signed-off-by: Padmavathi Venna
Reviewed-by: Vivek Gautam
Signed-off-by: Sylwester Nawrocki -
Add clock support for 5 SPI channels.
Signed-off-by: Padmavathi Venna
Signed-off-by: Sylwester Nawrocki -
Add support for PDMA0 and PDMA1 gate clks.
Signed-off-by: Padmavathi Venna
Signed-off-by: Sylwester Nawrocki
23 Dec, 2014
2 commits
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Adding required gate clocks for USB3.0 DRD controller
present on Exynos7.Signed-off-by: Vivek Gautam
Signed-off-by: Sylwester Nawrocki -
Add clock support for the MSCL block for Exynos7.
Signed-off-by: Tony K Nadackal
Reviewed-by: Pankaj Dubey
Signed-off-by: Sylwester Nawrocki
31 Oct, 2014
6 commits
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Add clock support for the ADC interface in Exynos7.
Signed-off-by: Abhilash Kesavan
Signed-off-by: Sylwester Nawrocki -
Add clock support for the watchdog timer, pwm timer and thermal
management unit IPs in Exynos7.Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Signed-off-by: Sylwester Nawrocki -
Add clock support for the RTC block in Exynos7.
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Signed-off-by: Sylwester Nawrocki -
Exynos7 supports 3 MMC channels, add the MMC gate clocks to
support them.Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Signed-off-by: Sylwester Nawrocki -
Exynos7 supports 12 I2C channels, add the I2C gate clocks to
support them.Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Signed-off-by: Sylwester Nawrocki -
Add initial clock support for Exynos7 SoC which is required
to bring up platforms based on Exynos7.Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Reviewed-by: Thomas Abraham
Tested-by: Thomas Abraham
Signed-off-by: Sylwester Nawrocki
