06 Jun, 2016

1 commit

• 972610fb2   clk: renesas: Add r8a7796 CPG Core Clock Definitions ... Browse Code »

  Add all R-Car M3-W Clock Pulse Generator Core Clock Outputs, as listed
  in Table 8.2b ("List of Clocks [R-Car M3-W]") of the R-Car Gen3
  datasheet (rev. 0.51 + Errata for Rev051 Mar 31 2016).

  Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, and SSPSRC) are
  not included, as they are used as internal clock sources only, and never
  referenced from DT.

  Signed-off-by: Geert Uytterhoeven
  Tested-by: Simon Horman

  Geert Uytterhoeven

  2016-06-06 17:58:27 +0800