24 Mar, 2019
1 commit
04 Dec, 2018
1 commit
28 Nov, 2018
1 commit
26 May, 2018
2 commits
-
** Not yet queued for inclusion in mainline **
In order to prevent aliasing attacks on the branch predictor,
invalidate the BTB on CPUs that are known to be affected when taking
a prefetch abort on a address that is outside of a user task limit.Signed-off-by: Marc Zyngier
Signed-off-by: Will Deacon
Signed-off-by: Alex Shi -
** Not yet queued for inclusion in mainline **
In order to avoid aliasing attacks against the branch predictor,
some implementations require to invalidate the BTB when switching
from one user context to another.For this, we reuse the existing implementation for Cortex-A8, and
apply it to A9, A12 and A17.Signed-off-by: Marc Zyngier
Signed-off-by: Will Deacon
Signed-off-by: Alex Shi
11 May, 2018
2 commits
-
Enable regulatory rules database config:
CONFIG_CFG80211_INTERNAL_REGDB(Run "make savedefconfig" to change the defconfig)
Signed-off-by: Fugang Duan
Reviewed-by: Haibo Chen
(cherry picked from commit: 2044e8f366119b79b17cfe47bb91c40c39e9b440) -
Enable regulatory rules database config:
CONFIG_CFG80211_INTERNAL_REGDBSigned-off-by: Fugang Duan
Reviewed-by: Haibo Chen
(cherry picked from commit: 99a27c4880a091d74ab5e3fb112a2d778f7c26b0)
08 May, 2018
1 commit
-
commit b62dd733a100 ("MLK-18127 ARM: dts: imx7ulp-evk: few correction
for usdhc1") add property "no-1-8-v" for the usdhc1 which limit the
wifi. The sd slot on base board share this usdhc1, so the usdhc1
in imx7ulp-evk-sd1.dts also inherit this property.delete the "no-1-8-v" property, then the sd slot can support SD3.0
Signed-off-by: Haibo Chen
(cherry picked from commit 6cb30044642b43f9e55d63beca61bc1397d3d996)
07 May, 2018
2 commits
-
The correct default should be 0x04000021. In which we have the open
drain input option for field [25:26] with a pull up resistor and low
drive strength. This will allow the end point device to drive low the
wake and clkreq signals when necessary and don't have the PCIe
driving back to the endpoint device.Signed-off-by: Richard Zhu
(cherry picked from commit 2d3e439c1b32d78807bfc74dfc90f62aa897a709) -
Enable the AHCI_IMX defaultly in imx_v7_defconfig
Signed-off-by: Richard Zhu
(cherry picked from commit a090146de2ef4be0ac9ccf2225a5bb4926a503dd)
03 May, 2018
1 commit
-
The MIPI DSI config the DPI as 480 * 854, so correct the touch
display-coords property, to aligned with MIPI DSI.Signed-off-by: Haibo Chen
(cherry picked from commit a00aa0ea7199fb04e425a49a4221d9202782eecf)
27 Apr, 2018
2 commits
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Add some necessary configs for qualcomm wifi QCA6174 qcacld-2.0
and remove the ath10k configs.
(Run "make savedefconfig" to change the defconfig)Reviewed-by: Andy Tian
Signed-off-by: Fugang Duan -
On QXP B0 board, prg1 can alternative connect to
dpr_channel1 and channel2. And if enable PRG0_SEL:BLIT0,
prg1 will connect to channel2, so it could
support 2-plane format tile to linear convert.Signed-off-by: yuchou gan
25 Apr, 2018
1 commit
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Currently, WiFi only work on SDIO2.0 mode, so add property
"no-1-8-v", otherwise following warning log will be printsdhci-esdhc-imx 40380000.usdhc: could not get ultra high speed state, work on normal mode
The regulator reg_vsd_3v3 and reg_sd1_vmmc has the same
regulator name, so will trigger the following error log:VSD_3V3: Failed to create debugfs directory
So change the regulator name of reg_sd1_vmmc.
According to the spec suggestion, ibe need to be enabled
for usdhc clock pin, and clock is better to pull down.Signed-off-by: Haibo Chen
(cherry picked from commit b62dd733a100e35e93543642149bcf8b61e13242)
24 Apr, 2018
1 commit
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fix audio bus mode hang issue on imx6sl. The root cause of
this issue is that busfreq mode passed to TEE side is wrong,
it will lead to ccm setting is wrong in TEE.Signed-off-by: Bai Ping
Tested-by: Anson huang
20 Apr, 2018
5 commits
-
Fixes: a6fd1613cca4 ("MLK-18036-2 Delete *optee.dts files")
Signed-off-by: Leonard Crestez
Reviewed-by: Clement Faure
(cherry picked from commit 4706425bb745850c8d28608ebcaffd239a945e63) -
A specific node for OCRAM mapping in optee as been added in
the device tree. These dedicated optee device trees can be
removed.Signed-off-by: Clement Faure
Acked-by: Peng Fan
(cherry picked from commit a6fd1613cca4a5008c347d4473b92b119385644c) -
This node will be used by the OCRAM driver in optee to:
* Get the OCRAM start address for power management in optee.
* Add an entry that will overwrite ocrams nodes and dynamically reduce
the OCRAM available for mmio-sram in Linux.That way we do not touch the legacy Linux boot and remove the dedicated
optee device tree.Signed-off-by: Clement Faure
Reviewed-by: Peng Fan
(cherry picked from commit e96a3bcd754dee0aef3519bc08979985493be52c) -
This change affects all i.MX 6 with PL310 L2 Cache controller.
When Linux runs in Non-secure World the PL310 has already
been initialized by the ARM secure World running OP-TEE os.
However, in order to have a proper Linux Initialization all the
L2 cache ways have been locked by the secure world.This patch unlock all the ways during pl310 initialization.
Signed-off-by: Cedric Neveux
(cherry picked from commit be7971b62e0c77cf70f828868a5d5a4184a926d2) -
7ULP uses the same mmdc profiling block as i.mx6q. Added the
"fsl,imx6q-mmdc" compatible string to enable the mmdc profiling
feature.Signed-off-by: Shenwei Wang
18 Apr, 2018
1 commit
-
Signed-off-by: Franck LENORMAND
(cherry picked from commit 0b122f882429a82274fc99439b5d73986b731672)
17 Apr, 2018
1 commit
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On the i.MX7ULP EVK Rev.B baord, the backlight brigntness driver circuit
is updated. A RC filter is added on the MP3301's EN pin. So the PWM's frequency
should be change to 20KHZ. for EN pin, A DC voltage from 0.7V to 1.4V can control
the LED current from 0% to 100%. the backlight brightness level also need to be
updated.Signed-off-by: Bai Ping
Reviewed-by: Anson Huang
(cherry picked from commit 82555e15a5f958c09492d0103425dc30bc7cd927)
13 Apr, 2018
3 commits
-
The default display interface on i.MX7ULP EVK board is the HDMI
interface, and a hardware rework is required to support the MIPI
panel. To match the current board design, added the HDMI node in
the imx7ulp-evk.dts and created a new file named imx7ulp-evk-mipi.dts.Signed-off-by: Shenwei Wang
Reviewed-by: Andy Duan -
commit a56e6e190015 ("MLK-17961 dts: imx7ulp-evk: add non-removable
property for wifi sdio") add non-removable property, sd1 slot on
base board share the same usdhc with wifi, and the sd1 slot support
card detect, so for sd1 slot, need to remove the non-removable
property.Signed-off-by: Haibo Chen
Reviewed-by: Andy Duan
(cherry picked from commit 2a40d8123aff4b4fb7a5cbf286d0c308a42c2fc7) -
This patch fix resume failure in freeze suspend mode on i.mx7ULP
("echo freeze > /sys/power/state") while pressing onoff key or
enabling rtc alarm wakeup. In freeze mode, kernel can only be woken
up by drivers which register wakup source such as 'device_init_wakeup'
or 'irq_set_irq_wake', otherwise, kernel will wait for irq handler
freeze_wake(). Unfortunately, our NMI interrupt which used to wakeup
A7 by M4 is not a common device and request irq as 'IRQF_NO_SUSPEND'
which means feeze_wake() never get chance to run while wakeup by any
event from M4 such as RTC, ONOFF. In this case, use pm_system_wakeup()
instead in NMI interrupt handle to trigger freeze_wake() directly.Signed-off-by: Robin Gong
Reviewed-by: Anson Huang
12 Apr, 2018
15 commits
-
Add poweron key support on i.mx7ulp-evk board since M4 take
over snvs on B0 chip.Signed-off-by: Robin Gong
Reviewed-by: Anson Huang -
Add non-removable property for usdhc1 that is used as Murata
1PJ wifi sdio interface, which means wifi card always is present.Signed-off-by: Shenwei Wang
Signed-off-by: Fugang Duan
Tested-by: Fugang Duan -
commit 3a0a397ff5ff upstream.
Now that we've standardised on SMCCC v1.1 to perform the branch
prediction invalidation, let's drop the previous band-aid.
If vendors haven't updated their firmware to do SMCCC 1.1, they
haven't updated PSCI either, so we don't loose anything.Tested-by: Ard Biesheuvel
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex ShiConflicts:
no falkor/thunderx2/vulcan in arch/arm64/kernel/cpu_errata.c -
commit b092201e0020 upstream.
Add the detection and runtime code for ARM_SMCCC_ARCH_WORKAROUND_1.
It is lovely. Really.Tested-by: Ard Biesheuvel
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex ShiConflicts:
no qcom hyp functions in
arch/arm64/kernel/bpi.S
arch/arm64/kernel/cpu_errata.c -
commit f72af90c3783 upstream.
We want SMCCC_ARCH_WORKAROUND_1 to be fast. As fast as possible.
So let's intercept it as early as we can by testing for the
function call number as soon as we've identified a HVC call
coming from the guest.Tested-by: Ard Biesheuvel
Reviewed-by: Christoffer Dall
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex Shi -
commit 6167ec5c9145 upstream.
A new feature of SMCCC 1.1 is that it offers firmware-based CPU
workarounds. In particular, SMCCC_ARCH_WORKAROUND_1 provides
BP hardening for CVE-2017-5715.If the host has some mitigation for this issue, report that
we deal with it using SMCCC_ARCH_WORKAROUND_1, as we apply the
host workaround on every guest exit.Tested-by: Ard Biesheuvel
Reviewed-by: Christoffer Dall
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex ShiConflicts:
no sve support in arch/arm64/include/asm/kvm_host.h
mv changes from virt/kvm/arm/psci.c to arch/arm/kvm/psci.c
using cpus_have_cap instead of cpus_have_const_cap -
commit a4097b351118 upstream.
We're about to need kvm_psci_version in HYP too. So let's turn it
into a static inline, and pass the kvm structure as a second
parameter (so that HYP can do a kern_hyp_va on it).Tested-by: Ard Biesheuvel
Reviewed-by: Christoffer Dall
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex ShiConflicts:
mv changes from virt/kvm/arm/psci.c to arch/arm/kvm/psci.c -
commit 90348689d500 upstream.
For those CPUs that require PSCI to perform a BP invalidation,
going all the way to the PSCI code for not much is a waste of
precious cycles. Let's terminate that call as early as possible.Signed-off-by: Marc Zyngier
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
Signed-off-by: Alex Shi -
commit 09e6be12effd upstream.
The new SMC Calling Convention (v1.1) allows for a reduced overhead
when calling into the firmware, and provides a new feature discovery
mechanism.Make it visible to KVM guests.
Tested-by: Ard Biesheuvel
Reviewed-by: Christoffer Dall
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex ShiConflicts:
mv change from virt/kvm/arm/psci.c to arch/arm/kvm/psci.c -
commit 58e0b2239a4d upstream.
PSCI 1.0 can be trivially implemented by providing the FEATURES
call on top of PSCI 0.2 and returning 1.0 as the PSCI version.We happily ignore everything else, as they are either optional or
are clarifications that do not require any additional change.PSCI 1.0 is now the default until we decide to add a userspace
selection API.Reviewed-by: Christoffer Dall
Tested-by: Ard Biesheuvel
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex ShiConflicts:
mv chagnes from virt/kvm/arm/psci.c to arch/arm/kvm/psci.c -
commit 84684fecd7ea upstream.
Instead of open coding the accesses to the various registers,
let's add explicit SMCCC accessors.Reviewed-by: Christoffer Dall
Tested-by: Ard Biesheuvel
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex ShiConflicts:
mv change from virt/kvm/arm/psci.c to arch/arm/kvm/psci.c -
commit d0a144f12a7c upstream.
As we're about to trigger a PSCI version explosion, it doesn't
hurt to introduce a PSCI_VERSION helper that is going to be
used everywhere.Reviewed-by: Christoffer Dall
Tested-by: Ard Biesheuvel
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex ShiConflicts:
mv change form virt/kvm/arm/psci.c to arch/arm/kvm/psci.c -
commit 1a2fb94e6a77 upstream.
As we're about to update the PSCI support, and because I'm lazy,
let's move the PSCI include file to include/kvm so that both
ARM architectures can find it.Acked-by: Christoffer Dall
Tested-by: Ard Biesheuvel
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex ShiConflicts:
need kvm/arm_psci.h in files:
arch/arm64/kvm/handle_exit.c
arch/arm/kvm/psci.c and arch/arm/kvm/arm.c
no virt/kvm/arm/arm.c and virt/kvm/arm/psci.c -
commit f5115e8869e1 upstream.
When handling an SMC trap, the "preferred return address" is set
to that of the SMC, and not the next PC (which is a departure from
the behaviour of an SMC that isn't trapped).Increment PC in the handler, as the guest is otherwise forever
stuck...Cc: stable@vger.kernel.org
Fixes: acfb3b883f6d ("arm64: KVM: Fix SMCCC handling of unimplemented SMC/HVC calls")
Reviewed-by: Christoffer Dall
Tested-by: Ard Biesheuvel
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex Shi -
commit aa6acde65e03 upstream.
Cortex-A57, A72, A73 and A75 are susceptible to branch predictor aliasing
and can theoretically be attacked by malicious code.This patch implements a PSCI-based mitigation for these CPUs when available.
The call into firmware will invalidate the branch predictor state, preventing
any malicious entries from affecting other victim contexts.Co-developed-by: Marc Zyngier
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
Signed-off-by: Alex ShiConflicts:
no falkor in arch/arm64/kernel/cpu_errata.c
