05 Apr, 2016
1 commit
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Fixed a coding style issue.
Signed-off-by: Cosmin-Gabriel Samoila
Signed-off-by: Joerg Roedel
17 Feb, 2016
2 commits
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Add some simple wrappers to avoid having the guts of the TLB operations
spilled all over the page table implementations, and to provide a point
to implement extra common functionality.Acked-by: Will Deacon
Acked-by: Laurent Pinchart
Signed-off-by: Robin Murphy
Signed-off-by: Will Deacon -
Add a nearly-complete ARMv7 short descriptor implementation, omitting
only a few legacy and CPU-centric aspects which shouldn't be necessary
for IOMMU API use anyway.Reviewed-by: Yong Wu
Tested-by: Yong Wu
Signed-off-by: Yong Wu
Signed-off-by: Robin Murphy
Signed-off-by: Will Deacon
14 Aug, 2015
1 commit
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Avoid extern declarations in c files.
Signed-off-by: Joerg Roedel
19 Jan, 2015
2 commits
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A number of IOMMUs found in ARM SoCs can walk architecture-compatible
page tables.This patch adds a generic allocator for Stage-1 and Stage-2 v7/v8
long-descriptor page tables. 4k, 16k and 64k pages are supported, with
up to 4-levels of walk to cover a 48-bit address space.Tested-by: Laurent Pinchart
Signed-off-by: Will Deacon -
This patch introduces a generic framework for allocating page tables for
an IOMMU. There are a number of reasons we want to do this:- It avoids duplication of complex table management code in IOMMU
drivers that use the same page table format- It removes any coupling with the CPU table format (and even the
architecture!)- It defines an API for IOMMU TLB maintenance
Tested-by: Laurent Pinchart
Signed-off-by: Will Deacon
