Eric Lee / smarc-fsl-linux-kernel

10 Aug, 2017

1 commit

  • 9d664c0ae   locking/atomic: Fix atomic_set_release() for 'funny' architectures ... Browse Code »

    Those architectures that have a special atomic_set implementation also
    need a special atomic_set_release(), because for the very same reason
    WRITE_ONCE() is broken for them, smp_store_release() is too.

    The vast majority is architectures that have spinlock hash based atomic
    implementation except hexagon which seems to have a hardware 'feature'.

    The spinlock based atomics should be SC, that is, none of them appear to
    place extra barriers in atomic_cmpxchg() or any of the other SC atomic
    primitives and therefore seem to rely on their spinlock implementation
    being SC (I did not fully validate all that).

    Therefore, the normal atomic_set() is SC and can be used at
    atomic_set_release().

    Signed-off-by: Peter Zijlstra (Intel)
    Acked-by: Chris Metcalf [for tile]
    Cc: Boqun Feng
    Cc: Linus Torvalds
    Cc: Paul McKenney
    Cc: Peter Zijlstra
    Cc: Thomas Gleixner
    Cc: Will Deacon
    Cc: davem@davemloft.net
    Cc: james.hogan@imgtec.com
    Cc: jejb@parisc-linux.org
    Cc: rkuo@codeaurora.org
    Cc: vgupta@synopsys.com
    Link: http://lkml.kernel.org/r/20170609110506.yod47flaav3wgoj5@hirez.programming.kicks-ass.net
    Signed-off-by: Ingo Molnar

    Peter Zijlstra
     

16 Jun, 2016

1 commit

  • 28aa2bda2   locking/atomic: Implement atomic{,64,_long}_fetch_{add,sub,and,andnot,or,xor}{,_… ... Browse Code »

    …relaxed,_acquire,_release}()

    Now that all the architectures have implemented support for these new
    atomic primitives add on the generic infrastructure to expose and use
    it.

    Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
    Cc: Andrew Morton <akpm@linux-foundation.org>
    Cc: Arnd Bergmann <arnd@arndb.de>
    Cc: Boqun Feng <boqun.feng@gmail.com>
    Cc: Borislav Petkov <bp@suse.de>
    Cc: Davidlohr Bueso <dave@stgolabs.net>
    Cc: Frederic Weisbecker <fweisbec@gmail.com>
    Cc: Linus Torvalds <torvalds@linux-foundation.org>
    Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Cc: Will Deacon <will.deacon@arm.com>
    Cc: linux-arch@vger.kernel.org
    Cc: linux-kernel@vger.kernel.org
    Signed-off-by: Ingo Molnar <mingo@kernel.org>

    Peter Zijlstra
     

27 Jul, 2015

1 commit

14 Aug, 2014

1 commit

  • 560cb12a4   locking,arch: Rewrite generic atomic support ... Browse Code »

    Rewrite generic atomic support to only require cmpxchg(), generate all
    other primitives from that.

    Furthermore reduce the endless repetition for all these primitives to
    a few CPP macros. This way we get more for less lines.

    Signed-off-by: Peter Zijlstra
    Link: http://lkml.kernel.org/r/20140508135852.940119622@infradead.org
    Cc: Arnd Bergmann
    Cc: David Howells
    Cc: Paul E. McKenney
    Cc: David S. Miller
    Cc: Linus Torvalds
    Cc: linux-arch@vger.kernel.org
    Signed-off-by: Ingo Molnar

    Peter Zijlstra
     

15 Jun, 2009

1 commit

  • 09d4e0edd   lib: Provide generic atomic64_t implementation ... Browse Code »

    Many processor architectures have no 64-bit atomic instructions, but
    we need atomic64_t in order to support the perf_counter subsystem.

    This adds an implementation of 64-bit atomic operations using hashed
    spinlocks to provide atomicity. For each atomic operation, the address
    of the atomic64_t variable is hashed to an index into an array of 16
    spinlocks. That spinlock is taken (with interrupts disabled) around the
    operation, which can then be coded non-atomically within the lock.

    On UP, all the spinlock manipulation goes away and we simply disable
    interrupts around each operation. In fact gcc eliminates the whole
    atomic64_lock variable as well.

    Signed-off-by: Paul Mackerras
    Signed-off-by: Benjamin Herrenschmidt

    Paul Mackerras