02 Mar, 2017
1 commit
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We don't actually need the full rculist.h header in sched.h anymore,
we will be able to include the smaller rcupdate.h header instead.But first update code that relied on the implicit header inclusion.
Acked-by: Linus Torvalds
Cc: Mike Galbraith
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar
12 Jun, 2015
2 commits
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Instead of open coding, provide a helper function to copy the shared
irte fields.Signed-off-by: Thomas Gleixner
Cc: jiang.liu@linux.intel.com
Cc: iommu@lists.linux-foundation.org
Cc: joro@8bytes.org
Cc: dwmw2@infradead.org
Link: http://lkml.kernel.org/r/1433827237-3382-4-git-send-email-feng.wu@intel.com
Signed-off-by: Thomas Gleixner -
The IRTE (Interrupt Remapping Table Entry) is either an entry for
remapped or for posted interrupts. The hardware distiguishes between
remapped and posted entries by bit 15 in the low 64 bit of the
IRTE. If cleared the entry is remapped, if set it's posted.The entries have common fields and dependent on the posted bit fields
with different meanings.Extend struct irte to handle the differences between remap and posted
mode by having three structs in the unions:- Shared
- Remapped
- PostedSigned-off-by: Thomas Gleixner
Signed-off-by: Feng Wu
Acked-by: Joerg Roedel
Cc: jiang.liu@linux.intel.com
Cc: iommu@lists.linux-foundation.org
Cc: dwmw2@infradead.org
Link: http://lkml.kernel.org/r/1433827237-3382-3-git-send-email-feng.wu@intel.com
Signed-off-by: Thomas Gleixner
24 Apr, 2015
1 commit
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Refine the interfaces to create IRQ for DMAR unit. It's a preparation
for converting DMAR IRQ to hierarchical irqdomain on x86.It also moves dmar_alloc_hwirq()/dmar_free_hwirq() from irq_remapping.h
to dmar.h. They are not irq_remapping specific.Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: David Cohen
Cc: Sander Eikelenboom
Cc: David Vrabel
Cc: Greg Kroah-Hartman
Cc: iommu@lists.linux-foundation.org
Cc: Vinod Koul
Cc: Bjorn Helgaas
Cc: Benjamin Herrenschmidt
Cc: Rafael J. Wysocki
Cc: Randy Dunlap
Cc: Yinghai Lu
Cc: Borislav Petkov
Cc: Dimitri Sivanich
Cc: Tony Luck
Cc: Fenghua Yu
Cc: Joerg Roedel
Link: http://lkml.kernel.org/r/1428905519-23704-20-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner
18 Nov, 2014
3 commits
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On Intel platforms, an IO Hub (PCI/PCIe host bridge) may contain DMAR
units, so we need to support DMAR hotplug when supporting PCI host
bridge hotplug on Intel platforms.According to Section 8.8 "Remapping Hardware Unit Hot Plug" in "Intel
Virtualization Technology for Directed IO Architecture Specification
Rev 2.2", ACPI BIOS should implement ACPI _DSM method under the ACPI
object for the PCI host bridge to support DMAR hotplug.This patch introduces interfaces to parse ACPI _DSM method for
DMAR unit hotplug. It also implements state machines for DMAR unit
hot-addition and hot-removal.The PCI host bridge hotplug driver should call dmar_hotplug_hotplug()
before scanning PCI devices connected for hot-addition and after
destroying all PCI devices for hot-removal.Signed-off-by: Jiang Liu
Reviewed-by: Yijing Wang
Signed-off-by: Joerg Roedel -
Introduce functions to support dynamic IOMMU seq_id allocating and
releasing, which will be used to support DMAR hotplug.Also rename IOMMU_UNITS_SUPPORTED as DMAR_UNITS_SUPPORTED.
Signed-off-by: Jiang Liu
Reviewed-by: Yijing Wang
Signed-off-by: Joerg Roedel -
Introduce helper function dmar_walk_resources to walk resource entries
in DMAR table and ACPI buffer object returned by ACPI _DSM method
for IOMMU hot-plug.Signed-off-by: Jiang Liu
Signed-off-by: Joerg Roedel
02 Oct, 2014
1 commit
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This will be used later to match broken RMRR entries.
Signed-off-by: Joerg Roedel
23 Jul, 2014
1 commit
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Simplify include/linux/dmar.h a bit based on the fact that
both CONFIG_INTEL_IOMMU and CONFIG_IRQ_REMAP select CONFIG_DMAR_TABLE.Signed-off-by: Jiang Liu
Signed-off-by: Joerg Roedel
24 Mar, 2014
1 commit
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It's not only for PCI devices any more, and the scope information for an
ACPI device provides the bus and devfn so that has to be stored here too.It is the device pointer itself which needs to be protected with RCU,
so the __rcu annotation follows it into the definition of struct
dmar_dev_scope, since we're no longer just passing arrays of device
pointers around.Signed-off-by: David Woodhouse
05 Mar, 2014
7 commits
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Now we have a PCI bus notification based mechanism to update DMAR
device scope array, we could extend the mechanism to support boot
time initialization too, which will help to unify and simplify
the implementation.Signed-off-by: Jiang Liu
Signed-off-by: Joerg Roedel -
Current Intel DMAR/IOMMU driver assumes that all PCI devices associated
with DMAR/RMRR/ATSR device scope arrays are created at boot time and
won't change at runtime, so it caches pointers of associated PCI device
object. That assumption may be wrong now due to:
1) introduction of PCI host bridge hotplug
2) PCI device hotplug through sysfs interfaces.Wang Yijing has tried to solve this issue by caching
tupple instead of the PCI device object pointer, but that's still
unreliable because PCI bus number may change in case of hotplug.
Please refer to http://lkml.org/lkml/2013/11/5/64
Message from Yingjing's mail:
after remove and rescan a pci device
[ 611.857095] dmar: DRHD: handling fault status reg 2
[ 611.857109] dmar: DMAR:[DMA Read] Request device [86:00.3] fault addr ffff7000
[ 611.857109] DMAR:[fault reason 02] Present bit in context entry is clear
[ 611.857524] dmar: DRHD: handling fault status reg 102
[ 611.857534] dmar: DMAR:[DMA Read] Request device [86:00.3] fault addr ffff6000
[ 611.857534] DMAR:[fault reason 02] Present bit in context entry is clear
[ 611.857936] dmar: DRHD: handling fault status reg 202
[ 611.857947] dmar: DMAR:[DMA Read] Request device [86:00.3] fault addr ffff5000
[ 611.857947] DMAR:[fault reason 02] Present bit in context entry is clear
[ 611.858351] dmar: DRHD: handling fault status reg 302
[ 611.858362] dmar: DMAR:[DMA Read] Request device [86:00.3] fault addr ffff4000
[ 611.858362] DMAR:[fault reason 02] Present bit in context entry is clear
[ 611.860819] IPv6: ADDRCONF(NETDEV_UP): eth3: link is not ready
[ 611.860983] dmar: DRHD: handling fault status reg 402
[ 611.860995] dmar: INTR-REMAP: Request device [[86:00.3] fault index a4
[ 611.860995] INTR-REMAP:[fault reason 34] Present field in the IRTE entry is clearThis patch introduces a new mechanism to update the DRHD/RMRR/ATSR device scope
caches by hooking PCI bus notification.Signed-off-by: Jiang Liu
Signed-off-by: Joerg Roedel -
Global DMA and interrupt remapping resources may be accessed in
interrupt context, so use RCU instead of rwsem to protect them
in such cases.Signed-off-by: Jiang Liu
Signed-off-by: Joerg Roedel -
Introduce a global rwsem dmar_global_lock, which will be used to
protect DMAR related global data structures from DMAR/PCI/memory
device hotplug operations in process context.DMA and interrupt remapping related data structures are read most,
and only change when memory/PCI/DMAR hotplug event happens.
So a global rwsem solution is adopted for balance between simplicity
and performance.For interrupt remapping driver, function intel_irq_remapping_supported(),
dmar_table_init(), intel_enable_irq_remapping(), disable_irq_remapping(),
reenable_irq_remapping() and enable_drhd_fault_handling() etc
are called during booting, suspending and resuming with interrupt
disabled, so no need to take the global lock.For interrupt remapping entry allocation, the locking model is:
down_read(&dmar_global_lock);
/* Find corresponding iommu */
iommu = map_hpet_to_ir(id);
if (iommu)
/*
* Allocate remapping entry and mark entry busy,
* the IOMMU won't be hot-removed until the
* allocated entry has been released.
*/
index = alloc_irte(iommu, irq, 1);
up_read(&dmar_global_lock);For DMA remmaping driver, we only uses the dmar_global_lock rwsem to
protect functions which are only called in process context. For any
function which may be called in interrupt context, we will use RCU
to protect them in following patches.Signed-off-by: Jiang Liu
Signed-off-by: Joerg Roedel -
Introduce for_each_dev_scope()/for_each_active_dev_scope() to walk
{active} device scope entries. This will help following RCU lock
related patches.Signed-off-by: Jiang Liu
Signed-off-by: Joerg Roedel -
Move private structures and variables into intel-iommu.c, which will
help to simplify locking policy for hotplug. Also delete redundant
declarations.Signed-off-by: Jiang Liu
Signed-off-by: Joerg Roedel -
Factor out function dmar_alloc_dev_scope() from dmar_parse_dev_scope()
for later reuse.Signed-off-by: Jiang Liu
Signed-off-by: Joerg Roedel
09 Jan, 2014
3 commits
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Simplify vt-d related code with existing macros and introduce a new
macro for_each_active_drhd_unit() to enumerate all active DRHD unit.Signed-off-by: Jiang Liu
Signed-off-by: Joerg Roedel -
Functions alloc_iommu() and parse_ioapics_under_ir()
are only used internally, so mark them as static.[Joerg: Made detect_intel_iommu() non-static again for IA64]
Signed-off-by: Jiang Liu
Signed-off-by: Joerg Roedel -
Function dmar_parse_dev_scope() should release the PCI device reference
count gained in function dmar_parse_one_dev_scope() on error recovery,
otherwise it will cause PCI device object leakage.This patch also introduces dmar_free_dev_scope(), which will be used
to support DMAR device hotplug.Reviewed-by: Yijing Wang
Signed-off-by: Jiang Liu
Signed-off-by: Joerg Roedel
07 May, 2012
4 commits
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Remove the Intel specific interfaces from dmar.h and remove
asm/irq_remapping.h which is only used for io_apic.c anyway.Signed-off-by: Joerg Roedel
Acked-by: Yinghai Lu
Cc: David Woodhouse
Cc: Alex Williamson
Signed-off-by: Suresh Siddha
Signed-off-by: Joerg Roedel -
The operation for releasing a remapping entry is iommu
specific too.Signed-off-by: Joerg Roedel
Acked-by: Yinghai Lu
Cc: David Woodhouse
Cc: Alex Williamson
Signed-off-by: Suresh Siddha
Signed-off-by: Joerg Roedel -
Convert these calls too:
* Disable of remapping hardware
* Reenable of remapping hardware
* Enable fault handlingWith that all of arch/x86/kernel/apic/apic.c is converted to
use the generic intr-remapping interface.Signed-off-by: Joerg Roedel
Acked-by: Yinghai Lu
Cc: David Woodhouse
Cc: Alex Williamson
Signed-off-by: Suresh Siddha
Signed-off-by: Joerg Roedel -
This patch introduces irq_remap_ops to hold implementation
specific function pointer to handle interrupt remapping. As
the first part the initialization functions for VT-d are
converted to these ops.Signed-off-by: Joerg Roedel
Acked-by: Yinghai Lu
Cc: David Woodhouse
Cc: Alex Williamson
Signed-off-by: Suresh Siddha
Signed-off-by: Joerg Roedel
01 Nov, 2011
1 commit
-
x86_64 allnoconfig:
In file included from arch/x86/kernel/pci-dma.c:3:
include/linux/dmar.h:248: warning: 'struct acpi_dmar_header' declared inside parameter list
include/linux/dmar.h:248: warning: its scope is only this definition or declaration, which is probably not what you wantCc: Suresh Siddha
Cc: Ingo Molnar
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
21 Sep, 2011
3 commits
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Change the CONFIG_DMAR to CONFIG_INTEL_IOMMU to be consistent
with the other IOMMU options.Rename the CONFIG_INTR_REMAP to CONFIG_IRQ_REMAP to match the
irq subsystem name.And define the CONFIG_DMAR_TABLE for the common ACPI DMAR
routines shared by both CONFIG_INTEL_IOMMU and CONFIG_IRQ_REMAP.Signed-off-by: Suresh Siddha
Cc: yinghai@kernel.org
Cc: youquan.song@intel.com
Cc: joerg.roedel@amd.com
Cc: tony.luck@intel.com
Cc: dwmw2@infradead.org
Link: http://lkml.kernel.org/r/20110824001456.558630224@sbsiddha-desk.sc.intel.com
Signed-off-by: Ingo Molnar -
Move the IOMMU specific routines to intel-iommu.c leaving the
dmar.c to the common ACPI dmar code shared between DMA-remapping
and Interrupt-remapping.Signed-off-by: Suresh Siddha
Cc: yinghai@kernel.org
Cc: youquan.song@intel.com
Cc: joerg.roedel@amd.com
Cc: tony.luck@intel.com
Cc: dwmw2@infradead.org
Link: http://lkml.kernel.org/r/20110824001456.282401285@sbsiddha-desk.sc.intel.com
Signed-off-by: Ingo Molnar -
On the platforms which are x2apic and interrupt-remapping
capable, Linux kernel is enabling x2apic even if the BIOS
doesn't. This is to take advantage of the features that x2apic
brings in.Some of the OEM platforms are running into issues because of
this, as their bios is not x2apic aware. For example, this was
resulting in interrupt migration issues on one of the platforms.
Also if the BIOS SMI handling uses APIC interface to send SMI's,
then the BIOS need to be aware of x2apic mode that OS has
enabled.On some of these platforms, BIOS doesn't have a HW mechanism to
turnoff the x2apic feature to prevent OS from enabling it.To resolve this mess, recent changes to the VT-d2 specification:
http://download.intel.com/technology/computing/vptech/Intel(r)_VT_for_Direct_IO.pdf
includes a mechanism that provides BIOS a way to request system
software to opt out of enabling x2apic mode.Look at the x2apic optout flag in the DMAR tables before
enabling the x2apic mode in the platform. Also print a warning
that we have disabled x2apic based on the BIOS request.Kernel boot parameter "intremap=no_x2apic_optout" can be used to
override the BIOS x2apic optout request.Signed-off-by: Youquan Song
Signed-off-by: Suresh Siddha
Cc: yinghai@kernel.org
Cc: joerg.roedel@amd.com
Cc: tony.luck@intel.com
Cc: dwmw2@infradead.org
Link: http://lkml.kernel.org/r/20110824001456.171766616@sbsiddha-desk.sc.intel.com
Signed-off-by: Ingo Molnar
26 Nov, 2010
1 commit
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The stubs for CONFIG_INTR_REMAP disabled need to be functions
instead of values to eliminate build warnings.arch/x86/kernel/apic/apic.c: In function 'lapic_suspend':
arch/x86/kernel/apic/apic.c:2060:3: warning: statement with no effect
arch/x86/kernel/apic/apic.c: In function 'lapic_resume':
arch/x86/kernel/apic/apic.c:2137:3: warning: statement with no effectReported-and-Tested-by: Fabio Comolli
Signed-off-by: Randy Dunlap
Cc: Suresh Siddha
Cc: Yinghai Lu
Cc: David Woodhouse
Cc: Jesse Barnes
LKML-Reference:
Signed-off-by: Ingo Molnar
22 Oct, 2010
1 commit
-
…git/tip/linux-2.6-tip
* 'x86-iommu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86, iommu: Update header comments with appropriate naming
ia64, iommu: Add a dummy iommu_table.h file in IA64.
x86, iommu: Fix IOMMU_INIT alignment rules
x86, doc: Adding comments about .iommu_table and its neighbors.
x86, iommu: Utilize the IOMMU_INIT macros functionality.
x86, VT-d: Make Intel VT-d IOMMU use IOMMU_INIT_* macros.
x86, GART/AMD-VI: Make AMD GART and IOMMU use IOMMU_INIT_* macros.
x86, calgary: Make Calgary IOMMU use IOMMU_INIT_* macros.
x86, xen-swiotlb: Make Xen-SWIOTLB use IOMMU_INIT_* macros.
x86, swiotlb: Make SWIOTLB use IOMMU_INIT_* macros.
x86, swiotlb: Simplify SWIOTLB pci_swiotlb_detect routine.
x86, iommu: Add proper dependency sort routine (and sanity check).
x86, iommu: Make all IOMMU's detection routines return a value.
x86, iommu: Add IOMMU_INIT macros, .iommu_table section, and iommu_table_entry structure
12 Oct, 2010
4 commits
-
irq_2_iommu is in struct irq_cfg, so we can do the irq_remapped check
based on irq_cfg instead of going through a lookup function. That's
especially interesting in the eoi_ioapic_irq() hotpath.Signed-off-by: Thomas Gleixner
Reviewed-by: Ingo Molnar
Acked-by: Suresh Siddha
Cc: David Woodhouse
Cc: Jesse Barnes -
That interrupt remapping code is x86 specific and tied to the io_apic
code. No need for separate allocator functions in the interrupt
remapping code. This allows to simplify the code and irq_2_iommu is
small (13 bytes on 64bit) so it's not a real problem even if interrupt
remapping is runtime disabled. If it's compile time disabled the
impact is zero.Signed-off-by: Thomas Gleixner
Reviewed-by: Ingo Molnar
Acked-by: Suresh Siddha
Cc: David Woodhouse
Cc: Jesse Barnes -
No users.
Signed-off-by: Thomas Gleixner
Reviewed-by: Ingo Molnar
Acked-by: Suresh Siddha
Cc: David Woodhouse
Cc: Jesse Barnes -
Signed-off-by: Thomas Gleixner
Reviewed-by: Ingo Molnar
Acked-by: David Woodhouse
27 Aug, 2010
1 commit
-
We return 1 if the IOMMU has been detected. Zero or an error number
if we failed to find it. This is in preperation of using the IOMMU_INIT
so that we can detect whether an IOMMU is present. I have not
tested this for regression on Calgary, nor on AMD Vi chipsets as
I don't have that hardware.CC: Muli Ben-Yehuda
CC: "Jon D. Mason"
CC: "Darrick J. Wong"
CC: Jesse Barnes
CC: David Woodhouse
CC: Chris Wright
CC: Yinghai Lu
CC: Joerg Roedel
CC: H. Peter Anvin
CC: Fujita Tomonori
Signed-off-by: Konrad Rzeszutek Wilk
LKML-Reference:
Signed-off-by: H. Peter Anvin
09 Dec, 2009
1 commit
-
…l/git/tip/linux-2.6-tip
* 'timers-for-linus-hpet' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86: hpet: Make WARN_ON understandable
x86: arch specific support for remapping HPET MSIs
intr-remap: generic support for remapping HPET MSIs
x86, hpet: Simplify the HPET code
x86, hpet: Disable per-cpu hpet timer if ARAT is supported
10 Nov, 2009
1 commit
-
This changes detect_intel_iommu() to set intel_iommu_init() to
iommu_init hook if detect_intel_iommu() finds the IOMMU.Signed-off-by: FUJITA Tomonori
Cc: chrisw@sous-sol.org
Cc: dwmw2@infradead.org
Cc: joerg.roedel@amd.com
Cc: muli@il.ibm.com
LKML-Reference:
[ -v2: build fix for the !CONFIG_DMAR case ]
Signed-off-by: Ingo Molnar
28 Aug, 2009
1 commit
-
Generic support for remapping HPET MSI's by parsing the HPET timer block
device scope in the ACPI DRHD tables. This is needed for platforms
supporting interrupt-remapping and MSI capable HPET timer block.Signed-off-by: Suresh Siddha
Cc: David Woodhouse
Cc: Jesse Barnes
Cc: Venkatesh Pallipadi
Cc: Jay Fenlason
LKML-Reference:
Signed-off-by: Thomas Gleixner
24 Jun, 2009
1 commit
-
To support domain-isolation usages, the platform hardware must be
capable of uniquely identifying the requestor (source-id) for each
interrupt message. Without source-id checking for interrupt remapping
, a rouge guest/VM with assigned devices can launch interrupt attacks
to bring down anothe guest/VM or the VMM itself.This patch adds source-id checking for interrupt remapping, and then
really isolates interrupts for guests/VMs with assigned devices.Because PCI subsystem is not initialized yet when set up IOAPIC
entries, use read_pci_config_byte to access PCI config space directly.Signed-off-by: Weidong Han
Signed-off-by: David Woodhouse
23 Jun, 2009
1 commit
-
* git://git.infradead.org/~dwmw2/iommu-2.6.31:
intel-iommu: Fix one last ia64 build problem in Pass Through Support
VT-d: support the device IOTLB
VT-d: cleanup iommu_flush_iotlb_psi and flush_unmaps
VT-d: add device IOTLB invalidation support
VT-d: parse ATSR in DMA Remapping Reporting Structure
PCI: handle Virtual Function ATS enabling
PCI: support the ATS capability
intel-iommu: dmar_set_interrupt return error value
intel-iommu: Tidy up iommu->gcmd handling
intel-iommu: Fix tiny theoretical race in write-buffer flush.
intel-iommu: Clean up handling of "caching mode" vs. IOTLB flushing.
intel-iommu: Clean up handling of "caching mode" vs. context flushing.
VT-d: fix invalid domain id for KVM context flush
Fix !CONFIG_DMAR build failure introduced by Intel IOMMU Pass Through Support
Intel IOMMU Pass Through SupportFix up trivial conflicts in drivers/pci/{intel-iommu.c,intr_remapping.c}