02 Nov, 2017
1 commit
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Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.By default all files without license information are under the default
license of the kernel, which is GPL version 2.Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if
Reviewed-by: Philippe Ombredanne
Reviewed-by: Thomas Gleixner
Signed-off-by: Greg Kroah-Hartman
19 Jan, 2017
4 commits
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SCI instances found in SH SoCs have different spacing between registers
depending on the SoC. The platform data contains a regshift field that
tells the driver by how many bits to shift the register offset to
compute its address. We can compute the regshift value automatically
based on the memory resource size, there's no need to pass the value
through platform data.Fix the sh7750 SCI and sh7760 SIM port memory resources length to ensure
proper computation of the regshift value.Signed-off-by: Laurent Pinchart
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Greg Kroah-Hartman -
The field isn't set by any platform but is only used internally in the
driver to hold data parsed from DT. Move it to the sci_port structure.Signed-off-by: Laurent Pinchart
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Greg Kroah-Hartman -
The sh-sci driver implements manual break debouncing for a few SH
platforms by reading the value of the RX pin port register. This feature
is optional and the driver considers all negative or zero values of the
platform data port_reg field as invalid. As the four platforms that set
the field to a register address all use an address higher than
0x7fffffff, the driver will always consider the value as invalid and
never perform debouncing. The feature is unused, remove it.Debouncing could be implemented properly in the future using the pinctrl
and GPIO APIs if desired.Signed-off-by: Laurent Pinchart
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Greg Kroah-Hartman -
Only SH platforms still use platform data for the sh-sci, and none of
them declare DMA channels connected to the SCI. Remove the corresponding
platform data fields and simplify the driver accordingly.Signed-off-by: Laurent Pinchart
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Greg Kroah-Hartman
17 Dec, 2015
1 commit
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Add register definitions for the Baud Rate Generator for External Clock
(BRG), as found in some SCIF and in HSCIF, including a new regtype for
the "SH-4(A)"-derived SCIF variant with BRG.Signed-off-by: Geert Uytterhoeven
Acked-by: Greg Kroah-Hartman
11 May, 2015
2 commits
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Signed-off-by: Geert Uytterhoeven
Signed-off-by: Greg Kroah-Hartman -
Move private register definitions and enums from the public
header file to the driver private "sh-sci.h" header
file.The common Serial Control Register definitions are left in the public
header file, as they're needed to fill in plat_sci_port.scscr on legacy
systems not using DT.Signed-off-by: Geert Uytterhoeven
Signed-off-by: Greg Kroah-Hartman
18 Mar, 2014
1 commit
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Signed-off-by: Geert Uytterhoeven
Acked-by: Simon Horman
Acked-by: Laurent Pinchart
Signed-off-by: Greg Kroah-Hartman
24 Dec, 2013
8 commits
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The fields are not used anymore by board files, remove them.
Signed-off-by: Laurent Pinchart
Acked-by: Greg Kroah-Hartman
Signed-off-by: Simon Horman -
The field isn't set by any board, remote it.
Signed-off-by: Laurent Pinchart
Acked-by: Greg Kroah-Hartman
Signed-off-by: Simon Horman -
Computing the baud rate register value requires knowledge of the
hardware sampling rate. This information is currently encoded in a baud
rate calculation algorithm ID passed through platform data. However, it
can be derived from the port type directly in most cases.Compute the sampling rate internally in the driver if the baud rate
calculation algorithm ID isn't specified, and allow platforms to
override the sampling rate through platform data in special cases (this
is only required for SCIFA ports on sh7723 and sh7724, the reason needs
to be investigated).Signed-off-by: Laurent Pinchart
Acked-by: Greg Kroah-Hartman
Signed-off-by: Simon Horman -
The driver requests at initialization time GPIOs passed through platform
data. No platform makes use of this feature, remove it.Signed-off-by: Laurent Pinchart
Acked-by: Greg Kroah-Hartman
Signed-off-by: Simon Horman -
None of the fields is ever set by board code, and both of them are set
in the driver at probe time. Move them out of struct plat_sci_port to
struct sci_port.Signed-off-by: Laurent Pinchart
Acked-by: Greg Kroah-Hartman
Signed-off-by: Simon Horman -
Memory and IRQ resources are currently passed to the driver through
platform data. Support passing them through the standard platform
resources mechanism instead. This deprecates platform data resources.Signed-off-by: Laurent Pinchart
Acked-by: Greg Kroah-Hartman
Signed-off-by: Simon Horman -
Rewrite the baud rate register value calculations in easier to read
forms. The computed value isn't modified.Signed-off-by: Laurent Pinchart
Acked-by: Greg Kroah-Hartman
Signed-off-by: Simon Horman -
The algorithm isn't used, remove it.
Signed-off-by: Laurent Pinchart
Acked-by: Greg Kroah-Hartman
Signed-off-by: Simon Horman
17 Sep, 2013
1 commit
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H8/300 has been dead for several years, and the kernel for it
has not compiled for ages. Drop support for it.Cc: Yoshinori Sato
Acked-by: Greg Kroah-Hartman
Signed-off-by: Guenter Roeck
17 Jun, 2013
1 commit
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Adds support for "High Speed Serial Communications Interface with FIFO",
essentially a SCIF with 128-byte FIFOs and more accurate baud rate
generator.Signed-off-by: Ulrich Hecht
Acked-by: Paul Mundt
Acked-by: Greg Kroah-Hartman
Signed-off-by: Simon Horman
09 Apr, 2012
1 commit
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SCIF modules which have SCSPTR can output the break signal. Now that we
have a way of determining port features/capabilities, add trivial break
control via SCSPTR support. Tested on sh7757lcr.Signed-off-by: Yoshihiro Shimoda
Reviewed-by: Simon Horman
Signed-off-by: Paul Mundt
02 Dec, 2011
2 commits
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This adds initial support for requesting the various GPIO functions
necessary for certain ports. This just plugs in dumb request/free logic,
but serves as a building block for migrating off of the ->init_pins mess
to a wholly gpiolib backed solution (primarily parts with external
RTS/CTS pins, but will also allow us to clean up RXD pin testing).Signed-off-by: Paul Mundt
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The bulk of the ports do not support any sort of modem control, so
blindly twiddling the MCE bit doesn't accomplish much. We now require
ports to manually specify which line supports modem control signals.While at it, tidy up the RTS/CTSIO handling in SCSPTR parts so it's a bit
more obvious what's going on (and without clobbering other configurations
in the process).Signed-off-by: Paul Mundt
11 Nov, 2011
1 commit
04 Nov, 2011
1 commit
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This fixes up support for SH-2(A) SCIFs by introducing a new regtype. As
expected, it's close to the SH-4A SCIF with fifodata, but still different
enough to warrant its own type.Fixes up a number of FIFO overflows and similar for both SH7203/SH7264.
Signed-off-by: Phil Edworthy
Tested-by: Federico Fuga
Signed-off-by: Paul Mundt
19 Sep, 2011
1 commit
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On some sh-mobile systems there are more than one DMA controllers, that
can be used for serial ports. Specifying a DMA device in sh-sci platform
data unnecessarily restricts the driver to only use one DMA controller.Signed-off-by: Guennadi Liakhovetski
[Fixed the trivial conflict in include/linux/serial_sci.h]
Signed-off-by: Vinod Koul
28 Jun, 2011
1 commit
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Presently these were all using the same static string with no regard to
dev_name() and the like. This implements a bit of rework to name the IRQ
dynamically, as it should have been doing all along anyways.Signed-off-by: Paul Mundt
14 Jun, 2011
1 commit
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This takes a bit of a sledgehammer to the horribly CPU subtype
ifdef-ridden header and abstracts all of the different register layouts
in to distinct types which in turn can be overriden on a per-port basis,
or permitted to default to the map matching the port type at probe time.In the process this ultimately fixes up inumerable bugs with mismatches
on various CPU types (particularly the legacy ones that were obviously
broken years ago and no one noticed) and provides a more tightly coupled
and consolidated platform for extending and implementing generic
features.Signed-off-by: Paul Mundt
08 Jun, 2011
2 commits
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Non-SCI parts do not have the special port reg necessary for cases where
the RX and SCI pins are muxed and need to be manually polled, so these
like always fall back on the normal FIFO processing paths. SH7760 is in a
class in and of itself with regards to mapping its SIM card interface via
the SCI port class despite not having any of the RXD lines wired up and
so implicitly behaving more like a SCIF in this regard. Out of the other
CPUs, some support the port check via the same block while others do it
through an external SuperI/O, so it's not even possible to perform the
check relative to the ioremapped cookie offset, so the separate read
semantics are preserved here, too.Signed-off-by: Paul Mundt
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This consolidates all of the broken out overrun handling and ensures that
we have sensible defaults per-port type, in addition to making sure that
overruns are flagged appropriately in the error mask for parts that
haven't explicitly disabled support for it.Signed-off-by: Paul Mundt
19 Jan, 2011
4 commits
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There's nothing worth hiding under the ifdef in the platform DMA
definitions, and we certainly don't want board code adding this in to
their platform data definitions, so we always expose the slave rx/tx
and device pointer members instead.Signed-off-by: Paul Mundt
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All of the muxed IRQs presently populate the IRQ array verbosely, this
simply provides a trivial helper to do it for them.Signed-off-by: Paul Mundt
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All users of the platform port data specify a mapbase where the driver
later derives the membase from. Now that UPF flags are taken in to
account for generic ioremapping we can kill off the port-specific membase
clobbering and simply use the generic paths.This derives from a time when sh64 was not capable of using the generic
ioremap implementation and had employed early bolted DTLB mappings for
port access, which is no longer an issue.Signed-off-by: Paul Mundt
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Now that the clock string isn't used by the driver anymore, kill it off
from the platform structure.Signed-off-by: Paul Mundt
13 Jan, 2011
1 commit
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…nux-2.6 into common/serial-rework
Conflicts:
arch/sh/kernel/cpu/sh2/setup-sh7619.c
arch/sh/kernel/cpu/sh2a/setup-mxg.c
arch/sh/kernel/cpu/sh2a/setup-sh7201.c
arch/sh/kernel/cpu/sh2a/setup-sh7203.c
arch/sh/kernel/cpu/sh2a/setup-sh7206.c
arch/sh/kernel/cpu/sh3/setup-sh7705.c
arch/sh/kernel/cpu/sh3/setup-sh770x.c
arch/sh/kernel/cpu/sh3/setup-sh7710.c
arch/sh/kernel/cpu/sh3/setup-sh7720.c
arch/sh/kernel/cpu/sh4/setup-sh4-202.c
arch/sh/kernel/cpu/sh4/setup-sh7750.c
arch/sh/kernel/cpu/sh4/setup-sh7760.c
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
arch/sh/kernel/cpu/sh4a/setup-sh7366.c
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
arch/sh/kernel/cpu/sh4a/setup-shx3.c
arch/sh/kernel/cpu/sh5/setup-sh5.c
drivers/serial/sh-sci.c
drivers/serial/sh-sci.h
include/linux/serial_sci.h
25 May, 2010
1 commit
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asm/dmaengine.h no longer exists, update for the shared linux/sh_dma.h
header.Signed-off-by: Paul Mundt
23 Mar, 2010
1 commit
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This patch replaces the sh_dmae_slave_chan_id enum
with an unsigned int. The purpose of this chainge is
to make it possible to separate the slave id enums
from the dmaengine header.The slave id enums varies with processor model, so in
the future it makes sense to put these in the processor
specific headers together with the pinmux enums.Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt
10 Mar, 2010
1 commit
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This patch fixes a build failure for various arm based defconfigs
[1][2][3] and maybe other architectures/configs.The build failure was introduced by the sh specific patch [4]
"serial: sh-sci: Add DMA support"
by Guennadi LiakhovetskiPatch against linux-next of 20100309
References:
[1] http://kisskb.ellerman.id.au/kisskb/buildresult/2248992/
[2] http://kisskb.ellerman.id.au/kisskb/buildresult/2248996/
[3] http://kisskb.ellerman.id.au/kisskb/buildresult/2248998/
[4] http://git.kernel.org/?p=linux/kernel/git/sfr/linux-next.git;a=commit;h=73a19e4c0301908ce6346715fd08a74308451f5aSigned-off-by: Peter Huewe
Signed-off-by: Paul Mundt
02 Mar, 2010
1 commit
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Support using DMA for sending and receiving data over SCI(F) interfaces of
various SH SoCs.Signed-off-by: Guennadi Liakhovetski
Signed-off-by: Paul Mundt
24 Jun, 2009
2 commits
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This permits each port to select its own SCBRR calculation algorithm,
rather than having it all ifdef'ed in the header. There are presently
only 5 different variations that all parts fall under.Signed-off-by: Paul Mundt
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This moves all of the SCSCR_INIT definitions in to the platform data,
for future consolidation.Signed-off-by: Paul Mundt