13 Jan, 2019

1 commit

  • commit 0211e12dd0a5385ecffd3557bc570dbad7fcf245 upstream.

    When the allocation of node_to_possible_cpumask fails, then
    irq_create_affinity_masks() returns with a pointer to the empty affinity
    masks array, which will cause malfunction.

    Reorder the allocations so the masks array allocation comes last and every
    failure path returns NULL.

    Fixes: 9a0ef98e186d ("genirq/affinity: Assign vectors to all present CPUs")
    Signed-off-by: Thomas Gleixner
    Cc: Christoph Hellwig
    Cc: Ming Lei
    Cc: Mihai Carabas
    Signed-off-by: Greg Kroah-Hartman

    Thomas Gleixner
     

17 Jul, 2018

1 commit

  • commit 84676c1f21e8ff54befe985f4f14dc1edc10046b upstream.

    Currently we assign managed interrupt vectors to all present CPUs. This
    works fine for systems were we only online/offline CPUs. But in case of
    systems that support physical CPU hotplug (or the virtualized version of
    it) this means the additional CPUs covered for in the ACPI tables or on
    the command line are not catered for. To fix this we'd either need to
    introduce new hotplug CPU states just for this case, or we can start
    assining vectors to possible but not present CPUs.

    Reported-by: Christian Borntraeger
    Tested-by: Christian Borntraeger
    Tested-by: Stefan Haberland
    Fixes: 4b855ad37194 ("blk-mq: Create hctx for each present CPU")
    Cc: linux-kernel@vger.kernel.org
    Cc: Thomas Gleixner
    Signed-off-by: Christoph Hellwig
    Signed-off-by: Jens Axboe
    Signed-off-by: Greg Kroah-Hartman

    Christoph Hellwig
     

02 Nov, 2017

1 commit

  • Many source files in the tree are missing licensing information, which
    makes it harder for compliance tools to determine the correct license.

    By default all files without license information are under the default
    license of the kernel, which is GPL version 2.

    Update the files which contain no license information with the 'GPL-2.0'
    SPDX license identifier. The SPDX identifier is a legally binding
    shorthand, which can be used instead of the full boiler plate text.

    This patch is based on work done by Thomas Gleixner and Kate Stewart and
    Philippe Ombredanne.

    How this work was done:

    Patches were generated and checked against linux-4.14-rc6 for a subset of
    the use cases:
    - file had no licensing information it it.
    - file was a */uapi/* one with no licensing information in it,
    - file was a */uapi/* one with existing licensing information,

    Further patches will be generated in subsequent months to fix up cases
    where non-standard license headers were used, and references to license
    had to be inferred by heuristics based on keywords.

    The analysis to determine which SPDX License Identifier to be applied to
    a file was done in a spreadsheet of side by side results from of the
    output of two independent scanners (ScanCode & Windriver) producing SPDX
    tag:value files created by Philippe Ombredanne. Philippe prepared the
    base worksheet, and did an initial spot review of a few 1000 files.

    The 4.13 kernel was the starting point of the analysis with 60,537 files
    assessed. Kate Stewart did a file by file comparison of the scanner
    results in the spreadsheet to determine which SPDX license identifier(s)
    to be applied to the file. She confirmed any determination that was not
    immediately clear with lawyers working with the Linux Foundation.

    Criteria used to select files for SPDX license identifier tagging was:
    - Files considered eligible had to be source code files.
    - Make and config files were included as candidates if they contained >5
    lines of source
    - File already had some variant of a license header in it (even if
    Reviewed-by: Philippe Ombredanne
    Reviewed-by: Thomas Gleixner
    Signed-off-by: Greg Kroah-Hartman

    Greg Kroah-Hartman
     

09 Jul, 2017

1 commit

  • Pull PCI updates from Bjorn Helgaas:

    - add sysfs max_link_speed/width, current_link_speed/width (Wong Vee
    Khee)

    - make host bridge IRQ mapping much more generic (Matthew Minter,
    Lorenzo Pieralisi)

    - convert most drivers to pci_scan_root_bus_bridge() (Lorenzo
    Pieralisi)

    - mutex sriov_configure() (Jakub Kicinski)

    - mutex pci_error_handlers callbacks (Christoph Hellwig)

    - split ->reset_notify() into ->reset_prepare()/reset_done()
    (Christoph Hellwig)

    - support multiple PCIe portdrv interrupts for MSI as well as MSI-X
    (Gabriele Paoloni)

    - allocate MSI/MSI-X vector for Downstream Port Containment (Gabriele
    Paoloni)

    - fix MSI IRQ affinity pre/post/min_vecs issue (Michael Hernandez)

    - test INTx masking during enumeration, not at run-time (Piotr Gregor)

    - avoid using device_may_wakeup() for runtime PM (Rafael J. Wysocki)

    - restore the status of PCI devices across hibernation (Chen Yu)

    - keep parent resources that start at 0x0 (Ard Biesheuvel)

    - enable ECRC only if device supports it (Bjorn Helgaas)

    - restore PRI and PASID state after Function-Level Reset (CQ Tang)

    - skip DPC event if device is not present (Keith Busch)

    - check domain when matching SMBIOS info (Sujith Pandel)

    - mark Intel XXV710 NIC INTx masking as broken (Alex Williamson)

    - avoid AMD SB7xx EHCI USB wakeup defect (Kai-Heng Feng)

    - work around long-standing Macbook Pro poweroff issue (Bjorn Helgaas)

    - add Switchtec "running" status flag (Logan Gunthorpe)

    - fix dra7xx incorrect RW1C IRQ register usage (Arvind Yadav)

    - modify xilinx-nwl IRQ chip for legacy interrupts (Bharat Kumar
    Gogada)

    - move VMD SRCU cleanup after bus, child device removal (Jon Derrick)

    - add Faraday clock handling (Linus Walleij)

    - configure Rockchip MPS and reorganize (Shawn Lin)

    - limit Qualcomm TLP size to 2K (hardware issue) (Srinivas Kandagatla)

    - support Tegra MSI 64-bit addressing (Thierry Reding)

    - use Rockchip normal (not privileged) register bank (Shawn Lin)

    - add HiSilicon Kirin SoC PCIe controller driver (Xiaowei Song)

    - add Sigma Designs Tango SMP8759 PCIe controller driver (Marc
    Gonzalez)

    - add MediaTek PCIe host controller support (Ryder Lee)

    - add Qualcomm IPQ4019 support (John Crispin)

    - add HyperV vPCI protocol v1.2 support (Jork Loeser)

    - add i.MX6 regulator support (Quentin Schulz)

    * tag 'pci-v4.13-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (113 commits)
    PCI: tango: Add Sigma Designs Tango SMP8759 PCIe host bridge support
    PCI: Add DT binding for Sigma Designs Tango PCIe controller
    PCI: rockchip: Use normal register bank for config accessors
    dt-bindings: PCI: Add documentation for MediaTek PCIe
    PCI: Remove __pci_dev_reset() and pci_dev_reset()
    PCI: Split ->reset_notify() method into ->reset_prepare() and ->reset_done()
    PCI: xilinx: Make of_device_ids const
    PCI: xilinx-nwl: Modify IRQ chip for legacy interrupts
    PCI: vmd: Move SRCU cleanup after bus, child device removal
    PCI: vmd: Correct comment: VMD domains start at 0x10000, not 0x1000
    PCI: versatile: Add local struct device pointers
    PCI: tegra: Do not allocate MSI target memory
    PCI: tegra: Support MSI 64-bit addressing
    PCI: rockchip: Use local struct device pointer consistently
    PCI: rockchip: Check for clk_prepare_enable() errors during resume
    MAINTAINERS: Remove Wenrui Li as Rockchip PCIe driver maintainer
    PCI: rockchip: Configure RC's MPS setting
    PCI: rockchip: Reconfigure configuration space header type
    PCI: rockchip: Split out rockchip_pcie_cfg_configuration_accesses()
    PCI: rockchip: Move configuration accesses into rockchip_pcie_cfg_atu()
    ...

    Linus Torvalds
     

23 Jun, 2017

1 commit

  • Currently the irq vector spread algorithm is restricted to online CPUs,
    which ties the IRQ mapping to the currently online devices and doesn't deal
    nicely with the fact that CPUs could come and go rapidly due to e.g. power
    management.

    Instead assign vectors to all present CPUs to avoid this churn.

    Build a map of all possible CPUs for a given node, as the architectures
    only provide a map of all onlines CPUs. Do this dynamically on each call
    for the vector assingments, which is a bit suboptimal and could be
    optimized in the future by provinding a mapping from the arch code.

    Signed-off-by: Christoph Hellwig
    Signed-off-by: Thomas Gleixner
    Cc: Jens Axboe
    Cc: linux-block@vger.kernel.org
    Cc: Sagi Grimberg
    Cc: Marc Zyngier
    Cc: Michael Ellerman
    Cc: linux-nvme@lists.infradead.org
    Cc: Keith Busch
    Cc: Peter Zijlstra
    Link: http://lkml.kernel.org/r/20170603140403.27379-5-hch@lst.de

    Christoph Hellwig
     

23 May, 2017

1 commit

  • min_vecs is the minimum amount of vectors needed to operate in MSI-X mode
    which may just include the vectors that don't need affinity.

    Disabling affinity settings causes the qla2xxx driver scsi_add_host() to fail
    when blk_mq is enabled as the blk_mq_pci_map_queues() expects affinity masks
    on each vector.

    Fixes: dfef358bd1be ("PCI/MSI: Don't apply affinity if there aren't enough vectors left")
    Signed-off-by: Michael Hernandez
    Signed-off-by: Himanshu Madhani
    Signed-off-by: Bjorn Helgaas
    Reviewed-by: Christoph Hellwig
    Cc: stable@vger.kernel.org # v4.10+

    Michael Hernandez
     

20 Apr, 2017

1 commit

  • The vectors_per_node is calculated from the remaining available vectors.
    The current vector starts after pre_vectors, so we need to subtract that
    from the current to properly account for the number of remaining vectors
    to assign.

    Fixes: 3412386b531 ("irq/affinity: Fix extra vecs calculation")
    Reported-by: Andrei Vagin
    Signed-off-by: Keith Busch
    Link: http://lkml.kernel.org/r/1492645870-13019-1-git-send-email-keith.busch@intel.com
    Signed-off-by: Thomas Gleixner

    Keith Busch
     

14 Apr, 2017

1 commit

  • This fixes a math error calculating the extra_vecs. The error assumed
    only 1 cpu per vector, but the value needs to account for the actual
    number of cpus per vector in order to get the correct remainder for
    extra CPU assignment.

    Fixes: 7bf8222b9bd0 ("irq/affinity: Fix CPU spread for unbalanced nodes")
    Reported-by: Xiaolong Ye
    Signed-off-by: Keith Busch
    Link: http://lkml.kernel.org/r/1492104492-19943-1-git-send-email-keith.busch@intel.com
    Signed-off-by: Thomas Gleixner

    Keith Busch
     

04 Apr, 2017

1 commit

  • The irq_create_affinity_masks routine is responsible for assigning a
    number of interrupt vectors to CPUs. The optimal assignemnet will spread
    requested vectors to all CPUs, with the fewest CPUs sharing a vector.

    The algorithm may fail to assign some vectors to any CPUs if a node's
    CPU count is lower than the average number of vectors per node. These
    vectors are unusable and create an un-optimal spread.

    Recalculate the number of vectors to assign at each node iteration by using
    the remaining number of vectors and nodes to be assigned, not exceeding the
    number of CPUs in that node. This will guarantee that every CPU is assigned
    at least one vector.

    Signed-off-by: Keith Busch
    Reviewed-by: Sagi Grimberg
    Reviewed-by: Christoph Hellwig
    Cc: linux-nvme@lists.infradead.org
    Link: http://lkml.kernel.org/r/1491247553-7603-1-git-send-email-keith.busch@intel.com
    Signed-off-by: Thomas Gleixner

    Keith Busch
     

15 Dec, 2016

1 commit

  • Commit 34c3d9819fda ("genirq/affinity: Provide smarter irq spreading
    infrastructure") introduced a better IRQ spreading mechanism, taking
    account of the available NUMA nodes in the machine.

    Problem is that the algorithm of retrieving the nodemask iterates
    "linearly" based on the number of online nodes - some architectures
    present non-linear node distribution among the nodemask, like PowerPC.
    If this is the case, the algorithm lead to a wrong node count number
    and therefore to a bad/incomplete IRQ affinity distribution.

    For example, this problem were found in a machine with 128 CPUs and two
    nodes, namely nodes 0 and 8 (instead of 0 and 1, if it was linearly
    distributed). This led to a wrong affinity distribution which then led to
    a bad mq allocation for nvme driver.

    Finally, we take the opportunity to fix a comment regarding the affinity
    distribution when we have _more_ nodes than vectors.

    Fixes: 34c3d9819fda ("genirq/affinity: Provide smarter irq spreading infrastructure")
    Reported-by: Gabriel Krisman Bertazi
    Signed-off-by: Guilherme G. Piccoli
    Reviewed-by: Christoph Hellwig
    Reviewed-by: Gabriel Krisman Bertazi
    Reviewed-by: Gavin Shan
    Cc: linux-pci@vger.kernel.org
    Cc: linuxppc-dev@lists.ozlabs.org
    Cc: hch@lst.de
    Link: http://lkml.kernel.org/r/1481738472-2671-1-git-send-email-gpiccoli@linux.vnet.ibm.com
    Signed-off-by: Thomas Gleixner

    Guilherme G. Piccoli
     

17 Nov, 2016

2 commits

  • The reserved vectors at the beginning and the end of the vector space get
    cpu_possible_mask assigned as their affinity mask.

    All other non-auto affine interrupts get the default irq affinity mask
    assigned. Using cpu_possible_mask breaks that rule.

    Treat them like any other interrupt and use irq_default_affinity as target
    mask.

    Signed-off-by: Thomas Gleixner
    Cc: Christoph Hellwig

    Thomas Gleixner
     
  • The recent addition of reserved vectors at the beginning or the end of the
    vector space did not take the reserved vectors at the beginning into
    account for the various loop exit conditions. As a consequence the last
    vectors of the spread area are not included into the spread algorithm and
    are treated like the reserved vectors at the end of the vector space and
    get the default affinity mask assigned.

    Sum up the affinity vectors and the reserved vectors at the beginning and
    use the sum as exit condition.

    [ tglx: Fixed all conditions instead of only one and massaged changelog ]

    Signed-off-by: Christoph Hellwig
    Link: http://lkml.kernel.org/r/1479201178-29604-2-git-send-email-hch@lst.de
    Signed-off-by: Thomas Gleixner

    Christoph Hellwig
     

09 Nov, 2016

2 commits

  • Only calculate the affinity for the main I/O vectors, and skip the
    pre or post vectors specified by struct irq_affinity.

    Also remove the irq_affinity cpumask argument that has never been used.
    If we ever need it in the future we can pass it through struct
    irq_affinity.

    Signed-off-by: Christoph Hellwig
    Reviewed-by: Hannes Reinecke
    Acked-by: Bjorn Helgaas
    Acked-by: Jens Axboe
    Cc: linux-block@vger.kernel.org
    Cc: linux-pci@vger.kernel.org
    Link: http://lkml.kernel.org/r/1478654107-7384-4-git-send-email-hch@lst.de
    Signed-off-by: Thomas Gleixner

    Christoph Hellwig
     
  • Only calculate the affinity for the main I/O vectors, and skip the pre or
    post vectors specified by struct irq_affinity.

    Also remove the irq_affinity cpumask argument that has never been used. If
    we ever need it in the future we can pass it through struct irq_affinity.

    Signed-off-by: Christoph Hellwig
    Reviewed-by: Hannes Reinecke
    Acked-by: Jens Axboe
    Cc: linux-block@vger.kernel.org
    Cc: linux-pci@vger.kernel.org
    Link: http://lkml.kernel.org/r/1478654107-7384-3-git-send-email-hch@lst.de
    Signed-off-by: Thomas Gleixner

    Christoph Hellwig
     

15 Sep, 2016

2 commits

  • No more users.

    Signed-off-by: Thomas Gleixner
    Cc: Christoph Hellwig
    Cc: axboe@fb.com
    Cc: keith.busch@intel.com
    Cc: agordeev@redhat.com
    Cc: linux-block@vger.kernel.org
    Link: http://lkml.kernel.org/r/1473862739-15032-5-git-send-email-hch@lst.de
    Signed-off-by: Thomas Gleixner

    Thomas Gleixner
     
  • The current irq spreading infrastructure is just looking at a cpumask and
    tries to spread the interrupts over the mask. Thats suboptimal as it does
    not take numa nodes into account.

    Change the logic so the interrupts are spread across numa nodes and inside
    the nodes. If there are more cpus than vectors per node, then we set the
    affinity to several cpus. If HT siblings are available we take that into
    account and try to set all siblings to a single vector.

    Signed-off-by: Thomas Gleixner
    Cc: Christoph Hellwig
    Cc: axboe@fb.com
    Cc: keith.busch@intel.com
    Cc: agordeev@redhat.com
    Cc: linux-block@vger.kernel.org
    Link: http://lkml.kernel.org/r/1473862739-15032-3-git-send-email-hch@lst.de

    Thomas Gleixner
     

22 Aug, 2016

1 commit


04 Jul, 2016

1 commit

  • This is lifted from the blk-mq code and adopted to use the affinity mask
    concept just introduced in the irq handling code. It tries to keep the
    algorithm the same as the one current used by blk-mq, but improvements
    like assining vectors on a per-node basis instead of just per sibling
    are possible with this simple move and refactoring.

    Signed-off-by: Christoph Hellwig
    Cc: linux-block@vger.kernel.org
    Cc: linux-pci@vger.kernel.org
    Cc: linux-nvme@lists.infradead.org
    Cc: axboe@fb.com
    Cc: agordeev@redhat.com
    Link: http://lkml.kernel.org/r/1467621574-8277-7-git-send-email-hch@lst.de
    Signed-off-by: Thomas Gleixner

    Christoph Hellwig