30 Aug, 2015

1 commit


13 Apr, 2015

2 commits

  • After adding display power domain for Exynos5250 in commit
    2d2c9a8d0a4f ("ARM: dts: add display power domain for exynos5250") the
    display on Chromebook Snow and others stopped working after boot.

    The reason for this suggested Andrzej Hajda: the DP clock was disabled.
    This clock is required by Display Port and is enabled by bootloader.
    However when FIMD driver probing was deferred, the display power domain
    was turned off. This effectively reset the value of DP clock enable
    register.

    When exynos-dp is later probed, the clock is not enabled and display is
    not properly configured:

    exynos-dp 145b0000.dp-controller: Timeout of video streamclk ok
    exynos-dp 145b0000.dp-controller: unable to config video

    Fixes: 2d2c9a8d0a4f ("ARM: dts: add display power domain for exynos5250")
    Cc:

    Signed-off-by: Krzysztof Kozlowski
    Reported-by: Javier Martinez Canillas
    Tested-by: Javier Martinez Canillas
    Tested-by: Andreas Färber
    Signed-off-by: Inki Dae

    Krzysztof Kozlowski
     
  • XR24 planes were not shown properly, so now set the right registers
    to correctly enable displaying these planes.

    It also moves the alpha register settings to fimd_win_set_pixfmt()
    to keep all pixel format stuff together.

    v2: remove leftover var alpha

    Signed-off-by: Gustavo Padovan
    Signed-off-by: Inki Dae

    Gustavo Padovan
     

09 Aug, 2014

1 commit

  • Pull ARM SoC cleanups from Olof Johansson:
    "This merge window brings a good size of cleanups on various platforms.
    Among the bigger ones:

    - Removal of Samsung s5pc100 and s5p64xx platforms. Both of these
    have lacked active support for quite a while, and after asking
    around nobody showed interest in keeping them around. If needed,
    they could be resurrected in the future but it's more likely that
    we would prefer reintroduction of them as DT and
    multiplatform-enabled platforms instead.

    - OMAP4 controller code register define diet. They defined a lot of
    registers that were never actually used, etc.

    - Move of some of the Tegra platform code (PMC, APBIO, fuse,
    powergate) to drivers/soc so it can be shared with 64-bit code.
    This also converts them over to traditional driver models where
    possible.

    - Removal of legacy gpio-samsung driver, since the last users have
    been removed (moved to pinctrl)

    Plus a bunch of smaller changes for various platforms that sort of
    dissapear in the diffstat for the above. clps711x cleanups, shmobile
    header file refactoring/moves for multiplatform friendliness, some
    misc cleanups, etc"

    * tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (117 commits)
    drivers: CCI: Correct use of ! and &
    video: clcd-versatile: Depend on ARM
    video: fix up versatile CLCD helper move
    MAINTAINERS: Add sdhci-st file to ARCH/STI architecture
    ARM: EXYNOS: Fix build breakge with PM_SLEEP=n
    MAINTAINERS: Remove Kirkwood
    ARM: tegra: Convert PMC to a driver
    soc/tegra: fuse: Set up in early initcall
    ARM: tegra: Always lock the CPU reset vector
    ARM: tegra: Setup CPU hotplug in a pure initcall
    soc/tegra: Implement runtime check for Tegra SoCs
    soc/tegra: fuse: fix dummy functions
    soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
    soc/tegra: Add efuse and apbmisc bindings
    soc/tegra: Add efuse driver for Tegra
    ARM: tegra: move fuse exports to soc/tegra/fuse.h
    ARM: tegra: export apb dma readl/writel
    ARM: tegra: Use a function to get the chip ID
    ARM: tegra: Sort includes alphabetically
    ARM: tegra: Move includes to include/soc/tegra
    ...

    Linus Torvalds
     

03 Aug, 2014

1 commit

  • To support MIPI command mode based I80 interface panel,
    FIMD should do followings:
    - Sets LCD I80 interface timings configuration.
    - Uses "lcd_sys" as an IRQ resource and sets relevant IRQ configuration.
    - Sets LCD block configuration for I80 interface.
    - Sets ideal(pixel) clock is 2 times faster than the original one
    to generate frame done IRQ prior to the next TE signal.
    - Implements trigger feature that transfers image data if there is page
    flip request, and implements TE handler to call trigger function.

    Signed-off-by: YoungJun Cho
    Acked-by: Inki Dae
    Acked-by: Kyungmin Park
    Signed-off-by: Inki Dae

    YoungJun Cho
     

13 Jul, 2014

1 commit


22 Feb, 2013

4 commits


26 Nov, 2012

7 commits


08 Aug, 2012

2 commits