18 Dec, 2020
5 commits
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* reset/next: (15 commits)
LF-2881-3 reset: imx7: add the imx8mp pcie clkreq reset
LF-218 reset: dispmix: remove dev when init mmio regmap
MLK-21865 Revert "regmap: use debugfs even when no device"
reset: Kconfig: use 'ARCH_MXC' for reset dispmix
reset: imx8m: Correct clock name for dispmix driver
... -
* pinctrl/next: (17 commits)
pinctrl: s32v234: Add FlexCAN pins to S32V234 driver
dt-bindings: pinctrl: s32v234: Add defines for all pins
dt-bindings: pinctrl: s32v234: Add macros for MSCR and config pairs
pinctrl: s32v234: Remove s32v234_pins enum
dt-bindings: pinctrl: s32v234: Add macros for MSCR/IMCR numbers
... -
* pcie/next: (84 commits)
PCI: mobiveil: Complete initialization of host even if no PCIe link
PCI: mobiveil: Add link up condition check
PCI: mobiveil: Add workaround for unsupported request error
PCI: mobiveil: Add PCIe Gen4 EP driver for NXP Layerscape SoCs
dt-bindings: Add DT binding for PCIE GEN4 EP of the layerscape
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* dts/next: (1297 commits)
LF-2784-2 dts: update gpu config on iMX8MN
LF-2784-1 dt-bindings: gpu: add gpu compatible
MLK-24081-05: arm64: dts: Add imx8qm hdmi rx dts
MLK-25000-2: imx8mp: Add IDs in ISP nodes
MLK-24996: arm64: dts: imx8mp: Change the name for the Basler camera
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* origin/clock/s32: (9 commits)
LF-632 clk: s32v234: Fix "enetpll_dfs3" position in sdhc_sels
clk: s32v234: Enable FlexCAN clock
clk: s32v234: Add definitions for CAN clocks
clk: s32v234: Initial enet clk support
clk: s32v234: Add dfs clk
...
14 Dec, 2020
35 commits
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Add the clkreq reset used by the L1SS feature on iMX8M
Signed-off-by: Richard Zhu
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This is an reset driver to implement a reset controller
device DISPMIX on IMX8MM and IMX8MN platforms. Dispmix
reset is used to reset or enable related buses and clks
for the submodules in DISPMIX.All the dispmix resets are divided into three subgroups:
sft_rstn, clk_en and mipi_rst, and each of them contains
several reset lines to control several different modules
on and off in DISPMIX which doesn't require the standard
reset flow, but only line assert and deassert operations.Signed-off-by: Fancy Fang
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Add macros for MSCR register numbers, configuration for these registers
and pairs of MSCR numbers and values for all currently supported
peripherals in the Auto Linux BSP.Signed-off-by: Mihaela Martinas
Signed-off-by: Ghennadi Procopciuc
Signed-off-by: Cristian Tomescu
Signed-off-by: Larisa Grigore
Signed-off-by: Stoica Cosmin-Stefan
Signed-off-by: Grigore Lupescu
Signed-off-by: Eddy Petrișor
Signed-off-by: Cosmin Oprea
Signed-off-by: Chircu-Mare Bogdan-Petru
Signed-off-by: Costin Carabas
Signed-off-by: Catalin Udma
Signed-off-by: Andrei Trandafir
Signed-off-by: Stefan-Gabriel Mirea
Reviewed-by: Leonard Crestez -
Define macros for the combinations of MSCR numbers and values to be
written into those registers. These will be used together in 'fsl,pins'
properties of pinctrl group dts nodes.Signed-off-by: Mihaela Martinas
Signed-off-by: Stefan-Gabriel Mirea
Reviewed-by: Leonard Crestez -
The values of the s32v234_pins enum from pinctrl-s32v234.c will be moved
to s32v234-pinctrl.h to avoid using magic numbers in ENET configuration
definitions.Signed-off-by: Stefan-Gabriel Mirea
Reviewed-by: Leonard Crestez -
Copy definitions from ALB v4.19.31_bsp23.0_rc2
Signed-off-by: Leonard Crestez
Reviewed-by: Fugang Duan -
Add pinctrl group for uSDHC PAD configurations in SIUL2.
Signed-off-by: Mihaela Martinas
Signed-off-by: Stefan-Gabriel Mirea -
Add pinctrl groups for UART0 and UART1 PAD configurations in SIUL2.
Signed-off-by: Mihaela Martinas
Signed-off-by: Catalin Udma
Signed-off-by: Stefan-Gabriel Mirea -
Add device tree bindings documentation and useful definitions for SIUL2 pin
controller, which is found on the S32V234 SoC.Signed-off-by: Mihaela Martinas
Signed-off-by: Ghennadi Procopciuc
Signed-off-by: Stefan-Gabriel Mirea -
add GPIORHB pad
Signed-off-by: Shengjiu Wang
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Enable the imx8qm/qxp pcie support.
Verified on the imx8qxp mek board.Signed-off-by: Richard Zhu
Signed-off-by: Hou Zhiqiang -
Add the CLKREQ reset for iMX8MP PCIe.
Signed-off-by: Richard Zhu
Reviewed-by: Fugang Duan -
Remove MLB rsrc id for imx8qm/qxp.
Reviewed-by: Fugang Duan
Signed-off-by: Clark Wang -
Update the rsrc ids to include the i.MX8DXL changes.
Signed-off-by: Jacky Bai
Reviewed-by: Dong Aisheng -
Add focaltech new touch panel ft5426 support.
Set the ft5426 as default panel for dts. If want to use the old panel, then
it needs to boot with imx7ulp-evk-ft5416.dtb file.Signed-off-by: Haibo Chen
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Currently enet cannot work due to the wrong clock tree and
incorrect IO voltage, correct them.Signed-off-by: Fugang Duan
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Define macros which will indicate the clock signals obtained after
auxiliary clock 6 source selection and division (CAN_CLK) respectively.Signed-off-by: Stoica Cosmin-Stefan
Signed-off-by: Stefan-Gabriel Mirea -
Add ethernet clocks and dependencies (sys_pll, arm_pll)
Based on ALB v4.19.31_bsp23.0_rc2
Signed-off-by: Leonard Crestez
Reviewed-by: Fugang Duan -
Enable the clocks needed for uSDHC support on Treerunner.
Signed-off-by: Stoica Cosmin-Stefan
Signed-off-by: Larisa Grigore
Signed-off-by: Stefan-Gabriel Mirea -
Enable the clocks needed for LINFlexD UART support on Treerunner and make
use of them in the LINFlexD driver.Signed-off-by: Stoica Cosmin-Stefan
Signed-off-by: Adrian.Nitu
Signed-off-by: Larisa Grigore
Signed-off-by: Iustin Dumitrescu
Signed-off-by: Stefan-Gabriel Mirea
Signed-off-by: Leonard Crestez -
Add DT bindings documentation for the upcoming S32V234 clk driver. Add
s32v234-clock.h header, which is referred in MC_CGM documentation.Signed-off-by: Stoica Cosmin-Stefan
Signed-off-by: Stefan-Gabriel Mirea -
Remove all MLB clock setting for imx8qm/qxp.
Reviewed-by: Fugang Duan
Signed-off-by: Clark Wang -
There is hardware issue: TKT0535653
SDMA3 can't work without setting AUDIOMIX_CLKEN0[SDMA2] (bit-26) to 1The workaround is:
As the reset state of AUDIOMIX_CLKEN0[SDMA2] is enabled,
we just need to keep it on as reset state, don't touch it
in kernel, then every thing is same as before, if we register
the clock in clk-audiomix, then kernel will try to disable
it in idle.Signed-off-by: Shengjiu Wang
Reviewed-by: Daniel Baluta
Reviewed-by: Jacky Bai
Reviewed-by: Robin Gong -
These IDs will be used by the platform clock controller driver
to register the clocks even if they are not populated on
a specific board. And that's okay, because it will allow the
driver to remain unchanged, the only thing changing will be the
dtb between boards which will override the properties of each
specific SAI MCLK devicetree node as necessary, if the board
has populated the any of the SAIx_MCLK pins with an input clock.Signed-off-by: Abel Vesa
Reviewed-by: Shengjiu Wang -
These will be used imx8mp for blk-ctrl driver.
Signed-off-by: Abel Vesa
Reviewed-by: Dong Aisheng
Tested-by: Daniel Baluta -
These will be used by the imx8mp for blk-ctrl driver.
Signed-off-by: Abel Vesa
Reviewed-by: Dong Aisheng
Tested-by: Daniel Baluta -
These will be used by the imx8mp for blk-ctrl driver.
Signed-off-by: Abel Vesa
Reviewed-by: Dong Aisheng
Tested-by: Daniel Baluta -
These will be used by the imx8mp for blk-ctrl driver.
Signed-off-by: Abel Vesa
Reviewed-by: Dong Aisheng
Tested-by: Daniel Baluta -
All these IDs are for one single HW gate (CCGR101) that is shared
between these root clocks.Signed-off-by: Abel Vesa
Reviewed-by: Dong Aisheng
Tested-by: Daniel Baluta -
These will be used by the imx8mp for blk-ctrl driver.
Signed-off-by: Abel Vesa
Reviewed-by: Dong Aisheng
Tested-by: Daniel Baluta -
In the reference manual the actual name is Audio BLK_CTRL.
Lets make it more obvious here by renaming from audiomix to audio_blk_ctrl.Signed-off-by: Abel Vesa
Reviewed-by: Dong Aisheng
Tested-by: Daniel Baluta -
This patch adds "media_ldb_root_clk" clock for
the LDB in the MEDIAMIX subsystem.Reviewed-by: Sandor Yu
Signed-off-by: Liu Ying
[ Aisheng: update clock id ]
Signed-off-by: Dong Aisheng -
This patch adds DISP2 pixel clock for the second instance of LCDIFv3
in the MEDIAMIX subsystem.Reviewed-by: Sandor Yu
Signed-off-by: Liu Ying
[ Aisheng: change to imx8m_clk_hw_composite_bus and update clock id ]
Signed-off-by: Dong Aisheng -
This clock is a high precision clock on imx8mq-evk board that will be used by
HDMI phy.Signed-off-by: Laurentiu Palcu
[ Aisheng: update clk id to new value due to upstream change ]
Signed-off-by: Dong Aisheng -
add audio acm clocks
Signed-off-by: Shengjiu Wang