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include/configs/cgtqmx6eval.h
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/* * * Congatec Conga-QEVAl board configuration file. * * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. * Based on Freescale i.MX6Q Sabre Lite board configuration file. * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> * Leo Sartre, <lsartre@adeneo-embedded.com> * |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ #ifndef __CONFIG_CGTQMX6EVAL_H #define __CONFIG_CGTQMX6EVAL_H |
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#include "mx6_common.h" |
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#define CONFIG_MACH_TYPE 4122 |
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#ifdef CONFIG_SPL |
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#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) #define CONFIG_SPL_SPI_LOAD #include "imx6_spl.h" #endif |
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/* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) #define CONFIG_BOARD_EARLY_INIT_F |
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#define CONFIG_BOARD_LATE_INIT |
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#define CONFIG_MISC_INIT_R |
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#define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART2_BASE /* MMC Configs */ |
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
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/* SPI NOR */ |
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#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SPI_FLASH_SST #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 #define CONFIG_SF_DEFAULT_SPEED 20000000 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) |
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/* Miscellaneous commands */ #define CONFIG_CMD_BMODE |
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/* Thermal support */ |
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#define CONFIG_IMX_THERMAL |
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/* I2C Configs */ |
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#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC |
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ |
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_SPEED 100000 /* PMIC */ #define CONFIG_POWER #define CONFIG_POWER_I2C #define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 |
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/* USB Configs */ |
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#define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_MX6 |
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ #define CONFIG_USB_KEYBOARD #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP |
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#define CONFIG_USBD_HS |
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#define CONFIG_USB_FUNCTION_MASS_STORAGE |
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#define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 |
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/* Framebuffer */ |
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#define CONFIG_VIDEO_IPUV3 #define CONFIG_CFB_CONSOLE #define CONFIG_VGA_AS_SINGLE_DEVICE |
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#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN_ALIGN #define CONFIG_BMP_16BPP #define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #ifdef CONFIG_MX6DL #define CONFIG_IPUV3_CLK 198000000 #else #define CONFIG_IPUV3_CLK 264000000 #endif #define CONFIG_IMX_HDMI |
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/* SATA */ #define CONFIG_CMD_SATA #define CONFIG_DWC_AHSATA #define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_DWC_AHSATA_PORT_ID 0 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR #define CONFIG_LBA48 #define CONFIG_LIBATA |
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/* Ethernet */ |
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#define CONFIG_FEC_MXC #define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 6 #define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS |
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/* Command definition */ #define CONFIG_MXC_UART_BASE UART2_BASE |
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#define CONSOLE_DEV "ttymxc1" |
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#define CONFIG_MMCROOT "/dev/mmcblk0p2" #define CONFIG_SYS_MMC_ENV_DEV 0 |
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#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG |
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#define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ |
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"image=zImage\0" \ |
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"fdtfile=undefined\0" \ |
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"fdt_addr_r=0x18000000\0" \ |
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"boot_fdt=try\0" \ |
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"ip_dyn=yes\0" \ |
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"console=" CONSOLE_DEV "\0" \ |
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"dfuspi=dfu 0 sf 0:0:10000000:0\0" \ "dfu_alt_info_spl=spl raw 0x400\0" \ "dfu_alt_info_img=u-boot raw 0x10000\0" \ "dfu_alt_info=spl raw 0x400\0" \ |
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"bootm_size=0x10000000\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ |
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"mmcpart=1\0" \ |
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"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "update_sd_firmware=" \ "if test ${ip_dyn} = yes; then " \ "setenv get_cmd dhcp; " \ "else " \ "setenv get_cmd tftp; " \ "fi; " \ "if mmc dev ${mmcdev}; then " \ "if ${get_cmd} ${update_sd_firmware_filename}; then " \ "setexpr fw_sz ${filesize} / 0x200; " \ "setexpr fw_sz ${fw_sz} + 1; " \ "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ "fi; " \ "fi\0" \ |
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"mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=${mmcroot}\0" \ "loadbootscript=" \ |
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"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ |
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"bootscript=echo Running bootscript from mmc ...; " \ "source\0" \ |
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"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \ |
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"mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ "if run loadfdt; then " \ |
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"bootz ${loadaddr} - ${fdt_addr_r}; " \ "else " \ "if test ${boot_fdt} = try; then " \ "bootz; " \ "else " \ "echo WARN: Cannot load the DT; " \ "fi; " \ "fi; " \ "else " \ "bootz; " \ "fi;\0" \ |
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"findfdt="\ "if test $board_rev = MX6Q ; then " \ "setenv fdtfile imx6q-qmx6.dtb; fi; " \ "if test $board_rev = MX6DL ; then " \ "setenv fdtfile imx6dl-qmx6.dtb; fi; " \ "if test $fdtfile = undefined; then " \ "echo WARNING: Could not determine dtb to use; fi; \0" \ |
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"netargs=setenv bootargs console=${console},${baudrate} " \ "root=/dev/nfs " \ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ "netboot=echo Booting from net ...; " \ "run netargs; " \ "if test ${ip_dyn} = yes; then " \ "setenv get_cmd dhcp; " \ "else " \ "setenv get_cmd tftp; " \ "fi; " \ "${get_cmd} ${image}; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \ "bootz ${loadaddr} - ${fdt_addr_r}; " \ |
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"else " \ "if test ${boot_fdt} = try; then " \ |
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"bootz; " \ |
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"else " \ "echo WARN: Cannot load the DT; " \ "fi; " \ "fi; " \ "else " \ |
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"bootz; " \ |
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"fi;\0" \ |
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"spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\ |
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#define CONFIG_BOOTCOMMAND \ |
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"run spilock;" \ |
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"run findfdt; " \ |
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"mmc dev ${mmcdev};" \ "if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ "if run loadimage; then " \ "run mmcboot; " \ "else run netboot; " \ "fi; " \ "fi; " \ "else run netboot; fi" |
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#define CONFIG_SYS_MEMTEST_START 0x10000000 #define CONFIG_SYS_MEMTEST_END 0x10010000 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 |
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/* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE #define CONFIG_SYS_INIT_SP_OFFSET \ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
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/* Environment organization */ |
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#if defined (CONFIG_ENV_IS_IN_MMC) |
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#define CONFIG_ENV_OFFSET (6 * 64 * 1024) #define CONFIG_SYS_MMC_ENV_DEV 0 |
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#endif #define CONFIG_ENV_SIZE (8 * 1024) #define CONFIG_ENV_IS_IN_SPI_FLASH #if defined(CONFIG_ENV_IS_IN_SPI_FLASH) #define CONFIG_ENV_OFFSET (768 * 1024) #define CONFIG_ENV_SECT_SIZE (64 * 1024) #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED #endif |
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#endif /* __CONFIG_CGTQMX6EVAL_H */ |