Blame view

configs/zynq_dlc20_rev1_0_defconfig 1.84 KB
6bfe3fffa   Michal Simek   arm: zynq: Add su...
1
  CONFIG_ARM=y
100150254   Trevor Woerner   CONFIG_SPL_SYS_[D...
2
  CONFIG_SPL_SYS_DCACHE_OFF=y
6bfe3fffa   Michal Simek   arm: zynq: Add su...
3
4
  CONFIG_ARCH_ZYNQ=y
  CONFIG_SYS_TEXT_BASE=0x4000000
052170c6a   Tom Rini   configs: Resync w...
5
  CONFIG_DM_GPIO=y
d168bcb6f   Tom Rini   configs: Resync w...
6
  CONFIG_SPL_STACK_R_ADDR=0x200000
6bfe3fffa   Michal Simek   arm: zynq: Add su...
7
8
9
10
  CONFIG_SPL=y
  CONFIG_DEBUG_UART_BASE=0xe0001000
  CONFIG_DEBUG_UART_CLOCK=50000000
  CONFIG_IDENT_STRING=" Xilinx Zynq DLC20 Rev1.0"
6bfe3fffa   Michal Simek   arm: zynq: Add su...
11
12
  CONFIG_DEBUG_UART=y
  CONFIG_DISTRO_DEFAULTS=y
d760a5efb   Tom Rini   configs: Migrate ...
13
14
  CONFIG_SYS_CUSTOM_LDSCRIPT=y
  CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
6bfe3fffa   Michal Simek   arm: zynq: Add su...
15
16
17
  CONFIG_FIT=y
  CONFIG_FIT_SIGNATURE=y
  CONFIG_FIT_VERBOSE=y
c76c93a3d   Tom Rini   configs: Rename C...
18
  CONFIG_LEGACY_IMAGE_FORMAT=y
37304aaf6   Simon Glass   Convert CONFIG_US...
19
  CONFIG_USE_PREBOOT=y
6bfe3fffa   Michal Simek   arm: zynq: Add su...
20
21
22
  CONFIG_SPL_STACK_R=y
  CONFIG_SPL_OS_BOOT=y
  CONFIG_SPL_SPI_LOAD=y
1ee774d20   Hannes Schmelzer   Convert CONFIG_SY...
23
  CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
c4690c54b   Michal Simek   ARM: zynq: Move B...
24
  # CONFIG_BOOTM_NETBSD is not set
6bfe3fffa   Michal Simek   arm: zynq: Add su...
25
  CONFIG_CMD_THOR_DOWNLOAD=y
6bfe3fffa   Michal Simek   arm: zynq: Add su...
26
  CONFIG_CMD_DFU=y
6bfe3fffa   Michal Simek   arm: zynq: Add su...
27
28
29
30
31
32
33
  CONFIG_CMD_FPGA_LOADBP=y
  CONFIG_CMD_FPGA_LOADFS=y
  CONFIG_CMD_FPGA_LOADMK=y
  CONFIG_CMD_FPGA_LOADP=y
  CONFIG_CMD_GPIO=y
  CONFIG_CMD_I2C=y
  CONFIG_CMD_MMC=y
6bfe3fffa   Michal Simek   arm: zynq: Add su...
34
35
36
37
38
  CONFIG_CMD_USB=y
  # CONFIG_CMD_SETEXPR is not set
  CONFIG_CMD_TFTPPUT=y
  CONFIG_CMD_CACHE=y
  CONFIG_CMD_EXT4_WRITE=y
6bfe3fffa   Michal Simek   arm: zynq: Add su...
39
40
  CONFIG_DEFAULT_DEVICE_TREE="zynq-dlc20-rev1.0"
  CONFIG_ENV_IS_IN_SPI_FLASH=y
8d8ee47e0   Tom Rini   env: Add CONFIG_S...
41
  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
6bfe3fffa   Michal Simek   arm: zynq: Add su...
42
43
44
45
46
47
  CONFIG_NET_RANDOM_ETHADDR=y
  CONFIG_SPL_DM_SEQ_ALIAS=y
  CONFIG_DFU_MMC=y
  CONFIG_DFU_RAM=y
  CONFIG_FPGA_XILINX=y
  CONFIG_FPGA_ZYNQPL=y
217bb295e   Michal Simek   ARM: zynq: Conver...
48
49
50
51
52
53
  CONFIG_DM_I2C=y
  CONFIG_SYS_I2C_CADENCE=y
  CONFIG_MISC=y
  CONFIG_I2C_EEPROM=y
  CONFIG_SYS_I2C_EEPROM_ADDR=0x0
  CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
6bfe3fffa   Michal Simek   arm: zynq: Add su...
54
55
  CONFIG_MMC_SDHCI=y
  CONFIG_MMC_SDHCI_ZYNQ=y
14453fbfa   Patrick Delaunay   Convert CONFIG_SF...
56
  CONFIG_SF_DEFAULT_SPEED=30000000
6bfe3fffa   Michal Simek   arm: zynq: Add su...
57
58
59
60
61
62
63
64
65
66
67
68
69
  CONFIG_SPI_FLASH_STMICRO=y
  CONFIG_SPI_FLASH_WINBOND=y
  CONFIG_PHY_REALTEK=y
  CONFIG_MII=y
  CONFIG_ZYNQ_GEM=y
  CONFIG_DEBUG_UART_ZYNQ=y
  CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ZYNQ_SERIAL=y
  CONFIG_ZYNQ_QSPI=y
  CONFIG_USB=y
  CONFIG_USB_EHCI_HCD=y
  CONFIG_USB_ULPI_VIEWPORT=y
  CONFIG_USB_ULPI=y
6bfe3fffa   Michal Simek   arm: zynq: Add su...
70
71
72
73
74
75
76
  CONFIG_USB_GADGET=y
  CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
  CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
  CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
  CONFIG_CI_UDC=y
  CONFIG_USB_GADGET_DOWNLOAD=y
  CONFIG_USB_FUNCTION_THOR=y