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arch/riscv/Kconfig 2.4 KB

117a433d9 Bin Meng riscv: kconfig: N...	1	menu "RISC-V architecture"
f94c44e51 Rick Chen riscv: Add Kconfi...	2 3 4 5 6 7 8 9	depends on RISCV config SYS_ARCH default "riscv" choice prompt "Target select" optional
6f4dd62f3 Rick Chen riscv: cpu: nx25:...	10 11	config TARGET_AX25_AE350 bool "Support ax25-ae350"
f94c44e51 Rick Chen riscv: Add Kconfi...	12
510e379c4 Bin Meng riscv: Add QEMU v...	13 14	config TARGET_QEMU_VIRT bool "Support QEMU Virt Board"
3fda0262c Anup Patel riscv: Add SiFive...	15 16	config TARGET_SIFIVE_FU540 bool "Support SiFive FU540 Board"
f94c44e51 Rick Chen riscv: Add Kconfi...	17	endchoice
52923c6db Rick Chen riscv: cache: Imp...	18	# board-specific options below
6f4dd62f3 Rick Chen riscv: cpu: nx25:...	19	source "board/AndesTech/ax25-ae350/Kconfig"
510e379c4 Bin Meng riscv: Add QEMU v...	20	source "board/emulation/qemu-riscv/Kconfig"
3fda0262c Anup Patel riscv: Add SiFive...	21	source "board/sifive/fu540/Kconfig"
f94c44e51 Rick Chen riscv: Add Kconfi...	22
52923c6db Rick Chen riscv: cache: Imp...	23 24	# platform-specific options below source "arch/riscv/cpu/ax25/Kconfig"
fdff1f96a Anup Patel riscv: Rename cpu...	25	source "arch/riscv/cpu/generic/Kconfig"
52923c6db Rick Chen riscv: cache: Imp...	26 27	# architecture-specific options below
f94c44e51 Rick Chen riscv: Add Kconfi...	28	choice
862e2e75e Lukas Auer riscv: rename CPU...	29 30	prompt "Base ISA" default ARCH_RV32I
f94c44e51 Rick Chen riscv: Add Kconfi...	31
862e2e75e Lukas Auer riscv: rename CPU...	32 33	config ARCH_RV32I bool "RV32I"
f94c44e51 Rick Chen riscv: Add Kconfi...	34 35	select 32BIT help
862e2e75e Lukas Auer riscv: rename CPU...	36	Choose this option to target the RV32I base integer instruction set.
f94c44e51 Rick Chen riscv: Add Kconfi...	37
862e2e75e Lukas Auer riscv: rename CPU...	38 39	config ARCH_RV64I bool "RV64I"
f94c44e51 Rick Chen riscv: Add Kconfi...	40	select 64BIT
711585649 Lukas Auer riscv: select CON...	41	select PHYS_64BIT
f94c44e51 Rick Chen riscv: Add Kconfi...	42	help
862e2e75e Lukas Auer riscv: rename CPU...	43	Choose this option to target the RV64I base integer instruction set.
f94c44e51 Rick Chen riscv: Add Kconfi...	44 45	endchoice
8176ea4d5 Lukas Auer riscv: add Kconfi...	46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62	choice prompt "Code Model" default CMODEL_MEDLOW config CMODEL_MEDLOW bool "medium low code model" help U-Boot and its statically defined symbols must lie within a single 2 GiB address range and must lie between absolute addresses -2 GiB and +2 GiB. config CMODEL_MEDANY bool "medium any code model" help U-Boot and its statically defined symbols must be within any single 2 GiB address range. endchoice
3cfc82526 Anup Patel riscv: Introduce ...	63 64 65 66 67 68 69 70 71 72 73 74 75 76 77	choice prompt "Run Mode" default RISCV_MMODE config RISCV_MMODE bool "Machine" help Choose this option to build U-Boot for RISC-V M-Mode. config RISCV_SMODE bool "Supervisor" help Choose this option to build U-Boot for RISC-V S-Mode. endchoice
d57ffa650 Lukas Auer riscv: add Kconfi...	78 79 80 81 82 83 84 85 86 87	config RISCV_ISA_C bool "Emit compressed instructions" default y help Adds "C" to the ISA subsets that the toolchain is allowed to emit when building U-Boot, which results in compressed instructions in the U-Boot binary. config RISCV_ISA_A def_bool y
f94c44e51 Rick Chen riscv: Add Kconfi...	88 89 90 91 92	config 32BIT bool config 64BIT bool
644a3cd77 Bin Meng riscv: Add a SYSC...	93 94 95 96 97 98 99 100	config SIFIVE_CLINT bool depends on RISCV_MMODE select REGMAP select SYSCON help The SiFive CLINT block holds memory-mapped control and status registers associated with software and timer interrupts.
511107d85 Anup Patel riscv: Implement ...	101 102 103 104 105 106 107	config RISCV_RDTIME bool default y if RISCV_SMODE help The provides the riscv_get_time() API that is implemented using the standard rdtime instruction. This is the case for S-mode U-Boot, and is useful for processors that support rdtime in M-mode too.
92b64fef0 Bin Meng riscv: Enlarge th...	108 109	config SYS_MALLOC_F_LEN default 0x1000
f94c44e51 Rick Chen riscv: Add Kconfi...	110	endmenu