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include/configs/mx6sx_arm2.h 9.43 KB
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0ca855a9e   Ye Li   MLK-18456-3 mx6sx... 
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  /*
   * Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
   *
   * Configuration settings for the Freescale i.MX6SX ARM2 board.
   *
   * SPDX-License-Identifier:	GPL-2.0+
   */
  
  #ifndef __MX6SX_ARM2_CONFIG_H
  #define __MX6SX_ARM2_CONFIG_H
  
  #include "mx6_common.h"
  
  #define CONFIG_DBG_MONITOR
  
  /* Size of malloc() pool */
  #define CONFIG_SYS_MALLOC_LEN		(32 * SZ_1M)
  
  #define CONFIG_IMX_THERMAL
  
  #define CONFIG_MXC_UART
  #define CONFIG_MXC_UART_BASE		UART1_BASE
  
  /* MMC Configs */
  #define CONFIG_SYS_FSL_ESDHC_ADDR	0
  
  #define CONFIG_FEC_MXC
  #define CONFIG_MII
  #define IMX_FEC_BASE			ENET_BASE_ADDR
  #define CONFIG_FEC_XCV_TYPE             RGMII
  #ifdef CONFIG_DM_ETH
  #define CONFIG_ETHPRIME                 "eth0"
  #else
  #define CONFIG_ETHPRIME                 "FEC"
  #endif
  #define CONFIG_FEC_MXC_PHYADDR          1
  
  #define CONFIG_PHYLIB
  #define CONFIG_PHY_ATHEROS
  
  /* I2C configs */
  #ifndef CONFIG_DM_I2C
  #define CONFIG_SYS_I2C
  #endif
  #ifdef CONFIG_CMD_I2C
  #define CONFIG_SYS_I2C_MXC
  #define CONFIG_SYS_I2C_SPEED		100000
  #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
  #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
  #endif
  
  /* PMIC */
  #ifndef CONFIG_DM_PMIC
  #define CONFIG_POWER
  #define CONFIG_POWER_I2C
  #define CONFIG_POWER_PFUZE100
  #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
  #endif
  
  #ifdef CONFIG_IMX_BOOTAUX
  #ifdef CONFIG_DM_SPI
  #define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000 /* Set to QSPI2 B flash at default */
  #define SF_QSPI2_B_CS_NUM 2
  #else
  #define CONFIG_SYS_AUXCORE_BOOTDATA 0x72000000 /* Set to QSPI2 B flash at default */
  #define SF_QSPI2_B_CS_NUM 1
  #endif
  
  #define UPDATE_M4_ENV \
  	"m4image=m4_qspi.bin\0" \
  	"m4_qspi_cs="__stringify(SF_QSPI2_B_CS_NUM)"\0" \
  	"loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
  	"update_m4_from_sd=" \
  		"if sf probe 1:${m4_qspi_cs}; then " \
  			"if run loadm4image; then " \
  				"setexpr fw_sz ${filesize} + 0xffff; " \
  				"setexpr fw_sz ${fw_sz} / 0x10000; "	\
  				"setexpr fw_sz ${fw_sz} * 0x10000; "	\
  				"sf erase 0x0 ${fw_sz}; " \
  				"sf write ${loadaddr} 0x0 ${filesize}; " \
  			"fi; " \
  		"fi\0" \
  	"m4boot=sf probe 1:${m4_qspi_cs}; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
  #else
  #define UPDATE_M4_ENV ""
  #endif
  
  #define CONFIG_SYS_MMC_IMG_LOAD_PART	1
  #ifdef CONFIG_NAND_BOOT
  #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(boot),16m(kernel),16m(dtb),1m(misc),-(rootfs) "
  #else
  #define MFG_NAND_PARTITION ""
  #endif
  
  #define CONFIG_MFG_ENV_SETTINGS \
  	"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
  		"rdinit=/linuxrc " \
  		"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
  		"g_mass_storage.file=/fat g_mass_storage.ro=1 " \
  		"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
  		"g_mass_storage.iSerialNumber=\"\" "\
  		MFG_NAND_PARTITION \
  		"\0" \
2a092ea07   Ye Li   MLK-20760-1 mx6/7... 
104
 
  	"initrd_addr=0x86800000\0" \
0ca855a9e   Ye Li   MLK-18456-3 mx6sx... 
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  	"initrd_high=0xffffffff\0" \
  	"bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
  
  #if defined(CONFIG_NAND_BOOT)
  #define CONFIG_EXTRA_ENV_SETTINGS \
  	CONFIG_MFG_ENV_SETTINGS \
  	"panel=Hannstar-XGA\0" \
  	"fdt_addr=0x83000000\0" \
  	"fdt_high=0xffffffff\0"	  \
  	"console=ttymxc0\0" \
  	"bootargs=console=ttymxc0,115200 ubi.mtd=4 "  \
  		"root=ubi0:rootfs rootfstype=ubifs "		     \
  		"mtdparts=gpmi-nand:64m(boot),16m(kernel),16m(dtb),1m(misc),-(rootfs)\0"\
  	"bootcmd=nand read ${loadaddr} 0x4000000 0x800000;"\
  		"nand read ${fdt_addr} 0x5000000 0x100000;"\
  		"bootz ${loadaddr} - ${fdt_addr}\0"
  
  #else
  #define CONFIG_EXTRA_ENV_SETTINGS \
  	CONFIG_MFG_ENV_SETTINGS \
  	UPDATE_M4_ENV \
  	"panel=Hannstar-XGA\0" \
  	"script=boot.scr\0" \
  	"image=zImage\0" \
  	"console=ttymxc0\0" \
  	"fdt_high=0xffffffff\0" \
  	"initrd_high=0xffffffff\0" \
  	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
  	"fdt_addr=0x83000000\0" \
  	"boot_fdt=try\0" \
  	"ip_dyn=yes\0" \
  	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  	"mmcautodetect=yes\0" \
  	"mmcargs=setenv bootargs console=${console},${baudrate} " \
  		"root=${mmcroot}\0" \
  	"loadbootscript=" \
  		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  	"bootscript=echo Running bootscript from mmc ...; " \
  		"source\0" \
  	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  	"mmcboot=echo Booting from mmc ...; " \
  		"run mmcargs; " \
  		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  			"if run loadfdt; then " \
  				"bootz ${loadaddr} - ${fdt_addr}; " \
  			"else " \
  				"if test ${boot_fdt} = try; then " \
  					"bootz; " \
  				"else " \
  					"echo WARN: Cannot load the DT; " \
  				"fi; " \
  			"fi; " \
  		"else " \
  			"bootz; " \
  		"fi;\0" \
  	"netargs=setenv bootargs console=${console},${baudrate} " \
  		"root=/dev/nfs " \
  	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  		"netboot=echo Booting from net ...; " \
  		"run netargs; " \
  		"if test ${ip_dyn} = yes; then " \
  			"setenv get_cmd dhcp; " \
  		"else " \
  			"setenv get_cmd tftp; " \
  		"fi; " \
  		"${get_cmd} ${image}; " \
  		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  				"bootz ${loadaddr} - ${fdt_addr}; " \
  			"else " \
  				"if test ${boot_fdt} = try; then " \
  					"bootz; " \
  				"else " \
  					"echo WARN: Cannot load the DT; " \
  				"fi; " \
  			"fi; " \
  		"else " \
  			"bootz; " \
  		"fi;\0"
  
  #define CONFIG_BOOTCOMMAND \
  	   "mmc dev ${mmcdev};" \
  	   "mmc dev ${mmcdev}; if mmc rescan; then " \
  		   "if run loadbootscript; then " \
  			   "run bootscript; " \
  		   "else " \
  			   "if run loadimage; then " \
  				   "run mmcboot; " \
  			   "else run netboot; " \
  			   "fi; " \
  		   "fi; " \
  	   "else run netboot; fi"
  #endif
  
  #define CONFIG_SYS_MEMTEST_START	0x80000000
  #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x10000)
  
  /* Physical Memory Map */
  #define CONFIG_NR_DRAM_BANKS		1
  #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
  #define PHYS_SDRAM_SIZE			SZ_1G
  
  #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
  #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
  #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
  
  #define CONFIG_SYS_INIT_SP_OFFSET \
  	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  #define CONFIG_SYS_INIT_SP_ADDR \
  	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  
  #define CONFIG_ENV_SIZE			SZ_8K
  
  #ifdef CONFIG_NAND_BOOT
  #define CONFIG_CMD_NAND
  #elif defined CONFIG_SPI_BOOT
  #define CONFIG_MXC_SPI
  #elif defined CONFIG_NOR_BOOT
  #define CONFIG_MTD_NOR_FLASH
  #endif
  
  #ifdef CONFIG_FSL_QSPI
  #define CONFIG_SYS_FSL_QSPI_AHB
  #define FSL_QSPI_FLASH_SIZE		SZ_32M
  #define FSL_QSPI_FLASH_NUM		2
  #define CONFIG_SF_DEFAULT_BUS		1
  #define CONFIG_SF_DEFAULT_CS		0
  #define CONFIG_SF_DEFAULT_SPEED	40000000
  #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
  #endif
  
  
  #ifdef CONFIG_MXC_SPI
  #define CONFIG_SF_DEFAULT_BUS  3
  #define CONFIG_SF_DEFAULT_SPEED 20000000
  #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
  #define CONFIG_SF_DEFAULT_CS   0
  #endif
  
  #ifdef CONFIG_NOR_BOOT
  #define CONFIG_SYS_FLASH_BASE           WEIM_ARB_BASE_ADDR
  #define CONFIG_SYS_FLASH_SECT_SIZE	(128 * 1024)
  #define CONFIG_SYS_MAX_FLASH_BANKS 1    /* max number of memory banks */
  #define CONFIG_SYS_MAX_FLASH_SECT 256   /* max number of sectors on one chip */
  #define CONFIG_SYS_FLASH_CFI            /* Flash memory is CFI compliant */
  #define CONFIG_FLASH_CFI_DRIVER         /* Use drivers/cfi_flash.c */
  #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/
  #define CONFIG_SYS_FLASH_EMPTY_INFO
  #endif
  
  #ifdef CONFIG_CMD_NAND
  #define CONFIG_CMD_NAND_TRIMFFS
  
  /* NAND stuff */
  #define CONFIG_NAND_MXS
  #define CONFIG_SYS_MAX_NAND_DEVICE	1
  #define CONFIG_SYS_NAND_BASE		0x40000000
  #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  #define CONFIG_SYS_NAND_ONFI_DETECTION
  
  /* DMA stuff, needed for GPMI/MXS NAND support */
  #define CONFIG_APBH_DMA
  #define CONFIG_APBH_DMA_BURST
  #define CONFIG_APBH_DMA_BURST8
  #endif
  
  
  #if defined(CONFIG_ENV_IS_IN_MMC)
  #define CONFIG_ENV_OFFSET		(14 * SZ_64K)
  #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
  #define CONFIG_ENV_OFFSET		(896 * 1024)
  #define CONFIG_ENV_SECT_SIZE		(64 * 1024)
  #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
  #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
  #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
  #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
  #elif defined(CONFIG_ENV_IS_IN_NAND)
  #undef CONFIG_ENV_SIZE
  #define CONFIG_ENV_OFFSET		(60 << 20)
  #define CONFIG_ENV_SECT_SIZE		(128 << 10)
  #define CONFIG_ENV_SIZE			CONFIG_ENV_SECT_SIZE
  #elif defined(CONFIG_ENV_IS_IN_FLASH)
  #undef CONFIG_ENV_SIZE
  #define CONFIG_ENV_SIZE			CONFIG_SYS_FLASH_SECT_SIZE
  #define CONFIG_ENV_SECT_SIZE		CONFIG_SYS_FLASH_SECT_SIZE
  #define CONFIG_ENV_OFFSET		(7 * CONFIG_SYS_FLASH_SECT_SIZE)
  #endif
  
  #ifdef CONFIG_VIDEO
  #define CONFIG_VIDEO_MXS
  #define CONFIG_VIDEO_LOGO
  #define CONFIG_SPLASH_SCREEN
  #define CONFIG_SPLASH_SCREEN_ALIGN
  #define CONFIG_BMP_16BPP
  #define CONFIG_VIDEO_BMP_RLE8
  #define CONFIG_VIDEO_BMP_LOGO
  #define CONFIG_IMX_VIDEO_SKIP
  #define CONFIG_SYS_CONSOLE_BG_COL            0x00
  #define CONFIG_SYS_CONSOLE_FG_COL            0xa0
  #ifdef CONFIG_VIDEO_GIS
  #define CONFIG_VIDEO_CSI
  #define CONFIG_VIDEO_PXP
  #define CONFIG_VIDEO_VADC
  #endif
  #endif
  
  
  /* USB Configs */
  #ifdef CONFIG_CMD_USB
  #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
  #endif
  
  #ifndef CONFIG_DM_USB
  #define CONFIG_USB_EHCI
  #define CONFIG_USB_EHCI_MX6
  #define CONFIG_USB_STORAGE
  #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  #define CONFIG_MXC_USB_FLAGS   0
  /*Only enable OTG1, the OTG2 has pin conflicts with PWM and WDOG*/
  #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
  #endif
  
  #endif				/* __CONFIG_H */