Eric Lee / smarc-uboot

Blame view

include/configs/mx6ul_14x14_lpddr2_arm2.h 1.77 KB
edit raw normal view history
f3bcec93b   Ye Li   MLK-18457-2 mx6ul... 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
 
  /*
   * Copyright (C) 2015 Freescale Semiconductor, Inc.
   *
   * Configuration settings for the Freescale i.MX6UL 14x14 LPDDR2 ARM2.
   *
   * SPDX-License-Identifier:	GPL-2.0+
   */
  #ifndef __MX6UL_14X14_LPDDR2_ARM2_CONFIG_H
  #define __MX6UL_14X14_LPDDR2_ARM2_CONFIG_H
  
  #ifdef  CONFIG_SPI_BOOT
  #define CONFIG_MXC_SPI
  #elif defined(CONFIG_NOR_BOOT)
  #define CONFIG_MTD_NOR_FLASH
  #define CONFIG_SYS_FLASH_PROTECTION
  #elif defined CONFIG_NAND_BOOT
  #define CONFIG_CMD_NAND
  #endif
  #ifdef CONFIG_MTD_NOR_FLASH
  /*
   * Conflicts with SD1/SD2/VIDEO/ENET
   * ENET is keeped, since only RXER conflicts.
   * If removed ENET, we can not boot kernel, since sd1/sd2 is disabled
   * when support weimnor.
   */
  #undef CONFIG_FSL_USDHC
  #undef CONFIG_VIDEO
  #endif
  
  #define BOOTARGS_CMA_SIZE   "cma=96M "
  
  #include "mx6ul_arm2.h"
  
  #define PHYS_SDRAM_SIZE			SZ_256M
  
  #ifdef CONFIG_MXC_SPI
  #define CONFIG_SF_DEFAULT_BUS  1
  #define CONFIG_SF_DEFAULT_SPEED 20000000
  #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
  #define CONFIG_SF_DEFAULT_CS   0
  #endif
  
  #ifdef CONFIG_DM_ETH
  #define CONFIG_CMD_MII
  #define CONFIG_FEC_MXC
  #define CONFIG_MII
  #define CONFIG_FEC_ENET_DEV 1  /* The ENET1 has pin conflict with UART1 */
  
  #if (CONFIG_FEC_ENET_DEV == 0)
  #define IMX_FEC_BASE			ENET_BASE_ADDR
  #define CONFIG_FEC_MXC_PHYADDR          0x2
  #define CONFIG_FEC_XCV_TYPE             MII100
  #ifdef CONFIG_DM_ETH
  #define CONFIG_ETHPRIME			"eth0"
  #else
  #define CONFIG_ETHPRIME			"FEC0"
  #endif
  #elif (CONFIG_FEC_ENET_DEV == 1)
  #define IMX_FEC_BASE			ENET2_BASE_ADDR
  #define CONFIG_FEC_MXC_PHYADDR          0x1
  #define CONFIG_FEC_XCV_TYPE             RMII
  #ifdef CONFIG_DM_ETH
  #define CONFIG_ETHPRIME			"eth1"
  #else
  #define CONFIG_ETHPRIME			"FEC1"
  #endif
  #endif
  
  #define CONFIG_PHYLIB
  #define CONFIG_PHY_MICREL
  #define CONFIG_FEC_MXC_MDIO_BASE ENET2_BASE_ADDR
  #endif
  
  #endif