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include/virtex2.h 3.35 KB

83d290c56 Tom Rini SPDX: Convert all...	1	/* SPDX-License-Identifier: GPL-2.0+ */
c609719b8 wdenk Initial revision	2 3 4 5	/* * (C) Copyright 2002 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. * Keith Outwater, keith_outwater@mvis.com
c609719b8 wdenk Initial revision	6 7 8 9 10 11	*/ #ifndef _VIRTEX2_H_ #define _VIRTEX2_H_ #include <xilinx.h>
c609719b8 wdenk Initial revision	12 13 14 15	/* * Slave SelectMap Implementation function table. */ typedef struct {
2df9d5c43 Michal Simek fpga: xilinx: Fix...	16 17 18 19 20 21 22 23 24 25 26 27 28	xilinx_pre_fn pre; xilinx_pgm_fn pgm; xilinx_init_fn init; xilinx_err_fn err; xilinx_done_fn done; xilinx_clk_fn clk; xilinx_cs_fn cs; xilinx_wr_fn wr; xilinx_rdata_fn rdata; xilinx_wdata_fn wdata; xilinx_busy_fn busy; xilinx_abort_fn abort; xilinx_post_fn post;
d9071ce0a Michal Simek fpga: virtex2: Av...	29	} xilinx_virtex2_slave_selectmap_fns;
c609719b8 wdenk Initial revision	30 31 32	/* Slave Serial Implementation function table */ typedef struct {
2df9d5c43 Michal Simek fpga: xilinx: Fix...	33 34 35 36	xilinx_pgm_fn pgm; xilinx_clk_fn clk; xilinx_rdata_fn rdata; xilinx_wdata_fn wdata;
d9071ce0a Michal Simek fpga: virtex2: Av...	37	} xilinx_virtex2_slave_serial_fns;
c609719b8 wdenk Initial revision	38
6a6acd12a Michal Simek fpga: xilinx: vir...	39 40 41 42 43 44	#if defined(CONFIG_FPGA_VIRTEX2) extern struct xilinx_fpga_op virtex2_op; # define FPGA_VIRTEX2_OPS &virtex2_op #else # define FPGA_VIRTEX2_OPS NULL #endif
c609719b8 wdenk Initial revision	45 46	/* Device Image Sizes (in bytes) *********************************************************************/
a3607365f Michal Simek fpga: xilinx: vir...	47 48 49 50	#define XILINX_XC2V40_SIZE (338208 / 8) #define XILINX_XC2V80_SIZE (597408 / 8) #define XILINX_XC2V250_SIZE (1591584 / 8) #define XILINX_XC2V500_SIZE (2557857 / 8)
c609719b8 wdenk Initial revision	51 52 53 54 55 56 57 58 59 60 61 62	#define XILINX_XC2V1000_SIZE (3749408 / 8) #define XILINX_XC2V1500_SIZE (5166240 / 8) #define XILINX_XC2V2000_SIZE (6808352 / 8) #define XILINX_XC2V3000_SIZE (9589408 / 8) #define XILINX_XC2V4000_SIZE (14220192 / 8) #define XILINX_XC2V6000_SIZE (19752096 / 8) #define XILINX_XC2V8000_SIZE (26185120 / 8) #define XILINX_XC2V10000_SIZE (33519264 / 8) /* Descriptor Macros *********************************************************************/ #define XILINX_XC2V40_DESC(iface, fn_table, cookie) \
6a6acd12a Michal Simek fpga: xilinx: vir...	63 64	{ xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie, \ FPGA_VIRTEX2_OPS }
c609719b8 wdenk Initial revision	65 66	#define XILINX_XC2V80_DESC(iface, fn_table, cookie) \
6a6acd12a Michal Simek fpga: xilinx: vir...	67 68	{ xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie, \ FPGA_VIRTEX2_OPS }
c609719b8 wdenk Initial revision	69 70	#define XILINX_XC2V250_DESC(iface, fn_table, cookie) \
6a6acd12a Michal Simek fpga: xilinx: vir...	71 72	{ xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie, \ FPGA_VIRTEX2_OPS }
c609719b8 wdenk Initial revision	73 74	#define XILINX_XC2V500_DESC(iface, fn_table, cookie) \
6a6acd12a Michal Simek fpga: xilinx: vir...	75 76	{ xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie, \ FPGA_VIRTEX2_OPS }
c609719b8 wdenk Initial revision	77 78	#define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \
6a6acd12a Michal Simek fpga: xilinx: vir...	79 80	{ xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie, \ FPGA_VIRTEX2_OPS }
c609719b8 wdenk Initial revision	81 82	#define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \
6a6acd12a Michal Simek fpga: xilinx: vir...	83 84	{ xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie, \ FPGA_VIRTEX2_OPS }
c609719b8 wdenk Initial revision	85 86	#define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \
6a6acd12a Michal Simek fpga: xilinx: vir...	87 88	{ xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie, \ FPGA_VIRTEX2_OPS }
c609719b8 wdenk Initial revision	89 90	#define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \
6a6acd12a Michal Simek fpga: xilinx: vir...	91 92	{ xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie, \ FPGA_VIRTEX2_OPS }
c609719b8 wdenk Initial revision	93 94	#define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \
6a6acd12a Michal Simek fpga: xilinx: vir...	95 96	{ xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie, \ FPGA_VIRTEX2_OPS }
c609719b8 wdenk Initial revision	97 98	#define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \
6a6acd12a Michal Simek fpga: xilinx: vir...	99 100	{ xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie, \ FPGA_VIRTEX2_OPS }
c609719b8 wdenk Initial revision	101 102	#define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \
6a6acd12a Michal Simek fpga: xilinx: vir...	103 104	{ xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie, \ FPGA_VIRTEX2_OPS }
c609719b8 wdenk Initial revision	105 106	#define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \
6a6acd12a Michal Simek fpga: xilinx: vir...	107 108	{ xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie, \ FPGA_VIRTEX2_OPS }
c609719b8 wdenk Initial revision	109 110	#endif /* _VIRTEX2_H_ */