bedbug.c
29.9 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
/* $Id$ */
#include <common.h>
#if defined(CONFIG_CMD_BEDBUG)
#include <linux/ctype.h>
#include <bedbug/bedbug.h>
#include <bedbug/ppc.h>
#include <bedbug/regs.h>
#include <bedbug/tables.h>
#define Elf32_Word unsigned long
/* USE_SOURCE_CODE enables some symbolic debugging functions of this
code. This is only useful if the program will have access to the
source code for the binary being examined.
*/
/* #define USE_SOURCE_CODE 1 */
#ifdef USE_SOURCE_CODE
extern int line_info_from_addr __P ((Elf32_Word, char *, char *, int *));
extern struct symreflist *symByAddr;
extern char *symbol_name_from_addr __P ((Elf32_Word, int, int *));
#endif /* USE_SOURCE_CODE */
int print_operands __P ((struct ppc_ctx *));
int get_operand_value __P ((struct opcode *, unsigned long,
enum OP_FIELD, unsigned long *));
struct opcode *find_opcode __P ((unsigned long));
struct opcode *find_opcode_by_name __P ((char *));
char *spr_name __P ((int));
int spr_value __P ((char *));
char *tbr_name __P ((int));
int tbr_value __P ((char *));
int parse_operand __P ((unsigned long, struct opcode *,
struct operand *, char *, int *));
int get_word __P ((char **, char *));
long read_number __P ((char *));
int downstring __P ((char *));
/*======================================================================
* Entry point for the PPC disassembler.
*
* Arguments:
* memaddr The address to start disassembling from.
*
* virtual If this value is non-zero, then this will be
* used as the base address for the output and
* symbol lookups. If this value is zero then
* memaddr is used as the absolute address.
*
* num_instr The number of instructions to disassemble. Since
* each instruction is 32 bits long, this can be
* computed if you know the total size of the region.
*
* pfunc The address of a function that is called to print
* each line of output. The function should take a
* single character pointer as its parameters a la puts.
*
* flags Sets options for the output. This is a
* bitwise-inclusive-OR of the following
* values. Note that only one of the radix
* options may be set.
*
* F_RADOCTAL - output radix is unsigned base 8.
* F_RADUDECIMAL - output radix is unsigned base 10.
* F_RADSDECIMAL - output radix is signed base 10.
* F_RADHEX - output radix is unsigned base 16.
* F_SIMPLE - use simplified mnemonics.
* F_SYMBOL - lookup symbols for addresses.
* F_INSTR - output raw instruction.
* F_LINENO - show line # info if available.
*
* Returns TRUE if the area was successfully disassembled or FALSE if
* a problem was encountered with accessing the memory.
*/
int disppc (unsigned char *memaddr, unsigned char *virtual, int num_instr,
int (*pfunc) (const char *), unsigned long flags)
{
int i;
struct ppc_ctx ctx;
#ifdef USE_SOURCE_CODE
int line_no = 0;
int last_line_no = 0;
char funcname[128] = { 0 };
char filename[256] = { 0 };
char last_funcname[128] = { 0 };
int symoffset;
char *symname;
char *cursym = (char *) 0;
#endif /* USE_SOURCE_CODE */
/*------------------------------------------------------------*/
ctx.flags = flags;
ctx.virtual = virtual;
/* Figure out the output radix before we go any further */
if (ctx.flags & F_RADOCTAL) {
/* Unsigned octal output */
strcpy (ctx.radix_fmt, "O%o");
} else if (ctx.flags & F_RADUDECIMAL) {
/* Unsigned decimal output */
strcpy (ctx.radix_fmt, "%u");
} else if (ctx.flags & F_RADSDECIMAL) {
/* Signed decimal output */
strcpy (ctx.radix_fmt, "%d");
} else {
/* Unsigned hex output */
strcpy (ctx.radix_fmt, "0x%x");
}
if (ctx.virtual == 0) {
ctx.virtual = memaddr;
}
#ifdef USE_SOURCE_CODE
if (ctx.flags & F_SYMBOL) {
if (symByAddr == 0) /* no symbols loaded */
ctx.flags &= ~F_SYMBOL;
else {
cursym = (char *) 0;
symoffset = 0;
}
}
#endif /* USE_SOURCE_CODE */
/* format each line as "XXXXXXXX: <symbol> IIIIIIII disassembly" where,
XXXXXXXX is the memory address in hex,
<symbol> is the symbolic location if F_SYMBOL is set.
IIIIIIII is the raw machine code in hex if F_INSTR is set,
and disassembly is the disassembled machine code with numbers
formatted according to the 'radix' parameter */
for (i = 0; i < num_instr; ++i, memaddr += 4, ctx.virtual += 4) {
#ifdef USE_SOURCE_CODE
if (ctx.flags & F_LINENO) {
if ((line_info_from_addr ((Elf32_Word) ctx.virtual, filename,
funcname, &line_no) == TRUE) &&
((line_no != last_line_no) ||
(strcmp (last_funcname, funcname) != 0))) {
print_source_line (filename, funcname, line_no, pfunc);
}
last_line_no = line_no;
strcpy (last_funcname, funcname);
}
#endif /* USE_SOURCE_CODE */
sprintf (ctx.data, "%08lx: ", (unsigned long) ctx.virtual);
ctx.datalen = 10;
#ifdef USE_SOURCE_CODE
if (ctx.flags & F_SYMBOL) {
if ((symname =
symbol_name_from_addr ((Elf32_Word) ctx.virtual,
TRUE, 0)) != 0) {
cursym = symname;
symoffset = 0;
} else {
if ((cursym == 0) &&
((symname =
symbol_name_from_addr ((Elf32_Word) ctx.virtual,
FALSE, &symoffset)) != 0)) {
cursym = symname;
} else {
symoffset += 4;
}
}
if (cursym != 0) {
sprintf (&ctx.data[ctx.datalen], "<%s+", cursym);
ctx.datalen = strlen (ctx.data);
sprintf (&ctx.data[ctx.datalen], ctx.radix_fmt, symoffset);
strcat (ctx.data, ">");
ctx.datalen = strlen (ctx.data);
}
}
#endif /* USE_SOURCE_CODE */
ctx.instr = INSTRUCTION (memaddr);
if (ctx.flags & F_INSTR) {
/* Find the opcode structure for this opcode. If one is not found
then it must be an illegal instruction */
sprintf (&ctx.data[ctx.datalen],
" %02lx %02lx %02lx %02lx ",
((ctx.instr >> 24) & 0xff),
((ctx.instr >> 16) & 0xff), ((ctx.instr >> 8) & 0xff),
(ctx.instr & 0xff));
ctx.datalen += 18;
} else {
strcat (ctx.data, " ");
ctx.datalen += 3;
}
if ((ctx.op = find_opcode (ctx.instr)) == 0) {
/* Illegal Opcode */
sprintf (&ctx.data[ctx.datalen], " .long 0x%08lx",
ctx.instr);
ctx.datalen += 24;
(*pfunc) (ctx.data);
continue;
}
if (((ctx.flags & F_SIMPLE) == 0) ||
(ctx.op->hfunc == 0) || ((*ctx.op->hfunc) (&ctx) == FALSE)) {
sprintf (&ctx.data[ctx.datalen], "%-7s ", ctx.op->name);
ctx.datalen += 8;
print_operands (&ctx);
}
(*pfunc) (ctx.data);
}
return TRUE;
} /* disppc */
/*======================================================================
* Called by the disassembler to print the operands for an instruction.
*
* Arguments:
* ctx A pointer to the disassembler context record.
*
* always returns 0.
*/
int print_operands (struct ppc_ctx *ctx)
{
int open_parens = 0;
int field;
unsigned long operand;
struct operand *opr;
#ifdef USE_SOURCE_CODE
char *symname;
int offset;
#endif /* USE_SOURCE_CODE */
/*------------------------------------------------------------*/
/* Walk through the operands and list each in order */
for (field = 0; ctx->op->fields[field] != 0; ++field) {
if (ctx->op->fields[field] > n_operands) {
continue; /* bad operand ?! */
}
opr = &operands[ctx->op->fields[field] - 1];
if (opr->hint & OH_SILENT) {
continue;
}
if ((field > 0) && !open_parens) {
strcat (ctx->data, ",");
ctx->datalen++;
}
operand = (ctx->instr >> opr->shift) & ((1 << opr->bits) - 1);
if (opr->hint & OH_ADDR) {
if ((operand & (1 << (opr->bits - 1))) != 0) {
operand = operand - (1 << opr->bits);
}
if (ctx->op->hint & H_RELATIVE)
operand = (operand << 2) + (unsigned long) ctx->virtual;
else
operand = (operand << 2);
sprintf (&ctx->data[ctx->datalen], "0x%lx", operand);
ctx->datalen = strlen (ctx->data);
#ifdef USE_SOURCE_CODE
if ((ctx->flags & F_SYMBOL) &&
((symname =
symbol_name_from_addr (operand, 0, &offset)) != 0)) {
sprintf (&ctx->data[ctx->datalen], " <%s", symname);
if (offset != 0) {
strcat (ctx->data, "+");
ctx->datalen = strlen (ctx->data);
sprintf (&ctx->data[ctx->datalen], ctx->radix_fmt,
offset);
}
strcat (ctx->data, ">");
}
#endif /* USE_SOURCE_CODE */
}
else if (opr->hint & OH_REG) {
if ((operand == 0) &&
(opr->field == O_rA) && (ctx->op->hint & H_RA0_IS_0)) {
strcat (ctx->data, "0");
} else {
sprintf (&ctx->data[ctx->datalen], "r%d", (short) operand);
}
if (open_parens) {
strcat (ctx->data, ")");
open_parens--;
}
}
else if (opr->hint & OH_SPR) {
strcat (ctx->data, spr_name (operand));
}
else if (opr->hint & OH_TBR) {
strcat (ctx->data, tbr_name (operand));
}
else if (opr->hint & OH_LITERAL) {
switch (opr->field) {
case O_cr2:
strcat (ctx->data, "cr2");
ctx->datalen += 3;
break;
default:
break;
}
}
else {
sprintf (&ctx->data[ctx->datalen], ctx->radix_fmt,
(unsigned short) operand);
if (open_parens) {
strcat (ctx->data, ")");
open_parens--;
}
else if (opr->hint & OH_OFFSET) {
strcat (ctx->data, "(");
open_parens++;
}
}
ctx->datalen = strlen (ctx->data);
}
return 0;
} /* print_operands */
/*======================================================================
* Called to get the value of an arbitrary operand with in an instruction.
*
* Arguments:
* op The pointer to the opcode structure to which
* the operands belong.
*
* instr The instruction (32 bits) containing the opcode
* and the operands to print. By the time that
* this routine is called the operand has already
* been added to the output.
*
* field The field (operand) to get the value of.
*
* value The address of an unsigned long to be filled in
* with the value of the operand if it is found. This
* will only be filled in if the function returns
* TRUE. This may be passed as 0 if the value is
* not required.
*
* Returns TRUE if the operand was found or FALSE if it was not.
*/
int get_operand_value (struct opcode *op, unsigned long instr,
enum OP_FIELD field, unsigned long *value)
{
int i;
struct operand *opr;
/*------------------------------------------------------------*/
if (field > n_operands) {
return FALSE; /* bad operand ?! */
}
/* Walk through the operands and list each in order */
for (i = 0; op->fields[i] != 0; ++i) {
if (op->fields[i] != field) {
continue;
}
opr = &operands[op->fields[i] - 1];
if (value) {
*value = (instr >> opr->shift) & ((1 << opr->bits) - 1);
}
return TRUE;
}
return FALSE;
} /* operand_value */
/*======================================================================
* Called by the disassembler to match an opcode value to an opcode structure.
*
* Arguments:
* instr The instruction (32 bits) to match. This value
* may contain operand values as well as the opcode
* since they will be masked out anyway for this
* search.
*
* Returns the address of an opcode struct (from the opcode table) if the
* operand successfully matched an entry, or 0 if no match was found.
*/
struct opcode *find_opcode (unsigned long instr)
{
struct opcode *ptr;
int top = 0;
int bottom = n_opcodes - 1;
int idx;
/*------------------------------------------------------------*/
while (top <= bottom) {
idx = (top + bottom) >> 1;
ptr = &opcodes[idx];
if ((instr & ptr->mask) < ptr->opcode) {
bottom = idx - 1;
} else if ((instr & ptr->mask) > ptr->opcode) {
top = idx + 1;
} else {
return ptr;
}
}
return (struct opcode *) 0;
} /* find_opcode */
/*======================================================================
* Called by the assembler to match an opcode name to an opcode structure.
*
* Arguments:
* name The text name of the opcode, e.g. "b", "mtspr", etc.
*
* The opcodes are sorted numerically by their instruction binary code
* so a search for the name cannot use the binary search used by the
* other find routine.
*
* Returns the address of an opcode struct (from the opcode table) if the
* name successfully matched an entry, or 0 if no match was found.
*/
struct opcode *find_opcode_by_name (char *name)
{
int idx;
/*------------------------------------------------------------*/
downstring (name);
for (idx = 0; idx < n_opcodes; ++idx) {
if (!strcmp (name, opcodes[idx].name))
return &opcodes[idx];
}
return (struct opcode *) 0;
} /* find_opcode_by_name */
/*======================================================================
* Convert the 'spr' operand from its numeric value to its symbolic name.
*
* Arguments:
* value The value of the 'spr' operand. This value should
* be unmodified from its encoding in the instruction.
* the split-field computations will be performed
* here before the switch.
*
* Returns the address of a character array containing the name of the
* special purpose register defined by the 'value' parameter, or the
* address of a character array containing "???" if no match was found.
*/
char *spr_name (int value)
{
unsigned short spr;
static char other[10];
int i;
/*------------------------------------------------------------*/
/* spr is a 10 bit field whose interpretation has the high and low
five-bit fields reversed from their encoding in the operand */
spr = ((value >> 5) & 0x1f) | ((value & 0x1f) << 5);
for (i = 0; i < n_sprs; ++i) {
if (spr == spr_map[i].spr_val)
return spr_map[i].spr_name;
}
sprintf (other, "%d", spr);
return other;
} /* spr_name */
/*======================================================================
* Convert the 'spr' operand from its symbolic name to its numeric value
*
* Arguments:
* name The symbolic name of the 'spr' operand. The
* split-field encoding will be done by this routine.
* NOTE: name can be a number.
*
* Returns the numeric value for the spr appropriate for encoding a machine
* instruction. Returns 0 if unable to find the SPR.
*/
int spr_value (char *name)
{
struct spr_info *sprp;
int spr;
int i;
/*------------------------------------------------------------*/
if (!name || !*name)
return 0;
if (isdigit ((int) name[0])) {
i = htonl (read_number (name));
spr = ((i >> 5) & 0x1f) | ((i & 0x1f) << 5);
return spr;
}
downstring (name);
for (i = 0; i < n_sprs; ++i) {
sprp = &spr_map[i];
if (strcmp (name, sprp->spr_name) == 0) {
/* spr is a 10 bit field whose interpretation has the high and low
five-bit fields reversed from their encoding in the operand */
i = htonl (sprp->spr_val);
spr = ((i >> 5) & 0x1f) | ((i & 0x1f) << 5);
return spr;
}
}
return 0;
} /* spr_value */
/*======================================================================
* Convert the 'tbr' operand from its numeric value to its symbolic name.
*
* Arguments:
* value The value of the 'tbr' operand. This value should
* be unmodified from its encoding in the instruction.
* the split-field computations will be performed
* here before the switch.
*
* Returns the address of a character array containing the name of the
* time base register defined by the 'value' parameter, or the address
* of a character array containing "???" if no match was found.
*/
char *tbr_name (int value)
{
unsigned short tbr;
/*------------------------------------------------------------*/
/* tbr is a 10 bit field whose interpretation has the high and low
five-bit fields reversed from their encoding in the operand */
tbr = ((value >> 5) & 0x1f) | ((value & 0x1f) << 5);
if (tbr == 268)
return "TBL";
else if (tbr == 269)
return "TBU";
return "???";
} /* tbr_name */
/*======================================================================
* Convert the 'tbr' operand from its symbolic name to its numeric value.
*
* Arguments:
* name The symbolic name of the 'tbr' operand. The
* split-field encoding will be done by this routine.
*
* Returns the numeric value for the spr appropriate for encoding a machine
* instruction. Returns 0 if unable to find the TBR.
*/
int tbr_value (char *name)
{
int tbr;
int val;
/*------------------------------------------------------------*/
if (!name || !*name)
return 0;
downstring (name);
if (isdigit ((int) name[0])) {
val = read_number (name);
if (val != 268 && val != 269)
return 0;
} else if (strcmp (name, "tbl") == 0)
val = 268;
else if (strcmp (name, "tbu") == 0)
val = 269;
else
return 0;
/* tbr is a 10 bit field whose interpretation has the high and low
five-bit fields reversed from their encoding in the operand */
val = htonl (val);
tbr = ((val >> 5) & 0x1f) | ((val & 0x1f) << 5);
return tbr;
} /* tbr_name */
/*======================================================================
* The next several functions (handle_xxx) are the routines that handle
* disassembling the opcodes with simplified mnemonics.
*
* Arguments:
* ctx A pointer to the disassembler context record.
*
* Returns TRUE if the simpler form was printed or FALSE if it was not.
*/
int handle_bc (struct ppc_ctx *ctx)
{
unsigned long bo;
unsigned long bi;
static struct opcode blt = { B_OPCODE (16, 0, 0), B_MASK, {O_BD, 0},
0, "blt", H_RELATIVE
};
static struct opcode bne =
{ B_OPCODE (16, 0, 0), B_MASK, {O_cr2, O_BD, 0},
0, "bne", H_RELATIVE
};
static struct opcode bdnz = { B_OPCODE (16, 0, 0), B_MASK, {O_BD, 0},
0, "bdnz", H_RELATIVE
};
/*------------------------------------------------------------*/
if (get_operand_value (ctx->op, ctx->instr, O_BO, &bo) == FALSE)
return FALSE;
if (get_operand_value (ctx->op, ctx->instr, O_BI, &bi) == FALSE)
return FALSE;
if ((bo == 12) && (bi == 0)) {
ctx->op = &blt;
sprintf (&ctx->data[ctx->datalen], "%-7s ", ctx->op->name);
ctx->datalen += 8;
print_operands (ctx);
return TRUE;
} else if ((bo == 4) && (bi == 10)) {
ctx->op = =⃥
sprintf (&ctx->data[ctx->datalen], "%-7s ", ctx->op->name);
ctx->datalen += 8;
print_operands (ctx);
return TRUE;
} else if ((bo == 16) && (bi == 0)) {
ctx->op = &bdnz;
sprintf (&ctx->data[ctx->datalen], "%-7s ", ctx->op->name);
ctx->datalen += 8;
print_operands (ctx);
return TRUE;
}
return FALSE;
} /* handle_blt */
/*======================================================================
* Outputs source line information for the disassembler. This should
* be modified in the future to lookup the actual line of source code
* from the file, but for now this will do.
*
* Arguments:
* filename The address of a character array containing the
* absolute path and file name of the source file.
*
* funcname The address of a character array containing the
* name of the function (not C++ demangled (yet))
* to which this code belongs.
*
* line_no An integer specifying the source line number that
* generated this code.
*
* pfunc The address of a function to call to print the output.
*
*
* Returns TRUE if it was able to output the line info, or false if it was
* not.
*/
int print_source_line (char *filename, char *funcname,
int line_no, int (*pfunc) (const char *))
{
char out_buf[256];
/*------------------------------------------------------------*/
(*pfunc) (""); /* output a newline */
sprintf (out_buf, "%s %s(): line %d", filename, funcname, line_no);
(*pfunc) (out_buf);
return TRUE;
} /* print_source_line */
/*======================================================================
* Entry point for the PPC assembler.
*
* Arguments:
* asm_buf An array of characters containing the assembly opcode
* and operands to convert to a POWERPC machine
* instruction.
*
* Returns the machine instruction or zero.
*/
unsigned long asmppc (unsigned long memaddr, char *asm_buf, int *err)
{
struct opcode *opc;
struct operand *oper[MAX_OPERANDS];
unsigned long instr;
unsigned long param;
char *ptr = asm_buf;
char scratch[20];
int i;
int w_operands = 0; /* wanted # of operands */
int n_operands = 0; /* # of operands read */
int asm_debug = 0;
/*------------------------------------------------------------*/
if (err)
*err = 0;
if (get_word (&ptr, scratch) == 0)
return 0;
/* Lookup the opcode structure based on the opcode name */
if ((opc = find_opcode_by_name (scratch)) == (struct opcode *) 0) {
if (err)
*err = E_ASM_BAD_OPCODE;
return 0;
}
if (asm_debug) {
printf ("asmppc: Opcode = \"%s\"\n", opc->name);
}
for (i = 0; i < 8; ++i) {
if (opc->fields[i] == 0)
break;
++w_operands;
}
if (asm_debug) {
printf ("asmppc: Expecting %d operands\n", w_operands);
}
instr = opc->opcode;
/* read each operand */
while (n_operands < w_operands) {
oper[n_operands] = &operands[opc->fields[n_operands] - 1];
if (oper[n_operands]->hint & OH_SILENT) {
/* Skip silent operands, they are covered in opc->opcode */
if (asm_debug) {
printf ("asmppc: Operand %d \"%s\" SILENT\n", n_operands,
oper[n_operands]->name);
}
++n_operands;
continue;
}
if (get_word (&ptr, scratch) == 0)
break;
if (asm_debug) {
printf ("asmppc: Operand %d \"%s\" : \"%s\"\n", n_operands,
oper[n_operands]->name, scratch);
}
if ((param = parse_operand (memaddr, opc, oper[n_operands],
scratch, err)) == -1)
return 0;
instr |= param;
++n_operands;
}
if (n_operands < w_operands) {
if (err)
*err = E_ASM_NUM_OPERANDS;
return 0;
}
if (asm_debug) {
printf ("asmppc: Instruction = 0x%08lx\n", instr);
}
return instr;
} /* asmppc */
/*======================================================================
* Called by the assembler to interpret a single operand
*
* Arguments:
* ctx A pointer to the disassembler context record.
*
* Returns 0 if the operand is ok, or -1 if it is bad.
*/
int parse_operand (unsigned long memaddr, struct opcode *opc,
struct operand *oper, char *txt, int *err)
{
long data;
long mask;
int is_neg = 0;
/*------------------------------------------------------------*/
mask = (1 << oper->bits) - 1;
if (oper->hint & OH_ADDR) {
data = read_number (txt);
if (opc->hint & H_RELATIVE)
data = data - memaddr;
if (data < 0)
is_neg = 1;
data >>= 2;
data &= (mask >> 1);
if (is_neg)
data |= 1 << (oper->bits - 1);
}
else if (oper->hint & OH_REG) {
if (txt[0] == 'r' || txt[0] == 'R')
txt++;
else if (txt[0] == '%' && (txt[1] == 'r' || txt[1] == 'R'))
txt += 2;
data = read_number (txt);
if (data > 31) {
if (err)
*err = E_ASM_BAD_REGISTER;
return -1;
}
data = htonl (data);
}
else if (oper->hint & OH_SPR) {
if ((data = spr_value (txt)) == 0) {
if (err)
*err = E_ASM_BAD_SPR;
return -1;
}
}
else if (oper->hint & OH_TBR) {
if ((data = tbr_value (txt)) == 0) {
if (err)
*err = E_ASM_BAD_TBR;
return -1;
}
}
else {
data = htonl (read_number (txt));
}
return (data & mask) << oper->shift;
} /* parse_operand */
char *asm_error_str (int err)
{
switch (err) {
case E_ASM_BAD_OPCODE:
return "Bad opcode";
case E_ASM_NUM_OPERANDS:
return "Bad number of operands";
case E_ASM_BAD_REGISTER:
return "Bad register number";
case E_ASM_BAD_SPR:
return "Bad SPR name or number";
case E_ASM_BAD_TBR:
return "Bad TBR name or number";
}
return "";
} /* asm_error_str */
/*======================================================================
* Copy a word from one buffer to another, ignores leading white spaces.
*
* Arguments:
* src The address of a character pointer to the
* source buffer.
* dest A pointer to a character buffer to write the word
* into.
*
* Returns the number of non-white space characters copied, or zero.
*/
int get_word (char **src, char *dest)
{
char *ptr = *src;
int nchars = 0;
/*------------------------------------------------------------*/
/* Eat white spaces */
while (*ptr && isblank (*ptr))
ptr++;
if (*ptr == 0) {
*src = ptr;
return 0;
}
/* Find the text of the word */
while (*ptr && !isblank (*ptr) && (*ptr != ','))
dest[nchars++] = *ptr++;
ptr = (*ptr == ',') ? ptr + 1 : ptr;
dest[nchars] = 0;
*src = ptr;
return nchars;
} /* get_word */
/*======================================================================
* Convert a numeric string to a number, be aware of base notations.
*
* Arguments:
* txt The numeric string.
*
* Returns the converted numeric value.
*/
long read_number (char *txt)
{
long val;
int is_neg = 0;
/*------------------------------------------------------------*/
if (txt == 0 || *txt == 0)
return 0;
if (*txt == '-') {
is_neg = 1;
++txt;
}
if (txt[0] == '0' && (txt[1] == 'x' || txt[1] == 'X')) /* hex */
val = simple_strtoul (&txt[2], NULL, 16);
else /* decimal */
val = simple_strtoul (txt, NULL, 10);
if (is_neg)
val = -val;
return val;
} /* read_number */
int downstring (char *s)
{
if (!s || !*s)
return 0;
while (*s) {
if (isupper (*s))
*s = tolower (*s);
s++;
}
return 0;
} /* downstring */
/*======================================================================
* Examines the instruction at the current address and determines the
* next address to be executed. This will take into account branches
* of different types so that a "step" and "next" operations can be
* supported.
*
* Arguments:
* nextaddr The address (to be filled in) of the next
* instruction to execute. This will only be a valid
* address if TRUE is returned.
*
* step_over A flag indicating how to compute addresses for
* branch statements:
* TRUE = Step over the branch (next)
* FALSE = step into the branch (step)
*
* Returns TRUE if it was able to compute the address. Returns FALSE if
* it has a problem reading the current instruction or one of the registers.
*/
int find_next_address (unsigned char *nextaddr, int step_over,
struct pt_regs *regs)
{
unsigned long pc; /* SRR0 register from PPC */
unsigned long ctr; /* CTR register from PPC */
unsigned long cr; /* CR register from PPC */
unsigned long lr; /* LR register from PPC */
unsigned long instr; /* instruction at SRR0 */
unsigned long next; /* computed instruction for 'next' */
unsigned long step; /* computed instruction for 'step' */
unsigned long addr = 0; /* target address operand */
unsigned long aa = 0; /* AA operand */
unsigned long lk = 0; /* LK operand */
unsigned long bo = 0; /* BO operand */
unsigned long bi = 0; /* BI operand */
struct opcode *op = 0; /* opcode structure for 'instr' */
int ctr_ok = 0;
int cond_ok = 0;
int conditional = 0;
int branch = 0;
/*------------------------------------------------------------*/
if (nextaddr == 0 || regs == 0) {
printf ("find_next_address: bad args");
return FALSE;
}
pc = regs->nip & 0xfffffffc;
instr = INSTRUCTION (pc);
if ((op = find_opcode (instr)) == (struct opcode *) 0) {
printf ("find_next_address: can't parse opcode 0x%lx", instr);
return FALSE;
}
ctr = regs->ctr;
cr = regs->ccr;
lr = regs->link;
switch (op->opcode) {
case B_OPCODE (16, 0, 0): /* bc */
case B_OPCODE (16, 0, 1): /* bcl */
case B_OPCODE (16, 1, 0): /* bca */
case B_OPCODE (16, 1, 1): /* bcla */
if (!get_operand_value (op, instr, O_BD, &addr) ||
!get_operand_value (op, instr, O_BO, &bo) ||
!get_operand_value (op, instr, O_BI, &bi) ||
!get_operand_value (op, instr, O_AA, &aa) ||
!get_operand_value (op, instr, O_LK, &lk))
return FALSE;
if ((addr & (1 << 13)) != 0)
addr = addr - (1 << 14);
addr <<= 2;
conditional = 1;
branch = 1;
break;
case I_OPCODE (18, 0, 0): /* b */
case I_OPCODE (18, 0, 1): /* bl */
case I_OPCODE (18, 1, 0): /* ba */
case I_OPCODE (18, 1, 1): /* bla */
if (!get_operand_value (op, instr, O_LI, &addr) ||
!get_operand_value (op, instr, O_AA, &aa) ||
!get_operand_value (op, instr, O_LK, &lk))
return FALSE;
if ((addr & (1 << 23)) != 0)
addr = addr - (1 << 24);
addr <<= 2;
conditional = 0;
branch = 1;
break;
case XL_OPCODE (19, 528, 0): /* bcctr */
case XL_OPCODE (19, 528, 1): /* bcctrl */
if (!get_operand_value (op, instr, O_BO, &bo) ||
!get_operand_value (op, instr, O_BI, &bi) ||
!get_operand_value (op, instr, O_LK, &lk))
return FALSE;
addr = ctr;
aa = 1;
conditional = 1;
branch = 1;
break;
case XL_OPCODE (19, 16, 0): /* bclr */
case XL_OPCODE (19, 16, 1): /* bclrl */
if (!get_operand_value (op, instr, O_BO, &bo) ||
!get_operand_value (op, instr, O_BI, &bi) ||
!get_operand_value (op, instr, O_LK, &lk))
return FALSE;
addr = lr;
aa = 1;
conditional = 1;
branch = 1;
break;
default:
conditional = 0;
branch = 0;
break;
}
if (conditional) {
switch ((bo & 0x1e) >> 1) {
case 0: /* 0000y */
if (--ctr != 0)
ctr_ok = 1;
cond_ok = !(cr & (1 << (31 - bi)));
break;
case 1: /* 0001y */
if (--ctr == 0)
ctr_ok = 1;
cond_ok = !(cr & (1 << (31 - bi)));
break;
case 2: /* 001zy */
ctr_ok = 1;
cond_ok = !(cr & (1 << (31 - bi)));
break;
case 4: /* 0100y */
if (--ctr != 0)
ctr_ok = 1;
cond_ok = cr & (1 << (31 - bi));
break;
case 5: /* 0101y */
if (--ctr == 0)
ctr_ok = 1;
cond_ok = cr & (1 << (31 - bi));
break;
case 6: /* 011zy */
ctr_ok = 1;
cond_ok = cr & (1 << (31 - bi));
break;
case 8: /* 1z00y */
if (--ctr != 0)
ctr_ok = cond_ok = 1;
break;
case 9: /* 1z01y */
if (--ctr == 0)
ctr_ok = cond_ok = 1;
break;
case 10: /* 1z1zz */
ctr_ok = cond_ok = 1;
break;
}
}
if (branch && (!conditional || (ctr_ok && cond_ok))) {
if (aa)
step = addr;
else
step = addr + pc;
if (lk)
next = pc + 4;
else
next = step;
} else {
step = next = pc + 4;
}
if (step_over == TRUE)
*(unsigned long *) nextaddr = next;
else
*(unsigned long *) nextaddr = step;
return TRUE;
} /* find_next_address */
/*
* Copyright (c) 2000 William L. Pitts and W. Gerald Hicks
* All rights reserved.
*
* Redistribution and use in source and binary forms are freely
* permitted provided that the above copyright notice and this
* paragraph and the following disclaimer are duplicated in all
* such forms.
*
* This software is provided "AS IS" and without any express or
* implied warranties, including, without limitation, the implied
* warranties of merchantability and fitness for a particular
* purpose.
*/
#endif