imx7ulp-10x10-arm2.dts
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/*
* Copyright 2016 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "imx7ulp.dtsi"
/ {
model = "NXP i.MX7ULP 10x10 arm2";
compatible = "fsl,imx7ulp-10x10-arm2", "fsl,imx7ulp", "Generic DT based system";
chosen {
bootargs = "console=ttyLP0,115200 earlycon=lpuart32,0x40A60000,115200";
stdout-path = &lpuart6;
};
memory {
device_type = "memory";
reg = <0x60000000 0x40000000>;
};
};
&iomuxc1 {
pinctrl-names = "default";
imx7ulp-10x10-arm2 {
pinctrl_lpuart6: lpuart6grp {
fsl,pins = <
IMX7ULP_PAD_PTE11__LPUART6_RX 0x400
IMX7ULP_PAD_PTE10__LPUART6_TX 0x400
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
IMX7ULP_PAD_PTE3__SDHC1_CMD 0x843
IMX7ULP_PAD_PTE2__SDHC1_CLK 0x843
IMX7ULP_PAD_PTE4__SDHC1_D3 0x843
IMX7ULP_PAD_PTE5__SDHC1_D2 0x843
IMX7ULP_PAD_PTE0__SDHC1_D1 0x843
IMX7ULP_PAD_PTE1__SDHC1_D0 0x843
>;
};
pinctrl_qspi1_1: qspi1grp_1 {
fsl,pins = <
IMX7ULP_PAD_PTB14__QSPIA_SS1_B 0x43 /* SS1 */
IMX7ULP_PAD_PTB8__QSPIA_SS0_B 0x43 /* SS0 */
IMX7ULP_PAD_PTB15__QSPIA_SCLK 0x43 /* SCLK */
IMX7ULP_PAD_PTB16__QSPIA_DATA3 0x43 /* D3 */
IMX7ULP_PAD_PTB17__QSPIA_DATA2 0x43 /* D2 */
IMX7ULP_PAD_PTB18__QSPIA_DATA1 0x43 /* D1 */
IMX7ULP_PAD_PTB19__QSPIA_DATA0 0x43 /* D0 */
IMX7ULP_PAD_PTB5__PTB5 0x20003
>;
};
};
};
&lpuart6 { /* console */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpuart6>;
status = "okay";
};
&usdhc1 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1>;
non-removable;
status = "okay";
};
&qspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi1_1>;
status = "okay";
flash0: n25q512ax3@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q512ax3", "jedec,spi-nor";
spi-max-frequency = <29000000>;
};
};