exynos4.dtsi
3.9 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
/*
* Samsung's Exynos4 SoC common device tree source
*
* Copyright (c) 2014 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include "skeleton.dtsi"
/ {
aliases {
i2c0 = &i2c_0;
i2c1 = &i2c_1;
i2c2 = &i2c_2;
i2c3 = &i2c_3;
i2c4 = &i2c_4;
i2c5 = &i2c_5;
i2c6 = &i2c_6;
i2c7 = &i2c_7;
};
combiner: interrupt-controller@10440000 {
compatible = "samsung,exynos4210-combiner";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0x10440000 0x1000>;
};
gic: interrupt-controller@10490000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
cpu-offset = <0x4000>;
reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
};
serial_0: serial@13800000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13800000 0x3c>;
id = <0>;
};
serail_1: serial@13810000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13810000 0x3c>;
id = <1>;
};
serial_2: serial@13820000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13820000 0x3c>;
id = <2>;
};
serial_3: serial@13830000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13830000 0x3c>;
id = <3>;
};
serial_4: serial@13840000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13840000 0x3c>;
id = <4>;
};
i2c_0: i2c@13860000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x13860000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 56 0>;
};
i2c_1: i2c@13870000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x13870000 0x100>;
interrupt-parent = <&gic>;
interrupts = <1 57 0>;
};
i2c_2: i2c@13880000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x13880000 0x100>;
interrupt-parent = <&gic>;
interrupts = <2 58 0>;
};
i2c_3: i2c@13890000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x13890000 0x100>;
interrupt-parent = <&gic>;
interrupts = <3 59 0>;
};
i2c_4: i2c@138a0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x138a0000 0x100>;
interrupt-parent = <&gic>;
interrupts = <4 60 0>;
};
i2c_5: i2c@138b0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x138b0000 0x100>;
interrupt-parent = <&gic>;
interrupts = <5 61 0>;
};
i2c_6: i2c@138c0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x138c0000 0x100>;
interrupt-parent = <&gic>;
interrupts = <6 62 0>;
};
i2c_7: i2c@138d0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x138d0000 0x100>;
interrupt-parent = <&gic>;
interrupts = <7 63 0>;
};
sdhci0: sdhci@12510000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,exynos4412-sdhci";
reg = <0x12510000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 75 0>;
status = "disabled";
};
sdhci1: sdhci@12520000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,exynos4412-sdhci";
reg = <0x12520000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 76 0>;
status = "disabled";
};
sdhci2: sdhci@12530000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,exynos4412-sdhci";
reg = <0x12530000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 77 0>;
status = "disabled";
};
sdhci3: sdhci@12540000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,exynos4412-sdhci";
reg = <0x12540000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 78 0>;
status = "disabled";
};
mshc_0: dwmmc@12550000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,exynos4412-dw-mshc";
reg = <0x12550000 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 131 0>;
status = "disabled";
};
};