imx6dl-smarcfimx6.dts 2.41 KB
/*
 * Copyright (C) 2013-2015 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/dts-v1/;

#include "imx6dl.dtsi"
#include "imx6qdl-smarcfimx6.dtsi"

/ {
	model = "Freescale i.MX6 Solo/DualLite SMARC-FiMX6 CPU Board";
	compatible = "fsl,imx6dl-smarcfimx6", "fsl,imx6dl";
};

&battery {
	offset-charger = <1485>;
	offset-discharger = <1464>;
	offset-usb-charger = <1285>;
};

&iomuxc {
        epdc {
                pinctrl_epdc_0: epdcgrp-0 {
                        fsl,pins = <
                                MX6QDL_PAD_EIM_A16__EPDC_DATA00    0x80000000
                                MX6QDL_PAD_EIM_DA10__EPDC_DATA01   0x80000000
                                MX6QDL_PAD_EIM_DA12__EPDC_DATA02   0x80000000
                                MX6QDL_PAD_EIM_DA11__EPDC_DATA03   0x80000000
                                MX6QDL_PAD_EIM_LBA__EPDC_DATA04    0x80000000
                                MX6QDL_PAD_EIM_EB2__EPDC_DATA05    0x80000000
                                MX6QDL_PAD_EIM_CS0__EPDC_DATA06    0x80000000
                                MX6QDL_PAD_EIM_RW__EPDC_DATA07     0x80000000
                                MX6QDL_PAD_EIM_A21__EPDC_GDCLK     0x80000000
                                MX6QDL_PAD_EIM_A22__EPDC_GDSP      0x80000000
                                MX6QDL_PAD_EIM_A23__EPDC_GDOE      0x80000000
                                MX6QDL_PAD_EIM_A24__EPDC_GDRL      0x80000000
                                MX6QDL_PAD_EIM_D31__EPDC_SDCLK_P   0x80000000
                                MX6QDL_PAD_EIM_D27__EPDC_SDOE      0x80000000
                                MX6QDL_PAD_EIM_DA1__EPDC_SDLE      0x80000000
                                MX6QDL_PAD_EIM_EB1__EPDC_SDSHR     0x80000000
                                MX6QDL_PAD_EIM_DA2__EPDC_BDR0      0x80000000
                                MX6QDL_PAD_EIM_DA4__EPDC_SDCE0     0x80000000
                                MX6QDL_PAD_EIM_DA5__EPDC_SDCE1     0x80000000
                                MX6QDL_PAD_EIM_DA6__EPDC_SDCE2     0x80000000
                        >;
                };
        };
};

&ldb {
	lvds-channel@0 {
		crtc = "ipu1-di0";
	};

	lvds-channel@1 {
		crtc = "ipu1-di1";
	};
};

&mxcfb1 {
	status = "okay";
};

&mxcfb2 {
	status = "okay";
};

&pxp {
	status = "okay";
};