fsl-ls1046a-qds.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* Device Tree Include file for Freescale Layerscape-1046A family SoC.
*
* Copyright (C) 2016, Freescale Semiconductor
*
* Mingkai Hu <Mingkai.hu@nxp.com>
*/
/include/ "fsl-ls1046a.dtsi"
/ {
model = "LS1046A QDS Board";
aliases {
spi0 = &qspi;
spi1 = &dspi0;
};
};
&dspi0 {
bus-num = <0>;
status = "okay";
dflash0: n25q128a {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <1000000>; /* input clock */
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash1: sst25wf040b {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <3500000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash2: en25s64 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <3500000>;
spi-cpol;
spi-cpha;
reg = <2>;
};
};
&qspi {
bus-num = <0>;
status = "okay";
qflash0: s25fl128s@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;
};
};
&duart0 {
status = "okay";
};
&duart1 {
status = "okay";
};
&lpuart0 {
status = "okay";
};
&sata {
status = "okay";
};
&i2c0 {
status = "okay";
};