Change core clock to 1.2GHz in the configurations for SD and NAND boot.
Signed-off-by: Yuan Yao Reviewed-by: York Sun
#PBL preamble and RCW header aa55aa55 01ee0100 # serdes protocol 0608000c 00000000 00000000 00000000 60000000 00407900 e0106a00 21046000 00000000 00000000 00000000 00038000 00000000 001b7200 00000000 00000000
