exynos5420-peach-pit.dts 5.46 KB
/*
 * SAMSUNG/GOOGLE Peach-Pit board device tree source
 *
 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/dts-v1/;
/include/ "exynos54xx.dtsi"

/ {
	model = "Samsung/Google Peach Pit board based on Exynos5420";

	compatible = "google,pit-rev#", "google,pit",
		"google,peach", "samsung,exynos5420", "samsung,exynos5";

	config {
		google,bad-wake-gpios = <&gpio 0x56 0>; /* gpx0-6 */
		hwid = "PIT TEST A-A 7848";
		lazy-init = <1>;
	};

	aliases {
		serial0 = "/serial@12C30000";
		console = "/serial@12C30000";
		pmic = "/i2c@12ca0000";
	};

	cros-ec-keyb {
		compatible = "google,cros-ec-keyb";
		google,key-rows = <8>;
		google,key-columns = <13>;
		google,repeat-delay-ms = <240>;
		google,repeat-rate-ms = <30>;
		google,ghost-filter;
		/*
		 * Keymap entries take the form of 0xRRCCKKKK where
		 * RR=Row CC=Column KKKK=Key Code
		 * The values below are for a US keyboard layout and
		 * are taken from the Linux driver. Note that the
		 * 102ND key is not used for US keyboards.
		 */
		linux,keymap = <
			/* CAPSLCK F1         B          F10     */
			0x0001003a 0x0002003b 0x00030030 0x00040044
			/* N       =          R_ALT      ESC     */
			0x00060031 0x0008000d 0x000a0064 0x01010001
			/* F4      G          F7         H       */
			0x0102003e 0x01030022 0x01040041 0x01060023
			/* '       F9         BKSPACE    L_CTRL  */
			0x01080028 0x01090043 0x010b000e 0x0200001d
			/* TAB     F3         T          F6      */
			0x0201000f 0x0202003d 0x02030014 0x02040040
			/* ]       Y          102ND      [       */
			0x0205001b 0x02060015 0x02070056 0x0208001a
			/* F8      GRAVE      F2         5       */
			0x02090042 0x03010029 0x0302003c 0x03030006
			/* F5      6          -          \       */
			0x0304003f 0x03060007 0x0308000c 0x030b002b
			/* R_CTRL  A          D          F       */
			0x04000061 0x0401001e 0x04020020 0x04030021
			/* S       K          J          ;       */
			0x0404001f 0x04050025 0x04060024 0x04080027
			/* L       ENTER      Z          C       */
			0x04090026 0x040b001c 0x0501002c 0x0502002e
			/* V       X          ,          M       */
			0x0503002f 0x0504002d 0x05050033 0x05060032
			/* L_SHIFT /          .          SPACE   */
			0x0507002a 0x05080035 0x05090034 0x050B0039
			/* 1       3          4          2       */
			0x06010002 0x06020004 0x06030005 0x06040003
			/* 8       7          0          9       */
			0x06050009 0x06060008 0x0608000b 0x0609000a
			/* L_ALT   DOWN       RIGHT      Q       */
			0x060a0038 0x060b006c 0x060c006a 0x07010010
			/* E       R          W          I       */
			0x07020012 0x07030013 0x07040011 0x07050017
			/* U       R_SHIFT    P          O       */
			0x07060016 0x07070036 0x07080019 0x07090018
			/* UP      LEFT    */
			0x070b0067 0x070c0069>;
	};

	dmc {
		mem-manuf = "samsung";
		mem-type = "ddr3";
		clock-frequency = <800000000>;
		arm-frequency = <900000000>;
	};

	tmu@10060000 {
		samsung,min-temp	= <25>;
		samsung,max-temp	= <125>;
		samsung,start-warning	= <95>;
		samsung,start-tripping	= <105>;
		samsung,hw-tripping	= <110>;
		samsung,efuse-min-value	= <40>;
		samsung,efuse-value	= <55>;
		samsung,efuse-max-value	= <100>;
		samsung,slope		= <274761730>;
		samsung,dc-value	= <25>;
	};

	/* MAX77802 is on i2c bus 4 */
	i2c@12ca0000 {
		clock-frequency = <400000>;
		power-regulator@9 {
			compatible = "maxim,max77802-pmic";
			reg = <0x9>;
		};
	};

	i2c@12cd0000 { /* i2c7 */
		clock-frequency = <100000>;
	       soundcodec@20 {
	              reg = <0x20>;
	              compatible = "maxim,max98090-codec";
	       };

	        edp-lvds-bridge@48 {
	                compatible = "parade,ps8625";
	                reg = <0x48>;
	        };
	};

        sound@3830000 {
                samsung,codec-type = "max98090";
        };

	i2c@12e10000 { /* i2c9 */
		clock-frequency = <400000>;
                tpm@20 {
                        compatible = "infineon,slb9645-tpm";
                        reg = <0x20>;
		};
	};

	spi@12d30000 { /* spi1 */
		spi-max-frequency = <50000000>;
		firmware_storage_spi: flash@0 {
			reg = <0>;

			/*
			 * A region for the kernel to store a panic event
			 * which the firmware will add to the log.
			*/
			elog-panic-event-offset = <0x01e00000 0x100000>;

			elog-shrink-size = <0x400>;
			elog-full-threshold = <0xc00>;
		};
	};

	spi@12d40000 { /* spi2 */
		spi-max-frequency = <4000000>;
		spi-deactivate-delay = <200>;
		cros-ec@0 {
			reg = <0>;
			compatible = "google,cros-ec";
			spi-half-duplex;
			spi-max-timeout-ms = <1100>;
			spi-frame-header = <0xec>;
			ec-interrupt = <&gpio 93 1>; /* GPX1_5 */

			/*
			 * This describes the flash memory within the EC. Note
			 * that the STM32L flash erases to 0, not 0xff.
			 */
			#address-cells = <1>;
			#size-cells = <1>;
			flash@8000000 {
				reg = <0x08000000 0x20000>;
				erase-value = <0>;
			};
		};
	};

	xhci@12000000 {
		samsung,vbus-gpio = <&gpio 0x40 0>; /* H00 */
	};

	xhci@12400000 {
		samsung,vbus-gpio = <&gpio 0x41 0>; /* H01 */
	};

	fimd@14400000 {
		samsung,vl-freq = <60>;
		samsung,vl-col = <1366>;
		samsung,vl-row = <768>;
		samsung,vl-width = <1366>;
		samsung,vl-height = <768>;

		samsung,vl-clkp;
		samsung,vl-dp;
		samsung,vl-bpix = <4>;

		samsung,vl-hspw = <32>;
		samsung,vl-hbpd = <40>;
		samsung,vl-hfpd = <40>;
		samsung,vl-vspw = <6>;
		samsung,vl-vbpd = <10>;
		samsung,vl-vfpd = <12>;
		samsung,vl-cmd-allow-len = <0xf>;

		samsung,winid = <3>;
		samsung,interface-mode = <1>;
		samsung,dp-enabled = <1>;
		samsung,dual-lcd-enabled = <0>;
	};
};