Commit 04451ba347385ee598e485c3406712819a847459
Committed by
Stefano Babic
1 parent
510922ac61
Exists in
v2017.01-smarct4x
and in
40 other branches
mx6sabre_common: Add HDMI config to common code
HDMI config options can be placed into the common mx6sabre_common.h file to avoid duplication. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Showing 3 changed files with 17 additions and 34 deletions Inline Diff
include/configs/mx6qsabreauto.h
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2012 Freescale Semiconductor, Inc. | 2 | * Copyright (C) 2012 Freescale Semiconductor, Inc. |
| 3 | * | 3 | * |
| 4 | * Configuration settings for the Freescale i.MX6Q SabreAuto board. | 4 | * Configuration settings for the Freescale i.MX6Q SabreAuto board. |
| 5 | * | 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ | 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| 9 | #ifndef __MX6QSABREAUTO_CONFIG_H | 9 | #ifndef __MX6QSABREAUTO_CONFIG_H |
| 10 | #define __MX6QSABREAUTO_CONFIG_H | 10 | #define __MX6QSABREAUTO_CONFIG_H |
| 11 | 11 | ||
| 12 | #define CONFIG_MACH_TYPE 3529 | 12 | #define CONFIG_MACH_TYPE 3529 |
| 13 | #define CONFIG_MXC_UART_BASE UART4_BASE | 13 | #define CONFIG_MXC_UART_BASE UART4_BASE |
| 14 | #define CONFIG_CONSOLE_DEV "ttymxc3" | 14 | #define CONFIG_CONSOLE_DEV "ttymxc3" |
| 15 | #if defined CONFIG_MX6Q | 15 | #if defined CONFIG_MX6Q |
| 16 | #define CONFIG_DEFAULT_FDT_FILE "imx6q-sabreauto.dtb" | 16 | #define CONFIG_DEFAULT_FDT_FILE "imx6q-sabreauto.dtb" |
| 17 | #elif defined CONFIG_MX6DL | 17 | #elif defined CONFIG_MX6DL |
| 18 | #define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabreauto.dtb" | 18 | #define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabreauto.dtb" |
| 19 | #endif | 19 | #endif |
| 20 | #define CONFIG_MMCROOT "/dev/mmcblk0p2" | 20 | #define CONFIG_MMCROOT "/dev/mmcblk0p2" |
| 21 | #define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024) | 21 | #define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024) |
| 22 | 22 | ||
| 23 | /* USB Configs */ | 23 | /* USB Configs */ |
| 24 | #define CONFIG_CMD_USB | 24 | #define CONFIG_CMD_USB |
| 25 | #define CONFIG_USB_EHCI | 25 | #define CONFIG_USB_EHCI |
| 26 | #define CONFIG_USB_EHCI_MX6 | 26 | #define CONFIG_USB_EHCI_MX6 |
| 27 | #define CONFIG_USB_STORAGE | 27 | #define CONFIG_USB_STORAGE |
| 28 | #define CONFIG_USB_HOST_ETHER | 28 | #define CONFIG_USB_HOST_ETHER |
| 29 | #define CONFIG_USB_ETHER_ASIX | 29 | #define CONFIG_USB_ETHER_ASIX |
| 30 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 | 30 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
| 31 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ | 31 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ |
| 32 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | 32 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
| 33 | #define CONFIG_MXC_USB_FLAGS 0 | 33 | #define CONFIG_MXC_USB_FLAGS 0 |
| 34 | 34 | ||
| 35 | #include "mx6sabre_common.h" | 35 | #include "mx6sabre_common.h" |
| 36 | 36 | ||
| 37 | #define CONFIG_SYS_FSL_USDHC_NUM 2 | 37 | #define CONFIG_SYS_FSL_USDHC_NUM 2 |
| 38 | #if defined(CONFIG_ENV_IS_IN_MMC) | 38 | #if defined(CONFIG_ENV_IS_IN_MMC) |
| 39 | #define CONFIG_SYS_MMC_ENV_DEV 0 | 39 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
| 40 | #endif | 40 | #endif |
| 41 | 41 | ||
| 42 | /* I2C Configs */ | 42 | /* I2C Configs */ |
| 43 | #define CONFIG_CMD_I2C | 43 | #define CONFIG_CMD_I2C |
| 44 | #define CONFIG_SYS_I2C | 44 | #define CONFIG_SYS_I2C |
| 45 | #define CONFIG_SYS_I2C_MXC | 45 | #define CONFIG_SYS_I2C_MXC |
| 46 | #define CONFIG_SYS_I2C_SPEED 100000 | 46 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 47 | 47 | ||
| 48 | /* Framebuffer */ | ||
| 49 | #define CONFIG_VIDEO | ||
| 50 | #define CONFIG_VIDEO_IPUV3 | ||
| 51 | #define CONFIG_CFB_CONSOLE | ||
| 52 | #define CONFIG_VGA_AS_SINGLE_DEVICE | ||
| 53 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | ||
| 54 | #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE | ||
| 55 | #define CONFIG_VIDEO_BMP_RLE8 | ||
| 56 | #define CONFIG_SPLASH_SCREEN | ||
| 57 | #define CONFIG_SPLASH_SCREEN_ALIGN | ||
| 58 | #define CONFIG_BMP_16BPP | ||
| 59 | #define CONFIG_VIDEO_LOGO | ||
| 60 | #define CONFIG_VIDEO_BMP_LOGO | ||
| 61 | #define CONFIG_IPUV3_CLK 260000000 | ||
| 62 | #define CONFIG_IMX_HDMI | ||
| 63 | #define CONFIG_IMX_VIDEO_SKIP | ||
| 64 | |||
| 65 | #endif /* __MX6QSABREAUTO_CONFIG_H */ | 48 | #endif /* __MX6QSABREAUTO_CONFIG_H */ |
| 66 | 49 |
include/configs/mx6sabre_common.h
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2012 Freescale Semiconductor, Inc. | 2 | * Copyright (C) 2012 Freescale Semiconductor, Inc. |
| 3 | * | 3 | * |
| 4 | * Configuration settings for the Freescale i.MX6Q SabreSD board. | 4 | * Configuration settings for the Freescale i.MX6Q SabreSD board. |
| 5 | * | 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ | 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| 9 | #ifndef __MX6QSABRE_COMMON_CONFIG_H | 9 | #ifndef __MX6QSABRE_COMMON_CONFIG_H |
| 10 | #define __MX6QSABRE_COMMON_CONFIG_H | 10 | #define __MX6QSABRE_COMMON_CONFIG_H |
| 11 | 11 | ||
| 12 | #define CONFIG_MX6 | 12 | #define CONFIG_MX6 |
| 13 | 13 | ||
| 14 | #include "mx6_common.h" | 14 | #include "mx6_common.h" |
| 15 | #include <linux/sizes.h> | 15 | #include <linux/sizes.h> |
| 16 | 16 | ||
| 17 | #define CONFIG_DISPLAY_CPUINFO | 17 | #define CONFIG_DISPLAY_CPUINFO |
| 18 | #define CONFIG_DISPLAY_BOARDINFO | 18 | #define CONFIG_DISPLAY_BOARDINFO |
| 19 | 19 | ||
| 20 | #include <asm/arch/imx-regs.h> | 20 | #include <asm/arch/imx-regs.h> |
| 21 | #include <asm/imx-common/gpio.h> | 21 | #include <asm/imx-common/gpio.h> |
| 22 | 22 | ||
| 23 | #define CONFIG_CMDLINE_TAG | 23 | #define CONFIG_CMDLINE_TAG |
| 24 | #define CONFIG_SETUP_MEMORY_TAGS | 24 | #define CONFIG_SETUP_MEMORY_TAGS |
| 25 | #define CONFIG_INITRD_TAG | 25 | #define CONFIG_INITRD_TAG |
| 26 | #define CONFIG_REVISION_TAG | 26 | #define CONFIG_REVISION_TAG |
| 27 | 27 | ||
| 28 | #define CONFIG_SYS_GENERIC_BOARD | 28 | #define CONFIG_SYS_GENERIC_BOARD |
| 29 | 29 | ||
| 30 | /* Size of malloc() pool */ | 30 | /* Size of malloc() pool */ |
| 31 | #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) | 31 | #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) |
| 32 | 32 | ||
| 33 | #define CONFIG_BOARD_EARLY_INIT_F | 33 | #define CONFIG_BOARD_EARLY_INIT_F |
| 34 | #define CONFIG_BOARD_LATE_INIT | 34 | #define CONFIG_BOARD_LATE_INIT |
| 35 | #define CONFIG_MXC_GPIO | 35 | #define CONFIG_MXC_GPIO |
| 36 | 36 | ||
| 37 | #define CONFIG_MXC_UART | 37 | #define CONFIG_MXC_UART |
| 38 | 38 | ||
| 39 | #define CONFIG_CMD_FUSE | 39 | #define CONFIG_CMD_FUSE |
| 40 | #ifdef CONFIG_CMD_FUSE | 40 | #ifdef CONFIG_CMD_FUSE |
| 41 | #define CONFIG_MXC_OCOTP | 41 | #define CONFIG_MXC_OCOTP |
| 42 | #endif | 42 | #endif |
| 43 | 43 | ||
| 44 | /* MMC Configs */ | 44 | /* MMC Configs */ |
| 45 | #define CONFIG_FSL_ESDHC | 45 | #define CONFIG_FSL_ESDHC |
| 46 | #define CONFIG_FSL_USDHC | 46 | #define CONFIG_FSL_USDHC |
| 47 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | 47 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
| 48 | 48 | ||
| 49 | #define CONFIG_MMC | 49 | #define CONFIG_MMC |
| 50 | #define CONFIG_CMD_MMC | 50 | #define CONFIG_CMD_MMC |
| 51 | #define CONFIG_GENERIC_MMC | 51 | #define CONFIG_GENERIC_MMC |
| 52 | #define CONFIG_BOUNCE_BUFFER | 52 | #define CONFIG_BOUNCE_BUFFER |
| 53 | #define CONFIG_CMD_EXT2 | 53 | #define CONFIG_CMD_EXT2 |
| 54 | #define CONFIG_CMD_FAT | 54 | #define CONFIG_CMD_FAT |
| 55 | #define CONFIG_DOS_PARTITION | 55 | #define CONFIG_DOS_PARTITION |
| 56 | 56 | ||
| 57 | #define CONFIG_CMD_PING | 57 | #define CONFIG_CMD_PING |
| 58 | #define CONFIG_CMD_DHCP | 58 | #define CONFIG_CMD_DHCP |
| 59 | #define CONFIG_CMD_MII | 59 | #define CONFIG_CMD_MII |
| 60 | #define CONFIG_CMD_NET | 60 | #define CONFIG_CMD_NET |
| 61 | #define CONFIG_FEC_MXC | 61 | #define CONFIG_FEC_MXC |
| 62 | #define CONFIG_MII | 62 | #define CONFIG_MII |
| 63 | #define IMX_FEC_BASE ENET_BASE_ADDR | 63 | #define IMX_FEC_BASE ENET_BASE_ADDR |
| 64 | #define CONFIG_FEC_XCV_TYPE RGMII | 64 | #define CONFIG_FEC_XCV_TYPE RGMII |
| 65 | #define CONFIG_ETHPRIME "FEC" | 65 | #define CONFIG_ETHPRIME "FEC" |
| 66 | #define CONFIG_FEC_MXC_PHYADDR 1 | 66 | #define CONFIG_FEC_MXC_PHYADDR 1 |
| 67 | 67 | ||
| 68 | #define CONFIG_PHYLIB | 68 | #define CONFIG_PHYLIB |
| 69 | #define CONFIG_PHY_ATHEROS | 69 | #define CONFIG_PHY_ATHEROS |
| 70 | 70 | ||
| 71 | #define CONFIG_CMD_SF | 71 | #define CONFIG_CMD_SF |
| 72 | #ifdef CONFIG_CMD_SF | 72 | #ifdef CONFIG_CMD_SF |
| 73 | #define CONFIG_SPI_FLASH | 73 | #define CONFIG_SPI_FLASH |
| 74 | #define CONFIG_SPI_FLASH_STMICRO | 74 | #define CONFIG_SPI_FLASH_STMICRO |
| 75 | #define CONFIG_MXC_SPI | 75 | #define CONFIG_MXC_SPI |
| 76 | #define CONFIG_SF_DEFAULT_BUS 0 | 76 | #define CONFIG_SF_DEFAULT_BUS 0 |
| 77 | #define CONFIG_SF_DEFAULT_CS 0 | 77 | #define CONFIG_SF_DEFAULT_CS 0 |
| 78 | #define CONFIG_SF_DEFAULT_SPEED 20000000 | 78 | #define CONFIG_SF_DEFAULT_SPEED 20000000 |
| 79 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 | 79 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 |
| 80 | #endif | 80 | #endif |
| 81 | 81 | ||
| 82 | /* allow to overwrite serial and ethaddr */ | 82 | /* allow to overwrite serial and ethaddr */ |
| 83 | #define CONFIG_ENV_OVERWRITE | 83 | #define CONFIG_ENV_OVERWRITE |
| 84 | #define CONFIG_CONS_INDEX 1 | 84 | #define CONFIG_CONS_INDEX 1 |
| 85 | #define CONFIG_BAUDRATE 115200 | 85 | #define CONFIG_BAUDRATE 115200 |
| 86 | 86 | ||
| 87 | /* Command definition */ | 87 | /* Command definition */ |
| 88 | #include <config_cmd_default.h> | 88 | #include <config_cmd_default.h> |
| 89 | 89 | ||
| 90 | #define CONFIG_CMD_BMODE | 90 | #define CONFIG_CMD_BMODE |
| 91 | #define CONFIG_CMD_BOOTZ | 91 | #define CONFIG_CMD_BOOTZ |
| 92 | #define CONFIG_CMD_SETEXPR | 92 | #define CONFIG_CMD_SETEXPR |
| 93 | #undef CONFIG_CMD_IMLS | 93 | #undef CONFIG_CMD_IMLS |
| 94 | 94 | ||
| 95 | #define CONFIG_BOOTDELAY 1 | 95 | #define CONFIG_BOOTDELAY 1 |
| 96 | 96 | ||
| 97 | #define CONFIG_LOADADDR 0x12000000 | 97 | #define CONFIG_LOADADDR 0x12000000 |
| 98 | #define CONFIG_SYS_TEXT_BASE 0x17800000 | 98 | #define CONFIG_SYS_TEXT_BASE 0x17800000 |
| 99 | 99 | ||
| 100 | #ifdef CONFIG_SUPPORT_EMMC_BOOT | 100 | #ifdef CONFIG_SUPPORT_EMMC_BOOT |
| 101 | #define EMMC_ENV \ | 101 | #define EMMC_ENV \ |
| 102 | "emmcdev=2\0" \ | 102 | "emmcdev=2\0" \ |
| 103 | "update_emmc_firmware=" \ | 103 | "update_emmc_firmware=" \ |
| 104 | "if test ${ip_dyn} = yes; then " \ | 104 | "if test ${ip_dyn} = yes; then " \ |
| 105 | "setenv get_cmd dhcp; " \ | 105 | "setenv get_cmd dhcp; " \ |
| 106 | "else " \ | 106 | "else " \ |
| 107 | "setenv get_cmd tftp; " \ | 107 | "setenv get_cmd tftp; " \ |
| 108 | "fi; " \ | 108 | "fi; " \ |
| 109 | "if ${get_cmd} ${update_sd_firmware_filename}; then " \ | 109 | "if ${get_cmd} ${update_sd_firmware_filename}; then " \ |
| 110 | "if mmc dev ${emmcdev} && " \ | 110 | "if mmc dev ${emmcdev} && " \ |
| 111 | "mmc open ${emmcdev} 1; then " \ | 111 | "mmc open ${emmcdev} 1; then " \ |
| 112 | "setexpr fw_sz ${filesize} / 0x200; " \ | 112 | "setexpr fw_sz ${filesize} / 0x200; " \ |
| 113 | "setexpr fw_sz ${fw_sz} + 1; " \ | 113 | "setexpr fw_sz ${fw_sz} + 1; " \ |
| 114 | "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ | 114 | "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ |
| 115 | "mmc close ${emmcdev} 1; " \ | 115 | "mmc close ${emmcdev} 1; " \ |
| 116 | "fi; " \ | 116 | "fi; " \ |
| 117 | "fi\0" | 117 | "fi\0" |
| 118 | #else | 118 | #else |
| 119 | #define EMMC_ENV "" | 119 | #define EMMC_ENV "" |
| 120 | #endif | 120 | #endif |
| 121 | 121 | ||
| 122 | #define CONFIG_EXTRA_ENV_SETTINGS \ | 122 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 123 | "script=boot.scr\0" \ | 123 | "script=boot.scr\0" \ |
| 124 | "image=zImage\0" \ | 124 | "image=zImage\0" \ |
| 125 | "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ | 125 | "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ |
| 126 | "fdt_addr=0x18000000\0" \ | 126 | "fdt_addr=0x18000000\0" \ |
| 127 | "boot_fdt=try\0" \ | 127 | "boot_fdt=try\0" \ |
| 128 | "ip_dyn=yes\0" \ | 128 | "ip_dyn=yes\0" \ |
| 129 | "console=" CONFIG_CONSOLE_DEV "\0" \ | 129 | "console=" CONFIG_CONSOLE_DEV "\0" \ |
| 130 | "fdt_high=0xffffffff\0" \ | 130 | "fdt_high=0xffffffff\0" \ |
| 131 | "initrd_high=0xffffffff\0" \ | 131 | "initrd_high=0xffffffff\0" \ |
| 132 | "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ | 132 | "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ |
| 133 | "mmcpart=1\0" \ | 133 | "mmcpart=1\0" \ |
| 134 | "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ | 134 | "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ |
| 135 | "update_sd_firmware=" \ | 135 | "update_sd_firmware=" \ |
| 136 | "if test ${ip_dyn} = yes; then " \ | 136 | "if test ${ip_dyn} = yes; then " \ |
| 137 | "setenv get_cmd dhcp; " \ | 137 | "setenv get_cmd dhcp; " \ |
| 138 | "else " \ | 138 | "else " \ |
| 139 | "setenv get_cmd tftp; " \ | 139 | "setenv get_cmd tftp; " \ |
| 140 | "fi; " \ | 140 | "fi; " \ |
| 141 | "if mmc dev ${mmcdev}; then " \ | 141 | "if mmc dev ${mmcdev}; then " \ |
| 142 | "if ${get_cmd} ${update_sd_firmware_filename}; then " \ | 142 | "if ${get_cmd} ${update_sd_firmware_filename}; then " \ |
| 143 | "setexpr fw_sz ${filesize} / 0x200; " \ | 143 | "setexpr fw_sz ${filesize} / 0x200; " \ |
| 144 | "setexpr fw_sz ${fw_sz} + 1; " \ | 144 | "setexpr fw_sz ${fw_sz} + 1; " \ |
| 145 | "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ | 145 | "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ |
| 146 | "fi; " \ | 146 | "fi; " \ |
| 147 | "fi\0" \ | 147 | "fi\0" \ |
| 148 | EMMC_ENV \ | 148 | EMMC_ENV \ |
| 149 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ | 149 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ |
| 150 | "root=${mmcroot}\0" \ | 150 | "root=${mmcroot}\0" \ |
| 151 | "loadbootscript=" \ | 151 | "loadbootscript=" \ |
| 152 | "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | 152 | "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ |
| 153 | "bootscript=echo Running bootscript from mmc ...; " \ | 153 | "bootscript=echo Running bootscript from mmc ...; " \ |
| 154 | "source\0" \ | 154 | "source\0" \ |
| 155 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ | 155 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ |
| 156 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ | 156 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ |
| 157 | "mmcboot=echo Booting from mmc ...; " \ | 157 | "mmcboot=echo Booting from mmc ...; " \ |
| 158 | "run mmcargs; " \ | 158 | "run mmcargs; " \ |
| 159 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | 159 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
| 160 | "if run loadfdt; then " \ | 160 | "if run loadfdt; then " \ |
| 161 | "bootz ${loadaddr} - ${fdt_addr}; " \ | 161 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
| 162 | "else " \ | 162 | "else " \ |
| 163 | "if test ${boot_fdt} = try; then " \ | 163 | "if test ${boot_fdt} = try; then " \ |
| 164 | "bootz; " \ | 164 | "bootz; " \ |
| 165 | "else " \ | 165 | "else " \ |
| 166 | "echo WARN: Cannot load the DT; " \ | 166 | "echo WARN: Cannot load the DT; " \ |
| 167 | "fi; " \ | 167 | "fi; " \ |
| 168 | "fi; " \ | 168 | "fi; " \ |
| 169 | "else " \ | 169 | "else " \ |
| 170 | "bootz; " \ | 170 | "bootz; " \ |
| 171 | "fi;\0" \ | 171 | "fi;\0" \ |
| 172 | "netargs=setenv bootargs console=${console},${baudrate} " \ | 172 | "netargs=setenv bootargs console=${console},${baudrate} " \ |
| 173 | "root=/dev/nfs " \ | 173 | "root=/dev/nfs " \ |
| 174 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ | 174 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ |
| 175 | "netboot=echo Booting from net ...; " \ | 175 | "netboot=echo Booting from net ...; " \ |
| 176 | "run netargs; " \ | 176 | "run netargs; " \ |
| 177 | "if test ${ip_dyn} = yes; then " \ | 177 | "if test ${ip_dyn} = yes; then " \ |
| 178 | "setenv get_cmd dhcp; " \ | 178 | "setenv get_cmd dhcp; " \ |
| 179 | "else " \ | 179 | "else " \ |
| 180 | "setenv get_cmd tftp; " \ | 180 | "setenv get_cmd tftp; " \ |
| 181 | "fi; " \ | 181 | "fi; " \ |
| 182 | "${get_cmd} ${image}; " \ | 182 | "${get_cmd} ${image}; " \ |
| 183 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | 183 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
| 184 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ | 184 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ |
| 185 | "bootz ${loadaddr} - ${fdt_addr}; " \ | 185 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
| 186 | "else " \ | 186 | "else " \ |
| 187 | "if test ${boot_fdt} = try; then " \ | 187 | "if test ${boot_fdt} = try; then " \ |
| 188 | "bootz; " \ | 188 | "bootz; " \ |
| 189 | "else " \ | 189 | "else " \ |
| 190 | "echo WARN: Cannot load the DT; " \ | 190 | "echo WARN: Cannot load the DT; " \ |
| 191 | "fi; " \ | 191 | "fi; " \ |
| 192 | "fi; " \ | 192 | "fi; " \ |
| 193 | "else " \ | 193 | "else " \ |
| 194 | "bootz; " \ | 194 | "bootz; " \ |
| 195 | "fi;\0" | 195 | "fi;\0" |
| 196 | 196 | ||
| 197 | #define CONFIG_BOOTCOMMAND \ | 197 | #define CONFIG_BOOTCOMMAND \ |
| 198 | "mmc dev ${mmcdev};" \ | 198 | "mmc dev ${mmcdev};" \ |
| 199 | "if mmc rescan; then " \ | 199 | "if mmc rescan; then " \ |
| 200 | "if run loadbootscript; then " \ | 200 | "if run loadbootscript; then " \ |
| 201 | "run bootscript; " \ | 201 | "run bootscript; " \ |
| 202 | "else " \ | 202 | "else " \ |
| 203 | "if run loadimage; then " \ | 203 | "if run loadimage; then " \ |
| 204 | "run mmcboot; " \ | 204 | "run mmcboot; " \ |
| 205 | "else run netboot; " \ | 205 | "else run netboot; " \ |
| 206 | "fi; " \ | 206 | "fi; " \ |
| 207 | "fi; " \ | 207 | "fi; " \ |
| 208 | "else run netboot; fi" | 208 | "else run netboot; fi" |
| 209 | 209 | ||
| 210 | #define CONFIG_ARP_TIMEOUT 200UL | 210 | #define CONFIG_ARP_TIMEOUT 200UL |
| 211 | 211 | ||
| 212 | /* Miscellaneous configurable options */ | 212 | /* Miscellaneous configurable options */ |
| 213 | #define CONFIG_SYS_LONGHELP | 213 | #define CONFIG_SYS_LONGHELP |
| 214 | #define CONFIG_SYS_HUSH_PARSER | 214 | #define CONFIG_SYS_HUSH_PARSER |
| 215 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | 215 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
| 216 | #define CONFIG_AUTO_COMPLETE | 216 | #define CONFIG_AUTO_COMPLETE |
| 217 | #define CONFIG_SYS_CBSIZE 256 | 217 | #define CONFIG_SYS_CBSIZE 256 |
| 218 | 218 | ||
| 219 | /* Print Buffer Size */ | 219 | /* Print Buffer Size */ |
| 220 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | 220 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| 221 | #define CONFIG_SYS_MAXARGS 16 | 221 | #define CONFIG_SYS_MAXARGS 16 |
| 222 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | 222 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| 223 | 223 | ||
| 224 | #define CONFIG_SYS_MEMTEST_START 0x10000000 | 224 | #define CONFIG_SYS_MEMTEST_START 0x10000000 |
| 225 | #define CONFIG_SYS_MEMTEST_END 0x10010000 | 225 | #define CONFIG_SYS_MEMTEST_END 0x10010000 |
| 226 | #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 | 226 | #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 |
| 227 | 227 | ||
| 228 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | 228 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| 229 | 229 | ||
| 230 | #define CONFIG_CMDLINE_EDITING | 230 | #define CONFIG_CMDLINE_EDITING |
| 231 | #define CONFIG_STACKSIZE (128 * 1024) | 231 | #define CONFIG_STACKSIZE (128 * 1024) |
| 232 | 232 | ||
| 233 | /* Physical Memory Map */ | 233 | /* Physical Memory Map */ |
| 234 | #define CONFIG_NR_DRAM_BANKS 1 | 234 | #define CONFIG_NR_DRAM_BANKS 1 |
| 235 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR | 235 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
| 236 | 236 | ||
| 237 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | 237 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| 238 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | 238 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| 239 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | 239 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| 240 | 240 | ||
| 241 | #define CONFIG_SYS_INIT_SP_OFFSET \ | 241 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 242 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | 242 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 243 | #define CONFIG_SYS_INIT_SP_ADDR \ | 243 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 244 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | 244 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 245 | 245 | ||
| 246 | /* FLASH and environment organization */ | 246 | /* FLASH and environment organization */ |
| 247 | #define CONFIG_SYS_NO_FLASH | 247 | #define CONFIG_SYS_NO_FLASH |
| 248 | 248 | ||
| 249 | #define CONFIG_ENV_SIZE (8 * 1024) | 249 | #define CONFIG_ENV_SIZE (8 * 1024) |
| 250 | 250 | ||
| 251 | #define CONFIG_ENV_IS_IN_MMC | 251 | #define CONFIG_ENV_IS_IN_MMC |
| 252 | 252 | ||
| 253 | #if defined(CONFIG_ENV_IS_IN_MMC) | 253 | #if defined(CONFIG_ENV_IS_IN_MMC) |
| 254 | #define CONFIG_ENV_OFFSET (6 * 64 * 1024) | 254 | #define CONFIG_ENV_OFFSET (6 * 64 * 1024) |
| 255 | #endif | 255 | #endif |
| 256 | 256 | ||
| 257 | #define CONFIG_OF_LIBFDT | 257 | #define CONFIG_OF_LIBFDT |
| 258 | 258 | ||
| 259 | #ifndef CONFIG_SYS_DCACHE_OFF | 259 | #ifndef CONFIG_SYS_DCACHE_OFF |
| 260 | #define CONFIG_CMD_CACHE | 260 | #define CONFIG_CMD_CACHE |
| 261 | #endif | 261 | #endif |
| 262 | 262 | ||
| 263 | /* Framebuffer */ | ||
| 264 | #define CONFIG_VIDEO | ||
| 265 | #define CONFIG_VIDEO_IPUV3 | ||
| 266 | #define CONFIG_CFB_CONSOLE | ||
| 267 | #define CONFIG_VGA_AS_SINGLE_DEVICE | ||
| 268 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | ||
| 269 | #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE | ||
| 270 | #define CONFIG_VIDEO_BMP_RLE8 | ||
| 271 | #define CONFIG_SPLASH_SCREEN | ||
| 272 | #define CONFIG_SPLASH_SCREEN_ALIGN | ||
| 273 | #define CONFIG_BMP_16BPP | ||
| 274 | #define CONFIG_VIDEO_LOGO | ||
| 275 | #define CONFIG_VIDEO_BMP_LOGO | ||
| 276 | #define CONFIG_IPUV3_CLK 260000000 | ||
| 277 | #define CONFIG_IMX_HDMI | ||
| 278 | #define CONFIG_IMX_VIDEO_SKIP | ||
| 279 | |||
| 263 | #endif /* __MX6QSABRE_COMMON_CONFIG_H */ | 280 | #endif /* __MX6QSABRE_COMMON_CONFIG_H */ |
| 264 | 281 |
include/configs/mx6sabresd.h
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2012 Freescale Semiconductor, Inc. | 2 | * Copyright (C) 2012 Freescale Semiconductor, Inc. |
| 3 | * | 3 | * |
| 4 | * Configuration settings for the Freescale i.MX6Q SabreSD board. | 4 | * Configuration settings for the Freescale i.MX6Q SabreSD board. |
| 5 | * | 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ | 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| 9 | #ifndef __MX6QSABRESD_CONFIG_H | 9 | #ifndef __MX6QSABRESD_CONFIG_H |
| 10 | #define __MX6QSABRESD_CONFIG_H | 10 | #define __MX6QSABRESD_CONFIG_H |
| 11 | 11 | ||
| 12 | #include <asm/arch/imx-regs.h> | 12 | #include <asm/arch/imx-regs.h> |
| 13 | #include <asm/imx-common/gpio.h> | 13 | #include <asm/imx-common/gpio.h> |
| 14 | 14 | ||
| 15 | #define CONFIG_MACH_TYPE 3980 | 15 | #define CONFIG_MACH_TYPE 3980 |
| 16 | #define CONFIG_MXC_UART_BASE UART1_BASE | 16 | #define CONFIG_MXC_UART_BASE UART1_BASE |
| 17 | #define CONFIG_CONSOLE_DEV "ttymxc0" | 17 | #define CONFIG_CONSOLE_DEV "ttymxc0" |
| 18 | #define CONFIG_MMCROOT "/dev/mmcblk1p2" | 18 | #define CONFIG_MMCROOT "/dev/mmcblk1p2" |
| 19 | #if defined(CONFIG_MX6Q) | 19 | #if defined(CONFIG_MX6Q) |
| 20 | #define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb" | 20 | #define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb" |
| 21 | #elif defined(CONFIG_MX6DL) | 21 | #elif defined(CONFIG_MX6DL) |
| 22 | #define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabresd.dtb" | 22 | #define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabresd.dtb" |
| 23 | #endif | 23 | #endif |
| 24 | #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) | 24 | #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) |
| 25 | 25 | ||
| 26 | #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ | 26 | #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ |
| 27 | 27 | ||
| 28 | #include "mx6sabre_common.h" | 28 | #include "mx6sabre_common.h" |
| 29 | 29 | ||
| 30 | #define CONFIG_SYS_FSL_USDHC_NUM 3 | 30 | #define CONFIG_SYS_FSL_USDHC_NUM 3 |
| 31 | #if defined(CONFIG_ENV_IS_IN_MMC) | 31 | #if defined(CONFIG_ENV_IS_IN_MMC) |
| 32 | #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */ | 32 | #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */ |
| 33 | #endif | 33 | #endif |
| 34 | 34 | ||
| 35 | /* Framebuffer */ | ||
| 36 | #define CONFIG_VIDEO | ||
| 37 | #define CONFIG_VIDEO_IPUV3 | ||
| 38 | #define CONFIG_CFB_CONSOLE | ||
| 39 | #define CONFIG_VGA_AS_SINGLE_DEVICE | ||
| 40 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | ||
| 41 | #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE | ||
| 42 | #define CONFIG_VIDEO_BMP_RLE8 | ||
| 43 | #define CONFIG_SPLASH_SCREEN | ||
| 44 | #define CONFIG_SPLASH_SCREEN_ALIGN | ||
| 45 | #define CONFIG_BMP_16BPP | ||
| 46 | #define CONFIG_VIDEO_LOGO | ||
| 47 | #define CONFIG_VIDEO_BMP_LOGO | ||
| 48 | #define CONFIG_IPUV3_CLK 260000000 | ||
| 49 | #define CONFIG_IMX_HDMI | ||
| 50 | #define CONFIG_IMX_VIDEO_SKIP | ||
| 51 | |||
| 52 | #define CONFIG_CMD_PCI | 35 | #define CONFIG_CMD_PCI |
| 53 | #ifdef CONFIG_CMD_PCI | 36 | #ifdef CONFIG_CMD_PCI |
| 54 | #define CONFIG_PCI | 37 | #define CONFIG_PCI |
| 55 | #define CONFIG_PCI_PNP | 38 | #define CONFIG_PCI_PNP |
| 56 | #define CONFIG_PCI_SCAN_SHOW | 39 | #define CONFIG_PCI_SCAN_SHOW |
| 57 | #define CONFIG_PCIE_IMX | 40 | #define CONFIG_PCIE_IMX |
| 58 | #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) | 41 | #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) |
| 59 | #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) | 42 | #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) |
| 60 | #endif | 43 | #endif |
| 61 | 44 | ||
| 62 | /* I2C Configs */ | 45 | /* I2C Configs */ |
| 63 | #define CONFIG_CMD_I2C | 46 | #define CONFIG_CMD_I2C |
| 64 | #define CONFIG_SYS_I2C | 47 | #define CONFIG_SYS_I2C |
| 65 | #define CONFIG_SYS_I2C_MXC | 48 | #define CONFIG_SYS_I2C_MXC |
| 66 | #define CONFIG_SYS_I2C_SPEED 100000 | 49 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 67 | 50 | ||
| 68 | /* PMIC */ | 51 | /* PMIC */ |
| 69 | #define CONFIG_POWER | 52 | #define CONFIG_POWER |
| 70 | #define CONFIG_POWER_I2C | 53 | #define CONFIG_POWER_I2C |
| 71 | #define CONFIG_POWER_PFUZE100 | 54 | #define CONFIG_POWER_PFUZE100 |
| 72 | #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 | 55 | #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 |
| 73 | 56 | ||
| 74 | #endif /* __MX6QSABRESD_CONFIG_H */ | 57 | #endif /* __MX6QSABRESD_CONFIG_H */ |
| 75 | 58 |