Commit 05e1ff938e920aad33b9738dbf7ff11dc9aaf448
Committed by
Priyanka Jain
1 parent
cd04930907
Exists in
smarc_8mq_lf_v2020.04
and in
4 other branches
configs: ls1012a: enable CONFIG_MPC8XXX_GPIO
Enable CONFIG_MPC8XXX_GPIO for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com>
Showing 1 changed file with 10 additions and 0 deletions Inline Diff
include/configs/ls1012a_common.h
1 | /* SPDX-License-Identifier: GPL-2.0+ */ | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* | 2 | /* |
3 | * Copyright 2016 Freescale Semiconductor | 3 | * Copyright 2016 Freescale Semiconductor |
4 | */ | 4 | */ |
5 | 5 | ||
6 | #ifndef __LS1012A_COMMON_H | 6 | #ifndef __LS1012A_COMMON_H |
7 | #define __LS1012A_COMMON_H | 7 | #define __LS1012A_COMMON_H |
8 | 8 | ||
9 | #define CONFIG_GICV2 | 9 | #define CONFIG_GICV2 |
10 | 10 | ||
11 | #include <asm/arch/config.h> | 11 | #include <asm/arch/config.h> |
12 | #include <asm/arch/stream_id_lsch2.h> | 12 | #include <asm/arch/stream_id_lsch2.h> |
13 | #include <linux/sizes.h> | 13 | #include <linux/sizes.h> |
14 | 14 | ||
15 | #define CONFIG_SYS_CLK_FREQ 125000000 | 15 | #define CONFIG_SYS_CLK_FREQ 125000000 |
16 | 16 | ||
17 | #define CONFIG_SKIP_LOWLEVEL_INIT | 17 | #define CONFIG_SKIP_LOWLEVEL_INIT |
18 | 18 | ||
19 | #define CONFIG_ENV_OVERWRITE | 19 | #define CONFIG_ENV_OVERWRITE |
20 | 20 | ||
21 | #ifdef CONFIG_TFABOOT | 21 | #ifdef CONFIG_TFABOOT |
22 | #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE | 22 | #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE |
23 | #else | 23 | #else |
24 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) | 24 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) |
25 | #endif | 25 | #endif |
26 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000) | 26 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000) |
27 | 27 | ||
28 | #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 | 28 | #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 |
29 | #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 | 29 | #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 |
30 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE | 30 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE |
31 | #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL | 31 | #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL |
32 | 32 | ||
33 | /* Generic Timer Definitions */ | 33 | /* Generic Timer Definitions */ |
34 | #define COUNTER_FREQUENCY 25000000 /* 25MHz */ | 34 | #define COUNTER_FREQUENCY 25000000 /* 25MHz */ |
35 | 35 | ||
36 | /* CSU */ | 36 | /* CSU */ |
37 | #define CONFIG_LAYERSCAPE_NS_ACCESS | 37 | #define CONFIG_LAYERSCAPE_NS_ACCESS |
38 | 38 | ||
39 | /* Size of malloc() pool */ | 39 | /* Size of malloc() pool */ |
40 | #define CONFIG_SYS_MALLOC_LEN (5 * SZ_1M) | 40 | #define CONFIG_SYS_MALLOC_LEN (5 * SZ_1M) |
41 | 41 | ||
42 | /* PFE */ | 42 | /* PFE */ |
43 | #define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000 | 43 | #define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000 |
44 | #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x300000 | 44 | #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x300000 |
45 | 45 | ||
46 | /*SPI device */ | 46 | /*SPI device */ |
47 | #define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 | 47 | #define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 |
48 | 48 | ||
49 | /* SATA */ | 49 | /* SATA */ |
50 | #define CONFIG_SCSI_AHCI_PLAT | 50 | #define CONFIG_SCSI_AHCI_PLAT |
51 | 51 | ||
52 | #define CONFIG_SYS_SATA AHCI_BASE_ADDR | 52 | #define CONFIG_SYS_SATA AHCI_BASE_ADDR |
53 | 53 | ||
54 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 | 54 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 |
55 | #define CONFIG_SYS_SCSI_MAX_LUN 1 | 55 | #define CONFIG_SYS_SCSI_MAX_LUN 1 |
56 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ | 56 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ |
57 | CONFIG_SYS_SCSI_MAX_LUN) | 57 | CONFIG_SYS_SCSI_MAX_LUN) |
58 | 58 | ||
59 | /* I2C */ | 59 | /* I2C */ |
60 | #ifndef CONFIG_DM_I2C | 60 | #ifndef CONFIG_DM_I2C |
61 | #define CONFIG_SYS_I2C | 61 | #define CONFIG_SYS_I2C |
62 | #else | 62 | #else |
63 | #define CONFIG_I2C_SET_DEFAULT_BUS_NUM | 63 | #define CONFIG_I2C_SET_DEFAULT_BUS_NUM |
64 | #define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 | 64 | #define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 |
65 | #endif | 65 | #endif |
66 | 66 | ||
67 | /* GPIO */ | ||
68 | #ifdef CONFIG_DM_GPIO | ||
69 | #ifndef CONFIG_MPC8XXX_GPIO | ||
70 | #define CONFIG_MPC8XXX_GPIO | ||
71 | #endif | ||
72 | #ifndef CONFIG_CMD_GPIO | ||
73 | #define CONFIG_CMD_GPIO | ||
74 | #endif | ||
75 | #endif | ||
76 | |||
67 | #define CONFIG_SYS_NS16550_SERIAL | 77 | #define CONFIG_SYS_NS16550_SERIAL |
68 | #define CONFIG_SYS_NS16550_REG_SIZE 1 | 78 | #define CONFIG_SYS_NS16550_REG_SIZE 1 |
69 | #define CONFIG_SYS_NS16550_CLK (get_serial_clock()) | 79 | #define CONFIG_SYS_NS16550_CLK (get_serial_clock()) |
70 | 80 | ||
71 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } | 81 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
72 | 82 | ||
73 | #define CONFIG_SYS_HZ 1000 | 83 | #define CONFIG_SYS_HZ 1000 |
74 | 84 | ||
75 | #define CONFIG_HWCONFIG | 85 | #define CONFIG_HWCONFIG |
76 | #define HWCONFIG_BUFFER_SIZE 128 | 86 | #define HWCONFIG_BUFFER_SIZE 128 |
77 | 87 | ||
78 | #ifndef CONFIG_SPL_BUILD | 88 | #ifndef CONFIG_SPL_BUILD |
79 | #define BOOT_TARGET_DEVICES(func) \ | 89 | #define BOOT_TARGET_DEVICES(func) \ |
80 | func(MMC, mmc, 0) \ | 90 | func(MMC, mmc, 0) \ |
81 | func(USB, usb, 0) \ | 91 | func(USB, usb, 0) \ |
82 | func(SCSI, scsi, 0) \ | 92 | func(SCSI, scsi, 0) \ |
83 | func(DHCP, dhcp, na) | 93 | func(DHCP, dhcp, na) |
84 | #include <config_distro_bootcmd.h> | 94 | #include <config_distro_bootcmd.h> |
85 | #endif | 95 | #endif |
86 | 96 | ||
87 | /* Initial environment variables */ | 97 | /* Initial environment variables */ |
88 | #define CONFIG_EXTRA_ENV_SETTINGS \ | 98 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
89 | "verify=no\0" \ | 99 | "verify=no\0" \ |
90 | "loadaddr=0x80100000\0" \ | 100 | "loadaddr=0x80100000\0" \ |
91 | "kernel_addr=0x100000\0" \ | 101 | "kernel_addr=0x100000\0" \ |
92 | "fdt_high=0xffffffffffffffff\0" \ | 102 | "fdt_high=0xffffffffffffffff\0" \ |
93 | "initrd_high=0xffffffffffffffff\0" \ | 103 | "initrd_high=0xffffffffffffffff\0" \ |
94 | "kernel_start=0x1000000\0" \ | 104 | "kernel_start=0x1000000\0" \ |
95 | "kernel_load=0xa0000000\0" \ | 105 | "kernel_load=0xa0000000\0" \ |
96 | "kernel_size=0x2800000\0" \ | 106 | "kernel_size=0x2800000\0" \ |
97 | 107 | ||
98 | #undef CONFIG_BOOTCOMMAND | 108 | #undef CONFIG_BOOTCOMMAND |
99 | #ifdef CONFIG_TFABOOT | 109 | #ifdef CONFIG_TFABOOT |
100 | #define QSPI_NOR_BOOTCOMMAND "pfe stop; sf probe 0:0; sf read $kernel_load "\ | 110 | #define QSPI_NOR_BOOTCOMMAND "pfe stop; sf probe 0:0; sf read $kernel_load "\ |
101 | "$kernel_start $kernel_size && "\ | 111 | "$kernel_start $kernel_size && "\ |
102 | "bootm $kernel_load" | 112 | "bootm $kernel_load" |
103 | #else | 113 | #else |
104 | #define CONFIG_BOOTCOMMAND "pfe stop; sf probe 0:0; sf read $kernel_load "\ | 114 | #define CONFIG_BOOTCOMMAND "pfe stop; sf probe 0:0; sf read $kernel_load "\ |
105 | "$kernel_start $kernel_size && "\ | 115 | "$kernel_start $kernel_size && "\ |
106 | "bootm $kernel_load" | 116 | "bootm $kernel_load" |
107 | #endif | 117 | #endif |
108 | 118 | ||
109 | /* Monitor Command Prompt */ | 119 | /* Monitor Command Prompt */ |
110 | #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ | 120 | #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ |
111 | #define CONFIG_SYS_MAXARGS 64 /* max command args */ | 121 | #define CONFIG_SYS_MAXARGS 64 /* max command args */ |
112 | 122 | ||
113 | #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ | 123 | #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ |
114 | 124 | ||
115 | #include <asm/arch/soc.h> | 125 | #include <asm/arch/soc.h> |
116 | 126 | ||
117 | #endif /* __LS1012A_COMMON_H */ | 127 | #endif /* __LS1012A_COMMON_H */ |
118 | 128 |