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drivers/usb/gadget/pxa27x_udc.c: Coding Style cleanup
Commit bdbcdc89 "pxa: convert pxa27x_udc to use read and write functions" added a number of C++ comments. Fix these. Signed-off-by: Wolfgang Denk <wd@denx.de>
Showing 1 changed file with 2 additions and 3 deletions Inline Diff
drivers/usb/gadget/pxa27x_udc.c
1 | /* | 1 | /* |
2 | * PXA27x USB device driver for u-boot. | 2 | * PXA27x USB device driver for u-boot. |
3 | * | 3 | * |
4 | * Copyright (C) 2007 Rodolfo Giometti <giometti@linux.it> | 4 | * Copyright (C) 2007 Rodolfo Giometti <giometti@linux.it> |
5 | * Copyright (C) 2007 Eurotech S.p.A. <info@eurotech.it> | 5 | * Copyright (C) 2007 Eurotech S.p.A. <info@eurotech.it> |
6 | * Copyright (C) 2008 Vivek Kutal <vivek.kutal@azingo.com> | 6 | * Copyright (C) 2008 Vivek Kutal <vivek.kutal@azingo.com> |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or | 8 | * This program is free software; you can redistribute it and/or |
9 | * modify it under the terms of the GNU General Public License as | 9 | * modify it under the terms of the GNU General Public License as |
10 | * published by the Free Software Foundation; either version 2 of | 10 | * published by the Free Software Foundation; either version 2 of |
11 | * the License, or (at your option) any later version. | 11 | * the License, or (at your option) any later version. |
12 | * | 12 | * |
13 | * This program is distributed in the hope that it will be useful, | 13 | * This program is distributed in the hope that it will be useful, |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
16 | * GNU General Public License for more details. | 16 | * GNU General Public License for more details. |
17 | * | 17 | * |
18 | * You should have received a copy of the GNU General Public License | 18 | * You should have received a copy of the GNU General Public License |
19 | * along with this program; if not, write to the Free Software | 19 | * along with this program; if not, write to the Free Software |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
21 | * MA 02111-1307 USA | 21 | * MA 02111-1307 USA |
22 | * | 22 | * |
23 | */ | 23 | */ |
24 | 24 | ||
25 | 25 | ||
26 | #include <common.h> | 26 | #include <common.h> |
27 | #include <config.h> | 27 | #include <config.h> |
28 | #include <asm/byteorder.h> | 28 | #include <asm/byteorder.h> |
29 | #include <usbdevice.h> | 29 | #include <usbdevice.h> |
30 | #include <asm/arch/hardware.h> | 30 | #include <asm/arch/hardware.h> |
31 | #include <asm/io.h> | 31 | #include <asm/io.h> |
32 | #include <usb/pxa27x_udc.h> | 32 | #include <usb/pxa27x_udc.h> |
33 | 33 | ||
34 | #include "ep0.h" | 34 | #include "ep0.h" |
35 | 35 | ||
36 | /* number of endpoints on this UDC */ | 36 | /* number of endpoints on this UDC */ |
37 | #define UDC_MAX_ENDPOINTS 24 | 37 | #define UDC_MAX_ENDPOINTS 24 |
38 | 38 | ||
39 | static struct urb *ep0_urb; | 39 | static struct urb *ep0_urb; |
40 | static struct usb_device_instance *udc_device; | 40 | static struct usb_device_instance *udc_device; |
41 | static int ep0state = EP0_IDLE; | 41 | static int ep0state = EP0_IDLE; |
42 | 42 | ||
43 | #ifdef USBDDBG | 43 | #ifdef USBDDBG |
44 | static void udc_dump_buffer(char *name, u8 *buf, int len) | 44 | static void udc_dump_buffer(char *name, u8 *buf, int len) |
45 | { | 45 | { |
46 | usbdbg("%s - buf %p, len %d", name, buf, len); | 46 | usbdbg("%s - buf %p, len %d", name, buf, len); |
47 | print_buffer(0, buf, 1, len, 0); | 47 | print_buffer(0, buf, 1, len, 0); |
48 | } | 48 | } |
49 | #else | 49 | #else |
50 | #define udc_dump_buffer(name, buf, len) /* void */ | 50 | #define udc_dump_buffer(name, buf, len) /* void */ |
51 | #endif | 51 | #endif |
52 | 52 | ||
53 | static inline void udc_ack_int_UDCCR(int mask) | 53 | static inline void udc_ack_int_UDCCR(int mask) |
54 | { | 54 | { |
55 | writel(readl(USIR1) | mask, USIR1); | 55 | writel(readl(USIR1) | mask, USIR1); |
56 | } | 56 | } |
57 | 57 | ||
58 | /* | 58 | /* |
59 | * If the endpoint has an active tx_urb, then the next packet of data from the | 59 | * If the endpoint has an active tx_urb, then the next packet of data from the |
60 | * URB is written to the tx FIFO. | 60 | * URB is written to the tx FIFO. |
61 | * The total amount of data in the urb is given by urb->actual_length. | 61 | * The total amount of data in the urb is given by urb->actual_length. |
62 | * The maximum amount of data that can be sent in any one packet is given by | 62 | * The maximum amount of data that can be sent in any one packet is given by |
63 | * endpoint->tx_packetSize. | 63 | * endpoint->tx_packetSize. |
64 | * The number of data bytes from this URB that have already been transmitted | 64 | * The number of data bytes from this URB that have already been transmitted |
65 | * is given by endpoint->sent. | 65 | * is given by endpoint->sent. |
66 | * endpoint->last is updated by this routine with the number of data bytes | 66 | * endpoint->last is updated by this routine with the number of data bytes |
67 | * transmitted in this packet. | 67 | * transmitted in this packet. |
68 | */ | 68 | */ |
69 | static int udc_write_urb(struct usb_endpoint_instance *endpoint) | 69 | static int udc_write_urb(struct usb_endpoint_instance *endpoint) |
70 | { | 70 | { |
71 | struct urb *urb = endpoint->tx_urb; | 71 | struct urb *urb = endpoint->tx_urb; |
72 | int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; | 72 | int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; |
73 | u32 *data32 = (u32 *) urb->buffer; | 73 | u32 *data32 = (u32 *) urb->buffer; |
74 | u8 *data8 = (u8 *) urb->buffer; | 74 | u8 *data8 = (u8 *) urb->buffer; |
75 | unsigned int i, n, w, b, is_short; | 75 | unsigned int i, n, w, b, is_short; |
76 | int timeout = 2000; /* 2ms */ | 76 | int timeout = 2000; /* 2ms */ |
77 | 77 | ||
78 | if (!urb || !urb->actual_length) | 78 | if (!urb || !urb->actual_length) |
79 | return -1; | 79 | return -1; |
80 | 80 | ||
81 | n = MIN(urb->actual_length - endpoint->sent, endpoint->tx_packetSize); | 81 | n = MIN(urb->actual_length - endpoint->sent, endpoint->tx_packetSize); |
82 | if (n <= 0) | 82 | if (n <= 0) |
83 | return -1; | 83 | return -1; |
84 | 84 | ||
85 | usbdbg("write urb on ep %d", ep_num); | 85 | usbdbg("write urb on ep %d", ep_num); |
86 | #if defined(USBDDBG) && defined(USBDPARANOIA) | 86 | #if defined(USBDDBG) && defined(USBDPARANOIA) |
87 | usbdbg("urb: buf %p, buf_len %d, actual_len %d", | 87 | usbdbg("urb: buf %p, buf_len %d, actual_len %d", |
88 | urb->buffer, urb->buffer_length, urb->actual_length); | 88 | urb->buffer, urb->buffer_length, urb->actual_length); |
89 | usbdbg("endpoint: sent %d, tx_packetSize %d, last %d", | 89 | usbdbg("endpoint: sent %d, tx_packetSize %d, last %d", |
90 | endpoint->sent, endpoint->tx_packetSize, endpoint->last); | 90 | endpoint->sent, endpoint->tx_packetSize, endpoint->last); |
91 | #endif | 91 | #endif |
92 | 92 | ||
93 | is_short = n != endpoint->tx_packetSize; | 93 | is_short = n != endpoint->tx_packetSize; |
94 | w = n / 4; | 94 | w = n / 4; |
95 | b = n % 4; | 95 | b = n % 4; |
96 | usbdbg("n %d%s w %d b %d", n, is_short ? "-s" : "", w, b); | 96 | usbdbg("n %d%s w %d b %d", n, is_short ? "-s" : "", w, b); |
97 | udc_dump_buffer("urb write", data8 + endpoint->sent, n); | 97 | udc_dump_buffer("urb write", data8 + endpoint->sent, n); |
98 | 98 | ||
99 | /* Prepare for data send */ | 99 | /* Prepare for data send */ |
100 | if (ep_num) | 100 | if (ep_num) |
101 | writel(UDCCSR_PC ,UDCCSN(ep_num)); | 101 | writel(UDCCSR_PC ,UDCCSN(ep_num)); |
102 | 102 | ||
103 | for (i = 0; i < w; i++) | 103 | for (i = 0; i < w; i++) |
104 | writel(data32[endpoint->sent / 4 + i], UDCDN(ep_num)); | 104 | writel(data32[endpoint->sent / 4 + i], UDCDN(ep_num)); |
105 | 105 | ||
106 | for (i = 0; i < b; i++) | 106 | for (i = 0; i < b; i++) |
107 | writeb(data8[endpoint->sent + w * 4 + i], UDCDN(ep_num)); | 107 | writeb(data8[endpoint->sent + w * 4 + i], UDCDN(ep_num)); |
108 | 108 | ||
109 | /* Set "Packet Complete" if less data then tx_packetSize */ | 109 | /* Set "Packet Complete" if less data then tx_packetSize */ |
110 | if (is_short) | 110 | if (is_short) |
111 | writel(ep_num ? UDCCSR_SP : UDCCSR0_IPR, UDCCSN(ep_num)); | 111 | writel(ep_num ? UDCCSR_SP : UDCCSR0_IPR, UDCCSN(ep_num)); |
112 | 112 | ||
113 | /* Wait for data sent */ | 113 | /* Wait for data sent */ |
114 | if (ep_num) { | 114 | if (ep_num) { |
115 | while (!(readl(UDCCSN(ep_num)) & UDCCSR_PC)) { | 115 | while (!(readl(UDCCSN(ep_num)) & UDCCSR_PC)) { |
116 | if (timeout-- == 0) | 116 | if (timeout-- == 0) |
117 | return -1; | 117 | return -1; |
118 | else | 118 | else |
119 | udelay(1); | 119 | udelay(1); |
120 | } | 120 | } |
121 | } | 121 | } |
122 | 122 | ||
123 | endpoint->last = n; | 123 | endpoint->last = n; |
124 | 124 | ||
125 | if (ep_num) { | 125 | if (ep_num) { |
126 | usbd_tx_complete(endpoint); | 126 | usbd_tx_complete(endpoint); |
127 | } else { | 127 | } else { |
128 | endpoint->sent += n; | 128 | endpoint->sent += n; |
129 | endpoint->last -= n; | 129 | endpoint->last -= n; |
130 | } | 130 | } |
131 | 131 | ||
132 | if (endpoint->sent >= urb->actual_length) { | 132 | if (endpoint->sent >= urb->actual_length) { |
133 | urb->actual_length = 0; | 133 | urb->actual_length = 0; |
134 | endpoint->sent = 0; | 134 | endpoint->sent = 0; |
135 | endpoint->last = 0; | 135 | endpoint->last = 0; |
136 | } | 136 | } |
137 | 137 | ||
138 | if ((endpoint->sent >= urb->actual_length) && (!ep_num)) { | 138 | if ((endpoint->sent >= urb->actual_length) && (!ep_num)) { |
139 | usbdbg("ep0 IN stage done"); | 139 | usbdbg("ep0 IN stage done"); |
140 | if (is_short) | 140 | if (is_short) |
141 | ep0state = EP0_IDLE; | 141 | ep0state = EP0_IDLE; |
142 | else | 142 | else |
143 | ep0state = EP0_XFER_COMPLETE; | 143 | ep0state = EP0_XFER_COMPLETE; |
144 | } | 144 | } |
145 | 145 | ||
146 | return 0; | 146 | return 0; |
147 | } | 147 | } |
148 | 148 | ||
149 | static int udc_read_urb(struct usb_endpoint_instance *endpoint) | 149 | static int udc_read_urb(struct usb_endpoint_instance *endpoint) |
150 | { | 150 | { |
151 | struct urb *urb = endpoint->rcv_urb; | 151 | struct urb *urb = endpoint->rcv_urb; |
152 | int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; | 152 | int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; |
153 | u32 *data32 = (u32 *) urb->buffer; | 153 | u32 *data32 = (u32 *) urb->buffer; |
154 | unsigned int i, n, is_short ; | 154 | unsigned int i, n, is_short ; |
155 | 155 | ||
156 | usbdbg("read urb on ep %d", ep_num); | 156 | usbdbg("read urb on ep %d", ep_num); |
157 | #if defined(USBDDBG) && defined(USBDPARANOIA) | 157 | #if defined(USBDDBG) && defined(USBDPARANOIA) |
158 | usbdbg("urb: buf %p, buf_len %d, actual_len %d", | 158 | usbdbg("urb: buf %p, buf_len %d, actual_len %d", |
159 | urb->buffer, urb->buffer_length, urb->actual_length); | 159 | urb->buffer, urb->buffer_length, urb->actual_length); |
160 | usbdbg("endpoint: rcv_packetSize %d", | 160 | usbdbg("endpoint: rcv_packetSize %d", |
161 | endpoint->rcv_packetSize); | 161 | endpoint->rcv_packetSize); |
162 | #endif | 162 | #endif |
163 | 163 | ||
164 | if (readl(UDCCSN(ep_num)) & UDCCSR_BNE) | 164 | if (readl(UDCCSN(ep_num)) & UDCCSR_BNE) |
165 | n = readl(UDCBCN(ep_num)) & 0x3ff; | 165 | n = readl(UDCBCN(ep_num)) & 0x3ff; |
166 | else /* zlp */ | 166 | else /* zlp */ |
167 | n = 0; | 167 | n = 0; |
168 | is_short = n != endpoint->rcv_packetSize; | 168 | is_short = n != endpoint->rcv_packetSize; |
169 | 169 | ||
170 | usbdbg("n %d%s", n, is_short ? "-s" : ""); | 170 | usbdbg("n %d%s", n, is_short ? "-s" : ""); |
171 | for (i = 0; i < n; i += 4) | 171 | for (i = 0; i < n; i += 4) |
172 | data32[urb->actual_length / 4 + i / 4] = readl(UDCDN(ep_num)); | 172 | data32[urb->actual_length / 4 + i / 4] = readl(UDCDN(ep_num)); |
173 | 173 | ||
174 | udc_dump_buffer("urb read", (u8 *) data32, urb->actual_length + n); | 174 | udc_dump_buffer("urb read", (u8 *) data32, urb->actual_length + n); |
175 | usbd_rcv_complete(endpoint, n, 0); | 175 | usbd_rcv_complete(endpoint, n, 0); |
176 | 176 | ||
177 | return 0; | 177 | return 0; |
178 | } | 178 | } |
179 | 179 | ||
180 | static int udc_read_urb_ep0(void) | 180 | static int udc_read_urb_ep0(void) |
181 | { | 181 | { |
182 | u32 *data32 = (u32 *) ep0_urb->buffer; | 182 | u32 *data32 = (u32 *) ep0_urb->buffer; |
183 | u8 *data8 = (u8 *) ep0_urb->buffer; | 183 | u8 *data8 = (u8 *) ep0_urb->buffer; |
184 | unsigned int i, n, w, b; | 184 | unsigned int i, n, w, b; |
185 | 185 | ||
186 | usbdbg("read urb on ep 0"); | 186 | usbdbg("read urb on ep 0"); |
187 | #if defined(USBDDBG) && defined(USBDPARANOIA) | 187 | #if defined(USBDDBG) && defined(USBDPARANOIA) |
188 | usbdbg("urb: buf %p, buf_len %d, actual_len %d", | 188 | usbdbg("urb: buf %p, buf_len %d, actual_len %d", |
189 | ep0_urb->buffer, ep0_urb->buffer_length, ep0_urb->actual_length); | 189 | ep0_urb->buffer, ep0_urb->buffer_length, ep0_urb->actual_length); |
190 | #endif | 190 | #endif |
191 | 191 | ||
192 | n = readl(UDCBCR0); | 192 | n = readl(UDCBCR0); |
193 | w = n / 4; | 193 | w = n / 4; |
194 | b = n % 4; | 194 | b = n % 4; |
195 | 195 | ||
196 | for (i = 0; i < w; i++) { | 196 | for (i = 0; i < w; i++) { |
197 | data32[ep0_urb->actual_length / 4 + i] = readl(UDCDN(0)); | 197 | data32[ep0_urb->actual_length / 4 + i] = readl(UDCDN(0)); |
198 | // ep0_urb->actual_length += 4; | 198 | /* ep0_urb->actual_length += 4; */ |
199 | } | 199 | } |
200 | 200 | ||
201 | for (i = 0; i < b; i++) { | 201 | for (i = 0; i < b; i++) { |
202 | data8[ep0_urb->actual_length + w * 4 + i] = readb(UDCDN(0)); | 202 | data8[ep0_urb->actual_length + w * 4 + i] = readb(UDCDN(0)); |
203 | // ep0_urb->actual_length++; | 203 | /* ep0_urb->actual_length++; */ |
204 | } | 204 | } |
205 | 205 | ||
206 | ep0_urb->actual_length += n; | 206 | ep0_urb->actual_length += n; |
207 | 207 | ||
208 | udc_dump_buffer("urb read", (u8 *) data32, ep0_urb->actual_length); | 208 | udc_dump_buffer("urb read", (u8 *) data32, ep0_urb->actual_length); |
209 | 209 | ||
210 | writel(UDCCSR0_OPC | UDCCSR0_IPR, UDCCSR0); | 210 | writel(UDCCSR0_OPC | UDCCSR0_IPR, UDCCSR0); |
211 | if (ep0_urb->actual_length == ep0_urb->device_request.wLength) | 211 | if (ep0_urb->actual_length == ep0_urb->device_request.wLength) |
212 | return 1; | 212 | return 1; |
213 | 213 | ||
214 | return 0; | 214 | return 0; |
215 | } | 215 | } |
216 | 216 | ||
217 | static void udc_handle_ep0(struct usb_endpoint_instance *endpoint) | 217 | static void udc_handle_ep0(struct usb_endpoint_instance *endpoint) |
218 | { | 218 | { |
219 | u32 udccsr0 = readl(UDCCSR0); | 219 | u32 udccsr0 = readl(UDCCSR0); |
220 | u32 *data = (u32 *) &ep0_urb->device_request; | 220 | u32 *data = (u32 *) &ep0_urb->device_request; |
221 | int i; | 221 | int i; |
222 | 222 | ||
223 | usbdbg("udccsr0 %x", udccsr0); | 223 | usbdbg("udccsr0 %x", udccsr0); |
224 | 224 | ||
225 | /* Clear stall status */ | 225 | /* Clear stall status */ |
226 | if (udccsr0 & UDCCSR0_SST) { | 226 | if (udccsr0 & UDCCSR0_SST) { |
227 | usberr("clear stall status"); | 227 | usberr("clear stall status"); |
228 | writel(UDCCSR0_SST, UDCCSR0); | 228 | writel(UDCCSR0_SST, UDCCSR0); |
229 | ep0state = EP0_IDLE; | 229 | ep0state = EP0_IDLE; |
230 | } | 230 | } |
231 | 231 | ||
232 | /* previous request unfinished? non-error iff back-to-back ... */ | 232 | /* previous request unfinished? non-error iff back-to-back ... */ |
233 | if ((udccsr0 & UDCCSR0_SA) != 0 && ep0state != EP0_IDLE) | 233 | if ((udccsr0 & UDCCSR0_SA) != 0 && ep0state != EP0_IDLE) |
234 | ep0state = EP0_IDLE; | 234 | ep0state = EP0_IDLE; |
235 | 235 | ||
236 | switch (ep0state) { | 236 | switch (ep0state) { |
237 | 237 | ||
238 | case EP0_IDLE: | 238 | case EP0_IDLE: |
239 | udccsr0 = readl(UDCCSR0); | 239 | udccsr0 = readl(UDCCSR0); |
240 | /* Start control request? */ | 240 | /* Start control request? */ |
241 | if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) | 241 | if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) |
242 | == (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) { | 242 | == (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) { |
243 | 243 | ||
244 | /* Read SETUP packet. | 244 | /* Read SETUP packet. |
245 | * SETUP packet size is 8 bytes (aka 2 words) | 245 | * SETUP packet size is 8 bytes (aka 2 words) |
246 | */ | 246 | */ |
247 | usbdbg("try reading SETUP packet"); | 247 | usbdbg("try reading SETUP packet"); |
248 | for (i = 0; i < 2; i++) { | 248 | for (i = 0; i < 2; i++) { |
249 | if ((readl(UDCCSR0) & UDCCSR0_RNE) == 0) { | 249 | if ((readl(UDCCSR0) & UDCCSR0_RNE) == 0) { |
250 | usberr("setup packet too short:%d", i); | 250 | usberr("setup packet too short:%d", i); |
251 | goto stall; | 251 | goto stall; |
252 | } | 252 | } |
253 | data[i] = readl(UDCDR0); | 253 | data[i] = readl(UDCDR0); |
254 | } | 254 | } |
255 | 255 | ||
256 | writel(readl(UDCCSR0) | UDCCSR0_OPC | UDCCSR0_SA, UDCCSR0); | 256 | writel(readl(UDCCSR0) | UDCCSR0_OPC | UDCCSR0_SA, UDCCSR0); |
257 | if ((readl(UDCCSR0) & UDCCSR0_RNE) != 0) { | 257 | if ((readl(UDCCSR0) & UDCCSR0_RNE) != 0) { |
258 | usberr("setup packet too long"); | 258 | usberr("setup packet too long"); |
259 | goto stall; | 259 | goto stall; |
260 | } | 260 | } |
261 | 261 | ||
262 | udc_dump_buffer("ep0 setup read", (u8 *) data, 8); | 262 | udc_dump_buffer("ep0 setup read", (u8 *) data, 8); |
263 | 263 | ||
264 | if (ep0_urb->device_request.wLength == 0) { | 264 | if (ep0_urb->device_request.wLength == 0) { |
265 | usbdbg("Zero Data control Packet\n"); | 265 | usbdbg("Zero Data control Packet\n"); |
266 | if (ep0_recv_setup(ep0_urb)) { | 266 | if (ep0_recv_setup(ep0_urb)) { |
267 | usberr("Invalid Setup Packet\n"); | 267 | usberr("Invalid Setup Packet\n"); |
268 | udc_dump_buffer("ep0 setup read", | 268 | udc_dump_buffer("ep0 setup read", |
269 | (u8 *)data, 8); | 269 | (u8 *)data, 8); |
270 | goto stall; | 270 | goto stall; |
271 | } | 271 | } |
272 | writel(UDCCSR0_IPR, UDCCSR0); | 272 | writel(UDCCSR0_IPR, UDCCSR0); |
273 | ep0state = EP0_IDLE; | 273 | ep0state = EP0_IDLE; |
274 | } else { | 274 | } else { |
275 | /* Check direction */ | 275 | /* Check direction */ |
276 | if ((ep0_urb->device_request.bmRequestType & | 276 | if ((ep0_urb->device_request.bmRequestType & |
277 | USB_REQ_DIRECTION_MASK) | 277 | USB_REQ_DIRECTION_MASK) |
278 | == USB_REQ_HOST2DEVICE) { | 278 | == USB_REQ_HOST2DEVICE) { |
279 | ep0state = EP0_OUT_DATA; | 279 | ep0state = EP0_OUT_DATA; |
280 | ep0_urb->buffer = | 280 | ep0_urb->buffer = |
281 | (u8 *)ep0_urb->buffer_data; | 281 | (u8 *)ep0_urb->buffer_data; |
282 | ep0_urb->buffer_length = | 282 | ep0_urb->buffer_length = |
283 | sizeof(ep0_urb->buffer_data); | 283 | sizeof(ep0_urb->buffer_data); |
284 | ep0_urb->actual_length = 0; | 284 | ep0_urb->actual_length = 0; |
285 | writel(UDCCSR0_IPR, UDCCSR0); | 285 | writel(UDCCSR0_IPR, UDCCSR0); |
286 | } else { | 286 | } else { |
287 | /* The ep0_recv_setup function has | 287 | /* The ep0_recv_setup function has |
288 | * already placed our response packet | 288 | * already placed our response packet |
289 | * data in ep0_urb->buffer and the | 289 | * data in ep0_urb->buffer and the |
290 | * packet length in | 290 | * packet length in |
291 | * ep0_urb->actual_length. | 291 | * ep0_urb->actual_length. |
292 | */ | 292 | */ |
293 | if (ep0_recv_setup(ep0_urb)) { | 293 | if (ep0_recv_setup(ep0_urb)) { |
294 | stall: | 294 | stall: |
295 | usberr("Invalid setup packet"); | 295 | usberr("Invalid setup packet"); |
296 | udc_dump_buffer("ep0 setup read" | 296 | udc_dump_buffer("ep0 setup read" |
297 | , (u8 *) data, 8); | 297 | , (u8 *) data, 8); |
298 | ep0state = EP0_IDLE; | 298 | ep0state = EP0_IDLE; |
299 | 299 | ||
300 | writel(UDCCSR0_SA | | 300 | writel(UDCCSR0_SA | |
301 | UDCCSR0_OPC | UDCCSR0_FST | | 301 | UDCCSR0_OPC | UDCCSR0_FST | |
302 | UDCCS0_FTF, UDCCSR0); | 302 | UDCCS0_FTF, UDCCSR0); |
303 | 303 | ||
304 | return; | 304 | return; |
305 | } | 305 | } |
306 | 306 | ||
307 | endpoint->tx_urb = ep0_urb; | 307 | endpoint->tx_urb = ep0_urb; |
308 | endpoint->sent = 0; | 308 | endpoint->sent = 0; |
309 | usbdbg("EP0_IN_DATA"); | 309 | usbdbg("EP0_IN_DATA"); |
310 | ep0state = EP0_IN_DATA; | 310 | ep0state = EP0_IN_DATA; |
311 | if (udc_write_urb(endpoint) < 0) | 311 | if (udc_write_urb(endpoint) < 0) |
312 | goto stall; | 312 | goto stall; |
313 | 313 | ||
314 | } | 314 | } |
315 | } | 315 | } |
316 | return; | 316 | return; |
317 | } else if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA)) | 317 | } else if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA)) |
318 | == (UDCCSR0_OPC|UDCCSR0_SA)) { | 318 | == (UDCCSR0_OPC|UDCCSR0_SA)) { |
319 | usberr("Setup Active but no data. Stalling ....\n"); | 319 | usberr("Setup Active but no data. Stalling ....\n"); |
320 | goto stall; | 320 | goto stall; |
321 | } else { | 321 | } else { |
322 | usbdbg("random early IRQs"); | 322 | usbdbg("random early IRQs"); |
323 | /* Some random early IRQs: | 323 | /* Some random early IRQs: |
324 | * - we acked FST | 324 | * - we acked FST |
325 | * - IPR cleared | 325 | * - IPR cleared |
326 | * - OPC got set, without SA (likely status stage) | 326 | * - OPC got set, without SA (likely status stage) |
327 | */ | 327 | */ |
328 | writel(udccsr0 & (UDCCSR0_SA | UDCCSR0_OPC), UDCCSR0); | 328 | writel(udccsr0 & (UDCCSR0_SA | UDCCSR0_OPC), UDCCSR0); |
329 | } | 329 | } |
330 | break; | 330 | break; |
331 | 331 | ||
332 | case EP0_OUT_DATA: | 332 | case EP0_OUT_DATA: |
333 | 333 | ||
334 | if ((udccsr0 & UDCCSR0_OPC) && !(udccsr0 & UDCCSR0_SA)) { | 334 | if ((udccsr0 & UDCCSR0_OPC) && !(udccsr0 & UDCCSR0_SA)) { |
335 | if (udc_read_urb_ep0()) { | 335 | if (udc_read_urb_ep0()) { |
336 | read_complete: | 336 | read_complete: |
337 | ep0state = EP0_IDLE; | 337 | ep0state = EP0_IDLE; |
338 | if (ep0_recv_setup(ep0_urb)) { | 338 | if (ep0_recv_setup(ep0_urb)) { |
339 | /* Not a setup packet, stall next | 339 | /* Not a setup packet, stall next |
340 | * EP0 transaction | 340 | * EP0 transaction |
341 | */ | 341 | */ |
342 | udc_dump_buffer("ep0 setup read", | 342 | udc_dump_buffer("ep0 setup read", |
343 | (u8 *) data, 8); | 343 | (u8 *) data, 8); |
344 | usberr("can't parse setup packet\n"); | 344 | usberr("can't parse setup packet\n"); |
345 | goto stall; | 345 | goto stall; |
346 | } | 346 | } |
347 | } | 347 | } |
348 | } else if (!(udccsr0 & UDCCSR0_OPC) && | 348 | } else if (!(udccsr0 & UDCCSR0_OPC) && |
349 | !(udccsr0 & UDCCSR0_IPR)) { | 349 | !(udccsr0 & UDCCSR0_IPR)) { |
350 | if (ep0_urb->device_request.wLength == | 350 | if (ep0_urb->device_request.wLength == |
351 | ep0_urb->actual_length) | 351 | ep0_urb->actual_length) |
352 | goto read_complete; | 352 | goto read_complete; |
353 | 353 | ||
354 | usberr("Premature Status\n"); | 354 | usberr("Premature Status\n"); |
355 | ep0state = EP0_IDLE; | 355 | ep0state = EP0_IDLE; |
356 | } | 356 | } |
357 | break; | 357 | break; |
358 | 358 | ||
359 | case EP0_IN_DATA: | 359 | case EP0_IN_DATA: |
360 | /* GET_DESCRIPTOR etc */ | 360 | /* GET_DESCRIPTOR etc */ |
361 | if (udccsr0 & UDCCSR0_OPC) { | 361 | if (udccsr0 & UDCCSR0_OPC) { |
362 | writel(UDCCSR0_OPC | UDCCSR0_FTF, UDCCSR0); | 362 | writel(UDCCSR0_OPC | UDCCSR0_FTF, UDCCSR0); |
363 | usberr("ep0in premature status"); | 363 | usberr("ep0in premature status"); |
364 | ep0state = EP0_IDLE; | 364 | ep0state = EP0_IDLE; |
365 | } else { | 365 | } else { |
366 | /* irq was IPR clearing */ | 366 | /* irq was IPR clearing */ |
367 | if (udc_write_urb(endpoint) < 0) { | 367 | if (udc_write_urb(endpoint) < 0) { |
368 | usberr("ep0_write_error\n"); | 368 | usberr("ep0_write_error\n"); |
369 | goto stall; | 369 | goto stall; |
370 | } | 370 | } |
371 | } | 371 | } |
372 | break; | 372 | break; |
373 | 373 | ||
374 | case EP0_XFER_COMPLETE: | 374 | case EP0_XFER_COMPLETE: |
375 | writel(UDCCSR0_IPR, UDCCSR0); | 375 | writel(UDCCSR0_IPR, UDCCSR0); |
376 | ep0state = EP0_IDLE; | 376 | ep0state = EP0_IDLE; |
377 | break; | 377 | break; |
378 | 378 | ||
379 | default: | 379 | default: |
380 | usbdbg("Default\n"); | 380 | usbdbg("Default\n"); |
381 | } | 381 | } |
382 | writel(USIR0_IR0, USIR0); | 382 | writel(USIR0_IR0, USIR0); |
383 | } | 383 | } |
384 | 384 | ||
385 | static void udc_handle_ep(struct usb_endpoint_instance *endpoint) | 385 | static void udc_handle_ep(struct usb_endpoint_instance *endpoint) |
386 | { | 386 | { |
387 | int ep_addr = endpoint->endpoint_address; | 387 | int ep_addr = endpoint->endpoint_address; |
388 | int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK; | 388 | int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK; |
389 | int ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT; | 389 | int ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT; |
390 | 390 | ||
391 | u32 flags = readl(UDCCSN(ep_num)) & (UDCCSR_SST | UDCCSR_TRN); | 391 | u32 flags = readl(UDCCSN(ep_num)) & (UDCCSR_SST | UDCCSR_TRN); |
392 | if (flags) | 392 | if (flags) |
393 | writel(flags, UDCCSN(ep_num)); | 393 | writel(flags, UDCCSN(ep_num)); |
394 | 394 | ||
395 | if (ep_isout) | 395 | if (ep_isout) |
396 | udc_read_urb(endpoint); | 396 | udc_read_urb(endpoint); |
397 | else | 397 | else |
398 | udc_write_urb(endpoint); | 398 | udc_write_urb(endpoint); |
399 | 399 | ||
400 | writel(UDCCSR_PC, UDCCSN(ep_num)); | 400 | writel(UDCCSR_PC, UDCCSN(ep_num)); |
401 | } | 401 | } |
402 | 402 | ||
403 | static void udc_state_changed(void) | 403 | static void udc_state_changed(void) |
404 | { | 404 | { |
405 | int config, interface, alternate; | 405 | int config, interface, alternate; |
406 | 406 | ||
407 | writel(readl(UDCCR) | UDCCR_SMAC, UDCCR); | 407 | writel(readl(UDCCR) | UDCCR_SMAC, UDCCR); |
408 | 408 | ||
409 | config = (readl(UDCCR) & UDCCR_ACN) >> UDCCR_ACN_S; | 409 | config = (readl(UDCCR) & UDCCR_ACN) >> UDCCR_ACN_S; |
410 | interface = (readl(UDCCR) & UDCCR_AIN) >> UDCCR_AIN_S; | 410 | interface = (readl(UDCCR) & UDCCR_AIN) >> UDCCR_AIN_S; |
411 | alternate = (readl(UDCCR) & UDCCR_AAISN) >> UDCCR_AAISN_S; | 411 | alternate = (readl(UDCCR) & UDCCR_AAISN) >> UDCCR_AAISN_S; |
412 | 412 | ||
413 | usbdbg("New UDC settings are: conf %d - inter %d - alter %d", | 413 | usbdbg("New UDC settings are: conf %d - inter %d - alter %d", |
414 | config, interface, alternate); | 414 | config, interface, alternate); |
415 | 415 | ||
416 | usbd_device_event_irq(udc_device, DEVICE_CONFIGURED, 0); | 416 | usbd_device_event_irq(udc_device, DEVICE_CONFIGURED, 0); |
417 | writel(UDCISR1_IRCC, UDCISR1); | 417 | writel(UDCISR1_IRCC, UDCISR1); |
418 | } | 418 | } |
419 | 419 | ||
420 | void udc_irq(void) | 420 | void udc_irq(void) |
421 | { | 421 | { |
422 | int handled; | 422 | int handled; |
423 | struct usb_endpoint_instance *endpoint; | 423 | struct usb_endpoint_instance *endpoint; |
424 | int ep_num, i; | 424 | int ep_num, i; |
425 | u32 udcisr0; | 425 | u32 udcisr0; |
426 | 426 | ||
427 | do { | 427 | do { |
428 | handled = 0; | 428 | handled = 0; |
429 | /* Suspend Interrupt Request */ | 429 | /* Suspend Interrupt Request */ |
430 | if (readl(USIR1) & UDCCR_SUSIR) { | 430 | if (readl(USIR1) & UDCCR_SUSIR) { |
431 | usbdbg("Suspend\n"); | 431 | usbdbg("Suspend\n"); |
432 | udc_ack_int_UDCCR(UDCCR_SUSIR); | 432 | udc_ack_int_UDCCR(UDCCR_SUSIR); |
433 | handled = 1; | 433 | handled = 1; |
434 | ep0state = EP0_IDLE; | 434 | ep0state = EP0_IDLE; |
435 | } | 435 | } |
436 | 436 | ||
437 | /* Resume Interrupt Request */ | 437 | /* Resume Interrupt Request */ |
438 | if (readl(USIR1) & UDCCR_RESIR) { | 438 | if (readl(USIR1) & UDCCR_RESIR) { |
439 | udc_ack_int_UDCCR(UDCCR_RESIR); | 439 | udc_ack_int_UDCCR(UDCCR_RESIR); |
440 | handled = 1; | 440 | handled = 1; |
441 | usbdbg("USB resume\n"); | 441 | usbdbg("USB resume\n"); |
442 | } | 442 | } |
443 | 443 | ||
444 | if (readl(USIR1) & (1<<31)) { | 444 | if (readl(USIR1) & (1<<31)) { |
445 | handled = 1; | 445 | handled = 1; |
446 | udc_state_changed(); | 446 | udc_state_changed(); |
447 | } | 447 | } |
448 | 448 | ||
449 | /* Reset Interrupt Request */ | 449 | /* Reset Interrupt Request */ |
450 | if (readl(USIR1) & UDCCR_RSTIR) { | 450 | if (readl(USIR1) & UDCCR_RSTIR) { |
451 | udc_ack_int_UDCCR(UDCCR_RSTIR); | 451 | udc_ack_int_UDCCR(UDCCR_RSTIR); |
452 | handled = 1; | 452 | handled = 1; |
453 | usbdbg("Reset\n"); | 453 | usbdbg("Reset\n"); |
454 | usbd_device_event_irq(udc_device, DEVICE_RESET, 0); | 454 | usbd_device_event_irq(udc_device, DEVICE_RESET, 0); |
455 | } else { | 455 | } else { |
456 | if (readl(USIR0)) | 456 | if (readl(USIR0)) |
457 | usbdbg("UISR0: %x \n", readl(USIR0)); | 457 | usbdbg("UISR0: %x \n", readl(USIR0)); |
458 | 458 | ||
459 | if (readl(USIR0) & 0x2) | 459 | if (readl(USIR0) & 0x2) |
460 | writel(0x2, USIR0); | 460 | writel(0x2, USIR0); |
461 | 461 | ||
462 | /* Control traffic */ | 462 | /* Control traffic */ |
463 | if (readl(USIR0) & USIR0_IR0) { | 463 | if (readl(USIR0) & USIR0_IR0) { |
464 | handled = 1; | 464 | handled = 1; |
465 | writel(USIR0_IR0, USIR0); | 465 | writel(USIR0_IR0, USIR0); |
466 | udc_handle_ep0(udc_device->bus->endpoint_array); | 466 | udc_handle_ep0(udc_device->bus->endpoint_array); |
467 | } | 467 | } |
468 | 468 | ||
469 | endpoint = udc_device->bus->endpoint_array; | 469 | endpoint = udc_device->bus->endpoint_array; |
470 | for (i = 0; i < udc_device->bus->max_endpoints; i++) { | 470 | for (i = 0; i < udc_device->bus->max_endpoints; i++) { |
471 | ep_num = (endpoint[i].endpoint_address) & | 471 | ep_num = (endpoint[i].endpoint_address) & |
472 | USB_ENDPOINT_NUMBER_MASK; | 472 | USB_ENDPOINT_NUMBER_MASK; |
473 | if (!ep_num) | 473 | if (!ep_num) |
474 | continue; | 474 | continue; |
475 | udcisr0 = readl(UDCISR0); | 475 | udcisr0 = readl(UDCISR0); |
476 | if (udcisr0 & | 476 | if (udcisr0 & |
477 | UDCISR_INT(ep_num, UDC_INT_PACKETCMP)) { | 477 | UDCISR_INT(ep_num, UDC_INT_PACKETCMP)) { |
478 | writel(UDCISR_INT(ep_num, UDC_INT_PACKETCMP), | 478 | writel(UDCISR_INT(ep_num, UDC_INT_PACKETCMP), |
479 | UDCISR0); | 479 | UDCISR0); |
480 | udc_handle_ep(&endpoint[i]); | 480 | udc_handle_ep(&endpoint[i]); |
481 | } | 481 | } |
482 | } | 482 | } |
483 | } | 483 | } |
484 | 484 | ||
485 | } while (handled); | 485 | } while (handled); |
486 | } | 486 | } |
487 | 487 | ||
488 | /* The UDCCR reg contains mask and interrupt status bits, | 488 | /* The UDCCR reg contains mask and interrupt status bits, |
489 | * so using '|=' isn't safe as it may ack an interrupt. | 489 | * so using '|=' isn't safe as it may ack an interrupt. |
490 | */ | 490 | */ |
491 | #define UDCCR_OEN (1 << 31) /* On-the-Go Enable */ | 491 | #define UDCCR_OEN (1 << 31) /* On-the-Go Enable */ |
492 | #define UDCCR_MASK_BITS (UDCCR_OEN | UDCCR_UDE) | 492 | #define UDCCR_MASK_BITS (UDCCR_OEN | UDCCR_UDE) |
493 | 493 | ||
494 | static inline void udc_set_mask_UDCCR(int mask) | 494 | static inline void udc_set_mask_UDCCR(int mask) |
495 | { | 495 | { |
496 | writel((readl(UDCCR) & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS), UDCCR); | 496 | writel((readl(UDCCR) & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS), UDCCR); |
497 | } | 497 | } |
498 | 498 | ||
499 | static inline void udc_clear_mask_UDCCR(int mask) | 499 | static inline void udc_clear_mask_UDCCR(int mask) |
500 | { | 500 | { |
501 | writel((readl(UDCCR) & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS), UDCCR); | 501 | writel((readl(UDCCR) & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS), UDCCR); |
502 | } | 502 | } |
503 | 503 | ||
504 | static void pio_irq_enable(int ep_num) | 504 | static void pio_irq_enable(int ep_num) |
505 | { | 505 | { |
506 | if (ep_num < 16) | 506 | if (ep_num < 16) |
507 | writel(readl(UDCICR0) | 3 << (ep_num * 2), UDCICR0); | 507 | writel(readl(UDCICR0) | 3 << (ep_num * 2), UDCICR0); |
508 | else { | 508 | else { |
509 | ep_num -= 16; | 509 | ep_num -= 16; |
510 | writel(readl(UDCICR1) | 3 << (ep_num * 2), UDCICR1); | 510 | writel(readl(UDCICR1) | 3 << (ep_num * 2), UDCICR1); |
511 | } | 511 | } |
512 | } | 512 | } |
513 | 513 | ||
514 | /* | 514 | /* |
515 | * udc_set_nak | 515 | * udc_set_nak |
516 | * | 516 | * |
517 | * Allow upper layers to signal lower layers should not accept more RX data | 517 | * Allow upper layers to signal lower layers should not accept more RX data |
518 | */ | 518 | */ |
519 | void udc_set_nak(int ep_num) | 519 | void udc_set_nak(int ep_num) |
520 | { | 520 | { |
521 | /* TODO */ | 521 | /* TODO */ |
522 | } | 522 | } |
523 | 523 | ||
524 | /* | 524 | /* |
525 | * udc_unset_nak | 525 | * udc_unset_nak |
526 | * | 526 | * |
527 | * Suspend sending of NAK tokens for DATA OUT tokens on a given endpoint. | 527 | * Suspend sending of NAK tokens for DATA OUT tokens on a given endpoint. |
528 | * Switch off NAKing on this endpoint to accept more data output from host. | 528 | * Switch off NAKing on this endpoint to accept more data output from host. |
529 | */ | 529 | */ |
530 | void udc_unset_nak(int ep_num) | 530 | void udc_unset_nak(int ep_num) |
531 | { | 531 | { |
532 | /* TODO */ | 532 | /* TODO */ |
533 | } | 533 | } |
534 | 534 | ||
535 | int udc_endpoint_write(struct usb_endpoint_instance *endpoint) | 535 | int udc_endpoint_write(struct usb_endpoint_instance *endpoint) |
536 | { | 536 | { |
537 | return udc_write_urb(endpoint); | 537 | return udc_write_urb(endpoint); |
538 | } | 538 | } |
539 | 539 | ||
540 | /* Associate a physical endpoint with endpoint instance */ | 540 | /* Associate a physical endpoint with endpoint instance */ |
541 | void udc_setup_ep(struct usb_device_instance *device, unsigned int id, | 541 | void udc_setup_ep(struct usb_device_instance *device, unsigned int id, |
542 | struct usb_endpoint_instance *endpoint) | 542 | struct usb_endpoint_instance *endpoint) |
543 | { | 543 | { |
544 | int ep_num, ep_addr, ep_isout, ep_type, ep_size; | 544 | int ep_num, ep_addr, ep_isout, ep_type, ep_size; |
545 | int config, interface, alternate; | 545 | int config, interface, alternate; |
546 | u32 tmp; | 546 | u32 tmp; |
547 | 547 | ||
548 | usbdbg("setting up endpoint id %d", id); | 548 | usbdbg("setting up endpoint id %d", id); |
549 | 549 | ||
550 | if (!endpoint) { | 550 | if (!endpoint) { |
551 | usberr("endpoint void!"); | 551 | usberr("endpoint void!"); |
552 | return; | 552 | return; |
553 | } | 553 | } |
554 | 554 | ||
555 | ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; | 555 | ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; |
556 | if (ep_num >= UDC_MAX_ENDPOINTS) { | 556 | if (ep_num >= UDC_MAX_ENDPOINTS) { |
557 | usberr("unable to setup ep %d!", ep_num); | 557 | usberr("unable to setup ep %d!", ep_num); |
558 | return; | 558 | return; |
559 | } | 559 | } |
560 | 560 | ||
561 | pio_irq_enable(ep_num); | 561 | pio_irq_enable(ep_num); |
562 | if (ep_num == 0) { | 562 | if (ep_num == 0) { |
563 | /* Done for ep0 */ | 563 | /* Done for ep0 */ |
564 | return; | 564 | return; |
565 | } | 565 | } |
566 | 566 | ||
567 | config = 1; | 567 | config = 1; |
568 | interface = 0; | 568 | interface = 0; |
569 | alternate = 0; | 569 | alternate = 0; |
570 | 570 | ||
571 | usbdbg("config %d - interface %d - alternate %d", | 571 | usbdbg("config %d - interface %d - alternate %d", |
572 | config, interface, alternate); | 572 | config, interface, alternate); |
573 | 573 | ||
574 | ep_addr = endpoint->endpoint_address; | 574 | ep_addr = endpoint->endpoint_address; |
575 | ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK; | 575 | ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK; |
576 | ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT; | 576 | ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT; |
577 | ep_type = ep_isout ? endpoint->rcv_attributes : endpoint->tx_attributes; | 577 | ep_type = ep_isout ? endpoint->rcv_attributes : endpoint->tx_attributes; |
578 | ep_size = ep_isout ? endpoint->rcv_packetSize : endpoint->tx_packetSize; | 578 | ep_size = ep_isout ? endpoint->rcv_packetSize : endpoint->tx_packetSize; |
579 | 579 | ||
580 | usbdbg("addr %x, num %d, dir %s, type %s, packet size %d", | 580 | usbdbg("addr %x, num %d, dir %s, type %s, packet size %d", |
581 | ep_addr, ep_num, | 581 | ep_addr, ep_num, |
582 | ep_isout ? "out" : "in", | 582 | ep_isout ? "out" : "in", |
583 | ep_type == USB_ENDPOINT_XFER_ISOC ? "isoc" : | 583 | ep_type == USB_ENDPOINT_XFER_ISOC ? "isoc" : |
584 | ep_type == USB_ENDPOINT_XFER_BULK ? "bulk" : | 584 | ep_type == USB_ENDPOINT_XFER_BULK ? "bulk" : |
585 | ep_type == USB_ENDPOINT_XFER_INT ? "int" : "???", | 585 | ep_type == USB_ENDPOINT_XFER_INT ? "int" : "???", |
586 | ep_size | 586 | ep_size |
587 | ); | 587 | ); |
588 | 588 | ||
589 | /* Configure UDCCRx */ | 589 | /* Configure UDCCRx */ |
590 | tmp = 0; | 590 | tmp = 0; |
591 | tmp |= (config << UDCCONR_CN_S) & UDCCONR_CN; | 591 | tmp |= (config << UDCCONR_CN_S) & UDCCONR_CN; |
592 | tmp |= (interface << UDCCONR_IN_S) & UDCCONR_IN; | 592 | tmp |= (interface << UDCCONR_IN_S) & UDCCONR_IN; |
593 | tmp |= (alternate << UDCCONR_AISN_S) & UDCCONR_AISN; | 593 | tmp |= (alternate << UDCCONR_AISN_S) & UDCCONR_AISN; |
594 | tmp |= (ep_num << UDCCONR_EN_S) & UDCCONR_EN; | 594 | tmp |= (ep_num << UDCCONR_EN_S) & UDCCONR_EN; |
595 | tmp |= (ep_type << UDCCONR_ET_S) & UDCCONR_ET; | 595 | tmp |= (ep_type << UDCCONR_ET_S) & UDCCONR_ET; |
596 | tmp |= ep_isout ? 0 : UDCCONR_ED; | 596 | tmp |= ep_isout ? 0 : UDCCONR_ED; |
597 | tmp |= (ep_size << UDCCONR_MPS_S) & UDCCONR_MPS; | 597 | tmp |= (ep_size << UDCCONR_MPS_S) & UDCCONR_MPS; |
598 | tmp |= UDCCONR_EE; | 598 | tmp |= UDCCONR_EE; |
599 | 599 | ||
600 | writel(tmp, UDCCN(ep_num)); | 600 | writel(tmp, UDCCN(ep_num)); |
601 | 601 | ||
602 | //usbdbg | ||
603 | usbdbg("UDCCR%c = %x", 'A' + ep_num-1, readl(UDCCN(ep_num))); | 602 | usbdbg("UDCCR%c = %x", 'A' + ep_num-1, readl(UDCCN(ep_num))); |
604 | usbdbg("UDCCSR%c = %x", 'A' + ep_num-1, readl(UDCCSN(ep_num))); | 603 | usbdbg("UDCCSR%c = %x", 'A' + ep_num-1, readl(UDCCSN(ep_num))); |
605 | } | 604 | } |
606 | 605 | ||
607 | /* Connect the USB device to the bus */ | 606 | /* Connect the USB device to the bus */ |
608 | void udc_connect(void) | 607 | void udc_connect(void) |
609 | { | 608 | { |
610 | usbdbg("UDC connect"); | 609 | usbdbg("UDC connect"); |
611 | 610 | ||
612 | #ifdef CONFIG_USB_DEV_PULLUP_GPIO | 611 | #ifdef CONFIG_USB_DEV_PULLUP_GPIO |
613 | /* Turn on the USB connection by enabling the pullup resistor */ | 612 | /* Turn on the USB connection by enabling the pullup resistor */ |
614 | set_GPIO_mode(CONFIG_USB_DEV_PULLUP_GPIO | GPIO_OUT); | 613 | set_GPIO_mode(CONFIG_USB_DEV_PULLUP_GPIO | GPIO_OUT); |
615 | writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPSR(CONFIG_USB_DEV_PULLUP_GPIO)); | 614 | writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPSR(CONFIG_USB_DEV_PULLUP_GPIO)); |
616 | #else | 615 | #else |
617 | /* Host port 2 transceiver D+ pull up enable */ | 616 | /* Host port 2 transceiver D+ pull up enable */ |
618 | writel(readl(UP2OCR) | UP2OCR_DPPUE, UP2OCR); | 617 | writel(readl(UP2OCR) | UP2OCR_DPPUE, UP2OCR); |
619 | #endif | 618 | #endif |
620 | } | 619 | } |
621 | 620 | ||
622 | /* Disconnect the USB device to the bus */ | 621 | /* Disconnect the USB device to the bus */ |
623 | void udc_disconnect(void) | 622 | void udc_disconnect(void) |
624 | { | 623 | { |
625 | usbdbg("UDC disconnect"); | 624 | usbdbg("UDC disconnect"); |
626 | 625 | ||
627 | #ifdef CONFIG_USB_DEV_PULLUP_GPIO | 626 | #ifdef CONFIG_USB_DEV_PULLUP_GPIO |
628 | /* Turn off the USB connection by disabling the pullup resistor */ | 627 | /* Turn off the USB connection by disabling the pullup resistor */ |
629 | writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPCR(CONFIG_USB_DEV_PULLUP_GPIO)); | 628 | writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPCR(CONFIG_USB_DEV_PULLUP_GPIO)); |
630 | #else | 629 | #else |
631 | /* Host port 2 transceiver D+ pull up disable */ | 630 | /* Host port 2 transceiver D+ pull up disable */ |
632 | writel(readl(UP2OCR) & ~UP2OCR_DPPUE, UP2OCR); | 631 | writel(readl(UP2OCR) & ~UP2OCR_DPPUE, UP2OCR); |
633 | #endif | 632 | #endif |
634 | } | 633 | } |
635 | 634 | ||
636 | /* Switch on the UDC */ | 635 | /* Switch on the UDC */ |
637 | void udc_enable(struct usb_device_instance *device) | 636 | void udc_enable(struct usb_device_instance *device) |
638 | { | 637 | { |
639 | 638 | ||
640 | ep0state = EP0_IDLE; | 639 | ep0state = EP0_IDLE; |
641 | 640 | ||
642 | /* enable endpoint 0, A, B's Packet Complete Interrupt. */ | 641 | /* enable endpoint 0, A, B's Packet Complete Interrupt. */ |
643 | writel(0xffffffff, UDCICR0); | 642 | writel(0xffffffff, UDCICR0); |
644 | writel(0xa8000000, UDCICR1); | 643 | writel(0xa8000000, UDCICR1); |
645 | 644 | ||
646 | /* clear the interrupt status/control registers */ | 645 | /* clear the interrupt status/control registers */ |
647 | writel(0xffffffff, UDCISR0); | 646 | writel(0xffffffff, UDCISR0); |
648 | writel(0xffffffff, UDCISR1); | 647 | writel(0xffffffff, UDCISR1); |
649 | 648 | ||
650 | /* set UDC-enable */ | 649 | /* set UDC-enable */ |
651 | udc_set_mask_UDCCR(UDCCR_UDE); | 650 | udc_set_mask_UDCCR(UDCCR_UDE); |
652 | 651 | ||
653 | udc_device = device; | 652 | udc_device = device; |
654 | if (!ep0_urb) | 653 | if (!ep0_urb) |
655 | ep0_urb = usbd_alloc_urb(udc_device, | 654 | ep0_urb = usbd_alloc_urb(udc_device, |
656 | udc_device->bus->endpoint_array); | 655 | udc_device->bus->endpoint_array); |
657 | else | 656 | else |
658 | usbinfo("ep0_urb %p already allocated", ep0_urb); | 657 | usbinfo("ep0_urb %p already allocated", ep0_urb); |
659 | 658 | ||
660 | usbdbg("UDC Enabled\n"); | 659 | usbdbg("UDC Enabled\n"); |
661 | } | 660 | } |
662 | 661 | ||
663 | /* Need to check this again */ | 662 | /* Need to check this again */ |
664 | void udc_disable(void) | 663 | void udc_disable(void) |
665 | { | 664 | { |
666 | usbdbg("disable UDC"); | 665 | usbdbg("disable UDC"); |
667 | 666 | ||
668 | udc_clear_mask_UDCCR(UDCCR_UDE); | 667 | udc_clear_mask_UDCCR(UDCCR_UDE); |
669 | 668 | ||
670 | /* Disable clock for USB device */ | 669 | /* Disable clock for USB device */ |
671 | writel(readl(CKEN) & ~CKEN11_USB, CKEN); | 670 | writel(readl(CKEN) & ~CKEN11_USB, CKEN); |
672 | 671 | ||
673 | /* Free ep0 URB */ | 672 | /* Free ep0 URB */ |
674 | if (ep0_urb) { | 673 | if (ep0_urb) { |
675 | usbd_dealloc_urb(ep0_urb); | 674 | usbd_dealloc_urb(ep0_urb); |
676 | ep0_urb = NULL; | 675 | ep0_urb = NULL; |
677 | } | 676 | } |
678 | 677 | ||
679 | /* Reset device pointer */ | 678 | /* Reset device pointer */ |
680 | udc_device = NULL; | 679 | udc_device = NULL; |
681 | } | 680 | } |
682 | 681 | ||
683 | /* Allow udc code to do any additional startup */ | 682 | /* Allow udc code to do any additional startup */ |
684 | void udc_startup_events(struct usb_device_instance *device) | 683 | void udc_startup_events(struct usb_device_instance *device) |
685 | { | 684 | { |
686 | /* The DEVICE_INIT event puts the USB device in the state STATE_INIT */ | 685 | /* The DEVICE_INIT event puts the USB device in the state STATE_INIT */ |
687 | usbd_device_event_irq(device, DEVICE_INIT, 0); | 686 | usbd_device_event_irq(device, DEVICE_INIT, 0); |
688 | 687 | ||
689 | /* The DEVICE_CREATE event puts the USB device in the state | 688 | /* The DEVICE_CREATE event puts the USB device in the state |
690 | * STATE_ATTACHED */ | 689 | * STATE_ATTACHED */ |
691 | usbd_device_event_irq(device, DEVICE_CREATE, 0); | 690 | usbd_device_event_irq(device, DEVICE_CREATE, 0); |
692 | 691 | ||
693 | /* Some USB controller driver implementations signal | 692 | /* Some USB controller driver implementations signal |
694 | * DEVICE_HUB_CONFIGURED and DEVICE_RESET events here. | 693 | * DEVICE_HUB_CONFIGURED and DEVICE_RESET events here. |
695 | * DEVICE_HUB_CONFIGURED causes a transition to the state | 694 | * DEVICE_HUB_CONFIGURED causes a transition to the state |
696 | * STATE_POWERED, and DEVICE_RESET causes a transition to | 695 | * STATE_POWERED, and DEVICE_RESET causes a transition to |
697 | * the state STATE_DEFAULT. | 696 | * the state STATE_DEFAULT. |
698 | */ | 697 | */ |
699 | udc_enable(device); | 698 | udc_enable(device); |
700 | } | 699 | } |
701 | 700 | ||
702 | /* Initialize h/w stuff */ | 701 | /* Initialize h/w stuff */ |
703 | int udc_init(void) | 702 | int udc_init(void) |
704 | { | 703 | { |
705 | udc_device = NULL; | 704 | udc_device = NULL; |
706 | usbdbg("PXA27x usbd start"); | 705 | usbdbg("PXA27x usbd start"); |
707 | 706 | ||
708 | /* Enable clock for USB device */ | 707 | /* Enable clock for USB device */ |
709 | writel(readl(CKEN) | CKEN11_USB, CKEN); | 708 | writel(readl(CKEN) | CKEN11_USB, CKEN); |
710 | 709 | ||
711 | /* Disable the UDC */ | 710 | /* Disable the UDC */ |
712 | udc_clear_mask_UDCCR(UDCCR_UDE); | 711 | udc_clear_mask_UDCCR(UDCCR_UDE); |
713 | 712 | ||
714 | /* Disable IRQs: we don't use them */ | 713 | /* Disable IRQs: we don't use them */ |
715 | writel(0, UDCICR0); | 714 | writel(0, UDCICR0); |
716 | writel(0, UDCICR1); | 715 | writel(0, UDCICR1); |
717 | 716 | ||
718 | return 0; | 717 | return 0; |
719 | } | 718 | } |
720 | 719 |