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Commit 2347534450727aa87087dc7579a92c102e128005

Authored by Andreas Bießmann
Committed by Tom Rini
1 parent 1ea2301fcf
Exists in v2017.01-smarct4x and in 48 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

board:tricorder: enable omap_gpio clocks 

Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
Cc: Thomas Weber <thomas.weber@corscience.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

Showing 1 changed file with 3 additions and 0 deletions Inline Diff

include/configs/tricorder.h
Diff comments   View file @ 2347534
1 /* 1 /*
2 * (C) Copyright 2006-2008 2 * (C) Copyright 2006-2008
3 * Texas Instruments. 3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com> 4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 * 6 *
7 * (C) Copyright 2012 7 * (C) Copyright 2012
8 * Corscience GmbH & Co. KG 8 * Corscience GmbH & Co. KG
9 * Thomas Weber <weber@corscience.de> 9 * Thomas Weber <weber@corscience.de>
10 * 10 *
11 * Configuration settings for the Tricorder board. 11 * Configuration settings for the Tricorder board.
12 * 12 *
13 * SPDX-License-Identifier: GPL-2.0+ 13 * SPDX-License-Identifier: GPL-2.0+
14 */ 14 */
15 15
16 #ifndef __CONFIG_H 16 #ifndef __CONFIG_H
17 #define __CONFIG_H 17 #define __CONFIG_H
18 18
19 /* High Level Configuration Options */ 19 /* High Level Configuration Options */
20 #define CONFIG_OMAP /* in a TI OMAP core */ 20 #define CONFIG_OMAP /* in a TI OMAP core */
21 #define CONFIG_OMAP34XX /* which is a 34XX */ 21 #define CONFIG_OMAP34XX /* which is a 34XX */
22 #define CONFIG_OMAP_COMMON 22 #define CONFIG_OMAP_COMMON
23 23
24 #define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER 24 #define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER
25 /* 25 /*
26 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 26 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
27 * 64 bytes before this address should be set aside for u-boot.img's 27 * 64 bytes before this address should be set aside for u-boot.img's
28 * header. That is 0x800FFFC0--0x80100000 should not be used for any 28 * header. That is 0x800FFFC0--0x80100000 should not be used for any
29 * other needs. 29 * other needs.
30 */ 30 */
31 #define CONFIG_SYS_TEXT_BASE 0x80100000 31 #define CONFIG_SYS_TEXT_BASE 0x80100000
32 32
33 #define CONFIG_SDRC /* The chip has SDRC controller */ 33 #define CONFIG_SDRC /* The chip has SDRC controller */
34 34
35 #include <asm/arch/cpu.h> /* get chip and board defs */ 35 #include <asm/arch/cpu.h> /* get chip and board defs */
36 #include <asm/arch/omap3.h> 36 #include <asm/arch/omap3.h>
37 37
38 /* Display CPU and Board information */ 38 /* Display CPU and Board information */
39 #define CONFIG_DISPLAY_CPUINFO 39 #define CONFIG_DISPLAY_CPUINFO
40 #define CONFIG_DISPLAY_BOARDINFO 40 #define CONFIG_DISPLAY_BOARDINFO
41 41
42 #define CONFIG_SILENT_CONSOLE 42 #define CONFIG_SILENT_CONSOLE
43 #define CONFIG_ZERO_BOOTDELAY_CHECK 43 #define CONFIG_ZERO_BOOTDELAY_CHECK
44 44
45 /* Clock Defines */ 45 /* Clock Defines */
46 #define V_OSCK 26000000 /* Clock output from T2 */ 46 #define V_OSCK 26000000 /* Clock output from T2 */
47 #define V_SCLK (V_OSCK >> 1) 47 #define V_SCLK (V_OSCK >> 1)
48 48
49 #define CONFIG_MISC_INIT_R 49 #define CONFIG_MISC_INIT_R
50 50
51 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 51 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
52 #define CONFIG_SETUP_MEMORY_TAGS 52 #define CONFIG_SETUP_MEMORY_TAGS
53 #define CONFIG_INITRD_TAG 53 #define CONFIG_INITRD_TAG
54 #define CONFIG_REVISION_TAG 54 #define CONFIG_REVISION_TAG
55 55
56 #define CONFIG_OF_LIBFDT 56 #define CONFIG_OF_LIBFDT
57 57
58 /* Size of malloc() pool */ 58 /* Size of malloc() pool */
59 #define CONFIG_SYS_MALLOC_LEN (1024*1024) 59 #define CONFIG_SYS_MALLOC_LEN (1024*1024)
60 60
61 /* Hardware drivers */ 61 /* Hardware drivers */
62 62
63 /* GPIO support */ 63 /* GPIO support */
64 #define CONFIG_OMAP_GPIO 64 #define CONFIG_OMAP_GPIO
65 65
66 /* GPIO banks */
67 #define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 are in GPIO bank 2 */
68
66 /* LED support */ 69 /* LED support */
67 #define CONFIG_STATUS_LED 70 #define CONFIG_STATUS_LED
68 #define CONFIG_BOARD_SPECIFIC_LED 71 #define CONFIG_BOARD_SPECIFIC_LED
69 #define CONFIG_CMD_LED /* LED command */ 72 #define CONFIG_CMD_LED /* LED command */
70 #define STATUS_LED_BIT (1 << 0) 73 #define STATUS_LED_BIT (1 << 0)
71 #define STATUS_LED_STATE STATUS_LED_ON 74 #define STATUS_LED_STATE STATUS_LED_ON
72 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 75 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
73 #define STATUS_LED_BIT1 (1 << 1) 76 #define STATUS_LED_BIT1 (1 << 1)
74 #define STATUS_LED_STATE1 STATUS_LED_ON 77 #define STATUS_LED_STATE1 STATUS_LED_ON
75 #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) 78 #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
76 #define STATUS_LED_BIT2 (1 << 2) 79 #define STATUS_LED_BIT2 (1 << 2)
77 #define STATUS_LED_STATE2 STATUS_LED_ON 80 #define STATUS_LED_STATE2 STATUS_LED_ON
78 #define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2) 81 #define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2)
79 82
80 /* NS16550 Configuration */ 83 /* NS16550 Configuration */
81 #define CONFIG_SYS_NS16550 84 #define CONFIG_SYS_NS16550
82 #define CONFIG_SYS_NS16550_SERIAL 85 #define CONFIG_SYS_NS16550_SERIAL
83 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 86 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
84 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 87 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
85 88
86 /* select serial console configuration */ 89 /* select serial console configuration */
87 #define CONFIG_CONS_INDEX 3 90 #define CONFIG_CONS_INDEX 3
88 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 91 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
89 #define CONFIG_SERIAL3 3 92 #define CONFIG_SERIAL3 3
90 #define CONFIG_BAUDRATE 115200 93 #define CONFIG_BAUDRATE 115200
91 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 94 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
92 115200} 95 115200}
93 96
94 /* MMC */ 97 /* MMC */
95 #define CONFIG_GENERIC_MMC 98 #define CONFIG_GENERIC_MMC
96 #define CONFIG_MMC 99 #define CONFIG_MMC
97 #define CONFIG_OMAP_HSMMC 100 #define CONFIG_OMAP_HSMMC
98 #define CONFIG_DOS_PARTITION 101 #define CONFIG_DOS_PARTITION
99 102
100 /* I2C */ 103 /* I2C */
101 #define CONFIG_SYS_I2C 104 #define CONFIG_SYS_I2C
102 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 105 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
103 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 106 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
104 #define CONFIG_SYS_I2C_OMAP34XX 107 #define CONFIG_SYS_I2C_OMAP34XX
105 108
106 109
107 /* EEPROM */ 110 /* EEPROM */
108 #define CONFIG_SYS_I2C_MULTI_EEPROMS 111 #define CONFIG_SYS_I2C_MULTI_EEPROMS
109 #define CONFIG_CMD_EEPROM 112 #define CONFIG_CMD_EEPROM
110 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 113 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
111 #define CONFIG_SYS_EEPROM_BUS_NUM 1 114 #define CONFIG_SYS_EEPROM_BUS_NUM 1
112 115
113 /* TWL4030 */ 116 /* TWL4030 */
114 #define CONFIG_TWL4030_POWER 117 #define CONFIG_TWL4030_POWER
115 #define CONFIG_TWL4030_LED 118 #define CONFIG_TWL4030_LED
116 119
117 /* Board NAND Info */ 120 /* Board NAND Info */
118 #define CONFIG_SYS_NO_FLASH /* no NOR flash */ 121 #define CONFIG_SYS_NO_FLASH /* no NOR flash */
119 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 122 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
120 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 123 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
121 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ 124 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
122 "128k(SPL)," \ 125 "128k(SPL)," \
123 "1m(u-boot)," \ 126 "1m(u-boot)," \
124 "384k(u-boot-env1)," \ 127 "384k(u-boot-env1)," \
125 "1152k(mtdoops)," \ 128 "1152k(mtdoops)," \
126 "384k(u-boot-env2)," \ 129 "384k(u-boot-env2)," \
127 "5m(kernel)," \ 130 "5m(kernel)," \
128 "2m(fdt)," \ 131 "2m(fdt)," \
129 "-(ubi)" 132 "-(ubi)"
130 133
131 #define CONFIG_NAND_OMAP_GPMC 134 #define CONFIG_NAND_OMAP_GPMC
132 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 135 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
133 /* to access nand */ 136 /* to access nand */
134 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 137 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
135 /* to access nand at */ 138 /* to access nand at */
136 /* CS0 */ 139 /* CS0 */
137 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 140 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
138 /* devices */ 141 /* devices */
139 #define CONFIG_BCH 142 #define CONFIG_BCH
140 #define CONFIG_SYS_NAND_MAX_OOBFREE 2 143 #define CONFIG_SYS_NAND_MAX_OOBFREE 2
141 #define CONFIG_SYS_NAND_MAX_ECCPOS 56 144 #define CONFIG_SYS_NAND_MAX_ECCPOS 56
142 145
143 /* commands to include */ 146 /* commands to include */
144 #include <config_cmd_default.h> 147 #include <config_cmd_default.h>
145 148
146 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 149 #define CONFIG_CMD_EXT2 /* EXT2 Support */
147 #define CONFIG_CMD_FAT /* FAT support */ 150 #define CONFIG_CMD_FAT /* FAT support */
148 #define CONFIG_CMD_I2C /* I2C serial bus support */ 151 #define CONFIG_CMD_I2C /* I2C serial bus support */
149 #define CONFIG_CMD_MMC /* MMC support */ 152 #define CONFIG_CMD_MMC /* MMC support */
150 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 153 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
151 #define CONFIG_CMD_NAND /* NAND support */ 154 #define CONFIG_CMD_NAND /* NAND support */
152 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ 155 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
153 #define CONFIG_CMD_UBI /* UBI commands */ 156 #define CONFIG_CMD_UBI /* UBI commands */
154 #define CONFIG_CMD_UBIFS /* UBIFS commands */ 157 #define CONFIG_CMD_UBIFS /* UBIFS commands */
155 #define CONFIG_LZO /* LZO is needed for UBIFS */ 158 #define CONFIG_LZO /* LZO is needed for UBIFS */
156 159
157 #undef CONFIG_CMD_NET 160 #undef CONFIG_CMD_NET
158 #undef CONFIG_CMD_NFS 161 #undef CONFIG_CMD_NFS
159 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 162 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
160 #undef CONFIG_CMD_IMI /* iminfo */ 163 #undef CONFIG_CMD_IMI /* iminfo */
161 #undef CONFIG_CMD_JFFS2 /* JFFS2 Support */ 164 #undef CONFIG_CMD_JFFS2 /* JFFS2 Support */
162 165
163 /* needed for ubi */ 166 /* needed for ubi */
164 #define CONFIG_RBTREE 167 #define CONFIG_RBTREE
165 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 168 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
166 #define CONFIG_MTD_PARTITIONS 169 #define CONFIG_MTD_PARTITIONS
167 170
168 /* Environment information (this is the common part) */ 171 /* Environment information (this is the common part) */
169 172
170 #define CONFIG_BOOTDELAY 0 173 #define CONFIG_BOOTDELAY 0
171 174
172 /* hang() the board on panic() */ 175 /* hang() the board on panic() */
173 #define CONFIG_PANIC_HANG 176 #define CONFIG_PANIC_HANG
174 177
175 /* environment placement (for NAND), is different for FLASHCARD but does not 178 /* environment placement (for NAND), is different for FLASHCARD but does not
176 * harm there */ 179 * harm there */
177 #define CONFIG_ENV_OFFSET 0x120000 /* env start */ 180 #define CONFIG_ENV_OFFSET 0x120000 /* env start */
178 #define CONFIG_ENV_OFFSET_REDUND 0x2A0000 /* redundant env start */ 181 #define CONFIG_ENV_OFFSET_REDUND 0x2A0000 /* redundant env start */
179 #define CONFIG_ENV_SIZE (16 << 10) /* use 16KiB for env */ 182 #define CONFIG_ENV_SIZE (16 << 10) /* use 16KiB for env */
180 #define CONFIG_ENV_RANGE (384 << 10) /* allow badblocks in env */ 183 #define CONFIG_ENV_RANGE (384 << 10) /* allow badblocks in env */
181 184
182 /* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend 185 /* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend
183 * value can not be used here! */ 186 * value can not be used here! */
184 #define CONFIG_LOADADDR 0x82000000 187 #define CONFIG_LOADADDR 0x82000000
185 188
186 #define CONFIG_COMMON_ENV_SETTINGS \ 189 #define CONFIG_COMMON_ENV_SETTINGS \
187 "console=ttyO2,115200n8\0" \ 190 "console=ttyO2,115200n8\0" \
188 "mmcdev=0\0" \ 191 "mmcdev=0\0" \
189 "vram=3M\0" \ 192 "vram=3M\0" \
190 "defaultdisplay=lcd\0" \ 193 "defaultdisplay=lcd\0" \
191 "kernelopts=mtdoops.mtddev=3\0" \ 194 "kernelopts=mtdoops.mtddev=3\0" \
192 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 195 "mtdparts=" MTDPARTS_DEFAULT "\0" \
193 "mtdids=" MTDIDS_DEFAULT "\0" \ 196 "mtdids=" MTDIDS_DEFAULT "\0" \
194 "commonargs=" \ 197 "commonargs=" \
195 "setenv bootargs console=${console} " \ 198 "setenv bootargs console=${console} " \
196 "${mtdparts} " \ 199 "${mtdparts} " \
197 "${kernelopts} " \ 200 "${kernelopts} " \
198 "vt.global_cursor_default=0 " \ 201 "vt.global_cursor_default=0 " \
199 "vram=${vram} " \ 202 "vram=${vram} " \
200 "omapdss.def_disp=${defaultdisplay}\0" 203 "omapdss.def_disp=${defaultdisplay}\0"
201 204
202 #define CONFIG_BOOTCOMMAND "run autoboot" 205 #define CONFIG_BOOTCOMMAND "run autoboot"
203 206
204 /* specific environment settings for different use cases 207 /* specific environment settings for different use cases
205 * FLASHCARD: used to run a rdimage from sdcard to program the device 208 * FLASHCARD: used to run a rdimage from sdcard to program the device
206 * 'NORMAL': used to boot kernel from sdcard, nand, ... 209 * 'NORMAL': used to boot kernel from sdcard, nand, ...
207 * 210 *
208 * The main aim for the FLASHCARD skin is to have an embedded environment 211 * The main aim for the FLASHCARD skin is to have an embedded environment
209 * which will not be influenced by any data already on the device. 212 * which will not be influenced by any data already on the device.
210 */ 213 */
211 #ifdef CONFIG_FLASHCARD 214 #ifdef CONFIG_FLASHCARD
212 215
213 #define CONFIG_ENV_IS_NOWHERE 216 #define CONFIG_ENV_IS_NOWHERE
214 217
215 /* the rdaddr is 16 MiB before the loadaddr */ 218 /* the rdaddr is 16 MiB before the loadaddr */
216 #define CONFIG_ENV_RDADDR "rdaddr=0x81000000\0" 219 #define CONFIG_ENV_RDADDR "rdaddr=0x81000000\0"
217 220
218 #define CONFIG_EXTRA_ENV_SETTINGS \ 221 #define CONFIG_EXTRA_ENV_SETTINGS \
219 CONFIG_COMMON_ENV_SETTINGS \ 222 CONFIG_COMMON_ENV_SETTINGS \
220 CONFIG_ENV_RDADDR \ 223 CONFIG_ENV_RDADDR \
221 "autoboot=" \ 224 "autoboot=" \
222 "run commonargs; " \ 225 "run commonargs; " \
223 "setenv bootargs ${bootargs} " \ 226 "setenv bootargs ${bootargs} " \
224 "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \ 227 "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \
225 "rdinit=/sbin/init; " \ 228 "rdinit=/sbin/init; " \
226 "mmc dev ${mmcdev}; mmc rescan; " \ 229 "mmc dev ${mmcdev}; mmc rescan; " \
227 "fatload mmc ${mmcdev} ${loadaddr} uImage; " \ 230 "fatload mmc ${mmcdev} ${loadaddr} uImage; " \
228 "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \ 231 "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \
229 "bootm ${loadaddr} ${rdaddr}\0" 232 "bootm ${loadaddr} ${rdaddr}\0"
230 233
231 #else /* CONFIG_FLASHCARD */ 234 #else /* CONFIG_FLASHCARD */
232 235
233 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */ 236 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
234 237
235 #define CONFIG_ENV_IS_IN_NAND 238 #define CONFIG_ENV_IS_IN_NAND
236 239
237 #define CONFIG_EXTRA_ENV_SETTINGS \ 240 #define CONFIG_EXTRA_ENV_SETTINGS \
238 CONFIG_COMMON_ENV_SETTINGS \ 241 CONFIG_COMMON_ENV_SETTINGS \
239 "mmcargs=" \ 242 "mmcargs=" \
240 "run commonargs; " \ 243 "run commonargs; " \
241 "setenv bootargs ${bootargs} " \ 244 "setenv bootargs ${bootargs} " \
242 "root=/dev/mmcblk0p2 " \ 245 "root=/dev/mmcblk0p2 " \
243 "rootwait " \ 246 "rootwait " \
244 "rw\0" \ 247 "rw\0" \
245 "nandargs=" \ 248 "nandargs=" \
246 "run commonargs; " \ 249 "run commonargs; " \
247 "setenv bootargs ${bootargs} " \ 250 "setenv bootargs ${bootargs} " \
248 "root=ubi0:root " \ 251 "root=ubi0:root " \
249 "ubi.mtd=7 " \ 252 "ubi.mtd=7 " \
250 "rootfstype=ubifs " \ 253 "rootfstype=ubifs " \
251 "ro\0" \ 254 "ro\0" \
252 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 255 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
253 "bootscript=echo Running bootscript from mmc ...; " \ 256 "bootscript=echo Running bootscript from mmc ...; " \
254 "source ${loadaddr}\0" \ 257 "source ${loadaddr}\0" \
255 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 258 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
256 "mmcboot=echo Booting from mmc ...; " \ 259 "mmcboot=echo Booting from mmc ...; " \
257 "run mmcargs; " \ 260 "run mmcargs; " \
258 "bootm ${loadaddr}\0" \ 261 "bootm ${loadaddr}\0" \
259 "loaduimage_ubi=ubi part ubi; " \ 262 "loaduimage_ubi=ubi part ubi; " \
260 "ubifsmount ubi:root; " \ 263 "ubifsmount ubi:root; " \
261 "ubifsload ${loadaddr} /boot/uImage\0" \ 264 "ubifsload ${loadaddr} /boot/uImage\0" \
262 "loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \ 265 "loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \
263 "nandboot=echo Booting from nand ...; " \ 266 "nandboot=echo Booting from nand ...; " \
264 "run nandargs; " \ 267 "run nandargs; " \
265 "run loaduimage_nand; " \ 268 "run loaduimage_nand; " \
266 "bootm ${loadaddr}\0" \ 269 "bootm ${loadaddr}\0" \
267 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ 270 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
268 "if run loadbootscript; then " \ 271 "if run loadbootscript; then " \
269 "run bootscript; " \ 272 "run bootscript; " \
270 "else " \ 273 "else " \
271 "if run loaduimage; then " \ 274 "if run loaduimage; then " \
272 "run mmcboot; " \ 275 "run mmcboot; " \
273 "else run nandboot; " \ 276 "else run nandboot; " \
274 "fi; " \ 277 "fi; " \
275 "fi; " \ 278 "fi; " \
276 "else run nandboot; fi\0" 279 "else run nandboot; fi\0"
277 280
278 #endif /* CONFIG_FLASHCARD */ 281 #endif /* CONFIG_FLASHCARD */
279 282
280 /* Miscellaneous configurable options */ 283 /* Miscellaneous configurable options */
281 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 284 #define CONFIG_SYS_LONGHELP /* undef to save memory */
282 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 285 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
283 #define CONFIG_CMDLINE_EDITING /* enable cmdline history */ 286 #define CONFIG_CMDLINE_EDITING /* enable cmdline history */
284 #define CONFIG_AUTO_COMPLETE 287 #define CONFIG_AUTO_COMPLETE
285 #define CONFIG_SYS_PROMPT "OMAP3 Tricorder # " 288 #define CONFIG_SYS_PROMPT "OMAP3 Tricorder # "
286 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 289 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
287 /* Print Buffer Size */ 290 /* Print Buffer Size */
288 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 291 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
289 sizeof(CONFIG_SYS_PROMPT) + 16) 292 sizeof(CONFIG_SYS_PROMPT) + 16)
290 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 293 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
291 294
292 /* Boot Argument Buffer Size */ 295 /* Boot Argument Buffer Size */
293 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 296 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
294 297
295 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x00000000) 298 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x00000000)
296 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 299 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
297 0x07000000) /* 112 MB */ 300 0x07000000) /* 112 MB */
298 301
299 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) 302 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
300 303
301 /* 304 /*
302 * OMAP3 has 12 GP timers, they can be driven by the system clock 305 * OMAP3 has 12 GP timers, they can be driven by the system clock
303 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 306 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
304 * This rate is divided by a local divisor. 307 * This rate is divided by a local divisor.
305 */ 308 */
306 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 309 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
307 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 310 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
308 311
309 /* Physical Memory Map */ 312 /* Physical Memory Map */
310 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 313 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
311 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 314 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
312 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 315 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
313 316
314 /* NAND and environment organization */ 317 /* NAND and environment organization */
315 #define PISMO1_NAND_SIZE GPMC_SIZE_128M 318 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
316 319
317 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 320 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
318 321
319 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 322 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
320 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 323 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
321 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 324 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
322 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 325 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
323 CONFIG_SYS_INIT_RAM_SIZE - \ 326 CONFIG_SYS_INIT_RAM_SIZE - \
324 GENERATED_GBL_DATA_SIZE) 327 GENERATED_GBL_DATA_SIZE)
325 328
326 /* SRAM config */ 329 /* SRAM config */
327 #define CONFIG_SYS_SRAM_START 0x40200000 330 #define CONFIG_SYS_SRAM_START 0x40200000
328 #define CONFIG_SYS_SRAM_SIZE 0x10000 331 #define CONFIG_SYS_SRAM_SIZE 0x10000
329 332
330 /* Defines for SPL */ 333 /* Defines for SPL */
331 #define CONFIG_SPL 334 #define CONFIG_SPL
332 #define CONFIG_SPL_FRAMEWORK 335 #define CONFIG_SPL_FRAMEWORK
333 #define CONFIG_SPL_NAND_SIMPLE 336 #define CONFIG_SPL_NAND_SIMPLE
334 337
335 #define CONFIG_SPL_BOARD_INIT 338 #define CONFIG_SPL_BOARD_INIT
336 #define CONFIG_SPL_GPIO_SUPPORT 339 #define CONFIG_SPL_GPIO_SUPPORT
337 #define CONFIG_SPL_LIBCOMMON_SUPPORT 340 #define CONFIG_SPL_LIBCOMMON_SUPPORT
338 #define CONFIG_SPL_LIBDISK_SUPPORT 341 #define CONFIG_SPL_LIBDISK_SUPPORT
339 #define CONFIG_SPL_I2C_SUPPORT 342 #define CONFIG_SPL_I2C_SUPPORT
340 #define CONFIG_SPL_LIBGENERIC_SUPPORT 343 #define CONFIG_SPL_LIBGENERIC_SUPPORT
341 #define CONFIG_SPL_SERIAL_SUPPORT 344 #define CONFIG_SPL_SERIAL_SUPPORT
342 #define CONFIG_SPL_POWER_SUPPORT 345 #define CONFIG_SPL_POWER_SUPPORT
343 #define CONFIG_SPL_NAND_SUPPORT 346 #define CONFIG_SPL_NAND_SUPPORT
344 #define CONFIG_SPL_NAND_BASE 347 #define CONFIG_SPL_NAND_BASE
345 #define CONFIG_SPL_NAND_DRIVERS 348 #define CONFIG_SPL_NAND_DRIVERS
346 #define CONFIG_SPL_NAND_ECC 349 #define CONFIG_SPL_NAND_ECC
347 #define CONFIG_SPL_MMC_SUPPORT 350 #define CONFIG_SPL_MMC_SUPPORT
348 #define CONFIG_SPL_FAT_SUPPORT 351 #define CONFIG_SPL_FAT_SUPPORT
349 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 352 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
350 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 353 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
351 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 354 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
352 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 355 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
353 356
354 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 357 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
355 #define CONFIG_SPL_MAX_SIZE (57 * 1024) /* 7 KB for stack */ 358 #define CONFIG_SPL_MAX_SIZE (57 * 1024) /* 7 KB for stack */
356 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 359 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
357 360
358 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/ 361 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
359 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 362 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
360 363
361 /* NAND boot config */ 364 /* NAND boot config */
362 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 365 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
363 #define CONFIG_SYS_NAND_PAGE_COUNT 64 366 #define CONFIG_SYS_NAND_PAGE_COUNT 64
364 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 367 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
365 #define CONFIG_SYS_NAND_OOBSIZE 64 368 #define CONFIG_SYS_NAND_OOBSIZE 64
366 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 369 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
367 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 370 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
368 #define CONFIG_SYS_NAND_ECCPOS {12, 13, 14, 15, 16, 17, 18, 19, 20,\ 371 #define CONFIG_SYS_NAND_ECCPOS {12, 13, 14, 15, 16, 17, 18, 19, 20,\
369 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\ 372 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\
370 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46,\ 373 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46,\
371 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,\ 374 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,\
372 60, 61, 62, 63} 375 60, 61, 62, 63}
373 376
374 #define CONFIG_SYS_NAND_ECCSIZE 512 377 #define CONFIG_SYS_NAND_ECCSIZE 512
375 #define CONFIG_SYS_NAND_ECCBYTES 13 378 #define CONFIG_SYS_NAND_ECCBYTES 13
376 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW 379 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
377 380
378 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 381 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
379 382
380 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 383 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
381 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x100000 384 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x100000
382 385
383 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 386 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
384 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ 387 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
385 388
386 #define CONFIG_SYS_ALT_MEMTEST 389 #define CONFIG_SYS_ALT_MEMTEST
387 #define CONFIG_SYS_MEMTEST_SCRATCH 0x81000000 390 #define CONFIG_SYS_MEMTEST_SCRATCH 0x81000000
388 #endif /* __CONFIG_H */ 391 #endif /* __CONFIG_H */
389 392