Eric Lee / smarc-uboot

Download as
Browse Code ยป

Commit 326cf52c4c214c0c14da783914c51a0298543e26

Authored by Ye Li
1 parent d436521d7d
Exists in smarc_8mq_lf_v2020.04 and in 4 other branches pitx_8mp_lf_v2020.04, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8mp_lf_v2020.04

MLK-21828-2 common: board_f: Use cpu_get_current_dev in print_cpuinfo 

Current print_cpuinfo gets the first udevice in CPU class to return
the cpu info. This has problem if the boot CPU is not fixed.

Change to use new API cpu_get_current_dev to resolve the issue.

Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 30b9f6f88e4e310a03458eecee5f594ebd218564)

Showing 1 changed file with 5 additions and 5 deletions Inline Diff

1 // SPDX-License-Identifier: GPL-2.0+ 1 // SPDX-License-Identifier: GPL-2.0+
2 /* 2 /*
3 * Copyright (c) 2011 The Chromium OS Authors. 3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006 4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 * 6 *
7 * (C) Copyright 2002 7 * (C) Copyright 2002
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de> 9 * Marius Groeger <mgroeger@sysgo.de>
10 */ 10 */
11 11
12 #include <common.h> 12 #include <common.h>
13 #include <bloblist.h> 13 #include <bloblist.h>
14 #include <clock_legacy.h> 14 #include <clock_legacy.h>
15 #include <console.h> 15 #include <console.h>
16 #include <cpu.h> 16 #include <cpu.h>
17 #include <cpu_func.h> 17 #include <cpu_func.h>
18 #include <dm.h> 18 #include <dm.h>
19 #include <env.h> 19 #include <env.h>
20 #include <env_internal.h> 20 #include <env_internal.h>
21 #include <fdtdec.h> 21 #include <fdtdec.h>
22 #include <fs.h> 22 #include <fs.h>
23 #include <hang.h> 23 #include <hang.h>
24 #include <i2c.h> 24 #include <i2c.h>
25 #include <init.h> 25 #include <init.h>
26 #include <initcall.h> 26 #include <initcall.h>
27 #include <lcd.h> 27 #include <lcd.h>
28 #include <malloc.h> 28 #include <malloc.h>
29 #include <mapmem.h> 29 #include <mapmem.h>
30 #include <os.h> 30 #include <os.h>
31 #include <post.h> 31 #include <post.h>
32 #include <relocate.h> 32 #include <relocate.h>
33 #include <serial.h> 33 #include <serial.h>
34 #ifdef CONFIG_SPL 34 #ifdef CONFIG_SPL
35 #include <spl.h> 35 #include <spl.h>
36 #endif 36 #endif
37 #include <status_led.h> 37 #include <status_led.h>
38 #include <sysreset.h> 38 #include <sysreset.h>
39 #include <timer.h> 39 #include <timer.h>
40 #include <trace.h> 40 #include <trace.h>
41 #include <video.h> 41 #include <video.h>
42 #include <watchdog.h> 42 #include <watchdog.h>
43 #ifdef CONFIG_MACH_TYPE 43 #ifdef CONFIG_MACH_TYPE
44 #include <asm/mach-types.h> 44 #include <asm/mach-types.h>
45 #endif 45 #endif
46 #if defined(CONFIG_MP) && defined(CONFIG_PPC) 46 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
47 #include <asm/mp.h> 47 #include <asm/mp.h>
48 #endif 48 #endif
49 #include <asm/io.h> 49 #include <asm/io.h>
50 #include <asm/sections.h> 50 #include <asm/sections.h>
51 #include <dm/root.h> 51 #include <dm/root.h>
52 #include <linux/errno.h> 52 #include <linux/errno.h>
53 53
54 /* 54 /*
55 * Pointer to initial global data area 55 * Pointer to initial global data area
56 * 56 *
57 * Here we initialize it if needed. 57 * Here we initialize it if needed.
58 */ 58 */
59 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 59 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
60 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 60 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
61 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 61 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
62 DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR); 62 DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
63 #else 63 #else
64 DECLARE_GLOBAL_DATA_PTR; 64 DECLARE_GLOBAL_DATA_PTR;
65 #endif 65 #endif
66 66
67 /* 67 /*
68 * TODO(sjg@chromium.org): IMO this code should be 68 * TODO(sjg@chromium.org): IMO this code should be
69 * refactored to a single function, something like: 69 * refactored to a single function, something like:
70 * 70 *
71 * void led_set_state(enum led_colour_t colour, int on); 71 * void led_set_state(enum led_colour_t colour, int on);
72 */ 72 */
73 /************************************************************************ 73 /************************************************************************
74 * Coloured LED functionality 74 * Coloured LED functionality
75 ************************************************************************ 75 ************************************************************************
76 * May be supplied by boards if desired 76 * May be supplied by boards if desired
77 */ 77 */
78 __weak void coloured_LED_init(void) {} 78 __weak void coloured_LED_init(void) {}
79 __weak void red_led_on(void) {} 79 __weak void red_led_on(void) {}
80 __weak void red_led_off(void) {} 80 __weak void red_led_off(void) {}
81 __weak void green_led_on(void) {} 81 __weak void green_led_on(void) {}
82 __weak void green_led_off(void) {} 82 __weak void green_led_off(void) {}
83 __weak void yellow_led_on(void) {} 83 __weak void yellow_led_on(void) {}
84 __weak void yellow_led_off(void) {} 84 __weak void yellow_led_off(void) {}
85 __weak void blue_led_on(void) {} 85 __weak void blue_led_on(void) {}
86 __weak void blue_led_off(void) {} 86 __weak void blue_led_off(void) {}
87 87
88 /* 88 /*
89 * Why is gd allocated a register? Prior to reloc it might be better to 89 * Why is gd allocated a register? Prior to reloc it might be better to
90 * just pass it around to each function in this file? 90 * just pass it around to each function in this file?
91 * 91 *
92 * After reloc one could argue that it is hardly used and doesn't need 92 * After reloc one could argue that it is hardly used and doesn't need
93 * to be in a register. Or if it is it should perhaps hold pointers to all 93 * to be in a register. Or if it is it should perhaps hold pointers to all
94 * global data for all modules, so that post-reloc we can avoid the massive 94 * global data for all modules, so that post-reloc we can avoid the massive
95 * literal pool we get on ARM. Or perhaps just encourage each module to use 95 * literal pool we get on ARM. Or perhaps just encourage each module to use
96 * a structure... 96 * a structure...
97 */ 97 */
98 98
99 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 99 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
100 static int init_func_watchdog_init(void) 100 static int init_func_watchdog_init(void)
101 { 101 {
102 # if defined(CONFIG_HW_WATCHDOG) && \ 102 # if defined(CONFIG_HW_WATCHDOG) && \
103 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 103 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
104 defined(CONFIG_SH) || \ 104 defined(CONFIG_SH) || \
105 defined(CONFIG_DESIGNWARE_WATCHDOG) || \ 105 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
106 defined(CONFIG_IMX_WATCHDOG)) 106 defined(CONFIG_IMX_WATCHDOG))
107 hw_watchdog_init(); 107 hw_watchdog_init();
108 puts(" Watchdog enabled\n"); 108 puts(" Watchdog enabled\n");
109 # endif 109 # endif
110 WATCHDOG_RESET(); 110 WATCHDOG_RESET();
111 111
112 return 0; 112 return 0;
113 } 113 }
114 114
115 int init_func_watchdog_reset(void) 115 int init_func_watchdog_reset(void)
116 { 116 {
117 WATCHDOG_RESET(); 117 WATCHDOG_RESET();
118 118
119 return 0; 119 return 0;
120 } 120 }
121 #endif /* CONFIG_WATCHDOG */ 121 #endif /* CONFIG_WATCHDOG */
122 122
123 __weak void board_add_ram_info(int use_default) 123 __weak void board_add_ram_info(int use_default)
124 { 124 {
125 /* please define platform specific board_add_ram_info() */ 125 /* please define platform specific board_add_ram_info() */
126 } 126 }
127 127
128 static int init_baud_rate(void) 128 static int init_baud_rate(void)
129 { 129 {
130 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE); 130 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
131 return 0; 131 return 0;
132 } 132 }
133 133
134 static int display_text_info(void) 134 static int display_text_info(void)
135 { 135 {
136 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 136 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
137 ulong bss_start, bss_end, text_base; 137 ulong bss_start, bss_end, text_base;
138 138
139 bss_start = (ulong)&__bss_start; 139 bss_start = (ulong)&__bss_start;
140 bss_end = (ulong)&__bss_end; 140 bss_end = (ulong)&__bss_end;
141 141
142 #ifdef CONFIG_SYS_TEXT_BASE 142 #ifdef CONFIG_SYS_TEXT_BASE
143 text_base = CONFIG_SYS_TEXT_BASE; 143 text_base = CONFIG_SYS_TEXT_BASE;
144 #else 144 #else
145 text_base = CONFIG_SYS_MONITOR_BASE; 145 text_base = CONFIG_SYS_MONITOR_BASE;
146 #endif 146 #endif
147 147
148 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 148 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
149 text_base, bss_start, bss_end); 149 text_base, bss_start, bss_end);
150 #endif 150 #endif
151 151
152 return 0; 152 return 0;
153 } 153 }
154 154
155 #ifdef CONFIG_SYSRESET 155 #ifdef CONFIG_SYSRESET
156 static int print_resetinfo(void) 156 static int print_resetinfo(void)
157 { 157 {
158 struct udevice *dev; 158 struct udevice *dev;
159 char status[256]; 159 char status[256];
160 int ret; 160 int ret;
161 161
162 ret = uclass_first_device_err(UCLASS_SYSRESET, &dev); 162 ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
163 if (ret) { 163 if (ret) {
164 debug("%s: No sysreset device found (error: %d)\n", 164 debug("%s: No sysreset device found (error: %d)\n",
165 __func__, ret); 165 __func__, ret);
166 /* Not all boards have sysreset drivers available during early 166 /* Not all boards have sysreset drivers available during early
167 * boot, so don't fail if one can't be found. 167 * boot, so don't fail if one can't be found.
168 */ 168 */
169 return 0; 169 return 0;
170 } 170 }
171 171
172 if (!sysreset_get_status(dev, status, sizeof(status))) 172 if (!sysreset_get_status(dev, status, sizeof(status)))
173 printf("%s", status); 173 printf("%s", status);
174 174
175 return 0; 175 return 0;
176 } 176 }
177 #endif 177 #endif
178 178
179 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU) 179 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
180 static int print_cpuinfo(void) 180 static int print_cpuinfo(void)
181 { 181 {
182 struct udevice *dev; 182 struct udevice *dev;
183 char desc[512]; 183 char desc[512];
184 int ret; 184 int ret;
185 185
186 ret = uclass_first_device_err(UCLASS_CPU, &dev); 186 dev = cpu_get_current_dev();
187 if (ret) { 187 if (!dev) {
188 debug("%s: Could not get CPU device (err = %d)\n", 188 debug("%s: Could not get CPU device\n",
189 __func__, ret); 189 __func__);
190 return ret; 190 return -ENODEV;
191 } 191 }
192 192
193 ret = cpu_get_desc(dev, desc, sizeof(desc)); 193 ret = cpu_get_desc(dev, desc, sizeof(desc));
194 if (ret) { 194 if (ret) {
195 debug("%s: Could not get CPU description (err = %d)\n", 195 debug("%s: Could not get CPU description (err = %d)\n",
196 dev->name, ret); 196 dev->name, ret);
197 return ret; 197 return ret;
198 } 198 }
199 199
200 printf("CPU: %s\n", desc); 200 printf("CPU: %s\n", desc);
201 201
202 return 0; 202 return 0;
203 } 203 }
204 #endif 204 #endif
205 205
206 static int announce_dram_init(void) 206 static int announce_dram_init(void)
207 { 207 {
208 puts("DRAM: "); 208 puts("DRAM: ");
209 return 0; 209 return 0;
210 } 210 }
211 211
212 static int show_dram_config(void) 212 static int show_dram_config(void)
213 { 213 {
214 unsigned long long size; 214 unsigned long long size;
215 215
216 #ifdef CONFIG_NR_DRAM_BANKS 216 #ifdef CONFIG_NR_DRAM_BANKS
217 int i; 217 int i;
218 218
219 debug("\nRAM Configuration:\n"); 219 debug("\nRAM Configuration:\n");
220 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 220 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
221 size += gd->bd->bi_dram[i].size; 221 size += gd->bd->bi_dram[i].size;
222 debug("Bank #%d: %llx ", i, 222 debug("Bank #%d: %llx ", i,
223 (unsigned long long)(gd->bd->bi_dram[i].start)); 223 (unsigned long long)(gd->bd->bi_dram[i].start));
224 #ifdef DEBUG 224 #ifdef DEBUG
225 print_size(gd->bd->bi_dram[i].size, "\n"); 225 print_size(gd->bd->bi_dram[i].size, "\n");
226 #endif 226 #endif
227 } 227 }
228 debug("\nDRAM: "); 228 debug("\nDRAM: ");
229 #else 229 #else
230 size = gd->ram_size; 230 size = gd->ram_size;
231 #endif 231 #endif
232 232
233 print_size(size, ""); 233 print_size(size, "");
234 board_add_ram_info(0); 234 board_add_ram_info(0);
235 putc('\n'); 235 putc('\n');
236 236
237 return 0; 237 return 0;
238 } 238 }
239 239
240 __weak int dram_init_banksize(void) 240 __weak int dram_init_banksize(void)
241 { 241 {
242 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 242 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
243 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 243 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
244 gd->bd->bi_dram[0].size = get_effective_memsize(); 244 gd->bd->bi_dram[0].size = get_effective_memsize();
245 #endif 245 #endif
246 246
247 return 0; 247 return 0;
248 } 248 }
249 249
250 #if defined(CONFIG_SYS_I2C) 250 #if defined(CONFIG_SYS_I2C)
251 static int init_func_i2c(void) 251 static int init_func_i2c(void)
252 { 252 {
253 puts("I2C: "); 253 puts("I2C: ");
254 #ifdef CONFIG_SYS_I2C 254 #ifdef CONFIG_SYS_I2C
255 i2c_init_all(); 255 i2c_init_all();
256 #else 256 #else
257 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 257 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
258 #endif 258 #endif
259 puts("ready\n"); 259 puts("ready\n");
260 return 0; 260 return 0;
261 } 261 }
262 #endif 262 #endif
263 263
264 #if defined(CONFIG_VID) 264 #if defined(CONFIG_VID)
265 __weak int init_func_vid(void) 265 __weak int init_func_vid(void)
266 { 266 {
267 return 0; 267 return 0;
268 } 268 }
269 #endif 269 #endif
270 270
271 static int setup_mon_len(void) 271 static int setup_mon_len(void)
272 { 272 {
273 #if defined(__ARM__) || defined(__MICROBLAZE__) 273 #if defined(__ARM__) || defined(__MICROBLAZE__)
274 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 274 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
275 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 275 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
276 gd->mon_len = (ulong)&_end - (ulong)_init; 276 gd->mon_len = (ulong)&_end - (ulong)_init;
277 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA) 277 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
278 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 278 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
279 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV) 279 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
280 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); 280 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
281 #elif defined(CONFIG_SYS_MONITOR_BASE) 281 #elif defined(CONFIG_SYS_MONITOR_BASE)
282 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 282 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
283 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 283 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
284 #endif 284 #endif
285 return 0; 285 return 0;
286 } 286 }
287 287
288 static int setup_spl_handoff(void) 288 static int setup_spl_handoff(void)
289 { 289 {
290 #if CONFIG_IS_ENABLED(HANDOFF) 290 #if CONFIG_IS_ENABLED(HANDOFF)
291 gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF, 291 gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
292 sizeof(struct spl_handoff)); 292 sizeof(struct spl_handoff));
293 debug("Found SPL hand-off info %p\n", gd->spl_handoff); 293 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
294 #endif 294 #endif
295 295
296 return 0; 296 return 0;
297 } 297 }
298 298
299 __weak int arch_cpu_init(void) 299 __weak int arch_cpu_init(void)
300 { 300 {
301 return 0; 301 return 0;
302 } 302 }
303 303
304 __weak int mach_cpu_init(void) 304 __weak int mach_cpu_init(void)
305 { 305 {
306 return 0; 306 return 0;
307 } 307 }
308 308
309 /* Get the top of usable RAM */ 309 /* Get the top of usable RAM */
310 __weak ulong board_get_usable_ram_top(ulong total_size) 310 __weak ulong board_get_usable_ram_top(ulong total_size)
311 { 311 {
312 #ifdef CONFIG_SYS_SDRAM_BASE 312 #ifdef CONFIG_SYS_SDRAM_BASE
313 /* 313 /*
314 * Detect whether we have so much RAM that it goes past the end of our 314 * Detect whether we have so much RAM that it goes past the end of our
315 * 32-bit address space. If so, clip the usable RAM so it doesn't. 315 * 32-bit address space. If so, clip the usable RAM so it doesn't.
316 */ 316 */
317 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 317 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
318 /* 318 /*
319 * Will wrap back to top of 32-bit space when reservations 319 * Will wrap back to top of 32-bit space when reservations
320 * are made. 320 * are made.
321 */ 321 */
322 return 0; 322 return 0;
323 #endif 323 #endif
324 return gd->ram_top; 324 return gd->ram_top;
325 } 325 }
326 326
327 static int setup_dest_addr(void) 327 static int setup_dest_addr(void)
328 { 328 {
329 debug("Monitor len: %08lX\n", gd->mon_len); 329 debug("Monitor len: %08lX\n", gd->mon_len);
330 /* 330 /*
331 * Ram is setup, size stored in gd !! 331 * Ram is setup, size stored in gd !!
332 */ 332 */
333 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 333 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
334 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 334 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
335 /* 335 /*
336 * Subtract specified amount of memory to hide so that it won't 336 * Subtract specified amount of memory to hide so that it won't
337 * get "touched" at all by U-Boot. By fixing up gd->ram_size 337 * get "touched" at all by U-Boot. By fixing up gd->ram_size
338 * the Linux kernel should now get passed the now "corrected" 338 * the Linux kernel should now get passed the now "corrected"
339 * memory size and won't touch it either. This should work 339 * memory size and won't touch it either. This should work
340 * for arch/ppc and arch/powerpc. Only Linux board ports in 340 * for arch/ppc and arch/powerpc. Only Linux board ports in
341 * arch/powerpc with bootwrapper support, that recalculate the 341 * arch/powerpc with bootwrapper support, that recalculate the
342 * memory size from the SDRAM controller setup will have to 342 * memory size from the SDRAM controller setup will have to
343 * get fixed. 343 * get fixed.
344 */ 344 */
345 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 345 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
346 #endif 346 #endif
347 #ifdef CONFIG_SYS_SDRAM_BASE 347 #ifdef CONFIG_SYS_SDRAM_BASE
348 gd->ram_base = CONFIG_SYS_SDRAM_BASE; 348 gd->ram_base = CONFIG_SYS_SDRAM_BASE;
349 #endif 349 #endif
350 gd->ram_top = gd->ram_base + get_effective_memsize(); 350 gd->ram_top = gd->ram_base + get_effective_memsize();
351 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 351 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
352 gd->relocaddr = gd->ram_top; 352 gd->relocaddr = gd->ram_top;
353 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 353 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
354 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 354 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
355 /* 355 /*
356 * We need to make sure the location we intend to put secondary core 356 * We need to make sure the location we intend to put secondary core
357 * boot code is reserved and not used by any part of u-boot 357 * boot code is reserved and not used by any part of u-boot
358 */ 358 */
359 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 359 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
360 gd->relocaddr = determine_mp_bootpg(NULL); 360 gd->relocaddr = determine_mp_bootpg(NULL);
361 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 361 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
362 } 362 }
363 #endif 363 #endif
364 return 0; 364 return 0;
365 } 365 }
366 366
367 #ifdef CONFIG_PRAM 367 #ifdef CONFIG_PRAM
368 /* reserve protected RAM */ 368 /* reserve protected RAM */
369 static int reserve_pram(void) 369 static int reserve_pram(void)
370 { 370 {
371 ulong reg; 371 ulong reg;
372 372
373 reg = env_get_ulong("pram", 10, CONFIG_PRAM); 373 reg = env_get_ulong("pram", 10, CONFIG_PRAM);
374 gd->relocaddr -= (reg << 10); /* size is in kB */ 374 gd->relocaddr -= (reg << 10); /* size is in kB */
375 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 375 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
376 gd->relocaddr); 376 gd->relocaddr);
377 return 0; 377 return 0;
378 } 378 }
379 #endif /* CONFIG_PRAM */ 379 #endif /* CONFIG_PRAM */
380 380
381 /* Round memory pointer down to next 4 kB limit */ 381 /* Round memory pointer down to next 4 kB limit */
382 static int reserve_round_4k(void) 382 static int reserve_round_4k(void)
383 { 383 {
384 gd->relocaddr &= ~(4096 - 1); 384 gd->relocaddr &= ~(4096 - 1);
385 return 0; 385 return 0;
386 } 386 }
387 387
388 #ifdef CONFIG_ARM 388 #ifdef CONFIG_ARM
389 __weak int reserve_mmu(void) 389 __weak int reserve_mmu(void)
390 { 390 {
391 #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) 391 #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
392 /* reserve TLB table */ 392 /* reserve TLB table */
393 gd->arch.tlb_size = PGTABLE_SIZE; 393 gd->arch.tlb_size = PGTABLE_SIZE;
394 gd->relocaddr -= gd->arch.tlb_size; 394 gd->relocaddr -= gd->arch.tlb_size;
395 395
396 /* round down to next 64 kB limit */ 396 /* round down to next 64 kB limit */
397 gd->relocaddr &= ~(0x10000 - 1); 397 gd->relocaddr &= ~(0x10000 - 1);
398 398
399 gd->arch.tlb_addr = gd->relocaddr; 399 gd->arch.tlb_addr = gd->relocaddr;
400 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 400 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
401 gd->arch.tlb_addr + gd->arch.tlb_size); 401 gd->arch.tlb_addr + gd->arch.tlb_size);
402 402
403 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 403 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
404 /* 404 /*
405 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten 405 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
406 * with location within secure ram. 406 * with location within secure ram.
407 */ 407 */
408 gd->arch.tlb_allocated = gd->arch.tlb_addr; 408 gd->arch.tlb_allocated = gd->arch.tlb_addr;
409 #endif 409 #endif
410 #endif 410 #endif
411 411
412 return 0; 412 return 0;
413 } 413 }
414 #endif 414 #endif
415 415
416 static int reserve_video(void) 416 static int reserve_video(void)
417 { 417 {
418 #ifdef CONFIG_DM_VIDEO 418 #ifdef CONFIG_DM_VIDEO
419 ulong addr; 419 ulong addr;
420 int ret; 420 int ret;
421 421
422 addr = gd->relocaddr; 422 addr = gd->relocaddr;
423 ret = video_reserve(&addr); 423 ret = video_reserve(&addr);
424 if (ret) 424 if (ret)
425 return ret; 425 return ret;
426 gd->relocaddr = addr; 426 gd->relocaddr = addr;
427 #elif defined(CONFIG_LCD) 427 #elif defined(CONFIG_LCD)
428 # ifdef CONFIG_FB_ADDR 428 # ifdef CONFIG_FB_ADDR
429 gd->fb_base = CONFIG_FB_ADDR; 429 gd->fb_base = CONFIG_FB_ADDR;
430 # else 430 # else
431 /* reserve memory for LCD display (always full pages) */ 431 /* reserve memory for LCD display (always full pages) */
432 gd->relocaddr = lcd_setmem(gd->relocaddr); 432 gd->relocaddr = lcd_setmem(gd->relocaddr);
433 gd->fb_base = gd->relocaddr; 433 gd->fb_base = gd->relocaddr;
434 # endif /* CONFIG_FB_ADDR */ 434 # endif /* CONFIG_FB_ADDR */
435 #endif 435 #endif
436 436
437 return 0; 437 return 0;
438 } 438 }
439 439
440 static int reserve_trace(void) 440 static int reserve_trace(void)
441 { 441 {
442 #ifdef CONFIG_TRACE 442 #ifdef CONFIG_TRACE
443 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 443 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
444 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 444 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
445 debug("Reserving %luk for trace data at: %08lx\n", 445 debug("Reserving %luk for trace data at: %08lx\n",
446 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 446 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
447 #endif 447 #endif
448 448
449 return 0; 449 return 0;
450 } 450 }
451 451
452 static int reserve_uboot(void) 452 static int reserve_uboot(void)
453 { 453 {
454 if (!(gd->flags & GD_FLG_SKIP_RELOC)) { 454 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
455 /* 455 /*
456 * reserve memory for U-Boot code, data & bss 456 * reserve memory for U-Boot code, data & bss
457 * round down to next 4 kB limit 457 * round down to next 4 kB limit
458 */ 458 */
459 gd->relocaddr -= gd->mon_len; 459 gd->relocaddr -= gd->mon_len;
460 gd->relocaddr &= ~(4096 - 1); 460 gd->relocaddr &= ~(4096 - 1);
461 #if defined(CONFIG_E500) || defined(CONFIG_MIPS) 461 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
462 /* round down to next 64 kB limit so that IVPR stays aligned */ 462 /* round down to next 64 kB limit so that IVPR stays aligned */
463 gd->relocaddr &= ~(65536 - 1); 463 gd->relocaddr &= ~(65536 - 1);
464 #endif 464 #endif
465 465
466 debug("Reserving %ldk for U-Boot at: %08lx\n", 466 debug("Reserving %ldk for U-Boot at: %08lx\n",
467 gd->mon_len >> 10, gd->relocaddr); 467 gd->mon_len >> 10, gd->relocaddr);
468 } 468 }
469 469
470 gd->start_addr_sp = gd->relocaddr; 470 gd->start_addr_sp = gd->relocaddr;
471 471
472 return 0; 472 return 0;
473 } 473 }
474 474
475 #ifdef CONFIG_SYS_NONCACHED_MEMORY 475 #ifdef CONFIG_SYS_NONCACHED_MEMORY
476 static int reserve_noncached(void) 476 static int reserve_noncached(void)
477 { 477 {
478 /* 478 /*
479 * The value of gd->start_addr_sp must match the value of malloc_start 479 * The value of gd->start_addr_sp must match the value of malloc_start
480 * calculated in boatrd_f.c:initr_malloc(), which is passed to 480 * calculated in boatrd_f.c:initr_malloc(), which is passed to
481 * board_r.c:mem_malloc_init() and then used by 481 * board_r.c:mem_malloc_init() and then used by
482 * cache.c:noncached_init() 482 * cache.c:noncached_init()
483 * 483 *
484 * These calculations must match the code in cache.c:noncached_init() 484 * These calculations must match the code in cache.c:noncached_init()
485 */ 485 */
486 gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) - 486 gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
487 MMU_SECTION_SIZE; 487 MMU_SECTION_SIZE;
488 gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY, 488 gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
489 MMU_SECTION_SIZE); 489 MMU_SECTION_SIZE);
490 debug("Reserving %dM for noncached_alloc() at: %08lx\n", 490 debug("Reserving %dM for noncached_alloc() at: %08lx\n",
491 CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp); 491 CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
492 492
493 return 0; 493 return 0;
494 } 494 }
495 #endif 495 #endif
496 496
497 /* reserve memory for malloc() area */ 497 /* reserve memory for malloc() area */
498 static int reserve_malloc(void) 498 static int reserve_malloc(void)
499 { 499 {
500 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 500 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
501 debug("Reserving %dk for malloc() at: %08lx\n", 501 debug("Reserving %dk for malloc() at: %08lx\n",
502 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 502 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
503 #ifdef CONFIG_SYS_NONCACHED_MEMORY 503 #ifdef CONFIG_SYS_NONCACHED_MEMORY
504 reserve_noncached(); 504 reserve_noncached();
505 #endif 505 #endif
506 506
507 return 0; 507 return 0;
508 } 508 }
509 509
510 /* (permanently) allocate a Board Info struct */ 510 /* (permanently) allocate a Board Info struct */
511 static int reserve_board(void) 511 static int reserve_board(void)
512 { 512 {
513 if (!gd->bd) { 513 if (!gd->bd) {
514 gd->start_addr_sp -= sizeof(bd_t); 514 gd->start_addr_sp -= sizeof(bd_t);
515 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 515 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
516 memset(gd->bd, '\0', sizeof(bd_t)); 516 memset(gd->bd, '\0', sizeof(bd_t));
517 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 517 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
518 sizeof(bd_t), gd->start_addr_sp); 518 sizeof(bd_t), gd->start_addr_sp);
519 } 519 }
520 return 0; 520 return 0;
521 } 521 }
522 522
523 static int setup_machine(void) 523 static int setup_machine(void)
524 { 524 {
525 #ifdef CONFIG_MACH_TYPE 525 #ifdef CONFIG_MACH_TYPE
526 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 526 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
527 #endif 527 #endif
528 return 0; 528 return 0;
529 } 529 }
530 530
531 static int reserve_global_data(void) 531 static int reserve_global_data(void)
532 { 532 {
533 gd->start_addr_sp -= sizeof(gd_t); 533 gd->start_addr_sp -= sizeof(gd_t);
534 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 534 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
535 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 535 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
536 sizeof(gd_t), gd->start_addr_sp); 536 sizeof(gd_t), gd->start_addr_sp);
537 return 0; 537 return 0;
538 } 538 }
539 539
540 static int reserve_fdt(void) 540 static int reserve_fdt(void)
541 { 541 {
542 #ifndef CONFIG_OF_EMBED 542 #ifndef CONFIG_OF_EMBED
543 /* 543 /*
544 * If the device tree is sitting immediately above our image then we 544 * If the device tree is sitting immediately above our image then we
545 * must relocate it. If it is embedded in the data section, then it 545 * must relocate it. If it is embedded in the data section, then it
546 * will be relocated with other data. 546 * will be relocated with other data.
547 */ 547 */
548 if (gd->fdt_blob) { 548 if (gd->fdt_blob) {
549 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 549 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
550 550
551 gd->start_addr_sp -= gd->fdt_size; 551 gd->start_addr_sp -= gd->fdt_size;
552 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 552 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
553 debug("Reserving %lu Bytes for FDT at: %08lx\n", 553 debug("Reserving %lu Bytes for FDT at: %08lx\n",
554 gd->fdt_size, gd->start_addr_sp); 554 gd->fdt_size, gd->start_addr_sp);
555 } 555 }
556 #endif 556 #endif
557 557
558 return 0; 558 return 0;
559 } 559 }
560 560
561 static int reserve_bootstage(void) 561 static int reserve_bootstage(void)
562 { 562 {
563 #ifdef CONFIG_BOOTSTAGE 563 #ifdef CONFIG_BOOTSTAGE
564 int size = bootstage_get_size(); 564 int size = bootstage_get_size();
565 565
566 gd->start_addr_sp -= size; 566 gd->start_addr_sp -= size;
567 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size); 567 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
568 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size, 568 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
569 gd->start_addr_sp); 569 gd->start_addr_sp);
570 #endif 570 #endif
571 571
572 return 0; 572 return 0;
573 } 573 }
574 574
575 __weak int arch_reserve_stacks(void) 575 __weak int arch_reserve_stacks(void)
576 { 576 {
577 return 0; 577 return 0;
578 } 578 }
579 579
580 static int reserve_stacks(void) 580 static int reserve_stacks(void)
581 { 581 {
582 /* make stack pointer 16-byte aligned */ 582 /* make stack pointer 16-byte aligned */
583 gd->start_addr_sp -= 16; 583 gd->start_addr_sp -= 16;
584 gd->start_addr_sp &= ~0xf; 584 gd->start_addr_sp &= ~0xf;
585 585
586 /* 586 /*
587 * let the architecture-specific code tailor gd->start_addr_sp and 587 * let the architecture-specific code tailor gd->start_addr_sp and
588 * gd->irq_sp 588 * gd->irq_sp
589 */ 589 */
590 return arch_reserve_stacks(); 590 return arch_reserve_stacks();
591 } 591 }
592 592
593 static int reserve_bloblist(void) 593 static int reserve_bloblist(void)
594 { 594 {
595 #ifdef CONFIG_BLOBLIST 595 #ifdef CONFIG_BLOBLIST
596 gd->start_addr_sp &= ~0xf; 596 gd->start_addr_sp &= ~0xf;
597 gd->start_addr_sp -= CONFIG_BLOBLIST_SIZE; 597 gd->start_addr_sp -= CONFIG_BLOBLIST_SIZE;
598 gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE); 598 gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
599 #endif 599 #endif
600 600
601 return 0; 601 return 0;
602 } 602 }
603 603
604 static int display_new_sp(void) 604 static int display_new_sp(void)
605 { 605 {
606 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 606 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
607 607
608 return 0; 608 return 0;
609 } 609 }
610 610
611 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 611 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
612 defined(CONFIG_SH) 612 defined(CONFIG_SH)
613 static int setup_board_part1(void) 613 static int setup_board_part1(void)
614 { 614 {
615 bd_t *bd = gd->bd; 615 bd_t *bd = gd->bd;
616 616
617 /* 617 /*
618 * Save local variables to board info struct 618 * Save local variables to board info struct
619 */ 619 */
620 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 620 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
621 bd->bi_memsize = gd->ram_size; /* size in bytes */ 621 bd->bi_memsize = gd->ram_size; /* size in bytes */
622 622
623 #ifdef CONFIG_SYS_SRAM_BASE 623 #ifdef CONFIG_SYS_SRAM_BASE
624 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 624 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
625 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 625 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
626 #endif 626 #endif
627 627
628 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 628 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
629 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 629 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
630 #endif 630 #endif
631 #if defined(CONFIG_M68K) 631 #if defined(CONFIG_M68K)
632 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 632 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
633 #endif 633 #endif
634 #if defined(CONFIG_MPC83xx) 634 #if defined(CONFIG_MPC83xx)
635 bd->bi_immrbar = CONFIG_SYS_IMMR; 635 bd->bi_immrbar = CONFIG_SYS_IMMR;
636 #endif 636 #endif
637 637
638 return 0; 638 return 0;
639 } 639 }
640 #endif 640 #endif
641 641
642 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 642 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
643 static int setup_board_part2(void) 643 static int setup_board_part2(void)
644 { 644 {
645 bd_t *bd = gd->bd; 645 bd_t *bd = gd->bd;
646 646
647 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 647 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
648 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 648 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
649 #if defined(CONFIG_CPM2) 649 #if defined(CONFIG_CPM2)
650 bd->bi_cpmfreq = gd->arch.cpm_clk; 650 bd->bi_cpmfreq = gd->arch.cpm_clk;
651 bd->bi_brgfreq = gd->arch.brg_clk; 651 bd->bi_brgfreq = gd->arch.brg_clk;
652 bd->bi_sccfreq = gd->arch.scc_clk; 652 bd->bi_sccfreq = gd->arch.scc_clk;
653 bd->bi_vco = gd->arch.vco_out; 653 bd->bi_vco = gd->arch.vco_out;
654 #endif /* CONFIG_CPM2 */ 654 #endif /* CONFIG_CPM2 */
655 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 655 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
656 bd->bi_pcifreq = gd->pci_clk; 656 bd->bi_pcifreq = gd->pci_clk;
657 #endif 657 #endif
658 #if defined(CONFIG_EXTRA_CLOCK) 658 #if defined(CONFIG_EXTRA_CLOCK)
659 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 659 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
660 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 660 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
661 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 661 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
662 #endif 662 #endif
663 663
664 return 0; 664 return 0;
665 } 665 }
666 #endif 666 #endif
667 667
668 #ifdef CONFIG_POST 668 #ifdef CONFIG_POST
669 static int init_post(void) 669 static int init_post(void)
670 { 670 {
671 post_bootmode_init(); 671 post_bootmode_init();
672 post_run(NULL, POST_ROM | post_bootmode_get(0)); 672 post_run(NULL, POST_ROM | post_bootmode_get(0));
673 673
674 return 0; 674 return 0;
675 } 675 }
676 #endif 676 #endif
677 677
678 static int reloc_fdt(void) 678 static int reloc_fdt(void)
679 { 679 {
680 #ifndef CONFIG_OF_EMBED 680 #ifndef CONFIG_OF_EMBED
681 if (gd->flags & GD_FLG_SKIP_RELOC) 681 if (gd->flags & GD_FLG_SKIP_RELOC)
682 return 0; 682 return 0;
683 if (gd->new_fdt) { 683 if (gd->new_fdt) {
684 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 684 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
685 gd->fdt_blob = gd->new_fdt; 685 gd->fdt_blob = gd->new_fdt;
686 } 686 }
687 #endif 687 #endif
688 688
689 return 0; 689 return 0;
690 } 690 }
691 691
692 static int reloc_bootstage(void) 692 static int reloc_bootstage(void)
693 { 693 {
694 #ifdef CONFIG_BOOTSTAGE 694 #ifdef CONFIG_BOOTSTAGE
695 if (gd->flags & GD_FLG_SKIP_RELOC) 695 if (gd->flags & GD_FLG_SKIP_RELOC)
696 return 0; 696 return 0;
697 if (gd->new_bootstage) { 697 if (gd->new_bootstage) {
698 int size = bootstage_get_size(); 698 int size = bootstage_get_size();
699 699
700 debug("Copying bootstage from %p to %p, size %x\n", 700 debug("Copying bootstage from %p to %p, size %x\n",
701 gd->bootstage, gd->new_bootstage, size); 701 gd->bootstage, gd->new_bootstage, size);
702 memcpy(gd->new_bootstage, gd->bootstage, size); 702 memcpy(gd->new_bootstage, gd->bootstage, size);
703 gd->bootstage = gd->new_bootstage; 703 gd->bootstage = gd->new_bootstage;
704 bootstage_relocate(); 704 bootstage_relocate();
705 } 705 }
706 #endif 706 #endif
707 707
708 return 0; 708 return 0;
709 } 709 }
710 710
711 static int reloc_bloblist(void) 711 static int reloc_bloblist(void)
712 { 712 {
713 #ifdef CONFIG_BLOBLIST 713 #ifdef CONFIG_BLOBLIST
714 if (gd->flags & GD_FLG_SKIP_RELOC) 714 if (gd->flags & GD_FLG_SKIP_RELOC)
715 return 0; 715 return 0;
716 if (gd->new_bloblist) { 716 if (gd->new_bloblist) {
717 int size = CONFIG_BLOBLIST_SIZE; 717 int size = CONFIG_BLOBLIST_SIZE;
718 718
719 debug("Copying bloblist from %p to %p, size %x\n", 719 debug("Copying bloblist from %p to %p, size %x\n",
720 gd->bloblist, gd->new_bloblist, size); 720 gd->bloblist, gd->new_bloblist, size);
721 memcpy(gd->new_bloblist, gd->bloblist, size); 721 memcpy(gd->new_bloblist, gd->bloblist, size);
722 gd->bloblist = gd->new_bloblist; 722 gd->bloblist = gd->new_bloblist;
723 } 723 }
724 #endif 724 #endif
725 725
726 return 0; 726 return 0;
727 } 727 }
728 728
729 static int setup_reloc(void) 729 static int setup_reloc(void)
730 { 730 {
731 if (gd->flags & GD_FLG_SKIP_RELOC) { 731 if (gd->flags & GD_FLG_SKIP_RELOC) {
732 debug("Skipping relocation due to flag\n"); 732 debug("Skipping relocation due to flag\n");
733 return 0; 733 return 0;
734 } 734 }
735 735
736 #ifdef CONFIG_SYS_TEXT_BASE 736 #ifdef CONFIG_SYS_TEXT_BASE
737 #ifdef ARM 737 #ifdef ARM
738 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start; 738 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
739 #elif defined(CONFIG_M68K) 739 #elif defined(CONFIG_M68K)
740 /* 740 /*
741 * On all ColdFire arch cpu, monitor code starts always 741 * On all ColdFire arch cpu, monitor code starts always
742 * just after the default vector table location, so at 0x400 742 * just after the default vector table location, so at 0x400
743 */ 743 */
744 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 744 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
745 #elif !defined(CONFIG_SANDBOX) 745 #elif !defined(CONFIG_SANDBOX)
746 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 746 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
747 #endif 747 #endif
748 #endif 748 #endif
749 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 749 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
750 750
751 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 751 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
752 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 752 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
753 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 753 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
754 gd->start_addr_sp); 754 gd->start_addr_sp);
755 755
756 return 0; 756 return 0;
757 } 757 }
758 758
759 #ifdef CONFIG_OF_BOARD_FIXUP 759 #ifdef CONFIG_OF_BOARD_FIXUP
760 static int fix_fdt(void) 760 static int fix_fdt(void)
761 { 761 {
762 return board_fix_fdt((void *)gd->fdt_blob); 762 return board_fix_fdt((void *)gd->fdt_blob);
763 } 763 }
764 #endif 764 #endif
765 765
766 /* ARM calls relocate_code from its crt0.S */ 766 /* ARM calls relocate_code from its crt0.S */
767 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 767 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
768 !CONFIG_IS_ENABLED(X86_64) 768 !CONFIG_IS_ENABLED(X86_64)
769 769
770 static int jump_to_copy(void) 770 static int jump_to_copy(void)
771 { 771 {
772 if (gd->flags & GD_FLG_SKIP_RELOC) 772 if (gd->flags & GD_FLG_SKIP_RELOC)
773 return 0; 773 return 0;
774 /* 774 /*
775 * x86 is special, but in a nice way. It uses a trampoline which 775 * x86 is special, but in a nice way. It uses a trampoline which
776 * enables the dcache if possible. 776 * enables the dcache if possible.
777 * 777 *
778 * For now, other archs use relocate_code(), which is implemented 778 * For now, other archs use relocate_code(), which is implemented
779 * similarly for all archs. When we do generic relocation, hopefully 779 * similarly for all archs. When we do generic relocation, hopefully
780 * we can make all archs enable the dcache prior to relocation. 780 * we can make all archs enable the dcache prior to relocation.
781 */ 781 */
782 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 782 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
783 /* 783 /*
784 * SDRAM and console are now initialised. The final stack can now 784 * SDRAM and console are now initialised. The final stack can now
785 * be setup in SDRAM. Code execution will continue in Flash, but 785 * be setup in SDRAM. Code execution will continue in Flash, but
786 * with the stack in SDRAM and Global Data in temporary memory 786 * with the stack in SDRAM and Global Data in temporary memory
787 * (CPU cache) 787 * (CPU cache)
788 */ 788 */
789 arch_setup_gd(gd->new_gd); 789 arch_setup_gd(gd->new_gd);
790 board_init_f_r_trampoline(gd->start_addr_sp); 790 board_init_f_r_trampoline(gd->start_addr_sp);
791 #else 791 #else
792 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 792 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
793 #endif 793 #endif
794 794
795 return 0; 795 return 0;
796 } 796 }
797 #endif 797 #endif
798 798
799 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 799 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
800 static int initf_bootstage(void) 800 static int initf_bootstage(void)
801 { 801 {
802 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) && 802 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
803 IS_ENABLED(CONFIG_BOOTSTAGE_STASH); 803 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
804 int ret; 804 int ret;
805 805
806 ret = bootstage_init(!from_spl); 806 ret = bootstage_init(!from_spl);
807 if (ret) 807 if (ret)
808 return ret; 808 return ret;
809 if (from_spl) { 809 if (from_spl) {
810 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR, 810 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
811 CONFIG_BOOTSTAGE_STASH_SIZE); 811 CONFIG_BOOTSTAGE_STASH_SIZE);
812 812
813 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE); 813 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
814 if (ret && ret != -ENOENT) { 814 if (ret && ret != -ENOENT) {
815 debug("Failed to unstash bootstage: err=%d\n", ret); 815 debug("Failed to unstash bootstage: err=%d\n", ret);
816 return ret; 816 return ret;
817 } 817 }
818 } 818 }
819 819
820 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 820 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
821 821
822 return 0; 822 return 0;
823 } 823 }
824 824
825 static int initf_console_record(void) 825 static int initf_console_record(void)
826 { 826 {
827 #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN) 827 #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
828 return console_record_init(); 828 return console_record_init();
829 #else 829 #else
830 return 0; 830 return 0;
831 #endif 831 #endif
832 } 832 }
833 833
834 static int initf_dm(void) 834 static int initf_dm(void)
835 { 835 {
836 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN) 836 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
837 int ret; 837 int ret;
838 838
839 bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f"); 839 bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
840 ret = dm_init_and_scan(true); 840 ret = dm_init_and_scan(true);
841 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F); 841 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
842 if (ret) 842 if (ret)
843 return ret; 843 return ret;
844 #endif 844 #endif
845 #ifdef CONFIG_TIMER_EARLY 845 #ifdef CONFIG_TIMER_EARLY
846 ret = dm_timer_init(); 846 ret = dm_timer_init();
847 if (ret) 847 if (ret)
848 return ret; 848 return ret;
849 #endif 849 #endif
850 850
851 return 0; 851 return 0;
852 } 852 }
853 853
854 /* Architecture-specific memory reservation */ 854 /* Architecture-specific memory reservation */
855 __weak int reserve_arch(void) 855 __weak int reserve_arch(void)
856 { 856 {
857 return 0; 857 return 0;
858 } 858 }
859 859
860 __weak int arch_cpu_init_dm(void) 860 __weak int arch_cpu_init_dm(void)
861 { 861 {
862 return 0; 862 return 0;
863 } 863 }
864 864
865 __weak int checkcpu(void) 865 __weak int checkcpu(void)
866 { 866 {
867 return 0; 867 return 0;
868 } 868 }
869 869
870 __weak int clear_bss(void) 870 __weak int clear_bss(void)
871 { 871 {
872 return 0; 872 return 0;
873 } 873 }
874 874
875 static const init_fnc_t init_sequence_f[] = { 875 static const init_fnc_t init_sequence_f[] = {
876 setup_mon_len, 876 setup_mon_len,
877 #ifdef CONFIG_OF_CONTROL 877 #ifdef CONFIG_OF_CONTROL
878 fdtdec_setup, 878 fdtdec_setup,
879 #endif 879 #endif
880 #ifdef CONFIG_TRACE_EARLY 880 #ifdef CONFIG_TRACE_EARLY
881 trace_early_init, 881 trace_early_init,
882 #endif 882 #endif
883 initf_malloc, 883 initf_malloc,
884 log_init, 884 log_init,
885 initf_bootstage, /* uses its own timer, so does not need DM */ 885 initf_bootstage, /* uses its own timer, so does not need DM */
886 #ifdef CONFIG_BLOBLIST 886 #ifdef CONFIG_BLOBLIST
887 bloblist_init, 887 bloblist_init,
888 #endif 888 #endif
889 setup_spl_handoff, 889 setup_spl_handoff,
890 initf_console_record, 890 initf_console_record,
891 #if defined(CONFIG_HAVE_FSP) 891 #if defined(CONFIG_HAVE_FSP)
892 arch_fsp_init, 892 arch_fsp_init,
893 #endif 893 #endif
894 arch_cpu_init, /* basic arch cpu dependent setup */ 894 arch_cpu_init, /* basic arch cpu dependent setup */
895 mach_cpu_init, /* SoC/machine dependent CPU setup */ 895 mach_cpu_init, /* SoC/machine dependent CPU setup */
896 initf_dm, 896 initf_dm,
897 arch_cpu_init_dm, 897 arch_cpu_init_dm,
898 #if defined(CONFIG_BOARD_EARLY_INIT_F) 898 #if defined(CONFIG_BOARD_EARLY_INIT_F)
899 board_early_init_f, 899 board_early_init_f,
900 #endif 900 #endif
901 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) 901 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
902 /* get CPU and bus clocks according to the environment variable */ 902 /* get CPU and bus clocks according to the environment variable */
903 get_clocks, /* get CPU and bus clocks (etc.) */ 903 get_clocks, /* get CPU and bus clocks (etc.) */
904 #endif 904 #endif
905 #if !defined(CONFIG_M68K) 905 #if !defined(CONFIG_M68K)
906 timer_init, /* initialize timer */ 906 timer_init, /* initialize timer */
907 #endif 907 #endif
908 #if defined(CONFIG_BOARD_POSTCLK_INIT) 908 #if defined(CONFIG_BOARD_POSTCLK_INIT)
909 board_postclk_init, 909 board_postclk_init,
910 #endif 910 #endif
911 env_init, /* initialize environment */ 911 env_init, /* initialize environment */
912 init_baud_rate, /* initialze baudrate settings */ 912 init_baud_rate, /* initialze baudrate settings */
913 serial_init, /* serial communications setup */ 913 serial_init, /* serial communications setup */
914 console_init_f, /* stage 1 init of console */ 914 console_init_f, /* stage 1 init of console */
915 display_options, /* say that we are here */ 915 display_options, /* say that we are here */
916 display_text_info, /* show debugging info if required */ 916 display_text_info, /* show debugging info if required */
917 checkcpu, 917 checkcpu,
918 #if defined(CONFIG_SYSRESET) 918 #if defined(CONFIG_SYSRESET)
919 print_resetinfo, 919 print_resetinfo,
920 #endif 920 #endif
921 #if defined(CONFIG_DISPLAY_CPUINFO) 921 #if defined(CONFIG_DISPLAY_CPUINFO)
922 print_cpuinfo, /* display cpu info (and speed) */ 922 print_cpuinfo, /* display cpu info (and speed) */
923 #endif 923 #endif
924 #if defined(CONFIG_DTB_RESELECT) 924 #if defined(CONFIG_DTB_RESELECT)
925 embedded_dtb_select, 925 embedded_dtb_select,
926 #endif 926 #endif
927 #if defined(CONFIG_DISPLAY_BOARDINFO) 927 #if defined(CONFIG_DISPLAY_BOARDINFO)
928 show_board_info, 928 show_board_info,
929 #endif 929 #endif
930 INIT_FUNC_WATCHDOG_INIT 930 INIT_FUNC_WATCHDOG_INIT
931 #if defined(CONFIG_MISC_INIT_F) 931 #if defined(CONFIG_MISC_INIT_F)
932 misc_init_f, 932 misc_init_f,
933 #endif 933 #endif
934 INIT_FUNC_WATCHDOG_RESET 934 INIT_FUNC_WATCHDOG_RESET
935 #if defined(CONFIG_SYS_I2C) 935 #if defined(CONFIG_SYS_I2C)
936 init_func_i2c, 936 init_func_i2c,
937 #endif 937 #endif
938 #if defined(CONFIG_VID) && !defined(CONFIG_SPL) 938 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
939 init_func_vid, 939 init_func_vid,
940 #endif 940 #endif
941 announce_dram_init, 941 announce_dram_init,
942 dram_init, /* configure available RAM banks */ 942 dram_init, /* configure available RAM banks */
943 #ifdef CONFIG_POST 943 #ifdef CONFIG_POST
944 post_init_f, 944 post_init_f,
945 #endif 945 #endif
946 INIT_FUNC_WATCHDOG_RESET 946 INIT_FUNC_WATCHDOG_RESET
947 #if defined(CONFIG_SYS_DRAM_TEST) 947 #if defined(CONFIG_SYS_DRAM_TEST)
948 testdram, 948 testdram,
949 #endif /* CONFIG_SYS_DRAM_TEST */ 949 #endif /* CONFIG_SYS_DRAM_TEST */
950 INIT_FUNC_WATCHDOG_RESET 950 INIT_FUNC_WATCHDOG_RESET
951 951
952 #ifdef CONFIG_POST 952 #ifdef CONFIG_POST
953 init_post, 953 init_post,
954 #endif 954 #endif
955 INIT_FUNC_WATCHDOG_RESET 955 INIT_FUNC_WATCHDOG_RESET
956 /* 956 /*
957 * Now that we have DRAM mapped and working, we can 957 * Now that we have DRAM mapped and working, we can
958 * relocate the code and continue running from DRAM. 958 * relocate the code and continue running from DRAM.
959 * 959 *
960 * Reserve memory at end of RAM for (top down in that order): 960 * Reserve memory at end of RAM for (top down in that order):
961 * - area that won't get touched by U-Boot and Linux (optional) 961 * - area that won't get touched by U-Boot and Linux (optional)
962 * - kernel log buffer 962 * - kernel log buffer
963 * - protected RAM 963 * - protected RAM
964 * - LCD framebuffer 964 * - LCD framebuffer
965 * - monitor code 965 * - monitor code
966 * - board info struct 966 * - board info struct
967 */ 967 */
968 setup_dest_addr, 968 setup_dest_addr,
969 #ifdef CONFIG_PRAM 969 #ifdef CONFIG_PRAM
970 reserve_pram, 970 reserve_pram,
971 #endif 971 #endif
972 reserve_round_4k, 972 reserve_round_4k,
973 #ifdef CONFIG_ARM 973 #ifdef CONFIG_ARM
974 reserve_mmu, 974 reserve_mmu,
975 #endif 975 #endif
976 reserve_video, 976 reserve_video,
977 reserve_trace, 977 reserve_trace,
978 reserve_uboot, 978 reserve_uboot,
979 reserve_malloc, 979 reserve_malloc,
980 reserve_board, 980 reserve_board,
981 setup_machine, 981 setup_machine,
982 reserve_global_data, 982 reserve_global_data,
983 reserve_fdt, 983 reserve_fdt,
984 reserve_bootstage, 984 reserve_bootstage,
985 reserve_bloblist, 985 reserve_bloblist,
986 reserve_arch, 986 reserve_arch,
987 reserve_stacks, 987 reserve_stacks,
988 dram_init_banksize, 988 dram_init_banksize,
989 show_dram_config, 989 show_dram_config,
990 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 990 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
991 defined(CONFIG_SH) 991 defined(CONFIG_SH)
992 setup_board_part1, 992 setup_board_part1,
993 #endif 993 #endif
994 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 994 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
995 INIT_FUNC_WATCHDOG_RESET 995 INIT_FUNC_WATCHDOG_RESET
996 setup_board_part2, 996 setup_board_part2,
997 #endif 997 #endif
998 display_new_sp, 998 display_new_sp,
999 #ifdef CONFIG_OF_BOARD_FIXUP 999 #ifdef CONFIG_OF_BOARD_FIXUP
1000 fix_fdt, 1000 fix_fdt,
1001 #endif 1001 #endif
1002 INIT_FUNC_WATCHDOG_RESET 1002 INIT_FUNC_WATCHDOG_RESET
1003 reloc_fdt, 1003 reloc_fdt,
1004 reloc_bootstage, 1004 reloc_bootstage,
1005 reloc_bloblist, 1005 reloc_bloblist,
1006 setup_reloc, 1006 setup_reloc,
1007 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 1007 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1008 copy_uboot_to_ram, 1008 copy_uboot_to_ram,
1009 do_elf_reloc_fixups, 1009 do_elf_reloc_fixups,
1010 #endif 1010 #endif
1011 clear_bss, 1011 clear_bss,
1012 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 1012 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1013 !CONFIG_IS_ENABLED(X86_64) 1013 !CONFIG_IS_ENABLED(X86_64)
1014 jump_to_copy, 1014 jump_to_copy,
1015 #endif 1015 #endif
1016 NULL, 1016 NULL,
1017 }; 1017 };
1018 1018
1019 void board_init_f(ulong boot_flags) 1019 void board_init_f(ulong boot_flags)
1020 { 1020 {
1021 gd->flags = boot_flags; 1021 gd->flags = boot_flags;
1022 gd->have_console = 0; 1022 gd->have_console = 0;
1023 1023
1024 if (initcall_run_list(init_sequence_f)) 1024 if (initcall_run_list(init_sequence_f))
1025 hang(); 1025 hang();
1026 1026
1027 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 1027 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1028 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \ 1028 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
1029 !defined(CONFIG_ARC) 1029 !defined(CONFIG_ARC)
1030 /* NOTREACHED - jump_to_copy() does not return */ 1030 /* NOTREACHED - jump_to_copy() does not return */
1031 hang(); 1031 hang();
1032 #endif 1032 #endif
1033 } 1033 }
1034 1034
1035 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 1035 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1036 /* 1036 /*
1037 * For now this code is only used on x86. 1037 * For now this code is only used on x86.
1038 * 1038 *
1039 * init_sequence_f_r is the list of init functions which are run when 1039 * init_sequence_f_r is the list of init functions which are run when
1040 * U-Boot is executing from Flash with a semi-limited 'C' environment. 1040 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1041 * The following limitations must be considered when implementing an 1041 * The following limitations must be considered when implementing an
1042 * '_f_r' function: 1042 * '_f_r' function:
1043 * - 'static' variables are read-only 1043 * - 'static' variables are read-only
1044 * - Global Data (gd->xxx) is read/write 1044 * - Global Data (gd->xxx) is read/write
1045 * 1045 *
1046 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 1046 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1047 * supported). It _should_, if possible, copy global data to RAM and 1047 * supported). It _should_, if possible, copy global data to RAM and
1048 * initialise the CPU caches (to speed up the relocation process) 1048 * initialise the CPU caches (to speed up the relocation process)
1049 * 1049 *
1050 * NOTE: At present only x86 uses this route, but it is intended that 1050 * NOTE: At present only x86 uses this route, but it is intended that
1051 * all archs will move to this when generic relocation is implemented. 1051 * all archs will move to this when generic relocation is implemented.
1052 */ 1052 */
1053 static const init_fnc_t init_sequence_f_r[] = { 1053 static const init_fnc_t init_sequence_f_r[] = {
1054 #if !CONFIG_IS_ENABLED(X86_64) 1054 #if !CONFIG_IS_ENABLED(X86_64)
1055 init_cache_f_r, 1055 init_cache_f_r,
1056 #endif 1056 #endif
1057 1057
1058 NULL, 1058 NULL,
1059 }; 1059 };
1060 1060
1061 void board_init_f_r(void) 1061 void board_init_f_r(void)
1062 { 1062 {
1063 if (initcall_run_list(init_sequence_f_r)) 1063 if (initcall_run_list(init_sequence_f_r))
1064 hang(); 1064 hang();
1065 1065
1066 /* 1066 /*
1067 * The pre-relocation drivers may be using memory that has now gone 1067 * The pre-relocation drivers may be using memory that has now gone
1068 * away. Mark serial as unavailable - this will fall back to the debug 1068 * away. Mark serial as unavailable - this will fall back to the debug
1069 * UART if available. 1069 * UART if available.
1070 * 1070 *
1071 * Do the same with log drivers since the memory may not be available. 1071 * Do the same with log drivers since the memory may not be available.
1072 */ 1072 */
1073 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY); 1073 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
1074 #ifdef CONFIG_TIMER 1074 #ifdef CONFIG_TIMER
1075 gd->timer = NULL; 1075 gd->timer = NULL;
1076 #endif 1076 #endif
1077 1077
1078 /* 1078 /*
1079 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1079 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1080 * Transfer execution from Flash to RAM by calculating the address 1080 * Transfer execution from Flash to RAM by calculating the address
1081 * of the in-RAM copy of board_init_r() and calling it 1081 * of the in-RAM copy of board_init_r() and calling it
1082 */ 1082 */
1083 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 1083 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1084 1084
1085 /* NOTREACHED - board_init_r() does not return */ 1085 /* NOTREACHED - board_init_r() does not return */
1086 hang(); 1086 hang();
1087 } 1087 }
1088 #endif /* CONFIG_X86 */ 1088 #endif /* CONFIG_X86 */
1089 1089