Eric Lee / smarc-uboot | Embedian Git Server

Commit 3bf2f15351e9533c9c99ebbdd93cafca30558b0d

Authored by Thierry Reding 2019-04-15 16:08:21 +0800

Committed by Simon Glass 2019-05-22 07:33:23 +0800

Exists in smarc_8mq_lf_v2020.04 and in 12 other branches

fdtdec: Remove fdt_{addr,size}_unpack()

U-Boot already defines the {upper,lower}_32_bits() macros that have the
same purpose. Use the existing macros instead of defining new APIs.

Signed-off-by: Thierry Reding <treding@nvidia.com>

Showing 3 changed files with 12 additions and 28 deletions Inline Diff

include/fdtdec.h
lib/fdtdec.c
lib/fdtdec_test.c

include/fdtdec.h

Diff comments View file @ 3bf2f15

 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (c) 2011 The Chromium OS Authors.
  */
 #ifndef __fdtdec_h
 #define __fdtdec_h
 /*
  * This file contains convenience functions for decoding useful and
  * enlightening information from FDTs. It is intended to be used by device
  * drivers and board-specific code within U-Boot. It aims to reduce the
  * amount of FDT munging required within U-Boot itself, so that driver code
  * changes to support FDT are minimized.
  */
 #include <linux/libfdt.h>
 #include <pci.h>
 /*
  * A typedef for a physical address. Note that fdt data is always big
  * endian even on a litle endian machine.
  */
 typedef phys_addr_t fdt_addr_t;
 typedef phys_size_t fdt_size_t;
-static inline fdt32_t fdt_addr_unpack(fdt_addr_t addr, fdt32_t *upper)
-{
-	if (upper)
-#ifdef CONFIG_PHYS_64BIT
-		*upper = addr >> 32;
-#else
-		*upper = 0;
-#endif
-	return addr;
-}
-static inline fdt32_t fdt_size_unpack(fdt_size_t size, fdt32_t *upper)
-{
-	if (upper)
-#ifdef CONFIG_PHYS_64BIT
-		*upper = size >> 32;
-#else
-		*upper = 0;
-#endif
-	return size;
-}
 #ifdef CONFIG_PHYS_64BIT
 #define FDT_ADDR_T_NONE (-1U)
 #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
 #define fdt_size_to_cpu(reg) be64_to_cpu(reg)
 #define cpu_to_fdt_addr(reg) cpu_to_be64(reg)
 #define cpu_to_fdt_size(reg) cpu_to_be64(reg)
 typedef fdt64_t fdt_val_t;
 #else
 #define FDT_ADDR_T_NONE (-1U)
 #define fdt_addr_to_cpu(reg) be32_to_cpu(reg)
 #define fdt_size_to_cpu(reg) be32_to_cpu(reg)
 #define cpu_to_fdt_addr(reg) cpu_to_be32(reg)
 #define cpu_to_fdt_size(reg) cpu_to_be32(reg)
 typedef fdt32_t fdt_val_t;
 #endif
 /* Information obtained about memory from the FDT */
 struct fdt_memory {
 	fdt_addr_t start;
 	fdt_addr_t end;
 };
 struct bd_info;
 #ifdef CONFIG_SPL_BUILD
 #define SPL_BUILD	1
 #else
 #define SPL_BUILD	0
 #endif
 #if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
 extern phys_addr_t prior_stage_fdt_address;
 #endif
 /*
  * Information about a resource. start is the first address of the resource
  * and end is the last address (inclusive). The length of the resource will
  * be equal to: end - start + 1.
  */
 struct fdt_resource {
 	fdt_addr_t start;
 	fdt_addr_t end;
 };
 enum fdt_pci_space {
 	FDT_PCI_SPACE_CONFIG = 0,
 	FDT_PCI_SPACE_IO = 0x01000000,
 	FDT_PCI_SPACE_MEM32 = 0x02000000,
 	FDT_PCI_SPACE_MEM64 = 0x03000000,
 	FDT_PCI_SPACE_MEM32_PREF = 0x42000000,
 	FDT_PCI_SPACE_MEM64_PREF = 0x43000000,
 };
 #define FDT_PCI_ADDR_CELLS	3
 #define FDT_PCI_SIZE_CELLS	2
 #define FDT_PCI_REG_SIZE	\
 	((FDT_PCI_ADDR_CELLS + FDT_PCI_SIZE_CELLS) * sizeof(u32))
 /*
  * The Open Firmware spec defines PCI physical address as follows:
  *
  *          bits# 31 .... 24 23 .... 16 15 .... 08 07 .... 00
  *
  * phys.hi  cell:  npt000ss   bbbbbbbb   dddddfff   rrrrrrrr
  * phys.mid cell:  hhhhhhhh   hhhhhhhh   hhhhhhhh   hhhhhhhh
  * phys.lo  cell:  llllllll   llllllll   llllllll   llllllll
  *
  * where:
  *
  * n:        is 0 if the address is relocatable, 1 otherwise
  * p:        is 1 if addressable region is prefetchable, 0 otherwise
  * t:        is 1 if the address is aliased (for non-relocatable I/O) below 1MB
  *           (for Memory), or below 64KB (for relocatable I/O)
  * ss:       is the space code, denoting the address space
  * bbbbbbbb: is the 8-bit Bus Number
  * ddddd:    is the 5-bit Device Number
  * fff:      is the 3-bit Function Number
  * rrrrrrrr: is the 8-bit Register Number
  * hhhhhhhh: is a 32-bit unsigned number
  * llllllll: is a 32-bit unsigned number
  */
 struct fdt_pci_addr {
 	u32	phys_hi;
 	u32	phys_mid;
 	u32	phys_lo;
 };
 /**
  * Compute the size of a resource.
  *
  * @param res	the resource to operate on
  * @return the size of the resource
  */
 static inline fdt_size_t fdt_resource_size(const struct fdt_resource *res)
 {
 	return res->end - res->start + 1;
 }
 /**
  * Compat types that we know about and for which we might have drivers.
  * Each is named COMPAT_<dir>_<filename> where <dir> is the directory
  * within drivers.
  */
 enum fdt_compat_id {
 	COMPAT_UNKNOWN,
 	COMPAT_NVIDIA_TEGRA20_EMC,	/* Tegra20 memory controller */
 	COMPAT_NVIDIA_TEGRA20_EMC_TABLE, /* Tegra20 memory timing table */
 	COMPAT_NVIDIA_TEGRA20_NAND,	/* Tegra2 NAND controller */
 	COMPAT_NVIDIA_TEGRA124_XUSB_PADCTL,
 					/* Tegra124 XUSB pad controller */
 	COMPAT_NVIDIA_TEGRA210_XUSB_PADCTL,
 					/* Tegra210 XUSB pad controller */
 	COMPAT_SMSC_LAN9215,		/* SMSC 10/100 Ethernet LAN9215 */
 	COMPAT_SAMSUNG_EXYNOS5_SROMC,	/* Exynos5 SROMC */
 	COMPAT_SAMSUNG_EXYNOS_USB_PHY,	/* Exynos phy controller for usb2.0 */
 	COMPAT_SAMSUNG_EXYNOS5_USB3_PHY,/* Exynos phy controller for usb3.0 */
 	COMPAT_SAMSUNG_EXYNOS_TMU,	/* Exynos TMU */
 	COMPAT_SAMSUNG_EXYNOS_MIPI_DSI,	/* Exynos mipi dsi */
 	COMPAT_SAMSUNG_EXYNOS_DWMMC,	/* Exynos DWMMC controller */
 	COMPAT_GENERIC_SPI_FLASH,	/* Generic SPI Flash chip */
 	COMPAT_SAMSUNG_EXYNOS_SYSMMU,	/* Exynos sysmmu */
 	COMPAT_INTEL_MICROCODE,		/* Intel microcode update */
 	COMPAT_INTEL_QRK_MRC,		/* Intel Quark MRC */
 	COMPAT_ALTERA_SOCFPGA_DWMAC,	/* SoCFPGA Ethernet controller */
 	COMPAT_ALTERA_SOCFPGA_DWMMC,	/* SoCFPGA DWMMC controller */
 	COMPAT_ALTERA_SOCFPGA_DWC2USB,	/* SoCFPGA DWC2 USB controller */
 	COMPAT_INTEL_BAYTRAIL_FSP,	/* Intel Bay Trail FSP */
 	COMPAT_INTEL_BAYTRAIL_FSP_MDP,	/* Intel FSP memory-down params */
 	COMPAT_INTEL_IVYBRIDGE_FSP,	/* Intel Ivy Bridge FSP */
 	COMPAT_SUNXI_NAND,		/* SUNXI NAND controller */
 	COMPAT_ALTERA_SOCFPGA_CLK,	/* SoCFPGA Clock initialization */
 	COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE,	/* SoCFPGA pinctrl-single */
 	COMPAT_ALTERA_SOCFPGA_H2F_BRG,          /* SoCFPGA hps2fpga bridge */
 	COMPAT_ALTERA_SOCFPGA_LWH2F_BRG,        /* SoCFPGA lwhps2fpga bridge */
 	COMPAT_ALTERA_SOCFPGA_F2H_BRG,          /* SoCFPGA fpga2hps bridge */
 	COMPAT_ALTERA_SOCFPGA_F2SDR0,           /* SoCFPGA fpga2SDRAM0 bridge */
 	COMPAT_ALTERA_SOCFPGA_F2SDR1,           /* SoCFPGA fpga2SDRAM1 bridge */
 	COMPAT_ALTERA_SOCFPGA_F2SDR2,           /* SoCFPGA fpga2SDRAM2 bridge */
 	COMPAT_ALTERA_SOCFPGA_FPGA0,		/* SOCFPGA FPGA manager */
 	COMPAT_ALTERA_SOCFPGA_NOC,		/* SOCFPGA Arria 10 NOC */
 	COMPAT_ALTERA_SOCFPGA_CLK_INIT,		/* SOCFPGA Arria 10 clk init */
 	COMPAT_COUNT,
 };
 #define MAX_PHANDLE_ARGS 16
 struct fdtdec_phandle_args {
 	int node;
 	int args_count;
 	uint32_t args[MAX_PHANDLE_ARGS];
 };
 /**
  * fdtdec_parse_phandle_with_args() - Find a node pointed by phandle in a list
  *
  * This function is useful to parse lists of phandles and their arguments.
  *
  * Example:
  *
  * phandle1: node1 {
  *	#list-cells = <2>;
  * }
  *
  * phandle2: node2 {
  *	#list-cells = <1>;
  * }
  *
  * node3 {
  *	list = <&phandle1 1 2 &phandle2 3>;
  * }
  *
  * To get a device_node of the `node2' node you may call this:
  * fdtdec_parse_phandle_with_args(blob, node3, "list", "#list-cells", 0, 1,
  *				  &args);
  *
  * (This function is a modified version of __of_parse_phandle_with_args() from
  * Linux 3.18)
  *
  * @blob:	Pointer to device tree
  * @src_node:	Offset of device tree node containing a list
  * @list_name:	property name that contains a list
  * @cells_name:	property name that specifies the phandles' arguments count,
  *		or NULL to use @cells_count
  * @cells_count: Cell count to use if @cells_name is NULL
  * @index:	index of a phandle to parse out
  * @out_args:	optional pointer to output arguments structure (will be filled)
  * @return 0 on success (with @out_args filled out if not NULL), -ENOENT if
  *	@list_name does not exist, a phandle was not found, @cells_name
  *	could not be found, the arguments were truncated or there were too
  *	many arguments.
  *
  */
 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
 				   const char *list_name,
 				   const char *cells_name,
 				   int cell_count, int index,
 				   struct fdtdec_phandle_args *out_args);
 /**
  * Find the next numbered alias for a peripheral. This is used to enumerate
  * all the peripherals of a certain type.
  *
  * Do the first call with *upto = 0. Assuming /aliases/<name>0 exists then
  * this function will return a pointer to the node the alias points to, and
  * then update *upto to 1. Next time you call this function, the next node
  * will be returned.
  *
  * All nodes returned will match the compatible ID, as it is assumed that
  * all peripherals use the same driver.
  *
  * @param blob		FDT blob to use
  * @param name		Root name of alias to search for
  * @param id		Compatible ID to look for
  * @return offset of next compatible node, or -FDT_ERR_NOTFOUND if no more
  */
 int fdtdec_next_alias(const void *blob, const char *name,
 		enum fdt_compat_id id, int *upto);
 /**
  * Find the compatible ID for a given node.
  *
  * Generally each node has at least one compatible string attached to it.
  * This function looks through our list of known compatible strings and
  * returns the corresponding ID which matches the compatible string.
  *
  * @param blob		FDT blob to use
  * @param node		Node containing compatible string to find
  * @return compatible ID, or COMPAT_UNKNOWN if we cannot find a match
  */
 enum fdt_compat_id fdtdec_lookup(const void *blob, int node);
 /**
  * Find the next compatible node for a peripheral.
  *
  * Do the first call with node = 0. This function will return a pointer to
  * the next compatible node. Next time you call this function, pass the
  * value returned, and the next node will be provided.
  *
  * @param blob		FDT blob to use
  * @param node		Start node for search
  * @param id		Compatible ID to look for (enum fdt_compat_id)
  * @return offset of next compatible node, or -FDT_ERR_NOTFOUND if no more
  */
 int fdtdec_next_compatible(const void *blob, int node,
 		enum fdt_compat_id id);
 /**
  * Find the next compatible subnode for a peripheral.
  *
  * Do the first call with node set to the parent and depth = 0. This
  * function will return the offset of the next compatible node. Next time
  * you call this function, pass the node value returned last time, with
  * depth unchanged, and the next node will be provided.
  *
  * @param blob		FDT blob to use
  * @param node		Start node for search
  * @param id		Compatible ID to look for (enum fdt_compat_id)
  * @param depthp	Current depth (set to 0 before first call)
  * @return offset of next compatible node, or -FDT_ERR_NOTFOUND if no more
  */
 int fdtdec_next_compatible_subnode(const void *blob, int node,
 		enum fdt_compat_id id, int *depthp);
 /*
  * Look up an address property in a node and return the parsed address, and
  * optionally the parsed size.
  *
  * This variant assumes a known and fixed number of cells are used to
  * represent the address and size.
  *
  * You probably don't want to use this function directly except to parse
  * non-standard properties, and never to parse the "reg" property. Instead,
  * use one of the "auto" variants below, which automatically honor the
  * #address-cells and #size-cells properties in the parent node.
  *
  * @param blob	FDT blob
  * @param node	node to examine
  * @param prop_name	name of property to find
  * @param index	which address to retrieve from a list of addresses. Often 0.
  * @param na	the number of cells used to represent an address
  * @param ns	the number of cells used to represent a size
  * @param sizep	a pointer to store the size into. Use NULL if not required
  * @param translate	Indicates whether to translate the returned value
  *			using the parent node's ranges property.
  * @return address, if found, or FDT_ADDR_T_NONE if not
  */
 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
 		const char *prop_name, int index, int na, int ns,
 		fdt_size_t *sizep, bool translate);
 /*
  * Look up an address property in a node and return the parsed address, and
  * optionally the parsed size.
  *
  * This variant automatically determines the number of cells used to represent
  * the address and size by parsing the provided parent node's #address-cells
  * and #size-cells properties.
  *
  * @param blob	FDT blob
  * @param parent	parent node of @node
  * @param node	node to examine
  * @param prop_name	name of property to find
  * @param index	which address to retrieve from a list of addresses. Often 0.
  * @param sizep	a pointer to store the size into. Use NULL if not required
  * @param translate	Indicates whether to translate the returned value
  *			using the parent node's ranges property.
  * @return address, if found, or FDT_ADDR_T_NONE if not
  */
 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
 		int node, const char *prop_name, int index, fdt_size_t *sizep,
 		bool translate);
 /*
  * Look up an address property in a node and return the parsed address, and
  * optionally the parsed size.
  *
  * This variant automatically determines the number of cells used to represent
  * the address and size by parsing the parent node's #address-cells
  * and #size-cells properties. The parent node is automatically found.
  *
  * The automatic parent lookup implemented by this function is slow.
  * Consequently, fdtdec_get_addr_size_auto_parent() should be used where
  * possible.
  *
  * @param blob	FDT blob
  * @param parent	parent node of @node
  * @param node	node to examine
  * @param prop_name	name of property to find
  * @param index	which address to retrieve from a list of addresses. Often 0.
  * @param sizep	a pointer to store the size into. Use NULL if not required
  * @param translate	Indicates whether to translate the returned value
  *			using the parent node's ranges property.
  * @return address, if found, or FDT_ADDR_T_NONE if not
  */
 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
 		const char *prop_name, int index, fdt_size_t *sizep,
 		bool translate);
 /*
  * Look up an address property in a node and return the parsed address.
  *
  * This variant hard-codes the number of cells used to represent the address
  * and size based on sizeof(fdt_addr_t) and sizeof(fdt_size_t). It also
  * always returns the first address value in the property (index 0).
  *
  * Use of this function is not recommended due to the hard-coding of cell
  * counts. There is no programmatic validation that these hard-coded values
  * actually match the device tree content in any way at all. This assumption
  * can be satisfied by manually ensuring CONFIG_PHYS_64BIT is appropriately
  * set in the U-Boot build and exercising strict control over DT content to
  * ensure use of matching #address-cells/#size-cells properties. However, this
  * approach is error-prone; those familiar with DT will not expect the
  * assumption to exist, and could easily invalidate it. If the assumption is
  * invalidated, this function will not report the issue, and debugging will
  * be required. Instead, use fdtdec_get_addr_size_auto_parent().
  *
  * @param blob	FDT blob
  * @param node	node to examine
  * @param prop_name	name of property to find
  * @return address, if found, or FDT_ADDR_T_NONE if not
  */
 fdt_addr_t fdtdec_get_addr(const void *blob, int node,
 		const char *prop_name);
 /*
  * Look up an address property in a node and return the parsed address, and
  * optionally the parsed size.
  *
  * This variant hard-codes the number of cells used to represent the address
  * and size based on sizeof(fdt_addr_t) and sizeof(fdt_size_t). It also
  * always returns the first address value in the property (index 0).
  *
  * Use of this function is not recommended due to the hard-coding of cell
  * counts. There is no programmatic validation that these hard-coded values
  * actually match the device tree content in any way at all. This assumption
  * can be satisfied by manually ensuring CONFIG_PHYS_64BIT is appropriately
  * set in the U-Boot build and exercising strict control over DT content to
  * ensure use of matching #address-cells/#size-cells properties. However, this
  * approach is error-prone; those familiar with DT will not expect the
  * assumption to exist, and could easily invalidate it. If the assumption is
  * invalidated, this function will not report the issue, and debugging will
  * be required. Instead, use fdtdec_get_addr_size_auto_parent().
  *
  * @param blob	FDT blob
  * @param node	node to examine
  * @param prop_name	name of property to find
  * @param sizep	a pointer to store the size into. Use NULL if not required
  * @return address, if found, or FDT_ADDR_T_NONE if not
  */
 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
 		const char *prop_name, fdt_size_t *sizep);
 /**
  * Look at an address property in a node and return the pci address which
  * corresponds to the given type in the form of fdt_pci_addr.
  * The property must hold one fdt_pci_addr with a lengh.
  *
  * @param blob		FDT blob
  * @param node		node to examine
  * @param type		pci address type (FDT_PCI_SPACE_xxx)
  * @param prop_name	name of property to find
  * @param addr		returns pci address in the form of fdt_pci_addr
  * @return 0 if ok, -ENOENT if the property did not exist, -EINVAL if the
  *		format of the property was invalid, -ENXIO if the requested
  *		address type was not found
  */
 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
 		const char *prop_name, struct fdt_pci_addr *addr);
 /**
  * Look at the compatible property of a device node that represents a PCI
  * device and extract pci vendor id and device id from it.
  *
  * @param blob		FDT blob
  * @param node		node to examine
  * @param vendor	vendor id of the pci device
  * @param device	device id of the pci device
  * @return 0 if ok, negative on error
  */
 int fdtdec_get_pci_vendev(const void *blob, int node,
 		u16 *vendor, u16 *device);
 /**
  * Look at the pci address of a device node that represents a PCI device
  * and return base address of the pci device's registers.
  *
  * @param dev		device to examine
  * @param addr		pci address in the form of fdt_pci_addr
  * @param bar		returns base address of the pci device's registers
  * @return 0 if ok, negative on error
  */
 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
 			 u32 *bar);
 /**
  * Look up a 32-bit integer property in a node and return it. The property
  * must have at least 4 bytes of data. The value of the first cell is
  * returned.
  *
  * @param blob	FDT blob
  * @param node	node to examine
  * @param prop_name	name of property to find
  * @param default_val	default value to return if the property is not found
  * @return integer value, if found, or default_val if not
  */
 s32 fdtdec_get_int(const void *blob, int node, const char *prop_name,
 		s32 default_val);
 /**
  * Unsigned version of fdtdec_get_int. The property must have at least
  * 4 bytes of data. The value of the first cell is returned.
  *
  * @param blob	FDT blob
  * @param node	node to examine
  * @param prop_name	name of property to find
  * @param default_val	default value to return if the property is not found
  * @return unsigned integer value, if found, or default_val if not
  */
 unsigned int fdtdec_get_uint(const void *blob, int node, const char *prop_name,
 			unsigned int default_val);
 /**
  * Get a variable-sized number from a property
  *
  * This reads a number from one or more cells.
  *
  * @param ptr	Pointer to property
  * @param cells	Number of cells containing the number
  * @return the value in the cells
  */
 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells);
 /**
  * Look up a 64-bit integer property in a node and return it. The property
  * must have at least 8 bytes of data (2 cells). The first two cells are
  * concatenated to form a 8 bytes value, where the first cell is top half and
  * the second cell is bottom half.
  *
  * @param blob	FDT blob
  * @param node	node to examine
  * @param prop_name	name of property to find
  * @param default_val	default value to return if the property is not found
  * @return integer value, if found, or default_val if not
  */
 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
 		uint64_t default_val);
 /**
  * Checks whether a node is enabled.
  * This looks for a 'status' property. If this exists, then returns 1 if
  * the status is 'ok' and 0 otherwise. If there is no status property,
  * it returns 1 on the assumption that anything mentioned should be enabled
  * by default.
  *
  * @param blob	FDT blob
  * @param node	node to examine
  * @return integer value 0 (not enabled) or 1 (enabled)
  */
 int fdtdec_get_is_enabled(const void *blob, int node);
 /**
  * Make sure we have a valid fdt available to control U-Boot.
  *
  * If not, a message is printed to the console if the console is ready.
  *
  * @return 0 if all ok, -1 if not
  */
 int fdtdec_prepare_fdt(void);
 /**
  * Checks that we have a valid fdt available to control U-Boot.
  * However, if not then for the moment nothing is done, since this function
  * is called too early to panic().
  *
  * @returns 0
  */
 int fdtdec_check_fdt(void);
 /**
  * Find the nodes for a peripheral and return a list of them in the correct
  * order. This is used to enumerate all the peripherals of a certain type.
  *
  * To use this, optionally set up a /aliases node with alias properties for
  * a peripheral. For example, for usb you could have:
  *
  * aliases {
  *		usb0 = "/ehci@c5008000";
  *		usb1 = "/ehci@c5000000";
  * };
  *
  * Pass "usb" as the name to this function and will return a list of two
  * nodes offsets: /ehci@c5008000 and ehci@c5000000.
  *
  * All nodes returned will match the compatible ID, as it is assumed that
  * all peripherals use the same driver.
  *
  * If no alias node is found, then the node list will be returned in the
  * order found in the fdt. If the aliases mention a node which doesn't
  * exist, then this will be ignored. If nodes are found with no aliases,
  * they will be added in any order.
  *
  * If there is a gap in the aliases, then this function return a 0 node at
  * that position. The return value will also count these gaps.
  *
  * This function checks node properties and will not return nodes which are
  * marked disabled (status = "disabled").
  *
  * @param blob		FDT blob to use
  * @param name		Root name of alias to search for
  * @param id		Compatible ID to look for
  * @param node_list	Place to put list of found nodes
  * @param maxcount	Maximum number of nodes to find
  * @return number of nodes found on success, FDT_ERR_... on error
  */
 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
 			enum fdt_compat_id id, int *node_list, int maxcount);
 /*
  * This function is similar to fdtdec_find_aliases_for_id() except that it
  * adds to the node_list that is passed in. Any 0 elements are considered
  * available for allocation - others are considered already used and are
  * skipped.
  *
  * You can use this by calling fdtdec_find_aliases_for_id() with an
  * uninitialised array, then setting the elements that are returned to -1,
  * say, then calling this function, perhaps with a different compat id.
  * Any elements you get back that are >0 are new nodes added by the call
  * to this function.
  *
  * Note that if you have some nodes with aliases and some without, you are
  * sailing close to the wind. The call to fdtdec_find_aliases_for_id() with
  * one compat_id may fill in positions for which you have aliases defined
  * for another compat_id. When you later call *this* function with the second
  * compat_id, the alias positions may already be used. A debug warning may
  * be generated in this case, but it is safest to define aliases for all
  * nodes when you care about the ordering.
  */
 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
 			enum fdt_compat_id id, int *node_list, int maxcount);
 /**
  * Get the alias sequence number of a node
  *
  * This works out whether a node is pointed to by an alias, and if so, the
  * sequence number of that alias. Aliases are of the form <base><num> where
  * <num> is the sequence number. For example spi2 would be sequence number
  * 2.
  *
  * @param blob		Device tree blob (if NULL, then error is returned)
  * @param base		Base name for alias (before the underscore)
  * @param node		Node to look up
  * @param seqp		This is set to the sequence number if one is found,
  *			but otherwise the value is left alone
  * @return 0 if a sequence was found, -ve if not
  */
 int fdtdec_get_alias_seq(const void *blob, const char *base, int node,
 			 int *seqp);
 /**
  * Get the highest alias number for susbystem.
  *
  * It parses all aliases and find out highest recorded alias for subsystem.
  * Aliases are of the form <base><num> where <num> is the sequence number.
  *
  * @param blob		Device tree blob (if NULL, then error is returned)
  * @param base		Base name for alias susbystem (before the number)
  *
  * @return 0 highest alias ID, -1 if not found
  */
 int fdtdec_get_alias_highest_id(const void *blob, const char *base);
 /**
  * Get a property from the /chosen node
  *
  * @param blob		Device tree blob (if NULL, then NULL is returned)
  * @param name		Property name to look up
  * @return Value of property, or NULL if it does not exist
  */
 const char *fdtdec_get_chosen_prop(const void *blob, const char *name);
 /**
  * Get the offset of the given /chosen node
  *
  * This looks up a property in /chosen containing the path to another node,
  * then finds the offset of that node.
  *
  * @param blob		Device tree blob (if NULL, then error is returned)
  * @param name		Property name, e.g. "stdout-path"
  * @return Node offset referred to by that chosen node, or -ve FDT_ERR_...
  */
 int fdtdec_get_chosen_node(const void *blob, const char *name);
 /*
  * Get the name for a compatible ID
  *
  * @param id		Compatible ID to look for
  * @return compatible string for that id
  */
 const char *fdtdec_get_compatible(enum fdt_compat_id id);
 /* Look up a phandle and follow it to its node. Then return the offset
  * of that node.
  *
  * @param blob		FDT blob
  * @param node		node to examine
  * @param prop_name	name of property to find
  * @return node offset if found, -ve error code on error
  */
 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name);
 /**
  * Look up a property in a node and return its contents in an integer
  * array of given length. The property must have at least enough data for
  * the array (4*count bytes). It may have more, but this will be ignored.
  *
  * @param blob		FDT blob
  * @param node		node to examine
  * @param prop_name	name of property to find
  * @param array		array to fill with data
  * @param count		number of array elements
  * @return 0 if ok, or -FDT_ERR_NOTFOUND if the property is not found,
  *		or -FDT_ERR_BADLAYOUT if not enough data
  */
 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
 		u32 *array, int count);
 /**
  * Look up a property in a node and return its contents in an integer
  * array of given length. The property must exist but may have less data that
  * expected (4*count bytes). It may have more, but this will be ignored.
  *
  * @param blob		FDT blob
  * @param node		node to examine
  * @param prop_name	name of property to find
  * @param array		array to fill with data
  * @param count		number of array elements
  * @return number of array elements if ok, or -FDT_ERR_NOTFOUND if the
  *		property is not found
  */
 int fdtdec_get_int_array_count(const void *blob, int node,
 			       const char *prop_name, u32 *array, int count);
 /**
  * Look up a property in a node and return a pointer to its contents as a
  * unsigned int array of given length. The property must have at least enough
  * data for the array ('count' cells). It may have more, but this will be
  * ignored. The data is not copied.
  *
  * Note that you must access elements of the array with fdt32_to_cpu(),
  * since the elements will be big endian even on a little endian machine.
  *
  * @param blob		FDT blob
  * @param node		node to examine
  * @param prop_name	name of property to find
  * @param count		number of array elements
  * @return pointer to array if found, or NULL if the property is not
  *		found or there is not enough data
  */
 const u32 *fdtdec_locate_array(const void *blob, int node,
 			       const char *prop_name, int count);
 /**
  * Look up a boolean property in a node and return it.
  *
  * A boolean properly is true if present in the device tree and false if not
  * present, regardless of its value.
  *
  * @param blob	FDT blob
  * @param node	node to examine
  * @param prop_name	name of property to find
  * @return 1 if the properly is present; 0 if it isn't present
  */
 int fdtdec_get_bool(const void *blob, int node, const char *prop_name);
 /*
  * Count child nodes of one parent node.
  *
  * @param blob	FDT blob
  * @param node	parent node
  * @return number of child node; 0 if there is not child node
  */
 int fdtdec_get_child_count(const void *blob, int node);
 /**
  * Look in the FDT for a config item with the given name and return its value
  * as a 32-bit integer. The property must have at least 4 bytes of data. The
  * value of the first cell is returned.
  *
  * @param blob		FDT blob to use
  * @param prop_name	Node property name
  * @param default_val	default value to return if the property is not found
  * @return integer value, if found, or default_val if not
  */
 int fdtdec_get_config_int(const void *blob, const char *prop_name,
 		int default_val);
 /**
  * Look in the FDT for a config item with the given name
  * and return whether it exists.
  *
  * @param blob		FDT blob
  * @param prop_name	property name to look up
  * @return 1, if it exists, or 0 if not
  */
 int fdtdec_get_config_bool(const void *blob, const char *prop_name);
 /**
  * Look in the FDT for a config item with the given name and return its value
  * as a string.
  *
  * @param blob          FDT blob
  * @param prop_name     property name to look up
  * @returns property string, NULL on error.
  */
 char *fdtdec_get_config_string(const void *blob, const char *prop_name);
 /*
  * Look up a property in a node and return its contents in a byte
  * array of given length. The property must have at least enough data for
  * the array (count bytes). It may have more, but this will be ignored.
  *
  * @param blob		FDT blob
  * @param node		node to examine
  * @param prop_name	name of property to find
  * @param array		array to fill with data
  * @param count		number of array elements
  * @return 0 if ok, or -FDT_ERR_MISSING if the property is not found,
  *		or -FDT_ERR_BADLAYOUT if not enough data
  */
 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
 		u8 *array, int count);
 /**
  * Look up a property in a node and return a pointer to its contents as a
  * byte array of given length. The property must have at least enough data
  * for the array (count bytes). It may have more, but this will be ignored.
  * The data is not copied.
  *
  * @param blob		FDT blob
  * @param node		node to examine
  * @param prop_name	name of property to find
  * @param count		number of array elements
  * @return pointer to byte array if found, or NULL if the property is not
  *		found or there is not enough data
  */
 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
 			     const char *prop_name, int count);
 /**
  * Obtain an indexed resource from a device property.
  *
  * @param fdt		FDT blob
  * @param node		node to examine
  * @param property	name of the property to parse
  * @param index		index of the resource to retrieve
  * @param res		returns the resource
  * @return 0 if ok, negative on error
  */
 int fdt_get_resource(const void *fdt, int node, const char *property,
 		     unsigned int index, struct fdt_resource *res);
 /**
  * Obtain a named resource from a device property.
  *
  * Look up the index of the name in a list of strings and return the resource
  * at that index.
  *
  * @param fdt		FDT blob
  * @param node		node to examine
  * @param property	name of the property to parse
  * @param prop_names	name of the property containing the list of names
  * @param name		the name of the entry to look up
  * @param res		returns the resource
  */
 int fdt_get_named_resource(const void *fdt, int node, const char *property,
 			   const char *prop_names, const char *name,
 			   struct fdt_resource *res);
 /* Display timings from linux include/video/display_timing.h */
 enum display_flags {
 	DISPLAY_FLAGS_HSYNC_LOW		= 1 << 0,
 	DISPLAY_FLAGS_HSYNC_HIGH	= 1 << 1,
 	DISPLAY_FLAGS_VSYNC_LOW		= 1 << 2,
 	DISPLAY_FLAGS_VSYNC_HIGH	= 1 << 3,
 	/* data enable flag */
 	DISPLAY_FLAGS_DE_LOW		= 1 << 4,
 	DISPLAY_FLAGS_DE_HIGH		= 1 << 5,
 	/* drive data on pos. edge */
 	DISPLAY_FLAGS_PIXDATA_POSEDGE	= 1 << 6,
 	/* drive data on neg. edge */
 	DISPLAY_FLAGS_PIXDATA_NEGEDGE	= 1 << 7,
 	DISPLAY_FLAGS_INTERLACED	= 1 << 8,
 	DISPLAY_FLAGS_DOUBLESCAN	= 1 << 9,
 	DISPLAY_FLAGS_DOUBLECLK		= 1 << 10,
 };
 /*
  * A single signal can be specified via a range of minimal and maximal values
  * with a typical value, that lies somewhere inbetween.
  */
 struct timing_entry {
 	u32 min;
 	u32 typ;
 	u32 max;
 };
 /*
  * Single "mode" entry. This describes one set of signal timings a display can
  * have in one setting. This struct can later be converted to struct videomode
  * (see include/video/videomode.h). As each timing_entry can be defined as a
  * range, one struct display_timing may become multiple struct videomodes.
  *
  * Example: hsync active high, vsync active low
  *
  *				    Active Video
  * Video  ______________________XXXXXXXXXXXXXXXXXXXXXX_____________________
  *	  |<- sync ->|<- back ->|<----- active ----->|<- front ->|<- sync..
  *	  |	     |	 porch  |		     |	 porch	 |
  *
  * HSync _|¯¯¯¯¯¯¯¯¯¯|___________________________________________|¯¯¯¯¯¯¯¯¯
  *
  * VSync ¯|__________|¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯|_________
  */
 struct display_timing {
 	struct timing_entry pixelclock;
 	struct timing_entry hactive;		/* hor. active video */
 	struct timing_entry hfront_porch;	/* hor. front porch */
 	struct timing_entry hback_porch;	/* hor. back porch */
 	struct timing_entry hsync_len;		/* hor. sync len */
 	struct timing_entry vactive;		/* ver. active video */
 	struct timing_entry vfront_porch;	/* ver. front porch */
 	struct timing_entry vback_porch;	/* ver. back porch */
 	struct timing_entry vsync_len;		/* ver. sync len */
 	enum display_flags flags;		/* display flags */
 	bool hdmi_monitor;			/* is hdmi monitor? */
 };
 /**
  * fdtdec_decode_display_timing() - decode display timings
  *
  * Decode display timings from the supplied 'display-timings' node.
  * See doc/device-tree-bindings/video/display-timing.txt for binding
  * information.
  *
  * @param blob		FDT blob
  * @param node		'display-timing' node containing the timing subnodes
  * @param index		Index number to read (0=first timing subnode)
  * @param config	Place to put timings
  * @return 0 if OK, -FDT_ERR_NOTFOUND if not found
  */
 int fdtdec_decode_display_timing(const void *blob, int node, int index,
 				 struct display_timing *config);
 /**
  * fdtdec_setup_mem_size_base_fdt() - decode and setup gd->ram_size and
  * gd->ram_start
  *
  * Decode the /memory 'reg' property to determine the size and start of the
  * first memory bank, populate the global data with the size and start of the
  * first bank of memory.
  *
  * This function should be called from a boards dram_init(). This helper
  * function allows for boards to query the device tree for DRAM size and start
  * address instead of hard coding the value in the case where the memory size
  * and start address cannot be detected automatically.
  *
  * @param blob		FDT blob
  *
  * @return 0 if OK, -EINVAL if the /memory node or reg property is missing or
  * invalid
  */
 int fdtdec_setup_mem_size_base_fdt(const void *blob);
 /**
  * fdtdec_setup_mem_size_base() - decode and setup gd->ram_size and
  * gd->ram_start
  *
  * Decode the /memory 'reg' property to determine the size and start of the
  * first memory bank, populate the global data with the size and start of the
  * first bank of memory.
  *
  * This function should be called from a boards dram_init(). This helper
  * function allows for boards to query the device tree for DRAM size and start
  * address instead of hard coding the value in the case where the memory size
  * and start address cannot be detected automatically.
  *
  * @return 0 if OK, -EINVAL if the /memory node or reg property is missing or
  * invalid
  */
 int fdtdec_setup_mem_size_base(void);
 /**
  * fdtdec_setup_memory_banksize_fdt() - decode and populate gd->bd->bi_dram
  *
  * Decode the /memory 'reg' property to determine the address and size of the
  * memory banks. Use this data to populate the global data board info with the
  * phys address and size of memory banks.
  *
  * This function should be called from a boards dram_init_banksize(). This
  * helper function allows for boards to query the device tree for memory bank
  * information instead of hard coding the information in cases where it cannot
  * be detected automatically.
  *
  * @param blob		FDT blob
  *
  * @return 0 if OK, -EINVAL if the /memory node or reg property is missing or
  * invalid
  */
 int fdtdec_setup_memory_banksize_fdt(const void *blob);
 /**
  * fdtdec_setup_memory_banksize() - decode and populate gd->bd->bi_dram
  *
  * Decode the /memory 'reg' property to determine the address and size of the
  * memory banks. Use this data to populate the global data board info with the
  * phys address and size of memory banks.
  *
  * This function should be called from a boards dram_init_banksize(). This
  * helper function allows for boards to query the device tree for memory bank
  * information instead of hard coding the information in cases where it cannot
  * be detected automatically.
  *
  * @return 0 if OK, -EINVAL if the /memory node or reg property is missing or
  * invalid
  */
 int fdtdec_setup_memory_banksize(void);
 /**
  * fdtdec_set_phandle() - sets the phandle of a given node
  *
  * @param blob		FDT blob
  * @param node		offset in the FDT blob of the node whose phandle is to
  *			be set
  * @param phandle	phandle to set for the given node
  * @return 0 on success or a negative error code on failure
  */
 static inline int fdtdec_set_phandle(void *blob, int node, uint32_t phandle)
 {
 	return fdt_setprop_u32(blob, node, "phandle", phandle);
 }
 /**
  * fdtdec_add_reserved_memory() - add or find a reserved-memory node
  *
  * If a reserved-memory node already exists for the given carveout, a phandle
  * for that node will be returned. Otherwise a new node will be created and a
  * phandle corresponding to it will be returned.
  *
  * See Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
  * for details on how to use reserved memory regions.
  *
  * As an example, consider the following code snippet:
  *
  *     struct fdt_memory fb = {
  *         .start = 0x92cb3000,
  *         .end = 0x934b2fff,
  *     };
  *     uint32_t phandle;
  *
  *     fdtdec_add_reserved_memory(fdt, "framebuffer", &fb, &phandle);
  *
  * This results in the following subnode being added to the top-level
  * /reserved-memory node:
  *
  *     reserved-memory {
  *         #address-cells = <0x00000002>;
  *         #size-cells = <0x00000002>;
  *         ranges;
  *
  *         framebuffer@92cb3000 {
  *             reg = <0x00000000 0x92cb3000 0x00000000 0x00800000>;
  *             phandle = <0x0000004d>;
  *         };
  *     };
  *
  * If the top-level /reserved-memory node does not exist, it will be created.
  * The phandle returned from the function call can be used to reference this
  * reserved memory region from other nodes.
  *
  * See fdtdec_set_carveout() for a more elaborate example.
  *
  * @param blob		FDT blob
  * @param basename	base name of the node to create
  * @param carveout	information about the carveout region
  * @param phandlep	return location for the phandle of the carveout region
  * @return 0 on success or a negative error code on failure
  */
 int fdtdec_add_reserved_memory(void *blob, const char *basename,
 			       const struct fdt_memory *carveout,
 			       uint32_t *phandlep);
 /**
  * fdtdec_get_carveout() - reads a carveout from an FDT
  *
  * Reads information about a carveout region from an FDT. The carveout is a
  * referenced by its phandle that is read from a given property in a given
  * node.
  *
  * @param blob		FDT blob
  * @param node		name of a node
  * @param name		name of the property in the given node that contains
  *			the phandle for the carveout
  * @param index		index of the phandle for which to read the carveout
  * @param carveout	return location for the carveout information
  * @return 0 on success or a negative error code on failure
  */
 int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
 			unsigned int index, struct fdt_memory *carveout);
 /**
  * fdtdec_set_carveout() - sets a carveout region for a given node
  *
  * Sets a carveout region for a given node. If a reserved-memory node already
  * exists for the carveout, the phandle for that node will be reused. If no
  * such node exists, a new one will be created and a phandle to it stored in
  * a specified property of the given node.
  *
  * As an example, consider the following code snippet:
  *
  *     const char *node = "/host1x@50000000/dc@54240000";
  *     struct fdt_memory fb = {
  *         .start = 0x92cb3000,
  *         .end = 0x934b2fff,
  *     };
  *
  *     fdtdec_set_carveout(fdt, node, "memory-region", 0, "framebuffer", &fb);
  *
  * dc@54200000 is a display controller and was set up by the bootloader to
  * scan out the framebuffer specified by "fb". This would cause the following
  * reserved memory region to be added:
  *
  *     reserved-memory {
  *         #address-cells = <0x00000002>;
  *         #size-cells = <0x00000002>;
  *         ranges;
  *
  *         framebuffer@92cb3000 {
  *             reg = <0x00000000 0x92cb3000 0x00000000 0x00800000>;
  *             phandle = <0x0000004d>;
  *         };
  *     };
  *
  * A "memory-region" property will also be added to the node referenced by the
  * offset parameter.
  *
  *     host1x@50000000 {
  *         ...
  *
  *         dc@54240000 {
  *             ...
  *             memory-region = <0x0000004d>;
  *             ...
  *         };
  *
  *         ...
  *     };
  *
  * @param blob		FDT blob
  * @param node		name of the node to add the carveout to
  * @param prop_name	name of the property in which to store the phandle of
  *			the carveout
  * @param index		index of the phandle to store
  * @param name		base name of the reserved-memory node to create
  * @param carveout	information about the carveout to add
  * @return 0 on success or a negative error code on failure
  */
 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
 			unsigned int index, const char *name,
 			const struct fdt_memory *carveout);
 /**
  * Set up the device tree ready for use
  */
 int fdtdec_setup(void);
 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
 /**
  * fdtdec_resetup()  - Set up the device tree again
  *
  * The main difference with fdtdec_setup() is that it returns if the fdt has
  * changed because a better match has been found.
  * This is typically used for boards that rely on a DM driver to detect the
  * board type. This function sould be called by the board code after the stuff
  * needed by board_fit_config_name_match() to operate porperly is available.
  * If this functions signals that a rescan is necessary, the board code must
  * unbind all the drivers using dm_uninit() and then rescan the DT with
  * dm_init_and_scan().
  *
  * @param rescan Returns a flag indicating that fdt has changed and rescanning
  *               the fdt is required
  *
  * @return 0 if OK, -ve on error
  */
 int fdtdec_resetup(int *rescan);
 #endif
 /**
  * Board-specific FDT initialization. Returns the address to a device tree blob.
  * Called when CONFIG_OF_BOARD is defined, or if CONFIG_OF_SEPARATE is defined
  * and the board implements it.
  */
 void *board_fdt_blob_setup(void);
 /*
  * Decode the size of memory
  *
  * RAM size is normally set in a /memory node and consists of a list of
  * (base, size) cells in the 'reg' property. This information is used to
  * determine the total available memory as well as the address and size
  * of each bank.
  *
  * Optionally the memory configuration can vary depending on a board id,
  * typically read from strapping resistors or an EEPROM on the board.
  *
  * Finally, memory size can be detected (within certain limits) by probing
  * the available memory. It is safe to do so within the limits provides by
  * the board's device tree information. This makes it possible to produce
  * boards with different memory sizes, where the device tree specifies the
  * maximum memory configuration, and the smaller memory configuration is
  * probed.
  *
  * This function decodes that information, returning the memory base address,
  * size and bank information. See the memory.txt binding for full
  * documentation.
  *
  * @param blob		Device tree blob
  * @param area		Name of node to check (NULL means "/memory")
  * @param board_id	Board ID to look up
  * @param basep		Returns base address of first memory bank (NULL to
  *			ignore)
  * @param sizep		Returns total memory size (NULL to ignore)
  * @param bd		Updated with the memory bank information (NULL to skip)
  * @return 0 if OK, -ve on error
  */
 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
 			   phys_addr_t *basep, phys_size_t *sizep,
 			   struct bd_info *bd);
 #endif

lib/fdtdec.c

Diff comments View file @ 3bf2f15

 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (c) 2011 The Chromium OS Authors.
  */
 #ifndef USE_HOSTCC
 #include <common.h>
 #include <boot_fit.h>
 #include <dm.h>
 #include <dm/of_extra.h>
 #include <errno.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
 #include <mapmem.h>
 #include <linux/libfdt.h>
 #include <serial.h>
 #include <asm/sections.h>
 #include <linux/ctype.h>
 #include <linux/lzo.h>
 DECLARE_GLOBAL_DATA_PTR;
 /*
  * Here are the type we know about. One day we might allow drivers to
  * register. For now we just put them here. The COMPAT macro allows us to
  * turn this into a sparse list later, and keeps the ID with the name.
  *
  * NOTE: This list is basically a TODO list for things that need to be
  * converted to driver model. So don't add new things here unless there is a
  * good reason why driver-model conversion is infeasible. Examples include
  * things which are used before driver model is available.
  */
 #define COMPAT(id, name) name
 static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(UNKNOWN, "<none>"),
 	COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
 	COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
 	COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
 	COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
 	COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
 	COMPAT(SMSC_LAN9215, "smsc,lan9215"),
 	COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
 	COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
 	COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
 	COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
 	COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
 	COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
 	COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
 	COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
 	COMPAT(INTEL_MICROCODE, "intel,microcode"),
 	COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
 	COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
 	COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
 	COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
 	COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
 	COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
 	COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
 	COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
 	COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
 	COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
 	COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
 	COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
 	COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
 	COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
 	COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
 	COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
 	COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
 	COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
 	COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
 };
 const char *fdtdec_get_compatible(enum fdt_compat_id id)
 {
 	/* We allow reading of the 'unknown' ID for testing purposes */
 	assert(id >= 0 && id < COMPAT_COUNT);
 	return compat_names[id];
 }
 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
 				      const char *prop_name, int index, int na,
 				      int ns, fdt_size_t *sizep,
 				      bool translate)
 {
 	const fdt32_t *prop, *prop_end;
 	const fdt32_t *prop_addr, *prop_size, *prop_after_size;
 	int len;
 	fdt_addr_t addr;
 	debug("%s: %s: ", __func__, prop_name);
 	prop = fdt_getprop(blob, node, prop_name, &len);
 	if (!prop) {
 		debug("(not found)\n");
 		return FDT_ADDR_T_NONE;
 	}
 	prop_end = prop + (len / sizeof(*prop));
 	prop_addr = prop + (index * (na + ns));
 	prop_size = prop_addr + na;
 	prop_after_size = prop_size + ns;
 	if (prop_after_size > prop_end) {
 		debug("(not enough data: expected >= %d cells, got %d cells)\n",
 		      (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
 		return FDT_ADDR_T_NONE;
 	}
 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
 	if (translate)
 		addr = fdt_translate_address(blob, node, prop_addr);
 	else
 #endif
 		addr = fdtdec_get_number(prop_addr, na);
 	if (sizep) {
 		*sizep = fdtdec_get_number(prop_size, ns);
 		debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
 		      (unsigned long long)*sizep);
 	} else {
 		debug("addr=%08llx\n", (unsigned long long)addr);
 	}
 	return addr;
 }
 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
 					    int node, const char *prop_name,
 					    int index, fdt_size_t *sizep,
 					    bool translate)
 {
 	int na, ns;
 	debug("%s: ", __func__);
 	na = fdt_address_cells(blob, parent);
 	if (na < 1) {
 		debug("(bad #address-cells)\n");
 		return FDT_ADDR_T_NONE;
 	}
 	ns = fdt_size_cells(blob, parent);
 	if (ns < 0) {
 		debug("(bad #size-cells)\n");
 		return FDT_ADDR_T_NONE;
 	}
 	debug("na=%d, ns=%d, ", na, ns);
 	return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
 					  ns, sizep, translate);
 }
 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
 					      const char *prop_name, int index,
 					      fdt_size_t *sizep,
 					      bool translate)
 {
 	int parent;
 	debug("%s: ", __func__);
 	parent = fdt_parent_offset(blob, node);
 	if (parent < 0) {
 		debug("(no parent found)\n");
 		return FDT_ADDR_T_NONE;
 	}
 	return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
 						index, sizep, translate);
 }
 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
 				const char *prop_name, fdt_size_t *sizep)
 {
 	int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
 	return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
 					  sizeof(fdt_addr_t) / sizeof(fdt32_t),
 					  ns, sizep, false);
 }
 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
 {
 	return fdtdec_get_addr_size(blob, node, prop_name, NULL);
 }
 #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
 			const char *prop_name, struct fdt_pci_addr *addr)
 {
 	const u32 *cell;
 	int len;
 	int ret = -ENOENT;
 	debug("%s: %s: ", __func__, prop_name);
 	/*
 	 * If we follow the pci bus bindings strictly, we should check
 	 * the value of the node's parent node's #address-cells and
 	 * #size-cells. They need to be 3 and 2 accordingly. However,
 	 * for simplicity we skip the check here.
 	 */
 	cell = fdt_getprop(blob, node, prop_name, &len);
 	if (!cell)
 		goto fail;
 	if ((len % FDT_PCI_REG_SIZE) == 0) {
 		int num = len / FDT_PCI_REG_SIZE;
 		int i;
 		for (i = 0; i < num; i++) {
 			debug("pci address #%d: %08lx %08lx %08lx\n", i,
 			      (ulong)fdt32_to_cpu(cell[0]),
 			      (ulong)fdt32_to_cpu(cell[1]),
 			      (ulong)fdt32_to_cpu(cell[2]));
 			if ((fdt32_to_cpu(*cell) & type) == type) {
 				addr->phys_hi = fdt32_to_cpu(cell[0]);
 				addr->phys_mid = fdt32_to_cpu(cell[1]);
 				addr->phys_lo = fdt32_to_cpu(cell[1]);
 				break;
 			}
 			cell += (FDT_PCI_ADDR_CELLS +
 				 FDT_PCI_SIZE_CELLS);
 		}
 		if (i == num) {
 			ret = -ENXIO;
 			goto fail;
 		}
 		return 0;
 	}
 	ret = -EINVAL;
 fail:
 	debug("(not found)\n");
 	return ret;
 }
 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
 {
 	const char *list, *end;
 	int len;
 	list = fdt_getprop(blob, node, "compatible", &len);
 	if (!list)
 		return -ENOENT;
 	end = list + len;
 	while (list < end) {
 		len = strlen(list);
 		if (len >= strlen("pciVVVV,DDDD")) {
 			char *s = strstr(list, "pci");
 			/*
 			 * check if the string is something like pciVVVV,DDDD.RR
 			 * or just pciVVVV,DDDD
 			 */
 			if (s && s[7] == ',' &&
 			    (s[12] == '.' || s[12] == 0)) {
 				s += 3;
 				*vendor = simple_strtol(s, NULL, 16);
 				s += 5;
 				*device = simple_strtol(s, NULL, 16);
 				return 0;
 			}
 		}
 		list += (len + 1);
 	}
 	return -ENOENT;
 }
 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
 			 u32 *bar)
 {
 	int barnum;
 	/* extract the bar number from fdt_pci_addr */
 	barnum = addr->phys_hi & 0xff;
 	if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
 		return -EINVAL;
 	barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
 	*bar = dm_pci_read_bar32(dev, barnum);
 	return 0;
 }
 #endif
 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
 			   uint64_t default_val)
 {
 	const uint64_t *cell64;
 	int length;
 	cell64 = fdt_getprop(blob, node, prop_name, &length);
 	if (!cell64 || length < sizeof(*cell64))
 		return default_val;
 	return fdt64_to_cpu(*cell64);
 }
 int fdtdec_get_is_enabled(const void *blob, int node)
 {
 	const char *cell;
 	/*
 	 * It should say "okay", so only allow that. Some fdts use "ok" but
 	 * this is a bug. Please fix your device tree source file. See here
 	 * for discussion:
 	 *
 	 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
 	 */
 	cell = fdt_getprop(blob, node, "status", NULL);
 	if (cell)
 		return strcmp(cell, "okay") == 0;
 	return 1;
 }
 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
 {
 	enum fdt_compat_id id;
 	/* Search our drivers */
 	for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
 		if (fdt_node_check_compatible(blob, node,
 					      compat_names[id]) == 0)
 			return id;
 	return COMPAT_UNKNOWN;
 }
 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
 {
 	return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
 }
 int fdtdec_next_compatible_subnode(const void *blob, int node,
 				   enum fdt_compat_id id, int *depthp)
 {
 	do {
 		node = fdt_next_node(blob, node, depthp);
 	} while (*depthp > 1);
 	/* If this is a direct subnode, and compatible, return it */
 	if (*depthp == 1 && 0 == fdt_node_check_compatible(
 						blob, node, compat_names[id]))
 		return node;
 	return -FDT_ERR_NOTFOUND;
 }
 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
 		      int *upto)
 {
 #define MAX_STR_LEN 20
 	char str[MAX_STR_LEN + 20];
 	int node, err;
 	/* snprintf() is not available */
 	assert(strlen(name) < MAX_STR_LEN);
 	sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
 	node = fdt_path_offset(blob, str);
 	if (node < 0)
 		return node;
 	err = fdt_node_check_compatible(blob, node, compat_names[id]);
 	if (err < 0)
 		return err;
 	if (err)
 		return -FDT_ERR_NOTFOUND;
 	(*upto)++;
 	return node;
 }
 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
 			       enum fdt_compat_id id, int *node_list,
 			       int maxcount)
 {
 	memset(node_list, '\0', sizeof(*node_list) * maxcount);
 	return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
 }
 /* TODO: Can we tighten this code up a little? */
 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
 			      enum fdt_compat_id id, int *node_list,
 			      int maxcount)
 {
 	int name_len = strlen(name);
 	int nodes[maxcount];
 	int num_found = 0;
 	int offset, node;
 	int alias_node;
 	int count;
 	int i, j;
 	/* find the alias node if present */
 	alias_node = fdt_path_offset(blob, "/aliases");
 	/*
 	 * start with nothing, and we can assume that the root node can't
 	 * match
 	 */
 	memset(nodes, '\0', sizeof(nodes));
 	/* First find all the compatible nodes */
 	for (node = count = 0; node >= 0 && count < maxcount;) {
 		node = fdtdec_next_compatible(blob, node, id);
 		if (node >= 0)
 			nodes[count++] = node;
 	}
 	if (node >= 0)
 		debug("%s: warning: maxcount exceeded with alias '%s'\n",
 		      __func__, name);
 	/* Now find all the aliases */
 	for (offset = fdt_first_property_offset(blob, alias_node);
 			offset > 0;
 			offset = fdt_next_property_offset(blob, offset)) {
 		const struct fdt_property *prop;
 		const char *path;
 		int number;
 		int found;
 		node = 0;
 		prop = fdt_get_property_by_offset(blob, offset, NULL);
 		path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
 		if (prop->len && 0 == strncmp(path, name, name_len))
 			node = fdt_path_offset(blob, prop->data);
 		if (node <= 0)
 			continue;
 		/* Get the alias number */
 		number = simple_strtoul(path + name_len, NULL, 10);
 		if (number < 0 || number >= maxcount) {
 			debug("%s: warning: alias '%s' is out of range\n",
 			      __func__, path);
 			continue;
 		}
 		/* Make sure the node we found is actually in our list! */
 		found = -1;
 		for (j = 0; j < count; j++)
 			if (nodes[j] == node) {
 				found = j;
 				break;
 			}
 		if (found == -1) {
 			debug("%s: warning: alias '%s' points to a node "
 				"'%s' that is missing or is not compatible "
 				" with '%s'\n", __func__, path,
 				fdt_get_name(blob, node, NULL),
 			       compat_names[id]);
 			continue;
 		}
 		/*
 		 * Add this node to our list in the right place, and mark
 		 * it as done.
 		 */
 		if (fdtdec_get_is_enabled(blob, node)) {
 			if (node_list[number]) {
 				debug("%s: warning: alias '%s' requires that "
 				      "a node be placed in the list in a "
 				      "position which is already filled by "
 				      "node '%s'\n", __func__, path,
 				      fdt_get_name(blob, node, NULL));
 				continue;
 			}
 			node_list[number] = node;
 			if (number >= num_found)
 				num_found = number + 1;
 		}
 		nodes[found] = 0;
 	}
 	/* Add any nodes not mentioned by an alias */
 	for (i = j = 0; i < maxcount; i++) {
 		if (!node_list[i]) {
 			for (; j < maxcount; j++)
 				if (nodes[j] &&
 				    fdtdec_get_is_enabled(blob, nodes[j]))
 					break;
 			/* Have we run out of nodes to add? */
 			if (j == maxcount)
 				break;
 			assert(!node_list[i]);
 			node_list[i] = nodes[j++];
 			if (i >= num_found)
 				num_found = i + 1;
 		}
 	}
 	return num_found;
 }
 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
 			 int *seqp)
 {
 	int base_len = strlen(base);
 	const char *find_name;
 	int find_namelen;
 	int prop_offset;
 	int aliases;
 	find_name = fdt_get_name(blob, offset, &find_namelen);
 	debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
 	aliases = fdt_path_offset(blob, "/aliases");
 	for (prop_offset = fdt_first_property_offset(blob, aliases);
 	     prop_offset > 0;
 	     prop_offset = fdt_next_property_offset(blob, prop_offset)) {
 		const char *prop;
 		const char *name;
 		const char *slash;
 		int len, val;
 		prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
 		debug("   - %s, %s\n", name, prop);
 		if (len < find_namelen || *prop != '/' || prop[len - 1] ||
 		    strncmp(name, base, base_len))
 			continue;
 		slash = strrchr(prop, '/');
 		if (strcmp(slash + 1, find_name))
 			continue;
 		val = trailing_strtol(name);
 		if (val != -1) {
 			*seqp = val;
 			debug("Found seq %d\n", *seqp);
 			return 0;
 		}
 	}
 	debug("Not found\n");
 	return -ENOENT;
 }
 int fdtdec_get_alias_highest_id(const void *blob, const char *base)
 {
 	int base_len = strlen(base);
 	int prop_offset;
 	int aliases;
 	int max = -1;
 	debug("Looking for highest alias id for '%s'\n", base);
 	aliases = fdt_path_offset(blob, "/aliases");
 	for (prop_offset = fdt_first_property_offset(blob, aliases);
 	     prop_offset > 0;
 	     prop_offset = fdt_next_property_offset(blob, prop_offset)) {
 		const char *prop;
 		const char *name;
 		int len, val;
 		prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
 		debug("   - %s, %s\n", name, prop);
 		if (*prop != '/' || prop[len - 1] ||
 		    strncmp(name, base, base_len))
 			continue;
 		val = trailing_strtol(name);
 		if (val > max) {
 			debug("Found seq %d\n", val);
 			max = val;
 		}
 	}
 	return max;
 }
 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
 {
 	int chosen_node;
 	if (!blob)
 		return NULL;
 	chosen_node = fdt_path_offset(blob, "/chosen");
 	return fdt_getprop(blob, chosen_node, name, NULL);
 }
 int fdtdec_get_chosen_node(const void *blob, const char *name)
 {
 	const char *prop;
 	prop = fdtdec_get_chosen_prop(blob, name);
 	if (!prop)
 		return -FDT_ERR_NOTFOUND;
 	return fdt_path_offset(blob, prop);
 }
 int fdtdec_check_fdt(void)
 {
 	/*
 	 * We must have an FDT, but we cannot panic() yet since the console
 	 * is not ready. So for now, just assert(). Boards which need an early
 	 * FDT (prior to console ready) will need to make their own
 	 * arrangements and do their own checks.
 	 */
 	assert(!fdtdec_prepare_fdt());
 	return 0;
 }
 /*
  * This function is a little odd in that it accesses global data. At some
  * point if the architecture board.c files merge this will make more sense.
  * Even now, it is common code.
  */
 int fdtdec_prepare_fdt(void)
 {
 	if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
 	    fdt_check_header(gd->fdt_blob)) {
 #ifdef CONFIG_SPL_BUILD
 		puts("Missing DTB\n");
 #else
 		puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
 # ifdef DEBUG
 		if (gd->fdt_blob) {
 			printf("fdt_blob=%p\n", gd->fdt_blob);
 			print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
 				     32, 0);
 		}
 # endif
 #endif
 		return -1;
 	}
 	return 0;
 }
 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
 {
 	const u32 *phandle;
 	int lookup;
 	debug("%s: %s\n", __func__, prop_name);
 	phandle = fdt_getprop(blob, node, prop_name, NULL);
 	if (!phandle)
 		return -FDT_ERR_NOTFOUND;
 	lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
 	return lookup;
 }
 /**
  * Look up a property in a node and check that it has a minimum length.
  *
  * @param blob		FDT blob
  * @param node		node to examine
  * @param prop_name	name of property to find
  * @param min_len	minimum property length in bytes
  * @param err		0 if ok, or -FDT_ERR_NOTFOUND if the property is not
 			found, or -FDT_ERR_BADLAYOUT if not enough data
  * @return pointer to cell, which is only valid if err == 0
  */
 static const void *get_prop_check_min_len(const void *blob, int node,
 					  const char *prop_name, int min_len,
 					  int *err)
 {
 	const void *cell;
 	int len;
 	debug("%s: %s\n", __func__, prop_name);
 	cell = fdt_getprop(blob, node, prop_name, &len);
 	if (!cell)
 		*err = -FDT_ERR_NOTFOUND;
 	else if (len < min_len)
 		*err = -FDT_ERR_BADLAYOUT;
 	else
 		*err = 0;
 	return cell;
 }
 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
 			 u32 *array, int count)
 {
 	const u32 *cell;
 	int err = 0;
 	debug("%s: %s\n", __func__, prop_name);
 	cell = get_prop_check_min_len(blob, node, prop_name,
 				      sizeof(u32) * count, &err);
 	if (!err) {
 		int i;
 		for (i = 0; i < count; i++)
 			array[i] = fdt32_to_cpu(cell[i]);
 	}
 	return err;
 }
 int fdtdec_get_int_array_count(const void *blob, int node,
 			       const char *prop_name, u32 *array, int count)
 {
 	const u32 *cell;
 	int len, elems;
 	int i;
 	debug("%s: %s\n", __func__, prop_name);
 	cell = fdt_getprop(blob, node, prop_name, &len);
 	if (!cell)
 		return -FDT_ERR_NOTFOUND;
 	elems = len / sizeof(u32);
 	if (count > elems)
 		count = elems;
 	for (i = 0; i < count; i++)
 		array[i] = fdt32_to_cpu(cell[i]);
 	return count;
 }
 const u32 *fdtdec_locate_array(const void *blob, int node,
 			       const char *prop_name, int count)
 {
 	const u32 *cell;
 	int err;
 	cell = get_prop_check_min_len(blob, node, prop_name,
 				      sizeof(u32) * count, &err);
 	return err ? NULL : cell;
 }
 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
 {
 	const s32 *cell;
 	int len;
 	debug("%s: %s\n", __func__, prop_name);
 	cell = fdt_getprop(blob, node, prop_name, &len);
 	return cell != NULL;
 }
 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
 				   const char *list_name,
 				   const char *cells_name,
 				   int cell_count, int index,
 				   struct fdtdec_phandle_args *out_args)
 {
 	const __be32 *list, *list_end;
 	int rc = 0, size, cur_index = 0;
 	uint32_t count = 0;
 	int node = -1;
 	int phandle;
 	/* Retrieve the phandle list property */
 	list = fdt_getprop(blob, src_node, list_name, &size);
 	if (!list)
 		return -ENOENT;
 	list_end = list + size / sizeof(*list);
 	/* Loop over the phandles until all the requested entry is found */
 	while (list < list_end) {
 		rc = -EINVAL;
 		count = 0;
 		/*
 		 * If phandle is 0, then it is an empty entry with no
 		 * arguments.  Skip forward to the next entry.
 		 */
 		phandle = be32_to_cpup(list++);
 		if (phandle) {
 			/*
 			 * Find the provider node and parse the #*-cells
 			 * property to determine the argument length.
 			 *
 			 * This is not needed if the cell count is hard-coded
 			 * (i.e. cells_name not set, but cell_count is set),
 			 * except when we're going to return the found node
 			 * below.
 			 */
 			if (cells_name || cur_index == index) {
 				node = fdt_node_offset_by_phandle(blob,
 								  phandle);
 				if (!node) {
 					debug("%s: could not find phandle\n",
 					      fdt_get_name(blob, src_node,
 							   NULL));
 					goto err;
 				}
 			}
 			if (cells_name) {
 				count = fdtdec_get_int(blob, node, cells_name,
 						       -1);
 				if (count == -1) {
 					debug("%s: could not get %s for %s\n",
 					      fdt_get_name(blob, src_node,
 							   NULL),
 					      cells_name,
 					      fdt_get_name(blob, node,
 							   NULL));
 					goto err;
 				}
 			} else {
 				count = cell_count;
 			}
 			/*
 			 * Make sure that the arguments actually fit in the
 			 * remaining property data length
 			 */
 			if (list + count > list_end) {
 				debug("%s: arguments longer than property\n",
 				      fdt_get_name(blob, src_node, NULL));
 				goto err;
 			}
 		}
 		/*
 		 * All of the error cases above bail out of the loop, so at
 		 * this point, the parsing is successful. If the requested
 		 * index matches, then fill the out_args structure and return,
 		 * or return -ENOENT for an empty entry.
 		 */
 		rc = -ENOENT;
 		if (cur_index == index) {
 			if (!phandle)
 				goto err;
 			if (out_args) {
 				int i;
 				if (count > MAX_PHANDLE_ARGS) {
 					debug("%s: too many arguments %d\n",
 					      fdt_get_name(blob, src_node,
 							   NULL), count);
 					count = MAX_PHANDLE_ARGS;
 				}
 				out_args->node = node;
 				out_args->args_count = count;
 				for (i = 0; i < count; i++) {
 					out_args->args[i] =
 							be32_to_cpup(list++);
 				}
 			}
 			/* Found it! return success */
 			return 0;
 		}
 		node = -1;
 		list += count;
 		cur_index++;
 	}
 	/*
 	 * Result will be one of:
 	 * -ENOENT : index is for empty phandle
 	 * -EINVAL : parsing error on data
 	 * [1..n]  : Number of phandle (count mode; when index = -1)
 	 */
 	rc = index < 0 ? cur_index : -ENOENT;
  err:
 	return rc;
 }
 int fdtdec_get_child_count(const void *blob, int node)
 {
 	int subnode;
 	int num = 0;
 	fdt_for_each_subnode(subnode, blob, node)
 		num++;
 	return num;
 }
 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
 			  u8 *array, int count)
 {
 	const u8 *cell;
 	int err;
 	cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
 	if (!err)
 		memcpy(array, cell, count);
 	return err;
 }
 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
 				   const char *prop_name, int count)
 {
 	const u8 *cell;
 	int err;
 	cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
 	if (err)
 		return NULL;
 	return cell;
 }
 int fdtdec_get_config_int(const void *blob, const char *prop_name,
 			  int default_val)
 {
 	int config_node;
 	debug("%s: %s\n", __func__, prop_name);
 	config_node = fdt_path_offset(blob, "/config");
 	if (config_node < 0)
 		return default_val;
 	return fdtdec_get_int(blob, config_node, prop_name, default_val);
 }
 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
 {
 	int config_node;
 	const void *prop;
 	debug("%s: %s\n", __func__, prop_name);
 	config_node = fdt_path_offset(blob, "/config");
 	if (config_node < 0)
 		return 0;
 	prop = fdt_get_property(blob, config_node, prop_name, NULL);
 	return prop != NULL;
 }
 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
 {
 	const char *nodep;
 	int nodeoffset;
 	int len;
 	debug("%s: %s\n", __func__, prop_name);
 	nodeoffset = fdt_path_offset(blob, "/config");
 	if (nodeoffset < 0)
 		return NULL;
 	nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
 	if (!nodep)
 		return NULL;
 	return (char *)nodep;
 }
 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
 {
 	u64 number = 0;
 	while (cells--)
 		number = (number << 32) | fdt32_to_cpu(*ptr++);
 	return number;
 }
 int fdt_get_resource(const void *fdt, int node, const char *property,
 		     unsigned int index, struct fdt_resource *res)
 {
 	const fdt32_t *ptr, *end;
 	int na, ns, len, parent;
 	unsigned int i = 0;
 	parent = fdt_parent_offset(fdt, node);
 	if (parent < 0)
 		return parent;
 	na = fdt_address_cells(fdt, parent);
 	ns = fdt_size_cells(fdt, parent);
 	ptr = fdt_getprop(fdt, node, property, &len);
 	if (!ptr)
 		return len;
 	end = ptr + len / sizeof(*ptr);
 	while (ptr + na + ns <= end) {
 		if (i == index) {
 			res->start = fdtdec_get_number(ptr, na);
 			res->end = res->start;
 			res->end += fdtdec_get_number(&ptr[na], ns) - 1;
 			return 0;
 		}
 		ptr += na + ns;
 		i++;
 	}
 	return -FDT_ERR_NOTFOUND;
 }
 int fdt_get_named_resource(const void *fdt, int node, const char *property,
 			   const char *prop_names, const char *name,
 			   struct fdt_resource *res)
 {
 	int index;
 	index = fdt_stringlist_search(fdt, node, prop_names, name);
 	if (index < 0)
 		return index;
 	return fdt_get_resource(fdt, node, property, index, res);
 }
 static int decode_timing_property(const void *blob, int node, const char *name,
 				  struct timing_entry *result)
 {
 	int length, ret = 0;
 	const u32 *prop;
 	prop = fdt_getprop(blob, node, name, &length);
 	if (!prop) {
 		debug("%s: could not find property %s\n",
 		      fdt_get_name(blob, node, NULL), name);
 		return length;
 	}
 	if (length == sizeof(u32)) {
 		result->typ = fdtdec_get_int(blob, node, name, 0);
 		result->min = result->typ;
 		result->max = result->typ;
 	} else {
 		ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
 	}
 	return ret;
 }
 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
 				 struct display_timing *dt)
 {
 	int i, node, timings_node;
 	u32 val = 0;
 	int ret = 0;
 	timings_node = fdt_subnode_offset(blob, parent, "display-timings");
 	if (timings_node < 0)
 		return timings_node;
 	for (i = 0, node = fdt_first_subnode(blob, timings_node);
 	     node > 0 && i != index;
 	     node = fdt_next_subnode(blob, node))
 		i++;
 	if (node < 0)
 		return node;
 	memset(dt, 0, sizeof(*dt));
 	ret |= decode_timing_property(blob, node, "hback-porch",
 				      &dt->hback_porch);
 	ret |= decode_timing_property(blob, node, "hfront-porch",
 				      &dt->hfront_porch);
 	ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
 	ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
 	ret |= decode_timing_property(blob, node, "vback-porch",
 				      &dt->vback_porch);
 	ret |= decode_timing_property(blob, node, "vfront-porch",
 				      &dt->vfront_porch);
 	ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
 	ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
 	ret |= decode_timing_property(blob, node, "clock-frequency",
 				      &dt->pixelclock);
 	dt->flags = 0;
 	val = fdtdec_get_int(blob, node, "vsync-active", -1);
 	if (val != -1) {
 		dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
 				DISPLAY_FLAGS_VSYNC_LOW;
 	}
 	val = fdtdec_get_int(blob, node, "hsync-active", -1);
 	if (val != -1) {
 		dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
 				DISPLAY_FLAGS_HSYNC_LOW;
 	}
 	val = fdtdec_get_int(blob, node, "de-active", -1);
 	if (val != -1) {
 		dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
 				DISPLAY_FLAGS_DE_LOW;
 	}
 	val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
 	if (val != -1) {
 		dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
 				DISPLAY_FLAGS_PIXDATA_NEGEDGE;
 	}
 	if (fdtdec_get_bool(blob, node, "interlaced"))
 		dt->flags |= DISPLAY_FLAGS_INTERLACED;
 	if (fdtdec_get_bool(blob, node, "doublescan"))
 		dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
 	if (fdtdec_get_bool(blob, node, "doubleclk"))
 		dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
 	return ret;
 }
 int fdtdec_setup_mem_size_base_fdt(const void *blob)
 {
 	int ret, mem;
 	struct fdt_resource res;
 	mem = fdt_path_offset(blob, "/memory");
 	if (mem < 0) {
 		debug("%s: Missing /memory node\n", __func__);
 		return -EINVAL;
 	}
 	ret = fdt_get_resource(blob, mem, "reg", 0, &res);
 	if (ret != 0) {
 		debug("%s: Unable to decode first memory bank\n", __func__);
 		return -EINVAL;
 	}
 	gd->ram_size = (phys_size_t)(res.end - res.start + 1);
 	gd->ram_base = (unsigned long)res.start;
 	debug("%s: Initial DRAM size %llx\n", __func__,
 	      (unsigned long long)gd->ram_size);
 	return 0;
 }
 int fdtdec_setup_mem_size_base(void)
 {
 	return fdtdec_setup_mem_size_base_fdt(gd->fdt_blob);
 }
 #if defined(CONFIG_NR_DRAM_BANKS)
 static int get_next_memory_node(const void *blob, int mem)
 {
 	do {
 		mem = fdt_node_offset_by_prop_value(blob, mem,
 						    "device_type", "memory", 7);
 	} while (!fdtdec_get_is_enabled(blob, mem));
 	return mem;
 }
 int fdtdec_setup_memory_banksize_fdt(const void *blob)
 {
 	int bank, ret, mem, reg = 0;
 	struct fdt_resource res;
 	mem = get_next_memory_node(blob, -1);
 	if (mem < 0) {
 		debug("%s: Missing /memory node\n", __func__);
 		return -EINVAL;
 	}
 	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
 		ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
 		if (ret == -FDT_ERR_NOTFOUND) {
 			reg = 0;
 			mem = get_next_memory_node(blob, mem);
 			if (mem == -FDT_ERR_NOTFOUND)
 				break;
 			ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
 			if (ret == -FDT_ERR_NOTFOUND)
 				break;
 		}
 		if (ret != 0) {
 			return -EINVAL;
 		}
 		gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
 		gd->bd->bi_dram[bank].size =
 			(phys_size_t)(res.end - res.start + 1);
 		debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
 		      __func__, bank,
 		      (unsigned long long)gd->bd->bi_dram[bank].start,
 		      (unsigned long long)gd->bd->bi_dram[bank].size);
 	}
 	return 0;
 }
 int fdtdec_setup_memory_banksize(void)
 {
 	return fdtdec_setup_memory_banksize_fdt(gd->fdt_blob);
 }
 #endif
 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
 	CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
 {
 	size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
 	bool gzip = 0, lzo = 0;
 	ulong sz_in = sz_src;
 	void *dst;
 	int rc;
 	if (CONFIG_IS_ENABLED(GZIP))
 		if (gzip_parse_header(src, sz_in) >= 0)
 			gzip = 1;
 	if (CONFIG_IS_ENABLED(LZO))
 		if (!gzip && lzop_is_valid_header(src))
 			lzo = 1;
 	if (!gzip && !lzo)
 		return -EBADMSG;
 	if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
 		dst = malloc(sz_out);
 		if (!dst) {
 			puts("uncompress_blob: Unable to allocate memory\n");
 			return -ENOMEM;
 		}
 	} else  {
 #  if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
 		dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
 #  else
 		return -ENOTSUPP;
 #  endif
 	}
 	if (CONFIG_IS_ENABLED(GZIP) && gzip)
 		rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
 	else if (CONFIG_IS_ENABLED(LZO) && lzo)
 		rc = lzop_decompress(src, sz_in, dst, &sz_out);
 	else
 		hang();
 	if (rc < 0) {
 		/* not a valid compressed blob */
 		puts("uncompress_blob: Unable to uncompress\n");
 		if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
 			free(dst);
 		return -EBADMSG;
 	}
 	*dstp = dst;
 	return 0;
 }
 # else
 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
 {
 	*dstp = (void *)src;
 	return 0;
 }
 # endif
 #endif
 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
 /*
  * For CONFIG_OF_SEPARATE, the board may optionally implement this to
  * provide and/or fixup the fdt.
  */
 __weak void *board_fdt_blob_setup(void)
 {
 	void *fdt_blob = NULL;
 #ifdef CONFIG_SPL_BUILD
 	/* FDT is at end of BSS unless it is in a different memory region */
 	if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
 		fdt_blob = (ulong *)&_image_binary_end;
 	else
 		fdt_blob = (ulong *)&__bss_end;
 #else
 	/* FDT is at end of image */
 	fdt_blob = (ulong *)&_end;
 #endif
 	return fdt_blob;
 }
 #endif
 static int fdtdec_init_reserved_memory(void *blob)
 {
 	int na, ns, node, err;
 	fdt32_t value;
 	/* inherit #address-cells and #size-cells from the root node */
 	na = fdt_address_cells(blob, 0);
 	ns = fdt_size_cells(blob, 0);
 	node = fdt_add_subnode(blob, 0, "reserved-memory");
 	if (node < 0)
 		return node;
 	err = fdt_setprop(blob, node, "ranges", NULL, 0);
 	if (err < 0)
 		return err;
 	value = cpu_to_fdt32(ns);
 	err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
 	if (err < 0)
 		return err;
 	value = cpu_to_fdt32(na);
 	err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
 	if (err < 0)
 		return err;
 	return node;
 }
 int fdtdec_add_reserved_memory(void *blob, const char *basename,
 			       const struct fdt_memory *carveout,
 			       uint32_t *phandlep)
 {
 	fdt32_t cells[4] = {}, *ptr = cells;
 	uint32_t upper, lower, phandle;
 	int parent, node, na, ns, err;
+	fdt_size_t size;
 	char name[64];
 	/* create an empty /reserved-memory node if one doesn't exist */
 	parent = fdt_path_offset(blob, "/reserved-memory");
 	if (parent < 0) {
 		parent = fdtdec_init_reserved_memory(blob);
 		if (parent < 0)
 			return parent;
 	}
 	/* only 1 or 2 #address-cells and #size-cells are supported */
 	na = fdt_address_cells(blob, parent);
 	if (na < 1 || na > 2)
 		return -FDT_ERR_BADNCELLS;
 	ns = fdt_size_cells(blob, parent);
 	if (ns < 1 || ns > 2)
 		return -FDT_ERR_BADNCELLS;
 	/* find a matching node and return the phandle to that */
 	fdt_for_each_subnode(node, blob, parent) {
 		const char *name = fdt_get_name(blob, node, NULL);
 		phys_addr_t addr, size;
 		addr = fdtdec_get_addr_size(blob, node, "reg", &size);
 		if (addr == FDT_ADDR_T_NONE) {
 			debug("failed to read address/size for %s\n", name);
 			continue;
 		}
 		if (addr == carveout->start && (addr + size) == carveout->end) {
 			*phandlep = fdt_get_phandle(blob, node);
 			return 0;
 		}
 	}
 	/*
 	 * Unpack the start address and generate the name of the new node
 	 * base on the basename and the unit-address.
 	 */
-	lower = fdt_addr_unpack(carveout->start, &upper);
+	upper = upper_32_bits(carveout->start);
+	lower = lower_32_bits(carveout->start);
 	if (na > 1 && upper > 0)
 		snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
 			 lower);
 	else {
 		if (upper > 0) {
 			debug("address %08x:%08x exceeds addressable space\n",
 			      upper, lower);
 			return -FDT_ERR_BADVALUE;
 		}
 		snprintf(name, sizeof(name), "%s@%x", basename, lower);
 	}
 	node = fdt_add_subnode(blob, parent, name);
 	if (node < 0)
 		return node;
 	err = fdt_generate_phandle(blob, &phandle);
 	if (err < 0)
 		return err;
 	err = fdtdec_set_phandle(blob, node, phandle);
 	if (err < 0)
 		return err;
 	/* store one or two address cells */
 	if (na > 1)
 		*ptr++ = cpu_to_fdt32(upper);
 	*ptr++ = cpu_to_fdt32(lower);
 	/* store one or two size cells */
-	lower = fdt_size_unpack(carveout->end - carveout->start + 1, &upper);
+	size = carveout->end - carveout->start + 1;
+	upper = upper_32_bits(size);
+	lower = lower_32_bits(size);
 	if (ns > 1)
 		*ptr++ = cpu_to_fdt32(upper);
 	*ptr++ = cpu_to_fdt32(lower);
 	err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
 	if (err < 0)
 		return err;
 	/* return the phandle for the new node for the caller to use */
 	if (phandlep)
 		*phandlep = phandle;
 	return 0;
 }
 int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
 			unsigned int index, struct fdt_memory *carveout)
 {
 	const fdt32_t *prop;
 	uint32_t phandle;
 	int offset, len;
 	fdt_size_t size;
 	offset = fdt_path_offset(blob, node);
 	if (offset < 0)
 		return offset;
 	prop = fdt_getprop(blob, offset, name, &len);
 	if (!prop) {
 		debug("failed to get %s for %s\n", name, node);
 		return -FDT_ERR_NOTFOUND;
 	}
 	if ((len % sizeof(phandle)) != 0) {
 		debug("invalid phandle property\n");
 		return -FDT_ERR_BADPHANDLE;
 	}
 	if (len < (sizeof(phandle) * (index + 1))) {
 		debug("invalid phandle index\n");
 		return -FDT_ERR_BADPHANDLE;
 	}
 	phandle = fdt32_to_cpu(prop[index]);
 	offset = fdt_node_offset_by_phandle(blob, phandle);
 	if (offset < 0) {
 		debug("failed to find node for phandle %u\n", phandle);
 		return offset;
 	}
 	carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
 							     "reg", 0, &size,
 							     true);
 	if (carveout->start == FDT_ADDR_T_NONE) {
 		debug("failed to read address/size from \"reg\" property\n");
 		return -FDT_ERR_NOTFOUND;
 	}
 	carveout->end = carveout->start + size - 1;
 	return 0;
 }
 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
 			unsigned int index, const char *name,
 			const struct fdt_memory *carveout)
 {
 	uint32_t phandle;
 	int err, offset;
 	fdt32_t value;
 	/* XXX implement support for multiple phandles */
 	if (index > 0) {
 		debug("invalid index %u\n", index);
 		return -FDT_ERR_BADOFFSET;
 	}
 	err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle);
 	if (err < 0) {
 		debug("failed to add reserved memory: %d\n", err);
 		return err;
 	}
 	offset = fdt_path_offset(blob, node);
 	if (offset < 0) {
 		debug("failed to find offset for node %s: %d\n", node, offset);
 		return offset;
 	}
 	value = cpu_to_fdt32(phandle);
 	err = fdt_setprop(blob, offset, prop_name, &value, sizeof(value));
 	if (err < 0) {
 		debug("failed to set %s property for node %s: %d\n", prop_name,
 		      node, err);
 		return err;
 	}
 	return 0;
 }
 int fdtdec_setup(void)
 {
 #if CONFIG_IS_ENABLED(OF_CONTROL)
 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
 	void *fdt_blob;
 # endif
 # ifdef CONFIG_OF_EMBED
 	/* Get a pointer to the FDT */
 #  ifdef CONFIG_SPL_BUILD
 	gd->fdt_blob = __dtb_dt_spl_begin;
 #  else
 	gd->fdt_blob = __dtb_dt_begin;
 #  endif
 # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
 	/* Allow the board to override the fdt address. */
 	gd->fdt_blob = board_fdt_blob_setup();
 # elif defined(CONFIG_OF_HOSTFILE)
 	if (sandbox_read_fdt_from_file()) {
 		puts("Failed to read control FDT\n");
 		return -1;
 	}
 # endif
 # ifndef CONFIG_SPL_BUILD
 	/* Allow the early environment to override the fdt address */
 #  if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
 	gd->fdt_blob = (void *)prior_stage_fdt_address;
 #  else
 	gd->fdt_blob = map_sysmem
 		(env_get_ulong("fdtcontroladdr", 16,
 			       (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
 #  endif
 # endif
 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
 	/*
 	 * Try and uncompress the blob.
 	 * Unfortunately there is no way to know how big the input blob really
 	 * is. So let us set the maximum input size arbitrarily high. 16MB
 	 * ought to be more than enough for packed DTBs.
 	 */
 	if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
 		gd->fdt_blob = fdt_blob;
 	/*
 	 * Check if blob is a FIT images containings DTBs.
 	 * If so, pick the most relevant
 	 */
 	fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
 	if (fdt_blob) {
 		gd->multi_dtb_fit = gd->fdt_blob;
 		gd->fdt_blob = fdt_blob;
 	}
 # endif
 #endif
 	return fdtdec_prepare_fdt();
 }
 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
 int fdtdec_resetup(int *rescan)
 {
 	void *fdt_blob;
 	/*
 	 * If the current DTB is part of a compressed FIT image,
 	 * try to locate the best match from the uncompressed
 	 * FIT image stillpresent there. Save the time and space
 	 * required to uncompress it again.
 	 */
 	if (gd->multi_dtb_fit) {
 		fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
 		if (fdt_blob == gd->fdt_blob) {
 			/*
 			 * The best match did not change. no need to tear down
 			 * the DM and rescan the fdt.
 			 */
 			*rescan = 0;
 			return 0;
 		}
 		*rescan = 1;
 		gd->fdt_blob = fdt_blob;
 		return fdtdec_prepare_fdt();
 	}
 	/*
 	 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
 	 * not a FIT image containings DTB, but a single DTB. There is no need
 	 * to teard down DM and rescan the DT in this case.
 	 */
 	*rescan = 0;
 	return 0;
 }
 #endif
 #ifdef CONFIG_NR_DRAM_BANKS
 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
 			   phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
 {
 	int addr_cells, size_cells;
 	const u32 *cell, *end;
 	u64 total_size, size, addr;
 	int node, child;
 	bool auto_size;
 	int bank;
 	int len;
 	debug("%s: board_id=%d\n", __func__, board_id);
 	if (!area)
 		area = "/memory";
 	node = fdt_path_offset(blob, area);
 	if (node < 0) {
 		debug("No %s node found\n", area);
 		return -ENOENT;
 	}
 	cell = fdt_getprop(blob, node, "reg", &len);
 	if (!cell) {
 		debug("No reg property found\n");
 		return -ENOENT;
 	}
 	addr_cells = fdt_address_cells(blob, node);
 	size_cells = fdt_size_cells(blob, node);
 	/* Check the board id and mask */
 	for (child = fdt_first_subnode(blob, node);
 	     child >= 0;
 	     child = fdt_next_subnode(blob, child)) {
 		int match_mask, match_value;
 		match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
 		match_value = fdtdec_get_int(blob, child, "match-value", -1);
 		if (match_value >= 0 &&
 		    ((board_id & match_mask) == match_value)) {
 			/* Found matching mask */
 			debug("Found matching mask %d\n", match_mask);
 			node = child;
 			cell = fdt_getprop(blob, node, "reg", &len);
 			if (!cell) {
 				debug("No memory-banks property found\n");
 				return -EINVAL;
 			}
 			break;
 		}
 	}
 	/* Note: if no matching subnode was found we use the parent node */
 	if (bd) {
 		memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
 						CONFIG_NR_DRAM_BANKS);
 	}
 	auto_size = fdtdec_get_bool(blob, node, "auto-size");
 	total_size = 0;
 	end = cell + len / 4 - addr_cells - size_cells;
 	debug("cell at %p, end %p\n", cell, end);
 	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
 		if (cell > end)
 			break;
 		addr = 0;
 		if (addr_cells == 2)
 			addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
 		addr += fdt32_to_cpu(*cell++);
 		if (bd)
 			bd->bi_dram[bank].start = addr;
 		if (basep && !bank)
 			*basep = (phys_addr_t)addr;
 		size = 0;
 		if (size_cells == 2)
 			size += (u64)fdt32_to_cpu(*cell++) << 32UL;
 		size += fdt32_to_cpu(*cell++);
 		if (auto_size) {
 			u64 new_size;
 			debug("Auto-sizing %llx, size %llx: ", addr, size);
 			new_size = get_ram_size((long *)(uintptr_t)addr, size);
 			if (new_size == size) {
 				debug("OK\n");
 			} else {
 				debug("sized to %llx\n", new_size);
 				size = new_size;
 			}
 		}
 		if (bd)
 			bd->bi_dram[bank].size = size;
 		total_size += size;
 	}
 	debug("Memory size %llu\n", total_size);
 	if (sizep)
 		*sizep = (phys_size_t)total_size;
 	return 0;
 }
 #endif /* CONFIG_NR_DRAM_BANKS */
 #endif /* !USE_HOSTCC */

lib/fdtdec_test.c

Diff comments View file @ 3bf2f15

 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Some very basic tests for fdtdec, accessed through test_fdtdec command.
  * They are easiest to use with sandbox.
  *
  * Copyright (c) 2011 The Chromium OS Authors.
  */
 #include <common.h>
 #include <fdtdec.h>
 #include <linux/libfdt.h>
 #include <malloc.h>
 #include <os.h>
 /* The size of our test fdt blob */
 #define FDT_SIZE	(16 * 1024)
 #define CHECK(op) ({							\
 		int err = op;						\
 		if (err < 0) {						\
 			printf("%s: %s: %s\n", __func__, #op,		\
 			       fdt_strerror(err));			\
 			return err;					\
 		}							\
 									\
 		err;							\
 	})
 #define CHECKVAL(op, expected) ({					\
 		int err = op;						\
 		if (err != expected) {					\
 			printf("%s: %s: expected %d, but returned %d\n",\
 			       __func__, #op, expected, err);		\
 			return err;					\
 		}							\
 									\
 		err;							\
 	})
 #define CHECKOK(op)	CHECKVAL(op, 0)
 /* maximum number of nodes / aliases to generate */
 #define MAX_NODES	20
 /*
  * Make a test fdt
  *
  * @param fdt		Device tree pointer
  * @param size		Size of device tree blob
  * @param aliases	Specifies alias assignments. Format is a list of items
  *			separated by space. Items are #a where
  *				# is the alias number
  *				a is the node to point to
  * @param nodes		Specifies nodes to generate (a=0, b=1), upper case
  *			means to create a disabled node
  */
 static int make_fdt(void *fdt, int size, const char *aliases,
 		    const char *nodes)
 {
 	char name[20], value[20];
 	const char *s;
 #if defined(DEBUG) && defined(CONFIG_SANDBOX)
 	int fd;
 #endif
 	CHECK(fdt_create(fdt, size));
 	CHECK(fdt_finish_reservemap(fdt));
 	CHECK(fdt_begin_node(fdt, ""));
 	CHECK(fdt_begin_node(fdt, "aliases"));
 	for (s = aliases; *s;) {
 		sprintf(name, "i2c%c", *s);
 		sprintf(value, "/i2c%d@0", s[1] - 'a');
 		CHECK(fdt_property_string(fdt, name, value));
 		s += 2 + (s[2] != '\0');
 	}
 	CHECK(fdt_end_node(fdt));
 	for (s = nodes; *s; s++) {
 		sprintf(value, "i2c%d@0", (*s & 0xdf) - 'A');
 		CHECK(fdt_begin_node(fdt, value));
 		CHECK(fdt_property_string(fdt, "compatible",
 			fdtdec_get_compatible(COMPAT_UNKNOWN)));
 		if (*s <= 'Z')
 			CHECK(fdt_property_string(fdt, "status", "disabled"));
 		CHECK(fdt_end_node(fdt));
 	}
 	CHECK(fdt_end_node(fdt));
 	CHECK(fdt_finish(fdt));
 	CHECK(fdt_pack(fdt));
 #if defined(DEBUG) && defined(CONFIG_SANDBOX)
 	fd = os_open("/tmp/fdtdec-text.dtb", OS_O_CREAT | OS_O_WRONLY);
 	if (fd == -1) {
 		printf("Could not open .dtb file to write\n");
 		return -1;
 	}
 	os_write(fd, fdt, size);
 	os_close(fd);
 #endif
 	return 0;
 }
 static int run_test(const char *aliases, const char *nodes, const char *expect)
 {
 	int list[MAX_NODES];
 	const char *s;
 	void *blob;
 	int i;
 	blob = malloc(FDT_SIZE);
 	if (!blob) {
 		printf("%s: out of memory\n", __func__);
 		return 1;
 	}
 	printf("aliases=%s, nodes=%s, expect=%s: ", aliases, nodes, expect);
 	CHECKVAL(make_fdt(blob, FDT_SIZE, aliases, nodes), 0);
 	CHECKVAL(fdtdec_find_aliases_for_id(blob, "i2c",
 			COMPAT_UNKNOWN,
 			list, ARRAY_SIZE(list)), (int)strlen(expect));
 	/* Check we got the right ones */
 	for (i = 0, s = expect; *s; s++, i++) {
 		int want = *s;
 		const char *name;
 		int got = ' ';
 		name = list[i] ? fdt_get_name(blob, list[i], NULL) : NULL;
 		if (name)
 			got = name[3] + 'a' - '0';
 		if (got != want) {
 			printf("Position %d: Expected '%c', got '%c' ('%s')\n",
 			       i, want, got, name);
 			return 1;
 		}
 	}
 	printf("pass\n");
 	return 0;
 }
 static int make_fdt_carveout_device(void *fdt, uint32_t na, uint32_t ns)
 {
 	const char *basename = "/display";
 	struct fdt_memory carveout = {
 #ifdef CONFIG_PHYS_64BIT
 		.start = 0x180000000,
 		.end = 0x18fffffff,
 #else
 		.start = 0x80000000,
 		.end = 0x8fffffff,
 #endif
 	};
 	fdt32_t cells[4], *ptr = cells;
 	uint32_t upper, lower;
+	fdt_size_t size;
 	char name[32];
 	int offset;
 	/* store one or two address cells */
-	lower = fdt_addr_unpack(carveout.start, &upper);
+	upper = upper_32_bits(carveout.start);
+	lower = lower_32_bits(carveout.start);
 	if (na > 1 && upper > 0)
 		snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
 			 lower);
 	else
 		snprintf(name, sizeof(name), "%s@%x", basename, lower);
 	if (na > 1)
 		*ptr++ = cpu_to_fdt32(upper);
 	*ptr++ = cpu_to_fdt32(lower);
 	/* store one or two size cells */
-	lower = fdt_size_unpack(carveout.end - carveout.start + 1, &upper);
+	size = carveout.end - carveout.start + 1;
+	upper = upper_32_bits(size);
+	lower = lower_32_bits(size);
 	if (ns > 1)
 		*ptr++ = cpu_to_fdt32(upper);
 	*ptr++ = cpu_to_fdt32(lower);
 	offset = CHECK(fdt_add_subnode(fdt, 0, name + 1));
 	CHECK(fdt_setprop(fdt, offset, "reg", cells, (na + ns) * sizeof(*cells)));
 	return fdtdec_set_carveout(fdt, name, "memory-region", 0,
 				   "framebuffer", &carveout);
 }
 static int check_fdt_carveout(void *fdt, uint32_t address_cells,
 			      uint32_t size_cells)
 {
 #ifdef CONFIG_PHYS_64BIT
 	const char *name = "/display@1,80000000";
 	const struct fdt_memory expected = {
 		.start = 0x180000000,
 		.end = 0x18fffffff,
 	};
 #else
 	const char *name = "/display@80000000";
 	const struct fdt_memory expected = {
 		.start = 0x80000000,
 		.end = 0x8fffffff,
 	};
 #endif
 	struct fdt_memory carveout;
 	printf("carveout: %pap-%pap na=%u ns=%u: ", &expected.start,
 	       &expected.end, address_cells, size_cells);
 	CHECK(fdtdec_get_carveout(fdt, name, "memory-region", 0, &carveout));
 	if ((carveout.start != expected.start) ||
 	    (carveout.end != expected.end)) {
 		printf("carveout: %pap-%pap, expected %pap-%pap\n",
 		       &carveout.start, &carveout.end,
 		       &expected.start, &expected.end);
 		return 1;
 	}
 	printf("pass\n");
 	return 0;
 }
 static int make_fdt_carveout(void *fdt, int size, uint32_t address_cells,
 			     uint32_t size_cells)
 {
 	fdt32_t na = cpu_to_fdt32(address_cells);
 	fdt32_t ns = cpu_to_fdt32(size_cells);
 #if defined(DEBUG) && defined(CONFIG_SANDBOX)
 	char filename[512];
 	int fd;
 #endif
 	int err;
 	CHECK(fdt_create(fdt, size));
 	CHECK(fdt_finish_reservemap(fdt));
 	CHECK(fdt_begin_node(fdt, ""));
 	CHECK(fdt_property(fdt, "#address-cells", &na, sizeof(na)));
 	CHECK(fdt_property(fdt, "#size-cells", &ns, sizeof(ns)));
 	CHECK(fdt_end_node(fdt));
 	CHECK(fdt_finish(fdt));
 	CHECK(fdt_pack(fdt));
 	CHECK(fdt_open_into(fdt, fdt, FDT_SIZE));
 	err = make_fdt_carveout_device(fdt, address_cells, size_cells);
 #if defined(DEBUG) && defined(CONFIG_SANDBOX)
 	snprintf(filename, sizeof(filename), "/tmp/fdtdec-carveout-%u-%u.dtb",
 		 address_cells, size_cells);
 	fd = os_open(filename, OS_O_CREAT | OS_O_WRONLY);
 	if (fd < 0) {
 		printf("could not open .dtb file to write\n");
 		goto out;
 	}
 	os_write(fd, fdt, size);
 	os_close(fd);
 out:
 #endif
 	return err;
 }
 static int check_carveout(void)
 {
 	void *fdt;
 	fdt = malloc(FDT_SIZE);
 	if (!fdt) {
 		printf("%s: out of memory\n", __func__);
 		return 1;
 	}
 #ifndef CONFIG_PHYS_64BIT
 	CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 1, 1), 0);
 	CHECKOK(check_fdt_carveout(fdt, 1, 1));
 	CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 1, 2), 0);
 	CHECKOK(check_fdt_carveout(fdt, 1, 2));
 #else
 	CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 1, 1), -FDT_ERR_BADVALUE);
 	CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 1, 2), -FDT_ERR_BADVALUE);
 #endif
 	CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 2, 1), 0);
 	CHECKOK(check_fdt_carveout(fdt, 2, 1));
 	CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 2, 2), 0);
 	CHECKOK(check_fdt_carveout(fdt, 2, 2));
 	return 0;
 }
 static int do_test_fdtdec(cmd_tbl_t *cmdtp, int flag, int argc,
 			  char * const argv[])
 {
 	/* basic tests */
 	CHECKOK(run_test("", "", ""));
 	CHECKOK(run_test("1e 3d", "", ""));
 	/*
 	 * 'a' represents 0, 'b' represents 1, etc.
 	 * The first character is the alias number, the second is the node
 	 * number. So the params mean:
 	 * 0a 1b	: point alias 0 to node 0 (a), alias 1 to node 1(b)
 	 * ab		: to create nodes 0 and 1 (a and b)
 	 * ab		: we expect the function to return two nodes, in
 	 *		  the order 0, 1
 	 */
 	CHECKOK(run_test("0a 1b", "ab", "ab"));
 	CHECKOK(run_test("0a 1c", "ab", "ab"));
 	CHECKOK(run_test("1c", "ab", "ab"));
 	CHECKOK(run_test("1b", "ab", "ab"));
 	CHECKOK(run_test("0b", "ab", "ba"));
 	CHECKOK(run_test("0b 2d", "dbc", "bcd"));
 	CHECKOK(run_test("0d 3a 1c 2b", "dbac", "dcba"));
 	/* things with holes */
 	CHECKOK(run_test("1b 3d", "dbc", "cb d"));
 	CHECKOK(run_test("1e 3d", "dbc", "bc d"));
 	/* no aliases */
 	CHECKOK(run_test("", "dbac", "dbac"));
 	/* disabled nodes */
 	CHECKOK(run_test("0d 3a 1c 2b", "dBac", "dc a"));
 	CHECKOK(run_test("0b 2d", "DBc", "c"));
 	CHECKOK(run_test("0b 4d 2c", "DBc", "  c"));
 	/* conflicting aliases - first one gets it */
 	CHECKOK(run_test("2a 1a 0a", "a", "  a"));
 	CHECKOK(run_test("0a 1a 2a", "a", "a"));
 	CHECKOK(check_carveout());
 	printf("Test passed\n");
 	return 0;
 }
 U_BOOT_CMD(
 	test_fdtdec, 3, 1, do_test_fdtdec,
 	"test_fdtdec",
 	"Run tests for fdtdec library");