Commit 3c7b4c359d11e65ea262dac283114b72f08d4625
Committed by
Michal Simek
1 parent
90e97ab31e
Exists in
smarc_8mq_lf_v2020.04
and in
12 other branches
arm: zynq: Update boot_targets based on bootmode
Update boot_targets based on bootmode to run corresponding distroboot command first. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Showing 1 changed file with 29 additions and 0 deletions Inline Diff
board/xilinx/zynq/board.c
1 | // SPDX-License-Identifier: GPL-2.0+ | 1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* | 2 | /* |
3 | * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> | 3 | * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> |
4 | * (C) Copyright 2013 - 2018 Xilinx, Inc. | 4 | * (C) Copyright 2013 - 2018 Xilinx, Inc. |
5 | */ | 5 | */ |
6 | 6 | ||
7 | #include <common.h> | 7 | #include <common.h> |
8 | #include <dm/uclass.h> | 8 | #include <dm/uclass.h> |
9 | #include <fdtdec.h> | 9 | #include <fdtdec.h> |
10 | #include <fpga.h> | 10 | #include <fpga.h> |
11 | #include <malloc.h> | ||
11 | #include <mmc.h> | 12 | #include <mmc.h> |
12 | #include <watchdog.h> | 13 | #include <watchdog.h> |
13 | #include <wdt.h> | 14 | #include <wdt.h> |
14 | #include <zynqpl.h> | 15 | #include <zynqpl.h> |
15 | #include <asm/arch/hardware.h> | 16 | #include <asm/arch/hardware.h> |
16 | #include <asm/arch/sys_proto.h> | 17 | #include <asm/arch/sys_proto.h> |
17 | 18 | ||
18 | DECLARE_GLOBAL_DATA_PTR; | 19 | DECLARE_GLOBAL_DATA_PTR; |
19 | 20 | ||
20 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) | 21 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) |
21 | static struct udevice *watchdog_dev; | 22 | static struct udevice *watchdog_dev; |
22 | #endif | 23 | #endif |
23 | 24 | ||
24 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_BOARD_EARLY_INIT_F) | 25 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_BOARD_EARLY_INIT_F) |
25 | int board_early_init_f(void) | 26 | int board_early_init_f(void) |
26 | { | 27 | { |
27 | # if defined(CONFIG_WDT) | 28 | # if defined(CONFIG_WDT) |
28 | /* bss is not cleared at time when watchdog_reset() is called */ | 29 | /* bss is not cleared at time when watchdog_reset() is called */ |
29 | watchdog_dev = NULL; | 30 | watchdog_dev = NULL; |
30 | # endif | 31 | # endif |
31 | 32 | ||
32 | return 0; | 33 | return 0; |
33 | } | 34 | } |
34 | #endif | 35 | #endif |
35 | 36 | ||
36 | int board_init(void) | 37 | int board_init(void) |
37 | { | 38 | { |
38 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) | 39 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) |
39 | if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) { | 40 | if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) { |
40 | debug("Watchdog: Not found by seq!\n"); | 41 | debug("Watchdog: Not found by seq!\n"); |
41 | if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) { | 42 | if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) { |
42 | puts("Watchdog: Not found!\n"); | 43 | puts("Watchdog: Not found!\n"); |
43 | return 0; | 44 | return 0; |
44 | } | 45 | } |
45 | } | 46 | } |
46 | 47 | ||
47 | wdt_start(watchdog_dev, 0, 0); | 48 | wdt_start(watchdog_dev, 0, 0); |
48 | puts("Watchdog: Started\n"); | 49 | puts("Watchdog: Started\n"); |
49 | # endif | 50 | # endif |
50 | 51 | ||
51 | return 0; | 52 | return 0; |
52 | } | 53 | } |
53 | 54 | ||
54 | int board_late_init(void) | 55 | int board_late_init(void) |
55 | { | 56 | { |
57 | int env_targets_len = 0; | ||
58 | const char *mode; | ||
59 | char *new_targets; | ||
60 | char *env_targets; | ||
61 | |||
56 | switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) { | 62 | switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) { |
57 | case ZYNQ_BM_QSPI: | 63 | case ZYNQ_BM_QSPI: |
64 | mode = "qspi"; | ||
58 | env_set("modeboot", "qspiboot"); | 65 | env_set("modeboot", "qspiboot"); |
59 | break; | 66 | break; |
60 | case ZYNQ_BM_NAND: | 67 | case ZYNQ_BM_NAND: |
68 | mode = "nand"; | ||
61 | env_set("modeboot", "nandboot"); | 69 | env_set("modeboot", "nandboot"); |
62 | break; | 70 | break; |
63 | case ZYNQ_BM_NOR: | 71 | case ZYNQ_BM_NOR: |
72 | mode = "nor"; | ||
64 | env_set("modeboot", "norboot"); | 73 | env_set("modeboot", "norboot"); |
65 | break; | 74 | break; |
66 | case ZYNQ_BM_SD: | 75 | case ZYNQ_BM_SD: |
76 | mode = "mmc"; | ||
67 | env_set("modeboot", "sdboot"); | 77 | env_set("modeboot", "sdboot"); |
68 | break; | 78 | break; |
69 | case ZYNQ_BM_JTAG: | 79 | case ZYNQ_BM_JTAG: |
80 | mode = "pxe dhcp"; | ||
70 | env_set("modeboot", "jtagboot"); | 81 | env_set("modeboot", "jtagboot"); |
71 | break; | 82 | break; |
72 | default: | 83 | default: |
84 | mode = ""; | ||
73 | env_set("modeboot", ""); | 85 | env_set("modeboot", ""); |
74 | break; | 86 | break; |
75 | } | 87 | } |
88 | |||
89 | /* | ||
90 | * One terminating char + one byte for space between mode | ||
91 | * and default boot_targets | ||
92 | */ | ||
93 | env_targets = env_get("boot_targets"); | ||
94 | if (env_targets) | ||
95 | env_targets_len = strlen(env_targets); | ||
96 | |||
97 | new_targets = calloc(1, strlen(mode) + env_targets_len + 2); | ||
98 | if (!new_targets) | ||
99 | return -ENOMEM; | ||
100 | |||
101 | sprintf(new_targets, "%s %s", mode, | ||
102 | env_targets ? env_targets : ""); | ||
103 | |||
104 | env_set("boot_targets", new_targets); | ||
76 | 105 | ||
77 | return 0; | 106 | return 0; |
78 | } | 107 | } |
79 | 108 | ||
80 | #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE) | 109 | #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE) |
81 | int dram_init_banksize(void) | 110 | int dram_init_banksize(void) |
82 | { | 111 | { |
83 | return fdtdec_setup_memory_banksize(); | 112 | return fdtdec_setup_memory_banksize(); |
84 | } | 113 | } |
85 | 114 | ||
86 | int dram_init(void) | 115 | int dram_init(void) |
87 | { | 116 | { |
88 | if (fdtdec_setup_mem_size_base() != 0) | 117 | if (fdtdec_setup_mem_size_base() != 0) |
89 | return -EINVAL; | 118 | return -EINVAL; |
90 | 119 | ||
91 | zynq_ddrc_init(); | 120 | zynq_ddrc_init(); |
92 | 121 | ||
93 | return 0; | 122 | return 0; |
94 | } | 123 | } |
95 | #else | 124 | #else |
96 | int dram_init(void) | 125 | int dram_init(void) |
97 | { | 126 | { |
98 | gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, | 127 | gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, |
99 | CONFIG_SYS_SDRAM_SIZE); | 128 | CONFIG_SYS_SDRAM_SIZE); |
100 | 129 | ||
101 | zynq_ddrc_init(); | 130 | zynq_ddrc_init(); |
102 | 131 | ||
103 | return 0; | 132 | return 0; |
104 | } | 133 | } |
105 | #endif | 134 | #endif |
106 | 135 | ||
107 | #if defined(CONFIG_WATCHDOG) | 136 | #if defined(CONFIG_WATCHDOG) |
108 | /* Called by macro WATCHDOG_RESET */ | 137 | /* Called by macro WATCHDOG_RESET */ |
109 | void watchdog_reset(void) | 138 | void watchdog_reset(void) |
110 | { | 139 | { |
111 | # if !defined(CONFIG_SPL_BUILD) | 140 | # if !defined(CONFIG_SPL_BUILD) |
112 | static ulong next_reset; | 141 | static ulong next_reset; |
113 | ulong now; | 142 | ulong now; |
114 | 143 | ||
115 | if (!watchdog_dev) | 144 | if (!watchdog_dev) |
116 | return; | 145 | return; |
117 | 146 | ||
118 | now = timer_get_us(); | 147 | now = timer_get_us(); |
119 | 148 | ||
120 | /* Do not reset the watchdog too often */ | 149 | /* Do not reset the watchdog too often */ |
121 | if (now > next_reset) { | 150 | if (now > next_reset) { |
122 | wdt_reset(watchdog_dev); | 151 | wdt_reset(watchdog_dev); |
123 | next_reset = now + 1000; | 152 | next_reset = now + 1000; |
124 | } | 153 | } |
125 | # endif | 154 | # endif |
126 | } | 155 | } |
127 | #endif | 156 | #endif |
128 | 157 |