Eric Lee / smarc-uboot

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Commit 3c893f116b1119f82e99efcb9a6abdbb9f79b71d

Authored by Ye Li
1 parent 85b24c878d
Exists in smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga and in 5 other branches smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga

MLK-19049 mx6qsabreauto: Fix kernel NAND boot issue in bootargs 

When enabling NAND boot, the ubi.mtd should be set to 6 because the
one mtdpart is added for tee.

Also the MFG_NAND_PARTITION is duplicated in mx6qsabreauto.h and
mx6sabre_common.h. We can remove it from mx6qsabreauto.h, since only
the sabreauto board have NAND.

Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit b495fb882339191593019074cf8b421c84469f31)

Showing 2 changed files with 2 additions and 9 deletions Inline Diff

include/configs/mx6sabre_common.h
Diff comments   View file @ 3c893f1
1 /* 1 /*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc. 2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 * Copyright 2018 NXP 3 * Copyright 2018 NXP
4 * 4 *
5 * Configuration settings for the Freescale i.MX6Q SabreSD board. 5 * Configuration settings for the Freescale i.MX6Q SabreSD board.
6 * 6 *
7 * SPDX-License-Identifier: GPL-2.0+ 7 * SPDX-License-Identifier: GPL-2.0+
8 */ 8 */
9 9
10 #ifndef __MX6QSABRE_COMMON_CONFIG_H 10 #ifndef __MX6QSABRE_COMMON_CONFIG_H
11 #define __MX6QSABRE_COMMON_CONFIG_H 11 #define __MX6QSABRE_COMMON_CONFIG_H
12 12
13 #include "mx6_common.h" 13 #include "mx6_common.h"
14 14
15 #define CONFIG_IMX_THERMAL 15 #define CONFIG_IMX_THERMAL
16 16
17 /* Size of malloc() pool */ 17 /* Size of malloc() pool */
18 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) 18 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
19 19
20 #define CONFIG_MXC_UART 20 #define CONFIG_MXC_UART
21 21
22 /* MMC Configs */ 22 /* MMC Configs */
23 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 23 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
24 24
25 #define CONFIG_FEC_MXC 25 #define CONFIG_FEC_MXC
26 #define CONFIG_MII 26 #define CONFIG_MII
27 #define IMX_FEC_BASE ENET_BASE_ADDR 27 #define IMX_FEC_BASE ENET_BASE_ADDR
28 #define CONFIG_FEC_XCV_TYPE RGMII 28 #define CONFIG_FEC_XCV_TYPE RGMII
29 #ifdef CONFIG_DM_ETH 29 #ifdef CONFIG_DM_ETH
30 #define CONFIG_ETHPRIME "eth0" 30 #define CONFIG_ETHPRIME "eth0"
31 #else 31 #else
32 #define CONFIG_ETHPRIME "FEC" 32 #define CONFIG_ETHPRIME "FEC"
33 #endif 33 #endif
34 #define CONFIG_FEC_MXC_PHYADDR 1 34 #define CONFIG_FEC_MXC_PHYADDR 1
35 35
36 #define CONFIG_PHYLIB 36 #define CONFIG_PHYLIB
37 #define CONFIG_PHY_ATHEROS 37 #define CONFIG_PHY_ATHEROS
38 38
39 #ifdef CONFIG_MX6S 39 #ifdef CONFIG_MX6S
40 #define SYS_NOSMP "nosmp" 40 #define SYS_NOSMP "nosmp"
41 #else 41 #else
42 #define SYS_NOSMP 42 #define SYS_NOSMP
43 #endif 43 #endif
44 44
45 #ifdef CONFIG_NAND_BOOT 45 #ifdef CONFIG_NAND_BOOT
46 #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(boot),16m(kernel),16m(dtb),1m(misc),-(rootfs) " 46 #define MFG_NAND_PARTITION "mtdparts=8000000.nor:1m(boot),-(rootfs)\\\\;gpmi-nand:64m(boot),16m(kernel),16m(dtb),16m(tee),-(rootfs) "
47 #else 47 #else
48 #define MFG_NAND_PARTITION "" 48 #define MFG_NAND_PARTITION ""
49 #endif 49 #endif
50 50
51 #define CONFIG_MFG_ENV_SETTINGS \ 51 #define CONFIG_MFG_ENV_SETTINGS \
52 "mfgtool_args=setenv bootargs console=" CONSOLE_DEV ",115200 " \ 52 "mfgtool_args=setenv bootargs console=" CONSOLE_DEV ",115200 " \
53 "rdinit=/linuxrc " \ 53 "rdinit=/linuxrc " \
54 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ 54 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
55 "g_mass_storage.file=/fat g_mass_storage.ro=1 " \ 55 "g_mass_storage.file=/fat g_mass_storage.ro=1 " \
56 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ 56 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
57 "g_mass_storage.iSerialNumber=\"\" "\ 57 "g_mass_storage.iSerialNumber=\"\" "\
58 "enable_wait_mode=off "\ 58 "enable_wait_mode=off "\
59 MFG_NAND_PARTITION \ 59 MFG_NAND_PARTITION \
60 "\0" \ 60 "\0" \
61 "initrd_addr=0x12C00000\0" \ 61 "initrd_addr=0x12C00000\0" \
62 "initrd_high=0xffffffff\0" \ 62 "initrd_high=0xffffffff\0" \
63 "bootcmd_mfg=run mfgtool_args; " \ 63 "bootcmd_mfg=run mfgtool_args; " \
64 "if test ${tee} = yes; then " \ 64 "if test ${tee} = yes; then " \
65 "bootm ${tee_addr} ${initrd_addr} ${fdt_addr}; " \ 65 "bootm ${tee_addr} ${initrd_addr} ${fdt_addr}; " \
66 "else " \ 66 "else " \
67 "bootz ${loadaddr} ${initrd_addr} ${fdt_addr}; " \ 67 "bootz ${loadaddr} ${initrd_addr} ${fdt_addr}; " \
68 "fi;\0" 68 "fi;\0"
69 69
70 #ifdef CONFIG_SUPPORT_EMMC_BOOT 70 #ifdef CONFIG_SUPPORT_EMMC_BOOT
71 #define EMMC_ENV \ 71 #define EMMC_ENV \
72 "emmcdev=2\0" \ 72 "emmcdev=2\0" \
73 "update_emmc_firmware=" \ 73 "update_emmc_firmware=" \
74 "if test ${ip_dyn} = yes; then " \ 74 "if test ${ip_dyn} = yes; then " \
75 "setenv get_cmd dhcp; " \ 75 "setenv get_cmd dhcp; " \
76 "else " \ 76 "else " \
77 "setenv get_cmd tftp; " \ 77 "setenv get_cmd tftp; " \
78 "fi; " \ 78 "fi; " \
79 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 79 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
80 "if mmc dev ${emmcdev} 1; then " \ 80 "if mmc dev ${emmcdev} 1; then " \
81 "setexpr fw_sz ${filesize} / 0x200; " \ 81 "setexpr fw_sz ${filesize} / 0x200; " \
82 "setexpr fw_sz ${fw_sz} + 1; " \ 82 "setexpr fw_sz ${fw_sz} + 1; " \
83 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 83 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
84 "fi; " \ 84 "fi; " \
85 "fi\0" 85 "fi\0"
86 #else 86 #else
87 #define EMMC_ENV "" 87 #define EMMC_ENV ""
88 #endif 88 #endif
89 89
90 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 90 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
91 91
92 #if defined(CONFIG_NAND_BOOT) 92 #if defined(CONFIG_NAND_BOOT)
93 /* 93 /*
94 * The dts also enables the WEIN NOR which is mtd0. 94 * The dts also enables the WEIN NOR which is mtd0.
95 * So the partions' layout for NAND is: 95 * So the partions' layout for NAND is:
96 * mtd1: 16M (uboot) 96 * mtd1: 16M (uboot)
97 * mtd2: 16M (kernel) 97 * mtd2: 16M (kernel)
98 * mtd3: 16M (dtb) 98 * mtd3: 16M (dtb)
99 * mtd4: left (rootfs) 99 * mtd4: left (rootfs)
100 */ 100 */
101 #define CONFIG_EXTRA_ENV_SETTINGS \ 101 #define CONFIG_EXTRA_ENV_SETTINGS \
102 CONFIG_MFG_ENV_SETTINGS \ 102 CONFIG_MFG_ENV_SETTINGS \
103 TEE_ENV \ 103 TEE_ENV \
104 "fdt_addr=0x18000000\0" \ 104 "fdt_addr=0x18000000\0" \
105 "fdt_high=0xffffffff\0" \ 105 "fdt_high=0xffffffff\0" \
106 "bootargs=console=" CONSOLE_DEV ",115200 ubi.mtd=5 " \ 106 "bootargs=console=" CONSOLE_DEV ",115200 ubi.mtd=6 " \
107 "root=ubi0:rootfs rootfstype=ubifs " \ 107 "root=ubi0:rootfs rootfstype=ubifs " \
108 MFG_NAND_PARTITION \ 108 MFG_NAND_PARTITION \
109 "\0" \ 109 "\0" \
110 "bootcmd=nand read ${loadaddr} 0x5000000 0x800000;"\ 110 "bootcmd=nand read ${loadaddr} 0x5000000 0x800000;"\
111 "nand read ${fdt_addr} 0x6000000 0x100000;"\ 111 "nand read ${fdt_addr} 0x6000000 0x100000;"\
112 "if test ${tee} = yes; then " \ 112 "if test ${tee} = yes; then " \
113 "nand read ${tee_addr} 0x4000000 0x400000;"\ 113 "nand read ${tee_addr} 0x4000000 0x400000;"\
114 "bootm ${teeaddr} - ${fdt_addr};" \ 114 "bootm ${teeaddr} - ${fdt_addr};" \
115 "else " \ 115 "else " \
116 "bootz ${loadaddr} - ${fdt_addr};" \ 116 "bootz ${loadaddr} - ${fdt_addr};" \
117 "fi\0" 117 "fi\0"
118 118
119 #elif defined(CONFIG_SATA_BOOT) 119 #elif defined(CONFIG_SATA_BOOT)
120 120
121 #define CONFIG_EXTRA_ENV_SETTINGS \ 121 #define CONFIG_EXTRA_ENV_SETTINGS \
122 CONFIG_MFG_ENV_SETTINGS \ 122 CONFIG_MFG_ENV_SETTINGS \
123 TEE_ENV \ 123 TEE_ENV \
124 "fdt_addr=0x18000000\0" \ 124 "fdt_addr=0x18000000\0" \
125 "fdt_high=0xffffffff\0" \ 125 "fdt_high=0xffffffff\0" \
126 "bootargs=console=" CONSOLE_DEV ",115200 \0"\ 126 "bootargs=console=" CONSOLE_DEV ",115200 \0"\
127 "bootargs_sata=setenv bootargs ${bootargs} " \ 127 "bootargs_sata=setenv bootargs ${bootargs} " \
128 "root=/dev/sda1 rootwait rw \0" \ 128 "root=/dev/sda1 rootwait rw \0" \
129 "bootcmd_sata=run bootargs_sata; sata init; " \ 129 "bootcmd_sata=run bootargs_sata; sata init; " \
130 "sata read ${loadaddr} 0x800 0x4000; " \ 130 "sata read ${loadaddr} 0x800 0x4000; " \
131 "sata read ${fdt_addr} 0x8000 0x800; " \ 131 "sata read ${fdt_addr} 0x8000 0x800; " \
132 "if test ${tee} = yes; then " \ 132 "if test ${tee} = yes; then " \
133 "sata read ${tee_addr} 0x9000 0x2000; " \ 133 "sata read ${tee_addr} 0x9000 0x2000; " \
134 "else " \ 134 "else " \
135 "bootz ${loadaddr} - ${fdt_addr}; " \ 135 "bootz ${loadaddr} - ${fdt_addr}; " \
136 "fi \0"\ 136 "fi \0"\
137 "bootcmd=run bootcmd_sata \0" 137 "bootcmd=run bootcmd_sata \0"
138 138
139 #else 139 #else
140 140
141 #define CONFIG_EXTRA_ENV_SETTINGS \ 141 #define CONFIG_EXTRA_ENV_SETTINGS \
142 CONFIG_MFG_ENV_SETTINGS \ 142 CONFIG_MFG_ENV_SETTINGS \
143 TEE_ENV \ 143 TEE_ENV \
144 "epdc_waveform=epdc_splash.bin\0" \ 144 "epdc_waveform=epdc_splash.bin\0" \
145 "script=boot.scr\0" \ 145 "script=boot.scr\0" \
146 "image=zImage\0" \ 146 "image=zImage\0" \
147 "fdt_file=undefined\0" \ 147 "fdt_file=undefined\0" \
148 "fdt_addr=0x18000000\0" \ 148 "fdt_addr=0x18000000\0" \
149 "tee_addr=0x20000000\0" \ 149 "tee_addr=0x20000000\0" \
150 "tee_file=undefined\0" \ 150 "tee_file=undefined\0" \
151 "boot_fdt=try\0" \ 151 "boot_fdt=try\0" \
152 "ip_dyn=yes\0" \ 152 "ip_dyn=yes\0" \
153 "console=" CONSOLE_DEV "\0" \ 153 "console=" CONSOLE_DEV "\0" \
154 "dfuspi=dfu 0 sf 0:0:10000000:0\0" \ 154 "dfuspi=dfu 0 sf 0:0:10000000:0\0" \
155 "dfu_alt_info_spl=spl raw 0x400\0" \ 155 "dfu_alt_info_spl=spl raw 0x400\0" \
156 "dfu_alt_info_img=u-boot raw 0x10000\0" \ 156 "dfu_alt_info_img=u-boot raw 0x10000\0" \
157 "dfu_alt_info=spl raw 0x400\0" \ 157 "dfu_alt_info=spl raw 0x400\0" \
158 "fdt_high=0xffffffff\0" \ 158 "fdt_high=0xffffffff\0" \
159 "initrd_high=0xffffffff\0" \ 159 "initrd_high=0xffffffff\0" \
160 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 160 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
161 "mmcpart=1\0" \ 161 "mmcpart=1\0" \
162 "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ 162 "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
163 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 163 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
164 "mmcautodetect=yes\0" \ 164 "mmcautodetect=yes\0" \
165 "update_sd_firmware=" \ 165 "update_sd_firmware=" \
166 "if test ${ip_dyn} = yes; then " \ 166 "if test ${ip_dyn} = yes; then " \
167 "setenv get_cmd dhcp; " \ 167 "setenv get_cmd dhcp; " \
168 "else " \ 168 "else " \
169 "setenv get_cmd tftp; " \ 169 "setenv get_cmd tftp; " \
170 "fi; " \ 170 "fi; " \
171 "if mmc dev ${mmcdev}; then " \ 171 "if mmc dev ${mmcdev}; then " \
172 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 172 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
173 "setexpr fw_sz ${filesize} / 0x200; " \ 173 "setexpr fw_sz ${filesize} / 0x200; " \
174 "setexpr fw_sz ${fw_sz} + 1; " \ 174 "setexpr fw_sz ${fw_sz} + 1; " \
175 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 175 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
176 "fi; " \ 176 "fi; " \
177 "fi\0" \ 177 "fi\0" \
178 EMMC_ENV \ 178 EMMC_ENV \
179 "smp=" SYS_NOSMP "\0"\ 179 "smp=" SYS_NOSMP "\0"\
180 "mmcargs=setenv bootargs console=${console},${baudrate} ${smp} " \ 180 "mmcargs=setenv bootargs console=${console},${baudrate} ${smp} " \
181 "root=${mmcroot}\0" \ 181 "root=${mmcroot}\0" \
182 "loadbootscript=" \ 182 "loadbootscript=" \
183 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 183 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
184 "bootscript=echo Running bootscript from mmc ...; " \ 184 "bootscript=echo Running bootscript from mmc ...; " \
185 "source\0" \ 185 "source\0" \
186 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 186 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
187 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 187 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
188 "loadtee=fatload mmc ${mmcdev}:${mmcpart} ${tee_addr} ${tee_file}\0" \ 188 "loadtee=fatload mmc ${mmcdev}:${mmcpart} ${tee_addr} ${tee_file}\0" \
189 "mmcboot=echo Booting from mmc ...; " \ 189 "mmcboot=echo Booting from mmc ...; " \
190 "run mmcargs; " \ 190 "run mmcargs; " \
191 "if test ${tee} = yes; then " \ 191 "if test ${tee} = yes; then " \
192 "run loadfdt; run loadtee; bootm ${tee_addr} - ${fdt_addr}; " \ 192 "run loadfdt; run loadtee; bootm ${tee_addr} - ${fdt_addr}; " \
193 "else " \ 193 "else " \
194 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 194 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
195 "if run loadfdt; then " \ 195 "if run loadfdt; then " \
196 "bootz ${loadaddr} - ${fdt_addr}; " \ 196 "bootz ${loadaddr} - ${fdt_addr}; " \
197 "else " \ 197 "else " \
198 "if test ${boot_fdt} = try; then " \ 198 "if test ${boot_fdt} = try; then " \
199 "bootz; " \ 199 "bootz; " \
200 "else " \ 200 "else " \
201 "echo WARN: Cannot load the DT; " \ 201 "echo WARN: Cannot load the DT; " \
202 "fi; " \ 202 "fi; " \
203 "fi; " \ 203 "fi; " \
204 "else " \ 204 "else " \
205 "bootz; " \ 205 "bootz; " \
206 "fi;" \ 206 "fi;" \
207 "fi;\0" \ 207 "fi;\0" \
208 "netargs=setenv bootargs console=${console},${baudrate} ${smp} " \ 208 "netargs=setenv bootargs console=${console},${baudrate} ${smp} " \
209 "root=/dev/nfs " \ 209 "root=/dev/nfs " \
210 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 210 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
211 "netboot=echo Booting from net ...; " \ 211 "netboot=echo Booting from net ...; " \
212 "run netargs; " \ 212 "run netargs; " \
213 "if test ${ip_dyn} = yes; then " \ 213 "if test ${ip_dyn} = yes; then " \
214 "setenv get_cmd dhcp; " \ 214 "setenv get_cmd dhcp; " \
215 "else " \ 215 "else " \
216 "setenv get_cmd tftp; " \ 216 "setenv get_cmd tftp; " \
217 "fi; " \ 217 "fi; " \
218 "${get_cmd} ${image}; " \ 218 "${get_cmd} ${image}; " \
219 "if test ${tee} = yes; then " \ 219 "if test ${tee} = yes; then " \
220 "${get_cmd} ${tee_addr} ${tee_file}; " \ 220 "${get_cmd} ${tee_addr} ${tee_file}; " \
221 "${get_cmd} ${fdt_addr} ${fdt_file}; " \ 221 "${get_cmd} ${fdt_addr} ${fdt_file}; " \
222 "bootm ${tee_addr} - ${fdt_addr}; " \ 222 "bootm ${tee_addr} - ${fdt_addr}; " \
223 "else " \ 223 "else " \
224 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 224 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
225 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 225 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
226 "bootz ${loadaddr} - ${fdt_addr}; " \ 226 "bootz ${loadaddr} - ${fdt_addr}; " \
227 "else " \ 227 "else " \
228 "if test ${boot_fdt} = try; then " \ 228 "if test ${boot_fdt} = try; then " \
229 "bootz; " \ 229 "bootz; " \
230 "else " \ 230 "else " \
231 "echo WARN: Cannot load the DT; " \ 231 "echo WARN: Cannot load the DT; " \
232 "fi; " \ 232 "fi; " \
233 "fi; " \ 233 "fi; " \
234 "else " \ 234 "else " \
235 "bootz; " \ 235 "bootz; " \
236 "fi; " \ 236 "fi; " \
237 "fi;\0" \ 237 "fi;\0" \
238 "findfdt="\ 238 "findfdt="\
239 "if test $fdt_file = undefined; then " \ 239 "if test $fdt_file = undefined; then " \
240 "if test $board_name = SABREAUTO && test $board_rev = MX6QP; then " \ 240 "if test $board_name = SABREAUTO && test $board_rev = MX6QP; then " \
241 "setenv fdt_file imx6qp-sabreauto.dtb; fi; " \ 241 "setenv fdt_file imx6qp-sabreauto.dtb; fi; " \
242 "if test $board_name = SABREAUTO && test $board_rev = MX6Q; then " \ 242 "if test $board_name = SABREAUTO && test $board_rev = MX6Q; then " \
243 "setenv fdt_file imx6q-sabreauto.dtb; fi; " \ 243 "setenv fdt_file imx6q-sabreauto.dtb; fi; " \
244 "if test $board_name = SABREAUTO && test $board_rev = MX6DL; then " \ 244 "if test $board_name = SABREAUTO && test $board_rev = MX6DL; then " \
245 "setenv fdt_file imx6dl-sabreauto.dtb; fi; " \ 245 "setenv fdt_file imx6dl-sabreauto.dtb; fi; " \
246 "if test $board_name = SABRESD && test $board_rev = MX6QP; then " \ 246 "if test $board_name = SABRESD && test $board_rev = MX6QP; then " \
247 "setenv fdt_file imx6qp-sabresd.dtb; fi; " \ 247 "setenv fdt_file imx6qp-sabresd.dtb; fi; " \
248 "if test $board_name = SABRESD && test $board_rev = MX6Q; then " \ 248 "if test $board_name = SABRESD && test $board_rev = MX6Q; then " \
249 "setenv fdt_file imx6q-sabresd.dtb; fi; " \ 249 "setenv fdt_file imx6q-sabresd.dtb; fi; " \
250 "if test $board_name = SABRESD && test $board_rev = MX6DL; then " \ 250 "if test $board_name = SABRESD && test $board_rev = MX6DL; then " \
251 "setenv fdt_file imx6dl-sabresd.dtb; fi; " \ 251 "setenv fdt_file imx6dl-sabresd.dtb; fi; " \
252 "if test $fdt_file = undefined; then " \ 252 "if test $fdt_file = undefined; then " \
253 "echo WARNING: Could not determine dtb to use; " \ 253 "echo WARNING: Could not determine dtb to use; " \
254 "fi; " \ 254 "fi; " \
255 "fi;\0" \ 255 "fi;\0" \
256 "findtee="\ 256 "findtee="\
257 "if test $tee_file = undefined; then " \ 257 "if test $tee_file = undefined; then " \
258 "if test $board_name = SABREAUTO && test $board_rev = MX6QP; then " \ 258 "if test $board_name = SABREAUTO && test $board_rev = MX6QP; then " \
259 "setenv tee_file uTee-6qpauto; fi; " \ 259 "setenv tee_file uTee-6qpauto; fi; " \
260 "if test $board_name = SABREAUTO && test $board_rev = MX6Q; then " \ 260 "if test $board_name = SABREAUTO && test $board_rev = MX6Q; then " \
261 "setenv tee_file uTee-6qauto; fi; " \ 261 "setenv tee_file uTee-6qauto; fi; " \
262 "if test $board_name = SABREAUTO && test $board_rev = MX6DL; then " \ 262 "if test $board_name = SABREAUTO && test $board_rev = MX6DL; then " \
263 "setenv tee_file uTee-6dlauto; fi; " \ 263 "setenv tee_file uTee-6dlauto; fi; " \
264 "if test $board_name = SABRESD && test $board_rev = MX6QP; then " \ 264 "if test $board_name = SABRESD && test $board_rev = MX6QP; then " \
265 "setenv tee_file uTee-6qpsdb; fi; " \ 265 "setenv tee_file uTee-6qpsdb; fi; " \
266 "if test $board_name = SABRESD && test $board_rev = MX6Q; then " \ 266 "if test $board_name = SABRESD && test $board_rev = MX6Q; then " \
267 "setenv tee_file uTee-6qsdb; fi; " \ 267 "setenv tee_file uTee-6qsdb; fi; " \
268 "if test $board_name = SABRESD && test $board_rev = MX6DL; then " \ 268 "if test $board_name = SABRESD && test $board_rev = MX6DL; then " \
269 "setenv tee_file uTee-6dlsdb; fi; " \ 269 "setenv tee_file uTee-6dlsdb; fi; " \
270 "if test $tee_file = undefined; then " \ 270 "if test $tee_file = undefined; then " \
271 "echo WARNING: Could not determine tee to use; fi; " \ 271 "echo WARNING: Could not determine tee to use; fi; " \
272 "fi;\0" \ 272 "fi;\0" \
273 273
274 #define CONFIG_BOOTCOMMAND \ 274 #define CONFIG_BOOTCOMMAND \
275 "run findfdt;" \ 275 "run findfdt;" \
276 "run findtee;" \ 276 "run findtee;" \
277 "mmc dev ${mmcdev};" \ 277 "mmc dev ${mmcdev};" \
278 "if mmc rescan; then " \ 278 "if mmc rescan; then " \
279 "if run loadbootscript; then " \ 279 "if run loadbootscript; then " \
280 "run bootscript; " \ 280 "run bootscript; " \
281 "else " \ 281 "else " \
282 "if run loadimage; then " \ 282 "if run loadimage; then " \
283 "run mmcboot; " \ 283 "run mmcboot; " \
284 "else run netboot; " \ 284 "else run netboot; " \
285 "fi; " \ 285 "fi; " \
286 "fi; " \ 286 "fi; " \
287 "else run netboot; fi" 287 "else run netboot; fi"
288 #endif 288 #endif
289 289
290 #define CONFIG_ARP_TIMEOUT 200UL 290 #define CONFIG_ARP_TIMEOUT 200UL
291 291
292 #define CONFIG_SYS_MEMTEST_START 0x10000000 292 #define CONFIG_SYS_MEMTEST_START 0x10000000
293 #define CONFIG_SYS_MEMTEST_END 0x10010000 293 #define CONFIG_SYS_MEMTEST_END 0x10010000
294 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 294 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
295 295
296 /* Physical Memory Map */ 296 /* Physical Memory Map */
297 #define CONFIG_NR_DRAM_BANKS 1 297 #define CONFIG_NR_DRAM_BANKS 1
298 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 298 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
299 299
300 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 300 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
301 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 301 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
302 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 302 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
303 303
304 #define CONFIG_SYS_INIT_SP_OFFSET \ 304 #define CONFIG_SYS_INIT_SP_OFFSET \
305 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 305 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
306 #define CONFIG_SYS_INIT_SP_ADDR \ 306 #define CONFIG_SYS_INIT_SP_ADDR \
307 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 307 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
308 308
309 /* Environment organization */ 309 /* Environment organization */
310 #define CONFIG_ENV_SIZE (8 * 1024) 310 #define CONFIG_ENV_SIZE (8 * 1024)
311 311
312 #ifdef CONFIG_SATA 312 #ifdef CONFIG_SATA
313 #define CONFIG_DWC_AHSATA 313 #define CONFIG_DWC_AHSATA
314 #define CONFIG_SYS_SATA_MAX_DEVICE 1 314 #define CONFIG_SYS_SATA_MAX_DEVICE 1
315 #define CONFIG_DWC_AHSATA_PORT_ID 0 315 #define CONFIG_DWC_AHSATA_PORT_ID 0
316 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 316 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
317 #define CONFIG_LBA48 317 #define CONFIG_LBA48
318 #define CONFIG_LIBATA 318 #define CONFIG_LIBATA
319 #endif 319 #endif
320 320
321 #ifdef CONFIG_CMD_SF 321 #ifdef CONFIG_CMD_SF
322 #define CONFIG_SPI_FLASH 322 #define CONFIG_SPI_FLASH
323 #define CONFIG_SPI_FLASH_STMICRO 323 #define CONFIG_SPI_FLASH_STMICRO
324 #define CONFIG_MXC_SPI 324 #define CONFIG_MXC_SPI
325 #define CONFIG_SF_DEFAULT_BUS 0 325 #define CONFIG_SF_DEFAULT_BUS 0
326 #define CONFIG_SF_DEFAULT_SPEED 20000000 326 #define CONFIG_SF_DEFAULT_SPEED 20000000
327 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 327 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
328 #endif 328 #endif
329 329
330 #ifdef CONFIG_MTD_NOR_FLASH 330 #ifdef CONFIG_MTD_NOR_FLASH
331 #define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR 331 #define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR
332 #define CONFIG_SYS_FLASH_SECT_SIZE (128 * 1024) 332 #define CONFIG_SYS_FLASH_SECT_SIZE (128 * 1024)
333 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 333 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
334 #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ 334 #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
335 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 335 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
336 #define CONFIG_FLASH_CFI_DRIVER /* Use drivers/cfi_flash.c */ 336 #define CONFIG_FLASH_CFI_DRIVER /* Use drivers/cfi_flash.c */
337 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/ 337 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/
338 #define CONFIG_SYS_FLASH_EMPTY_INFO 338 #define CONFIG_SYS_FLASH_EMPTY_INFO
339 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 339 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
340 #endif 340 #endif
341 341
342 #ifdef CONFIG_CMD_NAND 342 #ifdef CONFIG_CMD_NAND
343 /* NAND flash command */ 343 /* NAND flash command */
344 #define CONFIG_CMD_NAND_TRIMFFS 344 #define CONFIG_CMD_NAND_TRIMFFS
345 345
346 /* NAND stuff */ 346 /* NAND stuff */
347 #define CONFIG_NAND_MXS 347 #define CONFIG_NAND_MXS
348 #define CONFIG_SYS_MAX_NAND_DEVICE 1 348 #define CONFIG_SYS_MAX_NAND_DEVICE 1
349 #define CONFIG_SYS_NAND_BASE 0x40000000 349 #define CONFIG_SYS_NAND_BASE 0x40000000
350 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 350 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
351 #define CONFIG_SYS_NAND_ONFI_DETECTION 351 #define CONFIG_SYS_NAND_ONFI_DETECTION
352 352
353 /* DMA stuff, needed for GPMI/MXS NAND support */ 353 /* DMA stuff, needed for GPMI/MXS NAND support */
354 #define CONFIG_APBH_DMA 354 #define CONFIG_APBH_DMA
355 #define CONFIG_APBH_DMA_BURST 355 #define CONFIG_APBH_DMA_BURST
356 #define CONFIG_APBH_DMA_BURST8 356 #define CONFIG_APBH_DMA_BURST8
357 #endif 357 #endif
358 358
359 #if defined(CONFIG_ENV_IS_IN_MMC) 359 #if defined(CONFIG_ENV_IS_IN_MMC)
360 #define CONFIG_ENV_OFFSET (896 * 1024) 360 #define CONFIG_ENV_OFFSET (896 * 1024)
361 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) 361 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
362 #define CONFIG_ENV_OFFSET (896 * 1024) 362 #define CONFIG_ENV_OFFSET (896 * 1024)
363 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 363 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
364 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 364 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
365 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 365 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
366 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 366 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
367 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 367 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
368 #elif defined(CONFIG_ENV_IS_IN_FLASH) 368 #elif defined(CONFIG_ENV_IS_IN_FLASH)
369 #undef CONFIG_ENV_SIZE 369 #undef CONFIG_ENV_SIZE
370 #define CONFIG_ENV_SIZE CONFIG_SYS_FLASH_SECT_SIZE 370 #define CONFIG_ENV_SIZE CONFIG_SYS_FLASH_SECT_SIZE
371 #define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SIZE 371 #define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SIZE
372 #define CONFIG_ENV_OFFSET (7 * CONFIG_SYS_FLASH_SECT_SIZE) 372 #define CONFIG_ENV_OFFSET (7 * CONFIG_SYS_FLASH_SECT_SIZE)
373 #elif defined(CONFIG_ENV_IS_IN_NAND) 373 #elif defined(CONFIG_ENV_IS_IN_NAND)
374 #undef CONFIG_ENV_SIZE 374 #undef CONFIG_ENV_SIZE
375 #define CONFIG_ENV_OFFSET (60 << 20) 375 #define CONFIG_ENV_OFFSET (60 << 20)
376 #define CONFIG_ENV_SECT_SIZE (128 << 10) 376 #define CONFIG_ENV_SECT_SIZE (128 << 10)
377 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 377 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
378 #elif defined(CONFIG_ENV_IS_IN_SATA) 378 #elif defined(CONFIG_ENV_IS_IN_SATA)
379 #define CONFIG_ENV_OFFSET (896 * 1024) 379 #define CONFIG_ENV_OFFSET (896 * 1024)
380 #define CONFIG_SYS_SATA_ENV_DEV 0 380 #define CONFIG_SYS_SATA_ENV_DEV 0
381 #define CONFIG_SYS_DCACHE_OFF /* remove when sata driver support cache */ 381 #define CONFIG_SYS_DCACHE_OFF /* remove when sata driver support cache */
382 #endif 382 #endif
383 383
384 /* I2C Configs */ 384 /* I2C Configs */
385 #ifndef CONFIG_DM_I2C 385 #ifndef CONFIG_DM_I2C
386 #define CONFIG_SYS_I2C 386 #define CONFIG_SYS_I2C
387 #endif 387 #endif
388 #ifdef CONFIG_CMD_I2C 388 #ifdef CONFIG_CMD_I2C
389 #define CONFIG_SYS_I2C_MXC 389 #define CONFIG_SYS_I2C_MXC
390 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 390 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
391 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 391 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
392 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 392 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
393 #define CONFIG_SYS_I2C_SPEED 100000 393 #define CONFIG_SYS_I2C_SPEED 100000
394 #endif 394 #endif
395 395
396 /* PMIC */ 396 /* PMIC */
397 #ifndef CONFIG_DM_PMIC 397 #ifndef CONFIG_DM_PMIC
398 #define CONFIG_POWER 398 #define CONFIG_POWER
399 #define CONFIG_POWER_I2C 399 #define CONFIG_POWER_I2C
400 #define CONFIG_POWER_PFUZE100 400 #define CONFIG_POWER_PFUZE100
401 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 401 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
402 #endif 402 #endif
403 403
404 /* Framebuffer */ 404 /* Framebuffer */
405 #define CONFIG_VIDEO_IPUV3 405 #define CONFIG_VIDEO_IPUV3
406 #define CONFIG_VIDEO_BMP_RLE8 406 #define CONFIG_VIDEO_BMP_RLE8
407 #define CONFIG_SPLASH_SCREEN 407 #define CONFIG_SPLASH_SCREEN
408 #define CONFIG_SPLASH_SCREEN_ALIGN 408 #define CONFIG_SPLASH_SCREEN_ALIGN
409 #define CONFIG_BMP_16BPP 409 #define CONFIG_BMP_16BPP
410 #define CONFIG_VIDEO_LOGO 410 #define CONFIG_VIDEO_LOGO
411 #define CONFIG_VIDEO_BMP_LOGO 411 #define CONFIG_VIDEO_BMP_LOGO
412 #define CONFIG_IMX_HDMI 412 #define CONFIG_IMX_HDMI
413 #define CONFIG_IMX_VIDEO_SKIP 413 #define CONFIG_IMX_VIDEO_SKIP
414 414
415 #if defined(CONFIG_ANDROID_SUPPORT) 415 #if defined(CONFIG_ANDROID_SUPPORT)
416 #include "mx6sabreandroid_common.h" 416 #include "mx6sabreandroid_common.h"
417 #else 417 #else
418 #define CONFIG_USBD_HS 418 #define CONFIG_USBD_HS
419 419
420 #endif /* CONFIG_ANDROID_SUPPORT */ 420 #endif /* CONFIG_ANDROID_SUPPORT */
421 #endif /* __MX6QSABRE_COMMON_CONFIG_H */ 421 #endif /* __MX6QSABRE_COMMON_CONFIG_H */
422 422
include/configs/mx6sabreauto.h
Diff comments   View file @ 3c893f1
1 /* 1 /*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc. 2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 * Copyright 2018 NXP 3 * Copyright 2018 NXP
4 * 4 *
5 * Configuration settings for the Freescale i.MX6Q SabreAuto board. 5 * Configuration settings for the Freescale i.MX6Q SabreAuto board.
6 * 6 *
7 * SPDX-License-Identifier: GPL-2.0+ 7 * SPDX-License-Identifier: GPL-2.0+
8 */ 8 */
9 9
10 #ifndef __MX6SABREAUTO_CONFIG_H 10 #ifndef __MX6SABREAUTO_CONFIG_H
11 #define __MX6SABREAUTO_CONFIG_H 11 #define __MX6SABREAUTO_CONFIG_H
12 12
13 #ifdef CONFIG_SPL 13 #ifdef CONFIG_SPL
14 #include "imx6_spl.h" 14 #include "imx6_spl.h"
15 #endif 15 #endif
16 16
17 #define CONFIG_MACH_TYPE 3529 17 #define CONFIG_MACH_TYPE 3529
18 #define CONFIG_MXC_UART_BASE UART4_BASE 18 #define CONFIG_MXC_UART_BASE UART4_BASE
19 #define CONSOLE_DEV "ttymxc3" 19 #define CONSOLE_DEV "ttymxc3"
20 #define CONFIG_MMCROOT "/dev/mmcblk2p2" /* SDHC3 */ 20 #define CONFIG_MMCROOT "/dev/mmcblk2p2" /* SDHC3 */
21 #define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024) 21 #define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
22 #ifdef CONFIG_MX6S 22 #ifdef CONFIG_MX6S
23 #undef PHYS_SDRAM_SIZE 23 #undef PHYS_SDRAM_SIZE
24 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) 24 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
25 #endif 25 #endif
26 26
27 #include "mx6sabre_common.h" 27 #include "mx6sabre_common.h"
28 28
29 #undef MFG_NAND_PARTITION
30 #ifdef CONFIG_NAND_BOOT
31 #define MFG_NAND_PARTITION "mtdparts=8000000.nor:1m(boot),-(rootfs)\\\\;gpmi-nand:64m(boot),16m(kernel),16m(dtb),16m(tee),-(rootfs) "
32 #else
33 #define MFG_NAND_PARTITION ""
34 #endif
35
36 #define CONFIG_SYS_FSL_USDHC_NUM 2 29 #define CONFIG_SYS_FSL_USDHC_NUM 2
37 #if defined(CONFIG_ENV_IS_IN_MMC) 30 #if defined(CONFIG_ENV_IS_IN_MMC)
38 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */ 31 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
39 #define CONFIG_SYS_MMC_ENV_PART 0 /* user partition */ 32 #define CONFIG_SYS_MMC_ENV_PART 0 /* user partition */
40 #endif 33 #endif
41 34
42 #ifdef CONFIG_CMD_SF 35 #ifdef CONFIG_CMD_SF
43 #define CONFIG_SF_DEFAULT_CS 1 36 #define CONFIG_SF_DEFAULT_CS 1
44 #endif 37 #endif
45 38
46 /*Since the pin conflicts on EIM D18, disable the USB host if the NOR flash is enabled */ 39 /*Since the pin conflicts on EIM D18, disable the USB host if the NOR flash is enabled */
47 #ifdef CONFIG_USB 40 #ifdef CONFIG_USB
48 /* USB Configs */ 41 /* USB Configs */
49 #define CONFIG_USB_HOST_ETHER 42 #define CONFIG_USB_HOST_ETHER
50 #define CONFIG_USB_ETHER_ASIX 43 #define CONFIG_USB_ETHER_ASIX
51 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 44 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
52 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 45 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
53 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 46 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
54 #define CONFIG_MXC_USB_FLAGS 0 47 #define CONFIG_MXC_USB_FLAGS 0
55 48
56 #if !defined(CONFIG_DM_PCA953X) && defined(CONFIG_SYS_I2C) 49 #if !defined(CONFIG_DM_PCA953X) && defined(CONFIG_SYS_I2C)
57 #define CONFIG_PCA953X 50 #define CONFIG_PCA953X
58 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} } 51 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} }
59 #endif 52 #endif
60 #endif 53 #endif
61 54
62 /* Falcon Mode */ 55 /* Falcon Mode */
63 #ifdef CONFIG_SPL_OS_BOOT 56 #ifdef CONFIG_SPL_OS_BOOT
64 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" 57 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
65 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 58 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
66 #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 59 #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
67 60
68 /* Falcon Mode - MMC support: args@1MB kernel@2MB */ 61 /* Falcon Mode - MMC support: args@1MB kernel@2MB */
69 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ 62 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
70 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) 63 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
71 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ 64 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
72 #endif 65 #endif
73 66
74 #endif /* __MX6SABREAUTO_CONFIG_H */ 67 #endif /* __MX6SABREAUTO_CONFIG_H */
75 68