Commit 402b04a84a4ff9c046a78da93bd1da81b686a070
1 parent
731c0fd70c
Exists in
smarc_8mm-imx_v2019.04_4.19.35_1.1.0
Add Cortex-M4 Support
Showing 1 changed file with 18 additions and 0 deletions Inline Diff
include/configs/smarcimx8mm.h
1 | /* SPDX-License-Identifier: GPL-2.0+ */ | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* | 2 | /* |
3 | * Copyright 2018 NXP | 3 | * Copyright 2018 NXP |
4 | */ | 4 | */ |
5 | 5 | ||
6 | #ifndef __SMARCIMX8MM_H | 6 | #ifndef __SMARCIMX8MM_H |
7 | #define __SMARCIMX8MM_H | 7 | #define __SMARCIMX8MM_H |
8 | 8 | ||
9 | #include <linux/sizes.h> | 9 | #include <linux/sizes.h> |
10 | #include <asm/arch/imx-regs.h> | 10 | #include <asm/arch/imx-regs.h> |
11 | 11 | ||
12 | #include "imx_env.h" | 12 | #include "imx_env.h" |
13 | 13 | ||
14 | #ifdef CONFIG_SECURE_BOOT | 14 | #ifdef CONFIG_SECURE_BOOT |
15 | #define CONFIG_CSF_SIZE 0x2000 /* 8K region */ | 15 | #define CONFIG_CSF_SIZE 0x2000 /* 8K region */ |
16 | #endif | 16 | #endif |
17 | 17 | ||
18 | #define CONFIG_SPL_MAX_SIZE (148 * 1024) | 18 | #define CONFIG_SPL_MAX_SIZE (148 * 1024) |
19 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) | 19 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) |
20 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR | 20 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR |
21 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 | 21 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 |
22 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 | 22 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
23 | #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) | 23 | #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) |
24 | 24 | ||
25 | #ifdef CONFIG_SPL_BUILD | 25 | #ifdef CONFIG_SPL_BUILD |
26 | /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ | 26 | /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ |
27 | #define CONFIG_SPL_WATCHDOG_SUPPORT | 27 | #define CONFIG_SPL_WATCHDOG_SUPPORT |
28 | #define CONFIG_SPL_POWER_SUPPORT | 28 | #define CONFIG_SPL_POWER_SUPPORT |
29 | #define CONFIG_SPL_DRIVERS_MISC_SUPPORT | 29 | #define CONFIG_SPL_DRIVERS_MISC_SUPPORT |
30 | #define CONFIG_SPL_I2C_SUPPORT | 30 | #define CONFIG_SPL_I2C_SUPPORT |
31 | #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" | 31 | #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" |
32 | #define CONFIG_SPL_STACK 0x91fff0 | 32 | #define CONFIG_SPL_STACK 0x91fff0 |
33 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | 33 | #define CONFIG_SPL_LIBCOMMON_SUPPORT |
34 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | 34 | #define CONFIG_SPL_LIBGENERIC_SUPPORT |
35 | #define CONFIG_SPL_GPIO_SUPPORT | 35 | #define CONFIG_SPL_GPIO_SUPPORT |
36 | #define CONFIG_SPL_BSS_START_ADDR 0x00910000 | 36 | #define CONFIG_SPL_BSS_START_ADDR 0x00910000 |
37 | #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ | 37 | #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ |
38 | #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 | 38 | #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 |
39 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ | 39 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ |
40 | #define CONFIG_SYS_ICACHE_OFF | 40 | #define CONFIG_SYS_ICACHE_OFF |
41 | #define CONFIG_SYS_DCACHE_OFF | 41 | #define CONFIG_SYS_DCACHE_OFF |
42 | 42 | ||
43 | #define CONFIG_MALLOC_F_ADDR 0x912000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ | 43 | #define CONFIG_MALLOC_F_ADDR 0x912000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ |
44 | 44 | ||
45 | #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ | 45 | #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ |
46 | 46 | ||
47 | #undef CONFIG_DM_MMC | 47 | #undef CONFIG_DM_MMC |
48 | #undef CONFIG_DM_PMIC | 48 | #undef CONFIG_DM_PMIC |
49 | #undef CONFIG_DM_PMIC_PFUZE100 | 49 | #undef CONFIG_DM_PMIC_PFUZE100 |
50 | 50 | ||
51 | #define CONFIG_POWER | 51 | #define CONFIG_POWER |
52 | #define CONFIG_POWER_I2C | 52 | #define CONFIG_POWER_I2C |
53 | #define CONFIG_POWER_BD71837 | 53 | #define CONFIG_POWER_BD71837 |
54 | 54 | ||
55 | #define CONFIG_SYS_I2C | 55 | #define CONFIG_SYS_I2C |
56 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ | 56 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
57 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | 57 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ |
58 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ | 58 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
59 | #define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */ | 59 | #define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */ |
60 | 60 | ||
61 | #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG | 61 | #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG |
62 | 62 | ||
63 | #if defined(CONFIG_NAND_BOOT) | 63 | #if defined(CONFIG_NAND_BOOT) |
64 | #define CONFIG_SPL_NAND_SUPPORT | 64 | #define CONFIG_SPL_NAND_SUPPORT |
65 | #define CONFIG_SPL_DMA_SUPPORT | 65 | #define CONFIG_SPL_DMA_SUPPORT |
66 | #define CONFIG_SPL_NAND_MXS | 66 | #define CONFIG_SPL_NAND_MXS |
67 | #define CONFIG_SPL_NAND_BASE | 67 | #define CONFIG_SPL_NAND_BASE |
68 | #define CONFIG_SPL_NAND_IDENT | 68 | #define CONFIG_SPL_NAND_IDENT |
69 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4000000 /* Put the FIT out of first 64MB boot area */ | 69 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4000000 /* Put the FIT out of first 64MB boot area */ |
70 | 70 | ||
71 | /* Set a redundant offset in nand FIT mtdpart. The new uuu will burn full boot image (not only FIT part) to the mtdpart, so we check both two offsets */ | 71 | /* Set a redundant offset in nand FIT mtdpart. The new uuu will burn full boot image (not only FIT part) to the mtdpart, so we check both two offsets */ |
72 | #define CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND \ | 72 | #define CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND \ |
73 | (CONFIG_SYS_NAND_U_BOOT_OFFS + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8400) | 73 | (CONFIG_SYS_NAND_U_BOOT_OFFS + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8400) |
74 | #endif | 74 | #endif |
75 | 75 | ||
76 | #endif | 76 | #endif |
77 | 77 | ||
78 | #define CONFIG_CMD_READ | 78 | #define CONFIG_CMD_READ |
79 | #define CONFIG_SERIAL_TAG | 79 | #define CONFIG_SERIAL_TAG |
80 | #define CONFIG_FASTBOOT_USB_DEV 0 | 80 | #define CONFIG_FASTBOOT_USB_DEV 0 |
81 | 81 | ||
82 | #define CONFIG_REMAKE_ELF | 82 | #define CONFIG_REMAKE_ELF |
83 | 83 | ||
84 | #define CONFIG_BOARD_EARLY_INIT_F | 84 | #define CONFIG_BOARD_EARLY_INIT_F |
85 | #define CONFIG_BOARD_LATE_INIT | 85 | #define CONFIG_BOARD_LATE_INIT |
86 | 86 | ||
87 | #undef CONFIG_CMD_EXPORTENV | 87 | #undef CONFIG_CMD_EXPORTENV |
88 | #undef CONFIG_CMD_IMLS | 88 | #undef CONFIG_CMD_IMLS |
89 | 89 | ||
90 | #undef CONFIG_CMD_CRC32 | 90 | #undef CONFIG_CMD_CRC32 |
91 | #undef CONFIG_BOOTM_NETBSD | 91 | #undef CONFIG_BOOTM_NETBSD |
92 | 92 | ||
93 | /* ENET Config */ | 93 | /* ENET Config */ |
94 | /* ENET1 */ | 94 | /* ENET1 */ |
95 | #if defined(CONFIG_CMD_NET) | 95 | #if defined(CONFIG_CMD_NET) |
96 | #define CONFIG_CMD_PING | 96 | #define CONFIG_CMD_PING |
97 | #define CONFIG_CMD_DHCP | 97 | #define CONFIG_CMD_DHCP |
98 | #define CONFIG_CMD_MII | 98 | #define CONFIG_CMD_MII |
99 | #define CONFIG_MII | 99 | #define CONFIG_MII |
100 | #define CONFIG_ETHPRIME "FEC" | 100 | #define CONFIG_ETHPRIME "FEC" |
101 | 101 | ||
102 | #define CONFIG_FEC_MXC | 102 | #define CONFIG_FEC_MXC |
103 | #define CONFIG_FEC_XCV_TYPE RGMII | 103 | #define CONFIG_FEC_XCV_TYPE RGMII |
104 | #define CONFIG_FEC_MXC_PHYADDR 6 | 104 | #define CONFIG_FEC_MXC_PHYADDR 6 |
105 | #define FEC_QUIRK_ENET_MAC | 105 | #define FEC_QUIRK_ENET_MAC |
106 | 106 | ||
107 | #define CONFIG_PHY_GIGE | 107 | #define CONFIG_PHY_GIGE |
108 | #define IMX_FEC_BASE 0x30BE0000 | 108 | #define IMX_FEC_BASE 0x30BE0000 |
109 | 109 | ||
110 | #define CONFIG_PHYLIB | 110 | #define CONFIG_PHYLIB |
111 | #define CONFIG_PHY_ATHEROS | 111 | #define CONFIG_PHY_ATHEROS |
112 | #endif | 112 | #endif |
113 | 113 | ||
114 | #ifdef CONFIG_NAND_BOOT | 114 | #ifdef CONFIG_NAND_BOOT |
115 | #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(nandboot),16m(nandfit),32m(nandkernel),16m(nanddtb),8m(nandtee),-(nandrootfs)" | 115 | #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(nandboot),16m(nandfit),32m(nandkernel),16m(nanddtb),8m(nandtee),-(nandrootfs)" |
116 | #endif | 116 | #endif |
117 | 117 | ||
118 | /* | 118 | /* |
119 | * Another approach is add the clocks for inmates into clks_init_on | 119 | * Another approach is add the clocks for inmates into clks_init_on |
120 | * in clk-imx8mm.c, then clk_ingore_unused could be removed. | 120 | * in clk-imx8mm.c, then clk_ingore_unused could be removed. |
121 | */ | 121 | */ |
122 | #define JAILHOUSE_ENV \ | 122 | #define JAILHOUSE_ENV \ |
123 | "jh_clk= \0 " \ | 123 | "jh_clk= \0 " \ |
124 | "jh_mmcboot=mw 0x303d0518 0xff; setenv fdt_file fsl-imx8mm-evk-root.dtb;" \ | 124 | "jh_mmcboot=mw 0x303d0518 0xff; setenv fdt_file fsl-imx8mm-evk-root.dtb;" \ |
125 | "setenv jh_clk clk_ignore_unused; " \ | 125 | "setenv jh_clk clk_ignore_unused; " \ |
126 | "if run loadimage; then " \ | 126 | "if run loadimage; then " \ |
127 | "run mmcboot; " \ | 127 | "run mmcboot; " \ |
128 | "else run jh_netboot; fi; \0" \ | 128 | "else run jh_netboot; fi; \0" \ |
129 | "jh_netboot=mw 0x303d0518 0xff; setenv fdt_file fsl-imx8mm-evk-root.dtb; setenv jh_clk clk_ignore_unused; run netboot; \0 " | 129 | "jh_netboot=mw 0x303d0518 0xff; setenv fdt_file fsl-imx8mm-evk-root.dtb; setenv jh_clk clk_ignore_unused; run netboot; \0 " |
130 | 130 | ||
131 | 131 | ||
132 | #define CONFIG_MFG_ENV_SETTINGS \ | 132 | #define CONFIG_MFG_ENV_SETTINGS \ |
133 | CONFIG_MFG_ENV_SETTINGS_DEFAULT \ | 133 | CONFIG_MFG_ENV_SETTINGS_DEFAULT \ |
134 | "initrd_addr=0x43800000\0" \ | 134 | "initrd_addr=0x43800000\0" \ |
135 | "initrd_high=0xffffffffffffffff\0" \ | 135 | "initrd_high=0xffffffffffffffff\0" \ |
136 | "emmc_dev=1\0"\ | 136 | "emmc_dev=1\0"\ |
137 | "sd_dev=2\0" \ | 137 | "sd_dev=2\0" \ |
138 | 138 | ||
139 | /* Initial environment variables */ | 139 | /* Initial environment variables */ |
140 | #if defined(CONFIG_NAND_BOOT) | 140 | #if defined(CONFIG_NAND_BOOT) |
141 | #define CONFIG_EXTRA_ENV_SETTINGS \ | 141 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
142 | CONFIG_MFG_ENV_SETTINGS \ | 142 | CONFIG_MFG_ENV_SETTINGS \ |
143 | "fdt_addr=0x43000000\0" \ | 143 | "fdt_addr=0x43000000\0" \ |
144 | "fdt_high=0xffffffffffffffff\0" \ | 144 | "fdt_high=0xffffffffffffffff\0" \ |
145 | "mtdparts=" MFG_NAND_PARTITION "\0" \ | 145 | "mtdparts=" MFG_NAND_PARTITION "\0" \ |
146 | "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \ | 146 | "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \ |
147 | "bootargs=console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200 ubi.mtd=5 " \ | 147 | "bootargs=console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200 ubi.mtd=5 " \ |
148 | "root=ubi0:nandrootfs rootfstype=ubifs " \ | 148 | "root=ubi0:nandrootfs rootfstype=ubifs " \ |
149 | MFG_NAND_PARTITION \ | 149 | MFG_NAND_PARTITION \ |
150 | "\0" \ | 150 | "\0" \ |
151 | "bootcmd=nand read ${loadaddr} 0x5000000 0x2000000;"\ | 151 | "bootcmd=nand read ${loadaddr} 0x5000000 0x2000000;"\ |
152 | "nand read ${fdt_addr} 0x7000000 0x100000;"\ | 152 | "nand read ${fdt_addr} 0x7000000 0x100000;"\ |
153 | "booti ${loadaddr} - ${fdt_addr}" | 153 | "booti ${loadaddr} - ${fdt_addr}" |
154 | 154 | ||
155 | #else | 155 | #else |
156 | #define CONFIG_EXTRA_ENV_SETTINGS \ | 156 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
157 | CONFIG_MFG_ENV_SETTINGS \ | 157 | CONFIG_MFG_ENV_SETTINGS \ |
158 | JAILHOUSE_ENV \ | 158 | JAILHOUSE_ENV \ |
159 | "script=boot.scr\0" \ | 159 | "script=boot.scr\0" \ |
160 | "image=Image\0" \ | 160 | "image=Image\0" \ |
161 | "m4_bin=hello_world.bin\0" \ | ||
162 | "use_m4=no\0" \ | ||
161 | "console=ttymxc2,115200 earlycon=ec_imx6q,0x30890000,115200\0" \ | 163 | "console=ttymxc2,115200 earlycon=ec_imx6q,0x30890000,115200\0" \ |
162 | "fdt_addr=0x43000000\0" \ | 164 | "fdt_addr=0x43000000\0" \ |
165 | "m4_addr=0x7e0000\0" \ | ||
166 | "m4_addr_tmp=0x48000000\0" \ | ||
163 | "fdt_high=0xffffffffffffffff\0" \ | 167 | "fdt_high=0xffffffffffffffff\0" \ |
164 | "boot_fdt=try\0" \ | 168 | "boot_fdt=try\0" \ |
165 | "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ | 169 | "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ |
166 | "initrd_addr=0x43800000\0" \ | 170 | "initrd_addr=0x43800000\0" \ |
167 | "initrd_high=0xffffffffffffffff\0" \ | 171 | "initrd_high=0xffffffffffffffff\0" \ |
168 | "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ | 172 | "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ |
169 | "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ | 173 | "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ |
170 | "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ | 174 | "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ |
171 | "usbroot=/dev/sda2 rootwait ro\0" \ | 175 | "usbroot=/dev/sda2 rootwait ro\0" \ |
172 | "mmcrootfstype=ext4 rootwait\0" \ | 176 | "mmcrootfstype=ext4 rootwait\0" \ |
173 | "loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} uEnv.txt\0" \ | 177 | "loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} uEnv.txt\0" \ |
174 | "loadusbbootenv=fatload usb 0:1 ${loadaddr} uEnv.txt\0" \ | 178 | "loadusbbootenv=fatload usb 0:1 ${loadaddr} uEnv.txt\0" \ |
175 | "mmcautodetect=yes\0" \ | 179 | "mmcautodetect=yes\0" \ |
176 | "importbootenv=echo Importing environment from mmc (uEnv.txt)...; " \ | 180 | "importbootenv=echo Importing environment from mmc (uEnv.txt)...; " \ |
177 | "env import -t $loadaddr $filesize\0" \ | 181 | "env import -t $loadaddr $filesize\0" \ |
178 | "importusbbootenv=echo Importing environment from USB (uEnv.txt)...; " \ | 182 | "importusbbootenv=echo Importing environment from USB (uEnv.txt)...; " \ |
179 | "env import -t $loadaddr $filesize\0" \ | 183 | "env import -t $loadaddr $filesize\0" \ |
180 | "mmcargs=setenv bootargs ${jh_clk} console=${console} ${optargs} " \ | 184 | "mmcargs=setenv bootargs ${jh_clk} console=${console} ${optargs} " \ |
181 | "rootfstype=${mmcrootfstype} root=${mmcroot}\0 " \ | 185 | "rootfstype=${mmcrootfstype} root=${mmcroot}\0 " \ |
182 | "usbargs=setenv bootargs ${jh_clk} console=${console} ${optargs} " \ | 186 | "usbargs=setenv bootargs ${jh_clk} console=${console} ${optargs} " \ |
183 | "rootfstype=${mmcrootfstype} root=${usbroot}\0 " \ | 187 | "rootfstype=${mmcrootfstype} root=${usbroot}\0 " \ |
184 | "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | 188 | "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ |
185 | "bootscript=echo Running bootscript from mmc ...; " \ | 189 | "bootscript=echo Running bootscript from mmc ...; " \ |
186 | "source\0" \ | 190 | "source\0" \ |
187 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ | 191 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ |
192 | "loadm4bin=load mmc ${mmcdev}:${mmcpart} ${m4_addr_tmp} ${m4_bin}\0" \ | ||
188 | "loadusbimage=fatload usb 0:1 ${loadaddr} ${image}\0" \ | 193 | "loadusbimage=fatload usb 0:1 ${loadaddr} ${image}\0" \ |
189 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} /dtbs/${fdt_file}\0" \ | 194 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} /dtbs/${fdt_file}\0" \ |
190 | "loadusbfdt=fatload usb 0:1 ${fdt_addr} /dtbs/${fdt_file}\0" \ | 195 | "loadusbfdt=fatload usb 0:1 ${fdt_addr} /dtbs/${fdt_file}\0" \ |
196 | "cpm4mem=cp.b ${m4_addr_tmp} ${m4_addr} 20000\0" \ | ||
191 | "mmcboot=echo Booting from mmc ...; " \ | 197 | "mmcboot=echo Booting from mmc ...; " \ |
192 | "run mmcargs; " \ | 198 | "run mmcargs; " \ |
193 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | 199 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
194 | "if run loadfdt; then " \ | 200 | "if run loadfdt; then " \ |
195 | "booti ${loadaddr} - ${fdt_addr}; " \ | 201 | "booti ${loadaddr} - ${fdt_addr}; " \ |
196 | "else " \ | 202 | "else " \ |
197 | "echo WARN: Cannot load the DT; " \ | 203 | "echo WARN: Cannot load the DT; " \ |
198 | "fi; " \ | 204 | "fi; " \ |
199 | "else " \ | 205 | "else " \ |
200 | "echo wait for boot; " \ | 206 | "echo wait for boot; " \ |
201 | "fi;\0" \ | 207 | "fi;\0" \ |
208 | "m4boot=" \ | ||
209 | "if test ${m4_addr} = 0x7e0000; then " \ | ||
210 | "echo Booting M4 from TCM; " \ | ||
211 | "else " \ | ||
212 | "echo Booting M4 from DRAM; " \ | ||
213 | "dcache flush; " \ | ||
214 | "fi; " \ | ||
215 | "bootaux ${m4_addr};\0" \ | ||
202 | "usbboot=echo Booting from USB ...; " \ | 216 | "usbboot=echo Booting from USB ...; " \ |
203 | "run usbargs; " \ | 217 | "run usbargs; " \ |
204 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | 218 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
205 | "if run loadusbfdt; then " \ | 219 | "if run loadusbfdt; then " \ |
206 | "booti ${loadaddr} - ${fdt_addr}; " \ | 220 | "booti ${loadaddr} - ${fdt_addr}; " \ |
207 | "else " \ | 221 | "else " \ |
208 | "echo WARN: Cannot load the DT; " \ | 222 | "echo WARN: Cannot load the DT; " \ |
209 | "fi; " \ | 223 | "fi; " \ |
210 | "else " \ | 224 | "else " \ |
211 | "echo wait for boot; " \ | 225 | "echo wait for boot; " \ |
212 | "fi;\0" \ | 226 | "fi;\0" \ |
213 | "netargs=setenv bootargs ${jh_clk} console=${console} " \ | 227 | "netargs=setenv bootargs ${jh_clk} console=${console} " \ |
214 | "root=/dev/nfs " \ | 228 | "root=/dev/nfs " \ |
215 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ | 229 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ |
216 | "netboot=echo Booting from net ...; " \ | 230 | "netboot=echo Booting from net ...; " \ |
217 | "run netargs; " \ | 231 | "run netargs; " \ |
218 | "if test ${ip_dyn} = yes; then " \ | 232 | "if test ${ip_dyn} = yes; then " \ |
219 | "setenv get_cmd dhcp; " \ | 233 | "setenv get_cmd dhcp; " \ |
220 | "else " \ | 234 | "else " \ |
221 | "setenv get_cmd tftp; " \ | 235 | "setenv get_cmd tftp; " \ |
222 | "fi; " \ | 236 | "fi; " \ |
223 | "${get_cmd} ${loadaddr} ${image}; " \ | 237 | "${get_cmd} ${loadaddr} ${image}; " \ |
224 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | 238 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
225 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ | 239 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ |
226 | "booti ${loadaddr} - ${fdt_addr}; " \ | 240 | "booti ${loadaddr} - ${fdt_addr}; " \ |
227 | "else " \ | 241 | "else " \ |
228 | "echo WARN: Cannot load the DT; " \ | 242 | "echo WARN: Cannot load the DT; " \ |
229 | "fi; " \ | 243 | "fi; " \ |
230 | "else " \ | 244 | "else " \ |
231 | "booti; " \ | 245 | "booti; " \ |
232 | "fi;\0" | 246 | "fi;\0" |
233 | 247 | ||
234 | #define CONFIG_BOOTCOMMAND \ | 248 | #define CONFIG_BOOTCOMMAND \ |
235 | "mmc dev ${mmcdev}; if mmc rescan; then " \ | 249 | "mmc dev ${mmcdev}; if mmc rescan; then " \ |
250 | "if test ${use_m4} = yes && run loadm4bin; then " \ | ||
251 | "run cpm4mem; " \ | ||
252 | "run m4boot; " \ | ||
253 | "fi; " \ | ||
236 | "echo Checking for: uEnv.txt ...; " \ | 254 | "echo Checking for: uEnv.txt ...; " \ |
237 | "if test -e mmc ${bootpart} /uEnv.txt; then " \ | 255 | "if test -e mmc ${bootpart} /uEnv.txt; then " \ |
238 | "if run loadbootenv; then " \ | 256 | "if run loadbootenv; then " \ |
239 | "echo Loaded environment from uEnv.txt;" \ | 257 | "echo Loaded environment from uEnv.txt;" \ |
240 | "run importbootenv;" \ | 258 | "run importbootenv;" \ |
241 | "fi;" \ | 259 | "fi;" \ |
242 | "echo Checking if uenvcmd is set ...;" \ | 260 | "echo Checking if uenvcmd is set ...;" \ |
243 | "if test -n ${uenvcmd}; then " \ | 261 | "if test -n ${uenvcmd}; then " \ |
244 | "echo Running uenvcmd ...;" \ | 262 | "echo Running uenvcmd ...;" \ |
245 | "run uenvcmd;" \ | 263 | "run uenvcmd;" \ |
246 | "fi;" \ | 264 | "fi;" \ |
247 | "fi; " \ | 265 | "fi; " \ |
248 | "if run loadimage; then " \ | 266 | "if run loadimage; then " \ |
249 | "run mmcboot; " \ | 267 | "run mmcboot; " \ |
250 | "else run netboot; " \ | 268 | "else run netboot; " \ |
251 | "fi; " \ | 269 | "fi; " \ |
252 | "booti ${loadaddr} - ${fdt_addr}; fi;" | 270 | "booti ${loadaddr} - ${fdt_addr}; fi;" |
253 | #endif | 271 | #endif |
254 | 272 | ||
255 | /* Link Definitions */ | 273 | /* Link Definitions */ |
256 | #define CONFIG_LOADADDR 0x40480000 | 274 | #define CONFIG_LOADADDR 0x40480000 |
257 | 275 | ||
258 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | 276 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
259 | 277 | ||
260 | #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 | 278 | #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 |
261 | #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 | 279 | #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 |
262 | #define CONFIG_SYS_INIT_SP_OFFSET \ | 280 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
263 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | 281 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
264 | #define CONFIG_SYS_INIT_SP_ADDR \ | 282 | #define CONFIG_SYS_INIT_SP_ADDR \ |
265 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | 283 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
266 | 284 | ||
267 | #define CONFIG_ENV_OVERWRITE | 285 | #define CONFIG_ENV_OVERWRITE |
268 | #if defined(CONFIG_ENV_IS_IN_MMC) | 286 | #if defined(CONFIG_ENV_IS_IN_MMC) |
269 | #define CONFIG_ENV_OFFSET (64 * SZ_64K) | 287 | #define CONFIG_ENV_OFFSET (64 * SZ_64K) |
270 | #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) | 288 | #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) |
271 | #define CONFIG_ENV_OFFSET (4 * 1024 * 1024) | 289 | #define CONFIG_ENV_OFFSET (4 * 1024 * 1024) |
272 | #define CONFIG_ENV_SECT_SIZE (64 * 1024) | 290 | #define CONFIG_ENV_SECT_SIZE (64 * 1024) |
273 | #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS | 291 | #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS |
274 | #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS | 292 | #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS |
275 | #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE | 293 | #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE |
276 | #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED | 294 | #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED |
277 | #elif defined(CONFIG_ENV_IS_IN_NAND) | 295 | #elif defined(CONFIG_ENV_IS_IN_NAND) |
278 | #define CONFIG_ENV_OFFSET (60 << 20) | 296 | #define CONFIG_ENV_OFFSET (60 << 20) |
279 | #endif | 297 | #endif |
280 | #define CONFIG_ENV_SIZE 0x1000 | 298 | #define CONFIG_ENV_SIZE 0x1000 |
281 | #define CONFIG_SYS_MMC_ENV_DEV 2 /* USDHC2 */ | 299 | #define CONFIG_SYS_MMC_ENV_DEV 2 /* USDHC2 */ |
282 | #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ | 300 | #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ |
283 | 301 | ||
284 | /* Size of malloc() pool */ | 302 | /* Size of malloc() pool */ |
285 | #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024) | 303 | #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024) |
286 | 304 | ||
287 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 | 305 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
288 | #define PHYS_SDRAM 0x40000000 | 306 | #define PHYS_SDRAM 0x40000000 |
289 | #ifdef CONFIG_2GB_LPDDR4 | 307 | #ifdef CONFIG_2GB_LPDDR4 |
290 | #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ | 308 | #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ |
291 | #elif defined(CONFIG_IMX8M_4G_LPDDR4) || defined(CONFIG_4GB_LPDDR4) | 309 | #elif defined(CONFIG_IMX8M_4G_LPDDR4) || defined(CONFIG_4GB_LPDDR4) |
292 | #undef PHYS_SDRAM_SIZE | 310 | #undef PHYS_SDRAM_SIZE |
293 | #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB */ | 311 | #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB */ |
294 | #define PHYS_SDRAM_2 0x100000000 | 312 | #define PHYS_SDRAM_2 0x100000000 |
295 | #define PHYS_SDRAM_2_SIZE 0x40000000 /* 1GB */ | 313 | #define PHYS_SDRAM_2_SIZE 0x40000000 /* 1GB */ |
296 | #undef CONFIG_NR_DRAM_BANKS | 314 | #undef CONFIG_NR_DRAM_BANKS |
297 | #define CONFIG_NR_DRAM_BANKS 2 | 315 | #define CONFIG_NR_DRAM_BANKS 2 |
298 | #else | 316 | #else |
299 | #undef PHYS_SDRAM_SIZE | 317 | #undef PHYS_SDRAM_SIZE |
300 | #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB */ | 318 | #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB */ |
301 | #define PHYS_SDRAM_2 0x100000000 | 319 | #define PHYS_SDRAM_2 0x100000000 |
302 | #define PHYS_SDRAM_2_SIZE 0x40000000 /* 1GB */ | 320 | #define PHYS_SDRAM_2_SIZE 0x40000000 /* 1GB */ |
303 | #undef CONFIG_NR_DRAM_BANKS | 321 | #undef CONFIG_NR_DRAM_BANKS |
304 | #define CONFIG_NR_DRAM_BANKS 2 | 322 | #define CONFIG_NR_DRAM_BANKS 2 |
305 | #endif | 323 | #endif |
306 | 324 | ||
307 | #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM | 325 | #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM |
308 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ | 326 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ |
309 | (PHYS_SDRAM_SIZE >> 1)) | 327 | (PHYS_SDRAM_SIZE >> 1)) |
310 | 328 | ||
311 | #define CONFIG_BAUDRATE 115200 | 329 | #define CONFIG_BAUDRATE 115200 |
312 | 330 | ||
313 | #define CONFIG_MXC_UART | 331 | #define CONFIG_MXC_UART |
314 | 332 | ||
315 | #ifdef CONFIG_CONSOLE_SER0 | 333 | #ifdef CONFIG_CONSOLE_SER0 |
316 | #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR | 334 | #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR |
317 | #define CONSOLE_DEV "ttymxc0" | 335 | #define CONSOLE_DEV "ttymxc0" |
318 | #endif | 336 | #endif |
319 | 337 | ||
320 | #ifdef CONFIG_CONSOLE_SER1 | 338 | #ifdef CONFIG_CONSOLE_SER1 |
321 | #define CONFIG_MXC_UART_BASE UART4_BASE_ADDR | 339 | #define CONFIG_MXC_UART_BASE UART4_BASE_ADDR |
322 | #define CONSOLE_DEV "ttymxc3" | 340 | #define CONSOLE_DEV "ttymxc3" |
323 | #endif | 341 | #endif |
324 | 342 | ||
325 | #ifdef CONFIG_CONSOLE_SER2 | 343 | #ifdef CONFIG_CONSOLE_SER2 |
326 | #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR | 344 | #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR |
327 | #define CONSOLE_DEV "ttymxc2" | 345 | #define CONSOLE_DEV "ttymxc2" |
328 | #endif | 346 | #endif |
329 | 347 | ||
330 | #ifdef CONFIG_CONSOLE_SER3 | 348 | #ifdef CONFIG_CONSOLE_SER3 |
331 | #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR | 349 | #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR |
332 | #define CONSOLE_DEV "ttymxc1" | 350 | #define CONSOLE_DEV "ttymxc1" |
333 | #endif | 351 | #endif |
334 | 352 | ||
335 | /* Monitor Command Prompt */ | 353 | /* Monitor Command Prompt */ |
336 | #undef CONFIG_SYS_PROMPT | 354 | #undef CONFIG_SYS_PROMPT |
337 | #define CONFIG_SYS_PROMPT "u-boot$ " | 355 | #define CONFIG_SYS_PROMPT "u-boot$ " |
338 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | 356 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
339 | #define CONFIG_SYS_CBSIZE 2048 | 357 | #define CONFIG_SYS_CBSIZE 2048 |
340 | #define CONFIG_SYS_MAXARGS 64 | 358 | #define CONFIG_SYS_MAXARGS 64 |
341 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | 359 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
342 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | 360 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
343 | sizeof(CONFIG_SYS_PROMPT) + 16) | 361 | sizeof(CONFIG_SYS_PROMPT) + 16) |
344 | 362 | ||
345 | #define CONFIG_IMX_BOOTAUX | 363 | #define CONFIG_IMX_BOOTAUX |
346 | 364 | ||
347 | /* USDHC */ | 365 | /* USDHC */ |
348 | #define CONFIG_CMD_MMC | 366 | #define CONFIG_CMD_MMC |
349 | #define CONFIG_FSL_ESDHC | 367 | #define CONFIG_FSL_ESDHC |
350 | #define CONFIG_FSL_USDHC | 368 | #define CONFIG_FSL_USDHC |
351 | 369 | ||
352 | #ifdef CONFIG_TARGET_IMX8MM_DDR4_EVK | 370 | #ifdef CONFIG_TARGET_IMX8MM_DDR4_EVK |
353 | #define CONFIG_SYS_FSL_USDHC_NUM 1 | 371 | #define CONFIG_SYS_FSL_USDHC_NUM 1 |
354 | #else | 372 | #else |
355 | #define CONFIG_SYS_FSL_USDHC_NUM 2 | 373 | #define CONFIG_SYS_FSL_USDHC_NUM 2 |
356 | #endif | 374 | #endif |
357 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | 375 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
358 | 376 | ||
359 | #define CONFIG_CMD_PART | 377 | #define CONFIG_CMD_PART |
360 | #define CONFIG_CMD_FS_GENERIC | 378 | #define CONFIG_CMD_FS_GENERIC |
361 | 379 | ||
362 | #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ | 380 | #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ |
363 | #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 | 381 | #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 |
364 | 382 | ||
365 | #ifdef CONFIG_FSL_FSPI | 383 | #ifdef CONFIG_FSL_FSPI |
366 | #define FSL_FSPI_FLASH_SIZE SZ_32M | 384 | #define FSL_FSPI_FLASH_SIZE SZ_32M |
367 | #define FSL_FSPI_FLASH_NUM 1 | 385 | #define FSL_FSPI_FLASH_NUM 1 |
368 | #define FSPI0_BASE_ADDR 0x30bb0000 | 386 | #define FSPI0_BASE_ADDR 0x30bb0000 |
369 | #define FSPI0_AMBA_BASE 0x0 | 387 | #define FSPI0_AMBA_BASE 0x0 |
370 | #define CONFIG_FSPI_QUAD_SUPPORT | 388 | #define CONFIG_FSPI_QUAD_SUPPORT |
371 | 389 | ||
372 | #define CONFIG_SYS_FSL_FSPI_AHB | 390 | #define CONFIG_SYS_FSL_FSPI_AHB |
373 | #endif | 391 | #endif |
374 | 392 | ||
375 | #ifdef CONFIG_NAND_MXS | 393 | #ifdef CONFIG_NAND_MXS |
376 | #define CONFIG_CMD_NAND_TRIMFFS | 394 | #define CONFIG_CMD_NAND_TRIMFFS |
377 | 395 | ||
378 | /* NAND stuff */ | 396 | /* NAND stuff */ |
379 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | 397 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
380 | #define CONFIG_SYS_NAND_BASE 0x20000000 | 398 | #define CONFIG_SYS_NAND_BASE 0x20000000 |
381 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | 399 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
382 | #define CONFIG_SYS_NAND_ONFI_DETECTION | 400 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
383 | 401 | ||
384 | #ifdef CONFIG_CMD_UBI | 402 | #ifdef CONFIG_CMD_UBI |
385 | #endif | 403 | #endif |
386 | #endif /* CONFIG_NAND_MXS */ | 404 | #endif /* CONFIG_NAND_MXS */ |
387 | 405 | ||
388 | 406 | ||
389 | #define CONFIG_MXC_GPIO | 407 | #define CONFIG_MXC_GPIO |
390 | 408 | ||
391 | #define CONFIG_MXC_OCOTP | 409 | #define CONFIG_MXC_OCOTP |
392 | #define CONFIG_CMD_FUSE | 410 | #define CONFIG_CMD_FUSE |
393 | 411 | ||
394 | #ifndef CONFIG_DM_I2C | 412 | #ifndef CONFIG_DM_I2C |
395 | #define CONFIG_SYS_I2C | 413 | #define CONFIG_SYS_I2C |
396 | #endif | 414 | #endif |
397 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ | 415 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
398 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | 416 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ |
399 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ | 417 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
400 | #define CONFIG_SYS_I2C_SPEED 100000 | 418 | #define CONFIG_SYS_I2C_SPEED 100000 |
401 | 419 | ||
402 | /* USB configs */ | 420 | /* USB configs */ |
403 | #ifndef CONFIG_SPL_BUILD | 421 | #ifndef CONFIG_SPL_BUILD |
404 | #define CONFIG_CMD_USB | 422 | #define CONFIG_CMD_USB |
405 | #define CONFIG_USB_STORAGE | 423 | #define CONFIG_USB_STORAGE |
406 | #define CONFIG_USBD_HS | 424 | #define CONFIG_USBD_HS |
407 | 425 | ||
408 | #define CONFIG_CMD_USB_MASS_STORAGE | 426 | #define CONFIG_CMD_USB_MASS_STORAGE |
409 | #define CONFIG_USB_GADGET_MASS_STORAGE | 427 | #define CONFIG_USB_GADGET_MASS_STORAGE |
410 | #define CONFIG_USB_FUNCTION_MASS_STORAGE | 428 | #define CONFIG_USB_FUNCTION_MASS_STORAGE |
411 | 429 | ||
412 | #endif | 430 | #endif |
413 | 431 | ||
414 | #define CONFIG_USB_GADGET_VBUS_DRAW 2 | 432 | #define CONFIG_USB_GADGET_VBUS_DRAW 2 |
415 | 433 | ||
416 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | 434 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
417 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 | 435 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
418 | 436 | ||
419 | #ifdef CONFIG_VIDEO | 437 | #ifdef CONFIG_VIDEO |
420 | #define CONFIG_VIDEO_MXS | 438 | #define CONFIG_VIDEO_MXS |
421 | #define CONFIG_VIDEO_LOGO | 439 | #define CONFIG_VIDEO_LOGO |
422 | #define CONFIG_SPLASH_SCREEN | 440 | #define CONFIG_SPLASH_SCREEN |
423 | #define CONFIG_SPLASH_SCREEN_ALIGN | 441 | #define CONFIG_SPLASH_SCREEN_ALIGN |
424 | #define CONFIG_CMD_BMP | 442 | #define CONFIG_CMD_BMP |
425 | #define CONFIG_BMP_16BPP | 443 | #define CONFIG_BMP_16BPP |
426 | #define CONFIG_VIDEO_BMP_RLE8 | 444 | #define CONFIG_VIDEO_BMP_RLE8 |
427 | #define CONFIG_VIDEO_BMP_LOGO | 445 | #define CONFIG_VIDEO_BMP_LOGO |
428 | #define CONFIG_IMX_VIDEO_SKIP | 446 | #define CONFIG_IMX_VIDEO_SKIP |
429 | #define CONFIG_RM67191 | 447 | #define CONFIG_RM67191 |
430 | #endif | 448 | #endif |
431 | 449 | ||
432 | #define CONFIG_OF_SYSTEM_SETUP | 450 | #define CONFIG_OF_SYSTEM_SETUP |
433 | 451 | ||
434 | #if defined(CONFIG_ANDROID_SUPPORT) | 452 | #if defined(CONFIG_ANDROID_SUPPORT) |
435 | #include "smarcimx8mm_android.h" | 453 | #include "smarcimx8mm_android.h" |
436 | #endif | 454 | #endif |
437 | #endif | 455 | #endif |
438 | 456 |