Eric Lee / smarc-uboot

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Commit 48d58d07b9005c94c62fcdc345e65b0a8236d378

Authored by Ye Li
1 parent ca7ebfcf07
Exists in smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga and in 4 other branches smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga

MLK-20664-3 imx8m: Enable redundant offset for SPL NAND FIT 

The new uuu will change to burn entire boot image to nandfit mtdpart not
only the FIT image. We enable REDUND offset configuration here, so that SPL will
try to find FIT header at two locations: the begin of nandfit mtdpart and
the 0x57c00 offset of nandfit mtdpart. This helps to be compatible with both
old and new uuu.

Signed-off-by: Ye Li <ye.li@nxp.com>

Showing 2 changed files with 8 additions and 0 deletions Inline Diff

include/configs/imx8mm_evk.h
Diff comments   View file @ 48d58d0
1 /* 1 /*
2 * Copyright 2018 NXP 2 * Copyright 2018 NXP
3 * 3 *
4 * SPDX-License-Identifier: GPL-2.0+ 4 * SPDX-License-Identifier: GPL-2.0+
5 */ 5 */
6 6
7 #ifndef __IMX8MM_EVK_H 7 #ifndef __IMX8MM_EVK_H
8 #define __IMX8MM_EVK_H 8 #define __IMX8MM_EVK_H
9 9
10 #include <linux/sizes.h> 10 #include <linux/sizes.h>
11 #include <asm/arch/imx-regs.h> 11 #include <asm/arch/imx-regs.h>
12 12
13 #include "imx_env.h" 13 #include "imx_env.h"
14 14
15 #ifdef CONFIG_SECURE_BOOT 15 #ifdef CONFIG_SECURE_BOOT
16 #define CONFIG_CSF_SIZE 0x2000 /* 8K region */ 16 #define CONFIG_CSF_SIZE 0x2000 /* 8K region */
17 #endif 17 #endif
18 18
19 #define CONFIG_SPL_MAX_SIZE (148 * 1024) 19 #define CONFIG_SPL_MAX_SIZE (148 * 1024)
20 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 20 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
21 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR 21 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
22 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 22 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
23 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 23 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
24 #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) 24 #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
25 25
26 #ifdef CONFIG_SPL_BUILD 26 #ifdef CONFIG_SPL_BUILD
27 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ 27 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
28 #define CONFIG_SPL_WATCHDOG_SUPPORT 28 #define CONFIG_SPL_WATCHDOG_SUPPORT
29 #define CONFIG_SPL_POWER_SUPPORT 29 #define CONFIG_SPL_POWER_SUPPORT
30 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT 30 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
31 #define CONFIG_SPL_I2C_SUPPORT 31 #define CONFIG_SPL_I2C_SUPPORT
32 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" 32 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
33 #define CONFIG_SPL_STACK 0x91fff0 33 #define CONFIG_SPL_STACK 0x91fff0
34 #define CONFIG_SPL_LIBCOMMON_SUPPORT 34 #define CONFIG_SPL_LIBCOMMON_SUPPORT
35 #define CONFIG_SPL_LIBGENERIC_SUPPORT 35 #define CONFIG_SPL_LIBGENERIC_SUPPORT
36 #define CONFIG_SPL_SERIAL_SUPPORT 36 #define CONFIG_SPL_SERIAL_SUPPORT
37 #define CONFIG_SPL_GPIO_SUPPORT 37 #define CONFIG_SPL_GPIO_SUPPORT
38 #define CONFIG_SPL_BSS_START_ADDR 0x00910000 38 #define CONFIG_SPL_BSS_START_ADDR 0x00910000
39 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ 39 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
40 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 40 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
41 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ 41 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
42 #define CONFIG_SYS_ICACHE_OFF 42 #define CONFIG_SYS_ICACHE_OFF
43 #define CONFIG_SYS_DCACHE_OFF 43 #define CONFIG_SYS_DCACHE_OFF
44 44
45 #define CONFIG_MALLOC_F_ADDR 0x912000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ 45 #define CONFIG_MALLOC_F_ADDR 0x912000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
46 46
47 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ 47 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
48 48
49 #undef CONFIG_DM_MMC 49 #undef CONFIG_DM_MMC
50 #undef CONFIG_DM_PMIC 50 #undef CONFIG_DM_PMIC
51 #undef CONFIG_DM_PMIC_PFUZE100 51 #undef CONFIG_DM_PMIC_PFUZE100
52 52
53 #define CONFIG_POWER 53 #define CONFIG_POWER
54 #define CONFIG_POWER_I2C 54 #define CONFIG_POWER_I2C
55 #define CONFIG_POWER_BD71837 55 #define CONFIG_POWER_BD71837
56 56
57 #define CONFIG_SYS_I2C 57 #define CONFIG_SYS_I2C
58 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 58 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
59 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 59 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
60 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 60 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
61 61
62 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 62 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
63 63
64 #if defined(CONFIG_NAND_BOOT) 64 #if defined(CONFIG_NAND_BOOT)
65 #define CONFIG_SPL_NAND_SUPPORT 65 #define CONFIG_SPL_NAND_SUPPORT
66 #define CONFIG_SPL_DMA_SUPPORT 66 #define CONFIG_SPL_DMA_SUPPORT
67 #define CONFIG_SPL_NAND_MXS 67 #define CONFIG_SPL_NAND_MXS
68 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4000000 /* Put the FIT out of first 64MB boot area */ 68 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4000000 /* Put the FIT out of first 64MB boot area */
69
70 /* Set a redundant offset in nand FIT mtdpart. The new uuu will burn full boot image (not only FIT part) to the mtdpart, so we check both two offsets */
71 #define CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND \
72 (CONFIG_SYS_NAND_U_BOOT_OFFS + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8400)
69 #endif 73 #endif
70 74
71 #endif 75 #endif
72 76
73 #define CONFIG_CMD_READ 77 #define CONFIG_CMD_READ
74 #define CONFIG_SERIAL_TAG 78 #define CONFIG_SERIAL_TAG
75 #define CONFIG_FASTBOOT_USB_DEV 0 79 #define CONFIG_FASTBOOT_USB_DEV 0
76 80
77 #define CONFIG_REMAKE_ELF 81 #define CONFIG_REMAKE_ELF
78 82
79 #define CONFIG_BOARD_EARLY_INIT_F 83 #define CONFIG_BOARD_EARLY_INIT_F
80 #define CONFIG_BOARD_POSTCLK_INIT 84 #define CONFIG_BOARD_POSTCLK_INIT
81 #define CONFIG_BOARD_LATE_INIT 85 #define CONFIG_BOARD_LATE_INIT
82 86
83 /* Flat Device Tree Definitions */ 87 /* Flat Device Tree Definitions */
84 #define CONFIG_OF_BOARD_SETUP 88 #define CONFIG_OF_BOARD_SETUP
85 89
86 #undef CONFIG_CMD_EXPORTENV 90 #undef CONFIG_CMD_EXPORTENV
87 #undef CONFIG_CMD_IMPORTENV 91 #undef CONFIG_CMD_IMPORTENV
88 #undef CONFIG_CMD_IMLS 92 #undef CONFIG_CMD_IMLS
89 93
90 #undef CONFIG_CMD_CRC32 94 #undef CONFIG_CMD_CRC32
91 #undef CONFIG_BOOTM_NETBSD 95 #undef CONFIG_BOOTM_NETBSD
92 96
93 /* ENET Config */ 97 /* ENET Config */
94 /* ENET1 */ 98 /* ENET1 */
95 #if defined(CONFIG_CMD_NET) 99 #if defined(CONFIG_CMD_NET)
96 #define CONFIG_CMD_PING 100 #define CONFIG_CMD_PING
97 #define CONFIG_CMD_DHCP 101 #define CONFIG_CMD_DHCP
98 #define CONFIG_CMD_MII 102 #define CONFIG_CMD_MII
99 #define CONFIG_MII 103 #define CONFIG_MII
100 #define CONFIG_ETHPRIME "FEC" 104 #define CONFIG_ETHPRIME "FEC"
101 105
102 #define CONFIG_FEC_MXC 106 #define CONFIG_FEC_MXC
103 #define CONFIG_FEC_XCV_TYPE RGMII 107 #define CONFIG_FEC_XCV_TYPE RGMII
104 #define CONFIG_FEC_MXC_PHYADDR 0 108 #define CONFIG_FEC_MXC_PHYADDR 0
105 #define FEC_QUIRK_ENET_MAC 109 #define FEC_QUIRK_ENET_MAC
106 110
107 #define CONFIG_PHY_GIGE 111 #define CONFIG_PHY_GIGE
108 #define IMX_FEC_BASE 0x30BE0000 112 #define IMX_FEC_BASE 0x30BE0000
109 113
110 #define CONFIG_PHYLIB 114 #define CONFIG_PHYLIB
111 #define CONFIG_PHY_ATHEROS 115 #define CONFIG_PHY_ATHEROS
112 #endif 116 #endif
113 117
114 /* 118 /*
115 * Another approach is add the clocks for inmates into clks_init_on 119 * Another approach is add the clocks for inmates into clks_init_on
116 * in clk-imx8mm.c, then clk_ingore_unused could be removed. 120 * in clk-imx8mm.c, then clk_ingore_unused could be removed.
117 */ 121 */
118 #define JAILHOUSE_ENV \ 122 #define JAILHOUSE_ENV \
119 "jh_clk= \0 " \ 123 "jh_clk= \0 " \
120 "jh_mmcboot=setenv fdt_file fsl-imx8mm-evk-root.dtb;" \ 124 "jh_mmcboot=setenv fdt_file fsl-imx8mm-evk-root.dtb;" \
121 "setenv jh_clk clk_ignore_unused; " \ 125 "setenv jh_clk clk_ignore_unused; " \
122 "if run loadimage; then " \ 126 "if run loadimage; then " \
123 "run mmcboot; " \ 127 "run mmcboot; " \
124 "else run jh_netboot; fi; \0" \ 128 "else run jh_netboot; fi; \0" \
125 "jh_netboot=setenv fdt_file fsl-imx8mm-evk-root.dtb; setenv jh_clk clk_ignore_unused; run netboot; \0 " 129 "jh_netboot=setenv fdt_file fsl-imx8mm-evk-root.dtb; setenv jh_clk clk_ignore_unused; run netboot; \0 "
126 130
127 #ifdef CONFIG_NAND_BOOT 131 #ifdef CONFIG_NAND_BOOT
128 #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(nandboot),16m(nandfit),32m(nandkernel),16m(nanddtb),8m(nandtee),-(nandrootfs) " 132 #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(nandboot),16m(nandfit),32m(nandkernel),16m(nanddtb),8m(nandtee),-(nandrootfs) "
129 #endif 133 #endif
130 134
131 #define CONFIG_MFG_ENV_SETTINGS \ 135 #define CONFIG_MFG_ENV_SETTINGS \
132 CONFIG_MFG_ENV_SETTINGS_DEFAULT \ 136 CONFIG_MFG_ENV_SETTINGS_DEFAULT \
133 "initrd_addr=0x43800000\0" \ 137 "initrd_addr=0x43800000\0" \
134 "initrd_high=0xffffffffffffffff\0" \ 138 "initrd_high=0xffffffffffffffff\0" \
135 "emmc_dev=1\0"\ 139 "emmc_dev=1\0"\
136 "sd_dev=0\0" \ 140 "sd_dev=0\0" \
137 141
138 /* Initial environment variables */ 142 /* Initial environment variables */
139 #if defined(CONFIG_NAND_BOOT) 143 #if defined(CONFIG_NAND_BOOT)
140 #define CONFIG_EXTRA_ENV_SETTINGS \ 144 #define CONFIG_EXTRA_ENV_SETTINGS \
141 CONFIG_MFG_ENV_SETTINGS \ 145 CONFIG_MFG_ENV_SETTINGS \
142 "fdt_addr=0x43000000\0" \ 146 "fdt_addr=0x43000000\0" \
143 "fdt_high=0xffffffffffffffff\0" \ 147 "fdt_high=0xffffffffffffffff\0" \
144 "mtdparts=" MFG_NAND_PARTITION "\0" \ 148 "mtdparts=" MFG_NAND_PARTITION "\0" \
145 "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \ 149 "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
146 "bootargs=console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200 ubi.mtd=5 " \ 150 "bootargs=console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200 ubi.mtd=5 " \
147 "root=ubi0:nandrootfs rootfstype=ubifs " \ 151 "root=ubi0:nandrootfs rootfstype=ubifs " \
148 MFG_NAND_PARTITION \ 152 MFG_NAND_PARTITION \
149 "\0" \ 153 "\0" \
150 "bootcmd=nand read ${loadaddr} 0x5000000 0x2000000;"\ 154 "bootcmd=nand read ${loadaddr} 0x5000000 0x2000000;"\
151 "nand read ${fdt_addr} 0x7000000 0x100000;"\ 155 "nand read ${fdt_addr} 0x7000000 0x100000;"\
152 "booti ${loadaddr} - ${fdt_addr}" 156 "booti ${loadaddr} - ${fdt_addr}"
153 157
154 #else 158 #else
155 #define CONFIG_EXTRA_ENV_SETTINGS \ 159 #define CONFIG_EXTRA_ENV_SETTINGS \
156 CONFIG_MFG_ENV_SETTINGS \ 160 CONFIG_MFG_ENV_SETTINGS \
157 JAILHOUSE_ENV \ 161 JAILHOUSE_ENV \
158 "script=boot.scr\0" \ 162 "script=boot.scr\0" \
159 "image=Image\0" \ 163 "image=Image\0" \
160 "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \ 164 "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
161 "fdt_addr=0x43000000\0" \ 165 "fdt_addr=0x43000000\0" \
162 "fdt_high=0xffffffffffffffff\0" \ 166 "fdt_high=0xffffffffffffffff\0" \
163 "boot_fdt=try\0" \ 167 "boot_fdt=try\0" \
164 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ 168 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
165 "initrd_addr=0x43800000\0" \ 169 "initrd_addr=0x43800000\0" \
166 "initrd_high=0xffffffffffffffff\0" \ 170 "initrd_high=0xffffffffffffffff\0" \
167 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 171 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
168 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 172 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
169 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 173 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
170 "mmcautodetect=yes\0" \ 174 "mmcautodetect=yes\0" \
171 "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \ 175 "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
172 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 176 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
173 "bootscript=echo Running bootscript from mmc ...; " \ 177 "bootscript=echo Running bootscript from mmc ...; " \
174 "source\0" \ 178 "source\0" \
175 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 179 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
176 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 180 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
177 "mmcboot=echo Booting from mmc ...; " \ 181 "mmcboot=echo Booting from mmc ...; " \
178 "run mmcargs; " \ 182 "run mmcargs; " \
179 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 183 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
180 "if run loadfdt; then " \ 184 "if run loadfdt; then " \
181 "booti ${loadaddr} - ${fdt_addr}; " \ 185 "booti ${loadaddr} - ${fdt_addr}; " \
182 "else " \ 186 "else " \
183 "echo WARN: Cannot load the DT; " \ 187 "echo WARN: Cannot load the DT; " \
184 "fi; " \ 188 "fi; " \
185 "else " \ 189 "else " \
186 "echo wait for boot; " \ 190 "echo wait for boot; " \
187 "fi;\0" \ 191 "fi;\0" \
188 "netargs=setenv bootargs ${jh_clk} console=${console} " \ 192 "netargs=setenv bootargs ${jh_clk} console=${console} " \
189 "root=/dev/nfs " \ 193 "root=/dev/nfs " \
190 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 194 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
191 "netboot=echo Booting from net ...; " \ 195 "netboot=echo Booting from net ...; " \
192 "run netargs; " \ 196 "run netargs; " \
193 "if test ${ip_dyn} = yes; then " \ 197 "if test ${ip_dyn} = yes; then " \
194 "setenv get_cmd dhcp; " \ 198 "setenv get_cmd dhcp; " \
195 "else " \ 199 "else " \
196 "setenv get_cmd tftp; " \ 200 "setenv get_cmd tftp; " \
197 "fi; " \ 201 "fi; " \
198 "${get_cmd} ${loadaddr} ${image}; " \ 202 "${get_cmd} ${loadaddr} ${image}; " \
199 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 203 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
200 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 204 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
201 "booti ${loadaddr} - ${fdt_addr}; " \ 205 "booti ${loadaddr} - ${fdt_addr}; " \
202 "else " \ 206 "else " \
203 "echo WARN: Cannot load the DT; " \ 207 "echo WARN: Cannot load the DT; " \
204 "fi; " \ 208 "fi; " \
205 "else " \ 209 "else " \
206 "booti; " \ 210 "booti; " \
207 "fi;\0" 211 "fi;\0"
208 212
209 #define CONFIG_BOOTCOMMAND \ 213 #define CONFIG_BOOTCOMMAND \
210 "mmc dev ${mmcdev}; if mmc rescan; then " \ 214 "mmc dev ${mmcdev}; if mmc rescan; then " \
211 "if run loadbootscript; then " \ 215 "if run loadbootscript; then " \
212 "run bootscript; " \ 216 "run bootscript; " \
213 "else " \ 217 "else " \
214 "if run loadimage; then " \ 218 "if run loadimage; then " \
215 "run mmcboot; " \ 219 "run mmcboot; " \
216 "else run netboot; " \ 220 "else run netboot; " \
217 "fi; " \ 221 "fi; " \
218 "fi; " \ 222 "fi; " \
219 "else booti ${loadaddr} - ${fdt_addr}; fi" 223 "else booti ${loadaddr} - ${fdt_addr}; fi"
220 #endif 224 #endif
221 225
222 /* Link Definitions */ 226 /* Link Definitions */
223 #define CONFIG_LOADADDR 0x40480000 227 #define CONFIG_LOADADDR 0x40480000
224 228
225 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 229 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
226 230
227 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 231 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
228 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 232 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
229 #define CONFIG_SYS_INIT_SP_OFFSET \ 233 #define CONFIG_SYS_INIT_SP_OFFSET \
230 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 234 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
231 #define CONFIG_SYS_INIT_SP_ADDR \ 235 #define CONFIG_SYS_INIT_SP_ADDR \
232 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 236 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
233 237
234 #define CONFIG_ENV_OVERWRITE 238 #define CONFIG_ENV_OVERWRITE
235 #if defined(CONFIG_ENV_IS_IN_MMC) 239 #if defined(CONFIG_ENV_IS_IN_MMC)
236 #define CONFIG_ENV_OFFSET (64 * SZ_64K) 240 #define CONFIG_ENV_OFFSET (64 * SZ_64K)
237 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) 241 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
238 #define CONFIG_ENV_OFFSET (4 * 1024 * 1024) 242 #define CONFIG_ENV_OFFSET (4 * 1024 * 1024)
239 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 243 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
240 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 244 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
241 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 245 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
242 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 246 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
243 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 247 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
244 #elif defined(CONFIG_ENV_IS_IN_NAND) 248 #elif defined(CONFIG_ENV_IS_IN_NAND)
245 #define CONFIG_ENV_OFFSET (60 << 20) 249 #define CONFIG_ENV_OFFSET (60 << 20)
246 #endif 250 #endif
247 #define CONFIG_ENV_SIZE 0x1000 251 #define CONFIG_ENV_SIZE 0x1000
248 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */ 252 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */
249 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ 253 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
250 254
251 /* Size of malloc() pool */ 255 /* Size of malloc() pool */
252 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024) 256 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024)
253 257
254 #define CONFIG_SYS_SDRAM_BASE 0x40000000 258 #define CONFIG_SYS_SDRAM_BASE 0x40000000
255 #define PHYS_SDRAM 0x40000000 259 #define PHYS_SDRAM 0x40000000
256 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ 260 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
257 #define CONFIG_NR_DRAM_BANKS 1 261 #define CONFIG_NR_DRAM_BANKS 1
258 262
259 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 263 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
260 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) 264 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
261 265
262 #define CONFIG_BAUDRATE 115200 266 #define CONFIG_BAUDRATE 115200
263 267
264 #define CONFIG_MXC_UART 268 #define CONFIG_MXC_UART
265 #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR 269 #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
266 270
267 /* Monitor Command Prompt */ 271 /* Monitor Command Prompt */
268 #undef CONFIG_SYS_PROMPT 272 #undef CONFIG_SYS_PROMPT
269 #define CONFIG_SYS_PROMPT "u-boot=> " 273 #define CONFIG_SYS_PROMPT "u-boot=> "
270 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 274 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
271 #define CONFIG_SYS_CBSIZE 2048 275 #define CONFIG_SYS_CBSIZE 2048
272 #define CONFIG_SYS_MAXARGS 64 276 #define CONFIG_SYS_MAXARGS 64
273 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 277 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
274 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 278 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
275 sizeof(CONFIG_SYS_PROMPT) + 16) 279 sizeof(CONFIG_SYS_PROMPT) + 16)
276 280
277 #define CONFIG_IMX_BOOTAUX 281 #define CONFIG_IMX_BOOTAUX
278 282
279 /* USDHC */ 283 /* USDHC */
280 #define CONFIG_CMD_MMC 284 #define CONFIG_CMD_MMC
281 #define CONFIG_FSL_ESDHC 285 #define CONFIG_FSL_ESDHC
282 #define CONFIG_FSL_USDHC 286 #define CONFIG_FSL_USDHC
283 287
284 #ifdef CONFIG_TARGET_IMX8MM_DDR4_EVK 288 #ifdef CONFIG_TARGET_IMX8MM_DDR4_EVK
285 #define CONFIG_SYS_FSL_USDHC_NUM 1 289 #define CONFIG_SYS_FSL_USDHC_NUM 1
286 #else 290 #else
287 #define CONFIG_SYS_FSL_USDHC_NUM 2 291 #define CONFIG_SYS_FSL_USDHC_NUM 2
288 #endif 292 #endif
289 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 293 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
290 294
291 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 295 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
292 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 296 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
293 297
294 #ifdef CONFIG_FSL_FSPI 298 #ifdef CONFIG_FSL_FSPI
295 #define CONFIG_SF_DEFAULT_BUS 0 299 #define CONFIG_SF_DEFAULT_BUS 0
296 #define CONFIG_SF_DEFAULT_CS 0 300 #define CONFIG_SF_DEFAULT_CS 0
297 #define CONFIG_SF_DEFAULT_SPEED 40000000 301 #define CONFIG_SF_DEFAULT_SPEED 40000000
298 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 302 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
299 #define FSL_FSPI_FLASH_SIZE SZ_32M 303 #define FSL_FSPI_FLASH_SIZE SZ_32M
300 #define FSL_FSPI_FLASH_NUM 1 304 #define FSL_FSPI_FLASH_NUM 1
301 #define FSPI0_BASE_ADDR 0x30bb0000 305 #define FSPI0_BASE_ADDR 0x30bb0000
302 #define FSPI0_AMBA_BASE 0x0 306 #define FSPI0_AMBA_BASE 0x0
303 #define CONFIG_SPI_FLASH_BAR 307 #define CONFIG_SPI_FLASH_BAR
304 #define CONFIG_FSPI_QUAD_SUPPORT 308 #define CONFIG_FSPI_QUAD_SUPPORT
305 309
306 #define CONFIG_SYS_FSL_FSPI_AHB 310 #define CONFIG_SYS_FSL_FSPI_AHB
307 #endif 311 #endif
308 312
309 /* Enable SPI */ 313 /* Enable SPI */
310 #ifndef CONFIG_NAND_MXS 314 #ifndef CONFIG_NAND_MXS
311 #ifndef CONFIG_FSL_FSPI 315 #ifndef CONFIG_FSL_FSPI
312 #ifdef CONFIG_CMD_SF 316 #ifdef CONFIG_CMD_SF
313 #define CONFIG_SPI_FLASH 317 #define CONFIG_SPI_FLASH
314 #define CONFIG_SPI_FLASH_STMICRO 318 #define CONFIG_SPI_FLASH_STMICRO
315 #define CONFIG_MXC_SPI 319 #define CONFIG_MXC_SPI
316 #define CONFIG_SF_DEFAULT_BUS 0 320 #define CONFIG_SF_DEFAULT_BUS 0
317 #define CONFIG_SF_DEFAULT_SPEED 20000000 321 #define CONFIG_SF_DEFAULT_SPEED 20000000
318 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 322 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
319 #endif 323 #endif
320 #endif 324 #endif
321 #endif 325 #endif
322 326
323 #ifdef CONFIG_CMD_NAND 327 #ifdef CONFIG_CMD_NAND
324 #define CONFIG_NAND_MXS 328 #define CONFIG_NAND_MXS
325 #define CONFIG_CMD_NAND_TRIMFFS 329 #define CONFIG_CMD_NAND_TRIMFFS
326 330
327 /* NAND stuff */ 331 /* NAND stuff */
328 #define CONFIG_SYS_MAX_NAND_DEVICE 1 332 #define CONFIG_SYS_MAX_NAND_DEVICE 1
329 #define CONFIG_SYS_NAND_BASE 0x20000000 333 #define CONFIG_SYS_NAND_BASE 0x20000000
330 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 334 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
331 #define CONFIG_SYS_NAND_ONFI_DETECTION 335 #define CONFIG_SYS_NAND_ONFI_DETECTION
332 336
333 /* DMA stuff, needed for GPMI/MXS NAND support */ 337 /* DMA stuff, needed for GPMI/MXS NAND support */
334 #define CONFIG_APBH_DMA 338 #define CONFIG_APBH_DMA
335 #define CONFIG_APBH_DMA_BURST 339 #define CONFIG_APBH_DMA_BURST
336 #define CONFIG_APBH_DMA_BURST8 340 #define CONFIG_APBH_DMA_BURST8
337 341
338 #ifdef CONFIG_CMD_UBI 342 #ifdef CONFIG_CMD_UBI
339 #define CONFIG_MTD_PARTITIONS 343 #define CONFIG_MTD_PARTITIONS
340 #define CONFIG_MTD_DEVICE 344 #define CONFIG_MTD_DEVICE
341 #endif 345 #endif
342 #endif /* CONFIG_CMD_NAND */ 346 #endif /* CONFIG_CMD_NAND */
343 347
344 348
345 #define CONFIG_MXC_GPIO 349 #define CONFIG_MXC_GPIO
346 350
347 #define CONFIG_MXC_OCOTP 351 #define CONFIG_MXC_OCOTP
348 #define CONFIG_CMD_FUSE 352 #define CONFIG_CMD_FUSE
349 353
350 #ifndef CONFIG_DM_I2C 354 #ifndef CONFIG_DM_I2C
351 #define CONFIG_SYS_I2C 355 #define CONFIG_SYS_I2C
352 #endif 356 #endif
353 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 357 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
354 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 358 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
355 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 359 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
356 #define CONFIG_SYS_I2C_SPEED 100000 360 #define CONFIG_SYS_I2C_SPEED 100000
357 361
358 /* USB configs */ 362 /* USB configs */
359 #ifndef CONFIG_SPL_BUILD 363 #ifndef CONFIG_SPL_BUILD
360 #define CONFIG_CMD_USB 364 #define CONFIG_CMD_USB
361 #define CONFIG_USB_STORAGE 365 #define CONFIG_USB_STORAGE
362 #define CONFIG_USBD_HS 366 #define CONFIG_USBD_HS
363 367
364 #define CONFIG_CMD_USB_MASS_STORAGE 368 #define CONFIG_CMD_USB_MASS_STORAGE
365 #define CONFIG_USB_GADGET_MASS_STORAGE 369 #define CONFIG_USB_GADGET_MASS_STORAGE
366 #define CONFIG_USB_FUNCTION_MASS_STORAGE 370 #define CONFIG_USB_FUNCTION_MASS_STORAGE
367 371
368 #endif 372 #endif
369 373
370 #define CONFIG_USB_GADGET_DUALSPEED 374 #define CONFIG_USB_GADGET_DUALSPEED
371 #define CONFIG_USB_GADGET_VBUS_DRAW 2 375 #define CONFIG_USB_GADGET_VBUS_DRAW 2
372 376
373 #define CONFIG_CI_UDC 377 #define CONFIG_CI_UDC
374 378
375 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 379 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
376 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 380 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
377 381
378 #ifdef CONFIG_VIDEO 382 #ifdef CONFIG_VIDEO
379 #define CONFIG_VIDEO_MXS 383 #define CONFIG_VIDEO_MXS
380 #define CONFIG_VIDEO_LOGO 384 #define CONFIG_VIDEO_LOGO
381 #define CONFIG_SPLASH_SCREEN 385 #define CONFIG_SPLASH_SCREEN
382 #define CONFIG_SPLASH_SCREEN_ALIGN 386 #define CONFIG_SPLASH_SCREEN_ALIGN
383 #define CONFIG_CMD_BMP 387 #define CONFIG_CMD_BMP
384 #define CONFIG_BMP_16BPP 388 #define CONFIG_BMP_16BPP
385 #define CONFIG_VIDEO_BMP_RLE8 389 #define CONFIG_VIDEO_BMP_RLE8
386 #define CONFIG_VIDEO_BMP_LOGO 390 #define CONFIG_VIDEO_BMP_LOGO
387 #define CONFIG_IMX_VIDEO_SKIP 391 #define CONFIG_IMX_VIDEO_SKIP
388 #define CONFIG_RM67191 392 #define CONFIG_RM67191
389 #endif 393 #endif
390 394
391 #define CONFIG_OF_SYSTEM_SETUP 395 #define CONFIG_OF_SYSTEM_SETUP
392 396
393 #if defined(CONFIG_ANDROID_SUPPORT) 397 #if defined(CONFIG_ANDROID_SUPPORT)
394 #include "imx8mm_evk_android.h" 398 #include "imx8mm_evk_android.h"
395 #endif 399 #endif
396 #endif 400 #endif
397 401
include/configs/imx8mq_arm2.h
Diff comments   View file @ 48d58d0
1 /* 1 /*
2 * Copyright 2017 NXP 2 * Copyright 2017 NXP
3 * 3 *
4 * SPDX-License-Identifier: GPL-2.0+ 4 * SPDX-License-Identifier: GPL-2.0+
5 */ 5 */
6 6
7 #ifndef __IMX8M_ARM2_H 7 #ifndef __IMX8M_ARM2_H
8 #define __IMX8M_ARM2_H 8 #define __IMX8M_ARM2_H
9 9
10 #include <linux/sizes.h> 10 #include <linux/sizes.h>
11 #include <asm/arch/imx-regs.h> 11 #include <asm/arch/imx-regs.h>
12 #include "imx_env.h" 12 #include "imx_env.h"
13 13
14 #ifdef CONFIG_SECURE_BOOT 14 #ifdef CONFIG_SECURE_BOOT
15 #define CONFIG_CSF_SIZE 0x2000 /* 8K region */ 15 #define CONFIG_CSF_SIZE 0x2000 /* 8K region */
16 #endif 16 #endif
17 17
18 #define CONFIG_SPL_TEXT_BASE 0x7E1000 18 #define CONFIG_SPL_TEXT_BASE 0x7E1000
19 #define CONFIG_SPL_MAX_SIZE (148 * 1024) 19 #define CONFIG_SPL_MAX_SIZE (148 * 1024)
20 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 20 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
21 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR 21 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
22 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 22 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
23 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 23 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
24 24
25 #ifdef CONFIG_SPL_BUILD 25 #ifdef CONFIG_SPL_BUILD
26 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ 26 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
27 #define CONFIG_SPL_WATCHDOG_SUPPORT 27 #define CONFIG_SPL_WATCHDOG_SUPPORT
28 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT 28 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
29 #define CONFIG_SPL_POWER_SUPPORT 29 #define CONFIG_SPL_POWER_SUPPORT
30 #define CONFIG_SPL_I2C_SUPPORT 30 #define CONFIG_SPL_I2C_SUPPORT
31 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" 31 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
32 #define CONFIG_SPL_STACK 0x187FF0 32 #define CONFIG_SPL_STACK 0x187FF0
33 #define CONFIG_SPL_LIBCOMMON_SUPPORT 33 #define CONFIG_SPL_LIBCOMMON_SUPPORT
34 #define CONFIG_SPL_LIBGENERIC_SUPPORT 34 #define CONFIG_SPL_LIBGENERIC_SUPPORT
35 #define CONFIG_SPL_SERIAL_SUPPORT 35 #define CONFIG_SPL_SERIAL_SUPPORT
36 #define CONFIG_SPL_GPIO_SUPPORT 36 #define CONFIG_SPL_GPIO_SUPPORT
37 #define CONFIG_SPL_MMC_SUPPORT 37 #define CONFIG_SPL_MMC_SUPPORT
38 #define CONFIG_SPL_BSS_START_ADDR 0x00180000 38 #define CONFIG_SPL_BSS_START_ADDR 0x00180000
39 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ 39 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
40 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 40 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
41 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ 41 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
42 #define CONFIG_SYS_ICACHE_OFF 42 #define CONFIG_SYS_ICACHE_OFF
43 #define CONFIG_SYS_DCACHE_OFF 43 #define CONFIG_SYS_DCACHE_OFF
44 44
45 #define CONFIG_MALLOC_F_ADDR 0x182000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ 45 #define CONFIG_MALLOC_F_ADDR 0x182000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
46 46
47 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ 47 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
48 48
49 #undef CONFIG_DM_MMC 49 #undef CONFIG_DM_MMC
50 #undef CONFIG_DM_PMIC 50 #undef CONFIG_DM_PMIC
51 #undef CONFIG_DM_PMIC_PFUZE100 51 #undef CONFIG_DM_PMIC_PFUZE100
52 52
53 #define CONFIG_SYS_I2C 53 #define CONFIG_SYS_I2C
54 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 54 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
55 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 55 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
56 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 56 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
57 57
58 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 58 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
59 59
60 #define CONFIG_POWER 60 #define CONFIG_POWER
61 #define CONFIG_POWER_I2C 61 #define CONFIG_POWER_I2C
62 #define CONFIG_POWER_PFUZE100 62 #define CONFIG_POWER_PFUZE100
63 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 63 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
64 64
65 #if defined(CONFIG_NAND_BOOT) 65 #if defined(CONFIG_NAND_BOOT)
66 #define CONFIG_SPL_NAND_SUPPORT 66 #define CONFIG_SPL_NAND_SUPPORT
67 #define CONFIG_SPL_DMA_SUPPORT 67 #define CONFIG_SPL_DMA_SUPPORT
68 #define CONFIG_SPL_NAND_MXS 68 #define CONFIG_SPL_NAND_MXS
69 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4000000 /* Put the FIT out of first 64MB boot area */ 69 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4000000 /* Put the FIT out of first 64MB boot area */
70
71 /* Set a redundant offset in nand FIT mtdpart. The new uuu will burn full boot image (not only FIT part) to the mtdpart, so we check both two offsets */
72 #define CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND \
73 (CONFIG_SYS_NAND_U_BOOT_OFFS + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8400)
70 #endif 74 #endif
71 75
72 #endif /* CONFIG_SPL_BUILD*/ 76 #endif /* CONFIG_SPL_BUILD*/
73 77
74 #define CONFIG_REMAKE_ELF 78 #define CONFIG_REMAKE_ELF
75 79
76 #define CONFIG_BOARD_EARLY_INIT_F 80 #define CONFIG_BOARD_EARLY_INIT_F
77 #define CONFIG_BOARD_POSTCLK_INIT 81 #define CONFIG_BOARD_POSTCLK_INIT
78 #define CONFIG_BOARD_LATE_INIT 82 #define CONFIG_BOARD_LATE_INIT
79 83
80 /* Flat Device Tree Definitions */ 84 /* Flat Device Tree Definitions */
81 #define CONFIG_OF_BOARD_SETUP 85 #define CONFIG_OF_BOARD_SETUP
82 86
83 #undef CONFIG_CMD_EXPORTENV 87 #undef CONFIG_CMD_EXPORTENV
84 #undef CONFIG_CMD_IMPORTENV 88 #undef CONFIG_CMD_IMPORTENV
85 #undef CONFIG_CMD_IMLS 89 #undef CONFIG_CMD_IMLS
86 90
87 #undef CONFIG_CMD_CRC32 91 #undef CONFIG_CMD_CRC32
88 #undef CONFIG_BOOTM_NETBSD 92 #undef CONFIG_BOOTM_NETBSD
89 93
90 /* ENET Config */ 94 /* ENET Config */
91 /* ENET1 */ 95 /* ENET1 */
92 #if defined(CONFIG_CMD_NET) 96 #if defined(CONFIG_CMD_NET)
93 #define CONFIG_CMD_PING 97 #define CONFIG_CMD_PING
94 #define CONFIG_CMD_DHCP 98 #define CONFIG_CMD_DHCP
95 #define CONFIG_CMD_MII 99 #define CONFIG_CMD_MII
96 #define CONFIG_MII 100 #define CONFIG_MII
97 #define CONFIG_ETHPRIME "FEC" 101 #define CONFIG_ETHPRIME "FEC"
98 102
99 #define CONFIG_FEC_MXC 103 #define CONFIG_FEC_MXC
100 #define FEC_QUIRK_ENET_MAC 104 #define FEC_QUIRK_ENET_MAC
101 105
102 #define IMX_FEC_BASE 0x30BE0000 106 #define IMX_FEC_BASE 0x30BE0000
103 107
104 #define CONFIG_PHYLIB 108 #define CONFIG_PHYLIB
105 109
106 #ifdef CONFIG_TARGET_IMX8MQ_DDR3L_ARM2 110 #ifdef CONFIG_TARGET_IMX8MQ_DDR3L_ARM2
107 #define CONFIG_FEC_XCV_TYPE RMII 111 #define CONFIG_FEC_XCV_TYPE RMII
108 #define CONFIG_PHY_REALTEK 112 #define CONFIG_PHY_REALTEK
109 #define CONFIG_FEC_MXC_PHYADDR 3 113 #define CONFIG_FEC_MXC_PHYADDR 3
110 #else 114 #else
111 #define CONFIG_FEC_MXC_PHYADDR 0 115 #define CONFIG_FEC_MXC_PHYADDR 0
112 #define CONFIG_FEC_XCV_TYPE RGMII 116 #define CONFIG_FEC_XCV_TYPE RGMII
113 #define CONFIG_PHY_ATHEROS 117 #define CONFIG_PHY_ATHEROS
114 #define CONFIG_PHY_GIGE 118 #define CONFIG_PHY_GIGE
115 #endif 119 #endif
116 120
117 #endif 121 #endif
118 122
119 #ifdef CONFIG_NAND_BOOT 123 #ifdef CONFIG_NAND_BOOT
120 #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(nandboot),16m(nandfit),32m(nandkernel),16m(nanddtb),8m(nandtee),-(nandrootfs) " 124 #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(nandboot),16m(nandfit),32m(nandkernel),16m(nanddtb),8m(nandtee),-(nandrootfs) "
121 #endif 125 #endif
122 126
123 #define CONFIG_MFG_ENV_SETTINGS \ 127 #define CONFIG_MFG_ENV_SETTINGS \
124 CONFIG_MFG_ENV_SETTINGS_DEFAULT \ 128 CONFIG_MFG_ENV_SETTINGS_DEFAULT \
125 "initrd_addr=0x43800000\0" \ 129 "initrd_addr=0x43800000\0" \
126 "initrd_high=0xffffffffffffffff\0" \ 130 "initrd_high=0xffffffffffffffff\0" \
127 "emmc_dev=0\0"\ 131 "emmc_dev=0\0"\
128 "sd_dev=1\0" \ 132 "sd_dev=1\0" \
129 133
130 /* Initial environment variables */ 134 /* Initial environment variables */
131 #if defined(CONFIG_NAND_BOOT) 135 #if defined(CONFIG_NAND_BOOT)
132 #define CONFIG_EXTRA_ENV_SETTINGS \ 136 #define CONFIG_EXTRA_ENV_SETTINGS \
133 CONFIG_MFG_ENV_SETTINGS \ 137 CONFIG_MFG_ENV_SETTINGS \
134 "fdt_addr=0x43000000\0" \ 138 "fdt_addr=0x43000000\0" \
135 "fdt_high=0xffffffffffffffff\0" \ 139 "fdt_high=0xffffffffffffffff\0" \
136 "mtdparts=" MFG_NAND_PARTITION "\0" \ 140 "mtdparts=" MFG_NAND_PARTITION "\0" \
137 "console=ttymxc0,115200 earlycon=ec_imx6q,0x30860000,115200\0" \ 141 "console=ttymxc0,115200 earlycon=ec_imx6q,0x30860000,115200\0" \
138 "bootargs=console=ttymxc0,115200 earlycon=ec_imx6q,0x30860000,115200 ubi.mtd=5 " \ 142 "bootargs=console=ttymxc0,115200 earlycon=ec_imx6q,0x30860000,115200 ubi.mtd=5 " \
139 "root=ubi0:rootfs rootfstype=ubifs " \ 143 "root=ubi0:rootfs rootfstype=ubifs " \
140 MFG_NAND_PARTITION \ 144 MFG_NAND_PARTITION \
141 "\0" \ 145 "\0" \
142 "bootcmd=nand read ${loadaddr} 0x5000000 0x2000000;"\ 146 "bootcmd=nand read ${loadaddr} 0x5000000 0x2000000;"\
143 "nand read ${fdt_addr} 0x7000000 0x100000;"\ 147 "nand read ${fdt_addr} 0x7000000 0x100000;"\
144 "booti ${loadaddr} - ${fdt_addr}" 148 "booti ${loadaddr} - ${fdt_addr}"
145 149
146 #else 150 #else
147 #define CONFIG_EXTRA_ENV_SETTINGS \ 151 #define CONFIG_EXTRA_ENV_SETTINGS \
148 CONFIG_MFG_ENV_SETTINGS \ 152 CONFIG_MFG_ENV_SETTINGS \
149 "script=boot.scr\0" \ 153 "script=boot.scr\0" \
150 "image=Image\0" \ 154 "image=Image\0" \
151 "console=ttymxc0,115200 earlycon=ec_imx6q,0x30860000,115200\0" \ 155 "console=ttymxc0,115200 earlycon=ec_imx6q,0x30860000,115200\0" \
152 "fdt_addr=0x43000000\0" \ 156 "fdt_addr=0x43000000\0" \
153 "fdt_high=0xffffffffffffffff\0" \ 157 "fdt_high=0xffffffffffffffff\0" \
154 "boot_fdt=try\0" \ 158 "boot_fdt=try\0" \
155 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ 159 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
156 "initrd_addr=0x43800000\0" \ 160 "initrd_addr=0x43800000\0" \
157 "initrd_high=0xffffffffffffffff\0" \ 161 "initrd_high=0xffffffffffffffff\0" \
158 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 162 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
159 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 163 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
160 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 164 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
161 "mmcautodetect=yes\0" \ 165 "mmcautodetect=yes\0" \
162 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ 166 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
163 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 167 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
164 "bootscript=echo Running bootscript from mmc ...; " \ 168 "bootscript=echo Running bootscript from mmc ...; " \
165 "source\0" \ 169 "source\0" \
166 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 170 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
167 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 171 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
168 "mmcboot=echo Booting from mmc ...; " \ 172 "mmcboot=echo Booting from mmc ...; " \
169 "run mmcargs; " \ 173 "run mmcargs; " \
170 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 174 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
171 "if run loadfdt; then " \ 175 "if run loadfdt; then " \
172 "booti ${loadaddr} - ${fdt_addr}; " \ 176 "booti ${loadaddr} - ${fdt_addr}; " \
173 "else " \ 177 "else " \
174 "echo WARN: Cannot load the DT; " \ 178 "echo WARN: Cannot load the DT; " \
175 "fi; " \ 179 "fi; " \
176 "else " \ 180 "else " \
177 "echo wait for boot; " \ 181 "echo wait for boot; " \
178 "fi;\0" \ 182 "fi;\0" \
179 "netargs=setenv bootargs console=${console} " \ 183 "netargs=setenv bootargs console=${console} " \
180 "root=/dev/nfs " \ 184 "root=/dev/nfs " \
181 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 185 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
182 "netboot=echo Booting from net ...; " \ 186 "netboot=echo Booting from net ...; " \
183 "run netargs; " \ 187 "run netargs; " \
184 "if test ${ip_dyn} = yes; then " \ 188 "if test ${ip_dyn} = yes; then " \
185 "setenv get_cmd dhcp; " \ 189 "setenv get_cmd dhcp; " \
186 "else " \ 190 "else " \
187 "setenv get_cmd tftp; " \ 191 "setenv get_cmd tftp; " \
188 "fi; " \ 192 "fi; " \
189 "${get_cmd} ${loadaddr} ${image}; " \ 193 "${get_cmd} ${loadaddr} ${image}; " \
190 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 194 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
191 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 195 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
192 "booti ${loadaddr} - ${fdt_addr}; " \ 196 "booti ${loadaddr} - ${fdt_addr}; " \
193 "else " \ 197 "else " \
194 "echo WARN: Cannot load the DT; " \ 198 "echo WARN: Cannot load the DT; " \
195 "fi; " \ 199 "fi; " \
196 "else " \ 200 "else " \
197 "booti; " \ 201 "booti; " \
198 "fi;\0" 202 "fi;\0"
199 203
200 #define CONFIG_BOOTCOMMAND \ 204 #define CONFIG_BOOTCOMMAND \
201 "mmc dev ${mmcdev}; if mmc rescan; then " \ 205 "mmc dev ${mmcdev}; if mmc rescan; then " \
202 "if run loadbootscript; then " \ 206 "if run loadbootscript; then " \
203 "run bootscript; " \ 207 "run bootscript; " \
204 "else " \ 208 "else " \
205 "if run loadimage; then " \ 209 "if run loadimage; then " \
206 "run mmcboot; " \ 210 "run mmcboot; " \
207 "else run netboot; " \ 211 "else run netboot; " \
208 "fi; " \ 212 "fi; " \
209 "fi; " \ 213 "fi; " \
210 "else booti ${loadaddr} - ${fdt_addr}; fi" 214 "else booti ${loadaddr} - ${fdt_addr}; fi"
211 #endif 215 #endif
212 216
213 /* Link Definitions */ 217 /* Link Definitions */
214 #define CONFIG_LOADADDR 0x40480000 218 #define CONFIG_LOADADDR 0x40480000
215 219
216 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 220 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
217 221
218 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 222 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
219 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 223 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
220 #define CONFIG_SYS_INIT_SP_OFFSET \ 224 #define CONFIG_SYS_INIT_SP_OFFSET \
221 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 225 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
222 #define CONFIG_SYS_INIT_SP_ADDR \ 226 #define CONFIG_SYS_INIT_SP_ADDR \
223 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 227 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
224 228
225 229
226 #define CONFIG_ENV_SIZE 0x1000 230 #define CONFIG_ENV_SIZE 0x1000
227 #ifdef CONFIG_NAND_BOOT 231 #ifdef CONFIG_NAND_BOOT
228 #define CONFIG_ENV_OFFSET (60 << 20) 232 #define CONFIG_ENV_OFFSET (60 << 20)
229 #else 233 #else
230 #define CONFIG_ENV_OVERWRITE 234 #define CONFIG_ENV_OVERWRITE
231 #define CONFIG_ENV_OFFSET (64 * SZ_64K) 235 #define CONFIG_ENV_OFFSET (64 * SZ_64K)
232 #endif 236 #endif
233 237
234 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ 238 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
235 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ 239 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
236 240
237 /* Size of malloc() pool */ 241 /* Size of malloc() pool */
238 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024)) * 1024) 242 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024)) * 1024)
239 243
240 #define CONFIG_SYS_SDRAM_BASE 0x40000000 244 #define CONFIG_SYS_SDRAM_BASE 0x40000000
241 #define PHYS_SDRAM 0x40000000 245 #define PHYS_SDRAM 0x40000000
242 #ifdef CONFIG_TARGET_IMX8MQ_DDR3L_ARM2 246 #ifdef CONFIG_TARGET_IMX8MQ_DDR3L_ARM2
243 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR3L for two rank */ 247 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR3L for two rank */
244 #define CONFIG_NR_DRAM_BANKS 1 248 #define CONFIG_NR_DRAM_BANKS 1
245 #else 249 #else
246 #define PHYS_SDRAM_SIZE 0xc0000000 /* 3GB */ 250 #define PHYS_SDRAM_SIZE 0xc0000000 /* 3GB */
247 #define PHYS_SDRAM_2 0x100000000 251 #define PHYS_SDRAM_2 0x100000000
248 #define PHYS_SDRAM_2_SIZE 0x40000000 /* 1GB */ 252 #define PHYS_SDRAM_2_SIZE 0x40000000 /* 1GB */
249 #define CONFIG_NR_DRAM_BANKS 2 253 #define CONFIG_NR_DRAM_BANKS 2
250 #endif 254 #endif
251 255
252 256
253 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 257 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
254 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) 258 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
255 259
256 #define CONFIG_BAUDRATE 115200 260 #define CONFIG_BAUDRATE 115200
257 261
258 #define CONFIG_MXC_UART 262 #define CONFIG_MXC_UART
259 #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR 263 #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
260 264
261 /* Monitor Command Prompt */ 265 /* Monitor Command Prompt */
262 #undef CONFIG_SYS_PROMPT 266 #undef CONFIG_SYS_PROMPT
263 #define CONFIG_SYS_PROMPT "u-boot=> " 267 #define CONFIG_SYS_PROMPT "u-boot=> "
264 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 268 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
265 #define CONFIG_SYS_CBSIZE 1024 269 #define CONFIG_SYS_CBSIZE 1024
266 #define CONFIG_SYS_MAXARGS 64 270 #define CONFIG_SYS_MAXARGS 64
267 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 271 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
268 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 272 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
269 sizeof(CONFIG_SYS_PROMPT) + 16) 273 sizeof(CONFIG_SYS_PROMPT) + 16)
270 274
271 #define CONFIG_IMX_BOOTAUX 275 #define CONFIG_IMX_BOOTAUX
272 276
273 #define CONFIG_CMD_MMC 277 #define CONFIG_CMD_MMC
274 #define CONFIG_FSL_ESDHC 278 #define CONFIG_FSL_ESDHC
275 #define CONFIG_FSL_USDHC 279 #define CONFIG_FSL_USDHC
276 280
277 #define CONFIG_SYS_FSL_USDHC_NUM 2 281 #define CONFIG_SYS_FSL_USDHC_NUM 2
278 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 282 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
279 283
280 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 284 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
281 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 285 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
282 286
283 #ifdef CONFIG_FSL_QSPI 287 #ifdef CONFIG_FSL_QSPI
284 #define CONFIG_CMD_SF 288 #define CONFIG_CMD_SF
285 #define CONFIG_SPI_FLASH 289 #define CONFIG_SPI_FLASH
286 #define CONFIG_SPI_FLASH_GIGADEVICE 290 #define CONFIG_SPI_FLASH_GIGADEVICE
287 #define CONFIG_SF_DEFAULT_BUS 0 291 #define CONFIG_SF_DEFAULT_BUS 0
288 #define CONFIG_SF_DEFAULT_CS 1 292 #define CONFIG_SF_DEFAULT_CS 1
289 #define CONFIG_SF_DEFAULT_SPEED 40000000 293 #define CONFIG_SF_DEFAULT_SPEED 40000000
290 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 294 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
291 295
292 #define FSL_QSPI_FLASH_SIZE (SZ_2M) 296 #define FSL_QSPI_FLASH_SIZE (SZ_2M)
293 #define FSL_QSPI_FLASH_NUM 2 297 #define FSL_QSPI_FLASH_NUM 2
294 #endif 298 #endif
295 299
296 #define CONFIG_MXC_GPIO 300 #define CONFIG_MXC_GPIO
297 301
298 #define CONFIG_MXC_OCOTP 302 #define CONFIG_MXC_OCOTP
299 #define CONFIG_CMD_FUSE 303 #define CONFIG_CMD_FUSE
300 304
301 /* I2C Configs */ 305 /* I2C Configs */
302 #define CONFIG_SYS_I2C_SPEED 100000 306 #define CONFIG_SYS_I2C_SPEED 100000
303 307
304 #ifdef CONFIG_CMD_NAND 308 #ifdef CONFIG_CMD_NAND
305 #define CONFIG_NAND_MXS 309 #define CONFIG_NAND_MXS
306 #define CONFIG_CMD_NAND_TRIMFFS 310 #define CONFIG_CMD_NAND_TRIMFFS
307 311
308 /* NAND stuff */ 312 /* NAND stuff */
309 #define CONFIG_SYS_MAX_NAND_DEVICE 1 313 #define CONFIG_SYS_MAX_NAND_DEVICE 1
310 #define CONFIG_SYS_NAND_BASE 0x20000000 314 #define CONFIG_SYS_NAND_BASE 0x20000000
311 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 315 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
312 #define CONFIG_SYS_NAND_ONFI_DETECTION 316 #define CONFIG_SYS_NAND_ONFI_DETECTION
313 317
314 /* DMA stuff, needed for GPMI/MXS NAND support */ 318 /* DMA stuff, needed for GPMI/MXS NAND support */
315 #define CONFIG_APBH_DMA 319 #define CONFIG_APBH_DMA
316 #define CONFIG_APBH_DMA_BURST 320 #define CONFIG_APBH_DMA_BURST
317 #define CONFIG_APBH_DMA_BURST8 321 #define CONFIG_APBH_DMA_BURST8
318 322
319 #ifdef CONFIG_CMD_UBI 323 #ifdef CONFIG_CMD_UBI
320 #define CONFIG_MTD_PARTITIONS 324 #define CONFIG_MTD_PARTITIONS
321 #define CONFIG_MTD_DEVICE 325 #define CONFIG_MTD_DEVICE
322 #endif 326 #endif
323 327
324 #endif 328 #endif
325 329
326 /* USB configs */ 330 /* USB configs */
327 #ifndef CONFIG_SPL_BUILD 331 #ifndef CONFIG_SPL_BUILD
328 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 332 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
329 333
330 #define CONFIG_CMD_USB 334 #define CONFIG_CMD_USB
331 #define CONFIG_USB_STORAGE 335 #define CONFIG_USB_STORAGE
332 336
333 #define CONFIG_USBD_HS 337 #define CONFIG_USBD_HS
334 338
335 #define CONFIG_CMD_USB_MASS_STORAGE 339 #define CONFIG_CMD_USB_MASS_STORAGE
336 #define CONFIG_USB_GADGET_MASS_STORAGE 340 #define CONFIG_USB_GADGET_MASS_STORAGE
337 #define CONFIG_USB_GADGET_VBUS_DRAW 2 341 #define CONFIG_USB_GADGET_VBUS_DRAW 2
338 #define CONFIG_USB_FUNCTION_MASS_STORAGE 342 #define CONFIG_USB_FUNCTION_MASS_STORAGE
339 343
340 #endif 344 #endif
341 345
342 #define CONFIG_SERIAL_TAG 346 #define CONFIG_SERIAL_TAG
343 #define CONFIG_FASTBOOT_USB_DEV 0 347 #define CONFIG_FASTBOOT_USB_DEV 0
344 348
345 #define CONFIG_OF_SYSTEM_SETUP 349 #define CONFIG_OF_SYSTEM_SETUP
346 350
347 #endif 351 #endif
348 352