Eric Lee / smarc-uboot

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Commit 4a377552f01b7b19ea5fc02eb844c786751f7247

Authored by Masahiro Yamada
Committed by Tom Rini
1 parent 331b45fb70
Exists in master and in 49 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

kbuild: Move linker sciript check to prepare1 

Same as the previous commit.
Move sanity check to prepare1 target to avoid nasty troubles.

Before this commit, LDSCRIPT existence was not checked
when it was specified by CONFIG_SYS_LDSCRIPT.
Now LDSCRIPT existence is checked for all boards.

$(wildcard $(LDSCRIPT)) must point to the linker scripts
with absolute path.
Otherwise, make will terminate with a false error
on out-of-tree build.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

Showing 6 changed files with 10 additions and 9 deletions Inline Diff

1 # 1 #
2 # (C) Copyright 2000-2013 2 # (C) Copyright 2000-2013
3 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. 3 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 # 4 #
5 # SPDX-License-Identifier: GPL-2.0+ 5 # SPDX-License-Identifier: GPL-2.0+
6 # 6 #
7 7
8 VERSION = 2014 8 VERSION = 2014
9 PATCHLEVEL = 04 9 PATCHLEVEL = 04
10 SUBLEVEL = 10 SUBLEVEL =
11 EXTRAVERSION = -rc1 11 EXTRAVERSION = -rc1
12 NAME = 12 NAME =
13 13
14 # *DOCUMENTATION* 14 # *DOCUMENTATION*
15 # To see a list of typical targets execute "make help" 15 # To see a list of typical targets execute "make help"
16 # More info can be located in ./README 16 # More info can be located in ./README
17 # Comments in this file are targeted only to the developer, do not 17 # Comments in this file are targeted only to the developer, do not
18 # expect to learn how to build the kernel reading this file. 18 # expect to learn how to build the kernel reading this file.
19 19
20 # Do not: 20 # Do not:
21 # o use make's built-in rules and variables 21 # o use make's built-in rules and variables
22 # (this increases performance and avoids hard-to-debug behaviour); 22 # (this increases performance and avoids hard-to-debug behaviour);
23 # o print "Entering directory ..."; 23 # o print "Entering directory ...";
24 MAKEFLAGS += -rR --no-print-directory 24 MAKEFLAGS += -rR --no-print-directory
25 25
26 # Avoid funny character set dependencies 26 # Avoid funny character set dependencies
27 unexport LC_ALL 27 unexport LC_ALL
28 LC_COLLATE=C 28 LC_COLLATE=C
29 LC_NUMERIC=C 29 LC_NUMERIC=C
30 export LC_COLLATE LC_NUMERIC 30 export LC_COLLATE LC_NUMERIC
31 31
32 # We are using a recursive build, so we need to do a little thinking 32 # We are using a recursive build, so we need to do a little thinking
33 # to get the ordering right. 33 # to get the ordering right.
34 # 34 #
35 # Most importantly: sub-Makefiles should only ever modify files in 35 # Most importantly: sub-Makefiles should only ever modify files in
36 # their own directory. If in some directory we have a dependency on 36 # their own directory. If in some directory we have a dependency on
37 # a file in another dir (which doesn't happen often, but it's often 37 # a file in another dir (which doesn't happen often, but it's often
38 # unavoidable when linking the built-in.o targets which finally 38 # unavoidable when linking the built-in.o targets which finally
39 # turn into vmlinux), we will call a sub make in that other dir, and 39 # turn into vmlinux), we will call a sub make in that other dir, and
40 # after that we are sure that everything which is in that other dir 40 # after that we are sure that everything which is in that other dir
41 # is now up to date. 41 # is now up to date.
42 # 42 #
43 # The only cases where we need to modify files which have global 43 # The only cases where we need to modify files which have global
44 # effects are thus separated out and done before the recursive 44 # effects are thus separated out and done before the recursive
45 # descending is started. They are now explicitly listed as the 45 # descending is started. They are now explicitly listed as the
46 # prepare rule. 46 # prepare rule.
47 47
48 # To put more focus on warnings, be less verbose as default 48 # To put more focus on warnings, be less verbose as default
49 # Use 'make V=1' to see the full commands 49 # Use 'make V=1' to see the full commands
50 50
51 ifeq ("$(origin V)", "command line") 51 ifeq ("$(origin V)", "command line")
52 KBUILD_VERBOSE = $(V) 52 KBUILD_VERBOSE = $(V)
53 endif 53 endif
54 ifndef KBUILD_VERBOSE 54 ifndef KBUILD_VERBOSE
55 KBUILD_VERBOSE = 0 55 KBUILD_VERBOSE = 0
56 endif 56 endif
57 57
58 # Call a source code checker (by default, "sparse") as part of the 58 # Call a source code checker (by default, "sparse") as part of the
59 # C compilation. 59 # C compilation.
60 # 60 #
61 # Use 'make C=1' to enable checking of only re-compiled files. 61 # Use 'make C=1' to enable checking of only re-compiled files.
62 # Use 'make C=2' to enable checking of *all* source files, regardless 62 # Use 'make C=2' to enable checking of *all* source files, regardless
63 # of whether they are re-compiled or not. 63 # of whether they are re-compiled or not.
64 # 64 #
65 # See the file "Documentation/sparse.txt" for more details, including 65 # See the file "Documentation/sparse.txt" for more details, including
66 # where to get the "sparse" utility. 66 # where to get the "sparse" utility.
67 67
68 ifeq ("$(origin C)", "command line") 68 ifeq ("$(origin C)", "command line")
69 KBUILD_CHECKSRC = $(C) 69 KBUILD_CHECKSRC = $(C)
70 endif 70 endif
71 ifndef KBUILD_CHECKSRC 71 ifndef KBUILD_CHECKSRC
72 KBUILD_CHECKSRC = 0 72 KBUILD_CHECKSRC = 0
73 endif 73 endif
74 74
75 # Use make M=dir to specify directory of external module to build 75 # Use make M=dir to specify directory of external module to build
76 # Old syntax make ... SUBDIRS=$PWD is still supported 76 # Old syntax make ... SUBDIRS=$PWD is still supported
77 # Setting the environment variable KBUILD_EXTMOD take precedence 77 # Setting the environment variable KBUILD_EXTMOD take precedence
78 ifdef SUBDIRS 78 ifdef SUBDIRS
79 KBUILD_EXTMOD ?= $(SUBDIRS) 79 KBUILD_EXTMOD ?= $(SUBDIRS)
80 endif 80 endif
81 81
82 ifeq ("$(origin M)", "command line") 82 ifeq ("$(origin M)", "command line")
83 KBUILD_EXTMOD := $(M) 83 KBUILD_EXTMOD := $(M)
84 endif 84 endif
85 85
86 # kbuild supports saving output files in a separate directory. 86 # kbuild supports saving output files in a separate directory.
87 # To locate output files in a separate directory two syntaxes are supported. 87 # To locate output files in a separate directory two syntaxes are supported.
88 # In both cases the working directory must be the root of the kernel src. 88 # In both cases the working directory must be the root of the kernel src.
89 # 1) O= 89 # 1) O=
90 # Use "make O=dir/to/store/output/files/" 90 # Use "make O=dir/to/store/output/files/"
91 # 91 #
92 # 2) Set KBUILD_OUTPUT 92 # 2) Set KBUILD_OUTPUT
93 # Set the environment variable KBUILD_OUTPUT to point to the directory 93 # Set the environment variable KBUILD_OUTPUT to point to the directory
94 # where the output files shall be placed. 94 # where the output files shall be placed.
95 # export KBUILD_OUTPUT=dir/to/store/output/files/ 95 # export KBUILD_OUTPUT=dir/to/store/output/files/
96 # make 96 # make
97 # 97 #
98 # The O= assignment takes precedence over the KBUILD_OUTPUT environment 98 # The O= assignment takes precedence over the KBUILD_OUTPUT environment
99 # variable. 99 # variable.
100 100
101 101
102 # KBUILD_SRC is set on invocation of make in OBJ directory 102 # KBUILD_SRC is set on invocation of make in OBJ directory
103 # KBUILD_SRC is not intended to be used by the regular user (for now) 103 # KBUILD_SRC is not intended to be used by the regular user (for now)
104 ifeq ($(KBUILD_SRC),) 104 ifeq ($(KBUILD_SRC),)
105 105
106 # OK, Make called in directory where kernel src resides 106 # OK, Make called in directory where kernel src resides
107 # Do we want to locate output files in a separate directory? 107 # Do we want to locate output files in a separate directory?
108 ifeq ("$(origin O)", "command line") 108 ifeq ("$(origin O)", "command line")
109 KBUILD_OUTPUT := $(O) 109 KBUILD_OUTPUT := $(O)
110 endif 110 endif
111 111
112 ifeq ("$(origin W)", "command line") 112 ifeq ("$(origin W)", "command line")
113 export KBUILD_ENABLE_EXTRA_GCC_CHECKS := $(W) 113 export KBUILD_ENABLE_EXTRA_GCC_CHECKS := $(W)
114 endif 114 endif
115 115
116 # That's our default target when none is given on the command line 116 # That's our default target when none is given on the command line
117 PHONY := _all 117 PHONY := _all
118 _all: 118 _all:
119 119
120 # Cancel implicit rules on top Makefile 120 # Cancel implicit rules on top Makefile
121 $(CURDIR)/Makefile Makefile: ; 121 $(CURDIR)/Makefile Makefile: ;
122 122
123 ifneq ($(KBUILD_OUTPUT),) 123 ifneq ($(KBUILD_OUTPUT),)
124 # Invoke a second make in the output directory, passing relevant variables 124 # Invoke a second make in the output directory, passing relevant variables
125 # check that the output directory actually exists 125 # check that the output directory actually exists
126 saved-output := $(KBUILD_OUTPUT) 126 saved-output := $(KBUILD_OUTPUT)
127 KBUILD_OUTPUT := $(shell cd $(KBUILD_OUTPUT) && /bin/pwd) 127 KBUILD_OUTPUT := $(shell cd $(KBUILD_OUTPUT) && /bin/pwd)
128 $(if $(KBUILD_OUTPUT),, \ 128 $(if $(KBUILD_OUTPUT),, \
129 $(error output directory "$(saved-output)" does not exist)) 129 $(error output directory "$(saved-output)" does not exist))
130 130
131 PHONY += $(MAKECMDGOALS) sub-make 131 PHONY += $(MAKECMDGOALS) sub-make
132 132
133 $(filter-out _all sub-make $(CURDIR)/Makefile, $(MAKECMDGOALS)) _all: sub-make 133 $(filter-out _all sub-make $(CURDIR)/Makefile, $(MAKECMDGOALS)) _all: sub-make
134 @: 134 @:
135 135
136 sub-make: FORCE 136 sub-make: FORCE
137 $(if $(KBUILD_VERBOSE:1=),@)$(MAKE) -C $(KBUILD_OUTPUT) \ 137 $(if $(KBUILD_VERBOSE:1=),@)$(MAKE) -C $(KBUILD_OUTPUT) \
138 KBUILD_SRC=$(CURDIR) \ 138 KBUILD_SRC=$(CURDIR) \
139 KBUILD_EXTMOD="$(KBUILD_EXTMOD)" -f $(CURDIR)/Makefile \ 139 KBUILD_EXTMOD="$(KBUILD_EXTMOD)" -f $(CURDIR)/Makefile \
140 $(filter-out _all sub-make,$(MAKECMDGOALS)) 140 $(filter-out _all sub-make,$(MAKECMDGOALS))
141 141
142 # Leave processing to above invocation of make 142 # Leave processing to above invocation of make
143 skip-makefile := 1 143 skip-makefile := 1
144 endif # ifneq ($(KBUILD_OUTPUT),) 144 endif # ifneq ($(KBUILD_OUTPUT),)
145 endif # ifeq ($(KBUILD_SRC),) 145 endif # ifeq ($(KBUILD_SRC),)
146 146
147 # We process the rest of the Makefile if this is the final invocation of make 147 # We process the rest of the Makefile if this is the final invocation of make
148 ifeq ($(skip-makefile),) 148 ifeq ($(skip-makefile),)
149 149
150 # If building an external module we do not care about the all: rule 150 # If building an external module we do not care about the all: rule
151 # but instead _all depend on modules 151 # but instead _all depend on modules
152 PHONY += all 152 PHONY += all
153 ifeq ($(KBUILD_EXTMOD),) 153 ifeq ($(KBUILD_EXTMOD),)
154 _all: all 154 _all: all
155 else 155 else
156 _all: modules 156 _all: modules
157 endif 157 endif
158 158
159 srctree := $(if $(KBUILD_SRC),$(KBUILD_SRC),$(CURDIR)) 159 srctree := $(if $(KBUILD_SRC),$(KBUILD_SRC),$(CURDIR))
160 objtree := $(CURDIR) 160 objtree := $(CURDIR)
161 src := $(srctree) 161 src := $(srctree)
162 obj := $(objtree) 162 obj := $(objtree)
163 163
164 VPATH := $(srctree)$(if $(KBUILD_EXTMOD),:$(KBUILD_EXTMOD)) 164 VPATH := $(srctree)$(if $(KBUILD_EXTMOD),:$(KBUILD_EXTMOD))
165 165
166 export srctree objtree VPATH 166 export srctree objtree VPATH
167 167
168 OBJTREE := $(objtree) 168 OBJTREE := $(objtree)
169 SPLTREE := $(OBJTREE)/spl 169 SPLTREE := $(OBJTREE)/spl
170 TPLTREE := $(OBJTREE)/tpl 170 TPLTREE := $(OBJTREE)/tpl
171 SRCTREE := $(srctree) 171 SRCTREE := $(srctree)
172 TOPDIR := $(SRCTREE) 172 TOPDIR := $(SRCTREE)
173 export TOPDIR SRCTREE OBJTREE SPLTREE TPLTREE 173 export TOPDIR SRCTREE OBJTREE SPLTREE TPLTREE
174 174
175 MKCONFIG := $(SRCTREE)/mkconfig 175 MKCONFIG := $(SRCTREE)/mkconfig
176 export MKCONFIG 176 export MKCONFIG
177 177
178 # Make sure CDPATH settings don't interfere 178 # Make sure CDPATH settings don't interfere
179 unexport CDPATH 179 unexport CDPATH
180 180
181 ######################################################################### 181 #########################################################################
182 182
183 HOSTARCH := $(shell uname -m | \ 183 HOSTARCH := $(shell uname -m | \
184 sed -e s/i.86/x86/ \ 184 sed -e s/i.86/x86/ \
185 -e s/sun4u/sparc64/ \ 185 -e s/sun4u/sparc64/ \
186 -e s/arm.*/arm/ \ 186 -e s/arm.*/arm/ \
187 -e s/sa110/arm/ \ 187 -e s/sa110/arm/ \
188 -e s/ppc64/powerpc/ \ 188 -e s/ppc64/powerpc/ \
189 -e s/ppc/powerpc/ \ 189 -e s/ppc/powerpc/ \
190 -e s/macppc/powerpc/\ 190 -e s/macppc/powerpc/\
191 -e s/sh.*/sh/) 191 -e s/sh.*/sh/)
192 192
193 HOSTOS := $(shell uname -s | tr '[:upper:]' '[:lower:]' | \ 193 HOSTOS := $(shell uname -s | tr '[:upper:]' '[:lower:]' | \
194 sed -e 's/\(cygwin\).*/cygwin/') 194 sed -e 's/\(cygwin\).*/cygwin/')
195 195
196 export HOSTARCH HOSTOS 196 export HOSTARCH HOSTOS
197 197
198 # Deal with colliding definitions from tcsh etc. 198 # Deal with colliding definitions from tcsh etc.
199 VENDOR= 199 VENDOR=
200 200
201 ######################################################################### 201 #########################################################################
202 202
203 # set default to nothing for native builds 203 # set default to nothing for native builds
204 ifeq ($(HOSTARCH),$(ARCH)) 204 ifeq ($(HOSTARCH),$(ARCH))
205 CROSS_COMPILE ?= 205 CROSS_COMPILE ?=
206 endif 206 endif
207 207
208 # SHELL used by kbuild 208 # SHELL used by kbuild
209 CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \ 209 CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
210 else if [ -x /bin/bash ]; then echo /bin/bash; \ 210 else if [ -x /bin/bash ]; then echo /bin/bash; \
211 else echo sh; fi ; fi) 211 else echo sh; fi ; fi)
212 212
213 HOSTCC = gcc 213 HOSTCC = gcc
214 HOSTCFLAGS = -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer 214 HOSTCFLAGS = -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer
215 215
216 ifeq ($(HOSTOS),cygwin) 216 ifeq ($(HOSTOS),cygwin)
217 HOSTCFLAGS += -ansi 217 HOSTCFLAGS += -ansi
218 endif 218 endif
219 219
220 # Mac OS X / Darwin's C preprocessor is Apple specific. It 220 # Mac OS X / Darwin's C preprocessor is Apple specific. It
221 # generates numerous errors and warnings. We want to bypass it 221 # generates numerous errors and warnings. We want to bypass it
222 # and use GNU C's cpp. To do this we pass the -traditional-cpp 222 # and use GNU C's cpp. To do this we pass the -traditional-cpp
223 # option to the compiler. Note that the -traditional-cpp flag 223 # option to the compiler. Note that the -traditional-cpp flag
224 # DOES NOT have the same semantics as GNU C's flag, all it does 224 # DOES NOT have the same semantics as GNU C's flag, all it does
225 # is invoke the GNU preprocessor in stock ANSI/ISO C fashion. 225 # is invoke the GNU preprocessor in stock ANSI/ISO C fashion.
226 # 226 #
227 # Apple's linker is similar, thanks to the new 2 stage linking 227 # Apple's linker is similar, thanks to the new 2 stage linking
228 # multiple symbol definitions are treated as errors, hence the 228 # multiple symbol definitions are treated as errors, hence the
229 # -multiply_defined suppress option to turn off this error. 229 # -multiply_defined suppress option to turn off this error.
230 # 230 #
231 ifeq ($(HOSTOS),darwin) 231 ifeq ($(HOSTOS),darwin)
232 # get major and minor product version (e.g. '10' and '6' for Snow Leopard) 232 # get major and minor product version (e.g. '10' and '6' for Snow Leopard)
233 DARWIN_MAJOR_VERSION = $(shell sw_vers -productVersion | cut -f 1 -d '.') 233 DARWIN_MAJOR_VERSION = $(shell sw_vers -productVersion | cut -f 1 -d '.')
234 DARWIN_MINOR_VERSION = $(shell sw_vers -productVersion | cut -f 2 -d '.') 234 DARWIN_MINOR_VERSION = $(shell sw_vers -productVersion | cut -f 2 -d '.')
235 235
236 os_x_before = $(shell if [ $(DARWIN_MAJOR_VERSION) -le $(1) -a \ 236 os_x_before = $(shell if [ $(DARWIN_MAJOR_VERSION) -le $(1) -a \
237 $(DARWIN_MINOR_VERSION) -le $(2) ] ; then echo "$(3)"; else echo "$(4)"; fi ;) 237 $(DARWIN_MINOR_VERSION) -le $(2) ] ; then echo "$(3)"; else echo "$(4)"; fi ;)
238 238
239 # Snow Leopards build environment has no longer restrictions as described above 239 # Snow Leopards build environment has no longer restrictions as described above
240 HOSTCC = $(call os_x_before, 10, 5, "cc", "gcc") 240 HOSTCC = $(call os_x_before, 10, 5, "cc", "gcc")
241 HOSTCFLAGS += $(call os_x_before, 10, 4, "-traditional-cpp") 241 HOSTCFLAGS += $(call os_x_before, 10, 4, "-traditional-cpp")
242 HOSTLDFLAGS += $(call os_x_before, 10, 5, "-multiply_defined suppress") 242 HOSTLDFLAGS += $(call os_x_before, 10, 5, "-multiply_defined suppress")
243 endif 243 endif
244 244
245 # Decide whether to build built-in, modular, or both. 245 # Decide whether to build built-in, modular, or both.
246 # Normally, just do built-in. 246 # Normally, just do built-in.
247 247
248 KBUILD_MODULES := 248 KBUILD_MODULES :=
249 KBUILD_BUILTIN := 1 249 KBUILD_BUILTIN := 1
250 250
251 # If we have only "make modules", don't compile built-in objects. 251 # If we have only "make modules", don't compile built-in objects.
252 # When we're building modules with modversions, we need to consider 252 # When we're building modules with modversions, we need to consider
253 # the built-in objects during the descend as well, in order to 253 # the built-in objects during the descend as well, in order to
254 # make sure the checksums are up to date before we record them. 254 # make sure the checksums are up to date before we record them.
255 255
256 ifeq ($(MAKECMDGOALS),modules) 256 ifeq ($(MAKECMDGOALS),modules)
257 KBUILD_BUILTIN := $(if $(CONFIG_MODVERSIONS),1) 257 KBUILD_BUILTIN := $(if $(CONFIG_MODVERSIONS),1)
258 endif 258 endif
259 259
260 # If we have "make <whatever> modules", compile modules 260 # If we have "make <whatever> modules", compile modules
261 # in addition to whatever we do anyway. 261 # in addition to whatever we do anyway.
262 # Just "make" or "make all" shall build modules as well 262 # Just "make" or "make all" shall build modules as well
263 263
264 # U-Boot does not need modules 264 # U-Boot does not need modules
265 #ifneq ($(filter all _all modules,$(MAKECMDGOALS)),) 265 #ifneq ($(filter all _all modules,$(MAKECMDGOALS)),)
266 # KBUILD_MODULES := 1 266 # KBUILD_MODULES := 1
267 #endif 267 #endif
268 268
269 #ifeq ($(MAKECMDGOALS),) 269 #ifeq ($(MAKECMDGOALS),)
270 # KBUILD_MODULES := 1 270 # KBUILD_MODULES := 1
271 #endif 271 #endif
272 272
273 export KBUILD_MODULES KBUILD_BUILTIN 273 export KBUILD_MODULES KBUILD_BUILTIN
274 export KBUILD_CHECKSRC KBUILD_SRC KBUILD_EXTMOD 274 export KBUILD_CHECKSRC KBUILD_SRC KBUILD_EXTMOD
275 275
276 # Beautify output 276 # Beautify output
277 # --------------------------------------------------------------------------- 277 # ---------------------------------------------------------------------------
278 # 278 #
279 # Normally, we echo the whole command before executing it. By making 279 # Normally, we echo the whole command before executing it. By making
280 # that echo $($(quiet)$(cmd)), we now have the possibility to set 280 # that echo $($(quiet)$(cmd)), we now have the possibility to set
281 # $(quiet) to choose other forms of output instead, e.g. 281 # $(quiet) to choose other forms of output instead, e.g.
282 # 282 #
283 # quiet_cmd_cc_o_c = Compiling $(RELDIR)/$@ 283 # quiet_cmd_cc_o_c = Compiling $(RELDIR)/$@
284 # cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $< 284 # cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
285 # 285 #
286 # If $(quiet) is empty, the whole command will be printed. 286 # If $(quiet) is empty, the whole command will be printed.
287 # If it is set to "quiet_", only the short version will be printed. 287 # If it is set to "quiet_", only the short version will be printed.
288 # If it is set to "silent_", nothing will be printed at all, since 288 # If it is set to "silent_", nothing will be printed at all, since
289 # the variable $(silent_cmd_cc_o_c) doesn't exist. 289 # the variable $(silent_cmd_cc_o_c) doesn't exist.
290 # 290 #
291 # A simple variant is to prefix commands with $(Q) - that's useful 291 # A simple variant is to prefix commands with $(Q) - that's useful
292 # for commands that shall be hidden in non-verbose mode. 292 # for commands that shall be hidden in non-verbose mode.
293 # 293 #
294 # $(Q)ln $@ :< 294 # $(Q)ln $@ :<
295 # 295 #
296 # If KBUILD_VERBOSE equals 0 then the above command will be hidden. 296 # If KBUILD_VERBOSE equals 0 then the above command will be hidden.
297 # If KBUILD_VERBOSE equals 1 then the above command is displayed. 297 # If KBUILD_VERBOSE equals 1 then the above command is displayed.
298 298
299 ifeq ($(KBUILD_VERBOSE),1) 299 ifeq ($(KBUILD_VERBOSE),1)
300 quiet = 300 quiet =
301 Q = 301 Q =
302 else 302 else
303 quiet=quiet_ 303 quiet=quiet_
304 Q = @ 304 Q = @
305 endif 305 endif
306 306
307 # If the user is running make -s (silent mode), suppress echoing of 307 # If the user is running make -s (silent mode), suppress echoing of
308 # commands 308 # commands
309 309
310 ifneq ($(filter s% -s%,$(MAKEFLAGS)),) 310 ifneq ($(filter s% -s%,$(MAKEFLAGS)),)
311 quiet=silent_ 311 quiet=silent_
312 endif 312 endif
313 313
314 export quiet Q KBUILD_VERBOSE 314 export quiet Q KBUILD_VERBOSE
315 315
316 316
317 # Look for make include files relative to root of kernel src 317 # Look for make include files relative to root of kernel src
318 MAKEFLAGS += --include-dir=$(srctree) 318 MAKEFLAGS += --include-dir=$(srctree)
319 319
320 # We need some generic definitions (do not try to remake the file). 320 # We need some generic definitions (do not try to remake the file).
321 $(srctree)/scripts/Kbuild.include: ; 321 $(srctree)/scripts/Kbuild.include: ;
322 include $(srctree)/scripts/Kbuild.include 322 include $(srctree)/scripts/Kbuild.include
323 323
324 # Make variables (CC, etc...) 324 # Make variables (CC, etc...)
325 325
326 AS = $(CROSS_COMPILE)as 326 AS = $(CROSS_COMPILE)as
327 # Always use GNU ld 327 # Always use GNU ld
328 ifneq ($(shell $(CROSS_COMPILE)ld.bfd -v 2> /dev/null),) 328 ifneq ($(shell $(CROSS_COMPILE)ld.bfd -v 2> /dev/null),)
329 LD = $(CROSS_COMPILE)ld.bfd 329 LD = $(CROSS_COMPILE)ld.bfd
330 else 330 else
331 LD = $(CROSS_COMPILE)ld 331 LD = $(CROSS_COMPILE)ld
332 endif 332 endif
333 CC = $(CROSS_COMPILE)gcc 333 CC = $(CROSS_COMPILE)gcc
334 CPP = $(CC) -E 334 CPP = $(CC) -E
335 AR = $(CROSS_COMPILE)ar 335 AR = $(CROSS_COMPILE)ar
336 NM = $(CROSS_COMPILE)nm 336 NM = $(CROSS_COMPILE)nm
337 LDR = $(CROSS_COMPILE)ldr 337 LDR = $(CROSS_COMPILE)ldr
338 STRIP = $(CROSS_COMPILE)strip 338 STRIP = $(CROSS_COMPILE)strip
339 OBJCOPY = $(CROSS_COMPILE)objcopy 339 OBJCOPY = $(CROSS_COMPILE)objcopy
340 OBJDUMP = $(CROSS_COMPILE)objdump 340 OBJDUMP = $(CROSS_COMPILE)objdump
341 AWK = awk 341 AWK = awk
342 RANLIB = $(CROSS_COMPILE)RANLIB 342 RANLIB = $(CROSS_COMPILE)RANLIB
343 DTC = dtc 343 DTC = dtc
344 CHECK = sparse 344 CHECK = sparse
345 345
346 CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \ 346 CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
347 -Wbitwise -Wno-return-void -D__CHECK_ENDIAN__ $(CF) 347 -Wbitwise -Wno-return-void -D__CHECK_ENDIAN__ $(CF)
348 348
349 KBUILD_CPPFLAGS := -D__KERNEL__ 349 KBUILD_CPPFLAGS := -D__KERNEL__
350 350
351 KBUILD_CFLAGS := -Wall -Wstrict-prototypes \ 351 KBUILD_CFLAGS := -Wall -Wstrict-prototypes \
352 -Wno-format-security \ 352 -Wno-format-security \
353 -fno-builtin -ffreestanding 353 -fno-builtin -ffreestanding
354 KBUILD_AFLAGS := -D__ASSEMBLY__ 354 KBUILD_AFLAGS := -D__ASSEMBLY__
355 355
356 # Read UBOOTRELEASE from include/config/uboot.release (if it exists) 356 # Read UBOOTRELEASE from include/config/uboot.release (if it exists)
357 UBOOTRELEASE = $(shell cat include/config/uboot.release 2> /dev/null) 357 UBOOTRELEASE = $(shell cat include/config/uboot.release 2> /dev/null)
358 UBOOTVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION) 358 UBOOTVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION)
359 359
360 export VERSION PATCHLEVEL SUBLEVEL UBOOTRELEASE UBOOTVERSION 360 export VERSION PATCHLEVEL SUBLEVEL UBOOTRELEASE UBOOTVERSION
361 export ARCH CPU BOARD VENDOR SOC 361 export ARCH CPU BOARD VENDOR SOC
362 export CONFIG_SHELL HOSTCC HOSTCFLAGS HOSTLDFLAGS CROSS_COMPILE AS LD CC 362 export CONFIG_SHELL HOSTCC HOSTCFLAGS HOSTLDFLAGS CROSS_COMPILE AS LD CC
363 export CPP AR NM LDR STRIP OBJCOPY OBJDUMP 363 export CPP AR NM LDR STRIP OBJCOPY OBJDUMP
364 export MAKE AWK 364 export MAKE AWK
365 export DTC CHECK CHECKFLAGS 365 export DTC CHECK CHECKFLAGS
366 366
367 export KBUILD_CPPFLAGS NOSTDINC_FLAGS UBOOTINCLUDE 367 export KBUILD_CPPFLAGS NOSTDINC_FLAGS UBOOTINCLUDE
368 export KBUILD_CFLAGS KBUILD_AFLAGS 368 export KBUILD_CFLAGS KBUILD_AFLAGS
369 369
370 # When compiling out-of-tree modules, put MODVERDIR in the module 370 # When compiling out-of-tree modules, put MODVERDIR in the module
371 # tree rather than in the kernel tree. The kernel tree might 371 # tree rather than in the kernel tree. The kernel tree might
372 # even be read-only. 372 # even be read-only.
373 export MODVERDIR := $(if $(KBUILD_EXTMOD),$(firstword $(KBUILD_EXTMOD))/).tmp_versions 373 export MODVERDIR := $(if $(KBUILD_EXTMOD),$(firstword $(KBUILD_EXTMOD))/).tmp_versions
374 374
375 # Files to ignore in find ... statements 375 # Files to ignore in find ... statements
376 376
377 RCS_FIND_IGNORE := \( -name SCCS -o -name BitKeeper -o -name .svn -o -name CVS \ 377 RCS_FIND_IGNORE := \( -name SCCS -o -name BitKeeper -o -name .svn -o -name CVS \
378 -o -name .pc -o -name .hg -o -name .git \) -prune -o 378 -o -name .pc -o -name .hg -o -name .git \) -prune -o
379 export RCS_TAR_IGNORE := --exclude SCCS --exclude BitKeeper --exclude .svn \ 379 export RCS_TAR_IGNORE := --exclude SCCS --exclude BitKeeper --exclude .svn \
380 --exclude CVS --exclude .pc --exclude .hg --exclude .git 380 --exclude CVS --exclude .pc --exclude .hg --exclude .git
381 381
382 # =========================================================================== 382 # ===========================================================================
383 # Rules shared between *config targets and build targets 383 # Rules shared between *config targets and build targets
384 384
385 # Basic helpers built in scripts/ 385 # Basic helpers built in scripts/
386 PHONY += scripts_basic 386 PHONY += scripts_basic
387 scripts_basic: 387 scripts_basic:
388 $(Q)$(MAKE) $(build)=scripts/basic 388 $(Q)$(MAKE) $(build)=scripts/basic
389 $(Q)rm -f .tmp_quiet_recordmcount 389 $(Q)rm -f .tmp_quiet_recordmcount
390 390
391 # To avoid any implicit rule to kick in, define an empty command. 391 # To avoid any implicit rule to kick in, define an empty command.
392 scripts/basic/%: scripts_basic ; 392 scripts/basic/%: scripts_basic ;
393 393
394 PHONY += outputmakefile 394 PHONY += outputmakefile
395 # outputmakefile generates a Makefile in the output directory, if using a 395 # outputmakefile generates a Makefile in the output directory, if using a
396 # separate output directory. This allows convenient use of make in the 396 # separate output directory. This allows convenient use of make in the
397 # output directory. 397 # output directory.
398 outputmakefile: 398 outputmakefile:
399 ifneq ($(KBUILD_SRC),) 399 ifneq ($(KBUILD_SRC),)
400 $(Q)ln -fsn $(srctree) source 400 $(Q)ln -fsn $(srctree) source
401 $(Q)$(CONFIG_SHELL) $(srctree)/scripts/mkmakefile \ 401 $(Q)$(CONFIG_SHELL) $(srctree)/scripts/mkmakefile \
402 $(srctree) $(objtree) $(VERSION) $(PATCHLEVEL) 402 $(srctree) $(objtree) $(VERSION) $(PATCHLEVEL)
403 endif 403 endif
404 404
405 # To make sure we do not include .config for any of the *config targets 405 # To make sure we do not include .config for any of the *config targets
406 # catch them early, and hand them over to scripts/kconfig/Makefile 406 # catch them early, and hand them over to scripts/kconfig/Makefile
407 # It is allowed to specify more targets when calling make, including 407 # It is allowed to specify more targets when calling make, including
408 # mixing *config targets and build targets. 408 # mixing *config targets and build targets.
409 # For example 'make oldconfig all'. 409 # For example 'make oldconfig all'.
410 # Detect when mixed targets is specified, and make a second invocation 410 # Detect when mixed targets is specified, and make a second invocation
411 # of make so .config is not included in this case either (for *config). 411 # of make so .config is not included in this case either (for *config).
412 412
413 version_h := include/generated/version_autogenerated.h 413 version_h := include/generated/version_autogenerated.h
414 timestamp_h := include/generated/timestamp_autogenerated.h 414 timestamp_h := include/generated/timestamp_autogenerated.h
415 415
416 no-dot-config-targets := clean clobber mrproper distclean \ 416 no-dot-config-targets := clean clobber mrproper distclean \
417 help %docs check% coccicheck \ 417 help %docs check% coccicheck \
418 ubootversion backup 418 ubootversion backup
419 419
420 config-targets := 0 420 config-targets := 0
421 mixed-targets := 0 421 mixed-targets := 0
422 dot-config := 1 422 dot-config := 1
423 423
424 ifneq ($(filter $(no-dot-config-targets), $(MAKECMDGOALS)),) 424 ifneq ($(filter $(no-dot-config-targets), $(MAKECMDGOALS)),)
425 ifeq ($(filter-out $(no-dot-config-targets), $(MAKECMDGOALS)),) 425 ifeq ($(filter-out $(no-dot-config-targets), $(MAKECMDGOALS)),)
426 dot-config := 0 426 dot-config := 0
427 endif 427 endif
428 endif 428 endif
429 429
430 ifeq ($(KBUILD_EXTMOD),) 430 ifeq ($(KBUILD_EXTMOD),)
431 ifneq ($(filter config %config,$(MAKECMDGOALS)),) 431 ifneq ($(filter config %config,$(MAKECMDGOALS)),)
432 config-targets := 1 432 config-targets := 1
433 ifneq ($(filter-out config %config,$(MAKECMDGOALS)),) 433 ifneq ($(filter-out config %config,$(MAKECMDGOALS)),)
434 mixed-targets := 1 434 mixed-targets := 1
435 endif 435 endif
436 endif 436 endif
437 endif 437 endif
438 438
439 ifeq ($(mixed-targets),1) 439 ifeq ($(mixed-targets),1)
440 # =========================================================================== 440 # ===========================================================================
441 # We're called with mixed targets (*config and build targets). 441 # We're called with mixed targets (*config and build targets).
442 # Handle them one by one. 442 # Handle them one by one.
443 443
444 PHONY += $(MAKECMDGOALS) build-one-by-one 444 PHONY += $(MAKECMDGOALS) build-one-by-one
445 445
446 $(MAKECMDGOALS): build-one-by-one 446 $(MAKECMDGOALS): build-one-by-one
447 @: 447 @:
448 448
449 build-one-by-one: 449 build-one-by-one:
450 $(Q)set -e; \ 450 $(Q)set -e; \
451 for i in $(MAKECMDGOALS); do \ 451 for i in $(MAKECMDGOALS); do \
452 $(MAKE) -f $(srctree)/Makefile $$i; \ 452 $(MAKE) -f $(srctree)/Makefile $$i; \
453 done 453 done
454 454
455 else 455 else
456 ifeq ($(config-targets),1) 456 ifeq ($(config-targets),1)
457 # =========================================================================== 457 # ===========================================================================
458 # *config targets only - make sure prerequisites are updated, and descend 458 # *config targets only - make sure prerequisites are updated, and descend
459 # in scripts/kconfig to make the *config target 459 # in scripts/kconfig to make the *config target
460 460
461 # Read arch specific Makefile to set KBUILD_DEFCONFIG as needed. 461 # Read arch specific Makefile to set KBUILD_DEFCONFIG as needed.
462 # KBUILD_DEFCONFIG may point out an alternative default configuration 462 # KBUILD_DEFCONFIG may point out an alternative default configuration
463 # used for 'make defconfig' 463 # used for 'make defconfig'
464 464
465 %_config:: outputmakefile 465 %_config:: outputmakefile
466 @$(MKCONFIG) -A $(@:_config=) 466 @$(MKCONFIG) -A $(@:_config=)
467 467
468 else 468 else
469 # =========================================================================== 469 # ===========================================================================
470 # Build targets only - this includes vmlinux, arch specific targets, clean 470 # Build targets only - this includes vmlinux, arch specific targets, clean
471 # targets and others. In general all targets except *config targets. 471 # targets and others. In general all targets except *config targets.
472 472
473 # load ARCH, BOARD, and CPU configuration 473 # load ARCH, BOARD, and CPU configuration
474 -include include/config.mk 474 -include include/config.mk
475 475
476 ifeq ($(dot-config),1) 476 ifeq ($(dot-config),1)
477 # Read in config 477 # Read in config
478 -include include/autoconf.mk 478 -include include/autoconf.mk
479 -include include/autoconf.mk.dep 479 -include include/autoconf.mk.dep
480 480
481 # load other configuration 481 # load other configuration
482 include $(srctree)/config.mk 482 include $(srctree)/config.mk
483 483
484 ifeq ($(wildcard include/config.mk),) 484 ifeq ($(wildcard include/config.mk),)
485 $(error "System not configured - see README") 485 $(error "System not configured - see README")
486 endif 486 endif
487 487
488 # If board code explicitly specified LDSCRIPT or CONFIG_SYS_LDSCRIPT, use 488 # If board code explicitly specified LDSCRIPT or CONFIG_SYS_LDSCRIPT, use
489 # that (or fail if absent). Otherwise, search for a linker script in a 489 # that (or fail if absent). Otherwise, search for a linker script in a
490 # standard location. 490 # standard location.
491 491
492 LDSCRIPT_MAKEFILE_DIR = $(dir $(LDSCRIPT)) 492 LDSCRIPT_MAKEFILE_DIR = $(dir $(LDSCRIPT))
493 493
494 ifndef LDSCRIPT 494 ifndef LDSCRIPT
495 #LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds.debug 495 #LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds.debug
496 ifdef CONFIG_SYS_LDSCRIPT 496 ifdef CONFIG_SYS_LDSCRIPT
497 # need to strip off double quotes 497 # need to strip off double quotes
498 LDSCRIPT := $(CONFIG_SYS_LDSCRIPT:"%"=%) 498 LDSCRIPT := $(srctree)/$(CONFIG_SYS_LDSCRIPT:"%"=%)
499 endif 499 endif
500 endif 500 endif
501 501
502 # If there is no specified link script, we look in a number of places for it 502 # If there is no specified link script, we look in a number of places for it
503 ifndef LDSCRIPT 503 ifndef LDSCRIPT
504 ifeq ($(CONFIG_NAND_U_BOOT),y) 504 ifeq ($(CONFIG_NAND_U_BOOT),y)
505 LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds 505 LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
506 ifeq ($(wildcard $(LDSCRIPT)),) 506 ifeq ($(wildcard $(LDSCRIPT)),)
507 LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds 507 LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
508 endif 508 endif
509 endif 509 endif
510 ifeq ($(wildcard $(LDSCRIPT)),) 510 ifeq ($(wildcard $(LDSCRIPT)),)
511 LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds 511 LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds
512 endif 512 endif
513 ifeq ($(wildcard $(LDSCRIPT)),) 513 ifeq ($(wildcard $(LDSCRIPT)),)
514 LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot.lds 514 LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot.lds
515 endif 515 endif
516 ifeq ($(wildcard $(LDSCRIPT)),) 516 ifeq ($(wildcard $(LDSCRIPT)),)
517 LDSCRIPT := $(TOPDIR)/arch/$(ARCH)/cpu/u-boot.lds 517 LDSCRIPT := $(TOPDIR)/arch/$(ARCH)/cpu/u-boot.lds
518 # We don't expect a Makefile here 518 # We don't expect a Makefile here
519 LDSCRIPT_MAKEFILE_DIR = 519 LDSCRIPT_MAKEFILE_DIR =
520 endif 520 endif
521 ifeq ($(wildcard $(LDSCRIPT)),)
522 $(error could not find linker script)
523 endif
524 endif 521 endif
525 522
526 else 523 else
527 524
528 525
529 endif # $(dot-config) 526 endif # $(dot-config)
530 527
531 KBUILD_CFLAGS += -Os #-fomit-frame-pointer 528 KBUILD_CFLAGS += -Os #-fomit-frame-pointer
532 529
533 ifdef BUILD_TAG 530 ifdef BUILD_TAG
534 KBUILD_CFLAGS += -DBUILD_TAG='"$(BUILD_TAG)"' 531 KBUILD_CFLAGS += -DBUILD_TAG='"$(BUILD_TAG)"'
535 endif 532 endif
536 533
537 KBUILD_CFLAGS += $(call cc-option,-fno-stack-protector) 534 KBUILD_CFLAGS += $(call cc-option,-fno-stack-protector)
538 535
539 KBUILD_CFLAGS += -g 536 KBUILD_CFLAGS += -g
540 # $(KBUILD_AFLAGS) sets -g, which causes gcc to pass a suitable -g<format> 537 # $(KBUILD_AFLAGS) sets -g, which causes gcc to pass a suitable -g<format>
541 # option to the assembler. 538 # option to the assembler.
542 KBUILD_AFLAGS += -g 539 KBUILD_AFLAGS += -g
543 540
544 # Report stack usage if supported 541 # Report stack usage if supported
545 ifeq ($(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-stack-usage.sh $(CC)),y) 542 ifeq ($(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-stack-usage.sh $(CC)),y)
546 KBUILD_CFLAGS += -fstack-usage 543 KBUILD_CFLAGS += -fstack-usage
547 endif 544 endif
548 545
549 KBUILD_CFLAGS += $(call cc-option,-Wno-format-nonliteral) 546 KBUILD_CFLAGS += $(call cc-option,-Wno-format-nonliteral)
550 547
551 # turn jbsr into jsr for m68k 548 # turn jbsr into jsr for m68k
552 ifeq ($(ARCH),m68k) 549 ifeq ($(ARCH),m68k)
553 ifeq ($(findstring 3.4,$(shell $(CC) --version)),3.4) 550 ifeq ($(findstring 3.4,$(shell $(CC) --version)),3.4)
554 KBUILD_AFLAGS += -Wa,-gstabs,-S 551 KBUILD_AFLAGS += -Wa,-gstabs,-S
555 endif 552 endif
556 endif 553 endif
557 554
558 ifneq ($(CONFIG_SYS_TEXT_BASE),) 555 ifneq ($(CONFIG_SYS_TEXT_BASE),)
559 KBUILD_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) 556 KBUILD_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE)
560 endif 557 endif
561 558
562 export CONFIG_SYS_TEXT_BASE 559 export CONFIG_SYS_TEXT_BASE
563 560
564 # Use UBOOTINCLUDE when you must reference the include/ directory. 561 # Use UBOOTINCLUDE when you must reference the include/ directory.
565 # Needed to be compatible with the O= option 562 # Needed to be compatible with the O= option
566 UBOOTINCLUDE := 563 UBOOTINCLUDE :=
567 ifneq ($(OBJTREE),$(SRCTREE)) 564 ifneq ($(OBJTREE),$(SRCTREE))
568 UBOOTINCLUDE += -I$(OBJTREE)/include 565 UBOOTINCLUDE += -I$(OBJTREE)/include
569 endif 566 endif
570 UBOOTINCLUDE += -I$(srctree)/include \ 567 UBOOTINCLUDE += -I$(srctree)/include \
571 -I$(srctree)/arch/$(ARCH)/include 568 -I$(srctree)/arch/$(ARCH)/include
572 569
573 NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) -print-file-name=include) 570 NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) -print-file-name=include)
574 CHECKFLAGS += $(NOSTDINC_FLAGS) 571 CHECKFLAGS += $(NOSTDINC_FLAGS)
575 572
576 # FIX ME 573 # FIX ME
577 cpp_flags := $(KBUILD_CPPFLAGS) $(CPPFLAGS) $(UBOOTINCLUDE) $(NOSTDINC_FLAGS) 574 cpp_flags := $(KBUILD_CPPFLAGS) $(CPPFLAGS) $(UBOOTINCLUDE) $(NOSTDINC_FLAGS)
578 c_flags := $(KBUILD_CFLAGS) $(cpp_flags) 575 c_flags := $(KBUILD_CFLAGS) $(cpp_flags)
579 576
580 ######################################################################### 577 #########################################################################
581 # U-Boot objects....order is important (i.e. start must be first) 578 # U-Boot objects....order is important (i.e. start must be first)
582 579
583 head-y := $(CPUDIR)/start.o 580 head-y := $(CPUDIR)/start.o
584 head-$(CONFIG_4xx) += arch/powerpc/cpu/ppc4xx/resetvec.o 581 head-$(CONFIG_4xx) += arch/powerpc/cpu/ppc4xx/resetvec.o
585 head-$(CONFIG_MPC85xx) += arch/powerpc/cpu/mpc85xx/resetvec.o 582 head-$(CONFIG_MPC85xx) += arch/powerpc/cpu/mpc85xx/resetvec.o
586 583
587 HAVE_VENDOR_COMMON_LIB = $(if $(wildcard $(srctree)/board/$(VENDOR)/common/Makefile),y,n) 584 HAVE_VENDOR_COMMON_LIB = $(if $(wildcard $(srctree)/board/$(VENDOR)/common/Makefile),y,n)
588 585
589 libs-y += lib/ 586 libs-y += lib/
590 libs-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/ 587 libs-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/
591 libs-y += $(CPUDIR)/ 588 libs-y += $(CPUDIR)/
592 ifdef SOC 589 ifdef SOC
593 libs-y += $(CPUDIR)/$(SOC)/ 590 libs-y += $(CPUDIR)/$(SOC)/
594 endif 591 endif
595 libs-$(CONFIG_OF_EMBED) += dts/ 592 libs-$(CONFIG_OF_EMBED) += dts/
596 libs-y += arch/$(ARCH)/lib/ 593 libs-y += arch/$(ARCH)/lib/
597 libs-y += fs/ 594 libs-y += fs/
598 libs-y += net/ 595 libs-y += net/
599 libs-y += disk/ 596 libs-y += disk/
600 libs-y += drivers/ 597 libs-y += drivers/
601 libs-y += drivers/dma/ 598 libs-y += drivers/dma/
602 libs-y += drivers/gpio/ 599 libs-y += drivers/gpio/
603 libs-y += drivers/i2c/ 600 libs-y += drivers/i2c/
604 libs-y += drivers/input/ 601 libs-y += drivers/input/
605 libs-y += drivers/mmc/ 602 libs-y += drivers/mmc/
606 libs-y += drivers/mtd/ 603 libs-y += drivers/mtd/
607 libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/ 604 libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/
608 libs-y += drivers/mtd/onenand/ 605 libs-y += drivers/mtd/onenand/
609 libs-$(CONFIG_CMD_UBI) += drivers/mtd/ubi/ 606 libs-$(CONFIG_CMD_UBI) += drivers/mtd/ubi/
610 libs-y += drivers/mtd/spi/ 607 libs-y += drivers/mtd/spi/
611 libs-y += drivers/net/ 608 libs-y += drivers/net/
612 libs-y += drivers/net/phy/ 609 libs-y += drivers/net/phy/
613 libs-y += drivers/pci/ 610 libs-y += drivers/pci/
614 libs-y += drivers/power/ \ 611 libs-y += drivers/power/ \
615 drivers/power/fuel_gauge/ \ 612 drivers/power/fuel_gauge/ \
616 drivers/power/mfd/ \ 613 drivers/power/mfd/ \
617 drivers/power/pmic/ \ 614 drivers/power/pmic/ \
618 drivers/power/battery/ 615 drivers/power/battery/
619 libs-y += drivers/spi/ 616 libs-y += drivers/spi/
620 libs-$(CONFIG_FMAN_ENET) += drivers/net/fm/ 617 libs-$(CONFIG_FMAN_ENET) += drivers/net/fm/
621 libs-$(CONFIG_SYS_FSL_DDR) += drivers/ddr/fsl/ 618 libs-$(CONFIG_SYS_FSL_DDR) += drivers/ddr/fsl/
622 libs-y += drivers/serial/ 619 libs-y += drivers/serial/
623 libs-y += drivers/usb/eth/ 620 libs-y += drivers/usb/eth/
624 libs-y += drivers/usb/gadget/ 621 libs-y += drivers/usb/gadget/
625 libs-y += drivers/usb/host/ 622 libs-y += drivers/usb/host/
626 libs-y += drivers/usb/musb/ 623 libs-y += drivers/usb/musb/
627 libs-y += drivers/usb/musb-new/ 624 libs-y += drivers/usb/musb-new/
628 libs-y += drivers/usb/phy/ 625 libs-y += drivers/usb/phy/
629 libs-y += drivers/usb/ulpi/ 626 libs-y += drivers/usb/ulpi/
630 libs-y += common/ 627 libs-y += common/
631 libs-y += lib/libfdt/ 628 libs-y += lib/libfdt/
632 libs-$(CONFIG_API) += api/ 629 libs-$(CONFIG_API) += api/
633 libs-$(CONFIG_HAS_POST) += post/ 630 libs-$(CONFIG_HAS_POST) += post/
634 libs-y += test/ 631 libs-y += test/
635 632
636 ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs vf610)) 633 ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs vf610))
637 libs-y += arch/$(ARCH)/imx-common/ 634 libs-y += arch/$(ARCH)/imx-common/
638 endif 635 endif
639 636
640 libs-$(CONFIG_ARM) += arch/arm/cpu/ 637 libs-$(CONFIG_ARM) += arch/arm/cpu/
641 libs-$(CONFIG_PPC) += arch/powerpc/cpu/ 638 libs-$(CONFIG_PPC) += arch/powerpc/cpu/
642 639
643 libs-y += board/$(BOARDDIR)/ 640 libs-y += board/$(BOARDDIR)/
644 641
645 libs-y := $(sort $(libs-y)) 642 libs-y := $(sort $(libs-y))
646 643
647 u-boot-dirs := $(patsubst %/,%,$(filter %/, $(libs-y))) tools examples 644 u-boot-dirs := $(patsubst %/,%,$(filter %/, $(libs-y))) tools examples
648 645
649 u-boot-alldirs := $(sort $(u-boot-dirs) $(patsubst %/,%,$(filter %/, $(libs-)))) 646 u-boot-alldirs := $(sort $(u-boot-dirs) $(patsubst %/,%,$(filter %/, $(libs-))))
650 647
651 libs-y := $(patsubst %/, %/built-in.o, $(libs-y)) 648 libs-y := $(patsubst %/, %/built-in.o, $(libs-y))
652 649
653 u-boot-init := $(head-y) 650 u-boot-init := $(head-y)
654 u-boot-main := $(libs-y) 651 u-boot-main := $(libs-y)
655 652
656 653
657 # Add GCC lib 654 # Add GCC lib
658 ifdef USE_PRIVATE_LIBGCC 655 ifdef USE_PRIVATE_LIBGCC
659 ifeq ("$(USE_PRIVATE_LIBGCC)", "yes") 656 ifeq ("$(USE_PRIVATE_LIBGCC)", "yes")
660 PLATFORM_LIBGCC = $(OBJTREE)/arch/$(ARCH)/lib/lib.a 657 PLATFORM_LIBGCC = $(OBJTREE)/arch/$(ARCH)/lib/lib.a
661 else 658 else
662 PLATFORM_LIBGCC = -L $(USE_PRIVATE_LIBGCC) -lgcc 659 PLATFORM_LIBGCC = -L $(USE_PRIVATE_LIBGCC) -lgcc
663 endif 660 endif
664 else 661 else
665 PLATFORM_LIBGCC := -L $(shell dirname `$(CC) $(c_flags) -print-libgcc-file-name`) -lgcc 662 PLATFORM_LIBGCC := -L $(shell dirname `$(CC) $(c_flags) -print-libgcc-file-name`) -lgcc
666 endif 663 endif
667 PLATFORM_LIBS += $(PLATFORM_LIBGCC) 664 PLATFORM_LIBS += $(PLATFORM_LIBGCC)
668 export PLATFORM_LIBS 665 export PLATFORM_LIBS
669 666
670 # Special flags for CPP when processing the linker script. 667 # Special flags for CPP when processing the linker script.
671 # Pass the version down so we can handle backwards compatibility 668 # Pass the version down so we can handle backwards compatibility
672 # on the fly. 669 # on the fly.
673 LDPPFLAGS += \ 670 LDPPFLAGS += \
674 -include $(TOPDIR)/include/u-boot/u-boot.lds.h \ 671 -include $(TOPDIR)/include/u-boot/u-boot.lds.h \
675 -DCPUDIR=$(CPUDIR) \ 672 -DCPUDIR=$(CPUDIR) \
676 $(shell $(LD) --version | \ 673 $(shell $(LD) --version | \
677 sed -ne 's/GNU ld version \([0-9][0-9]*\)\.\([0-9][0-9]*\).*/-DLD_MAJOR=\1 -DLD_MINOR=\2/p') 674 sed -ne 's/GNU ld version \([0-9][0-9]*\)\.\([0-9][0-9]*\).*/-DLD_MAJOR=\1 -DLD_MINOR=\2/p')
678 675
679 ######################################################################### 676 #########################################################################
680 ######################################################################### 677 #########################################################################
681 678
682 ifneq ($(CONFIG_BOARD_SIZE_LIMIT),) 679 ifneq ($(CONFIG_BOARD_SIZE_LIMIT),)
683 BOARD_SIZE_CHECK = \ 680 BOARD_SIZE_CHECK = \
684 @actual=`wc -c $@ | awk '{print $$1}'`; \ 681 @actual=`wc -c $@ | awk '{print $$1}'`; \
685 limit=`printf "%d" $(CONFIG_BOARD_SIZE_LIMIT)`; \ 682 limit=`printf "%d" $(CONFIG_BOARD_SIZE_LIMIT)`; \
686 if test $$actual -gt $$limit; then \ 683 if test $$actual -gt $$limit; then \
687 echo "$@ exceeds file size limit:" >&2 ; \ 684 echo "$@ exceeds file size limit:" >&2 ; \
688 echo " limit: $$limit bytes" >&2 ; \ 685 echo " limit: $$limit bytes" >&2 ; \
689 echo " actual: $$actual bytes" >&2 ; \ 686 echo " actual: $$actual bytes" >&2 ; \
690 echo " excess: $$((actual - limit)) bytes" >&2; \ 687 echo " excess: $$((actual - limit)) bytes" >&2; \
691 exit 1; \ 688 exit 1; \
692 fi 689 fi
693 else 690 else
694 BOARD_SIZE_CHECK = 691 BOARD_SIZE_CHECK =
695 endif 692 endif
696 693
697 # Statically apply RELA-style relocations (currently arm64 only) 694 # Statically apply RELA-style relocations (currently arm64 only)
698 ifneq ($(CONFIG_STATIC_RELA),) 695 ifneq ($(CONFIG_STATIC_RELA),)
699 # $(1) is u-boot ELF, $(2) is u-boot bin, $(3) is text base 696 # $(1) is u-boot ELF, $(2) is u-boot bin, $(3) is text base
700 DO_STATIC_RELA = \ 697 DO_STATIC_RELA = \
701 start=$$($(NM) $(1) | grep __rel_dyn_start | cut -f 1 -d ' '); \ 698 start=$$($(NM) $(1) | grep __rel_dyn_start | cut -f 1 -d ' '); \
702 end=$$($(NM) $(1) | grep __rel_dyn_end | cut -f 1 -d ' '); \ 699 end=$$($(NM) $(1) | grep __rel_dyn_end | cut -f 1 -d ' '); \
703 tools/relocate-rela $(2) $(3) $$start $$end 700 tools/relocate-rela $(2) $(3) $$start $$end
704 else 701 else
705 DO_STATIC_RELA = 702 DO_STATIC_RELA =
706 endif 703 endif
707 704
708 # Always append ALL so that arch config.mk's can add custom ones 705 # Always append ALL so that arch config.mk's can add custom ones
709 ALL-y += u-boot.srec u-boot.bin System.map 706 ALL-y += u-boot.srec u-boot.bin System.map
710 707
711 ALL-$(CONFIG_NAND_U_BOOT) += u-boot-nand.bin 708 ALL-$(CONFIG_NAND_U_BOOT) += u-boot-nand.bin
712 ALL-$(CONFIG_ONENAND_U_BOOT) += u-boot-onenand.bin 709 ALL-$(CONFIG_ONENAND_U_BOOT) += u-boot-onenand.bin
713 ALL-$(CONFIG_RAMBOOT_PBL) += u-boot.pbl 710 ALL-$(CONFIG_RAMBOOT_PBL) += u-boot.pbl
714 ALL-$(CONFIG_SPL) += spl/u-boot-spl.bin 711 ALL-$(CONFIG_SPL) += spl/u-boot-spl.bin
715 ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot.img 712 ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot.img
716 ALL-$(CONFIG_TPL) += tpl/u-boot-tpl.bin 713 ALL-$(CONFIG_TPL) += tpl/u-boot-tpl.bin
717 ALL-$(CONFIG_OF_SEPARATE) += u-boot.dtb u-boot-dtb.bin 714 ALL-$(CONFIG_OF_SEPARATE) += u-boot.dtb u-boot-dtb.bin
718 ifneq ($(CONFIG_SPL_TARGET),) 715 ifneq ($(CONFIG_SPL_TARGET),)
719 ALL-$(CONFIG_SPL) += $(CONFIG_SPL_TARGET:"%"=%) 716 ALL-$(CONFIG_SPL) += $(CONFIG_SPL_TARGET:"%"=%)
720 endif 717 endif
721 ALL-$(CONFIG_REMAKE_ELF) += u-boot.elf 718 ALL-$(CONFIG_REMAKE_ELF) += u-boot.elf
722 719
723 # enable combined SPL/u-boot/dtb rules for tegra 720 # enable combined SPL/u-boot/dtb rules for tegra
724 ifneq ($(CONFIG_TEGRA),) 721 ifneq ($(CONFIG_TEGRA),)
725 ifeq ($(CONFIG_SPL),y) 722 ifeq ($(CONFIG_SPL),y)
726 ifeq ($(CONFIG_OF_SEPARATE),y) 723 ifeq ($(CONFIG_OF_SEPARATE),y)
727 ALL-y += u-boot-dtb-tegra.bin 724 ALL-y += u-boot-dtb-tegra.bin
728 else 725 else
729 ALL-y += u-boot-nodtb-tegra.bin 726 ALL-y += u-boot-nodtb-tegra.bin
730 endif 727 endif
731 endif 728 endif
732 endif 729 endif
733 730
734 LDFLAGS_u-boot += $(LDFLAGS_FINAL) 731 LDFLAGS_u-boot += $(LDFLAGS_FINAL)
735 ifneq ($(CONFIG_SYS_TEXT_BASE),) 732 ifneq ($(CONFIG_SYS_TEXT_BASE),)
736 LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE) 733 LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE)
737 endif 734 endif
738 735
739 quiet_cmd_objcopy = OBJCOPY $@ 736 quiet_cmd_objcopy = OBJCOPY $@
740 cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@ 737 cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@
741 738
742 quiet_cmd_mkimage = UIMAGE $@ 739 quiet_cmd_mkimage = UIMAGE $@
743 cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \ 740 cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \
744 $(if $(KBUILD_VERBOSE:1=), >/dev/null) 741 $(if $(KBUILD_VERBOSE:1=), >/dev/null)
745 742
746 quiet_cmd_cat = CAT $@ 743 quiet_cmd_cat = CAT $@
747 cmd_cat = cat $(filter-out $(PHONY), $^) > $@ 744 cmd_cat = cat $(filter-out $(PHONY), $^) > $@
748 745
749 append = cat $(filter-out $< $(PHONY), $^) >> $@ 746 append = cat $(filter-out $< $(PHONY), $^) >> $@
750 747
751 quiet_cmd_pad_cat = CAT $@ 748 quiet_cmd_pad_cat = CAT $@
752 cmd_pad_cat = $(cmd_objcopy) && $(append) || rm -f $@ 749 cmd_pad_cat = $(cmd_objcopy) && $(append) || rm -f $@
753 750
754 all: $(ALL-y) 751 all: $(ALL-y)
755 752
756 PHONY += dtbs 753 PHONY += dtbs
757 dtbs dts/dt.dtb: checkdtc u-boot 754 dtbs dts/dt.dtb: checkdtc u-boot
758 $(Q)$(MAKE) $(build)=dts dtbs 755 $(Q)$(MAKE) $(build)=dts dtbs
759 756
760 u-boot-dtb.bin: u-boot.bin dts/dt.dtb FORCE 757 u-boot-dtb.bin: u-boot.bin dts/dt.dtb FORCE
761 $(call if_changed,cat) 758 $(call if_changed,cat)
762 759
763 quiet_cmd_copy = COPY $@ 760 quiet_cmd_copy = COPY $@
764 cmd_copy = cp $< $@ 761 cmd_copy = cp $< $@
765 762
766 u-boot.dtb: dts/dt.dtb 763 u-boot.dtb: dts/dt.dtb
767 $(call cmd,copy) 764 $(call cmd,copy)
768 765
769 OBJCOPYFLAGS_u-boot.hex := -O ihex 766 OBJCOPYFLAGS_u-boot.hex := -O ihex
770 767
771 OBJCOPYFLAGS_u-boot.srec := -O srec 768 OBJCOPYFLAGS_u-boot.srec := -O srec
772 769
773 u-boot.hex u-boot.srec: u-boot FORCE 770 u-boot.hex u-boot.srec: u-boot FORCE
774 $(call if_changed,objcopy) 771 $(call if_changed,objcopy)
775 772
776 OBJCOPYFLAGS_u-boot.bin := -O binary 773 OBJCOPYFLAGS_u-boot.bin := -O binary
777 774
778 u-boot.bin: u-boot FORCE 775 u-boot.bin: u-boot FORCE
779 $(call if_changed,objcopy) 776 $(call if_changed,objcopy)
780 $(call DO_STATIC_RELA,$<,$@,$(CONFIG_SYS_TEXT_BASE)) 777 $(call DO_STATIC_RELA,$<,$@,$(CONFIG_SYS_TEXT_BASE))
781 $(BOARD_SIZE_CHECK) 778 $(BOARD_SIZE_CHECK)
782 779
783 u-boot.ldr: u-boot 780 u-boot.ldr: u-boot
784 $(CREATE_LDR_ENV) 781 $(CREATE_LDR_ENV)
785 $(LDR) -T $(CONFIG_BFIN_CPU) -c $@ $< $(LDR_FLAGS) 782 $(LDR) -T $(CONFIG_BFIN_CPU) -c $@ $< $(LDR_FLAGS)
786 $(BOARD_SIZE_CHECK) 783 $(BOARD_SIZE_CHECK)
787 784
788 OBJCOPYFLAGS_u-boot.ldr.hex := -I binary -O ihex 785 OBJCOPYFLAGS_u-boot.ldr.hex := -I binary -O ihex
789 786
790 OBJCOPYFLAGS_u-boot.ldr.srec := -I binary -O srec 787 OBJCOPYFLAGS_u-boot.ldr.srec := -I binary -O srec
791 788
792 u-boot.ldr.hex u-boot.ldr.srec: u-boot.ldr FORCE 789 u-boot.ldr.hex u-boot.ldr.srec: u-boot.ldr FORCE
793 $(call if_changed,objcopy) 790 $(call if_changed,objcopy)
794 791
795 # 792 #
796 # U-Boot entry point, needed for booting of full-blown U-Boot 793 # U-Boot entry point, needed for booting of full-blown U-Boot
797 # from the SPL U-Boot version. 794 # from the SPL U-Boot version.
798 # 795 #
799 ifndef CONFIG_SYS_UBOOT_START 796 ifndef CONFIG_SYS_UBOOT_START
800 CONFIG_SYS_UBOOT_START := 0 797 CONFIG_SYS_UBOOT_START := 0
801 endif 798 endif
802 799
803 MKIMAGEFLAGS_u-boot.img = -A $(ARCH) -T firmware -C none -O u-boot \ 800 MKIMAGEFLAGS_u-boot.img = -A $(ARCH) -T firmware -C none -O u-boot \
804 -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \ 801 -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
805 -n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" 802 -n "U-Boot $(UBOOTRELEASE) for $(BOARD) board"
806 803
807 MKIMAGEFLAGS_u-boot.kwb = -n $(CONFIG_SYS_KWD_CONFIG) -T kwbimage \ 804 MKIMAGEFLAGS_u-boot.kwb = -n $(CONFIG_SYS_KWD_CONFIG) -T kwbimage \
808 -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) 805 -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE)
809 806
810 MKIMAGEFLAGS_u-boot.pbl = -n $(CONFIG_SYS_FSL_PBL_RCW) \ 807 MKIMAGEFLAGS_u-boot.pbl = -n $(CONFIG_SYS_FSL_PBL_RCW) \
811 -R $(CONFIG_SYS_FSL_PBL_PBI) -T pblimage 808 -R $(CONFIG_SYS_FSL_PBL_PBI) -T pblimage
812 809
813 u-boot.img u-boot.kwb u-boot.pbl: u-boot.bin FORCE 810 u-boot.img u-boot.kwb u-boot.pbl: u-boot.bin FORCE
814 $(call if_changed,mkimage) 811 $(call if_changed,mkimage)
815 812
816 u-boot.imx: u-boot.bin 813 u-boot.imx: u-boot.bin
817 $(Q)$(MAKE) $(build)=arch/arm/imx-common $@ 814 $(Q)$(MAKE) $(build)=arch/arm/imx-common $@
818 815
819 u-boot.sha1: u-boot.bin 816 u-boot.sha1: u-boot.bin
820 tools/ubsha1 u-boot.bin 817 tools/ubsha1 u-boot.bin
821 818
822 u-boot.dis: u-boot 819 u-boot.dis: u-boot
823 $(OBJDUMP) -d $< > $@ 820 $(OBJDUMP) -d $< > $@
824 821
825 ifdef CONFIG_TPL 822 ifdef CONFIG_TPL
826 SPL_PAYLOAD := tpl/u-boot-with-tpl.bin 823 SPL_PAYLOAD := tpl/u-boot-with-tpl.bin
827 else 824 else
828 SPL_PAYLOAD := u-boot.bin 825 SPL_PAYLOAD := u-boot.bin
829 endif 826 endif
830 827
831 OBJCOPYFLAGS_u-boot-with-spl.bin = -I binary -O binary \ 828 OBJCOPYFLAGS_u-boot-with-spl.bin = -I binary -O binary \
832 --pad-to=$(CONFIG_SPL_PAD_TO) 829 --pad-to=$(CONFIG_SPL_PAD_TO)
833 u-boot-with-spl.bin: spl/u-boot-spl.bin $(SPL_PAYLOAD) FORCE 830 u-boot-with-spl.bin: spl/u-boot-spl.bin $(SPL_PAYLOAD) FORCE
834 $(call if_changed,pad_cat) 831 $(call if_changed,pad_cat)
835 832
836 OBJCOPYFLAGS_u-boot-with-tpl.bin = -I binary -O binary \ 833 OBJCOPYFLAGS_u-boot-with-tpl.bin = -I binary -O binary \
837 --pad-to=$(CONFIG_TPL_PAD_TO) 834 --pad-to=$(CONFIG_TPL_PAD_TO)
838 tpl/u-boot-with-tpl.bin: tpl/u-boot-tpl.bin u-boot.bin FORCE 835 tpl/u-boot-with-tpl.bin: tpl/u-boot-tpl.bin u-boot.bin FORCE
839 $(call if_changed,pad_cat) 836 $(call if_changed,pad_cat)
840 837
841 SPL: spl/u-boot-spl.bin FORCE 838 SPL: spl/u-boot-spl.bin FORCE
842 $(Q)$(MAKE) $(build)=arch/arm/imx-common $@ 839 $(Q)$(MAKE) $(build)=arch/arm/imx-common $@
843 840
844 u-boot-with-spl.imx u-boot-with-nand-spl.imx: SPL u-boot.bin FORCE 841 u-boot-with-spl.imx u-boot-with-nand-spl.imx: SPL u-boot.bin FORCE
845 $(Q)$(MAKE) $(build)=arch/arm/imx-common $@ 842 $(Q)$(MAKE) $(build)=arch/arm/imx-common $@
846 843
847 MKIMAGEFLAGS_u-boot.ubl = -n $(UBL_CONFIG) -T ublimage -e $(CONFIG_SYS_TEXT_BASE) 844 MKIMAGEFLAGS_u-boot.ubl = -n $(UBL_CONFIG) -T ublimage -e $(CONFIG_SYS_TEXT_BASE)
848 845
849 u-boot.ubl: u-boot-with-spl.bin FORCE 846 u-boot.ubl: u-boot-with-spl.bin FORCE
850 $(call if_changed,mkimage) 847 $(call if_changed,mkimage)
851 848
852 MKIMAGEFLAGS_u-boot-spl.ais = -s -n $(if $(CONFIG_AIS_CONFIG_FILE), \ 849 MKIMAGEFLAGS_u-boot-spl.ais = -s -n $(if $(CONFIG_AIS_CONFIG_FILE), \
853 $(srctree)/$(CONFIG_AIS_CONFIG_FILE:"%"=%),"/dev/null") \ 850 $(srctree)/$(CONFIG_AIS_CONFIG_FILE:"%"=%),"/dev/null") \
854 -T aisimage -e $(CONFIG_SPL_TEXT_BASE) 851 -T aisimage -e $(CONFIG_SPL_TEXT_BASE)
855 spl/u-boot-spl.ais: spl/u-boot-spl.bin FORCE 852 spl/u-boot-spl.ais: spl/u-boot-spl.bin FORCE
856 $(call if_changed,mkimage) 853 $(call if_changed,mkimage)
857 854
858 OBJCOPYFLAGS_u-boot.ais = -I binary -O binary --pad-to=$(CONFIG_SPL_MAX_SIZE) 855 OBJCOPYFLAGS_u-boot.ais = -I binary -O binary --pad-to=$(CONFIG_SPL_MAX_SIZE)
859 u-boot.ais: spl/u-boot-spl.ais u-boot.img FORCE 856 u-boot.ais: spl/u-boot-spl.ais u-boot.img FORCE
860 $(call if_changed,pad_cat) 857 $(call if_changed,pad_cat)
861 858
862 u-boot.sb: u-boot.bin spl/u-boot-spl.bin 859 u-boot.sb: u-boot.bin spl/u-boot-spl.bin
863 $(Q)$(MAKE) $(build)=arch/arm/cpu/arm926ejs/mxs $(objtree)/u-boot.sb 860 $(Q)$(MAKE) $(build)=arch/arm/cpu/arm926ejs/mxs $(objtree)/u-boot.sb
864 861
865 # On x600 (SPEAr600) U-Boot is appended to U-Boot SPL. 862 # On x600 (SPEAr600) U-Boot is appended to U-Boot SPL.
866 # Both images are created using mkimage (crc etc), so that the ROM 863 # Both images are created using mkimage (crc etc), so that the ROM
867 # bootloader can check its integrity. Padding needs to be done to the 864 # bootloader can check its integrity. Padding needs to be done to the
868 # SPL image (with mkimage header) and not the binary. Otherwise the resulting image 865 # SPL image (with mkimage header) and not the binary. Otherwise the resulting image
869 # which is loaded/copied by the ROM bootloader to SRAM doesn't fit. 866 # which is loaded/copied by the ROM bootloader to SRAM doesn't fit.
870 # The resulting image containing both U-Boot images is called u-boot.spr 867 # The resulting image containing both U-Boot images is called u-boot.spr
871 MKIMAGEFLAGS_u-boot-spl.img = -A $(ARCH) -T firmware -C none \ 868 MKIMAGEFLAGS_u-boot-spl.img = -A $(ARCH) -T firmware -C none \
872 -a $(CONFIG_SPL_TEXT_BASE) -e $(CONFIG_SPL_TEXT_BASE) -n XLOADER 869 -a $(CONFIG_SPL_TEXT_BASE) -e $(CONFIG_SPL_TEXT_BASE) -n XLOADER
873 spl/u-boot-spl.img: spl/u-boot-spl.bin FORCE 870 spl/u-boot-spl.img: spl/u-boot-spl.bin FORCE
874 $(call if_changed,mkimage) 871 $(call if_changed,mkimage)
875 872
876 OBJCOPYFLAGS_u-boot.spr = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) \ 873 OBJCOPYFLAGS_u-boot.spr = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) \
877 --gap-fill=0xff 874 --gap-fill=0xff
878 u-boot.spr: spl/u-boot-spl.img u-boot.img FORCE 875 u-boot.spr: spl/u-boot-spl.img u-boot.img FORCE
879 $(call if_changed,pad_cat) 876 $(call if_changed,pad_cat)
880 877
881 ifneq ($(CONFIG_TEGRA),) 878 ifneq ($(CONFIG_TEGRA),)
882 OBJCOPYFLAGS_u-boot-nodtb-tegra.bin = -O binary --pad-to=$(CONFIG_SYS_TEXT_BASE) 879 OBJCOPYFLAGS_u-boot-nodtb-tegra.bin = -O binary --pad-to=$(CONFIG_SYS_TEXT_BASE)
883 u-boot-nodtb-tegra.bin: spl/u-boot-spl u-boot.bin FORCE 880 u-boot-nodtb-tegra.bin: spl/u-boot-spl u-boot.bin FORCE
884 $(call if_changed,pad_cat) 881 $(call if_changed,pad_cat)
885 882
886 ifeq ($(CONFIG_OF_SEPARATE),y) 883 ifeq ($(CONFIG_OF_SEPARATE),y)
887 u-boot-dtb-tegra.bin: u-boot-nodtb-tegra.bin dts/dt.dtb FORCE 884 u-boot-dtb-tegra.bin: u-boot-nodtb-tegra.bin dts/dt.dtb FORCE
888 $(call if_changed,cat) 885 $(call if_changed,cat)
889 endif 886 endif
890 endif 887 endif
891 888
892 u-boot-img.bin: spl/u-boot-spl.bin u-boot.img FORCE 889 u-boot-img.bin: spl/u-boot-spl.bin u-boot.img FORCE
893 $(call if_changed,cat) 890 $(call if_changed,cat)
894 891
895 # PPC4xx needs the SPL at the end of the image, since the reset vector 892 # PPC4xx needs the SPL at the end of the image, since the reset vector
896 # is located at 0xfffffffc. So we can't use the "u-boot-img.bin" target 893 # is located at 0xfffffffc. So we can't use the "u-boot-img.bin" target
897 # and need to introduce a new build target with the full blown U-Boot 894 # and need to introduce a new build target with the full blown U-Boot
898 # at the start padded up to the start of the SPL image. And then concat 895 # at the start padded up to the start of the SPL image. And then concat
899 # the SPL image to the end. 896 # the SPL image to the end.
900 897
901 OBJCOPYFLAGS_u-boot-img-spl-at-end.bin := -I binary -O binary \ 898 OBJCOPYFLAGS_u-boot-img-spl-at-end.bin := -I binary -O binary \
902 --pad-to=$(CONFIG_UBOOT_PAD_TO) --gap-fill=0xff 899 --pad-to=$(CONFIG_UBOOT_PAD_TO) --gap-fill=0xff
903 u-boot-img-spl-at-end.bin: u-boot.img spl/u-boot-spl.bin FORCE 900 u-boot-img-spl-at-end.bin: u-boot.img spl/u-boot-spl.bin FORCE
904 $(call if_changed,pad_cat) 901 $(call if_changed,pad_cat)
905 902
906 # Create a new ELF from a raw binary file. This is useful for arm64 903 # Create a new ELF from a raw binary file. This is useful for arm64
907 # where static relocation needs to be performed on the raw binary, 904 # where static relocation needs to be performed on the raw binary,
908 # but certain simulators only accept an ELF file (but don't do the 905 # but certain simulators only accept an ELF file (but don't do the
909 # relocation). 906 # relocation).
910 # FIXME refactor dts/Makefile to share target/arch detection 907 # FIXME refactor dts/Makefile to share target/arch detection
911 u-boot.elf: u-boot.bin 908 u-boot.elf: u-boot.bin
912 @$(OBJCOPY) -B aarch64 -I binary -O elf64-littleaarch64 \ 909 @$(OBJCOPY) -B aarch64 -I binary -O elf64-littleaarch64 \
913 $< u-boot-elf.o 910 $< u-boot-elf.o
914 @$(LD) u-boot-elf.o -o $@ \ 911 @$(LD) u-boot-elf.o -o $@ \
915 --defsym=_start=$(CONFIG_SYS_TEXT_BASE) \ 912 --defsym=_start=$(CONFIG_SYS_TEXT_BASE) \
916 -Ttext=$(CONFIG_SYS_TEXT_BASE) 913 -Ttext=$(CONFIG_SYS_TEXT_BASE)
917 914
918 # Rule to link u-boot 915 # Rule to link u-boot
919 # May be overridden by arch/$(ARCH)/config.mk 916 # May be overridden by arch/$(ARCH)/config.mk
920 quiet_cmd_u-boot__ ?= LD $@ 917 quiet_cmd_u-boot__ ?= LD $@
921 cmd_u-boot__ ?= $(LD) $(LDFLAGS) $(LDFLAGS_u-boot) -o $@ \ 918 cmd_u-boot__ ?= $(LD) $(LDFLAGS) $(LDFLAGS_u-boot) -o $@ \
922 -T u-boot.lds $(u-boot-init) \ 919 -T u-boot.lds $(u-boot-init) \
923 --start-group $(u-boot-main) --end-group \ 920 --start-group $(u-boot-main) --end-group \
924 $(PLATFORM_LIBS) -Map u-boot.map 921 $(PLATFORM_LIBS) -Map u-boot.map
925 922
926 u-boot: $(u-boot-init) $(u-boot-main) u-boot.lds 923 u-boot: $(u-boot-init) $(u-boot-main) u-boot.lds
927 $(call if_changed,u-boot__) 924 $(call if_changed,u-boot__)
928 ifeq ($(CONFIG_KALLSYMS),y) 925 ifeq ($(CONFIG_KALLSYMS),y)
929 smap=`$(call SYSTEM_MAP,u-boot) | \ 926 smap=`$(call SYSTEM_MAP,u-boot) | \
930 awk '$$2 ~ /[tTwW]/ {printf $$1 $$3 "\\\\000"}'` ; \ 927 awk '$$2 ~ /[tTwW]/ {printf $$1 $$3 "\\\\000"}'` ; \
931 $(CC) $(c_flags) -DSYSTEM_MAP="\"$${smap}\"" \ 928 $(CC) $(c_flags) -DSYSTEM_MAP="\"$${smap}\"" \
932 -c $(srctree)/common/system_map.c -o common/system_map.o 929 -c $(srctree)/common/system_map.c -o common/system_map.o
933 $(call cmd,u-boot__) common/system_map.o 930 $(call cmd,u-boot__) common/system_map.o
934 endif 931 endif
935 932
936 # The actual objects are generated when descending, 933 # The actual objects are generated when descending,
937 # make sure no implicit rule kicks in 934 # make sure no implicit rule kicks in
938 $(sort $(u-boot-init) $(u-boot-main)): $(u-boot-dirs) ; 935 $(sort $(u-boot-init) $(u-boot-main)): $(u-boot-dirs) ;
939 936
940 # Handle descending into subdirectories listed in $(vmlinux-dirs) 937 # Handle descending into subdirectories listed in $(vmlinux-dirs)
941 # Preset locale variables to speed up the build process. Limit locale 938 # Preset locale variables to speed up the build process. Limit locale
942 # tweaks to this spot to avoid wrong language settings when running 939 # tweaks to this spot to avoid wrong language settings when running
943 # make menuconfig etc. 940 # make menuconfig etc.
944 # Error messages still appears in the original language 941 # Error messages still appears in the original language
945 942
946 PHONY += $(u-boot-dirs) 943 PHONY += $(u-boot-dirs)
947 $(u-boot-dirs): prepare scripts 944 $(u-boot-dirs): prepare scripts
948 $(Q)$(MAKE) $(build)=$@ 945 $(Q)$(MAKE) $(build)=$@
949 946
950 tools: prepare 947 tools: prepare
951 # The "tools" are needed early 948 # The "tools" are needed early
952 $(filter-out tools, $(u-boot-dirs)): tools 949 $(filter-out tools, $(u-boot-dirs)): tools
953 # The "examples" conditionally depend on U-Boot (say, when USE_PRIVATE_LIBGCC 950 # The "examples" conditionally depend on U-Boot (say, when USE_PRIVATE_LIBGCC
954 # is "yes"), so compile examples after U-Boot is compiled. 951 # is "yes"), so compile examples after U-Boot is compiled.
955 examples: $(filter-out examples, $(u-boot-dirs)) 952 examples: $(filter-out examples, $(u-boot-dirs))
956 953
957 define filechk_uboot.release 954 define filechk_uboot.release
958 echo "$(UBOOTVERSION)$$($(CONFIG_SHELL) $(srctree)/scripts/setlocalversion $(srctree))" 955 echo "$(UBOOTVERSION)$$($(CONFIG_SHELL) $(srctree)/scripts/setlocalversion $(srctree))"
959 endef 956 endef
960 957
961 # Store (new) UBOOTRELEASE string in include/config/uboot.release 958 # Store (new) UBOOTRELEASE string in include/config/uboot.release
962 include/config/uboot.release: Makefile FORCE 959 include/config/uboot.release: Makefile FORCE
963 $(call filechk,uboot.release) 960 $(call filechk,uboot.release)
964 961
965 962
966 # Things we need to do before we recursively start building the kernel 963 # Things we need to do before we recursively start building the kernel
967 # or the modules are listed in "prepare". 964 # or the modules are listed in "prepare".
968 # A multi level approach is used. prepareN is processed before prepareN-1. 965 # A multi level approach is used. prepareN is processed before prepareN-1.
969 # archprepare is used in arch Makefiles and when processed asm symlink, 966 # archprepare is used in arch Makefiles and when processed asm symlink,
970 # version.h and scripts_basic is processed / created. 967 # version.h and scripts_basic is processed / created.
971 968
972 # Listed in dependency order 969 # Listed in dependency order
973 PHONY += prepare archprepare prepare0 prepare1 prepare2 prepare3 970 PHONY += prepare archprepare prepare0 prepare1 prepare2 prepare3
974 971
975 # prepare3 is used to check if we are building in a separate output directory, 972 # prepare3 is used to check if we are building in a separate output directory,
976 # and if so do: 973 # and if so do:
977 # 1) Check that make has not been executed in the kernel src $(srctree) 974 # 1) Check that make has not been executed in the kernel src $(srctree)
978 prepare3: include/config/uboot.release 975 prepare3: include/config/uboot.release
979 ifneq ($(KBUILD_SRC),) 976 ifneq ($(KBUILD_SRC),)
980 @$(kecho) ' Using $(srctree) as source for u-boot' 977 @$(kecho) ' Using $(srctree) as source for u-boot'
981 $(Q)if [ -f $(srctree)/include/config.mk ]; then \ 978 $(Q)if [ -f $(srctree)/include/config.mk ]; then \
982 echo >&2 " $(srctree) is not clean, please run 'make mrproper'"; \ 979 echo >&2 " $(srctree) is not clean, please run 'make mrproper'"; \
983 echo >&2 " in the '$(srctree)' directory.";\ 980 echo >&2 " in the '$(srctree)' directory.";\
984 /bin/false; \ 981 /bin/false; \
985 fi; 982 fi;
986 endif 983 endif
987 984
988 # prepare2 creates a makefile if using a separate output directory 985 # prepare2 creates a makefile if using a separate output directory
989 prepare2: prepare3 outputmakefile 986 prepare2: prepare3 outputmakefile
990 987
991 prepare1: prepare2 $(version_h) $(timestamp_h) 988 prepare1: prepare2 $(version_h) $(timestamp_h)
992 ifeq ($(__HAVE_ARCH_GENERIC_BOARD),) 989 ifeq ($(__HAVE_ARCH_GENERIC_BOARD),)
993 ifeq ($(CONFIG_SYS_GENERIC_BOARD),y) 990 ifeq ($(CONFIG_SYS_GENERIC_BOARD),y)
994 @echo >&2 " Your architecture does not support generic board." 991 @echo >&2 " Your architecture does not support generic board."
995 @echo >&2 " Please undefine CONFIG_SYS_GENERIC_BOARD in your board config file." 992 @echo >&2 " Please undefine CONFIG_SYS_GENERIC_BOARD in your board config file."
996 @/bin/false 993 @/bin/false
997 endif 994 endif
995 endif
996 ifeq ($(wildcard $(LDSCRIPT)),)
997 @echo >&2 " Could not find linker script."
998 @/bin/false
998 endif 999 endif
999 1000
1000 archprepare: prepare1 scripts_basic 1001 archprepare: prepare1 scripts_basic
1001 1002
1002 prepare0: archprepare FORCE 1003 prepare0: archprepare FORCE
1003 $(Q)$(MAKE) $(build)=. 1004 $(Q)$(MAKE) $(build)=.
1004 1005
1005 # All the preparing.. 1006 # All the preparing..
1006 prepare: prepare0 1007 prepare: prepare0
1007 1008
1008 # Generate some files 1009 # Generate some files
1009 # --------------------------------------------------------------------------- 1010 # ---------------------------------------------------------------------------
1010 1011
1011 define filechk_version.h 1012 define filechk_version.h
1012 (echo \#define PLAIN_VERSION \"$(UBOOTRELEASE)\"; \ 1013 (echo \#define PLAIN_VERSION \"$(UBOOTRELEASE)\"; \
1013 echo \#define U_BOOT_VERSION \"U-Boot \" PLAIN_VERSION; \ 1014 echo \#define U_BOOT_VERSION \"U-Boot \" PLAIN_VERSION; \
1014 echo \#define CC_VERSION_STRING \"$$($(CC) --version | head -n 1)\"; \ 1015 echo \#define CC_VERSION_STRING \"$$($(CC) --version | head -n 1)\"; \
1015 echo \#define LD_VERSION_STRING \"$$($(LD) --version | head -n 1)\"; ) 1016 echo \#define LD_VERSION_STRING \"$$($(LD) --version | head -n 1)\"; )
1016 endef 1017 endef
1017 1018
1018 define filechk_timestamp.h 1019 define filechk_timestamp.h
1019 (LC_ALL=C date +'#define U_BOOT_DATE "%b %d %C%y"'; \ 1020 (LC_ALL=C date +'#define U_BOOT_DATE "%b %d %C%y"'; \
1020 LC_ALL=C date +'#define U_BOOT_TIME "%T"') 1021 LC_ALL=C date +'#define U_BOOT_TIME "%T"')
1021 endef 1022 endef
1022 1023
1023 $(version_h): $(srctree)/Makefile FORCE 1024 $(version_h): $(srctree)/Makefile FORCE
1024 $(call filechk,version.h) 1025 $(call filechk,version.h)
1025 1026
1026 $(timestamp_h): $(srctree)/Makefile FORCE 1027 $(timestamp_h): $(srctree)/Makefile FORCE
1027 $(call filechk,timestamp.h) 1028 $(call filechk,timestamp.h)
1028 1029
1029 # 1030 #
1030 # Auto-generate the autoconf.mk file (which is included by all makefiles) 1031 # Auto-generate the autoconf.mk file (which is included by all makefiles)
1031 # 1032 #
1032 # This target actually generates 2 files; autoconf.mk and autoconf.mk.dep. 1033 # This target actually generates 2 files; autoconf.mk and autoconf.mk.dep.
1033 # the dep file is only include in this top level makefile to determine when 1034 # the dep file is only include in this top level makefile to determine when
1034 # to regenerate the autoconf.mk file. 1035 # to regenerate the autoconf.mk file.
1035 1036
1036 quiet_cmd_autoconf_dep = GEN $@ 1037 quiet_cmd_autoconf_dep = GEN $@
1037 cmd_autoconf_dep = $(CC) -x c -DDO_DEPS_ONLY -M $(c_flags) \ 1038 cmd_autoconf_dep = $(CC) -x c -DDO_DEPS_ONLY -M $(c_flags) \
1038 -MQ include/autoconf.mk $(srctree)/include/common.h > $@ || rm $@ 1039 -MQ include/autoconf.mk $(srctree)/include/common.h > $@ || rm $@
1039 1040
1040 include/autoconf.mk.dep: include/config.h include/common.h 1041 include/autoconf.mk.dep: include/config.h include/common.h
1041 $(call cmd,autoconf_dep) 1042 $(call cmd,autoconf_dep)
1042 1043
1043 quiet_cmd_autoconf = GEN $@ 1044 quiet_cmd_autoconf = GEN $@
1044 cmd_autoconf = \ 1045 cmd_autoconf = \
1045 $(CPP) $(c_flags) -DDO_DEPS_ONLY -dM $(srctree)/include/common.h > $@.tmp && \ 1046 $(CPP) $(c_flags) -DDO_DEPS_ONLY -dM $(srctree)/include/common.h > $@.tmp && \
1046 sed -n -f $(srctree)/tools/scripts/define2mk.sed $@.tmp > $@; \ 1047 sed -n -f $(srctree)/tools/scripts/define2mk.sed $@.tmp > $@; \
1047 rm $@.tmp 1048 rm $@.tmp
1048 1049
1049 include/autoconf.mk: include/config.h 1050 include/autoconf.mk: include/config.h
1050 $(call cmd,autoconf) 1051 $(call cmd,autoconf)
1051 1052
1052 # --------------------------------------------------------------------------- 1053 # ---------------------------------------------------------------------------
1053 1054
1054 PHONY += depend dep 1055 PHONY += depend dep
1055 depend dep: 1056 depend dep:
1056 @echo '*** Warning: make $@ is unnecessary now.' 1057 @echo '*** Warning: make $@ is unnecessary now.'
1057 1058
1058 # --------------------------------------------------------------------------- 1059 # ---------------------------------------------------------------------------
1059 quiet_cmd_cpp_lds = LDS $@ 1060 quiet_cmd_cpp_lds = LDS $@
1060 cmd_cpp_lds = $(CPP) $(cpp_flags) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ \ 1061 cmd_cpp_lds = $(CPP) $(cpp_flags) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ \
1061 -x assembler-with-cpp -P -o $@ $< 1062 -x assembler-with-cpp -P -o $@ $<
1062 1063
1063 u-boot.lds: $(LDSCRIPT) prepare FORCE 1064 u-boot.lds: $(LDSCRIPT) prepare FORCE
1064 $(call if_changed,cpp_lds) 1065 $(call if_changed,cpp_lds)
1065 1066
1066 PHONY += nand_spl 1067 PHONY += nand_spl
1067 nand_spl: prepare 1068 nand_spl: prepare
1068 $(Q)$(MAKE) $(build)=nand_spl/board/$(BOARDDIR) all 1069 $(Q)$(MAKE) $(build)=nand_spl/board/$(BOARDDIR) all
1069 1070
1070 nand_spl/u-boot-spl-16k.bin: nand_spl 1071 nand_spl/u-boot-spl-16k.bin: nand_spl
1071 @: 1072 @:
1072 1073
1073 u-boot-nand.bin: nand_spl/u-boot-spl-16k.bin u-boot.bin FORCE 1074 u-boot-nand.bin: nand_spl/u-boot-spl-16k.bin u-boot.bin FORCE
1074 $(call if_changed,cat) 1075 $(call if_changed,cat)
1075 1076
1076 spl/u-boot-spl.bin: spl/u-boot-spl 1077 spl/u-boot-spl.bin: spl/u-boot-spl
1077 @: 1078 @:
1078 spl/u-boot-spl: tools prepare 1079 spl/u-boot-spl: tools prepare
1079 $(Q)$(MAKE) obj=spl -f $(srctree)/spl/Makefile all 1080 $(Q)$(MAKE) obj=spl -f $(srctree)/spl/Makefile all
1080 1081
1081 tpl/u-boot-tpl.bin: tools prepare 1082 tpl/u-boot-tpl.bin: tools prepare
1082 $(Q)$(MAKE) obj=tpl -f $(srctree)/spl/Makefile all CONFIG_TPL_BUILD=y 1083 $(Q)$(MAKE) obj=tpl -f $(srctree)/spl/Makefile all CONFIG_TPL_BUILD=y
1083 1084
1084 TAG_SUBDIRS := $(u-boot-dirs) include 1085 TAG_SUBDIRS := $(u-boot-dirs) include
1085 1086
1086 FIND := find 1087 FIND := find
1087 FINDFLAGS := -L 1088 FINDFLAGS := -L
1088 1089
1089 tags ctags: 1090 tags ctags:
1090 ctags -w -o ctags `$(FIND) $(FINDFLAGS) $(TAG_SUBDIRS) \ 1091 ctags -w -o ctags `$(FIND) $(FINDFLAGS) $(TAG_SUBDIRS) \
1091 -name '*.[chS]' -print` 1092 -name '*.[chS]' -print`
1092 1093
1093 etags: 1094 etags:
1094 etags -a -o $(obj)etags `$(FIND) $(FINDFLAGS) $(TAG_SUBDIRS) \ 1095 etags -a -o $(obj)etags `$(FIND) $(FINDFLAGS) $(TAG_SUBDIRS) \
1095 -name '*.[chS]' -print` 1096 -name '*.[chS]' -print`
1096 cscope: 1097 cscope:
1097 $(FIND) $(FINDFLAGS) $(TAG_SUBDIRS) -name '*.[chS]' -print > \ 1098 $(FIND) $(FINDFLAGS) $(TAG_SUBDIRS) -name '*.[chS]' -print > \
1098 cscope.files 1099 cscope.files
1099 cscope -b -q -k 1100 cscope -b -q -k
1100 1101
1101 SYSTEM_MAP = \ 1102 SYSTEM_MAP = \
1102 $(NM) $1 | \ 1103 $(NM) $1 | \
1103 grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \ 1104 grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
1104 LC_ALL=C sort 1105 LC_ALL=C sort
1105 System.map: u-boot 1106 System.map: u-boot
1106 @$(call SYSTEM_MAP,$<) > $@ 1107 @$(call SYSTEM_MAP,$<) > $@
1107 1108
1108 checkthumb: 1109 checkthumb:
1109 @if test $(call cc-version) -lt 0404; then \ 1110 @if test $(call cc-version) -lt 0404; then \
1110 echo -n '*** Your GCC does not produce working '; \ 1111 echo -n '*** Your GCC does not produce working '; \
1111 echo 'binaries in THUMB mode.'; \ 1112 echo 'binaries in THUMB mode.'; \
1112 echo '*** Your board is configured for THUMB mode.'; \ 1113 echo '*** Your board is configured for THUMB mode.'; \
1113 false; \ 1114 false; \
1114 fi 1115 fi
1115 1116
1116 # GCC 3.x is reported to have problems generating the type of relocation 1117 # GCC 3.x is reported to have problems generating the type of relocation
1117 # that U-Boot wants. 1118 # that U-Boot wants.
1118 # See http://lists.denx.de/pipermail/u-boot/2012-September/135156.html 1119 # See http://lists.denx.de/pipermail/u-boot/2012-September/135156.html
1119 checkgcc4: 1120 checkgcc4:
1120 @if test $(call cc-version) -lt 0400; then \ 1121 @if test $(call cc-version) -lt 0400; then \
1121 echo -n '*** Your GCC is too old, please upgrade to GCC 4.x or newer'; \ 1122 echo -n '*** Your GCC is too old, please upgrade to GCC 4.x or newer'; \
1122 false; \ 1123 false; \
1123 fi 1124 fi
1124 1125
1125 checkdtc: 1126 checkdtc:
1126 @if test $(call dtc-version) -lt 0104; then \ 1127 @if test $(call dtc-version) -lt 0104; then \
1127 echo '*** Your dtc is too old, please upgrade to dtc 1.4 or newer'; \ 1128 echo '*** Your dtc is too old, please upgrade to dtc 1.4 or newer'; \
1128 false; \ 1129 false; \
1129 fi 1130 fi
1130 1131
1131 ######################################################################### 1132 #########################################################################
1132 1133
1133 # ARM relocations should all be R_ARM_RELATIVE (32-bit) or 1134 # ARM relocations should all be R_ARM_RELATIVE (32-bit) or
1134 # R_AARCH64_RELATIVE (64-bit). 1135 # R_AARCH64_RELATIVE (64-bit).
1135 checkarmreloc: u-boot 1136 checkarmreloc: u-boot
1136 @RELOC="`$(CROSS_COMPILE)readelf -r -W $< | cut -d ' ' -f 4 | \ 1137 @RELOC="`$(CROSS_COMPILE)readelf -r -W $< | cut -d ' ' -f 4 | \
1137 grep R_A | sort -u`"; \ 1138 grep R_A | sort -u`"; \
1138 if test "$$RELOC" != "R_ARM_RELATIVE" -a \ 1139 if test "$$RELOC" != "R_ARM_RELATIVE" -a \
1139 "$$RELOC" != "R_AARCH64_RELATIVE"; then \ 1140 "$$RELOC" != "R_AARCH64_RELATIVE"; then \
1140 echo "$< contains unexpected relocations: $$RELOC"; \ 1141 echo "$< contains unexpected relocations: $$RELOC"; \
1141 false; \ 1142 false; \
1142 fi 1143 fi
1143 1144
1144 env: scripts_basic 1145 env: scripts_basic
1145 $(Q)$(MAKE) $(build)=tools/$@ 1146 $(Q)$(MAKE) $(build)=tools/$@
1146 1147
1147 tools-all: HOST_TOOLS_ALL=y 1148 tools-all: HOST_TOOLS_ALL=y
1148 tools-all: env tools ; 1149 tools-all: env tools ;
1149 1150
1150 .PHONY : CHANGELOG 1151 .PHONY : CHANGELOG
1151 CHANGELOG: 1152 CHANGELOG:
1152 git log --no-merges U-Boot-1_1_5.. | \ 1153 git log --no-merges U-Boot-1_1_5.. | \
1153 unexpand -a | sed -e 's/\s\s*$$//' > $@ 1154 unexpand -a | sed -e 's/\s\s*$$//' > $@
1154 1155
1155 include/license.h: tools/bin2header COPYING 1156 include/license.h: tools/bin2header COPYING
1156 cat COPYING | gzip -9 -c | ./tools/bin2header license_gzip > include/license.h 1157 cat COPYING | gzip -9 -c | ./tools/bin2header license_gzip > include/license.h
1157 ######################################################################### 1158 #########################################################################
1158 1159
1159 ### 1160 ###
1160 # Cleaning is done on three levels. 1161 # Cleaning is done on three levels.
1161 # make clean Delete most generated files 1162 # make clean Delete most generated files
1162 # Leave enough to build external modules 1163 # Leave enough to build external modules
1163 # make mrproper Delete the current configuration, and all generated files 1164 # make mrproper Delete the current configuration, and all generated files
1164 # make distclean Remove editor backup files, patch leftover files and the like 1165 # make distclean Remove editor backup files, patch leftover files and the like
1165 1166
1166 # Directories & files removed with 'make clean' 1167 # Directories & files removed with 'make clean'
1167 CLEAN_DIRS += $(MODVERDIR) 1168 CLEAN_DIRS += $(MODVERDIR)
1168 CLEAN_FILES += u-boot.lds include/bmp_logo.h include/bmp_logo_data.h \ 1169 CLEAN_FILES += u-boot.lds include/bmp_logo.h include/bmp_logo_data.h \
1169 board/*/config.tmp board/*/*/config.tmp \ 1170 board/*/config.tmp board/*/*/config.tmp \
1170 include/autoconf.mk* include/spl-autoconf.mk \ 1171 include/autoconf.mk* include/spl-autoconf.mk \
1171 include/tpl-autoconf.mk 1172 include/tpl-autoconf.mk
1172 1173
1173 # Directories & files removed with 'make clobber' 1174 # Directories & files removed with 'make clobber'
1174 CLOBBER_DIRS += $(patsubst %,spl/%, $(filter-out Makefile, \ 1175 CLOBBER_DIRS += $(patsubst %,spl/%, $(filter-out Makefile, \
1175 $(shell ls -1 spl 2>/dev/null))) \ 1176 $(shell ls -1 spl 2>/dev/null))) \
1176 tpl 1177 tpl
1177 CLOBBER_FILES += u-boot* MLO* SPL System.map nand_spl/u-boot* 1178 CLOBBER_FILES += u-boot* MLO* SPL System.map nand_spl/u-boot*
1178 1179
1179 # Directories & files removed with 'make mrproper' 1180 # Directories & files removed with 'make mrproper'
1180 MRPROPER_DIRS += include/config include/generated 1181 MRPROPER_DIRS += include/config include/generated
1181 MRPROPER_FILES += .config .config.old \ 1182 MRPROPER_FILES += .config .config.old \
1182 tags TAGS cscope* GPATH GTAGS GRTAGS GSYMS \ 1183 tags TAGS cscope* GPATH GTAGS GRTAGS GSYMS \
1183 include/config.h include/config.mk 1184 include/config.h include/config.mk
1184 1185
1185 # clean - Delete most, but leave enough to build external modules 1186 # clean - Delete most, but leave enough to build external modules
1186 # 1187 #
1187 clean: rm-dirs := $(CLEAN_DIRS) 1188 clean: rm-dirs := $(CLEAN_DIRS)
1188 clean: rm-files := $(CLEAN_FILES) 1189 clean: rm-files := $(CLEAN_FILES)
1189 1190
1190 clean-dirs := $(foreach f,$(u-boot-alldirs),$(if $(wildcard $f/Makefile),$f)) 1191 clean-dirs := $(foreach f,$(u-boot-alldirs),$(if $(wildcard $f/Makefile),$f))
1191 1192
1192 clean-dirs := $(addprefix _clean_, $(clean-dirs) doc/DocBook) 1193 clean-dirs := $(addprefix _clean_, $(clean-dirs) doc/DocBook)
1193 1194
1194 PHONY += $(clean-dirs) clean archclean 1195 PHONY += $(clean-dirs) clean archclean
1195 $(clean-dirs): 1196 $(clean-dirs):
1196 $(Q)$(MAKE) $(clean)=$(patsubst _clean_%,%,$@) 1197 $(Q)$(MAKE) $(clean)=$(patsubst _clean_%,%,$@)
1197 1198
1198 # TODO: Do not use *.cfgtmp 1199 # TODO: Do not use *.cfgtmp
1199 clean: $(clean-dirs) 1200 clean: $(clean-dirs)
1200 $(call cmd,rmdirs) 1201 $(call cmd,rmdirs)
1201 $(call cmd,rmfiles) 1202 $(call cmd,rmfiles)
1202 @find $(if $(KBUILD_EXTMOD), $(KBUILD_EXTMOD), .) $(RCS_FIND_IGNORE) \ 1203 @find $(if $(KBUILD_EXTMOD), $(KBUILD_EXTMOD), .) $(RCS_FIND_IGNORE) \
1203 \( -name '*.[oas]' -o -name '*.ko' -o -name '.*.cmd' \ 1204 \( -name '*.[oas]' -o -name '*.ko' -o -name '.*.cmd' \
1204 -o -name '*.ko.*' -o -name '*.su' -o -name '*.cfgtmp' \ 1205 -o -name '*.ko.*' -o -name '*.su' -o -name '*.cfgtmp' \
1205 -o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \ 1206 -o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \
1206 -o -name '*.symtypes' -o -name 'modules.order' \ 1207 -o -name '*.symtypes' -o -name 'modules.order' \
1207 -o -name modules.builtin -o -name '.tmp_*.o.*' \ 1208 -o -name modules.builtin -o -name '.tmp_*.o.*' \
1208 -o -name '*.gcno' \) -type f -print | xargs rm -f 1209 -o -name '*.gcno' \) -type f -print | xargs rm -f
1209 @find $(if $(KBUILD_EXTMOD), $(KBUILD_EXTMOD), .) $(RCS_FIND_IGNORE) \ 1210 @find $(if $(KBUILD_EXTMOD), $(KBUILD_EXTMOD), .) $(RCS_FIND_IGNORE) \
1210 -path './nand_spl/*' -type l -print | xargs rm -f 1211 -path './nand_spl/*' -type l -print | xargs rm -f
1211 1212
1212 # clobber 1213 # clobber
1213 # 1214 #
1214 clobber: rm-dirs := $(CLOBBER_DIRS) 1215 clobber: rm-dirs := $(CLOBBER_DIRS)
1215 clobber: rm-files := $(CLOBBER_FILES) 1216 clobber: rm-files := $(CLOBBER_FILES)
1216 1217
1217 PHONY += clobber 1218 PHONY += clobber
1218 1219
1219 clobber: clean 1220 clobber: clean
1220 $(call cmd,rmdirs) 1221 $(call cmd,rmdirs)
1221 $(call cmd,rmfiles) 1222 $(call cmd,rmfiles)
1222 1223
1223 # mrproper - Delete all generated files, including .config 1224 # mrproper - Delete all generated files, including .config
1224 # 1225 #
1225 mrproper: rm-dirs := $(wildcard $(MRPROPER_DIRS)) 1226 mrproper: rm-dirs := $(wildcard $(MRPROPER_DIRS))
1226 mrproper: rm-files := $(wildcard $(MRPROPER_FILES)) 1227 mrproper: rm-files := $(wildcard $(MRPROPER_FILES))
1227 mrproper-dirs := $(addprefix _mrproper_,scripts) 1228 mrproper-dirs := $(addprefix _mrproper_,scripts)
1228 1229
1229 PHONY += $(mrproper-dirs) mrproper archmrproper 1230 PHONY += $(mrproper-dirs) mrproper archmrproper
1230 $(mrproper-dirs): 1231 $(mrproper-dirs):
1231 $(Q)$(MAKE) $(clean)=$(patsubst _mrproper_%,%,$@) 1232 $(Q)$(MAKE) $(clean)=$(patsubst _mrproper_%,%,$@)
1232 1233
1233 mrproper: clobber $(mrproper-dirs) 1234 mrproper: clobber $(mrproper-dirs)
1234 $(call cmd,rmdirs) 1235 $(call cmd,rmdirs)
1235 $(call cmd,rmfiles) 1236 $(call cmd,rmfiles)
1236 @rm -f arch/*/include/asm/arch arch/*/include/asm/proc 1237 @rm -f arch/*/include/asm/arch arch/*/include/asm/proc
1237 1238
1238 # distclean 1239 # distclean
1239 # 1240 #
1240 PHONY += distclean 1241 PHONY += distclean
1241 1242
1242 distclean: mrproper 1243 distclean: mrproper
1243 @find $(srctree) $(RCS_FIND_IGNORE) \ 1244 @find $(srctree) $(RCS_FIND_IGNORE) \
1244 \( -name '*.orig' -o -name '*.rej' -o -name '*~' \ 1245 \( -name '*.orig' -o -name '*.rej' -o -name '*~' \
1245 -o -name '*.bak' -o -name '#*#' -o -name '.*.orig' \ 1246 -o -name '*.bak' -o -name '#*#' -o -name '.*.orig' \
1246 -o -name '.*.rej' \ 1247 -o -name '.*.rej' \
1247 -o -name '*%' -o -name '.*.cmd' -o -name 'core' \) \ 1248 -o -name '*%' -o -name '.*.cmd' -o -name 'core' \) \
1248 -type f -print | xargs rm -f 1249 -type f -print | xargs rm -f
1249 1250
1250 backup: 1251 backup:
1251 F=`basename $(TOPDIR)` ; cd .. ; \ 1252 F=`basename $(TOPDIR)` ; cd .. ; \
1252 gtar --force-local -zcvf `LC_ALL=C date "+$$F-%Y-%m-%d-%T.tar.gz"` $$F 1253 gtar --force-local -zcvf `LC_ALL=C date "+$$F-%Y-%m-%d-%T.tar.gz"` $$F
1253 1254
1254 help: 1255 help:
1255 @echo 'Cleaning targets:' 1256 @echo 'Cleaning targets:'
1256 @echo ' clean - Remove most generated files but keep the config and' 1257 @echo ' clean - Remove most generated files but keep the config and'
1257 @echo ' necessities for testing u-boot' 1258 @echo ' necessities for testing u-boot'
1258 @echo ' clobber - Remove most generated files but keep the config' 1259 @echo ' clobber - Remove most generated files but keep the config'
1259 @echo ' mrproper - Remove all generated files + config + various backup files' 1260 @echo ' mrproper - Remove all generated files + config + various backup files'
1260 @echo ' distclean - mrproper + remove editor backup and patch files' 1261 @echo ' distclean - mrproper + remove editor backup and patch files'
1261 @echo '' 1262 @echo ''
1262 # uncomment after adding Kconfig feature 1263 # uncomment after adding Kconfig feature
1263 # @echo 'Configuration targets:' 1264 # @echo 'Configuration targets:'
1264 # @$(MAKE) -f $(srctree)/scripts/kconfig/Makefile help 1265 # @$(MAKE) -f $(srctree)/scripts/kconfig/Makefile help
1265 # @echo '' 1266 # @echo ''
1266 @echo 'Other generic targets:' 1267 @echo 'Other generic targets:'
1267 @echo ' all - Build all necessary images depending on configuration' 1268 @echo ' all - Build all necessary images depending on configuration'
1268 @echo ' u-boot - Build the bare u-boot' 1269 @echo ' u-boot - Build the bare u-boot'
1269 @echo ' dir/ - Build all files in dir and below' 1270 @echo ' dir/ - Build all files in dir and below'
1270 @echo ' dir/file.[oisS] - Build specified target only' 1271 @echo ' dir/file.[oisS] - Build specified target only'
1271 @echo ' dir/file.lst - Build specified mixed source/assembly target only' 1272 @echo ' dir/file.lst - Build specified mixed source/assembly target only'
1272 @echo ' (requires a recent binutils and recent build (System.map))' 1273 @echo ' (requires a recent binutils and recent build (System.map))'
1273 @echo ' tags/TAGS - Generate tags file for editors' 1274 @echo ' tags/TAGS - Generate tags file for editors'
1274 @echo ' cscope - Generate cscope index' 1275 @echo ' cscope - Generate cscope index'
1275 @echo ' ubootrelease - Output the release version string' 1276 @echo ' ubootrelease - Output the release version string'
1276 @echo ' ubootversion - Output the version stored in Makefile' 1277 @echo ' ubootversion - Output the version stored in Makefile'
1277 @echo '' 1278 @echo ''
1278 @echo 'Static analysers' 1279 @echo 'Static analysers'
1279 @echo ' checkstack - Generate a list of stack hogs' 1280 @echo ' checkstack - Generate a list of stack hogs'
1280 @echo '' 1281 @echo ''
1281 @echo 'Documentation targets:' 1282 @echo 'Documentation targets:'
1282 @$(MAKE) -f $(srctree)/doc/DocBook/Makefile dochelp 1283 @$(MAKE) -f $(srctree)/doc/DocBook/Makefile dochelp
1283 @echo '' 1284 @echo ''
1284 @echo ' make V=0|1 [targets] 0 => quiet build (default), 1 => verbose build' 1285 @echo ' make V=0|1 [targets] 0 => quiet build (default), 1 => verbose build'
1285 @echo ' make V=2 [targets] 2 => give reason for rebuild of target' 1286 @echo ' make V=2 [targets] 2 => give reason for rebuild of target'
1286 @echo ' make O=dir [targets] Locate all output files in "dir", including .config' 1287 @echo ' make O=dir [targets] Locate all output files in "dir", including .config'
1287 @echo ' make C=1 [targets] Check all c source with $$CHECK (sparse by default)' 1288 @echo ' make C=1 [targets] Check all c source with $$CHECK (sparse by default)'
1288 @echo ' make C=2 [targets] Force check of all c source with $$CHECK' 1289 @echo ' make C=2 [targets] Force check of all c source with $$CHECK'
1289 @echo ' make RECORDMCOUNT_WARN=1 [targets] Warn about ignored mcount sections' 1290 @echo ' make RECORDMCOUNT_WARN=1 [targets] Warn about ignored mcount sections'
1290 @echo ' make W=n [targets] Enable extra gcc checks, n=1,2,3 where' 1291 @echo ' make W=n [targets] Enable extra gcc checks, n=1,2,3 where'
1291 @echo ' 1: warnings which may be relevant and do not occur too often' 1292 @echo ' 1: warnings which may be relevant and do not occur too often'
1292 @echo ' 2: warnings which occur quite often but may still be relevant' 1293 @echo ' 2: warnings which occur quite often but may still be relevant'
1293 @echo ' 3: more obscure warnings, can most likely be ignored' 1294 @echo ' 3: more obscure warnings, can most likely be ignored'
1294 @echo ' Multiple levels can be combined with W=12 or W=123' 1295 @echo ' Multiple levels can be combined with W=12 or W=123'
1295 @echo '' 1296 @echo ''
1296 @echo 'Execute "make" or "make all" to build all targets marked with [*] ' 1297 @echo 'Execute "make" or "make all" to build all targets marked with [*] '
1297 @echo 'For further info see the ./README file' 1298 @echo 'For further info see the ./README file'
1298 1299
1299 1300
1300 # Documentation targets 1301 # Documentation targets
1301 # --------------------------------------------------------------------------- 1302 # ---------------------------------------------------------------------------
1302 %docs: scripts_basic FORCE 1303 %docs: scripts_basic FORCE
1303 $(Q)$(MAKE) $(build)=scripts build_docproc 1304 $(Q)$(MAKE) $(build)=scripts build_docproc
1304 $(Q)$(MAKE) $(build)=doc/DocBook $@ 1305 $(Q)$(MAKE) $(build)=doc/DocBook $@
1305 1306
1306 # Dummies... 1307 # Dummies...
1307 PHONY += prepare scripts 1308 PHONY += prepare scripts
1308 prepare: ; 1309 prepare: ;
1309 scripts: ; 1310 scripts: ;
1310 1311
1311 endif #ifeq ($(config-targets),1) 1312 endif #ifeq ($(config-targets),1)
1312 endif #ifeq ($(mixed-targets),1) 1313 endif #ifeq ($(mixed-targets),1)
1313 1314
1314 PHONY += checkstack ubootrelease ubootversion 1315 PHONY += checkstack ubootrelease ubootversion
1315 1316
1316 checkstack: 1317 checkstack:
1317 $(OBJDUMP) -d u-boot $$(find . -name u-boot-spl) | \ 1318 $(OBJDUMP) -d u-boot $$(find . -name u-boot-spl) | \
1318 $(PERL) $(src)/scripts/checkstack.pl $(ARCH) 1319 $(PERL) $(src)/scripts/checkstack.pl $(ARCH)
1319 1320
1320 ubootrelease: 1321 ubootrelease:
1321 @echo "$(UBOOTVERSION)$$($(CONFIG_SHELL) $(srctree)/scripts/setlocalversion $(srctree))" 1322 @echo "$(UBOOTVERSION)$$($(CONFIG_SHELL) $(srctree)/scripts/setlocalversion $(srctree))"
1322 1323
1323 ubootversion: 1324 ubootversion:
1324 @echo $(UBOOTVERSION) 1325 @echo $(UBOOTVERSION)
1325 1326
1326 # Single targets 1327 # Single targets
1327 # --------------------------------------------------------------------------- 1328 # ---------------------------------------------------------------------------
1328 # Single targets are compatible with: 1329 # Single targets are compatible with:
1329 # - build with mixed source and output 1330 # - build with mixed source and output
1330 # - build with separate output dir 'make O=...' 1331 # - build with separate output dir 'make O=...'
1331 # - external modules 1332 # - external modules
1332 # 1333 #
1333 # target-dir => where to store outputfile 1334 # target-dir => where to store outputfile
1334 # build-dir => directory in kernel source tree to use 1335 # build-dir => directory in kernel source tree to use
1335 1336
1336 ifeq ($(KBUILD_EXTMOD),) 1337 ifeq ($(KBUILD_EXTMOD),)
1337 build-dir = $(patsubst %/,%,$(dir $@)) 1338 build-dir = $(patsubst %/,%,$(dir $@))
1338 target-dir = $(dir $@) 1339 target-dir = $(dir $@)
1339 else 1340 else
1340 zap-slash=$(filter-out .,$(patsubst %/,%,$(dir $@))) 1341 zap-slash=$(filter-out .,$(patsubst %/,%,$(dir $@)))
1341 build-dir = $(KBUILD_EXTMOD)$(if $(zap-slash),/$(zap-slash)) 1342 build-dir = $(KBUILD_EXTMOD)$(if $(zap-slash),/$(zap-slash))
1342 target-dir = $(if $(KBUILD_EXTMOD),$(dir $<),$(dir $@)) 1343 target-dir = $(if $(KBUILD_EXTMOD),$(dir $<),$(dir $@))
1343 endif 1344 endif
1344 1345
1345 %.s: %.c prepare scripts FORCE 1346 %.s: %.c prepare scripts FORCE
1346 $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@) 1347 $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
1347 %.i: %.c prepare scripts FORCE 1348 %.i: %.c prepare scripts FORCE
1348 $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@) 1349 $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
1349 %.o: %.c prepare scripts FORCE 1350 %.o: %.c prepare scripts FORCE
1350 $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@) 1351 $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
1351 %.lst: %.c prepare scripts FORCE 1352 %.lst: %.c prepare scripts FORCE
1352 $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@) 1353 $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
1353 %.s: %.S prepare scripts FORCE 1354 %.s: %.S prepare scripts FORCE
1354 $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@) 1355 $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
1355 %.o: %.S prepare scripts FORCE 1356 %.o: %.S prepare scripts FORCE
1356 $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@) 1357 $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
1357 %.symtypes: %.c prepare scripts FORCE 1358 %.symtypes: %.c prepare scripts FORCE
1358 $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@) 1359 $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
1359 1360
1360 # Modules 1361 # Modules
1361 /: prepare scripts FORCE 1362 /: prepare scripts FORCE
1362 $(cmd_crmodverdir) 1363 $(cmd_crmodverdir)
1363 $(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \ 1364 $(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \
1364 $(build)=$(build-dir) 1365 $(build)=$(build-dir)
1365 %/: prepare scripts FORCE 1366 %/: prepare scripts FORCE
1366 $(cmd_crmodverdir) 1367 $(cmd_crmodverdir)
1367 $(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \ 1368 $(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \
1368 $(build)=$(build-dir) 1369 $(build)=$(build-dir)
1369 %.ko: prepare scripts FORCE 1370 %.ko: prepare scripts FORCE
1370 $(cmd_crmodverdir) 1371 $(cmd_crmodverdir)
1371 $(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \ 1372 $(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \
1372 $(build)=$(build-dir) $(@:.ko=.o) 1373 $(build)=$(build-dir) $(@:.ko=.o)
1373 $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost 1374 $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost
1374 1375
1375 # FIXME Should go into a make.lib or something 1376 # FIXME Should go into a make.lib or something
1376 # =========================================================================== 1377 # ===========================================================================
1377 1378
1378 quiet_cmd_rmdirs = $(if $(wildcard $(rm-dirs)),CLEAN $(wildcard $(rm-dirs))) 1379 quiet_cmd_rmdirs = $(if $(wildcard $(rm-dirs)),CLEAN $(wildcard $(rm-dirs)))
1379 cmd_rmdirs = rm -rf $(rm-dirs) 1380 cmd_rmdirs = rm -rf $(rm-dirs)
1380 1381
1381 quiet_cmd_rmfiles = $(if $(wildcard $(rm-files)),CLEAN $(wildcard $(rm-files))) 1382 quiet_cmd_rmfiles = $(if $(wildcard $(rm-files)),CLEAN $(wildcard $(rm-files)))
1382 cmd_rmfiles = rm -f $(rm-files) 1383 cmd_rmfiles = rm -f $(rm-files)
1383 1384
1384 # read all saved command lines 1385 # read all saved command lines
1385 1386
1386 targets := $(wildcard $(sort $(targets))) 1387 targets := $(wildcard $(sort $(targets)))
1387 cmd_files := $(wildcard .*.cmd $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd)) 1388 cmd_files := $(wildcard .*.cmd $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
1388 1389
1389 ifneq ($(cmd_files),) 1390 ifneq ($(cmd_files),)
1390 $(cmd_files): ; # Do not try to update included dependency files 1391 $(cmd_files): ; # Do not try to update included dependency files
1391 include $(cmd_files) 1392 include $(cmd_files)
1392 endif 1393 endif
1393 1394
1394 # Shorthand for $(Q)$(MAKE) -f scripts/Makefile.clean obj=dir 1395 # Shorthand for $(Q)$(MAKE) -f scripts/Makefile.clean obj=dir
1395 # Usage: 1396 # Usage:
1396 # $(Q)$(MAKE) $(clean)=dir 1397 # $(Q)$(MAKE) $(clean)=dir
1397 clean := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.clean obj 1398 clean := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.clean obj
1398 1399
1399 endif # skip-makefile 1400 endif # skip-makefile
1400 1401
1401 PHONY += FORCE 1402 PHONY += FORCE
1402 FORCE: 1403 FORCE:
1403 1404
1404 # Declare the contents of the .PHONY variable as phony. We keep that 1405 # Declare the contents of the .PHONY variable as phony. We keep that
include/configs/MPC8536DS.h
Diff comments   View file @ 4a37755
1 /* 1 /*
2 * Copyright 2007-2009,2010-2012 Freescale Semiconductor, Inc. 2 * Copyright 2007-2009,2010-2012 Freescale Semiconductor, Inc.
3 * 3 *
4 * SPDX-License-Identifier: GPL-2.0+ 4 * SPDX-License-Identifier: GPL-2.0+
5 */ 5 */
6 6
7 /* 7 /*
8 * mpc8536ds board configuration file 8 * mpc8536ds board configuration file
9 * 9 *
10 */ 10 */
11 #ifndef __CONFIG_H 11 #ifndef __CONFIG_H
12 #define __CONFIG_H 12 #define __CONFIG_H
13 13
14 #include "../board/freescale/common/ics307_clk.h" 14 #include "../board/freescale/common/ics307_clk.h"
15 15
16 #ifdef CONFIG_36BIT 16 #ifdef CONFIG_36BIT
17 #define CONFIG_PHYS_64BIT 1 17 #define CONFIG_PHYS_64BIT 1
18 #endif 18 #endif
19 19
20 #ifdef CONFIG_NAND 20 #ifdef CONFIG_NAND
21 #define CONFIG_NAND_U_BOOT 1 21 #define CONFIG_NAND_U_BOOT 1
22 #define CONFIG_RAMBOOT_NAND 1 22 #define CONFIG_RAMBOOT_NAND 1
23 #ifdef CONFIG_NAND_SPL 23 #ifdef CONFIG_NAND_SPL
24 #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 24 #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
25 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ 25 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
26 #else 26 #else
27 #define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds 27 #define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
28 #define CONFIG_SYS_TEXT_BASE 0xf8f82000 28 #define CONFIG_SYS_TEXT_BASE 0xf8f82000
29 #endif /* CONFIG_NAND_SPL */ 29 #endif /* CONFIG_NAND_SPL */
30 #endif 30 #endif
31 31
32 #ifdef CONFIG_SDCARD 32 #ifdef CONFIG_SDCARD
33 #define CONFIG_RAMBOOT_SDCARD 1 33 #define CONFIG_RAMBOOT_SDCARD 1
34 #define CONFIG_SYS_TEXT_BASE 0xf8f80000 34 #define CONFIG_SYS_TEXT_BASE 0xf8f80000
35 #define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc 35 #define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc
36 #endif 36 #endif
37 37
38 #ifdef CONFIG_SPIFLASH 38 #ifdef CONFIG_SPIFLASH
39 #define CONFIG_RAMBOOT_SPIFLASH 1 39 #define CONFIG_RAMBOOT_SPIFLASH 1
40 #define CONFIG_SYS_TEXT_BASE 0xf8f80000 40 #define CONFIG_SYS_TEXT_BASE 0xf8f80000
41 #define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc 41 #define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc
42 #endif 42 #endif
43 43
44 #ifndef CONFIG_SYS_TEXT_BASE 44 #ifndef CONFIG_SYS_TEXT_BASE
45 #define CONFIG_SYS_TEXT_BASE 0xeff80000 45 #define CONFIG_SYS_TEXT_BASE 0xeff80000
46 #endif 46 #endif
47 47
48 #ifndef CONFIG_RESET_VECTOR_ADDRESS 48 #ifndef CONFIG_RESET_VECTOR_ADDRESS
49 #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc 49 #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
50 #endif 50 #endif
51 51
52 #ifndef CONFIG_SYS_MONITOR_BASE 52 #ifndef CONFIG_SYS_MONITOR_BASE
53 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ 53 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
54 #endif 54 #endif
55 55
56 /* High Level Configuration Options */ 56 /* High Level Configuration Options */
57 #define CONFIG_BOOKE 1 /* BOOKE */ 57 #define CONFIG_BOOKE 1 /* BOOKE */
58 #define CONFIG_E500 1 /* BOOKE e500 family */ 58 #define CONFIG_E500 1 /* BOOKE e500 family */
59 #define CONFIG_MPC8536 1 59 #define CONFIG_MPC8536 1
60 #define CONFIG_MPC8536DS 1 60 #define CONFIG_MPC8536DS 1
61 61
62 #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ 62 #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */
63 #define CONFIG_SPI_FLASH 1 /* Has SPI Flash */ 63 #define CONFIG_SPI_FLASH 1 /* Has SPI Flash */
64 #define CONFIG_PCI 1 /* Enable PCI/PCIE */ 64 #define CONFIG_PCI 1 /* Enable PCI/PCIE */
65 #define CONFIG_PCI1 1 /* Enable PCI controller 1 */ 65 #define CONFIG_PCI1 1 /* Enable PCI controller 1 */
66 #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ 66 #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */
67 #define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */ 67 #define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */
68 #define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */ 68 #define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */
69 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ 69 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
70 #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ 70 #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */
71 #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ 71 #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */
72 #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ 72 #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
73 73
74 #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ 74 #define CONFIG_FSL_LAW 1 /* Use common FSL init code */
75 #define CONFIG_E1000 1 /* Defind e1000 pci Ethernet card*/ 75 #define CONFIG_E1000 1 /* Defind e1000 pci Ethernet card*/
76 76
77 #define CONFIG_TSEC_ENET /* tsec ethernet support */ 77 #define CONFIG_TSEC_ENET /* tsec ethernet support */
78 #define CONFIG_ENV_OVERWRITE 78 #define CONFIG_ENV_OVERWRITE
79 79
80 #define CONFIG_SYS_CLK_FREQ get_board_sys_clk() /* sysclk for MPC85xx */ 80 #define CONFIG_SYS_CLK_FREQ get_board_sys_clk() /* sysclk for MPC85xx */
81 #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() 81 #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
82 #define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 clock chip ref freq */ 82 #define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 clock chip ref freq */
83 83
84 /* 84 /*
85 * These can be toggled for performance analysis, otherwise use default. 85 * These can be toggled for performance analysis, otherwise use default.
86 */ 86 */
87 #define CONFIG_L2_CACHE /* toggle L2 cache */ 87 #define CONFIG_L2_CACHE /* toggle L2 cache */
88 #define CONFIG_BTB /* toggle branch predition */ 88 #define CONFIG_BTB /* toggle branch predition */
89 89
90 #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ 90 #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
91 91
92 #define CONFIG_ENABLE_36BIT_PHYS 1 92 #define CONFIG_ENABLE_36BIT_PHYS 1
93 93
94 #ifdef CONFIG_PHYS_64BIT 94 #ifdef CONFIG_PHYS_64BIT
95 #define CONFIG_ADDR_MAP 1 95 #define CONFIG_ADDR_MAP 1
96 #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ 96 #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
97 #endif 97 #endif
98 98
99 #define CONFIG_SYS_MEMTEST_START 0x00010000 /* skip exception vectors */ 99 #define CONFIG_SYS_MEMTEST_START 0x00010000 /* skip exception vectors */
100 #define CONFIG_SYS_MEMTEST_END 0x1f000000 /* skip u-boot at top of RAM */ 100 #define CONFIG_SYS_MEMTEST_END 0x1f000000 /* skip u-boot at top of RAM */
101 #define CONFIG_PANIC_HANG /* do not reset board on panic */ 101 #define CONFIG_PANIC_HANG /* do not reset board on panic */
102 102
103 /* 103 /*
104 * Config the L2 Cache as L2 SRAM 104 * Config the L2 Cache as L2 SRAM
105 */ 105 */
106 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 106 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
107 #ifdef CONFIG_PHYS_64BIT 107 #ifdef CONFIG_PHYS_64BIT
108 #define CONFIG_SYS_INIT_L2_ADDR_PHYS 0xff8f80000ull 108 #define CONFIG_SYS_INIT_L2_ADDR_PHYS 0xff8f80000ull
109 #else 109 #else
110 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR 110 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
111 #endif 111 #endif
112 #define CONFIG_SYS_L2_SIZE (512 << 10) 112 #define CONFIG_SYS_L2_SIZE (512 << 10)
113 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) 113 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
114 114
115 #define CONFIG_SYS_CCSRBAR 0xffe00000 115 #define CONFIG_SYS_CCSRBAR 0xffe00000
116 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR 116 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
117 117
118 #if defined(CONFIG_NAND_SPL) 118 #if defined(CONFIG_NAND_SPL)
119 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE 119 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
120 #endif 120 #endif
121 121
122 /* DDR Setup */ 122 /* DDR Setup */
123 #define CONFIG_VERY_BIG_RAM 123 #define CONFIG_VERY_BIG_RAM
124 #define CONFIG_SYS_FSL_DDR2 124 #define CONFIG_SYS_FSL_DDR2
125 #undef CONFIG_FSL_DDR_INTERACTIVE 125 #undef CONFIG_FSL_DDR_INTERACTIVE
126 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ 126 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
127 #define CONFIG_DDR_SPD 127 #define CONFIG_DDR_SPD
128 128
129 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ 129 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */
130 #define CONFIG_MEM_INIT_VALUE 0xDeadBeef 130 #define CONFIG_MEM_INIT_VALUE 0xDeadBeef
131 131
132 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 132 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
133 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE 133 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
134 134
135 #define CONFIG_NUM_DDR_CONTROLLERS 1 135 #define CONFIG_NUM_DDR_CONTROLLERS 1
136 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 136 #define CONFIG_DIMM_SLOTS_PER_CTLR 1
137 #define CONFIG_CHIP_SELECTS_PER_CTRL 2 137 #define CONFIG_CHIP_SELECTS_PER_CTRL 2
138 138
139 /* I2C addresses of SPD EEPROMs */ 139 /* I2C addresses of SPD EEPROMs */
140 #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ 140 #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */
141 #define CONFIG_SYS_SPD_BUS_NUM 1 141 #define CONFIG_SYS_SPD_BUS_NUM 1
142 142
143 /* These are used when DDR doesn't use SPD. */ 143 /* These are used when DDR doesn't use SPD. */
144 #define CONFIG_SYS_SDRAM_SIZE 256 /* DDR is 256MB */ 144 #define CONFIG_SYS_SDRAM_SIZE 256 /* DDR is 256MB */
145 #define CONFIG_SYS_DDR_CS0_BNDS 0x0000001F 145 #define CONFIG_SYS_DDR_CS0_BNDS 0x0000001F
146 #define CONFIG_SYS_DDR_CS0_CONFIG 0x80010102 /* Enable, no interleaving */ 146 #define CONFIG_SYS_DDR_CS0_CONFIG 0x80010102 /* Enable, no interleaving */
147 #define CONFIG_SYS_DDR_TIMING_3 0x00000000 147 #define CONFIG_SYS_DDR_TIMING_3 0x00000000
148 #define CONFIG_SYS_DDR_TIMING_0 0x00260802 148 #define CONFIG_SYS_DDR_TIMING_0 0x00260802
149 #define CONFIG_SYS_DDR_TIMING_1 0x3935d322 149 #define CONFIG_SYS_DDR_TIMING_1 0x3935d322
150 #define CONFIG_SYS_DDR_TIMING_2 0x14904cc8 150 #define CONFIG_SYS_DDR_TIMING_2 0x14904cc8
151 #define CONFIG_SYS_DDR_MODE_1 0x00480432 151 #define CONFIG_SYS_DDR_MODE_1 0x00480432
152 #define CONFIG_SYS_DDR_MODE_2 0x00000000 152 #define CONFIG_SYS_DDR_MODE_2 0x00000000
153 #define CONFIG_SYS_DDR_INTERVAL 0x06180100 153 #define CONFIG_SYS_DDR_INTERVAL 0x06180100
154 #define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef 154 #define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef
155 #define CONFIG_SYS_DDR_CLK_CTRL 0x03800000 155 #define CONFIG_SYS_DDR_CLK_CTRL 0x03800000
156 #define CONFIG_SYS_DDR_OCD_CTRL 0x00000000 156 #define CONFIG_SYS_DDR_OCD_CTRL 0x00000000
157 #define CONFIG_SYS_DDR_OCD_STATUS 0x00000000 157 #define CONFIG_SYS_DDR_OCD_STATUS 0x00000000
158 #define CONFIG_SYS_DDR_CONTROL 0xC3008000 /* Type = DDR2 */ 158 #define CONFIG_SYS_DDR_CONTROL 0xC3008000 /* Type = DDR2 */
159 #define CONFIG_SYS_DDR_CONTROL2 0x04400010 159 #define CONFIG_SYS_DDR_CONTROL2 0x04400010
160 160
161 #define CONFIG_SYS_DDR_ERR_INT_EN 0x0000000d 161 #define CONFIG_SYS_DDR_ERR_INT_EN 0x0000000d
162 #define CONFIG_SYS_DDR_ERR_DIS 0x00000000 162 #define CONFIG_SYS_DDR_ERR_DIS 0x00000000
163 #define CONFIG_SYS_DDR_SBE 0x00010000 163 #define CONFIG_SYS_DDR_SBE 0x00010000
164 164
165 /* Make sure required options are set */ 165 /* Make sure required options are set */
166 #ifndef CONFIG_SPD_EEPROM 166 #ifndef CONFIG_SPD_EEPROM
167 #error ("CONFIG_SPD_EEPROM is required") 167 #error ("CONFIG_SPD_EEPROM is required")
168 #endif 168 #endif
169 169
170 #undef CONFIG_CLOCKS_IN_MHZ 170 #undef CONFIG_CLOCKS_IN_MHZ
171 171
172 172
173 /* 173 /*
174 * Memory map -- xxx -this is wrong, needs updating 174 * Memory map -- xxx -this is wrong, needs updating
175 * 175 *
176 * 0x0000_0000 0x7fff_ffff DDR 2G Cacheable 176 * 0x0000_0000 0x7fff_ffff DDR 2G Cacheable
177 * 0x8000_0000 0xbfff_ffff PCI Express Mem 1G non-cacheable 177 * 0x8000_0000 0xbfff_ffff PCI Express Mem 1G non-cacheable
178 * 0xc000_0000 0xdfff_ffff PCI 512M non-cacheable 178 * 0xc000_0000 0xdfff_ffff PCI 512M non-cacheable
179 * 0xe100_0000 0xe3ff_ffff PCI IO range 4M non-cacheable 179 * 0xe100_0000 0xe3ff_ffff PCI IO range 4M non-cacheable
180 * 180 *
181 * Localbus cacheable (TBD) 181 * Localbus cacheable (TBD)
182 * 0xXXXX_XXXX 0xXXXX_XXXX SRAM YZ M Cacheable 182 * 0xXXXX_XXXX 0xXXXX_XXXX SRAM YZ M Cacheable
183 * 183 *
184 * Localbus non-cacheable 184 * Localbus non-cacheable
185 * 0xe000_0000 0xe7ff_ffff Promjet/free 128M non-cacheable 185 * 0xe000_0000 0xe7ff_ffff Promjet/free 128M non-cacheable
186 * 0xe800_0000 0xefff_ffff FLASH 128M non-cacheable 186 * 0xe800_0000 0xefff_ffff FLASH 128M non-cacheable
187 * 0xffa0_0000 0xffaf_ffff NAND 1M non-cacheable 187 * 0xffa0_0000 0xffaf_ffff NAND 1M non-cacheable
188 * 0xffdf_0000 0xffdf_7fff PIXIS 32K non-cacheable TLB0 188 * 0xffdf_0000 0xffdf_7fff PIXIS 32K non-cacheable TLB0
189 * 0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0 189 * 0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0
190 * 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable 190 * 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable
191 */ 191 */
192 192
193 /* 193 /*
194 * Local Bus Definitions 194 * Local Bus Definitions
195 */ 195 */
196 #define CONFIG_SYS_FLASH_BASE 0xe0000000 /* start of FLASH 128M */ 196 #define CONFIG_SYS_FLASH_BASE 0xe0000000 /* start of FLASH 128M */
197 #ifdef CONFIG_PHYS_64BIT 197 #ifdef CONFIG_PHYS_64BIT
198 #define CONFIG_SYS_FLASH_BASE_PHYS 0xfe0000000ull 198 #define CONFIG_SYS_FLASH_BASE_PHYS 0xfe0000000ull
199 #else 199 #else
200 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE 200 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
201 #endif 201 #endif
202 202
203 #define CONFIG_FLASH_BR_PRELIM \ 203 #define CONFIG_FLASH_BR_PRELIM \
204 (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000) | BR_PS_16 | BR_V) 204 (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000) | BR_PS_16 | BR_V)
205 #define CONFIG_FLASH_OR_PRELIM 0xf8000ff7 205 #define CONFIG_FLASH_OR_PRELIM 0xf8000ff7
206 206
207 #define CONFIG_SYS_BR1_PRELIM \ 207 #define CONFIG_SYS_BR1_PRELIM \
208 (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \ 208 (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
209 | BR_PS_16 | BR_V) 209 | BR_PS_16 | BR_V)
210 #define CONFIG_SYS_OR1_PRELIM 0xf8000ff7 210 #define CONFIG_SYS_OR1_PRELIM 0xf8000ff7
211 211
212 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000, \ 212 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000, \
213 CONFIG_SYS_FLASH_BASE_PHYS } 213 CONFIG_SYS_FLASH_BASE_PHYS }
214 #define CONFIG_SYS_FLASH_QUIET_TEST 214 #define CONFIG_SYS_FLASH_QUIET_TEST
215 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ 215 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
216 216
217 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ 217 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */
218 #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ 218 #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */
219 #undef CONFIG_SYS_FLASH_CHECKSUM 219 #undef CONFIG_SYS_FLASH_CHECKSUM
220 #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ 220 #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
221 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ 221 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
222 222
223 #if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_RAMBOOT_SDCARD) || \ 223 #if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_RAMBOOT_SDCARD) || \
224 defined(CONFIG_RAMBOOT_SPIFLASH) 224 defined(CONFIG_RAMBOOT_SPIFLASH)
225 #define CONFIG_SYS_RAMBOOT 225 #define CONFIG_SYS_RAMBOOT
226 #define CONFIG_SYS_EXTRA_ENV_RELOC 226 #define CONFIG_SYS_EXTRA_ENV_RELOC
227 #else 227 #else
228 #undef CONFIG_SYS_RAMBOOT 228 #undef CONFIG_SYS_RAMBOOT
229 #endif 229 #endif
230 230
231 #define CONFIG_FLASH_CFI_DRIVER 231 #define CONFIG_FLASH_CFI_DRIVER
232 #define CONFIG_SYS_FLASH_CFI 232 #define CONFIG_SYS_FLASH_CFI
233 #define CONFIG_SYS_FLASH_EMPTY_INFO 233 #define CONFIG_SYS_FLASH_EMPTY_INFO
234 #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 234 #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7
235 235
236 #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ 236 #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */
237 237
238 #define CONFIG_HWCONFIG /* enable hwconfig */ 238 #define CONFIG_HWCONFIG /* enable hwconfig */
239 #define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */ 239 #define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */
240 #define PIXIS_BASE 0xffdf0000 /* PIXIS registers */ 240 #define PIXIS_BASE 0xffdf0000 /* PIXIS registers */
241 #ifdef CONFIG_PHYS_64BIT 241 #ifdef CONFIG_PHYS_64BIT
242 #define PIXIS_BASE_PHYS 0xfffdf0000ull 242 #define PIXIS_BASE_PHYS 0xfffdf0000ull
243 #else 243 #else
244 #define PIXIS_BASE_PHYS PIXIS_BASE 244 #define PIXIS_BASE_PHYS PIXIS_BASE
245 #endif 245 #endif
246 246
247 #define CONFIG_SYS_BR3_PRELIM (BR_PHYS_ADDR(PIXIS_BASE_PHYS) | BR_PS_8 | BR_V) 247 #define CONFIG_SYS_BR3_PRELIM (BR_PHYS_ADDR(PIXIS_BASE_PHYS) | BR_PS_8 | BR_V)
248 #define CONFIG_SYS_OR3_PRELIM 0xffffeff7 /* 32KB but only 4k mapped */ 248 #define CONFIG_SYS_OR3_PRELIM 0xffffeff7 /* 32KB but only 4k mapped */
249 249
250 #define PIXIS_ID 0x0 /* Board ID at offset 0 */ 250 #define PIXIS_ID 0x0 /* Board ID at offset 0 */
251 #define PIXIS_VER 0x1 /* Board version at offset 1 */ 251 #define PIXIS_VER 0x1 /* Board version at offset 1 */
252 #define PIXIS_PVER 0x2 /* PIXIS FPGA version at offset 2 */ 252 #define PIXIS_PVER 0x2 /* PIXIS FPGA version at offset 2 */
253 #define PIXIS_CSR 0x3 /* PIXIS General control/status register */ 253 #define PIXIS_CSR 0x3 /* PIXIS General control/status register */
254 #define PIXIS_RST 0x4 /* PIXIS Reset Control register */ 254 #define PIXIS_RST 0x4 /* PIXIS Reset Control register */
255 #define PIXIS_PWR 0x5 /* PIXIS Power status register */ 255 #define PIXIS_PWR 0x5 /* PIXIS Power status register */
256 #define PIXIS_AUX 0x6 /* Auxiliary 1 register */ 256 #define PIXIS_AUX 0x6 /* Auxiliary 1 register */
257 #define PIXIS_SPD 0x7 /* Register for SYSCLK speed */ 257 #define PIXIS_SPD 0x7 /* Register for SYSCLK speed */
258 #define PIXIS_AUX2 0x8 /* Auxiliary 2 register */ 258 #define PIXIS_AUX2 0x8 /* Auxiliary 2 register */
259 #define PIXIS_VCTL 0x10 /* VELA Control Register */ 259 #define PIXIS_VCTL 0x10 /* VELA Control Register */
260 #define PIXIS_VSTAT 0x11 /* VELA Status Register */ 260 #define PIXIS_VSTAT 0x11 /* VELA Status Register */
261 #define PIXIS_VCFGEN0 0x12 /* VELA Config Enable 0 */ 261 #define PIXIS_VCFGEN0 0x12 /* VELA Config Enable 0 */
262 #define PIXIS_VCFGEN1 0x13 /* VELA Config Enable 1 */ 262 #define PIXIS_VCFGEN1 0x13 /* VELA Config Enable 1 */
263 #define PIXIS_VCORE0 0x14 /* VELA VCORE0 Register */ 263 #define PIXIS_VCORE0 0x14 /* VELA VCORE0 Register */
264 #define PIXIS_VBOOT 0x16 /* VELA VBOOT Register */ 264 #define PIXIS_VBOOT 0x16 /* VELA VBOOT Register */
265 #define PIXIS_VBOOT_LBMAP 0xe0 /* VBOOT - CFG_LBMAP */ 265 #define PIXIS_VBOOT_LBMAP 0xe0 /* VBOOT - CFG_LBMAP */
266 #define PIXIS_VBOOT_LBMAP_NOR0 0x00 /* cfg_lbmap - boot from NOR 0 */ 266 #define PIXIS_VBOOT_LBMAP_NOR0 0x00 /* cfg_lbmap - boot from NOR 0 */
267 #define PIXIS_VBOOT_LBMAP_NOR1 0x01 /* cfg_lbmap - boot from NOR 1 */ 267 #define PIXIS_VBOOT_LBMAP_NOR1 0x01 /* cfg_lbmap - boot from NOR 1 */
268 #define PIXIS_VBOOT_LBMAP_NOR2 0x02 /* cfg_lbmap - boot from NOR 2 */ 268 #define PIXIS_VBOOT_LBMAP_NOR2 0x02 /* cfg_lbmap - boot from NOR 2 */
269 #define PIXIS_VBOOT_LBMAP_NOR3 0x03 /* cfg_lbmap - boot from NOR 3 */ 269 #define PIXIS_VBOOT_LBMAP_NOR3 0x03 /* cfg_lbmap - boot from NOR 3 */
270 #define PIXIS_VBOOT_LBMAP_PJET 0x04 /* cfg_lbmap - boot from projet */ 270 #define PIXIS_VBOOT_LBMAP_PJET 0x04 /* cfg_lbmap - boot from projet */
271 #define PIXIS_VBOOT_LBMAP_NAND 0x05 /* cfg_lbmap - boot from NAND */ 271 #define PIXIS_VBOOT_LBMAP_NAND 0x05 /* cfg_lbmap - boot from NAND */
272 #define PIXIS_VSPEED0 0x17 /* VELA VSpeed 0 */ 272 #define PIXIS_VSPEED0 0x17 /* VELA VSpeed 0 */
273 #define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */ 273 #define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */
274 #define PIXIS_VSPEED2 0x19 /* VELA VSpeed 2 */ 274 #define PIXIS_VSPEED2 0x19 /* VELA VSpeed 2 */
275 #define PIXIS_VSYSCLK0 0x1A /* VELA SYSCLK0 Register */ 275 #define PIXIS_VSYSCLK0 0x1A /* VELA SYSCLK0 Register */
276 #define PIXIS_VSYSCLK1 0x1B /* VELA SYSCLK1 Register */ 276 #define PIXIS_VSYSCLK1 0x1B /* VELA SYSCLK1 Register */
277 #define PIXIS_VSYSCLK2 0x1C /* VELA SYSCLK2 Register */ 277 #define PIXIS_VSYSCLK2 0x1C /* VELA SYSCLK2 Register */
278 #define PIXIS_VDDRCLK0 0x1D /* VELA DDRCLK0 Register */ 278 #define PIXIS_VDDRCLK0 0x1D /* VELA DDRCLK0 Register */
279 #define PIXIS_VDDRCLK1 0x1E /* VELA DDRCLK1 Register */ 279 #define PIXIS_VDDRCLK1 0x1E /* VELA DDRCLK1 Register */
280 #define PIXIS_VDDRCLK2 0x1F /* VELA DDRCLK2 Register */ 280 #define PIXIS_VDDRCLK2 0x1F /* VELA DDRCLK2 Register */
281 #define PIXIS_VWATCH 0x24 /* Watchdog Register */ 281 #define PIXIS_VWATCH 0x24 /* Watchdog Register */
282 #define PIXIS_LED 0x25 /* LED Register */ 282 #define PIXIS_LED 0x25 /* LED Register */
283 283
284 #define PIXIS_SPD_SYSCLK 0x7 /* SYSCLK option */ 284 #define PIXIS_SPD_SYSCLK 0x7 /* SYSCLK option */
285 285
286 /* old pixis referenced names */ 286 /* old pixis referenced names */
287 #define PIXIS_VCLKH 0x19 /* VELA VCLKH register */ 287 #define PIXIS_VCLKH 0x19 /* VELA VCLKH register */
288 #define PIXIS_VCLKL 0x1A /* VELA VCLKL register */ 288 #define PIXIS_VCLKL 0x1A /* VELA VCLKL register */
289 #define CONFIG_SYS_PIXIS_VBOOT_MASK 0x4e 289 #define CONFIG_SYS_PIXIS_VBOOT_MASK 0x4e
290 290
291 #define CONFIG_SYS_INIT_RAM_LOCK 1 291 #define CONFIG_SYS_INIT_RAM_LOCK 1
292 #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ 292 #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */
293 #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */ 293 #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */
294 294
295 #define CONFIG_SYS_GBL_DATA_OFFSET \ 295 #define CONFIG_SYS_GBL_DATA_OFFSET \
296 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 296 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
297 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 297 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
298 298
299 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ 299 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
300 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */ 300 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
301 301
302 #ifndef CONFIG_NAND_SPL 302 #ifndef CONFIG_NAND_SPL
303 #define CONFIG_SYS_NAND_BASE 0xffa00000 303 #define CONFIG_SYS_NAND_BASE 0xffa00000
304 #ifdef CONFIG_PHYS_64BIT 304 #ifdef CONFIG_PHYS_64BIT
305 #define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull 305 #define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull
306 #else 306 #else
307 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE 307 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
308 #endif 308 #endif
309 #else 309 #else
310 #define CONFIG_SYS_NAND_BASE 0xfff00000 310 #define CONFIG_SYS_NAND_BASE 0xfff00000
311 #ifdef CONFIG_PHYS_64BIT 311 #ifdef CONFIG_PHYS_64BIT
312 #define CONFIG_SYS_NAND_BASE_PHYS 0xffff00000ull 312 #define CONFIG_SYS_NAND_BASE_PHYS 0xffff00000ull
313 #else 313 #else
314 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE 314 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
315 #endif 315 #endif
316 #endif 316 #endif
317 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE,\ 317 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE,\
318 CONFIG_SYS_NAND_BASE + 0x40000, \ 318 CONFIG_SYS_NAND_BASE + 0x40000, \
319 CONFIG_SYS_NAND_BASE + 0x80000, \ 319 CONFIG_SYS_NAND_BASE + 0x80000, \
320 CONFIG_SYS_NAND_BASE + 0xC0000} 320 CONFIG_SYS_NAND_BASE + 0xC0000}
321 #define CONFIG_SYS_MAX_NAND_DEVICE 4 321 #define CONFIG_SYS_MAX_NAND_DEVICE 4
322 #define CONFIG_MTD_NAND_VERIFY_WRITE 322 #define CONFIG_MTD_NAND_VERIFY_WRITE
323 #define CONFIG_CMD_NAND 1 323 #define CONFIG_CMD_NAND 1
324 #define CONFIG_NAND_FSL_ELBC 1 324 #define CONFIG_NAND_FSL_ELBC 1
325 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 325 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
326 326
327 /* NAND boot: 4K NAND loader config */ 327 /* NAND boot: 4K NAND loader config */
328 #define CONFIG_SYS_NAND_SPL_SIZE 0x1000 328 #define CONFIG_SYS_NAND_SPL_SIZE 0x1000
329 #define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) - 0x2000) 329 #define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) - 0x2000)
330 #define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR) 330 #define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR)
331 #define CONFIG_SYS_NAND_U_BOOT_START \ 331 #define CONFIG_SYS_NAND_U_BOOT_START \
332 (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE) 332 (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE)
333 #define CONFIG_SYS_NAND_U_BOOT_OFFS (0) 333 #define CONFIG_SYS_NAND_U_BOOT_OFFS (0)
334 #define CONFIG_SYS_NAND_U_BOOT_RELOC (CONFIG_SYS_INIT_L2_END - 0x2000) 334 #define CONFIG_SYS_NAND_U_BOOT_RELOC (CONFIG_SYS_INIT_L2_END - 0x2000)
335 #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF) 335 #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF)
336 336
337 /* NAND flash config */ 337 /* NAND flash config */
338 #define CONFIG_SYS_NAND_BR_PRELIM \ 338 #define CONFIG_SYS_NAND_BR_PRELIM \
339 (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ 339 (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
340 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ 340 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
341 | BR_PS_8 /* Port Size = 8 bit */ \ 341 | BR_PS_8 /* Port Size = 8 bit */ \
342 | BR_MS_FCM /* MSEL = FCM */ \ 342 | BR_MS_FCM /* MSEL = FCM */ \
343 | BR_V) /* valid */ 343 | BR_V) /* valid */
344 #define CONFIG_SYS_NAND_OR_PRELIM (0xFFFC0000 /* length 256K */ \ 344 #define CONFIG_SYS_NAND_OR_PRELIM (0xFFFC0000 /* length 256K */ \
345 | OR_FCM_PGS /* Large Page*/ \ 345 | OR_FCM_PGS /* Large Page*/ \
346 | OR_FCM_CSCT \ 346 | OR_FCM_CSCT \
347 | OR_FCM_CST \ 347 | OR_FCM_CST \
348 | OR_FCM_CHT \ 348 | OR_FCM_CHT \
349 | OR_FCM_SCY_1 \ 349 | OR_FCM_SCY_1 \
350 | OR_FCM_TRLX \ 350 | OR_FCM_TRLX \
351 | OR_FCM_EHTR) 351 | OR_FCM_EHTR)
352 352
353 #ifdef CONFIG_RAMBOOT_NAND 353 #ifdef CONFIG_RAMBOOT_NAND
354 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ 354 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
355 #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ 355 #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
356 #define CONFIG_SYS_BR2_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ 356 #define CONFIG_SYS_BR2_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
357 #define CONFIG_SYS_OR2_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ 357 #define CONFIG_SYS_OR2_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */
358 #else 358 #else
359 #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ 359 #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
360 #define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ 360 #define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */
361 #define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ 361 #define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
362 #define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ 362 #define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
363 #endif 363 #endif
364 364
365 #define CONFIG_SYS_BR4_PRELIM \ 365 #define CONFIG_SYS_BR4_PRELIM \
366 (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0x40000) \ 366 (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0x40000) \
367 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ 367 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
368 | BR_PS_8 /* Port Size = 8 bit */ \ 368 | BR_PS_8 /* Port Size = 8 bit */ \
369 | BR_MS_FCM /* MSEL = FCM */ \ 369 | BR_MS_FCM /* MSEL = FCM */ \
370 | BR_V) /* valid */ 370 | BR_V) /* valid */
371 #define CONFIG_SYS_OR4_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ 371 #define CONFIG_SYS_OR4_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
372 #define CONFIG_SYS_BR5_PRELIM \ 372 #define CONFIG_SYS_BR5_PRELIM \
373 (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0x80000) \ 373 (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0x80000) \
374 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ 374 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
375 | BR_PS_8 /* Port Size = 8 bit */ \ 375 | BR_PS_8 /* Port Size = 8 bit */ \
376 | BR_MS_FCM /* MSEL = FCM */ \ 376 | BR_MS_FCM /* MSEL = FCM */ \
377 | BR_V) /* valid */ 377 | BR_V) /* valid */
378 #define CONFIG_SYS_OR5_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ 378 #define CONFIG_SYS_OR5_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
379 379
380 #define CONFIG_SYS_BR6_PRELIM \ 380 #define CONFIG_SYS_BR6_PRELIM \
381 (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0xc0000) \ 381 (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0xc0000) \
382 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ 382 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
383 | BR_PS_8 /* Port Size = 8 bit */ \ 383 | BR_PS_8 /* Port Size = 8 bit */ \
384 | BR_MS_FCM /* MSEL = FCM */ \ 384 | BR_MS_FCM /* MSEL = FCM */ \
385 | BR_V) /* valid */ 385 | BR_V) /* valid */
386 #define CONFIG_SYS_OR6_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ 386 #define CONFIG_SYS_OR6_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
387 387
388 /* Serial Port - controlled on board with jumper J8 388 /* Serial Port - controlled on board with jumper J8
389 * open - index 2 389 * open - index 2
390 * shorted - index 1 390 * shorted - index 1
391 */ 391 */
392 #define CONFIG_CONS_INDEX 1 392 #define CONFIG_CONS_INDEX 1
393 #define CONFIG_SYS_NS16550 393 #define CONFIG_SYS_NS16550
394 #define CONFIG_SYS_NS16550_SERIAL 394 #define CONFIG_SYS_NS16550_SERIAL
395 #define CONFIG_SYS_NS16550_REG_SIZE 1 395 #define CONFIG_SYS_NS16550_REG_SIZE 1
396 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) 396 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
397 #ifdef CONFIG_NAND_SPL 397 #ifdef CONFIG_NAND_SPL
398 #define CONFIG_NS16550_MIN_FUNCTIONS 398 #define CONFIG_NS16550_MIN_FUNCTIONS
399 #endif 399 #endif
400 400
401 #define CONFIG_SYS_BAUDRATE_TABLE \ 401 #define CONFIG_SYS_BAUDRATE_TABLE \
402 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} 402 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
403 403
404 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500) 404 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
405 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600) 405 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
406 406
407 /* Use the HUSH parser */ 407 /* Use the HUSH parser */
408 #define CONFIG_SYS_HUSH_PARSER 408 #define CONFIG_SYS_HUSH_PARSER
409 409
410 /* 410 /*
411 * Pass open firmware flat tree 411 * Pass open firmware flat tree
412 */ 412 */
413 #define CONFIG_OF_LIBFDT 1 413 #define CONFIG_OF_LIBFDT 1
414 #define CONFIG_OF_BOARD_SETUP 1 414 #define CONFIG_OF_BOARD_SETUP 1
415 #define CONFIG_OF_STDOUT_VIA_ALIAS 1 415 #define CONFIG_OF_STDOUT_VIA_ALIAS 1
416 416
417 /* 417 /*
418 * I2C 418 * I2C
419 */ 419 */
420 #define CONFIG_SYS_I2C 420 #define CONFIG_SYS_I2C
421 #define CONFIG_SYS_I2C_FSL 421 #define CONFIG_SYS_I2C_FSL
422 #define CONFIG_SYS_FSL_I2C_SPEED 400000 422 #define CONFIG_SYS_FSL_I2C_SPEED 400000
423 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F 423 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
424 #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 424 #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
425 #define CONFIG_SYS_FSL_I2C2_SPEED 400000 425 #define CONFIG_SYS_FSL_I2C2_SPEED 400000
426 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F 426 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
427 #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 427 #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
428 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} } 428 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} }
429 429
430 /* 430 /*
431 * I2C2 EEPROM 431 * I2C2 EEPROM
432 */ 432 */
433 #define CONFIG_ID_EEPROM 433 #define CONFIG_ID_EEPROM
434 #ifdef CONFIG_ID_EEPROM 434 #ifdef CONFIG_ID_EEPROM
435 #define CONFIG_SYS_I2C_EEPROM_NXID 435 #define CONFIG_SYS_I2C_EEPROM_NXID
436 #endif 436 #endif
437 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 437 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
438 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 438 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
439 #define CONFIG_SYS_EEPROM_BUS_NUM 1 439 #define CONFIG_SYS_EEPROM_BUS_NUM 1
440 440
441 /* 441 /*
442 * eSPI - Enhanced SPI 442 * eSPI - Enhanced SPI
443 */ 443 */
444 #define CONFIG_HARD_SPI 444 #define CONFIG_HARD_SPI
445 #define CONFIG_FSL_ESPI 445 #define CONFIG_FSL_ESPI
446 446
447 #if defined(CONFIG_SPI_FLASH) 447 #if defined(CONFIG_SPI_FLASH)
448 #define CONFIG_SPI_FLASH_SPANSION 448 #define CONFIG_SPI_FLASH_SPANSION
449 #define CONFIG_CMD_SF 449 #define CONFIG_CMD_SF
450 #define CONFIG_SF_DEFAULT_SPEED 10000000 450 #define CONFIG_SF_DEFAULT_SPEED 10000000
451 #define CONFIG_SF_DEFAULT_MODE 0 451 #define CONFIG_SF_DEFAULT_MODE 0
452 #endif 452 #endif
453 453
454 /* 454 /*
455 * General PCI 455 * General PCI
456 * Memory space is mapped 1-1, but I/O space must start from 0. 456 * Memory space is mapped 1-1, but I/O space must start from 0.
457 */ 457 */
458 458
459 #define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000 459 #define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000
460 #ifdef CONFIG_PHYS_64BIT 460 #ifdef CONFIG_PHYS_64BIT
461 #define CONFIG_SYS_PCI1_MEM_BUS 0xf0000000 461 #define CONFIG_SYS_PCI1_MEM_BUS 0xf0000000
462 #define CONFIG_SYS_PCI1_MEM_PHYS 0xc00000000ull 462 #define CONFIG_SYS_PCI1_MEM_PHYS 0xc00000000ull
463 #else 463 #else
464 #define CONFIG_SYS_PCI1_MEM_BUS 0x80000000 464 #define CONFIG_SYS_PCI1_MEM_BUS 0x80000000
465 #define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000 465 #define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000
466 #endif 466 #endif
467 #define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */ 467 #define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */
468 #define CONFIG_SYS_PCI1_IO_VIRT 0xffc00000 468 #define CONFIG_SYS_PCI1_IO_VIRT 0xffc00000
469 #define CONFIG_SYS_PCI1_IO_BUS 0x00000000 469 #define CONFIG_SYS_PCI1_IO_BUS 0x00000000
470 #ifdef CONFIG_PHYS_64BIT 470 #ifdef CONFIG_PHYS_64BIT
471 #define CONFIG_SYS_PCI1_IO_PHYS 0xfffc00000ull 471 #define CONFIG_SYS_PCI1_IO_PHYS 0xfffc00000ull
472 #else 472 #else
473 #define CONFIG_SYS_PCI1_IO_PHYS 0xffc00000 473 #define CONFIG_SYS_PCI1_IO_PHYS 0xffc00000
474 #endif 474 #endif
475 #define CONFIG_SYS_PCI1_IO_SIZE 0x00010000 /* 64k */ 475 #define CONFIG_SYS_PCI1_IO_SIZE 0x00010000 /* 64k */
476 476
477 /* controller 1, Slot 1, tgtid 1, Base address a000 */ 477 /* controller 1, Slot 1, tgtid 1, Base address a000 */
478 #define CONFIG_SYS_PCIE1_NAME "Slot 1" 478 #define CONFIG_SYS_PCIE1_NAME "Slot 1"
479 #define CONFIG_SYS_PCIE1_MEM_VIRT 0x90000000 479 #define CONFIG_SYS_PCIE1_MEM_VIRT 0x90000000
480 #ifdef CONFIG_PHYS_64BIT 480 #ifdef CONFIG_PHYS_64BIT
481 #define CONFIG_SYS_PCIE1_MEM_BUS 0xf8000000 481 #define CONFIG_SYS_PCIE1_MEM_BUS 0xf8000000
482 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc10000000ull 482 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc10000000ull
483 #else 483 #else
484 #define CONFIG_SYS_PCIE1_MEM_BUS 0x90000000 484 #define CONFIG_SYS_PCIE1_MEM_BUS 0x90000000
485 #define CONFIG_SYS_PCIE1_MEM_PHYS 0x90000000 485 #define CONFIG_SYS_PCIE1_MEM_PHYS 0x90000000
486 #endif 486 #endif
487 #define CONFIG_SYS_PCIE1_MEM_SIZE 0x08000000 /* 128M */ 487 #define CONFIG_SYS_PCIE1_MEM_SIZE 0x08000000 /* 128M */
488 #define CONFIG_SYS_PCIE1_IO_VIRT 0xffc10000 488 #define CONFIG_SYS_PCIE1_IO_VIRT 0xffc10000
489 #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 489 #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
490 #ifdef CONFIG_PHYS_64BIT 490 #ifdef CONFIG_PHYS_64BIT
491 #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc10000ull 491 #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc10000ull
492 #else 492 #else
493 #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc10000 493 #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc10000
494 #endif 494 #endif
495 #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ 495 #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
496 496
497 /* controller 2, Slot 2, tgtid 2, Base address 9000 */ 497 /* controller 2, Slot 2, tgtid 2, Base address 9000 */
498 #define CONFIG_SYS_PCIE2_NAME "Slot 2" 498 #define CONFIG_SYS_PCIE2_NAME "Slot 2"
499 #define CONFIG_SYS_PCIE2_MEM_VIRT 0x98000000 499 #define CONFIG_SYS_PCIE2_MEM_VIRT 0x98000000
500 #ifdef CONFIG_PHYS_64BIT 500 #ifdef CONFIG_PHYS_64BIT
501 #define CONFIG_SYS_PCIE2_MEM_BUS 0xf8000000 501 #define CONFIG_SYS_PCIE2_MEM_BUS 0xf8000000
502 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc18000000ull 502 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc18000000ull
503 #else 503 #else
504 #define CONFIG_SYS_PCIE2_MEM_BUS 0x98000000 504 #define CONFIG_SYS_PCIE2_MEM_BUS 0x98000000
505 #define CONFIG_SYS_PCIE2_MEM_PHYS 0x98000000 505 #define CONFIG_SYS_PCIE2_MEM_PHYS 0x98000000
506 #endif 506 #endif
507 #define CONFIG_SYS_PCIE2_MEM_SIZE 0x08000000 /* 128M */ 507 #define CONFIG_SYS_PCIE2_MEM_SIZE 0x08000000 /* 128M */
508 #define CONFIG_SYS_PCIE2_IO_VIRT 0xffc20000 508 #define CONFIG_SYS_PCIE2_IO_VIRT 0xffc20000
509 #define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 509 #define CONFIG_SYS_PCIE2_IO_BUS 0x00000000
510 #ifdef CONFIG_PHYS_64BIT 510 #ifdef CONFIG_PHYS_64BIT
511 #define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc20000ull 511 #define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc20000ull
512 #else 512 #else
513 #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc20000 513 #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc20000
514 #endif 514 #endif
515 #define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ 515 #define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */
516 516
517 /* controller 3, direct to uli, tgtid 3, Base address 8000 */ 517 /* controller 3, direct to uli, tgtid 3, Base address 8000 */
518 #define CONFIG_SYS_PCIE3_NAME "Slot 3" 518 #define CONFIG_SYS_PCIE3_NAME "Slot 3"
519 #define CONFIG_SYS_PCIE3_MEM_VIRT 0xa0000000 519 #define CONFIG_SYS_PCIE3_MEM_VIRT 0xa0000000
520 #ifdef CONFIG_PHYS_64BIT 520 #ifdef CONFIG_PHYS_64BIT
521 #define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 521 #define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000
522 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc20000000ull 522 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc20000000ull
523 #else 523 #else
524 #define CONFIG_SYS_PCIE3_MEM_BUS 0xa0000000 524 #define CONFIG_SYS_PCIE3_MEM_BUS 0xa0000000
525 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xa0000000 525 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xa0000000
526 #endif 526 #endif
527 #define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */ 527 #define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */
528 #define CONFIG_SYS_PCIE3_IO_VIRT 0xffc30000 528 #define CONFIG_SYS_PCIE3_IO_VIRT 0xffc30000
529 #define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 529 #define CONFIG_SYS_PCIE3_IO_BUS 0x00000000
530 #ifdef CONFIG_PHYS_64BIT 530 #ifdef CONFIG_PHYS_64BIT
531 #define CONFIG_SYS_PCIE3_IO_PHYS 0xfffc30000ull 531 #define CONFIG_SYS_PCIE3_IO_PHYS 0xfffc30000ull
532 #else 532 #else
533 #define CONFIG_SYS_PCIE3_IO_PHYS 0xffc30000 533 #define CONFIG_SYS_PCIE3_IO_PHYS 0xffc30000
534 #endif 534 #endif
535 #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ 535 #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */
536 536
537 #if defined(CONFIG_PCI) 537 #if defined(CONFIG_PCI)
538 538
539 #define CONFIG_PCI_PNP /* do pci plug-and-play */ 539 #define CONFIG_PCI_PNP /* do pci plug-and-play */
540 540
541 /*PCIE video card used*/ 541 /*PCIE video card used*/
542 #define VIDEO_IO_OFFSET CONFIG_SYS_PCIE3_IO_VIRT 542 #define VIDEO_IO_OFFSET CONFIG_SYS_PCIE3_IO_VIRT
543 543
544 /*PCI video card used*/ 544 /*PCI video card used*/
545 /*#define VIDEO_IO_OFFSET CONFIG_SYS_PCI1_IO_VIRT*/ 545 /*#define VIDEO_IO_OFFSET CONFIG_SYS_PCI1_IO_VIRT*/
546 546
547 /* video */ 547 /* video */
548 #define CONFIG_VIDEO 548 #define CONFIG_VIDEO
549 549
550 #if defined(CONFIG_VIDEO) 550 #if defined(CONFIG_VIDEO)
551 #define CONFIG_BIOSEMU 551 #define CONFIG_BIOSEMU
552 #define CONFIG_CFB_CONSOLE 552 #define CONFIG_CFB_CONSOLE
553 #define CONFIG_VIDEO_SW_CURSOR 553 #define CONFIG_VIDEO_SW_CURSOR
554 #define CONFIG_VGA_AS_SINGLE_DEVICE 554 #define CONFIG_VGA_AS_SINGLE_DEVICE
555 #define CONFIG_ATI_RADEON_FB 555 #define CONFIG_ATI_RADEON_FB
556 #define CONFIG_VIDEO_LOGO 556 #define CONFIG_VIDEO_LOGO
557 /*#define CONFIG_CONSOLE_CURSOR*/ 557 /*#define CONFIG_CONSOLE_CURSOR*/
558 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS CONFIG_SYS_PCIE3_IO_VIRT 558 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS CONFIG_SYS_PCIE3_IO_VIRT
559 #endif 559 #endif
560 560
561 #undef CONFIG_EEPRO100 561 #undef CONFIG_EEPRO100
562 #undef CONFIG_TULIP 562 #undef CONFIG_TULIP
563 #undef CONFIG_RTL8139 563 #undef CONFIG_RTL8139
564 564
565 #ifndef CONFIG_PCI_PNP 565 #ifndef CONFIG_PCI_PNP
566 #define PCI_ENET0_IOADDR CONFIG_SYS_PCI1_IO_BUS 566 #define PCI_ENET0_IOADDR CONFIG_SYS_PCI1_IO_BUS
567 #define PCI_ENET0_MEMADDR CONFIG_SYS_PCI1_IO_BUS 567 #define PCI_ENET0_MEMADDR CONFIG_SYS_PCI1_IO_BUS
568 #define PCI_IDSEL_NUMBER 0x11 /* IDSEL = AD11 */ 568 #define PCI_IDSEL_NUMBER 0x11 /* IDSEL = AD11 */
569 #endif 569 #endif
570 570
571 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ 571 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
572 572
573 #endif /* CONFIG_PCI */ 573 #endif /* CONFIG_PCI */
574 574
575 /* SATA */ 575 /* SATA */
576 #define CONFIG_LIBATA 576 #define CONFIG_LIBATA
577 #define CONFIG_FSL_SATA 577 #define CONFIG_FSL_SATA
578 578
579 #define CONFIG_SYS_SATA_MAX_DEVICE 2 579 #define CONFIG_SYS_SATA_MAX_DEVICE 2
580 #define CONFIG_SATA1 580 #define CONFIG_SATA1
581 #define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR 581 #define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR
582 #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA 582 #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
583 #define CONFIG_SATA2 583 #define CONFIG_SATA2
584 #define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR 584 #define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR
585 #define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA 585 #define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
586 586
587 #ifdef CONFIG_FSL_SATA 587 #ifdef CONFIG_FSL_SATA
588 #define CONFIG_LBA48 588 #define CONFIG_LBA48
589 #define CONFIG_CMD_SATA 589 #define CONFIG_CMD_SATA
590 #define CONFIG_DOS_PARTITION 590 #define CONFIG_DOS_PARTITION
591 #define CONFIG_CMD_EXT2 591 #define CONFIG_CMD_EXT2
592 #endif 592 #endif
593 593
594 #if defined(CONFIG_TSEC_ENET) 594 #if defined(CONFIG_TSEC_ENET)
595 595
596 #define CONFIG_MII 1 /* MII PHY management */ 596 #define CONFIG_MII 1 /* MII PHY management */
597 #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ 597 #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
598 #define CONFIG_TSEC1 1 598 #define CONFIG_TSEC1 1
599 #define CONFIG_TSEC1_NAME "eTSEC1" 599 #define CONFIG_TSEC1_NAME "eTSEC1"
600 #define CONFIG_TSEC3 1 600 #define CONFIG_TSEC3 1
601 #define CONFIG_TSEC3_NAME "eTSEC3" 601 #define CONFIG_TSEC3_NAME "eTSEC3"
602 602
603 #define CONFIG_FSL_SGMII_RISER 1 603 #define CONFIG_FSL_SGMII_RISER 1
604 #define SGMII_RISER_PHY_OFFSET 0x1c 604 #define SGMII_RISER_PHY_OFFSET 0x1c
605 605
606 #define TSEC1_PHY_ADDR 1 /* TSEC1 -> PHY1 */ 606 #define TSEC1_PHY_ADDR 1 /* TSEC1 -> PHY1 */
607 #define TSEC3_PHY_ADDR 0 /* TSEC3 -> PHY0 */ 607 #define TSEC3_PHY_ADDR 0 /* TSEC3 -> PHY0 */
608 608
609 #define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) 609 #define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
610 #define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) 610 #define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
611 611
612 #define TSEC1_PHYIDX 0 612 #define TSEC1_PHYIDX 0
613 #define TSEC3_PHYIDX 0 613 #define TSEC3_PHYIDX 0
614 614
615 #define CONFIG_ETHPRIME "eTSEC1" 615 #define CONFIG_ETHPRIME "eTSEC1"
616 616
617 #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ 617 #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
618 618
619 #endif /* CONFIG_TSEC_ENET */ 619 #endif /* CONFIG_TSEC_ENET */
620 620
621 /* 621 /*
622 * Environment 622 * Environment
623 */ 623 */
624 624
625 #if defined(CONFIG_SYS_RAMBOOT) 625 #if defined(CONFIG_SYS_RAMBOOT)
626 #if defined(CONFIG_RAMBOOT_NAND) 626 #if defined(CONFIG_RAMBOOT_NAND)
627 #define CONFIG_ENV_IS_IN_NAND 1 627 #define CONFIG_ENV_IS_IN_NAND 1
628 #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE 628 #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
629 #define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) 629 #define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
630 #define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) 630 #define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE)
631 #elif defined(CONFIG_RAMBOOT_SPIFLASH) 631 #elif defined(CONFIG_RAMBOOT_SPIFLASH)
632 #define CONFIG_ENV_IS_IN_SPI_FLASH 632 #define CONFIG_ENV_IS_IN_SPI_FLASH
633 #define CONFIG_ENV_SPI_BUS 0 633 #define CONFIG_ENV_SPI_BUS 0
634 #define CONFIG_ENV_SPI_CS 0 634 #define CONFIG_ENV_SPI_CS 0
635 #define CONFIG_ENV_SPI_MAX_HZ 10000000 635 #define CONFIG_ENV_SPI_MAX_HZ 10000000
636 #define CONFIG_ENV_SPI_MODE 0 636 #define CONFIG_ENV_SPI_MODE 0
637 #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ 637 #define CONFIG_ENV_SIZE 0x2000 /* 8KB */
638 #define CONFIG_ENV_OFFSET 0xF0000 638 #define CONFIG_ENV_OFFSET 0xF0000
639 #define CONFIG_ENV_SECT_SIZE 0x10000 639 #define CONFIG_ENV_SECT_SIZE 0x10000
640 #elif defined(CONFIG_RAMBOOT_SDCARD) 640 #elif defined(CONFIG_RAMBOOT_SDCARD)
641 #define CONFIG_ENV_IS_IN_MMC 641 #define CONFIG_ENV_IS_IN_MMC
642 #define CONFIG_FSL_FIXED_MMC_LOCATION 642 #define CONFIG_FSL_FIXED_MMC_LOCATION
643 #define CONFIG_ENV_SIZE 0x2000 643 #define CONFIG_ENV_SIZE 0x2000
644 #define CONFIG_SYS_MMC_ENV_DEV 0 644 #define CONFIG_SYS_MMC_ENV_DEV 0
645 #else 645 #else
646 #define CONFIG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */ 646 #define CONFIG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */
647 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) 647 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000)
648 #define CONFIG_ENV_SIZE 0x2000 648 #define CONFIG_ENV_SIZE 0x2000
649 #endif 649 #endif
650 #else 650 #else
651 #define CONFIG_ENV_IS_IN_FLASH 1 651 #define CONFIG_ENV_IS_IN_FLASH 1
652 #if CONFIG_SYS_MONITOR_BASE > 0xfff80000 652 #if CONFIG_SYS_MONITOR_BASE > 0xfff80000
653 #define CONFIG_ENV_ADDR 0xfff80000 653 #define CONFIG_ENV_ADDR 0xfff80000
654 #else 654 #else
655 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) 655 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
656 #endif 656 #endif
657 #define CONFIG_ENV_SIZE 0x2000 657 #define CONFIG_ENV_SIZE 0x2000
658 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ 658 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
659 #endif 659 #endif
660 660
661 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ 661 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
662 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ 662 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
663 663
664 /* 664 /*
665 * Command line configuration. 665 * Command line configuration.
666 */ 666 */
667 #include <config_cmd_default.h> 667 #include <config_cmd_default.h>
668 668
669 #define CONFIG_CMD_IRQ 669 #define CONFIG_CMD_IRQ
670 #define CONFIG_CMD_PING 670 #define CONFIG_CMD_PING
671 #define CONFIG_CMD_I2C 671 #define CONFIG_CMD_I2C
672 #define CONFIG_CMD_MII 672 #define CONFIG_CMD_MII
673 #define CONFIG_CMD_ELF 673 #define CONFIG_CMD_ELF
674 #define CONFIG_CMD_IRQ 674 #define CONFIG_CMD_IRQ
675 #define CONFIG_CMD_SETEXPR 675 #define CONFIG_CMD_SETEXPR
676 #define CONFIG_CMD_REGINFO 676 #define CONFIG_CMD_REGINFO
677 677
678 #if defined(CONFIG_PCI) 678 #if defined(CONFIG_PCI)
679 #define CONFIG_CMD_PCI 679 #define CONFIG_CMD_PCI
680 #define CONFIG_CMD_NET 680 #define CONFIG_CMD_NET
681 #endif 681 #endif
682 682
683 #undef CONFIG_WATCHDOG /* watchdog disabled */ 683 #undef CONFIG_WATCHDOG /* watchdog disabled */
684 684
685 #define CONFIG_MMC 1 685 #define CONFIG_MMC 1
686 686
687 #ifdef CONFIG_MMC 687 #ifdef CONFIG_MMC
688 #define CONFIG_FSL_ESDHC 688 #define CONFIG_FSL_ESDHC
689 #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR 689 #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
690 #define CONFIG_CMD_MMC 690 #define CONFIG_CMD_MMC
691 #define CONFIG_GENERIC_MMC 691 #define CONFIG_GENERIC_MMC
692 #endif 692 #endif
693 693
694 /* 694 /*
695 * USB 695 * USB
696 */ 696 */
697 #define CONFIG_HAS_FSL_MPH_USB 697 #define CONFIG_HAS_FSL_MPH_USB
698 #ifdef CONFIG_HAS_FSL_MPH_USB 698 #ifdef CONFIG_HAS_FSL_MPH_USB
699 #define CONFIG_USB_EHCI 699 #define CONFIG_USB_EHCI
700 700
701 #ifdef CONFIG_USB_EHCI 701 #ifdef CONFIG_USB_EHCI
702 #define CONFIG_CMD_USB 702 #define CONFIG_CMD_USB
703 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 703 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
704 #define CONFIG_USB_EHCI_FSL 704 #define CONFIG_USB_EHCI_FSL
705 #define CONFIG_USB_STORAGE 705 #define CONFIG_USB_STORAGE
706 #endif 706 #endif
707 #endif 707 #endif
708 708
709 #if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI) 709 #if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI)
710 #define CONFIG_CMD_EXT2 710 #define CONFIG_CMD_EXT2
711 #define CONFIG_CMD_FAT 711 #define CONFIG_CMD_FAT
712 #define CONFIG_DOS_PARTITION 712 #define CONFIG_DOS_PARTITION
713 #endif 713 #endif
714 714
715 /* 715 /*
716 * Miscellaneous configurable options 716 * Miscellaneous configurable options
717 */ 717 */
718 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 718 #define CONFIG_SYS_LONGHELP /* undef to save memory */
719 #define CONFIG_CMDLINE_EDITING /* Command-line editing */ 719 #define CONFIG_CMDLINE_EDITING /* Command-line editing */
720 #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ 720 #define CONFIG_AUTO_COMPLETE /* add autocompletion support */
721 #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ 721 #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
722 #if defined(CONFIG_CMD_KGDB) 722 #if defined(CONFIG_CMD_KGDB)
723 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 723 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
724 #else 724 #else
725 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 725 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
726 #endif 726 #endif
727 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 727 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
728 + sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buffer Size */ 728 + sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buffer Size */
729 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 729 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
730 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 730 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
731 731
732 /* 732 /*
733 * For booting Linux, the board info and command line data 733 * For booting Linux, the board info and command line data
734 * have to be in the first 64 MB of memory, since this is 734 * have to be in the first 64 MB of memory, since this is
735 * the maximum mapped by the Linux kernel during initialization. 735 * the maximum mapped by the Linux kernel during initialization.
736 */ 736 */
737 #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux */ 737 #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux */
738 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ 738 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
739 739
740 #if defined(CONFIG_CMD_KGDB) 740 #if defined(CONFIG_CMD_KGDB)
741 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ 741 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
742 #endif 742 #endif
743 743
744 /* 744 /*
745 * Environment Configuration 745 * Environment Configuration
746 */ 746 */
747 747
748 /* The mac addresses for all ethernet interface */ 748 /* The mac addresses for all ethernet interface */
749 #if defined(CONFIG_TSEC_ENET) 749 #if defined(CONFIG_TSEC_ENET)
750 #define CONFIG_HAS_ETH0 750 #define CONFIG_HAS_ETH0
751 #define CONFIG_ETHADDR 00:E0:0C:02:00:FD 751 #define CONFIG_ETHADDR 00:E0:0C:02:00:FD
752 #define CONFIG_HAS_ETH1 752 #define CONFIG_HAS_ETH1
753 #define CONFIG_ETH1ADDR 00:E0:0C:02:01:FD 753 #define CONFIG_ETH1ADDR 00:E0:0C:02:01:FD
754 #define CONFIG_HAS_ETH2 754 #define CONFIG_HAS_ETH2
755 #define CONFIG_ETH2ADDR 00:E0:0C:02:02:FD 755 #define CONFIG_ETH2ADDR 00:E0:0C:02:02:FD
756 #define CONFIG_HAS_ETH3 756 #define CONFIG_HAS_ETH3
757 #define CONFIG_ETH3ADDR 00:E0:0C:02:03:FD 757 #define CONFIG_ETH3ADDR 00:E0:0C:02:03:FD
758 #endif 758 #endif
759 759
760 #define CONFIG_IPADDR 192.168.1.254 760 #define CONFIG_IPADDR 192.168.1.254
761 761
762 #define CONFIG_HOSTNAME unknown 762 #define CONFIG_HOSTNAME unknown
763 #define CONFIG_ROOTPATH "/opt/nfsroot" 763 #define CONFIG_ROOTPATH "/opt/nfsroot"
764 #define CONFIG_BOOTFILE "uImage" 764 #define CONFIG_BOOTFILE "uImage"
765 #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ 765 #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
766 766
767 #define CONFIG_SERVERIP 192.168.1.1 767 #define CONFIG_SERVERIP 192.168.1.1
768 #define CONFIG_GATEWAYIP 192.168.1.1 768 #define CONFIG_GATEWAYIP 192.168.1.1
769 #define CONFIG_NETMASK 255.255.255.0 769 #define CONFIG_NETMASK 255.255.255.0
770 770
771 /* default location for tftp and bootm */ 771 /* default location for tftp and bootm */
772 #define CONFIG_LOADADDR 1000000 772 #define CONFIG_LOADADDR 1000000
773 773
774 #define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ 774 #define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */
775 #undef CONFIG_BOOTARGS /* the boot command will set bootargs */ 775 #undef CONFIG_BOOTARGS /* the boot command will set bootargs */
776 776
777 #define CONFIG_BAUDRATE 115200 777 #define CONFIG_BAUDRATE 115200
778 778
779 #define CONFIG_EXTRA_ENV_SETTINGS \ 779 #define CONFIG_EXTRA_ENV_SETTINGS \
780 "netdev=eth0\0" \ 780 "netdev=eth0\0" \
781 "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ 781 "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
782 "tftpflash=tftpboot $loadaddr $uboot; " \ 782 "tftpflash=tftpboot $loadaddr $uboot; " \
783 "protect off " __stringify(CONFIG_SYS_TEXT_BASE) \ 783 "protect off " __stringify(CONFIG_SYS_TEXT_BASE) \
784 " +$filesize; " \ 784 " +$filesize; " \
785 "erase " __stringify(CONFIG_SYS_TEXT_BASE) \ 785 "erase " __stringify(CONFIG_SYS_TEXT_BASE) \
786 " +$filesize; " \ 786 " +$filesize; " \
787 "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ 787 "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \
788 " $filesize; " \ 788 " $filesize; " \
789 "protect on " __stringify(CONFIG_SYS_TEXT_BASE) \ 789 "protect on " __stringify(CONFIG_SYS_TEXT_BASE) \
790 " +$filesize; " \ 790 " +$filesize; " \
791 "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ 791 "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \
792 " $filesize\0" \ 792 " $filesize\0" \
793 "consoledev=ttyS0\0" \ 793 "consoledev=ttyS0\0" \
794 "ramdiskaddr=2000000\0" \ 794 "ramdiskaddr=2000000\0" \
795 "ramdiskfile=8536ds/ramdisk.uboot\0" \ 795 "ramdiskfile=8536ds/ramdisk.uboot\0" \
796 "fdtaddr=c00000\0" \ 796 "fdtaddr=c00000\0" \
797 "fdtfile=8536ds/mpc8536ds.dtb\0" \ 797 "fdtfile=8536ds/mpc8536ds.dtb\0" \
798 "bdev=sda3\0" \ 798 "bdev=sda3\0" \
799 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0" 799 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0"
800 800
801 #define CONFIG_HDBOOT \ 801 #define CONFIG_HDBOOT \
802 "setenv bootargs root=/dev/$bdev rw " \ 802 "setenv bootargs root=/dev/$bdev rw " \
803 "console=$consoledev,$baudrate $othbootargs;" \ 803 "console=$consoledev,$baudrate $othbootargs;" \
804 "tftp $loadaddr $bootfile;" \ 804 "tftp $loadaddr $bootfile;" \
805 "tftp $fdtaddr $fdtfile;" \ 805 "tftp $fdtaddr $fdtfile;" \
806 "bootm $loadaddr - $fdtaddr" 806 "bootm $loadaddr - $fdtaddr"
807 807
808 #define CONFIG_NFSBOOTCOMMAND \ 808 #define CONFIG_NFSBOOTCOMMAND \
809 "setenv bootargs root=/dev/nfs rw " \ 809 "setenv bootargs root=/dev/nfs rw " \
810 "nfsroot=$serverip:$rootpath " \ 810 "nfsroot=$serverip:$rootpath " \
811 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ 811 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
812 "console=$consoledev,$baudrate $othbootargs;" \ 812 "console=$consoledev,$baudrate $othbootargs;" \
813 "tftp $loadaddr $bootfile;" \ 813 "tftp $loadaddr $bootfile;" \
814 "tftp $fdtaddr $fdtfile;" \ 814 "tftp $fdtaddr $fdtfile;" \
815 "bootm $loadaddr - $fdtaddr" 815 "bootm $loadaddr - $fdtaddr"
816 816
817 #define CONFIG_RAMBOOTCOMMAND \ 817 #define CONFIG_RAMBOOTCOMMAND \
818 "setenv bootargs root=/dev/ram rw " \ 818 "setenv bootargs root=/dev/ram rw " \
819 "console=$consoledev,$baudrate $othbootargs;" \ 819 "console=$consoledev,$baudrate $othbootargs;" \
820 "tftp $ramdiskaddr $ramdiskfile;" \ 820 "tftp $ramdiskaddr $ramdiskfile;" \
821 "tftp $loadaddr $bootfile;" \ 821 "tftp $loadaddr $bootfile;" \
822 "tftp $fdtaddr $fdtfile;" \ 822 "tftp $fdtaddr $fdtfile;" \
823 "bootm $loadaddr $ramdiskaddr $fdtaddr" 823 "bootm $loadaddr $ramdiskaddr $fdtaddr"
824 824
825 #define CONFIG_BOOTCOMMAND CONFIG_HDBOOT 825 #define CONFIG_BOOTCOMMAND CONFIG_HDBOOT
826 826
827 #endif /* __CONFIG_H */ 827 #endif /* __CONFIG_H */
828 828
include/configs/MPC8569MDS.h
Diff comments   View file @ 4a37755
1 /* 1 /*
2 * Copyright 2009-2011 Freescale Semiconductor, Inc. 2 * Copyright 2009-2011 Freescale Semiconductor, Inc.
3 * 3 *
4 * SPDX-License-Identifier: GPL-2.0+ 4 * SPDX-License-Identifier: GPL-2.0+
5 */ 5 */
6 6
7 /* 7 /*
8 * mpc8569mds board configuration file 8 * mpc8569mds board configuration file
9 */ 9 */
10 #ifndef __CONFIG_H 10 #ifndef __CONFIG_H
11 #define __CONFIG_H 11 #define __CONFIG_H
12 12
13 /* High Level Configuration Options */ 13 /* High Level Configuration Options */
14 #define CONFIG_BOOKE 1 /* BOOKE */ 14 #define CONFIG_BOOKE 1 /* BOOKE */
15 #define CONFIG_E500 1 /* BOOKE e500 family */ 15 #define CONFIG_E500 1 /* BOOKE e500 family */
16 #define CONFIG_MPC8569 1 /* MPC8569 specific */ 16 #define CONFIG_MPC8569 1 /* MPC8569 specific */
17 #define CONFIG_MPC8569MDS 1 /* MPC8569MDS board specific */ 17 #define CONFIG_MPC8569MDS 1 /* MPC8569MDS board specific */
18 18
19 #define CONFIG_FSL_ELBC 1 /* Has Enhance localbus controller */ 19 #define CONFIG_FSL_ELBC 1 /* Has Enhance localbus controller */
20 20
21 #define CONFIG_SYS_SRIO 21 #define CONFIG_SYS_SRIO
22 #define CONFIG_SRIO1 /* SRIO port 1 */ 22 #define CONFIG_SRIO1 /* SRIO port 1 */
23 23
24 #define CONFIG_PCI 1 /* Disable PCI/PCIE */ 24 #define CONFIG_PCI 1 /* Disable PCI/PCIE */
25 #define CONFIG_PCIE1 1 /* PCIE controller */ 25 #define CONFIG_PCIE1 1 /* PCIE controller */
26 #define CONFIG_FSL_PCI_INIT 1 /* use common fsl pci init code */ 26 #define CONFIG_FSL_PCI_INIT 1 /* use common fsl pci init code */
27 #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ 27 #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */
28 #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ 28 #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */
29 #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ 29 #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
30 #define CONFIG_QE /* Enable QE */ 30 #define CONFIG_QE /* Enable QE */
31 #define CONFIG_ENV_OVERWRITE 31 #define CONFIG_ENV_OVERWRITE
32 #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ 32 #define CONFIG_FSL_LAW 1 /* Use common FSL init code */
33 33
34 #ifndef __ASSEMBLY__ 34 #ifndef __ASSEMBLY__
35 extern unsigned long get_clock_freq(void); 35 extern unsigned long get_clock_freq(void);
36 #endif 36 #endif
37 /* Replace a call to get_clock_freq (after it is implemented)*/ 37 /* Replace a call to get_clock_freq (after it is implemented)*/
38 #define CONFIG_SYS_CLK_FREQ 66666666 38 #define CONFIG_SYS_CLK_FREQ 66666666
39 #define CONFIG_DDR_CLK_FREQ CONFIG_SYS_CLK_FREQ 39 #define CONFIG_DDR_CLK_FREQ CONFIG_SYS_CLK_FREQ
40 40
41 #ifdef CONFIG_ATM 41 #ifdef CONFIG_ATM
42 #define CONFIG_PQ_MDS_PIB 42 #define CONFIG_PQ_MDS_PIB
43 #define CONFIG_PQ_MDS_PIB_ATM 43 #define CONFIG_PQ_MDS_PIB_ATM
44 #endif 44 #endif
45 45
46 /* 46 /*
47 * These can be toggled for performance analysis, otherwise use default. 47 * These can be toggled for performance analysis, otherwise use default.
48 */ 48 */
49 #define CONFIG_L2_CACHE /* toggle L2 cache */ 49 #define CONFIG_L2_CACHE /* toggle L2 cache */
50 #define CONFIG_BTB /* toggle branch predition */ 50 #define CONFIG_BTB /* toggle branch predition */
51 51
52 #ifdef CONFIG_NAND 52 #ifdef CONFIG_NAND
53 #define CONFIG_NAND_U_BOOT 1 53 #define CONFIG_NAND_U_BOOT 1
54 #define CONFIG_RAMBOOT_NAND 1 54 #define CONFIG_RAMBOOT_NAND 1
55 #ifdef CONFIG_NAND_SPL 55 #ifdef CONFIG_NAND_SPL
56 #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 56 #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
57 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ 57 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
58 #else 58 #else
59 #define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds 59 #define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
60 #define CONFIG_SYS_TEXT_BASE 0xf8f82000 60 #define CONFIG_SYS_TEXT_BASE 0xf8f82000
61 #endif 61 #endif
62 #endif 62 #endif
63 63
64 #ifndef CONFIG_SYS_TEXT_BASE 64 #ifndef CONFIG_SYS_TEXT_BASE
65 #define CONFIG_SYS_TEXT_BASE 0xfff80000 65 #define CONFIG_SYS_TEXT_BASE 0xfff80000
66 #endif 66 #endif
67 67
68 #ifndef CONFIG_SYS_MONITOR_BASE 68 #ifndef CONFIG_SYS_MONITOR_BASE
69 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ 69 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
70 #endif 70 #endif
71 71
72 /* 72 /*
73 * Only possible on E500 Version 2 or newer cores. 73 * Only possible on E500 Version 2 or newer cores.
74 */ 74 */
75 #define CONFIG_ENABLE_36BIT_PHYS 1 75 #define CONFIG_ENABLE_36BIT_PHYS 1
76 76
77 #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ 77 #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
78 #define CONFIG_BOARD_EARLY_INIT_R 1 78 #define CONFIG_BOARD_EARLY_INIT_R 1
79 #define CONFIG_HWCONFIG 79 #define CONFIG_HWCONFIG
80 80
81 #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ 81 #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
82 #define CONFIG_SYS_MEMTEST_END 0x00400000 82 #define CONFIG_SYS_MEMTEST_END 0x00400000
83 83
84 /* 84 /*
85 * Config the L2 Cache as L2 SRAM 85 * Config the L2 Cache as L2 SRAM
86 */ 86 */
87 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 87 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
88 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR 88 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
89 #define CONFIG_SYS_L2_SIZE (512 << 10) 89 #define CONFIG_SYS_L2_SIZE (512 << 10)
90 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) 90 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
91 91
92 #define CONFIG_SYS_CCSRBAR 0xe0000000 92 #define CONFIG_SYS_CCSRBAR 0xe0000000
93 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR 93 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
94 94
95 #if defined(CONFIG_NAND_SPL) 95 #if defined(CONFIG_NAND_SPL)
96 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE 96 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
97 #endif 97 #endif
98 98
99 /* DDR Setup */ 99 /* DDR Setup */
100 #define CONFIG_SYS_FSL_DDR3 100 #define CONFIG_SYS_FSL_DDR3
101 #undef CONFIG_FSL_DDR_INTERACTIVE 101 #undef CONFIG_FSL_DDR_INTERACTIVE
102 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ 102 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/
103 #define CONFIG_DDR_SPD 103 #define CONFIG_DDR_SPD
104 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ 104 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */
105 105
106 #define CONFIG_MEM_INIT_VALUE 0xDeadBeef 106 #define CONFIG_MEM_INIT_VALUE 0xDeadBeef
107 107
108 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 108 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
109 /* DDR is system memory*/ 109 /* DDR is system memory*/
110 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE 110 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
111 111
112 #define CONFIG_NUM_DDR_CONTROLLERS 1 112 #define CONFIG_NUM_DDR_CONTROLLERS 1
113 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 113 #define CONFIG_DIMM_SLOTS_PER_CTLR 1
114 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) 114 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
115 115
116 /* I2C addresses of SPD EEPROMs */ 116 /* I2C addresses of SPD EEPROMs */
117 #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ 117 #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */
118 118
119 /* These are used when DDR doesn't use SPD. */ 119 /* These are used when DDR doesn't use SPD. */
120 #define CONFIG_SYS_SDRAM_SIZE 1024 /* DDR is 1024MB */ 120 #define CONFIG_SYS_SDRAM_SIZE 1024 /* DDR is 1024MB */
121 #define CONFIG_SYS_DDR_CS0_BNDS 0x0000003F 121 #define CONFIG_SYS_DDR_CS0_BNDS 0x0000003F
122 #define CONFIG_SYS_DDR_CS0_CONFIG 0x80014202 122 #define CONFIG_SYS_DDR_CS0_CONFIG 0x80014202
123 #define CONFIG_SYS_DDR_TIMING_3 0x00020000 123 #define CONFIG_SYS_DDR_TIMING_3 0x00020000
124 #define CONFIG_SYS_DDR_TIMING_0 0x00330004 124 #define CONFIG_SYS_DDR_TIMING_0 0x00330004
125 #define CONFIG_SYS_DDR_TIMING_1 0x6F6B4644 125 #define CONFIG_SYS_DDR_TIMING_1 0x6F6B4644
126 #define CONFIG_SYS_DDR_TIMING_2 0x002888D0 126 #define CONFIG_SYS_DDR_TIMING_2 0x002888D0
127 #define CONFIG_SYS_DDR_SDRAM_CFG 0x47000000 127 #define CONFIG_SYS_DDR_SDRAM_CFG 0x47000000
128 #define CONFIG_SYS_DDR_SDRAM_CFG_2 0x04401040 128 #define CONFIG_SYS_DDR_SDRAM_CFG_2 0x04401040
129 #define CONFIG_SYS_DDR_SDRAM_MODE 0x40401521 129 #define CONFIG_SYS_DDR_SDRAM_MODE 0x40401521
130 #define CONFIG_SYS_DDR_SDRAM_MODE_2 0x8000C000 130 #define CONFIG_SYS_DDR_SDRAM_MODE_2 0x8000C000
131 #define CONFIG_SYS_DDR_SDRAM_INTERVAL 0x03E00000 131 #define CONFIG_SYS_DDR_SDRAM_INTERVAL 0x03E00000
132 #define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef 132 #define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef
133 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL 0x01000000 133 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL 0x01000000
134 #define CONFIG_SYS_DDR_TIMING_4 0x00220001 134 #define CONFIG_SYS_DDR_TIMING_4 0x00220001
135 #define CONFIG_SYS_DDR_TIMING_5 0x03402400 135 #define CONFIG_SYS_DDR_TIMING_5 0x03402400
136 #define CONFIG_SYS_DDR_ZQ_CNTL 0x89080600 136 #define CONFIG_SYS_DDR_ZQ_CNTL 0x89080600
137 #define CONFIG_SYS_DDR_WRLVL_CNTL 0x0655A604 137 #define CONFIG_SYS_DDR_WRLVL_CNTL 0x0655A604
138 #define CONFIG_SYS_DDR_CDR_1 0x80040000 138 #define CONFIG_SYS_DDR_CDR_1 0x80040000
139 #define CONFIG_SYS_DDR_CDR_2 0x00000000 139 #define CONFIG_SYS_DDR_CDR_2 0x00000000
140 #define CONFIG_SYS_DDR_OCD_CTRL 0x00000000 140 #define CONFIG_SYS_DDR_OCD_CTRL 0x00000000
141 #define CONFIG_SYS_DDR_OCD_STATUS 0x00000000 141 #define CONFIG_SYS_DDR_OCD_STATUS 0x00000000
142 #define CONFIG_SYS_DDR_CONTROL 0xc7000000 /* Type = DDR3 */ 142 #define CONFIG_SYS_DDR_CONTROL 0xc7000000 /* Type = DDR3 */
143 #define CONFIG_SYS_DDR_CONTROL2 0x24400000 143 #define CONFIG_SYS_DDR_CONTROL2 0x24400000
144 144
145 #define CONFIG_SYS_DDR_ERR_INT_EN 0x0000000d 145 #define CONFIG_SYS_DDR_ERR_INT_EN 0x0000000d
146 #define CONFIG_SYS_DDR_ERR_DIS 0x00000000 146 #define CONFIG_SYS_DDR_ERR_DIS 0x00000000
147 #define CONFIG_SYS_DDR_SBE 0x00010000 147 #define CONFIG_SYS_DDR_SBE 0x00010000
148 148
149 #undef CONFIG_CLOCKS_IN_MHZ 149 #undef CONFIG_CLOCKS_IN_MHZ
150 150
151 /* 151 /*
152 * Local Bus Definitions 152 * Local Bus Definitions
153 */ 153 */
154 154
155 #define CONFIG_SYS_FLASH_BASE 0xfe000000 /* start of FLASH 32M */ 155 #define CONFIG_SYS_FLASH_BASE 0xfe000000 /* start of FLASH 32M */
156 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE 156 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
157 157
158 #define CONFIG_SYS_BCSR_BASE 0xf8000000 158 #define CONFIG_SYS_BCSR_BASE 0xf8000000
159 #define CONFIG_SYS_BCSR_BASE_PHYS CONFIG_SYS_BCSR_BASE 159 #define CONFIG_SYS_BCSR_BASE_PHYS CONFIG_SYS_BCSR_BASE
160 160
161 /*Chip select 0 - Flash*/ 161 /*Chip select 0 - Flash*/
162 #define CONFIG_FLASH_BR_PRELIM 0xfe000801 162 #define CONFIG_FLASH_BR_PRELIM 0xfe000801
163 #define CONFIG_FLASH_OR_PRELIM 0xfe000ff7 163 #define CONFIG_FLASH_OR_PRELIM 0xfe000ff7
164 164
165 /*Chip select 1 - BCSR*/ 165 /*Chip select 1 - BCSR*/
166 #define CONFIG_SYS_BR1_PRELIM 0xf8000801 166 #define CONFIG_SYS_BR1_PRELIM 0xf8000801
167 #define CONFIG_SYS_OR1_PRELIM 0xffffe9f7 167 #define CONFIG_SYS_OR1_PRELIM 0xffffe9f7
168 168
169 /*Chip select 4 - PIB*/ 169 /*Chip select 4 - PIB*/
170 #define CONFIG_SYS_BR4_PRELIM 0xf8008801 170 #define CONFIG_SYS_BR4_PRELIM 0xf8008801
171 #define CONFIG_SYS_OR4_PRELIM 0xffffe9f7 171 #define CONFIG_SYS_OR4_PRELIM 0xffffe9f7
172 172
173 /*Chip select 5 - PIB*/ 173 /*Chip select 5 - PIB*/
174 #define CONFIG_SYS_BR5_PRELIM 0xf8010801 174 #define CONFIG_SYS_BR5_PRELIM 0xf8010801
175 #define CONFIG_SYS_OR5_PRELIM 0xffffe9f7 175 #define CONFIG_SYS_OR5_PRELIM 0xffffe9f7
176 176
177 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ 177 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
178 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */ 178 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
179 #undef CONFIG_SYS_FLASH_CHECKSUM 179 #undef CONFIG_SYS_FLASH_CHECKSUM
180 #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ 180 #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
181 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ 181 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
182 182
183 #if defined(CONFIG_RAMBOOT_NAND) 183 #if defined(CONFIG_RAMBOOT_NAND)
184 #define CONFIG_SYS_RAMBOOT 184 #define CONFIG_SYS_RAMBOOT
185 #define CONFIG_SYS_EXTRA_ENV_RELOC 185 #define CONFIG_SYS_EXTRA_ENV_RELOC
186 #else 186 #else
187 #undef CONFIG_SYS_RAMBOOT 187 #undef CONFIG_SYS_RAMBOOT
188 #endif 188 #endif
189 189
190 #define CONFIG_FLASH_CFI_DRIVER 190 #define CONFIG_FLASH_CFI_DRIVER
191 #define CONFIG_SYS_FLASH_CFI 191 #define CONFIG_SYS_FLASH_CFI
192 #define CONFIG_SYS_FLASH_EMPTY_INFO 192 #define CONFIG_SYS_FLASH_EMPTY_INFO
193 193
194 /* Chip select 3 - NAND */ 194 /* Chip select 3 - NAND */
195 #ifndef CONFIG_NAND_SPL 195 #ifndef CONFIG_NAND_SPL
196 #define CONFIG_SYS_NAND_BASE 0xFC000000 196 #define CONFIG_SYS_NAND_BASE 0xFC000000
197 #else 197 #else
198 #define CONFIG_SYS_NAND_BASE 0xFFF00000 198 #define CONFIG_SYS_NAND_BASE 0xFFF00000
199 #endif 199 #endif
200 200
201 /* NAND boot: 4K NAND loader config */ 201 /* NAND boot: 4K NAND loader config */
202 #define CONFIG_SYS_NAND_SPL_SIZE 0x1000 202 #define CONFIG_SYS_NAND_SPL_SIZE 0x1000
203 #define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) - 0x2000) 203 #define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) - 0x2000)
204 #define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR) 204 #define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR)
205 #define CONFIG_SYS_NAND_U_BOOT_START \ 205 #define CONFIG_SYS_NAND_U_BOOT_START \
206 (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE) 206 (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE)
207 #define CONFIG_SYS_NAND_U_BOOT_OFFS (0) 207 #define CONFIG_SYS_NAND_U_BOOT_OFFS (0)
208 #define CONFIG_SYS_NAND_U_BOOT_RELOC (CONFIG_SYS_INIT_L2_END - 0x2000) 208 #define CONFIG_SYS_NAND_U_BOOT_RELOC (CONFIG_SYS_INIT_L2_END - 0x2000)
209 #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF) 209 #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF)
210 210
211 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE 211 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
212 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE, } 212 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE, }
213 #define CONFIG_SYS_MAX_NAND_DEVICE 1 213 #define CONFIG_SYS_MAX_NAND_DEVICE 1
214 #define CONFIG_MTD_NAND_VERIFY_WRITE 1 214 #define CONFIG_MTD_NAND_VERIFY_WRITE 1
215 #define CONFIG_CMD_NAND 1 215 #define CONFIG_CMD_NAND 1
216 #define CONFIG_NAND_FSL_ELBC 1 216 #define CONFIG_NAND_FSL_ELBC 1
217 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 217 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
218 #define CONFIG_SYS_NAND_BR_PRELIM (CONFIG_SYS_NAND_BASE_PHYS \ 218 #define CONFIG_SYS_NAND_BR_PRELIM (CONFIG_SYS_NAND_BASE_PHYS \
219 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ 219 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
220 | BR_PS_8 /* Port Size = 8 bit */ \ 220 | BR_PS_8 /* Port Size = 8 bit */ \
221 | BR_MS_FCM /* MSEL = FCM */ \ 221 | BR_MS_FCM /* MSEL = FCM */ \
222 | BR_V) /* valid */ 222 | BR_V) /* valid */
223 #define CONFIG_SYS_NAND_OR_PRELIM (0xFFFC0000 /* length 256K */ \ 223 #define CONFIG_SYS_NAND_OR_PRELIM (0xFFFC0000 /* length 256K */ \
224 | OR_FCM_CSCT \ 224 | OR_FCM_CSCT \
225 | OR_FCM_CST \ 225 | OR_FCM_CST \
226 | OR_FCM_CHT \ 226 | OR_FCM_CHT \
227 | OR_FCM_SCY_1 \ 227 | OR_FCM_SCY_1 \
228 | OR_FCM_TRLX \ 228 | OR_FCM_TRLX \
229 | OR_FCM_EHTR) 229 | OR_FCM_EHTR)
230 230
231 #ifdef CONFIG_RAMBOOT_NAND 231 #ifdef CONFIG_RAMBOOT_NAND
232 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ 232 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
233 #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM/* NAND Options */ 233 #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM/* NAND Options */
234 #define CONFIG_SYS_BR3_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ 234 #define CONFIG_SYS_BR3_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
235 #define CONFIG_SYS_OR3_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ 235 #define CONFIG_SYS_OR3_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */
236 #else 236 #else
237 #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ 237 #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
238 #define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ 238 #define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */
239 #define CONFIG_SYS_BR3_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ 239 #define CONFIG_SYS_BR3_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
240 #define CONFIG_SYS_OR3_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ 240 #define CONFIG_SYS_OR3_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
241 #endif 241 #endif
242 242
243 #define CONFIG_SYS_LBC_LCRR 0x00000004 /* LB clock ratio reg */ 243 #define CONFIG_SYS_LBC_LCRR 0x00000004 /* LB clock ratio reg */
244 #define CONFIG_SYS_LBC_LBCR 0x00040000 /* LB config reg */ 244 #define CONFIG_SYS_LBC_LBCR 0x00040000 /* LB config reg */
245 #define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ 245 #define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */
246 #define CONFIG_SYS_LBC_MRTPR 0x00000000 /* LB refresh timer prescal*/ 246 #define CONFIG_SYS_LBC_MRTPR 0x00000000 /* LB refresh timer prescal*/
247 247
248 #define CONFIG_SYS_INIT_RAM_LOCK 1 248 #define CONFIG_SYS_INIT_RAM_LOCK 1
249 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ 249 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
250 #define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in RAM */ 250 #define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in RAM */
251 251
252 #define CONFIG_SYS_GBL_DATA_OFFSET \ 252 #define CONFIG_SYS_GBL_DATA_OFFSET \
253 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 253 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
254 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 254 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
255 255
256 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ 256 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
257 #define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */ 257 #define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */
258 258
259 /* Serial Port */ 259 /* Serial Port */
260 #define CONFIG_CONS_INDEX 1 260 #define CONFIG_CONS_INDEX 1
261 #define CONFIG_SYS_NS16550 261 #define CONFIG_SYS_NS16550
262 #define CONFIG_SYS_NS16550_SERIAL 262 #define CONFIG_SYS_NS16550_SERIAL
263 #define CONFIG_SYS_NS16550_REG_SIZE 1 263 #define CONFIG_SYS_NS16550_REG_SIZE 1
264 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) 264 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
265 #ifdef CONFIG_NAND_SPL 265 #ifdef CONFIG_NAND_SPL
266 #define CONFIG_NS16550_MIN_FUNCTIONS 266 #define CONFIG_NS16550_MIN_FUNCTIONS
267 #endif 267 #endif
268 268
269 #define CONFIG_SYS_BAUDRATE_TABLE \ 269 #define CONFIG_SYS_BAUDRATE_TABLE \
270 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} 270 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
271 271
272 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) 272 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
273 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) 273 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
274 274
275 /* Use the HUSH parser*/ 275 /* Use the HUSH parser*/
276 #define CONFIG_SYS_HUSH_PARSER 276 #define CONFIG_SYS_HUSH_PARSER
277 #ifdef CONFIG_SYS_HUSH_PARSER 277 #ifdef CONFIG_SYS_HUSH_PARSER
278 #endif 278 #endif
279 279
280 /* pass open firmware flat tree */ 280 /* pass open firmware flat tree */
281 #define CONFIG_OF_LIBFDT 1 281 #define CONFIG_OF_LIBFDT 1
282 #define CONFIG_OF_BOARD_SETUP 1 282 #define CONFIG_OF_BOARD_SETUP 1
283 #define CONFIG_OF_STDOUT_VIA_ALIAS 1 283 #define CONFIG_OF_STDOUT_VIA_ALIAS 1
284 284
285 /* 285 /*
286 * I2C 286 * I2C
287 */ 287 */
288 #define CONFIG_SYS_I2C 288 #define CONFIG_SYS_I2C
289 #define CONFIG_SYS_I2C_FSL 289 #define CONFIG_SYS_I2C_FSL
290 #define CONFIG_SYS_FSL_I2C_SPEED 400000 290 #define CONFIG_SYS_FSL_I2C_SPEED 400000
291 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F 291 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
292 #define CONFIG_SYS_FSL_I2C2_SPEED 400000 292 #define CONFIG_SYS_FSL_I2C2_SPEED 400000
293 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F 293 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
294 #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 294 #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
295 #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 295 #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
296 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } 296 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }
297 297
298 /* 298 /*
299 * I2C2 EEPROM 299 * I2C2 EEPROM
300 */ 300 */
301 #define CONFIG_ID_EEPROM 301 #define CONFIG_ID_EEPROM
302 #ifdef CONFIG_ID_EEPROM 302 #ifdef CONFIG_ID_EEPROM
303 #define CONFIG_SYS_I2C_EEPROM_NXID 303 #define CONFIG_SYS_I2C_EEPROM_NXID
304 #endif 304 #endif
305 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 305 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
306 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 306 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
307 #define CONFIG_SYS_EEPROM_BUS_NUM 1 307 #define CONFIG_SYS_EEPROM_BUS_NUM 1
308 308
309 #define PLPPAR1_I2C_BIT_MASK 0x0000000F 309 #define PLPPAR1_I2C_BIT_MASK 0x0000000F
310 #define PLPPAR1_I2C2_VAL 0x00000000 310 #define PLPPAR1_I2C2_VAL 0x00000000
311 #define PLPPAR1_ESDHC_VAL 0x0000000A 311 #define PLPPAR1_ESDHC_VAL 0x0000000A
312 #define PLPDIR1_I2C_BIT_MASK 0x0000000F 312 #define PLPDIR1_I2C_BIT_MASK 0x0000000F
313 #define PLPDIR1_I2C2_VAL 0x0000000F 313 #define PLPDIR1_I2C2_VAL 0x0000000F
314 #define PLPDIR1_ESDHC_VAL 0x00000006 314 #define PLPDIR1_ESDHC_VAL 0x00000006
315 #define PLPPAR1_UART0_BIT_MASK 0x00000fc0 315 #define PLPPAR1_UART0_BIT_MASK 0x00000fc0
316 #define PLPPAR1_ESDHC_4BITS_VAL 0x00000a80 316 #define PLPPAR1_ESDHC_4BITS_VAL 0x00000a80
317 #define PLPDIR1_UART0_BIT_MASK 0x00000fc0 317 #define PLPDIR1_UART0_BIT_MASK 0x00000fc0
318 #define PLPDIR1_ESDHC_4BITS_VAL 0x00000a80 318 #define PLPDIR1_ESDHC_4BITS_VAL 0x00000a80
319 319
320 /* 320 /*
321 * General PCI 321 * General PCI
322 * Memory Addresses are mapped 1-1. I/O is mapped from 0 322 * Memory Addresses are mapped 1-1. I/O is mapped from 0
323 */ 323 */
324 #define CONFIG_SYS_PCIE1_NAME "Slot" 324 #define CONFIG_SYS_PCIE1_NAME "Slot"
325 #define CONFIG_SYS_PCIE1_MEM_VIRT 0xa0000000 325 #define CONFIG_SYS_PCIE1_MEM_VIRT 0xa0000000
326 #define CONFIG_SYS_PCIE1_MEM_BUS 0xa0000000 326 #define CONFIG_SYS_PCIE1_MEM_BUS 0xa0000000
327 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xa0000000 327 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xa0000000
328 #define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ 328 #define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */
329 #define CONFIG_SYS_PCIE1_IO_VIRT 0xe2800000 329 #define CONFIG_SYS_PCIE1_IO_VIRT 0xe2800000
330 #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 330 #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
331 #define CONFIG_SYS_PCIE1_IO_PHYS 0xe2800000 331 #define CONFIG_SYS_PCIE1_IO_PHYS 0xe2800000
332 #define CONFIG_SYS_PCIE1_IO_SIZE 0x00800000 /* 8M */ 332 #define CONFIG_SYS_PCIE1_IO_SIZE 0x00800000 /* 8M */
333 333
334 #define CONFIG_SYS_SRIO1_MEM_VIRT 0xC0000000 334 #define CONFIG_SYS_SRIO1_MEM_VIRT 0xC0000000
335 #define CONFIG_SYS_SRIO1_MEM_BUS 0xC0000000 335 #define CONFIG_SYS_SRIO1_MEM_BUS 0xC0000000
336 #define CONFIG_SYS_SRIO1_MEM_PHYS CONFIG_SYS_SRIO1_MEM_BUS 336 #define CONFIG_SYS_SRIO1_MEM_PHYS CONFIG_SYS_SRIO1_MEM_BUS
337 #define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 512M */ 337 #define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 512M */
338 338
339 #ifdef CONFIG_QE 339 #ifdef CONFIG_QE
340 /* 340 /*
341 * QE UEC ethernet configuration 341 * QE UEC ethernet configuration
342 */ 342 */
343 #define CONFIG_SYS_UCC_RGMII_MODE /* Set UCC work at RGMII by default */ 343 #define CONFIG_SYS_UCC_RGMII_MODE /* Set UCC work at RGMII by default */
344 #undef CONFIG_SYS_UCC_RMII_MODE /* Set UCC work at RMII mode */ 344 #undef CONFIG_SYS_UCC_RMII_MODE /* Set UCC work at RMII mode */
345 345
346 #define CONFIG_MIIM_ADDRESS (CONFIG_SYS_CCSRBAR + 0x82120) 346 #define CONFIG_MIIM_ADDRESS (CONFIG_SYS_CCSRBAR + 0x82120)
347 #define CONFIG_UEC_ETH 347 #define CONFIG_UEC_ETH
348 #define CONFIG_ETHPRIME "UEC0" 348 #define CONFIG_ETHPRIME "UEC0"
349 #define CONFIG_PHY_MODE_NEED_CHANGE 349 #define CONFIG_PHY_MODE_NEED_CHANGE
350 350
351 #define CONFIG_UEC_ETH1 /* GETH1 */ 351 #define CONFIG_UEC_ETH1 /* GETH1 */
352 #define CONFIG_HAS_ETH0 352 #define CONFIG_HAS_ETH0
353 353
354 #ifdef CONFIG_UEC_ETH1 354 #ifdef CONFIG_UEC_ETH1
355 #define CONFIG_SYS_UEC1_UCC_NUM 0 /* UCC1 */ 355 #define CONFIG_SYS_UEC1_UCC_NUM 0 /* UCC1 */
356 #define CONFIG_SYS_UEC1_RX_CLK QE_CLK_NONE 356 #define CONFIG_SYS_UEC1_RX_CLK QE_CLK_NONE
357 #if defined(CONFIG_SYS_UCC_RGMII_MODE) 357 #if defined(CONFIG_SYS_UCC_RGMII_MODE)
358 #define CONFIG_SYS_UEC1_TX_CLK QE_CLK12 358 #define CONFIG_SYS_UEC1_TX_CLK QE_CLK12
359 #define CONFIG_SYS_UEC1_ETH_TYPE GIGA_ETH 359 #define CONFIG_SYS_UEC1_ETH_TYPE GIGA_ETH
360 #define CONFIG_SYS_UEC1_PHY_ADDR 7 360 #define CONFIG_SYS_UEC1_PHY_ADDR 7
361 #define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_ID 361 #define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_ID
362 #define CONFIG_SYS_UEC1_INTERFACE_SPEED 1000 362 #define CONFIG_SYS_UEC1_INTERFACE_SPEED 1000
363 #elif defined(CONFIG_SYS_UCC_RMII_MODE) 363 #elif defined(CONFIG_SYS_UCC_RMII_MODE)
364 #define CONFIG_SYS_UEC1_TX_CLK QE_CLK16 /* CLK16 for RMII */ 364 #define CONFIG_SYS_UEC1_TX_CLK QE_CLK16 /* CLK16 for RMII */
365 #define CONFIG_SYS_UEC1_ETH_TYPE FAST_ETH 365 #define CONFIG_SYS_UEC1_ETH_TYPE FAST_ETH
366 #define CONFIG_SYS_UEC1_PHY_ADDR 8 /* 0x8 for RMII */ 366 #define CONFIG_SYS_UEC1_PHY_ADDR 8 /* 0x8 for RMII */
367 #define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_RMII 367 #define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_RMII
368 #define CONFIG_SYS_UEC1_INTERFACE_SPEED 100 368 #define CONFIG_SYS_UEC1_INTERFACE_SPEED 100
369 #endif /* CONFIG_SYS_UCC_RGMII_MODE */ 369 #endif /* CONFIG_SYS_UCC_RGMII_MODE */
370 #endif /* CONFIG_UEC_ETH1 */ 370 #endif /* CONFIG_UEC_ETH1 */
371 371
372 #define CONFIG_UEC_ETH2 /* GETH2 */ 372 #define CONFIG_UEC_ETH2 /* GETH2 */
373 #define CONFIG_HAS_ETH1 373 #define CONFIG_HAS_ETH1
374 374
375 #ifdef CONFIG_UEC_ETH2 375 #ifdef CONFIG_UEC_ETH2
376 #define CONFIG_SYS_UEC2_UCC_NUM 1 /* UCC2 */ 376 #define CONFIG_SYS_UEC2_UCC_NUM 1 /* UCC2 */
377 #define CONFIG_SYS_UEC2_RX_CLK QE_CLK_NONE 377 #define CONFIG_SYS_UEC2_RX_CLK QE_CLK_NONE
378 #if defined(CONFIG_SYS_UCC_RGMII_MODE) 378 #if defined(CONFIG_SYS_UCC_RGMII_MODE)
379 #define CONFIG_SYS_UEC2_TX_CLK QE_CLK17 379 #define CONFIG_SYS_UEC2_TX_CLK QE_CLK17
380 #define CONFIG_SYS_UEC2_ETH_TYPE GIGA_ETH 380 #define CONFIG_SYS_UEC2_ETH_TYPE GIGA_ETH
381 #define CONFIG_SYS_UEC2_PHY_ADDR 1 381 #define CONFIG_SYS_UEC2_PHY_ADDR 1
382 #define CONFIG_SYS_UEC2_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_ID 382 #define CONFIG_SYS_UEC2_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_ID
383 #define CONFIG_SYS_UEC2_INTERFACE_SPEED 1000 383 #define CONFIG_SYS_UEC2_INTERFACE_SPEED 1000
384 #elif defined(CONFIG_SYS_UCC_RMII_MODE) 384 #elif defined(CONFIG_SYS_UCC_RMII_MODE)
385 #define CONFIG_SYS_UEC2_TX_CLK QE_CLK16 /* CLK 16 for RMII */ 385 #define CONFIG_SYS_UEC2_TX_CLK QE_CLK16 /* CLK 16 for RMII */
386 #define CONFIG_SYS_UEC2_ETH_TYPE FAST_ETH 386 #define CONFIG_SYS_UEC2_ETH_TYPE FAST_ETH
387 #define CONFIG_SYS_UEC2_PHY_ADDR 0x9 /* 0x9 for RMII */ 387 #define CONFIG_SYS_UEC2_PHY_ADDR 0x9 /* 0x9 for RMII */
388 #define CONFIG_SYS_UEC2_INTERFACE_TYPE PHY_INTERFACE_MODE_RMII 388 #define CONFIG_SYS_UEC2_INTERFACE_TYPE PHY_INTERFACE_MODE_RMII
389 #define CONFIG_SYS_UEC2_INTERFACE_SPEED 100 389 #define CONFIG_SYS_UEC2_INTERFACE_SPEED 100
390 #endif /* CONFIG_SYS_UCC_RGMII_MODE */ 390 #endif /* CONFIG_SYS_UCC_RGMII_MODE */
391 #endif /* CONFIG_UEC_ETH2 */ 391 #endif /* CONFIG_UEC_ETH2 */
392 392
393 #define CONFIG_UEC_ETH3 /* GETH3 */ 393 #define CONFIG_UEC_ETH3 /* GETH3 */
394 #define CONFIG_HAS_ETH2 394 #define CONFIG_HAS_ETH2
395 395
396 #ifdef CONFIG_UEC_ETH3 396 #ifdef CONFIG_UEC_ETH3
397 #define CONFIG_SYS_UEC3_UCC_NUM 2 /* UCC3 */ 397 #define CONFIG_SYS_UEC3_UCC_NUM 2 /* UCC3 */
398 #define CONFIG_SYS_UEC3_RX_CLK QE_CLK_NONE 398 #define CONFIG_SYS_UEC3_RX_CLK QE_CLK_NONE
399 #if defined(CONFIG_SYS_UCC_RGMII_MODE) 399 #if defined(CONFIG_SYS_UCC_RGMII_MODE)
400 #define CONFIG_SYS_UEC3_TX_CLK QE_CLK12 400 #define CONFIG_SYS_UEC3_TX_CLK QE_CLK12
401 #define CONFIG_SYS_UEC3_ETH_TYPE GIGA_ETH 401 #define CONFIG_SYS_UEC3_ETH_TYPE GIGA_ETH
402 #define CONFIG_SYS_UEC3_PHY_ADDR 2 402 #define CONFIG_SYS_UEC3_PHY_ADDR 2
403 #define CONFIG_SYS_UEC3_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_ID 403 #define CONFIG_SYS_UEC3_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_ID
404 #define CONFIG_SYS_UEC3_INTERFACE_SPEED 1000 404 #define CONFIG_SYS_UEC3_INTERFACE_SPEED 1000
405 #elif defined(CONFIG_SYS_UCC_RMII_MODE) 405 #elif defined(CONFIG_SYS_UCC_RMII_MODE)
406 #define CONFIG_SYS_UEC3_TX_CLK QE_CLK16 /* CLK_16 for RMII */ 406 #define CONFIG_SYS_UEC3_TX_CLK QE_CLK16 /* CLK_16 for RMII */
407 #define CONFIG_SYS_UEC3_ETH_TYPE FAST_ETH 407 #define CONFIG_SYS_UEC3_ETH_TYPE FAST_ETH
408 #define CONFIG_SYS_UEC3_PHY_ADDR 0xA /* 0xA for RMII */ 408 #define CONFIG_SYS_UEC3_PHY_ADDR 0xA /* 0xA for RMII */
409 #define CONFIG_SYS_UEC3_INTERFACE_TYPE PHY_INTERFACE_MODE_RMII 409 #define CONFIG_SYS_UEC3_INTERFACE_TYPE PHY_INTERFACE_MODE_RMII
410 #define CONFIG_SYS_UEC3_INTERFACE_SPEED 100 410 #define CONFIG_SYS_UEC3_INTERFACE_SPEED 100
411 #endif /* CONFIG_SYS_UCC_RGMII_MODE */ 411 #endif /* CONFIG_SYS_UCC_RGMII_MODE */
412 #endif /* CONFIG_UEC_ETH3 */ 412 #endif /* CONFIG_UEC_ETH3 */
413 413
414 #define CONFIG_UEC_ETH4 /* GETH4 */ 414 #define CONFIG_UEC_ETH4 /* GETH4 */
415 #define CONFIG_HAS_ETH3 415 #define CONFIG_HAS_ETH3
416 416
417 #ifdef CONFIG_UEC_ETH4 417 #ifdef CONFIG_UEC_ETH4
418 #define CONFIG_SYS_UEC4_UCC_NUM 3 /* UCC4 */ 418 #define CONFIG_SYS_UEC4_UCC_NUM 3 /* UCC4 */
419 #define CONFIG_SYS_UEC4_RX_CLK QE_CLK_NONE 419 #define CONFIG_SYS_UEC4_RX_CLK QE_CLK_NONE
420 #if defined(CONFIG_SYS_UCC_RGMII_MODE) 420 #if defined(CONFIG_SYS_UCC_RGMII_MODE)
421 #define CONFIG_SYS_UEC4_TX_CLK QE_CLK17 421 #define CONFIG_SYS_UEC4_TX_CLK QE_CLK17
422 #define CONFIG_SYS_UEC4_ETH_TYPE GIGA_ETH 422 #define CONFIG_SYS_UEC4_ETH_TYPE GIGA_ETH
423 #define CONFIG_SYS_UEC4_PHY_ADDR 3 423 #define CONFIG_SYS_UEC4_PHY_ADDR 3
424 #define CONFIG_SYS_UEC4_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_ID 424 #define CONFIG_SYS_UEC4_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_ID
425 #define CONFIG_SYS_UEC4_INTERFACE_SPEED 1000 425 #define CONFIG_SYS_UEC4_INTERFACE_SPEED 1000
426 #elif defined(CONFIG_SYS_UCC_RMII_MODE) 426 #elif defined(CONFIG_SYS_UCC_RMII_MODE)
427 #define CONFIG_SYS_UEC4_TX_CLK QE_CLK16 /* CLK16 for RMII */ 427 #define CONFIG_SYS_UEC4_TX_CLK QE_CLK16 /* CLK16 for RMII */
428 #define CONFIG_SYS_UEC4_ETH_TYPE FAST_ETH 428 #define CONFIG_SYS_UEC4_ETH_TYPE FAST_ETH
429 #define CONFIG_SYS_UEC4_PHY_ADDR 0xB /* 0xB for RMII */ 429 #define CONFIG_SYS_UEC4_PHY_ADDR 0xB /* 0xB for RMII */
430 #define CONFIG_SYS_UEC4_INTERFACE_TYPE PHY_INTERFACE_MODE_RMII 430 #define CONFIG_SYS_UEC4_INTERFACE_TYPE PHY_INTERFACE_MODE_RMII
431 #define CONFIG_SYS_UEC4_INTERFACE_SPEED 100 431 #define CONFIG_SYS_UEC4_INTERFACE_SPEED 100
432 #endif /* CONFIG_SYS_UCC_RGMII_MODE */ 432 #endif /* CONFIG_SYS_UCC_RGMII_MODE */
433 #endif /* CONFIG_UEC_ETH4 */ 433 #endif /* CONFIG_UEC_ETH4 */
434 434
435 #undef CONFIG_UEC_ETH6 /* GETH6 */ 435 #undef CONFIG_UEC_ETH6 /* GETH6 */
436 #define CONFIG_HAS_ETH5 436 #define CONFIG_HAS_ETH5
437 437
438 #ifdef CONFIG_UEC_ETH6 438 #ifdef CONFIG_UEC_ETH6
439 #define CONFIG_SYS_UEC6_UCC_NUM 5 /* UCC6 */ 439 #define CONFIG_SYS_UEC6_UCC_NUM 5 /* UCC6 */
440 #define CONFIG_SYS_UEC6_RX_CLK QE_CLK_NONE 440 #define CONFIG_SYS_UEC6_RX_CLK QE_CLK_NONE
441 #define CONFIG_SYS_UEC6_TX_CLK QE_CLK_NONE 441 #define CONFIG_SYS_UEC6_TX_CLK QE_CLK_NONE
442 #define CONFIG_SYS_UEC6_ETH_TYPE GIGA_ETH 442 #define CONFIG_SYS_UEC6_ETH_TYPE GIGA_ETH
443 #define CONFIG_SYS_UEC6_PHY_ADDR 4 443 #define CONFIG_SYS_UEC6_PHY_ADDR 4
444 #define CONFIG_SYS_UEC6_INTERFACE_TYPE PHY_INTERFACE_MODE_SGMII 444 #define CONFIG_SYS_UEC6_INTERFACE_TYPE PHY_INTERFACE_MODE_SGMII
445 #define CONFIG_SYS_UEC6_INTERFACE_SPEED 1000 445 #define CONFIG_SYS_UEC6_INTERFACE_SPEED 1000
446 #endif /* CONFIG_UEC_ETH6 */ 446 #endif /* CONFIG_UEC_ETH6 */
447 447
448 #undef CONFIG_UEC_ETH8 /* GETH8 */ 448 #undef CONFIG_UEC_ETH8 /* GETH8 */
449 #define CONFIG_HAS_ETH7 449 #define CONFIG_HAS_ETH7
450 450
451 #ifdef CONFIG_UEC_ETH8 451 #ifdef CONFIG_UEC_ETH8
452 #define CONFIG_SYS_UEC8_UCC_NUM 7 /* UCC8 */ 452 #define CONFIG_SYS_UEC8_UCC_NUM 7 /* UCC8 */
453 #define CONFIG_SYS_UEC8_RX_CLK QE_CLK_NONE 453 #define CONFIG_SYS_UEC8_RX_CLK QE_CLK_NONE
454 #define CONFIG_SYS_UEC8_TX_CLK QE_CLK_NONE 454 #define CONFIG_SYS_UEC8_TX_CLK QE_CLK_NONE
455 #define CONFIG_SYS_UEC8_ETH_TYPE GIGA_ETH 455 #define CONFIG_SYS_UEC8_ETH_TYPE GIGA_ETH
456 #define CONFIG_SYS_UEC8_PHY_ADDR 6 456 #define CONFIG_SYS_UEC8_PHY_ADDR 6
457 #define CONFIG_SYS_UEC8_INTERFACE_TYPE PHY_INTERFACE_MODE_SGMII 457 #define CONFIG_SYS_UEC8_INTERFACE_TYPE PHY_INTERFACE_MODE_SGMII
458 #define CONFIG_SYS_UEC8_INTERFACE_SPEED 1000 458 #define CONFIG_SYS_UEC8_INTERFACE_SPEED 1000
459 #endif /* CONFIG_UEC_ETH8 */ 459 #endif /* CONFIG_UEC_ETH8 */
460 460
461 #endif /* CONFIG_QE */ 461 #endif /* CONFIG_QE */
462 462
463 #if defined(CONFIG_PCI) 463 #if defined(CONFIG_PCI)
464 464
465 #define CONFIG_PCI_PNP /* do pci plug-and-play */ 465 #define CONFIG_PCI_PNP /* do pci plug-and-play */
466 466
467 #undef CONFIG_EEPRO100 467 #undef CONFIG_EEPRO100
468 #undef CONFIG_TULIP 468 #undef CONFIG_TULIP
469 #define CONFIG_E1000 /* Define e1000 pci Ethernet card */ 469 #define CONFIG_E1000 /* Define e1000 pci Ethernet card */
470 470
471 #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ 471 #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
472 472
473 #endif /* CONFIG_PCI */ 473 #endif /* CONFIG_PCI */
474 474
475 /* 475 /*
476 * Environment 476 * Environment
477 */ 477 */
478 #if defined(CONFIG_SYS_RAMBOOT) 478 #if defined(CONFIG_SYS_RAMBOOT)
479 #if defined(CONFIG_RAMBOOT_NAND) 479 #if defined(CONFIG_RAMBOOT_NAND)
480 #define CONFIG_ENV_IS_IN_NAND 1 480 #define CONFIG_ENV_IS_IN_NAND 1
481 #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE 481 #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
482 #define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) 482 #define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
483 #endif 483 #endif
484 #else 484 #else
485 #define CONFIG_ENV_IS_IN_FLASH 1 485 #define CONFIG_ENV_IS_IN_FLASH 1
486 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) 486 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
487 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ 487 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */
488 #define CONFIG_ENV_SIZE 0x2000 488 #define CONFIG_ENV_SIZE 0x2000
489 #endif 489 #endif
490 490
491 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ 491 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
492 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ 492 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
493 493
494 /* QE microcode/firmware address */ 494 /* QE microcode/firmware address */
495 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR 495 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
496 #define CONFIG_SYS_QE_FMAN_FW_ADDR 0xfff00000 496 #define CONFIG_SYS_QE_FMAN_FW_ADDR 0xfff00000
497 497
498 /* 498 /*
499 * BOOTP options 499 * BOOTP options
500 */ 500 */
501 #define CONFIG_BOOTP_BOOTFILESIZE 501 #define CONFIG_BOOTP_BOOTFILESIZE
502 #define CONFIG_BOOTP_BOOTPATH 502 #define CONFIG_BOOTP_BOOTPATH
503 #define CONFIG_BOOTP_GATEWAY 503 #define CONFIG_BOOTP_GATEWAY
504 #define CONFIG_BOOTP_HOSTNAME 504 #define CONFIG_BOOTP_HOSTNAME
505 505
506 506
507 /* 507 /*
508 * Command line configuration. 508 * Command line configuration.
509 */ 509 */
510 #include <config_cmd_default.h> 510 #include <config_cmd_default.h>
511 511
512 #define CONFIG_CMD_PING 512 #define CONFIG_CMD_PING
513 #define CONFIG_CMD_I2C 513 #define CONFIG_CMD_I2C
514 #define CONFIG_CMD_MII 514 #define CONFIG_CMD_MII
515 #define CONFIG_CMD_ELF 515 #define CONFIG_CMD_ELF
516 #define CONFIG_CMD_IRQ 516 #define CONFIG_CMD_IRQ
517 #define CONFIG_CMD_SETEXPR 517 #define CONFIG_CMD_SETEXPR
518 #define CONFIG_CMD_REGINFO 518 #define CONFIG_CMD_REGINFO
519 519
520 #if defined(CONFIG_PCI) 520 #if defined(CONFIG_PCI)
521 #define CONFIG_CMD_PCI 521 #define CONFIG_CMD_PCI
522 #endif 522 #endif
523 523
524 524
525 #undef CONFIG_WATCHDOG /* watchdog disabled */ 525 #undef CONFIG_WATCHDOG /* watchdog disabled */
526 526
527 #define CONFIG_MMC 1 527 #define CONFIG_MMC 1
528 528
529 #ifdef CONFIG_MMC 529 #ifdef CONFIG_MMC
530 #define CONFIG_FSL_ESDHC 530 #define CONFIG_FSL_ESDHC
531 #define CONFIG_FSL_ESDHC_PIN_MUX 531 #define CONFIG_FSL_ESDHC_PIN_MUX
532 #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR 532 #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
533 #define CONFIG_CMD_MMC 533 #define CONFIG_CMD_MMC
534 #define CONFIG_GENERIC_MMC 534 #define CONFIG_GENERIC_MMC
535 #define CONFIG_CMD_EXT2 535 #define CONFIG_CMD_EXT2
536 #define CONFIG_CMD_FAT 536 #define CONFIG_CMD_FAT
537 #define CONFIG_DOS_PARTITION 537 #define CONFIG_DOS_PARTITION
538 #endif 538 #endif
539 539
540 /* 540 /*
541 * Miscellaneous configurable options 541 * Miscellaneous configurable options
542 */ 542 */
543 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 543 #define CONFIG_SYS_LONGHELP /* undef to save memory */
544 #define CONFIG_CMDLINE_EDITING /* Command-line editing */ 544 #define CONFIG_CMDLINE_EDITING /* Command-line editing */
545 #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ 545 #define CONFIG_AUTO_COMPLETE /* add autocompletion support */
546 #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ 546 #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
547 #if defined(CONFIG_CMD_KGDB) 547 #if defined(CONFIG_CMD_KGDB)
548 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O Buffer Size */ 548 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O Buffer Size */
549 #else 549 #else
550 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 550 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
551 #endif 551 #endif
552 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 552 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
553 /* Print Buffer Size */ 553 /* Print Buffer Size */
554 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 554 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
555 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 555 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
556 /* Boot Argument Buffer Size */ 556 /* Boot Argument Buffer Size */
557 557
558 /* 558 /*
559 * For booting Linux, the board info and command line data 559 * For booting Linux, the board info and command line data
560 * have to be in the first 64 MB of memory, since this is 560 * have to be in the first 64 MB of memory, since this is
561 * the maximum mapped by the Linux kernel during initialization. 561 * the maximum mapped by the Linux kernel during initialization.
562 */ 562 */
563 #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ 563 #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/
564 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ 564 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
565 565
566 #if defined(CONFIG_CMD_KGDB) 566 #if defined(CONFIG_CMD_KGDB)
567 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ 567 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
568 #endif 568 #endif
569 569
570 /* 570 /*
571 * Environment Configuration 571 * Environment Configuration
572 */ 572 */
573 #define CONFIG_HOSTNAME mpc8569mds 573 #define CONFIG_HOSTNAME mpc8569mds
574 #define CONFIG_ROOTPATH "/nfsroot" 574 #define CONFIG_ROOTPATH "/nfsroot"
575 #define CONFIG_BOOTFILE "your.uImage" 575 #define CONFIG_BOOTFILE "your.uImage"
576 576
577 #define CONFIG_SERVERIP 192.168.1.1 577 #define CONFIG_SERVERIP 192.168.1.1
578 #define CONFIG_GATEWAYIP 192.168.1.1 578 #define CONFIG_GATEWAYIP 192.168.1.1
579 #define CONFIG_NETMASK 255.255.255.0 579 #define CONFIG_NETMASK 255.255.255.0
580 580
581 #define CONFIG_LOADADDR 200000 /*default location for tftp and bootm*/ 581 #define CONFIG_LOADADDR 200000 /*default location for tftp and bootm*/
582 582
583 #define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ 583 #define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */
584 #undef CONFIG_BOOTARGS /* the boot command will set bootargs*/ 584 #undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
585 585
586 #define CONFIG_BAUDRATE 115200 586 #define CONFIG_BAUDRATE 115200
587 587
588 #define CONFIG_EXTRA_ENV_SETTINGS \ 588 #define CONFIG_EXTRA_ENV_SETTINGS \
589 "netdev=eth0\0" \ 589 "netdev=eth0\0" \
590 "consoledev=ttyS0\0" \ 590 "consoledev=ttyS0\0" \
591 "ramdiskaddr=600000\0" \ 591 "ramdiskaddr=600000\0" \
592 "ramdiskfile=your.ramdisk.u-boot\0" \ 592 "ramdiskfile=your.ramdisk.u-boot\0" \
593 "fdtaddr=400000\0" \ 593 "fdtaddr=400000\0" \
594 "fdtfile=your.fdt.dtb\0" \ 594 "fdtfile=your.fdt.dtb\0" \
595 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 595 "nfsargs=setenv bootargs root=/dev/nfs rw " \
596 "nfsroot=$serverip:$rootpath " \ 596 "nfsroot=$serverip:$rootpath " \
597 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ 597 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
598 "console=$consoledev,$baudrate $othbootargs\0" \ 598 "console=$consoledev,$baudrate $othbootargs\0" \
599 "ramargs=setenv bootargs root=/dev/ram rw " \ 599 "ramargs=setenv bootargs root=/dev/ram rw " \
600 "console=$consoledev,$baudrate $othbootargs\0" \ 600 "console=$consoledev,$baudrate $othbootargs\0" \
601 601
602 #define CONFIG_NFSBOOTCOMMAND \ 602 #define CONFIG_NFSBOOTCOMMAND \
603 "run nfsargs;" \ 603 "run nfsargs;" \
604 "tftp $loadaddr $bootfile;" \ 604 "tftp $loadaddr $bootfile;" \
605 "tftp $fdtaddr $fdtfile;" \ 605 "tftp $fdtaddr $fdtfile;" \
606 "bootm $loadaddr - $fdtaddr" 606 "bootm $loadaddr - $fdtaddr"
607 607
608 #define CONFIG_RAMBOOTCOMMAND \ 608 #define CONFIG_RAMBOOTCOMMAND \
609 "run ramargs;" \ 609 "run ramargs;" \
610 "tftp $ramdiskaddr $ramdiskfile;" \ 610 "tftp $ramdiskaddr $ramdiskfile;" \
611 "tftp $loadaddr $bootfile;" \ 611 "tftp $loadaddr $bootfile;" \
612 "bootm $loadaddr $ramdiskaddr" 612 "bootm $loadaddr $ramdiskaddr"
613 613
614 #define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND 614 #define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
615 615
616 #endif /* __CONFIG_H */ 616 #endif /* __CONFIG_H */
617 617
include/configs/MPC8572DS.h
Diff comments   View file @ 4a37755
1 /* 1 /*
2 * Copyright 2007-2008,2010-2011 Freescale Semiconductor, Inc. 2 * Copyright 2007-2008,2010-2011 Freescale Semiconductor, Inc.
3 * 3 *
4 * SPDX-License-Identifier: GPL-2.0+ 4 * SPDX-License-Identifier: GPL-2.0+
5 */ 5 */
6 6
7 /* 7 /*
8 * mpc8572ds board configuration file 8 * mpc8572ds board configuration file
9 * 9 *
10 */ 10 */
11 #ifndef __CONFIG_H 11 #ifndef __CONFIG_H
12 #define __CONFIG_H 12 #define __CONFIG_H
13 13
14 #include "../board/freescale/common/ics307_clk.h" 14 #include "../board/freescale/common/ics307_clk.h"
15 15
16 #ifdef CONFIG_36BIT 16 #ifdef CONFIG_36BIT
17 #define CONFIG_PHYS_64BIT 17 #define CONFIG_PHYS_64BIT
18 #endif 18 #endif
19 19
20 #ifdef CONFIG_NAND 20 #ifdef CONFIG_NAND
21 #define CONFIG_NAND_U_BOOT 21 #define CONFIG_NAND_U_BOOT
22 #define CONFIG_RAMBOOT_NAND 22 #define CONFIG_RAMBOOT_NAND
23 #ifdef CONFIG_NAND_SPL 23 #ifdef CONFIG_NAND_SPL
24 #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 24 #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
25 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ 25 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
26 #else 26 #else
27 #define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds 27 #define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
28 #define CONFIG_SYS_TEXT_BASE 0xf8f82000 28 #define CONFIG_SYS_TEXT_BASE 0xf8f82000
29 #endif /* CONFIG_NAND_SPL */ 29 #endif /* CONFIG_NAND_SPL */
30 #endif 30 #endif
31 31
32 #ifndef CONFIG_SYS_TEXT_BASE 32 #ifndef CONFIG_SYS_TEXT_BASE
33 #define CONFIG_SYS_TEXT_BASE 0xeff80000 33 #define CONFIG_SYS_TEXT_BASE 0xeff80000
34 #endif 34 #endif
35 35
36 #ifndef CONFIG_RESET_VECTOR_ADDRESS 36 #ifndef CONFIG_RESET_VECTOR_ADDRESS
37 #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc 37 #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
38 #endif 38 #endif
39 39
40 #ifndef CONFIG_SYS_MONITOR_BASE 40 #ifndef CONFIG_SYS_MONITOR_BASE
41 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ 41 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
42 #endif 42 #endif
43 43
44 /* High Level Configuration Options */ 44 /* High Level Configuration Options */
45 #define CONFIG_BOOKE 1 /* BOOKE */ 45 #define CONFIG_BOOKE 1 /* BOOKE */
46 #define CONFIG_E500 1 /* BOOKE e500 family */ 46 #define CONFIG_E500 1 /* BOOKE e500 family */
47 #define CONFIG_MPC8572 1 47 #define CONFIG_MPC8572 1
48 #define CONFIG_MPC8572DS 1 48 #define CONFIG_MPC8572DS 1
49 #define CONFIG_MP 1 /* support multiple processors */ 49 #define CONFIG_MP 1 /* support multiple processors */
50 50
51 #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ 51 #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */
52 #define CONFIG_PCI 1 /* Enable PCI/PCIE */ 52 #define CONFIG_PCI 1 /* Enable PCI/PCIE */
53 #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ 53 #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */
54 #define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */ 54 #define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */
55 #define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */ 55 #define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */
56 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ 56 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
57 #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ 57 #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */
58 #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ 58 #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */
59 #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ 59 #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
60 60
61 #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ 61 #define CONFIG_FSL_LAW 1 /* Use common FSL init code */
62 62
63 #define CONFIG_TSEC_ENET /* tsec ethernet support */ 63 #define CONFIG_TSEC_ENET /* tsec ethernet support */
64 #define CONFIG_ENV_OVERWRITE 64 #define CONFIG_ENV_OVERWRITE
65 65
66 #define CONFIG_SYS_CLK_FREQ get_board_sys_clk() /* sysclk for MPC85xx */ 66 #define CONFIG_SYS_CLK_FREQ get_board_sys_clk() /* sysclk for MPC85xx */
67 #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() /* ddrclk for MPC85xx */ 67 #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() /* ddrclk for MPC85xx */
68 #define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 clock chip ref freq */ 68 #define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 clock chip ref freq */
69 69
70 /* 70 /*
71 * These can be toggled for performance analysis, otherwise use default. 71 * These can be toggled for performance analysis, otherwise use default.
72 */ 72 */
73 #define CONFIG_L2_CACHE /* toggle L2 cache */ 73 #define CONFIG_L2_CACHE /* toggle L2 cache */
74 #define CONFIG_BTB /* toggle branch predition */ 74 #define CONFIG_BTB /* toggle branch predition */
75 75
76 #define CONFIG_ENABLE_36BIT_PHYS 1 76 #define CONFIG_ENABLE_36BIT_PHYS 1
77 77
78 #ifdef CONFIG_PHYS_64BIT 78 #ifdef CONFIG_PHYS_64BIT
79 #define CONFIG_ADDR_MAP 1 79 #define CONFIG_ADDR_MAP 1
80 #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ 80 #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
81 #endif 81 #endif
82 82
83 #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */ 83 #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */
84 #define CONFIG_SYS_MEMTEST_END 0x7fffffff 84 #define CONFIG_SYS_MEMTEST_END 0x7fffffff
85 #define CONFIG_PANIC_HANG /* do not reset board on panic */ 85 #define CONFIG_PANIC_HANG /* do not reset board on panic */
86 86
87 /* 87 /*
88 * Config the L2 Cache as L2 SRAM 88 * Config the L2 Cache as L2 SRAM
89 */ 89 */
90 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 90 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
91 #ifdef CONFIG_PHYS_64BIT 91 #ifdef CONFIG_PHYS_64BIT
92 #define CONFIG_SYS_INIT_L2_ADDR_PHYS 0xff8f80000ull 92 #define CONFIG_SYS_INIT_L2_ADDR_PHYS 0xff8f80000ull
93 #else 93 #else
94 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR 94 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
95 #endif 95 #endif
96 #define CONFIG_SYS_L2_SIZE (512 << 10) 96 #define CONFIG_SYS_L2_SIZE (512 << 10)
97 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) 97 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
98 98
99 #define CONFIG_SYS_CCSRBAR 0xffe00000 99 #define CONFIG_SYS_CCSRBAR 0xffe00000
100 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR 100 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
101 101
102 #if defined(CONFIG_NAND_SPL) 102 #if defined(CONFIG_NAND_SPL)
103 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE 103 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
104 #endif 104 #endif
105 105
106 /* DDR Setup */ 106 /* DDR Setup */
107 #define CONFIG_VERY_BIG_RAM 107 #define CONFIG_VERY_BIG_RAM
108 #define CONFIG_SYS_FSL_DDR2 108 #define CONFIG_SYS_FSL_DDR2
109 #undef CONFIG_FSL_DDR_INTERACTIVE 109 #undef CONFIG_FSL_DDR_INTERACTIVE
110 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ 110 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
111 #define CONFIG_DDR_SPD 111 #define CONFIG_DDR_SPD
112 112
113 #define CONFIG_DDR_ECC 113 #define CONFIG_DDR_ECC
114 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER 114 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
115 #define CONFIG_MEM_INIT_VALUE 0xDeadBeef 115 #define CONFIG_MEM_INIT_VALUE 0xDeadBeef
116 116
117 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 117 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
118 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE 118 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
119 119
120 #define CONFIG_NUM_DDR_CONTROLLERS 2 120 #define CONFIG_NUM_DDR_CONTROLLERS 2
121 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 121 #define CONFIG_DIMM_SLOTS_PER_CTLR 1
122 #define CONFIG_CHIP_SELECTS_PER_CTRL 2 122 #define CONFIG_CHIP_SELECTS_PER_CTRL 2
123 123
124 /* I2C addresses of SPD EEPROMs */ 124 /* I2C addresses of SPD EEPROMs */
125 #define CONFIG_SYS_SPD_BUS_NUM 1 /* SPD EEPROMS locate on I2C bus 1 */ 125 #define CONFIG_SYS_SPD_BUS_NUM 1 /* SPD EEPROMS locate on I2C bus 1 */
126 #define SPD_EEPROM_ADDRESS1 0x51 /* CTLR 0 DIMM 0 */ 126 #define SPD_EEPROM_ADDRESS1 0x51 /* CTLR 0 DIMM 0 */
127 #define SPD_EEPROM_ADDRESS2 0x52 /* CTLR 1 DIMM 0 */ 127 #define SPD_EEPROM_ADDRESS2 0x52 /* CTLR 1 DIMM 0 */
128 128
129 /* These are used when DDR doesn't use SPD. */ 129 /* These are used when DDR doesn't use SPD. */
130 #define CONFIG_SYS_SDRAM_SIZE 512 /* DDR is 512MB */ 130 #define CONFIG_SYS_SDRAM_SIZE 512 /* DDR is 512MB */
131 #define CONFIG_SYS_DDR_CS0_BNDS 0x0000001F 131 #define CONFIG_SYS_DDR_CS0_BNDS 0x0000001F
132 #define CONFIG_SYS_DDR_CS0_CONFIG 0x80010202 /* Enable, no interleaving */ 132 #define CONFIG_SYS_DDR_CS0_CONFIG 0x80010202 /* Enable, no interleaving */
133 #define CONFIG_SYS_DDR_TIMING_3 0x00020000 133 #define CONFIG_SYS_DDR_TIMING_3 0x00020000
134 #define CONFIG_SYS_DDR_TIMING_0 0x00260802 134 #define CONFIG_SYS_DDR_TIMING_0 0x00260802
135 #define CONFIG_SYS_DDR_TIMING_1 0x626b2634 135 #define CONFIG_SYS_DDR_TIMING_1 0x626b2634
136 #define CONFIG_SYS_DDR_TIMING_2 0x062874cf 136 #define CONFIG_SYS_DDR_TIMING_2 0x062874cf
137 #define CONFIG_SYS_DDR_MODE_1 0x00440462 137 #define CONFIG_SYS_DDR_MODE_1 0x00440462
138 #define CONFIG_SYS_DDR_MODE_2 0x00000000 138 #define CONFIG_SYS_DDR_MODE_2 0x00000000
139 #define CONFIG_SYS_DDR_INTERVAL 0x0c300100 139 #define CONFIG_SYS_DDR_INTERVAL 0x0c300100
140 #define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef 140 #define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef
141 #define CONFIG_SYS_DDR_CLK_CTRL 0x00800000 141 #define CONFIG_SYS_DDR_CLK_CTRL 0x00800000
142 #define CONFIG_SYS_DDR_OCD_CTRL 0x00000000 142 #define CONFIG_SYS_DDR_OCD_CTRL 0x00000000
143 #define CONFIG_SYS_DDR_OCD_STATUS 0x00000000 143 #define CONFIG_SYS_DDR_OCD_STATUS 0x00000000
144 #define CONFIG_SYS_DDR_CONTROL 0xc3000008 /* Type = DDR2 */ 144 #define CONFIG_SYS_DDR_CONTROL 0xc3000008 /* Type = DDR2 */
145 #define CONFIG_SYS_DDR_CONTROL2 0x24400000 145 #define CONFIG_SYS_DDR_CONTROL2 0x24400000
146 146
147 #define CONFIG_SYS_DDR_ERR_INT_EN 0x0000000d 147 #define CONFIG_SYS_DDR_ERR_INT_EN 0x0000000d
148 #define CONFIG_SYS_DDR_ERR_DIS 0x00000000 148 #define CONFIG_SYS_DDR_ERR_DIS 0x00000000
149 #define CONFIG_SYS_DDR_SBE 0x00010000 149 #define CONFIG_SYS_DDR_SBE 0x00010000
150 150
151 /* 151 /*
152 * Make sure required options are set 152 * Make sure required options are set
153 */ 153 */
154 #ifndef CONFIG_SPD_EEPROM 154 #ifndef CONFIG_SPD_EEPROM
155 #error ("CONFIG_SPD_EEPROM is required") 155 #error ("CONFIG_SPD_EEPROM is required")
156 #endif 156 #endif
157 157
158 #undef CONFIG_CLOCKS_IN_MHZ 158 #undef CONFIG_CLOCKS_IN_MHZ
159 159
160 /* 160 /*
161 * Memory map 161 * Memory map
162 * 162 *
163 * 0x0000_0000 0x7fff_ffff DDR 2G Cacheable 163 * 0x0000_0000 0x7fff_ffff DDR 2G Cacheable
164 * 0x8000_0000 0xbfff_ffff PCI Express Mem 1G non-cacheable 164 * 0x8000_0000 0xbfff_ffff PCI Express Mem 1G non-cacheable
165 * 0xc000_0000 0xdfff_ffff PCI 512M non-cacheable 165 * 0xc000_0000 0xdfff_ffff PCI 512M non-cacheable
166 * 0xe100_0000 0xe3ff_ffff PCI IO range 4M non-cacheable 166 * 0xe100_0000 0xe3ff_ffff PCI IO range 4M non-cacheable
167 * 167 *
168 * Localbus cacheable (TBD) 168 * Localbus cacheable (TBD)
169 * 0xXXXX_XXXX 0xXXXX_XXXX SRAM YZ M Cacheable 169 * 0xXXXX_XXXX 0xXXXX_XXXX SRAM YZ M Cacheable
170 * 170 *
171 * Localbus non-cacheable 171 * Localbus non-cacheable
172 * 0xe000_0000 0xe80f_ffff Promjet/free 128M non-cacheable 172 * 0xe000_0000 0xe80f_ffff Promjet/free 128M non-cacheable
173 * 0xe800_0000 0xefff_ffff FLASH 128M non-cacheable 173 * 0xe800_0000 0xefff_ffff FLASH 128M non-cacheable
174 * 0xffa0_0000 0xffaf_ffff NAND 1M non-cacheable 174 * 0xffa0_0000 0xffaf_ffff NAND 1M non-cacheable
175 * 0xffdf_0000 0xffdf_7fff PIXIS 32K non-cacheable TLB0 175 * 0xffdf_0000 0xffdf_7fff PIXIS 32K non-cacheable TLB0
176 * 0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0 176 * 0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0
177 * 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable 177 * 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable
178 */ 178 */
179 179
180 /* 180 /*
181 * Local Bus Definitions 181 * Local Bus Definitions
182 */ 182 */
183 #define CONFIG_SYS_FLASH_BASE 0xe0000000 /* start of FLASH 128M */ 183 #define CONFIG_SYS_FLASH_BASE 0xe0000000 /* start of FLASH 128M */
184 #ifdef CONFIG_PHYS_64BIT 184 #ifdef CONFIG_PHYS_64BIT
185 #define CONFIG_SYS_FLASH_BASE_PHYS 0xfe0000000ull 185 #define CONFIG_SYS_FLASH_BASE_PHYS 0xfe0000000ull
186 #else 186 #else
187 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE 187 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
188 #endif 188 #endif
189 189
190 190
191 #define CONFIG_FLASH_BR_PRELIM \ 191 #define CONFIG_FLASH_BR_PRELIM \
192 (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000) | BR_PS_16 | BR_V) 192 (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000) | BR_PS_16 | BR_V)
193 #define CONFIG_FLASH_OR_PRELIM 0xf8000ff7 193 #define CONFIG_FLASH_OR_PRELIM 0xf8000ff7
194 194
195 #define CONFIG_SYS_BR1_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V) 195 #define CONFIG_SYS_BR1_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V)
196 #define CONFIG_SYS_OR1_PRELIM 0xf8000ff7 196 #define CONFIG_SYS_OR1_PRELIM 0xf8000ff7
197 197
198 #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS} 198 #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS}
199 #define CONFIG_SYS_FLASH_QUIET_TEST 199 #define CONFIG_SYS_FLASH_QUIET_TEST
200 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ 200 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
201 201
202 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ 202 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */
203 #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ 203 #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */
204 #undef CONFIG_SYS_FLASH_CHECKSUM 204 #undef CONFIG_SYS_FLASH_CHECKSUM
205 #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ 205 #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
206 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ 206 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
207 207
208 #if defined(CONFIG_RAMBOOT_NAND) 208 #if defined(CONFIG_RAMBOOT_NAND)
209 #define CONFIG_SYS_RAMBOOT 209 #define CONFIG_SYS_RAMBOOT
210 #define CONFIG_SYS_EXTRA_ENV_RELOC 210 #define CONFIG_SYS_EXTRA_ENV_RELOC
211 #else 211 #else
212 #undef CONFIG_SYS_RAMBOOT 212 #undef CONFIG_SYS_RAMBOOT
213 #endif 213 #endif
214 214
215 #define CONFIG_FLASH_CFI_DRIVER 215 #define CONFIG_FLASH_CFI_DRIVER
216 #define CONFIG_SYS_FLASH_CFI 216 #define CONFIG_SYS_FLASH_CFI
217 #define CONFIG_SYS_FLASH_EMPTY_INFO 217 #define CONFIG_SYS_FLASH_EMPTY_INFO
218 #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 218 #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7
219 219
220 #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ 220 #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */
221 221
222 #define CONFIG_HWCONFIG /* enable hwconfig */ 222 #define CONFIG_HWCONFIG /* enable hwconfig */
223 #define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */ 223 #define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */
224 #define PIXIS_BASE 0xffdf0000 /* PIXIS registers */ 224 #define PIXIS_BASE 0xffdf0000 /* PIXIS registers */
225 #ifdef CONFIG_PHYS_64BIT 225 #ifdef CONFIG_PHYS_64BIT
226 #define PIXIS_BASE_PHYS 0xfffdf0000ull 226 #define PIXIS_BASE_PHYS 0xfffdf0000ull
227 #else 227 #else
228 #define PIXIS_BASE_PHYS PIXIS_BASE 228 #define PIXIS_BASE_PHYS PIXIS_BASE
229 #endif 229 #endif
230 230
231 #define CONFIG_SYS_BR3_PRELIM (BR_PHYS_ADDR(PIXIS_BASE_PHYS) | BR_PS_8 | BR_V) 231 #define CONFIG_SYS_BR3_PRELIM (BR_PHYS_ADDR(PIXIS_BASE_PHYS) | BR_PS_8 | BR_V)
232 #define CONFIG_SYS_OR3_PRELIM 0xffffeff7 /* 32KB but only 4k mapped */ 232 #define CONFIG_SYS_OR3_PRELIM 0xffffeff7 /* 32KB but only 4k mapped */
233 233
234 #define PIXIS_ID 0x0 /* Board ID at offset 0 */ 234 #define PIXIS_ID 0x0 /* Board ID at offset 0 */
235 #define PIXIS_VER 0x1 /* Board version at offset 1 */ 235 #define PIXIS_VER 0x1 /* Board version at offset 1 */
236 #define PIXIS_PVER 0x2 /* PIXIS FPGA version at offset 2 */ 236 #define PIXIS_PVER 0x2 /* PIXIS FPGA version at offset 2 */
237 #define PIXIS_CSR 0x3 /* PIXIS General control/status register */ 237 #define PIXIS_CSR 0x3 /* PIXIS General control/status register */
238 #define PIXIS_RST 0x4 /* PIXIS Reset Control register */ 238 #define PIXIS_RST 0x4 /* PIXIS Reset Control register */
239 #define PIXIS_PWR 0x5 /* PIXIS Power status register */ 239 #define PIXIS_PWR 0x5 /* PIXIS Power status register */
240 #define PIXIS_AUX 0x6 /* Auxiliary 1 register */ 240 #define PIXIS_AUX 0x6 /* Auxiliary 1 register */
241 #define PIXIS_SPD 0x7 /* Register for SYSCLK speed */ 241 #define PIXIS_SPD 0x7 /* Register for SYSCLK speed */
242 #define PIXIS_AUX2 0x8 /* Auxiliary 2 register */ 242 #define PIXIS_AUX2 0x8 /* Auxiliary 2 register */
243 #define PIXIS_VCTL 0x10 /* VELA Control Register */ 243 #define PIXIS_VCTL 0x10 /* VELA Control Register */
244 #define PIXIS_VSTAT 0x11 /* VELA Status Register */ 244 #define PIXIS_VSTAT 0x11 /* VELA Status Register */
245 #define PIXIS_VCFGEN0 0x12 /* VELA Config Enable 0 */ 245 #define PIXIS_VCFGEN0 0x12 /* VELA Config Enable 0 */
246 #define PIXIS_VCFGEN1 0x13 /* VELA Config Enable 1 */ 246 #define PIXIS_VCFGEN1 0x13 /* VELA Config Enable 1 */
247 #define PIXIS_VCORE0 0x14 /* VELA VCORE0 Register */ 247 #define PIXIS_VCORE0 0x14 /* VELA VCORE0 Register */
248 #define PIXIS_VBOOT 0x16 /* VELA VBOOT Register */ 248 #define PIXIS_VBOOT 0x16 /* VELA VBOOT Register */
249 #define PIXIS_VBOOT_LBMAP 0xc0 /* VBOOT - CFG_LBMAP */ 249 #define PIXIS_VBOOT_LBMAP 0xc0 /* VBOOT - CFG_LBMAP */
250 #define PIXIS_VBOOT_LBMAP_NOR0 0x00 /* cfg_lbmap - boot from NOR 0 */ 250 #define PIXIS_VBOOT_LBMAP_NOR0 0x00 /* cfg_lbmap - boot from NOR 0 */
251 #define PIXIS_VBOOT_LBMAP_PJET 0x01 /* cfg_lbmap - boot from projet */ 251 #define PIXIS_VBOOT_LBMAP_PJET 0x01 /* cfg_lbmap - boot from projet */
252 #define PIXIS_VBOOT_LBMAP_NAND 0x02 /* cfg_lbmap - boot from NAND */ 252 #define PIXIS_VBOOT_LBMAP_NAND 0x02 /* cfg_lbmap - boot from NAND */
253 #define PIXIS_VBOOT_LBMAP_NOR1 0x03 /* cfg_lbmap - boot from NOR 1 */ 253 #define PIXIS_VBOOT_LBMAP_NOR1 0x03 /* cfg_lbmap - boot from NOR 1 */
254 #define PIXIS_VSPEED0 0x17 /* VELA VSpeed 0 */ 254 #define PIXIS_VSPEED0 0x17 /* VELA VSpeed 0 */
255 #define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */ 255 #define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */
256 #define PIXIS_VSPEED2 0x19 /* VELA VSpeed 2 */ 256 #define PIXIS_VSPEED2 0x19 /* VELA VSpeed 2 */
257 #define PIXIS_VSYSCLK0 0x1C /* VELA SYSCLK0 Register */ 257 #define PIXIS_VSYSCLK0 0x1C /* VELA SYSCLK0 Register */
258 #define PIXIS_VSYSCLK1 0x1D /* VELA SYSCLK1 Register */ 258 #define PIXIS_VSYSCLK1 0x1D /* VELA SYSCLK1 Register */
259 #define PIXIS_VSYSCLK2 0x1E /* VELA SYSCLK2 Register */ 259 #define PIXIS_VSYSCLK2 0x1E /* VELA SYSCLK2 Register */
260 #define PIXIS_VDDRCLK0 0x1F /* VELA DDRCLK0 Register */ 260 #define PIXIS_VDDRCLK0 0x1F /* VELA DDRCLK0 Register */
261 #define PIXIS_VDDRCLK1 0x20 /* VELA DDRCLK1 Register */ 261 #define PIXIS_VDDRCLK1 0x20 /* VELA DDRCLK1 Register */
262 #define PIXIS_VDDRCLK2 0x21 /* VELA DDRCLK2 Register */ 262 #define PIXIS_VDDRCLK2 0x21 /* VELA DDRCLK2 Register */
263 #define PIXIS_VWATCH 0x24 /* Watchdog Register */ 263 #define PIXIS_VWATCH 0x24 /* Watchdog Register */
264 #define PIXIS_LED 0x25 /* LED Register */ 264 #define PIXIS_LED 0x25 /* LED Register */
265 265
266 #define PIXIS_SPD_SYSCLK_MASK 0x7 /* SYSCLK option */ 266 #define PIXIS_SPD_SYSCLK_MASK 0x7 /* SYSCLK option */
267 267
268 /* old pixis referenced names */ 268 /* old pixis referenced names */
269 #define PIXIS_VCLKH 0x19 /* VELA VCLKH register */ 269 #define PIXIS_VCLKH 0x19 /* VELA VCLKH register */
270 #define PIXIS_VCLKL 0x1A /* VELA VCLKL register */ 270 #define PIXIS_VCLKL 0x1A /* VELA VCLKL register */
271 #define CONFIG_SYS_PIXIS_VBOOT_MASK 0xc0 271 #define CONFIG_SYS_PIXIS_VBOOT_MASK 0xc0
272 #define PIXIS_VSPEED2_TSEC1SER 0x8 272 #define PIXIS_VSPEED2_TSEC1SER 0x8
273 #define PIXIS_VSPEED2_TSEC2SER 0x4 273 #define PIXIS_VSPEED2_TSEC2SER 0x4
274 #define PIXIS_VSPEED2_TSEC3SER 0x2 274 #define PIXIS_VSPEED2_TSEC3SER 0x2
275 #define PIXIS_VSPEED2_TSEC4SER 0x1 275 #define PIXIS_VSPEED2_TSEC4SER 0x1
276 #define PIXIS_VCFGEN1_TSEC1SER 0x20 276 #define PIXIS_VCFGEN1_TSEC1SER 0x20
277 #define PIXIS_VCFGEN1_TSEC2SER 0x20 277 #define PIXIS_VCFGEN1_TSEC2SER 0x20
278 #define PIXIS_VCFGEN1_TSEC3SER 0x20 278 #define PIXIS_VCFGEN1_TSEC3SER 0x20
279 #define PIXIS_VCFGEN1_TSEC4SER 0x20 279 #define PIXIS_VCFGEN1_TSEC4SER 0x20
280 #define PIXIS_VSPEED2_MASK (PIXIS_VSPEED2_TSEC1SER \ 280 #define PIXIS_VSPEED2_MASK (PIXIS_VSPEED2_TSEC1SER \
281 | PIXIS_VSPEED2_TSEC2SER \ 281 | PIXIS_VSPEED2_TSEC2SER \
282 | PIXIS_VSPEED2_TSEC3SER \ 282 | PIXIS_VSPEED2_TSEC3SER \
283 | PIXIS_VSPEED2_TSEC4SER) 283 | PIXIS_VSPEED2_TSEC4SER)
284 #define PIXIS_VCFGEN1_MASK (PIXIS_VCFGEN1_TSEC1SER \ 284 #define PIXIS_VCFGEN1_MASK (PIXIS_VCFGEN1_TSEC1SER \
285 | PIXIS_VCFGEN1_TSEC2SER \ 285 | PIXIS_VCFGEN1_TSEC2SER \
286 | PIXIS_VCFGEN1_TSEC3SER \ 286 | PIXIS_VCFGEN1_TSEC3SER \
287 | PIXIS_VCFGEN1_TSEC4SER) 287 | PIXIS_VCFGEN1_TSEC4SER)
288 288
289 #define CONFIG_SYS_INIT_RAM_LOCK 1 289 #define CONFIG_SYS_INIT_RAM_LOCK 1
290 #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ 290 #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */
291 #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */ 291 #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */
292 292
293 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 293 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
294 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 294 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
295 295
296 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ 296 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
297 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */ 297 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
298 298
299 #ifndef CONFIG_NAND_SPL 299 #ifndef CONFIG_NAND_SPL
300 #define CONFIG_SYS_NAND_BASE 0xffa00000 300 #define CONFIG_SYS_NAND_BASE 0xffa00000
301 #ifdef CONFIG_PHYS_64BIT 301 #ifdef CONFIG_PHYS_64BIT
302 #define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull 302 #define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull
303 #else 303 #else
304 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE 304 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
305 #endif 305 #endif
306 #else 306 #else
307 #define CONFIG_SYS_NAND_BASE 0xfff00000 307 #define CONFIG_SYS_NAND_BASE 0xfff00000
308 #ifdef CONFIG_PHYS_64BIT 308 #ifdef CONFIG_PHYS_64BIT
309 #define CONFIG_SYS_NAND_BASE_PHYS 0xffff00000ull 309 #define CONFIG_SYS_NAND_BASE_PHYS 0xffff00000ull
310 #else 310 #else
311 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE 311 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
312 #endif 312 #endif
313 #endif 313 #endif
314 314
315 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE,\ 315 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE,\
316 CONFIG_SYS_NAND_BASE + 0x40000, \ 316 CONFIG_SYS_NAND_BASE + 0x40000, \
317 CONFIG_SYS_NAND_BASE + 0x80000,\ 317 CONFIG_SYS_NAND_BASE + 0x80000,\
318 CONFIG_SYS_NAND_BASE + 0xC0000} 318 CONFIG_SYS_NAND_BASE + 0xC0000}
319 #define CONFIG_SYS_MAX_NAND_DEVICE 4 319 #define CONFIG_SYS_MAX_NAND_DEVICE 4
320 #define CONFIG_MTD_NAND_VERIFY_WRITE 320 #define CONFIG_MTD_NAND_VERIFY_WRITE
321 #define CONFIG_CMD_NAND 1 321 #define CONFIG_CMD_NAND 1
322 #define CONFIG_NAND_FSL_ELBC 1 322 #define CONFIG_NAND_FSL_ELBC 1
323 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 323 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
324 #define CONFIG_SYS_NAND_MAX_OOBFREE 5 324 #define CONFIG_SYS_NAND_MAX_OOBFREE 5
325 #define CONFIG_SYS_NAND_MAX_ECCPOS 56 325 #define CONFIG_SYS_NAND_MAX_ECCPOS 56
326 326
327 /* NAND boot: 4K NAND loader config */ 327 /* NAND boot: 4K NAND loader config */
328 #define CONFIG_SYS_NAND_SPL_SIZE 0x1000 328 #define CONFIG_SYS_NAND_SPL_SIZE 0x1000
329 #define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) - 0x2000) 329 #define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) - 0x2000)
330 #define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR) 330 #define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR)
331 #define CONFIG_SYS_NAND_U_BOOT_START \ 331 #define CONFIG_SYS_NAND_U_BOOT_START \
332 (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE) 332 (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE)
333 #define CONFIG_SYS_NAND_U_BOOT_OFFS (0) 333 #define CONFIG_SYS_NAND_U_BOOT_OFFS (0)
334 #define CONFIG_SYS_NAND_U_BOOT_RELOC (CONFIG_SYS_INIT_L2_END - 0x2000) 334 #define CONFIG_SYS_NAND_U_BOOT_RELOC (CONFIG_SYS_INIT_L2_END - 0x2000)
335 #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF) 335 #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF)
336 336
337 337
338 /* NAND flash config */ 338 /* NAND flash config */
339 #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ 339 #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
340 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ 340 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
341 | BR_PS_8 /* Port Size = 8 bit */ \ 341 | BR_PS_8 /* Port Size = 8 bit */ \
342 | BR_MS_FCM /* MSEL = FCM */ \ 342 | BR_MS_FCM /* MSEL = FCM */ \
343 | BR_V) /* valid */ 343 | BR_V) /* valid */
344 #define CONFIG_SYS_NAND_OR_PRELIM (0xFFFC0000 /* length 256K */ \ 344 #define CONFIG_SYS_NAND_OR_PRELIM (0xFFFC0000 /* length 256K */ \
345 | OR_FCM_PGS /* Large Page*/ \ 345 | OR_FCM_PGS /* Large Page*/ \
346 | OR_FCM_CSCT \ 346 | OR_FCM_CSCT \
347 | OR_FCM_CST \ 347 | OR_FCM_CST \
348 | OR_FCM_CHT \ 348 | OR_FCM_CHT \
349 | OR_FCM_SCY_1 \ 349 | OR_FCM_SCY_1 \
350 | OR_FCM_TRLX \ 350 | OR_FCM_TRLX \
351 | OR_FCM_EHTR) 351 | OR_FCM_EHTR)
352 352
353 #ifdef CONFIG_RAMBOOT_NAND 353 #ifdef CONFIG_RAMBOOT_NAND
354 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ 354 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
355 #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ 355 #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
356 #define CONFIG_SYS_BR2_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ 356 #define CONFIG_SYS_BR2_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
357 #define CONFIG_SYS_OR2_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ 357 #define CONFIG_SYS_OR2_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */
358 #else 358 #else
359 #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ 359 #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
360 #define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ 360 #define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */
361 #define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ 361 #define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
362 #define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ 362 #define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
363 #endif 363 #endif
364 #define CONFIG_SYS_BR4_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0x40000) \ 364 #define CONFIG_SYS_BR4_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0x40000) \
365 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ 365 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
366 | BR_PS_8 /* Port Size = 8 bit */ \ 366 | BR_PS_8 /* Port Size = 8 bit */ \
367 | BR_MS_FCM /* MSEL = FCM */ \ 367 | BR_MS_FCM /* MSEL = FCM */ \
368 | BR_V) /* valid */ 368 | BR_V) /* valid */
369 #define CONFIG_SYS_OR4_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ 369 #define CONFIG_SYS_OR4_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
370 #define CONFIG_SYS_BR5_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0x80000)\ 370 #define CONFIG_SYS_BR5_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0x80000)\
371 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ 371 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
372 | BR_PS_8 /* Port Size = 8 bit */ \ 372 | BR_PS_8 /* Port Size = 8 bit */ \
373 | BR_MS_FCM /* MSEL = FCM */ \ 373 | BR_MS_FCM /* MSEL = FCM */ \
374 | BR_V) /* valid */ 374 | BR_V) /* valid */
375 #define CONFIG_SYS_OR5_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ 375 #define CONFIG_SYS_OR5_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
376 376
377 #define CONFIG_SYS_BR6_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0xc0000)\ 377 #define CONFIG_SYS_BR6_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0xc0000)\
378 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ 378 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
379 | BR_PS_8 /* Port Size = 8 bit */ \ 379 | BR_PS_8 /* Port Size = 8 bit */ \
380 | BR_MS_FCM /* MSEL = FCM */ \ 380 | BR_MS_FCM /* MSEL = FCM */ \
381 | BR_V) /* valid */ 381 | BR_V) /* valid */
382 #define CONFIG_SYS_OR6_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ 382 #define CONFIG_SYS_OR6_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
383 383
384 384
385 /* Serial Port - controlled on board with jumper J8 385 /* Serial Port - controlled on board with jumper J8
386 * open - index 2 386 * open - index 2
387 * shorted - index 1 387 * shorted - index 1
388 */ 388 */
389 #define CONFIG_CONS_INDEX 1 389 #define CONFIG_CONS_INDEX 1
390 #define CONFIG_SYS_NS16550 390 #define CONFIG_SYS_NS16550
391 #define CONFIG_SYS_NS16550_SERIAL 391 #define CONFIG_SYS_NS16550_SERIAL
392 #define CONFIG_SYS_NS16550_REG_SIZE 1 392 #define CONFIG_SYS_NS16550_REG_SIZE 1
393 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) 393 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
394 #ifdef CONFIG_NAND_SPL 394 #ifdef CONFIG_NAND_SPL
395 #define CONFIG_NS16550_MIN_FUNCTIONS 395 #define CONFIG_NS16550_MIN_FUNCTIONS
396 #endif 396 #endif
397 397
398 #define CONFIG_SYS_BAUDRATE_TABLE \ 398 #define CONFIG_SYS_BAUDRATE_TABLE \
399 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} 399 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
400 400
401 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) 401 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
402 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) 402 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
403 403
404 /* Use the HUSH parser */ 404 /* Use the HUSH parser */
405 #define CONFIG_SYS_HUSH_PARSER 405 #define CONFIG_SYS_HUSH_PARSER
406 406
407 /* 407 /*
408 * Pass open firmware flat tree 408 * Pass open firmware flat tree
409 */ 409 */
410 #define CONFIG_OF_LIBFDT 1 410 #define CONFIG_OF_LIBFDT 1
411 #define CONFIG_OF_BOARD_SETUP 1 411 #define CONFIG_OF_BOARD_SETUP 1
412 #define CONFIG_OF_STDOUT_VIA_ALIAS 1 412 #define CONFIG_OF_STDOUT_VIA_ALIAS 1
413 413
414 /* new uImage format support */ 414 /* new uImage format support */
415 #define CONFIG_FIT 1 415 #define CONFIG_FIT 1
416 #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ 416 #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
417 417
418 /* I2C */ 418 /* I2C */
419 #define CONFIG_SYS_I2C 419 #define CONFIG_SYS_I2C
420 #define CONFIG_SYS_I2C_FSL 420 #define CONFIG_SYS_I2C_FSL
421 #define CONFIG_SYS_FSL_I2C_SPEED 400000 421 #define CONFIG_SYS_FSL_I2C_SPEED 400000
422 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F 422 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
423 #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 423 #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
424 #define CONFIG_SYS_FSL_I2C2_SPEED 400000 424 #define CONFIG_SYS_FSL_I2C2_SPEED 400000
425 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F 425 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
426 #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 426 #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
427 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} } 427 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} }
428 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 428 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
429 429
430 /* 430 /*
431 * I2C2 EEPROM 431 * I2C2 EEPROM
432 */ 432 */
433 #define CONFIG_ID_EEPROM 433 #define CONFIG_ID_EEPROM
434 #ifdef CONFIG_ID_EEPROM 434 #ifdef CONFIG_ID_EEPROM
435 #define CONFIG_SYS_I2C_EEPROM_NXID 435 #define CONFIG_SYS_I2C_EEPROM_NXID
436 #endif 436 #endif
437 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 437 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
438 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 438 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
439 #define CONFIG_SYS_EEPROM_BUS_NUM 1 439 #define CONFIG_SYS_EEPROM_BUS_NUM 1
440 440
441 /* 441 /*
442 * General PCI 442 * General PCI
443 * Memory space is mapped 1-1, but I/O space must start from 0. 443 * Memory space is mapped 1-1, but I/O space must start from 0.
444 */ 444 */
445 445
446 /* controller 3, direct to uli, tgtid 3, Base address 8000 */ 446 /* controller 3, direct to uli, tgtid 3, Base address 8000 */
447 #define CONFIG_SYS_PCIE3_NAME "ULI" 447 #define CONFIG_SYS_PCIE3_NAME "ULI"
448 #define CONFIG_SYS_PCIE3_MEM_VIRT 0x80000000 448 #define CONFIG_SYS_PCIE3_MEM_VIRT 0x80000000
449 #ifdef CONFIG_PHYS_64BIT 449 #ifdef CONFIG_PHYS_64BIT
450 #define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 450 #define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000
451 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc00000000ull 451 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc00000000ull
452 #else 452 #else
453 #define CONFIG_SYS_PCIE3_MEM_BUS 0x80000000 453 #define CONFIG_SYS_PCIE3_MEM_BUS 0x80000000
454 #define CONFIG_SYS_PCIE3_MEM_PHYS 0x80000000 454 #define CONFIG_SYS_PCIE3_MEM_PHYS 0x80000000
455 #endif 455 #endif
456 #define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */ 456 #define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */
457 #define CONFIG_SYS_PCIE3_IO_VIRT 0xffc00000 457 #define CONFIG_SYS_PCIE3_IO_VIRT 0xffc00000
458 #define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 458 #define CONFIG_SYS_PCIE3_IO_BUS 0x00000000
459 #ifdef CONFIG_PHYS_64BIT 459 #ifdef CONFIG_PHYS_64BIT
460 #define CONFIG_SYS_PCIE3_IO_PHYS 0xfffc00000ull 460 #define CONFIG_SYS_PCIE3_IO_PHYS 0xfffc00000ull
461 #else 461 #else
462 #define CONFIG_SYS_PCIE3_IO_PHYS 0xffc00000 462 #define CONFIG_SYS_PCIE3_IO_PHYS 0xffc00000
463 #endif 463 #endif
464 #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ 464 #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */
465 465
466 /* controller 2, Slot 2, tgtid 2, Base address 9000 */ 466 /* controller 2, Slot 2, tgtid 2, Base address 9000 */
467 #define CONFIG_SYS_PCIE2_NAME "Slot 1" 467 #define CONFIG_SYS_PCIE2_NAME "Slot 1"
468 #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 468 #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000
469 #ifdef CONFIG_PHYS_64BIT 469 #ifdef CONFIG_PHYS_64BIT
470 #define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 470 #define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000
471 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull 471 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull
472 #else 472 #else
473 #define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 473 #define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000
474 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 474 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000
475 #endif 475 #endif
476 #define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ 476 #define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */
477 #define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000 477 #define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000
478 #define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 478 #define CONFIG_SYS_PCIE2_IO_BUS 0x00000000
479 #ifdef CONFIG_PHYS_64BIT 479 #ifdef CONFIG_PHYS_64BIT
480 #define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc10000ull 480 #define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc10000ull
481 #else 481 #else
482 #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 482 #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000
483 #endif 483 #endif
484 #define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ 484 #define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */
485 485
486 /* controller 1, Slot 1, tgtid 1, Base address a000 */ 486 /* controller 1, Slot 1, tgtid 1, Base address a000 */
487 #define CONFIG_SYS_PCIE1_NAME "Slot 2" 487 #define CONFIG_SYS_PCIE1_NAME "Slot 2"
488 #define CONFIG_SYS_PCIE1_MEM_VIRT 0xc0000000 488 #define CONFIG_SYS_PCIE1_MEM_VIRT 0xc0000000
489 #ifdef CONFIG_PHYS_64BIT 489 #ifdef CONFIG_PHYS_64BIT
490 #define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 490 #define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000
491 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc40000000ull 491 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc40000000ull
492 #else 492 #else
493 #define CONFIG_SYS_PCIE1_MEM_BUS 0xc0000000 493 #define CONFIG_SYS_PCIE1_MEM_BUS 0xc0000000
494 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc0000000 494 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc0000000
495 #endif 495 #endif
496 #define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ 496 #define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */
497 #define CONFIG_SYS_PCIE1_IO_VIRT 0xffc20000 497 #define CONFIG_SYS_PCIE1_IO_VIRT 0xffc20000
498 #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 498 #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
499 #ifdef CONFIG_PHYS_64BIT 499 #ifdef CONFIG_PHYS_64BIT
500 #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc20000ull 500 #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc20000ull
501 #else 501 #else
502 #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc20000 502 #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc20000
503 #endif 503 #endif
504 #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ 504 #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
505 505
506 #if defined(CONFIG_PCI) 506 #if defined(CONFIG_PCI)
507 507
508 /*PCIE video card used*/ 508 /*PCIE video card used*/
509 #define VIDEO_IO_OFFSET CONFIG_SYS_PCIE1_IO_VIRT 509 #define VIDEO_IO_OFFSET CONFIG_SYS_PCIE1_IO_VIRT
510 510
511 /* video */ 511 /* video */
512 #define CONFIG_VIDEO 512 #define CONFIG_VIDEO
513 513
514 #if defined(CONFIG_VIDEO) 514 #if defined(CONFIG_VIDEO)
515 #define CONFIG_BIOSEMU 515 #define CONFIG_BIOSEMU
516 #define CONFIG_CFB_CONSOLE 516 #define CONFIG_CFB_CONSOLE
517 #define CONFIG_VIDEO_SW_CURSOR 517 #define CONFIG_VIDEO_SW_CURSOR
518 #define CONFIG_VGA_AS_SINGLE_DEVICE 518 #define CONFIG_VGA_AS_SINGLE_DEVICE
519 #define CONFIG_ATI_RADEON_FB 519 #define CONFIG_ATI_RADEON_FB
520 #define CONFIG_VIDEO_LOGO 520 #define CONFIG_VIDEO_LOGO
521 /*#define CONFIG_CONSOLE_CURSOR*/ 521 /*#define CONFIG_CONSOLE_CURSOR*/
522 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET 522 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET
523 #endif 523 #endif
524 524
525 #define CONFIG_PCI_PNP /* do pci plug-and-play */ 525 #define CONFIG_PCI_PNP /* do pci plug-and-play */
526 526
527 #undef CONFIG_EEPRO100 527 #undef CONFIG_EEPRO100
528 #undef CONFIG_TULIP 528 #undef CONFIG_TULIP
529 #undef CONFIG_RTL8139 529 #undef CONFIG_RTL8139
530 #define CONFIG_E1000 /* Define e1000 pci Ethernet card */ 530 #define CONFIG_E1000 /* Define e1000 pci Ethernet card */
531 531
532 #ifndef CONFIG_PCI_PNP 532 #ifndef CONFIG_PCI_PNP
533 #define PCI_ENET0_IOADDR CONFIG_SYS_PCIE3_IO_BUS 533 #define PCI_ENET0_IOADDR CONFIG_SYS_PCIE3_IO_BUS
534 #define PCI_ENET0_MEMADDR CONFIG_SYS_PCIE3_IO_BUS 534 #define PCI_ENET0_MEMADDR CONFIG_SYS_PCIE3_IO_BUS
535 #define PCI_IDSEL_NUMBER 0x11 /* IDSEL = AD11 */ 535 #define PCI_IDSEL_NUMBER 0x11 /* IDSEL = AD11 */
536 #endif 536 #endif
537 537
538 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ 538 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
539 #define CONFIG_DOS_PARTITION 539 #define CONFIG_DOS_PARTITION
540 #define CONFIG_SCSI_AHCI 540 #define CONFIG_SCSI_AHCI
541 541
542 #ifdef CONFIG_SCSI_AHCI 542 #ifdef CONFIG_SCSI_AHCI
543 #define CONFIG_LIBATA 543 #define CONFIG_LIBATA
544 #define CONFIG_SATA_ULI5288 544 #define CONFIG_SATA_ULI5288
545 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 4 545 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 4
546 #define CONFIG_SYS_SCSI_MAX_LUN 1 546 #define CONFIG_SYS_SCSI_MAX_LUN 1
547 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN) 547 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN)
548 #define CONFIG_SYS_SCSI_MAXDEVICE CONFIG_SYS_SCSI_MAX_DEVICE 548 #define CONFIG_SYS_SCSI_MAXDEVICE CONFIG_SYS_SCSI_MAX_DEVICE
549 #endif /* SCSI */ 549 #endif /* SCSI */
550 550
551 #endif /* CONFIG_PCI */ 551 #endif /* CONFIG_PCI */
552 552
553 553
554 #if defined(CONFIG_TSEC_ENET) 554 #if defined(CONFIG_TSEC_ENET)
555 555
556 #define CONFIG_MII 1 /* MII PHY management */ 556 #define CONFIG_MII 1 /* MII PHY management */
557 #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ 557 #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
558 #define CONFIG_TSEC1 1 558 #define CONFIG_TSEC1 1
559 #define CONFIG_TSEC1_NAME "eTSEC1" 559 #define CONFIG_TSEC1_NAME "eTSEC1"
560 #define CONFIG_TSEC2 1 560 #define CONFIG_TSEC2 1
561 #define CONFIG_TSEC2_NAME "eTSEC2" 561 #define CONFIG_TSEC2_NAME "eTSEC2"
562 #define CONFIG_TSEC3 1 562 #define CONFIG_TSEC3 1
563 #define CONFIG_TSEC3_NAME "eTSEC3" 563 #define CONFIG_TSEC3_NAME "eTSEC3"
564 #define CONFIG_TSEC4 1 564 #define CONFIG_TSEC4 1
565 #define CONFIG_TSEC4_NAME "eTSEC4" 565 #define CONFIG_TSEC4_NAME "eTSEC4"
566 566
567 #define CONFIG_PIXIS_SGMII_CMD 567 #define CONFIG_PIXIS_SGMII_CMD
568 #define CONFIG_FSL_SGMII_RISER 1 568 #define CONFIG_FSL_SGMII_RISER 1
569 #define SGMII_RISER_PHY_OFFSET 0x1c 569 #define SGMII_RISER_PHY_OFFSET 0x1c
570 570
571 #ifdef CONFIG_FSL_SGMII_RISER 571 #ifdef CONFIG_FSL_SGMII_RISER
572 #define CONFIG_SYS_TBIPA_VALUE 0x10 /* avoid conflict with eTSEC4 paddr */ 572 #define CONFIG_SYS_TBIPA_VALUE 0x10 /* avoid conflict with eTSEC4 paddr */
573 #endif 573 #endif
574 574
575 #define TSEC1_PHY_ADDR 0 575 #define TSEC1_PHY_ADDR 0
576 #define TSEC2_PHY_ADDR 1 576 #define TSEC2_PHY_ADDR 1
577 #define TSEC3_PHY_ADDR 2 577 #define TSEC3_PHY_ADDR 2
578 #define TSEC4_PHY_ADDR 3 578 #define TSEC4_PHY_ADDR 3
579 579
580 #define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) 580 #define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
581 #define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) 581 #define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
582 #define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) 582 #define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
583 #define TSEC4_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) 583 #define TSEC4_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
584 584
585 #define TSEC1_PHYIDX 0 585 #define TSEC1_PHYIDX 0
586 #define TSEC2_PHYIDX 0 586 #define TSEC2_PHYIDX 0
587 #define TSEC3_PHYIDX 0 587 #define TSEC3_PHYIDX 0
588 #define TSEC4_PHYIDX 0 588 #define TSEC4_PHYIDX 0
589 589
590 #define CONFIG_ETHPRIME "eTSEC1" 590 #define CONFIG_ETHPRIME "eTSEC1"
591 591
592 #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ 592 #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
593 #endif /* CONFIG_TSEC_ENET */ 593 #endif /* CONFIG_TSEC_ENET */
594 594
595 /* 595 /*
596 * Environment 596 * Environment
597 */ 597 */
598 598
599 #if defined(CONFIG_SYS_RAMBOOT) 599 #if defined(CONFIG_SYS_RAMBOOT)
600 #if defined(CONFIG_RAMBOOT_NAND) 600 #if defined(CONFIG_RAMBOOT_NAND)
601 #define CONFIG_ENV_IS_IN_NAND 1 601 #define CONFIG_ENV_IS_IN_NAND 1
602 #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE 602 #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
603 #define CONFIG_ENV_OFFSET ((512 * 1024)\ 603 #define CONFIG_ENV_OFFSET ((512 * 1024)\
604 + CONFIG_SYS_NAND_BLOCK_SIZE) 604 + CONFIG_SYS_NAND_BLOCK_SIZE)
605 #endif 605 #endif
606 606
607 #else 607 #else
608 #define CONFIG_ENV_IS_IN_FLASH 1 608 #define CONFIG_ENV_IS_IN_FLASH 1
609 #if CONFIG_SYS_MONITOR_BASE > 0xfff80000 609 #if CONFIG_SYS_MONITOR_BASE > 0xfff80000
610 #define CONFIG_ENV_ADDR 0xfff80000 610 #define CONFIG_ENV_ADDR 0xfff80000
611 #else 611 #else
612 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) 612 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
613 #endif 613 #endif
614 #define CONFIG_ENV_SIZE 0x2000 614 #define CONFIG_ENV_SIZE 0x2000
615 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ 615 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
616 #endif 616 #endif
617 617
618 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ 618 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
619 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ 619 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
620 620
621 /* 621 /*
622 * Command line configuration. 622 * Command line configuration.
623 */ 623 */
624 #include <config_cmd_default.h> 624 #include <config_cmd_default.h>
625 625
626 #define CONFIG_CMD_ERRATA 626 #define CONFIG_CMD_ERRATA
627 #define CONFIG_CMD_IRQ 627 #define CONFIG_CMD_IRQ
628 #define CONFIG_CMD_PING 628 #define CONFIG_CMD_PING
629 #define CONFIG_CMD_I2C 629 #define CONFIG_CMD_I2C
630 #define CONFIG_CMD_MII 630 #define CONFIG_CMD_MII
631 #define CONFIG_CMD_ELF 631 #define CONFIG_CMD_ELF
632 #define CONFIG_CMD_SETEXPR 632 #define CONFIG_CMD_SETEXPR
633 #define CONFIG_CMD_REGINFO 633 #define CONFIG_CMD_REGINFO
634 634
635 #if defined(CONFIG_PCI) 635 #if defined(CONFIG_PCI)
636 #define CONFIG_CMD_PCI 636 #define CONFIG_CMD_PCI
637 #define CONFIG_CMD_NET 637 #define CONFIG_CMD_NET
638 #define CONFIG_CMD_SCSI 638 #define CONFIG_CMD_SCSI
639 #define CONFIG_CMD_EXT2 639 #define CONFIG_CMD_EXT2
640 #endif 640 #endif
641 641
642 /* 642 /*
643 * USB 643 * USB
644 */ 644 */
645 #define CONFIG_USB_EHCI 645 #define CONFIG_USB_EHCI
646 646
647 #ifdef CONFIG_USB_EHCI 647 #ifdef CONFIG_USB_EHCI
648 #define CONFIG_CMD_USB 648 #define CONFIG_CMD_USB
649 #define CONFIG_USB_EHCI_PCI 649 #define CONFIG_USB_EHCI_PCI
650 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 650 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
651 #define CONFIG_USB_STORAGE 651 #define CONFIG_USB_STORAGE
652 #define CONFIG_PCI_EHCI_DEVICE 0 652 #define CONFIG_PCI_EHCI_DEVICE 0
653 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 653 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
654 #endif 654 #endif
655 655
656 #undef CONFIG_WATCHDOG /* watchdog disabled */ 656 #undef CONFIG_WATCHDOG /* watchdog disabled */
657 657
658 /* 658 /*
659 * Miscellaneous configurable options 659 * Miscellaneous configurable options
660 */ 660 */
661 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 661 #define CONFIG_SYS_LONGHELP /* undef to save memory */
662 #define CONFIG_CMDLINE_EDITING /* Command-line editing */ 662 #define CONFIG_CMDLINE_EDITING /* Command-line editing */
663 #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ 663 #define CONFIG_AUTO_COMPLETE /* add autocompletion support */
664 #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ 664 #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
665 #if defined(CONFIG_CMD_KGDB) 665 #if defined(CONFIG_CMD_KGDB)
666 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 666 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
667 #else 667 #else
668 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 668 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
669 #endif 669 #endif
670 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 670 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
671 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 671 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
672 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 672 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
673 673
674 /* 674 /*
675 * For booting Linux, the board info and command line data 675 * For booting Linux, the board info and command line data
676 * have to be in the first 64 MB of memory, since this is 676 * have to be in the first 64 MB of memory, since this is
677 * the maximum mapped by the Linux kernel during initialization. 677 * the maximum mapped by the Linux kernel during initialization.
678 */ 678 */
679 #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ 679 #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/
680 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ 680 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
681 681
682 #if defined(CONFIG_CMD_KGDB) 682 #if defined(CONFIG_CMD_KGDB)
683 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ 683 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
684 #endif 684 #endif
685 685
686 /* 686 /*
687 * Environment Configuration 687 * Environment Configuration
688 */ 688 */
689 689
690 /* The mac addresses for all ethernet interface */ 690 /* The mac addresses for all ethernet interface */
691 #if defined(CONFIG_TSEC_ENET) 691 #if defined(CONFIG_TSEC_ENET)
692 #define CONFIG_HAS_ETH0 692 #define CONFIG_HAS_ETH0
693 #define CONFIG_ETHADDR 00:E0:0C:02:00:FD 693 #define CONFIG_ETHADDR 00:E0:0C:02:00:FD
694 #define CONFIG_HAS_ETH1 694 #define CONFIG_HAS_ETH1
695 #define CONFIG_ETH1ADDR 00:E0:0C:02:01:FD 695 #define CONFIG_ETH1ADDR 00:E0:0C:02:01:FD
696 #define CONFIG_HAS_ETH2 696 #define CONFIG_HAS_ETH2
697 #define CONFIG_ETH2ADDR 00:E0:0C:02:02:FD 697 #define CONFIG_ETH2ADDR 00:E0:0C:02:02:FD
698 #define CONFIG_HAS_ETH3 698 #define CONFIG_HAS_ETH3
699 #define CONFIG_ETH3ADDR 00:E0:0C:02:03:FD 699 #define CONFIG_ETH3ADDR 00:E0:0C:02:03:FD
700 #endif 700 #endif
701 701
702 #define CONFIG_IPADDR 192.168.1.254 702 #define CONFIG_IPADDR 192.168.1.254
703 703
704 #define CONFIG_HOSTNAME unknown 704 #define CONFIG_HOSTNAME unknown
705 #define CONFIG_ROOTPATH "/opt/nfsroot" 705 #define CONFIG_ROOTPATH "/opt/nfsroot"
706 #define CONFIG_BOOTFILE "uImage" 706 #define CONFIG_BOOTFILE "uImage"
707 #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ 707 #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
708 708
709 #define CONFIG_SERVERIP 192.168.1.1 709 #define CONFIG_SERVERIP 192.168.1.1
710 #define CONFIG_GATEWAYIP 192.168.1.1 710 #define CONFIG_GATEWAYIP 192.168.1.1
711 #define CONFIG_NETMASK 255.255.255.0 711 #define CONFIG_NETMASK 255.255.255.0
712 712
713 /* default location for tftp and bootm */ 713 /* default location for tftp and bootm */
714 #define CONFIG_LOADADDR 1000000 714 #define CONFIG_LOADADDR 1000000
715 715
716 #define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ 716 #define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */
717 #undef CONFIG_BOOTARGS /* the boot command will set bootargs */ 717 #undef CONFIG_BOOTARGS /* the boot command will set bootargs */
718 718
719 #define CONFIG_BAUDRATE 115200 719 #define CONFIG_BAUDRATE 115200
720 720
721 #define CONFIG_EXTRA_ENV_SETTINGS \ 721 #define CONFIG_EXTRA_ENV_SETTINGS \
722 "hwconfig=fsl_ddr:ctlr_intlv=bank,bank_intlv=cs0_cs1,ecc=off\0" \ 722 "hwconfig=fsl_ddr:ctlr_intlv=bank,bank_intlv=cs0_cs1,ecc=off\0" \
723 "netdev=eth0\0" \ 723 "netdev=eth0\0" \
724 "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ 724 "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
725 "tftpflash=tftpboot $loadaddr $uboot; " \ 725 "tftpflash=tftpboot $loadaddr $uboot; " \
726 "protect off " __stringify(CONFIG_SYS_TEXT_BASE) \ 726 "protect off " __stringify(CONFIG_SYS_TEXT_BASE) \
727 " +$filesize; " \ 727 " +$filesize; " \
728 "erase " __stringify(CONFIG_SYS_TEXT_BASE) \ 728 "erase " __stringify(CONFIG_SYS_TEXT_BASE) \
729 " +$filesize; " \ 729 " +$filesize; " \
730 "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ 730 "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \
731 " $filesize; " \ 731 " $filesize; " \
732 "protect on " __stringify(CONFIG_SYS_TEXT_BASE) \ 732 "protect on " __stringify(CONFIG_SYS_TEXT_BASE) \
733 " +$filesize; " \ 733 " +$filesize; " \
734 "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ 734 "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \
735 " $filesize\0" \ 735 " $filesize\0" \
736 "consoledev=ttyS0\0" \ 736 "consoledev=ttyS0\0" \
737 "ramdiskaddr=2000000\0" \ 737 "ramdiskaddr=2000000\0" \
738 "ramdiskfile=8572ds/ramdisk.uboot\0" \ 738 "ramdiskfile=8572ds/ramdisk.uboot\0" \
739 "fdtaddr=c00000\0" \ 739 "fdtaddr=c00000\0" \
740 "fdtfile=8572ds/mpc8572ds.dtb\0" \ 740 "fdtfile=8572ds/mpc8572ds.dtb\0" \
741 "bdev=sda3\0" 741 "bdev=sda3\0"
742 742
743 #define CONFIG_HDBOOT \ 743 #define CONFIG_HDBOOT \
744 "setenv bootargs root=/dev/$bdev rw " \ 744 "setenv bootargs root=/dev/$bdev rw " \
745 "console=$consoledev,$baudrate $othbootargs;" \ 745 "console=$consoledev,$baudrate $othbootargs;" \
746 "tftp $loadaddr $bootfile;" \ 746 "tftp $loadaddr $bootfile;" \
747 "tftp $fdtaddr $fdtfile;" \ 747 "tftp $fdtaddr $fdtfile;" \
748 "bootm $loadaddr - $fdtaddr" 748 "bootm $loadaddr - $fdtaddr"
749 749
750 #define CONFIG_NFSBOOTCOMMAND \ 750 #define CONFIG_NFSBOOTCOMMAND \
751 "setenv bootargs root=/dev/nfs rw " \ 751 "setenv bootargs root=/dev/nfs rw " \
752 "nfsroot=$serverip:$rootpath " \ 752 "nfsroot=$serverip:$rootpath " \
753 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ 753 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
754 "console=$consoledev,$baudrate $othbootargs;" \ 754 "console=$consoledev,$baudrate $othbootargs;" \
755 "tftp $loadaddr $bootfile;" \ 755 "tftp $loadaddr $bootfile;" \
756 "tftp $fdtaddr $fdtfile;" \ 756 "tftp $fdtaddr $fdtfile;" \
757 "bootm $loadaddr - $fdtaddr" 757 "bootm $loadaddr - $fdtaddr"
758 758
759 #define CONFIG_RAMBOOTCOMMAND \ 759 #define CONFIG_RAMBOOTCOMMAND \
760 "setenv bootargs root=/dev/ram rw " \ 760 "setenv bootargs root=/dev/ram rw " \
761 "console=$consoledev,$baudrate $othbootargs;" \ 761 "console=$consoledev,$baudrate $othbootargs;" \
762 "tftp $ramdiskaddr $ramdiskfile;" \ 762 "tftp $ramdiskaddr $ramdiskfile;" \
763 "tftp $loadaddr $bootfile;" \ 763 "tftp $loadaddr $bootfile;" \
764 "tftp $fdtaddr $fdtfile;" \ 764 "tftp $fdtaddr $fdtfile;" \
765 "bootm $loadaddr $ramdiskaddr $fdtaddr" 765 "bootm $loadaddr $ramdiskaddr $fdtaddr"
766 766
767 #define CONFIG_BOOTCOMMAND CONFIG_HDBOOT 767 #define CONFIG_BOOTCOMMAND CONFIG_HDBOOT
768 768
769 #endif /* __CONFIG_H */ 769 #endif /* __CONFIG_H */
770 770
include/configs/P1023RDS.h
Diff comments   View file @ 4a37755
1 /* 1 /*
2 * Copyright 2010-2012 Freescale Semiconductor, Inc. 2 * Copyright 2010-2012 Freescale Semiconductor, Inc.
3 * 3 *
4 * Authors: Roy Zang <tie-fei.zang@freescale.com> 4 * Authors: Roy Zang <tie-fei.zang@freescale.com>
5 * Chunhe Lan <b25806@freescale.com> 5 * Chunhe Lan <b25806@freescale.com>
6 * 6 *
7 * SPDX-License-Identifier: GPL-2.0+ 7 * SPDX-License-Identifier: GPL-2.0+
8 */ 8 */
9 9
10 /* 10 /*
11 * p1023rds board configuration file 11 * p1023rds board configuration file
12 * 12 *
13 */ 13 */
14 #ifndef __CONFIG_H 14 #ifndef __CONFIG_H
15 #define __CONFIG_H 15 #define __CONFIG_H
16 16
17 #ifdef CONFIG_NAND 17 #ifdef CONFIG_NAND
18 #define CONFIG_NAND_U_BOOT 18 #define CONFIG_NAND_U_BOOT
19 #define CONFIG_RAMBOOT_NAND 19 #define CONFIG_RAMBOOT_NAND
20 #endif 20 #endif
21 21
22 #ifdef CONFIG_NAND_U_BOOT 22 #ifdef CONFIG_NAND_U_BOOT
23 #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 23 #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
24 #define CONFIG_SYS_TEXT_BASE 0x11001000 24 #define CONFIG_SYS_TEXT_BASE 0x11001000
25 25
26 #ifdef CONFIG_NAND_SPL 26 #ifdef CONFIG_NAND_SPL
27 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ 27 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
28 #else 28 #else
29 #define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds 29 #define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
30 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ 30 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
31 #endif /* CONFIG_NAND_SPL */ 31 #endif /* CONFIG_NAND_SPL */
32 #endif 32 #endif
33 33
34 #ifndef CONFIG_SYS_TEXT_BASE 34 #ifndef CONFIG_SYS_TEXT_BASE
35 #define CONFIG_SYS_TEXT_BASE 0xeff40000 35 #define CONFIG_SYS_TEXT_BASE 0xeff40000
36 #endif 36 #endif
37 37
38 #ifndef CONFIG_SYS_MONITOR_BASE 38 #ifndef CONFIG_SYS_MONITOR_BASE
39 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ 39 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
40 #endif 40 #endif
41 41
42 #ifndef CONFIG_RESET_VECTOR_ADDRESS 42 #ifndef CONFIG_RESET_VECTOR_ADDRESS
43 #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc 43 #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
44 #endif 44 #endif
45 45
46 /* High Level Configuration Options */ 46 /* High Level Configuration Options */
47 #define CONFIG_BOOKE /* BOOKE */ 47 #define CONFIG_BOOKE /* BOOKE */
48 #define CONFIG_E500 /* BOOKE e500 family */ 48 #define CONFIG_E500 /* BOOKE e500 family */
49 #define CONFIG_P1023 49 #define CONFIG_P1023
50 #define CONFIG_P1023RDS 50 #define CONFIG_P1023RDS
51 #define CONFIG_MP /* support multiple processors */ 51 #define CONFIG_MP /* support multiple processors */
52 52
53 #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ 53 #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */
54 #define CONFIG_PCI /* Enable PCI/PCIE */ 54 #define CONFIG_PCI /* Enable PCI/PCIE */
55 #define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ 55 #define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */
56 #define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */ 56 #define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */
57 #define CONFIG_PCIE3 /* PCIE controler 3 (slot 3) */ 57 #define CONFIG_PCIE3 /* PCIE controler 3 (slot 3) */
58 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ 58 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
59 #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ 59 #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
60 #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ 60 #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
61 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ 61 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
62 #define CONFIG_FSL_LAW /* Use common FSL init code */ 62 #define CONFIG_FSL_LAW /* Use common FSL init code */
63 63
64 #ifndef __ASSEMBLY__ 64 #ifndef __ASSEMBLY__
65 extern unsigned long get_clock_freq(void); 65 extern unsigned long get_clock_freq(void);
66 #endif 66 #endif
67 67
68 #define CONFIG_SYS_CLK_FREQ 66666666 68 #define CONFIG_SYS_CLK_FREQ 66666666
69 #define CONFIG_DDR_CLK_FREQ CONFIG_SYS_CLK_FREQ 69 #define CONFIG_DDR_CLK_FREQ CONFIG_SYS_CLK_FREQ
70 70
71 /* 71 /*
72 * These can be toggled for performance analysis, otherwise use default. 72 * These can be toggled for performance analysis, otherwise use default.
73 */ 73 */
74 #define CONFIG_L2_CACHE /* toggle L2 cache */ 74 #define CONFIG_L2_CACHE /* toggle L2 cache */
75 #define CONFIG_BTB /* toggle branch predition */ 75 #define CONFIG_BTB /* toggle branch predition */
76 #define CONFIG_HWCONFIG 76 #define CONFIG_HWCONFIG
77 77
78 #define CONFIG_ENABLE_36BIT_PHYS 78 #define CONFIG_ENABLE_36BIT_PHYS
79 79
80 #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */ 80 #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */
81 #define CONFIG_SYS_MEMTEST_END 0x1fffffff /* fix me, only 1G */ 81 #define CONFIG_SYS_MEMTEST_END 0x1fffffff /* fix me, only 1G */
82 #define CONFIG_PANIC_HANG /* do not reset board on panic */ 82 #define CONFIG_PANIC_HANG /* do not reset board on panic */
83 83
84 #define CONFIG_SYS_LBC_LBCR 0x00000000 /* Implement conversion of 84 #define CONFIG_SYS_LBC_LBCR 0x00000000 /* Implement conversion of
85 addresses in the LBC */ 85 addresses in the LBC */
86 86
87 /* DDR Setup */ 87 /* DDR Setup */
88 #define CONFIG_VERY_BIG_RAM 88 #define CONFIG_VERY_BIG_RAM
89 89
90 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER 90 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
91 #define CONFIG_MEM_INIT_VALUE 0xDeadBeef 91 #define CONFIG_MEM_INIT_VALUE 0xDeadBeef
92 92
93 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 93 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
94 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE 94 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
95 95
96 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 96 #define CONFIG_DIMM_SLOTS_PER_CTLR 1
97 #define CONFIG_CHIP_SELECTS_PER_CTRL 2 97 #define CONFIG_CHIP_SELECTS_PER_CTRL 2
98 98
99 /* These are used when DDR doesn't use SPD. */ 99 /* These are used when DDR doesn't use SPD. */
100 #define CONFIG_SYS_SDRAM_SIZE 2048u /* DDR is 2GB */ 100 #define CONFIG_SYS_SDRAM_SIZE 2048u /* DDR is 2GB */
101 101
102 /* Default settings for "stable" mode */ 102 /* Default settings for "stable" mode */
103 #define CONFIG_SYS_DDR_CS0_BNDS 0x0000003F 103 #define CONFIG_SYS_DDR_CS0_BNDS 0x0000003F
104 #define CONFIG_SYS_DDR_CS1_BNDS 0x0040007F 104 #define CONFIG_SYS_DDR_CS1_BNDS 0x0040007F
105 #define CONFIG_SYS_DDR_CS0_CONFIG 0x80014302 105 #define CONFIG_SYS_DDR_CS0_CONFIG 0x80014302
106 #define CONFIG_SYS_DDR_CS1_CONFIG 0x80014302 106 #define CONFIG_SYS_DDR_CS1_CONFIG 0x80014302
107 #define CONFIG_SYS_DDR_TIMING_3 0x00020000 107 #define CONFIG_SYS_DDR_TIMING_3 0x00020000
108 #define CONFIG_SYS_DDR_TIMING_0 0x40110104 108 #define CONFIG_SYS_DDR_TIMING_0 0x40110104
109 #define CONFIG_SYS_DDR_TIMING_1 0x5C59E544 109 #define CONFIG_SYS_DDR_TIMING_1 0x5C59E544
110 #define CONFIG_SYS_DDR_TIMING_2 0x0fA888CA 110 #define CONFIG_SYS_DDR_TIMING_2 0x0fA888CA
111 #define CONFIG_SYS_DDR_MODE_1 0x00441210 111 #define CONFIG_SYS_DDR_MODE_1 0x00441210
112 #define CONFIG_SYS_DDR_MODE_2 0x00000000 112 #define CONFIG_SYS_DDR_MODE_2 0x00000000
113 #define CONFIG_SYS_DDR_MODE_CTRL 0x00000000 113 #define CONFIG_SYS_DDR_MODE_CTRL 0x00000000
114 #define CONFIG_SYS_DDR_INTERVAL 0x0A280100 114 #define CONFIG_SYS_DDR_INTERVAL 0x0A280100
115 #define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef 115 #define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef
116 #define CONFIG_SYS_DDR_CLK_CTRL 0x01800000 116 #define CONFIG_SYS_DDR_CLK_CTRL 0x01800000
117 #define CONFIG_SYS_DDR_TIMING_4 0x00000001 117 #define CONFIG_SYS_DDR_TIMING_4 0x00000001
118 #define CONFIG_SYS_DDR_TIMING_5 0x01401400 118 #define CONFIG_SYS_DDR_TIMING_5 0x01401400
119 #define CONFIG_SYS_DDR_ZQ_CNTL 0x89080600 119 #define CONFIG_SYS_DDR_ZQ_CNTL 0x89080600
120 #define CONFIG_SYS_DDR_WRLVL_CNTL 0x8675F605 120 #define CONFIG_SYS_DDR_WRLVL_CNTL 0x8675F605
121 #define CONFIG_SYS_DDR_CONTROL 0xC70C0008 /* Type = DDR3: No Interleaving */ 121 #define CONFIG_SYS_DDR_CONTROL 0xC70C0008 /* Type = DDR3: No Interleaving */
122 #define CONFIG_SYS_DDR_CONTROL2 0x24401010 122 #define CONFIG_SYS_DDR_CONTROL2 0x24401010
123 #define CONFIG_SYS_DDR_CDR1 0x00000000 123 #define CONFIG_SYS_DDR_CDR1 0x00000000
124 #define CONFIG_SYS_DDR_CDR2 0x00000000 124 #define CONFIG_SYS_DDR_CDR2 0x00000000
125 125
126 #define CONFIG_SYS_DDR_ERR_INT_EN 0x00000000 126 #define CONFIG_SYS_DDR_ERR_INT_EN 0x00000000
127 #define CONFIG_SYS_DDR_ERR_DIS 0x00000000 127 #define CONFIG_SYS_DDR_ERR_DIS 0x00000000
128 #define CONFIG_SYS_DDR_SBE 0x00000000 128 #define CONFIG_SYS_DDR_SBE 0x00000000
129 129
130 /* Settings that differ for "performance" mode */ 130 /* Settings that differ for "performance" mode */
131 #define CONFIG_SYS_DDR_CS0_BNDS_PERF 0x0000007F /* Interleaving Enabled */ 131 #define CONFIG_SYS_DDR_CS0_BNDS_PERF 0x0000007F /* Interleaving Enabled */
132 #define CONFIG_SYS_DDR_CS1_BNDS_PERF 0x00000000 /* Interleaving Enabled */ 132 #define CONFIG_SYS_DDR_CS1_BNDS_PERF 0x00000000 /* Interleaving Enabled */
133 #define CONFIG_SYS_DDR_CS1_CONFIG_PERF 0x80014302 133 #define CONFIG_SYS_DDR_CS1_CONFIG_PERF 0x80014302
134 #define CONFIG_SYS_DDR_TIMING_1_PERF 0x5C58E544 134 #define CONFIG_SYS_DDR_TIMING_1_PERF 0x5C58E544
135 #define CONFIG_SYS_DDR_TIMING_2_PERF 0x0FA888CA 135 #define CONFIG_SYS_DDR_TIMING_2_PERF 0x0FA888CA
136 /* Type = DDR3: cs0-cs1 interleaving */ 136 /* Type = DDR3: cs0-cs1 interleaving */
137 #define CONFIG_SYS_DDR_CONTROL_PERF 0xC70C4008 137 #define CONFIG_SYS_DDR_CONTROL_PERF 0xC70C4008
138 #define CONFIG_SYS_DDR_CDR_1 0x00000000 138 #define CONFIG_SYS_DDR_CDR_1 0x00000000
139 #define CONFIG_SYS_DDR_CDR_2 0x00000000 139 #define CONFIG_SYS_DDR_CDR_2 0x00000000
140 140
141 141
142 /* 142 /*
143 * Memory map 143 * Memory map
144 * 144 *
145 * 0x0000_0000 0x7fff_ffff DDR 2G Cacheable 145 * 0x0000_0000 0x7fff_ffff DDR 2G Cacheable
146 * 0x8000_0000 0xbfff_ffff PCI Express Mem 1G non-cacheable 146 * 0x8000_0000 0xbfff_ffff PCI Express Mem 1G non-cacheable
147 * 0xc000_0000 0xdfff_ffff PCI 512M non-cacheable 147 * 0xc000_0000 0xdfff_ffff PCI 512M non-cacheable
148 * 0xe100_0000 0xe3ff_ffff PCI IO range 4M non-cacheable 148 * 0xe100_0000 0xe3ff_ffff PCI IO range 4M non-cacheable
149 * 149 *
150 * Localbus non-cacheable 150 * Localbus non-cacheable
151 * 0xe000_0000 0xe003_ffff BCSR 256K BCSR 151 * 0xe000_0000 0xe003_ffff BCSR 256K BCSR
152 * 0xee00_0000 0xefff_ffff NOR flash 32M NOR flash 152 * 0xee00_0000 0xefff_ffff NOR flash 32M NOR flash
153 * 0xff00_0000 0xff3f_ffff DPAA_QBMAN 4M 153 * 0xff00_0000 0xff3f_ffff DPAA_QBMAN 4M
154 * 0xff60_0000 0xff7f_ffff CCSR 2M non-cacheable 154 * 0xff60_0000 0xff7f_ffff CCSR 2M non-cacheable
155 * 0xffa0_0000 0xffaf_ffff NAND 1M non-cacheable 155 * 0xffa0_0000 0xffaf_ffff NAND 1M non-cacheable
156 * 0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0 156 * 0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0
157 */ 157 */
158 158
159 /* 159 /*
160 * Local Bus Definitions 160 * Local Bus Definitions
161 */ 161 */
162 #define CONFIG_SYS_BCSR_BASE 0xe0000000 /* start of on board FPGA */ 162 #define CONFIG_SYS_BCSR_BASE 0xe0000000 /* start of on board FPGA */
163 #define CONFIG_SYS_BCSR_BASE_PHYS CONFIG_SYS_BCSR_BASE 163 #define CONFIG_SYS_BCSR_BASE_PHYS CONFIG_SYS_BCSR_BASE
164 164
165 #ifndef CONFIG_NAND 165 #ifndef CONFIG_NAND
166 #define CONFIG_SYS_FLASH_BASE 0xee000000 /* start of FLASH 32M */ 166 #define CONFIG_SYS_FLASH_BASE 0xee000000 /* start of FLASH 32M */
167 167
168 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE 168 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
169 169
170 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \ 170 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
171 | BR_PS_16 | BR_V) 171 | BR_PS_16 | BR_V)
172 #define CONFIG_FLASH_OR_PRELIM 0xfe000ff7 172 #define CONFIG_FLASH_OR_PRELIM 0xfe000ff7
173 173
174 #define CONFIG_FLASH_CFI_DRIVER 174 #define CONFIG_FLASH_CFI_DRIVER
175 #define CONFIG_SYS_FLASH_CFI 175 #define CONFIG_SYS_FLASH_CFI
176 #define CONFIG_SYS_FLASH_EMPTY_INFO 176 #define CONFIG_SYS_FLASH_EMPTY_INFO
177 177
178 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ 178 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
179 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */ 179 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
180 #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ 180 #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
181 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ 181 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
182 #else 182 #else
183 #define CONFIG_SYS_NO_FLASH 183 #define CONFIG_SYS_NO_FLASH
184 #endif 184 #endif
185 185
186 #if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) 186 #if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND)
187 #define CONFIG_SYS_RAMBOOT 187 #define CONFIG_SYS_RAMBOOT
188 #endif 188 #endif
189 189
190 #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f function */ 190 #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f function */
191 #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ 191 #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */
192 192
193 #define CONFIG_SYS_INIT_RAM_LOCK 193 #define CONFIG_SYS_INIT_RAM_LOCK
194 #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ 194 #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */
195 #define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */ 195 #define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */
196 196
197 #define CONFIG_SYS_GBL_DATA_OFFSET \ 197 #define CONFIG_SYS_GBL_DATA_OFFSET \
198 (CONFIG_SYS_INIT_RAM_END - GENERATED_GBL_DATA_SIZE) 198 (CONFIG_SYS_INIT_RAM_END - GENERATED_GBL_DATA_SIZE)
199 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 199 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
200 200
201 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ 201 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
202 #define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* Reserved for malloc */ 202 #define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* Reserved for malloc */
203 203
204 #ifndef CONFIG_NAND_SPL 204 #ifndef CONFIG_NAND_SPL
205 #define CONFIG_SYS_NAND_BASE 0xffa00000 205 #define CONFIG_SYS_NAND_BASE 0xffa00000
206 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE 206 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
207 #else 207 #else
208 #define CONFIG_SYS_NAND_BASE 0xfff00000 208 #define CONFIG_SYS_NAND_BASE 0xfff00000
209 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE 209 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
210 #endif 210 #endif
211 211
212 #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} 212 #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
213 #define CONFIG_SYS_MAX_NAND_DEVICE 1 213 #define CONFIG_SYS_MAX_NAND_DEVICE 1
214 #define CONFIG_MTD_NAND_VERIFY_WRITE 214 #define CONFIG_MTD_NAND_VERIFY_WRITE
215 #define CONFIG_CMD_NAND 215 #define CONFIG_CMD_NAND
216 #define CONFIG_NAND_FSL_ELBC 216 #define CONFIG_NAND_FSL_ELBC
217 #define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024) 217 #define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024)
218 218
219 /* NAND boot: 4K NAND loader config */ 219 /* NAND boot: 4K NAND loader config */
220 #define CONFIG_SYS_NAND_SPL_SIZE 0x1000 220 #define CONFIG_SYS_NAND_SPL_SIZE 0x1000
221 #define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) + CONFIG_SYS_NAND_SPL_SIZE) 221 #define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) + CONFIG_SYS_NAND_SPL_SIZE)
222 #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000 - CONFIG_SYS_NAND_SPL_SIZE) 222 #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000 - CONFIG_SYS_NAND_SPL_SIZE)
223 #define CONFIG_SYS_NAND_U_BOOT_START 0x11000000 223 #define CONFIG_SYS_NAND_U_BOOT_START 0x11000000
224 #define CONFIG_SYS_NAND_U_BOOT_OFFS (0) 224 #define CONFIG_SYS_NAND_U_BOOT_OFFS (0)
225 #define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000 225 #define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000
226 #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000) 226 #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000)
227 227
228 /* NAND flash config */ 228 /* NAND flash config */
229 #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ 229 #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
230 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ 230 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
231 | BR_PS_8 /* Port Size = 8bit */ \ 231 | BR_PS_8 /* Port Size = 8bit */ \
232 | BR_MS_FCM /* MSEL = FCM */ \ 232 | BR_MS_FCM /* MSEL = FCM */ \
233 | BR_V) /* valid */ 233 | BR_V) /* valid */
234 #define CONFIG_SYS_NAND_OR_PRELIM (0xFFF80000 /* length 32K */ \ 234 #define CONFIG_SYS_NAND_OR_PRELIM (0xFFF80000 /* length 32K */ \
235 | OR_FCM_CSCT \ 235 | OR_FCM_CSCT \
236 | OR_FCM_CST \ 236 | OR_FCM_CST \
237 | OR_FCM_CHT \ 237 | OR_FCM_CHT \
238 | OR_FCM_SCY_1 \ 238 | OR_FCM_SCY_1 \
239 | OR_FCM_TRLX \ 239 | OR_FCM_TRLX \
240 | OR_FCM_EHTR) 240 | OR_FCM_EHTR)
241 241
242 #ifdef CONFIG_RAMBOOT_NAND 242 #ifdef CONFIG_RAMBOOT_NAND
243 /* NAND Base Address */ 243 /* NAND Base Address */
244 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM 244 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM
245 #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ 245 #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
246 /* chip select 1 - BCSR */ 246 /* chip select 1 - BCSR */
247 #define CONFIG_SYS_BR1_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_BCSR_BASE_PHYS) \ 247 #define CONFIG_SYS_BR1_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_BCSR_BASE_PHYS) \
248 | BR_MS_GPCM | BR_PS_8 | BR_V) 248 | BR_MS_GPCM | BR_PS_8 | BR_V)
249 #define CONFIG_SYS_OR1_PRELIM (OR_AM_32KB | OR_GPCM_CSNT | OR_GPCM_XACS \ 249 #define CONFIG_SYS_OR1_PRELIM (OR_AM_32KB | OR_GPCM_CSNT | OR_GPCM_XACS \
250 | OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR \ 250 | OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR \
251 | OR_GPCM_EAD) 251 | OR_GPCM_EAD)
252 #else 252 #else
253 #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ 253 #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
254 #define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ 254 #define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */
255 /* chip select 1 - BCSR */ 255 /* chip select 1 - BCSR */
256 #define CONFIG_SYS_BR1_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_BCSR_BASE_PHYS) \ 256 #define CONFIG_SYS_BR1_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_BCSR_BASE_PHYS) \
257 | BR_MS_GPCM | BR_PS_8 | BR_V) 257 | BR_MS_GPCM | BR_PS_8 | BR_V)
258 #define CONFIG_SYS_OR1_PRELIM (OR_AM_32KB | OR_GPCM_CSNT | OR_GPCM_XACS \ 258 #define CONFIG_SYS_OR1_PRELIM (OR_AM_32KB | OR_GPCM_CSNT | OR_GPCM_XACS \
259 | OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR \ 259 | OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR \
260 | OR_GPCM_EAD) 260 | OR_GPCM_EAD)
261 #endif 261 #endif
262 262
263 /* Serial Port 263 /* Serial Port
264 * open - index 2 264 * open - index 2
265 * shorted - index 1 265 * shorted - index 1
266 */ 266 */
267 #define CONFIG_CONS_INDEX 1 267 #define CONFIG_CONS_INDEX 1
268 #undef CONFIG_SERIAL_SOFTWARE_FIFO 268 #undef CONFIG_SERIAL_SOFTWARE_FIFO
269 #define CONFIG_SYS_NS16550 269 #define CONFIG_SYS_NS16550
270 #define CONFIG_SYS_NS16550_SERIAL 270 #define CONFIG_SYS_NS16550_SERIAL
271 #define CONFIG_SYS_NS16550_REG_SIZE 1 271 #define CONFIG_SYS_NS16550_REG_SIZE 1
272 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) 272 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
273 #ifdef CONFIG_NAND_SPL 273 #ifdef CONFIG_NAND_SPL
274 #define CONFIG_NS16550_MIN_FUNCTIONS 274 #define CONFIG_NS16550_MIN_FUNCTIONS
275 #endif 275 #endif
276 276
277 #define CONFIG_SYS_BAUDRATE_TABLE \ 277 #define CONFIG_SYS_BAUDRATE_TABLE \
278 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} 278 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
279 279
280 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500) 280 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
281 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600) 281 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
282 282
283 /* Use the HUSH parser */ 283 /* Use the HUSH parser */
284 #define CONFIG_SYS_HUSH_PARSER 284 #define CONFIG_SYS_HUSH_PARSER
285 285
286 /* 286 /*
287 * Pass open firmware flat tree 287 * Pass open firmware flat tree
288 */ 288 */
289 #define CONFIG_OF_LIBFDT 289 #define CONFIG_OF_LIBFDT
290 #define CONFIG_OF_BOARD_SETUP 290 #define CONFIG_OF_BOARD_SETUP
291 #define CONFIG_OF_STDOUT_VIA_ALIAS 291 #define CONFIG_OF_STDOUT_VIA_ALIAS
292 292
293 /* new uImage format support */ 293 /* new uImage format support */
294 #define CONFIG_FIT 294 #define CONFIG_FIT
295 #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ 295 #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
296 296
297 /* I2C */ 297 /* I2C */
298 #define CONFIG_SYS_I2C 298 #define CONFIG_SYS_I2C
299 #define CONFIG_SYS_I2C_FSL 299 #define CONFIG_SYS_I2C_FSL
300 #define CONFIG_SYS_FSL_I2C_SPEED 400000 300 #define CONFIG_SYS_FSL_I2C_SPEED 400000
301 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F 301 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
302 #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 302 #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
303 #define CONFIG_SYS_FSL_I2C2_SPEED 400000 303 #define CONFIG_SYS_FSL_I2C2_SPEED 400000
304 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F 304 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
305 #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 305 #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
306 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x51 306 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x51
307 307
308 /* 308 /*
309 * I2C2 EEPROM 309 * I2C2 EEPROM
310 */ 310 */
311 #define CONFIG_ID_EEPROM 311 #define CONFIG_ID_EEPROM
312 #ifdef CONFIG_ID_EEPROM 312 #ifdef CONFIG_ID_EEPROM
313 #define CONFIG_SYS_I2C_EEPROM_NXID 313 #define CONFIG_SYS_I2C_EEPROM_NXID
314 #endif 314 #endif
315 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x51 315 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x51
316 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 316 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
317 #define CONFIG_SYS_EEPROM_BUS_NUM 0 317 #define CONFIG_SYS_EEPROM_BUS_NUM 0
318 318
319 #define CONFIG_CMD_I2C 319 #define CONFIG_CMD_I2C
320 320
321 /* 321 /*
322 * eSPI - Enhanced SPI 322 * eSPI - Enhanced SPI
323 */ 323 */
324 #define CONFIG_SPI_FLASH 324 #define CONFIG_SPI_FLASH
325 #define CONFIG_SPI_FLASH_ATMEL 325 #define CONFIG_SPI_FLASH_ATMEL
326 326
327 #define CONFIG_HARD_SPI 327 #define CONFIG_HARD_SPI
328 #define CONFIG_FSL_ESPI 328 #define CONFIG_FSL_ESPI
329 329
330 #define CONFIG_CMD_SF 330 #define CONFIG_CMD_SF
331 #define CONFIG_SF_DEFAULT_SPEED 10000000 331 #define CONFIG_SF_DEFAULT_SPEED 10000000
332 #define CONFIG_SF_DEFAULT_MODE 0 332 #define CONFIG_SF_DEFAULT_MODE 0
333 333
334 /* 334 /*
335 * General PCI 335 * General PCI
336 * Memory space is mapped 1-1, but I/O space must start from 0. 336 * Memory space is mapped 1-1, but I/O space must start from 0.
337 */ 337 */
338 338
339 /* controller 3, Slot 1, tgtid 3, Base address b000 */ 339 /* controller 3, Slot 1, tgtid 3, Base address b000 */
340 #define CONFIG_SYS_PCIE3_NAME "Slot 3" 340 #define CONFIG_SYS_PCIE3_NAME "Slot 3"
341 #define CONFIG_SYS_PCIE3_MEM_VIRT 0x80000000 341 #define CONFIG_SYS_PCIE3_MEM_VIRT 0x80000000
342 #define CONFIG_SYS_PCIE3_MEM_BUS 0x80000000 342 #define CONFIG_SYS_PCIE3_MEM_BUS 0x80000000
343 #define CONFIG_SYS_PCIE3_MEM_PHYS 0x80000000 343 #define CONFIG_SYS_PCIE3_MEM_PHYS 0x80000000
344 #define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */ 344 #define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */
345 #define CONFIG_SYS_PCIE3_IO_VIRT 0xffc00000 345 #define CONFIG_SYS_PCIE3_IO_VIRT 0xffc00000
346 #define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 346 #define CONFIG_SYS_PCIE3_IO_BUS 0x00000000
347 #define CONFIG_SYS_PCIE3_IO_PHYS 0xffc00000 347 #define CONFIG_SYS_PCIE3_IO_PHYS 0xffc00000
348 #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ 348 #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */
349 349
350 /* controller 2, direct to uli, tgtid 2, Base address 9000 */ 350 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
351 #define CONFIG_SYS_PCIE2_NAME "Slot 2" 351 #define CONFIG_SYS_PCIE2_NAME "Slot 2"
352 #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 352 #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000
353 #define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 353 #define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000
354 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 354 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000
355 #define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ 355 #define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */
356 #define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000 356 #define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000
357 #define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 357 #define CONFIG_SYS_PCIE2_IO_BUS 0x00000000
358 #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 358 #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000
359 #define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ 359 #define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */
360 360
361 /* controller 1, Slot 2, tgtid 1, Base address a000 */ 361 /* controller 1, Slot 2, tgtid 1, Base address a000 */
362 #define CONFIG_SYS_PCIE1_NAME "Slot 1" 362 #define CONFIG_SYS_PCIE1_NAME "Slot 1"
363 #define CONFIG_SYS_PCIE1_MEM_VIRT 0xc0000000 363 #define CONFIG_SYS_PCIE1_MEM_VIRT 0xc0000000
364 #define CONFIG_SYS_PCIE1_MEM_BUS 0xc0000000 364 #define CONFIG_SYS_PCIE1_MEM_BUS 0xc0000000
365 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc0000000 365 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc0000000
366 #define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ 366 #define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */
367 #define CONFIG_SYS_PCIE1_IO_VIRT 0xffc20000 367 #define CONFIG_SYS_PCIE1_IO_VIRT 0xffc20000
368 #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 368 #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
369 #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc20000 369 #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc20000
370 #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ 370 #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
371 371
372 #if defined(CONFIG_PCI) 372 #if defined(CONFIG_PCI)
373 #define CONFIG_E1000 /* Defind e1000 pci Ethernet card */ 373 #define CONFIG_E1000 /* Defind e1000 pci Ethernet card */
374 #define CONFIG_PCI_PNP /* do pci plug-and-play */ 374 #define CONFIG_PCI_PNP /* do pci plug-and-play */
375 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ 375 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
376 #endif /* CONFIG_PCI */ 376 #endif /* CONFIG_PCI */
377 377
378 /* 378 /*
379 * Environment 379 * Environment
380 */ 380 */
381 #define CONFIG_ENV_OVERWRITE 381 #define CONFIG_ENV_OVERWRITE
382 382
383 #if defined(CONFIG_SYS_RAMBOOT) 383 #if defined(CONFIG_SYS_RAMBOOT)
384 #if defined(CONFIG_RAMBOOT_NAND) 384 #if defined(CONFIG_RAMBOOT_NAND)
385 #define CONFIG_ENV_IS_IN_NAND 385 #define CONFIG_ENV_IS_IN_NAND
386 #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE 386 #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
387 #define CONFIG_ENV_OFFSET ((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) 387 #define CONFIG_ENV_OFFSET ((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
388 #else 388 #else
389 #define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */ 389 #define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */
390 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x4000) 390 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x4000)
391 #define CONFIG_ENV_SIZE 0x2000 391 #define CONFIG_ENV_SIZE 0x2000
392 #endif 392 #endif
393 #else 393 #else
394 #define CONFIG_ENV_IS_IN_FLASH 394 #define CONFIG_ENV_IS_IN_FLASH
395 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) 395 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
396 #define CONFIG_ENV_SIZE 0x2000 396 #define CONFIG_ENV_SIZE 0x2000
397 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ 397 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
398 #endif 398 #endif
399 399
400 #define CONFIG_LOADS_ECHO /* echo on for serial download */ 400 #define CONFIG_LOADS_ECHO /* echo on for serial download */
401 #define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ 401 #define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
402 402
403 /* 403 /*
404 * Command line configuration. 404 * Command line configuration.
405 */ 405 */
406 #include <config_cmd_default.h> 406 #include <config_cmd_default.h>
407 407
408 #define CONFIG_CMD_IRQ 408 #define CONFIG_CMD_IRQ
409 #define CONFIG_CMD_PING 409 #define CONFIG_CMD_PING
410 #define CONFIG_CMD_MII 410 #define CONFIG_CMD_MII
411 #define CONFIG_CMD_ELF 411 #define CONFIG_CMD_ELF
412 #define CONFIG_CMD_SETEXPR 412 #define CONFIG_CMD_SETEXPR
413 #define CONFIG_CMD_REGINFO 413 #define CONFIG_CMD_REGINFO
414 414
415 #if defined(CONFIG_PCI) 415 #if defined(CONFIG_PCI)
416 #define CONFIG_CMD_PCI 416 #define CONFIG_CMD_PCI
417 #define CONFIG_CMD_NET 417 #define CONFIG_CMD_NET
418 #endif 418 #endif
419 419
420 /* 420 /*
421 * USB 421 * USB
422 */ 422 */
423 #define CONFIG_HAS_FSL_DR_USB 423 #define CONFIG_HAS_FSL_DR_USB
424 #ifdef CONFIG_HAS_FSL_DR_USB 424 #ifdef CONFIG_HAS_FSL_DR_USB
425 #define CONFIG_USB_EHCI 425 #define CONFIG_USB_EHCI
426 426
427 #ifdef CONFIG_USB_EHCI 427 #ifdef CONFIG_USB_EHCI
428 #define CONFIG_CMD_USB 428 #define CONFIG_CMD_USB
429 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 429 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
430 #define CONFIG_USB_EHCI_FSL 430 #define CONFIG_USB_EHCI_FSL
431 #define CONFIG_USB_STORAGE 431 #define CONFIG_USB_STORAGE
432 #define CONFIG_CMD_FAT 432 #define CONFIG_CMD_FAT
433 #define CONFIG_CMD_EXT2 433 #define CONFIG_CMD_EXT2
434 #define CONFIG_CMD_FAT 434 #define CONFIG_CMD_FAT
435 #define CONFIG_DOS_PARTITION 435 #define CONFIG_DOS_PARTITION
436 #endif 436 #endif
437 #endif 437 #endif
438 438
439 /* 439 /*
440 * Miscellaneous configurable options 440 * Miscellaneous configurable options
441 */ 441 */
442 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 442 #define CONFIG_SYS_LONGHELP /* undef to save memory */
443 #define CONFIG_CMDLINE_EDITING /* Command-line editing */ 443 #define CONFIG_CMDLINE_EDITING /* Command-line editing */
444 #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ 444 #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
445 #if defined(CONFIG_CMD_KGDB) 445 #if defined(CONFIG_CMD_KGDB)
446 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 446 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
447 #else 447 #else
448 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 448 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
449 #endif 449 #endif
450 /* Print Buffer Size */ 450 /* Print Buffer Size */
451 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT)+16) 451 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT)+16)
452 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 452 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
453 /* Boot Argument Buffer Size */ 453 /* Boot Argument Buffer Size */
454 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 454 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
455 455
456 /* 456 /*
457 * For booting Linux, the board info and command line data 457 * For booting Linux, the board info and command line data
458 * have to be in the first 16 MB of memory, since this is 458 * have to be in the first 16 MB of memory, since this is
459 * the maximum mapped by the Linux kernel during initialization. 459 * the maximum mapped by the Linux kernel during initialization.
460 */ 460 */
461 #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ 461 #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/
462 #define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ 462 #define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */
463 463
464 #if defined(CONFIG_CMD_KGDB) 464 #if defined(CONFIG_CMD_KGDB)
465 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ 465 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
466 #endif 466 #endif
467 467
468 /* 468 /*
469 * Environment Configuration 469 * Environment Configuration
470 */ 470 */
471 #define CONFIG_BOOTFILE "uImage" 471 #define CONFIG_BOOTFILE "uImage"
472 #define CONFIG_UBOOTPATH (u-boot.bin) /* U-Boot image on TFTP server */ 472 #define CONFIG_UBOOTPATH (u-boot.bin) /* U-Boot image on TFTP server */
473 473
474 /* default location for tftp and bootm */ 474 /* default location for tftp and bootm */
475 #define CONFIG_LOADADDR 1000000 475 #define CONFIG_LOADADDR 1000000
476 476
477 #define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ 477 #define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */
478 478
479 #define CONFIG_BAUDRATE 115200 479 #define CONFIG_BAUDRATE 115200
480 480
481 /* Qman/Bman */ 481 /* Qman/Bman */
482 #define CONFIG_SYS_DPAA_QBMAN /* support Q/Bman */ 482 #define CONFIG_SYS_DPAA_QBMAN /* support Q/Bman */
483 #define CONFIG_SYS_QMAN_MEM_BASE 0xff000000 483 #define CONFIG_SYS_QMAN_MEM_BASE 0xff000000
484 #define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE 484 #define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE
485 #define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000 485 #define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000
486 #define CONFIG_SYS_BMAN_MEM_BASE 0xff200000 486 #define CONFIG_SYS_BMAN_MEM_BASE 0xff200000
487 #define CONFIG_SYS_BMAN_MEM_PHYS CONFIG_SYS_BMAN_MEM_BASE 487 #define CONFIG_SYS_BMAN_MEM_PHYS CONFIG_SYS_BMAN_MEM_BASE
488 #define CONFIG_SYS_BMAN_MEM_SIZE 0x00200000 488 #define CONFIG_SYS_BMAN_MEM_SIZE 0x00200000
489 489
490 /* For FM */ 490 /* For FM */
491 #define CONFIG_SYS_DPAA_FMAN 491 #define CONFIG_SYS_DPAA_FMAN
492 #define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ 492 #define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
493 493
494 #ifdef CONFIG_SYS_DPAA_FMAN 494 #ifdef CONFIG_SYS_DPAA_FMAN
495 #define CONFIG_FMAN_ENET 495 #define CONFIG_FMAN_ENET
496 #define CONFIG_PHY_MARVELL 496 #define CONFIG_PHY_MARVELL
497 #endif 497 #endif
498 498
499 #ifndef CONFIG_NAND 499 #ifndef CONFIG_NAND
500 /* Default address of microcode for the Linux Fman driver */ 500 /* Default address of microcode for the Linux Fman driver */
501 /* QE microcode/firmware address */ 501 /* QE microcode/firmware address */
502 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR 502 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
503 #define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 503 #define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000
504 #else 504 #else
505 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND 505 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
506 #define CONFIG_SYS_QE_FMAN_FW_ADDR 0x1f00000 506 #define CONFIG_SYS_QE_FMAN_FW_ADDR 0x1f00000
507 #endif 507 #endif
508 #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 508 #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
509 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) 509 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
510 510
511 #ifdef CONFIG_FMAN_ENET 511 #ifdef CONFIG_FMAN_ENET
512 #define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2 512 #define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2
513 #define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x7 513 #define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x7
514 514
515 #define CONFIG_SYS_TBIPA_VALUE 8 515 #define CONFIG_SYS_TBIPA_VALUE 8
516 #define CONFIG_MII /* MII PHY management */ 516 #define CONFIG_MII /* MII PHY management */
517 #define CONFIG_ETHPRIME "FM1@DTSEC1" 517 #define CONFIG_ETHPRIME "FM1@DTSEC1"
518 #endif 518 #endif
519 519
520 #define CONFIG_EXTRA_ENV_SETTINGS \ 520 #define CONFIG_EXTRA_ENV_SETTINGS \
521 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0" 521 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0"
522 522
523 #endif /* __CONFIG_H */ 523 #endif /* __CONFIG_H */
524 524
include/configs/P1_P2_RDB.h
Diff comments   View file @ 4a37755
1 /* 1 /*
2 * Copyright 2009-2011 Freescale Semiconductor, Inc. 2 * Copyright 2009-2011 Freescale Semiconductor, Inc.
3 * 3 *
4 * SPDX-License-Identifier: GPL-2.0+ 4 * SPDX-License-Identifier: GPL-2.0+
5 */ 5 */
6 6
7 /* 7 /*
8 * P1 P2 RDB board configuration file 8 * P1 P2 RDB board configuration file
9 * This file is intended to address a set of Low End and Ultra Low End 9 * This file is intended to address a set of Low End and Ultra Low End
10 * Freescale SOCs of QorIQ series(RDB platforms). 10 * Freescale SOCs of QorIQ series(RDB platforms).
11 * Currently only P2020RDB 11 * Currently only P2020RDB
12 */ 12 */
13 13
14 #ifndef __CONFIG_H 14 #ifndef __CONFIG_H
15 #define __CONFIG_H 15 #define __CONFIG_H
16 16
17 #ifdef CONFIG_36BIT 17 #ifdef CONFIG_36BIT
18 #define CONFIG_PHYS_64BIT 18 #define CONFIG_PHYS_64BIT
19 #endif 19 #endif
20 20
21 #ifdef CONFIG_P1011RDB 21 #ifdef CONFIG_P1011RDB
22 #define CONFIG_P1011 22 #define CONFIG_P1011
23 #endif 23 #endif
24 #ifdef CONFIG_P1020RDB 24 #ifdef CONFIG_P1020RDB
25 #define CONFIG_P1020 25 #define CONFIG_P1020
26 #endif 26 #endif
27 #ifdef CONFIG_P2010RDB 27 #ifdef CONFIG_P2010RDB
28 #define CONFIG_P2010 28 #define CONFIG_P2010
29 #endif 29 #endif
30 #ifdef CONFIG_P2020RDB 30 #ifdef CONFIG_P2020RDB
31 #define CONFIG_P2020 31 #define CONFIG_P2020
32 #endif 32 #endif
33 33
34 #ifdef CONFIG_NAND 34 #ifdef CONFIG_NAND
35 #define CONFIG_NAND_U_BOOT 1 35 #define CONFIG_NAND_U_BOOT 1
36 #define CONFIG_RAMBOOT_NAND 1 36 #define CONFIG_RAMBOOT_NAND 1
37 #ifdef CONFIG_NAND_SPL 37 #ifdef CONFIG_NAND_SPL
38 #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 38 #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
39 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ 39 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
40 #else 40 #else
41 #define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds 41 #define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
42 #define CONFIG_SYS_TEXT_BASE 0xf8f82000 42 #define CONFIG_SYS_TEXT_BASE 0xf8f82000
43 #endif /* CONFIG_NAND_SPL */ 43 #endif /* CONFIG_NAND_SPL */
44 #endif 44 #endif
45 45
46 #ifdef CONFIG_SDCARD 46 #ifdef CONFIG_SDCARD
47 #define CONFIG_RAMBOOT_SDCARD 1 47 #define CONFIG_RAMBOOT_SDCARD 1
48 #define CONFIG_SYS_TEXT_BASE 0x11000000 48 #define CONFIG_SYS_TEXT_BASE 0x11000000
49 #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc 49 #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc
50 #endif 50 #endif
51 51
52 #ifdef CONFIG_SPIFLASH 52 #ifdef CONFIG_SPIFLASH
53 #define CONFIG_RAMBOOT_SPIFLASH 1 53 #define CONFIG_RAMBOOT_SPIFLASH 1
54 #define CONFIG_SYS_TEXT_BASE 0x11000000 54 #define CONFIG_SYS_TEXT_BASE 0x11000000
55 #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc 55 #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc
56 #endif 56 #endif
57 57
58 #ifndef CONFIG_SYS_TEXT_BASE 58 #ifndef CONFIG_SYS_TEXT_BASE
59 #define CONFIG_SYS_TEXT_BASE 0xeff40000 59 #define CONFIG_SYS_TEXT_BASE 0xeff40000
60 #endif 60 #endif
61 61
62 #ifndef CONFIG_RESET_VECTOR_ADDRESS 62 #ifndef CONFIG_RESET_VECTOR_ADDRESS
63 #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc 63 #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
64 #endif 64 #endif
65 65
66 #ifndef CONFIG_SYS_MONITOR_BASE 66 #ifndef CONFIG_SYS_MONITOR_BASE
67 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ 67 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
68 #endif 68 #endif
69 69
70 /* High Level Configuration Options */ 70 /* High Level Configuration Options */
71 #define CONFIG_BOOKE 1 /* BOOKE */ 71 #define CONFIG_BOOKE 1 /* BOOKE */
72 #define CONFIG_E500 1 /* BOOKE e500 family */ 72 #define CONFIG_E500 1 /* BOOKE e500 family */
73 #define CONFIG_FSL_ELBC 1 /* Enable eLBC Support */ 73 #define CONFIG_FSL_ELBC 1 /* Enable eLBC Support */
74 74
75 #define CONFIG_PCI 1 /* Enable PCI/PCIE */ 75 #define CONFIG_PCI 1 /* Enable PCI/PCIE */
76 #if defined(CONFIG_PCI) 76 #if defined(CONFIG_PCI)
77 #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ 77 #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */
78 #define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */ 78 #define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */
79 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ 79 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
80 #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ 80 #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */
81 #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ 81 #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */
82 #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ 82 #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
83 #endif /* #if defined(CONFIG_PCI) */ 83 #endif /* #if defined(CONFIG_PCI) */
84 #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ 84 #define CONFIG_FSL_LAW 1 /* Use common FSL init code */
85 #define CONFIG_TSEC_ENET /* tsec ethernet support */ 85 #define CONFIG_TSEC_ENET /* tsec ethernet support */
86 #define CONFIG_ENV_OVERWRITE 86 #define CONFIG_ENV_OVERWRITE
87 87
88 #if defined(CONFIG_PCI) 88 #if defined(CONFIG_PCI)
89 #define CONFIG_E1000 1 /* E1000 pci Ethernet card*/ 89 #define CONFIG_E1000 1 /* E1000 pci Ethernet card*/
90 #endif 90 #endif
91 91
92 #ifndef __ASSEMBLY__ 92 #ifndef __ASSEMBLY__
93 extern unsigned long get_board_sys_clk(unsigned long dummy); 93 extern unsigned long get_board_sys_clk(unsigned long dummy);
94 #endif 94 #endif
95 #define CONFIG_DDR_CLK_FREQ 66666666 /* DDRCLK on P1_P2 RDB */ 95 #define CONFIG_DDR_CLK_FREQ 66666666 /* DDRCLK on P1_P2 RDB */
96 #define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0) /*sysclk for P1_P2 RDB */ 96 #define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0) /*sysclk for P1_P2 RDB */
97 97
98 #if defined(CONFIG_P2020) || defined(CONFIG_P1020) 98 #if defined(CONFIG_P2020) || defined(CONFIG_P1020)
99 #define CONFIG_MP 99 #define CONFIG_MP
100 #endif 100 #endif
101 101
102 #define CONFIG_HWCONFIG 102 #define CONFIG_HWCONFIG
103 103
104 /* 104 /*
105 * These can be toggled for performance analysis, otherwise use default. 105 * These can be toggled for performance analysis, otherwise use default.
106 */ 106 */
107 #define CONFIG_L2_CACHE /* toggle L2 cache */ 107 #define CONFIG_L2_CACHE /* toggle L2 cache */
108 #define CONFIG_BTB /* toggle branch predition */ 108 #define CONFIG_BTB /* toggle branch predition */
109 109
110 #define CONFIG_ADDR_STREAMING /* toggle addr streaming */ 110 #define CONFIG_ADDR_STREAMING /* toggle addr streaming */
111 111
112 #define CONFIG_ENABLE_36BIT_PHYS 1 112 #define CONFIG_ENABLE_36BIT_PHYS 1
113 113
114 #ifdef CONFIG_PHYS_64BIT 114 #ifdef CONFIG_PHYS_64BIT
115 #define CONFIG_ADDR_MAP 1 115 #define CONFIG_ADDR_MAP 1
116 #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ 116 #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
117 #endif 117 #endif
118 118
119 #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */ 119 #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */
120 #define CONFIG_SYS_MEMTEST_END 0x1fffffff 120 #define CONFIG_SYS_MEMTEST_END 0x1fffffff
121 #define CONFIG_PANIC_HANG /* do not reset board on panic */ 121 #define CONFIG_PANIC_HANG /* do not reset board on panic */
122 122
123 /* 123 /*
124 * Config the L2 Cache as L2 SRAM 124 * Config the L2 Cache as L2 SRAM
125 */ 125 */
126 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 126 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
127 #ifdef CONFIG_PHYS_64BIT 127 #ifdef CONFIG_PHYS_64BIT
128 #define CONFIG_SYS_INIT_L2_ADDR_PHYS 0xff8f80000ull 128 #define CONFIG_SYS_INIT_L2_ADDR_PHYS 0xff8f80000ull
129 #else 129 #else
130 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR 130 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
131 #endif 131 #endif
132 #define CONFIG_SYS_L2_SIZE (512 << 10) 132 #define CONFIG_SYS_L2_SIZE (512 << 10)
133 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) 133 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
134 134
135 #define CONFIG_SYS_CCSRBAR 0xffe00000 135 #define CONFIG_SYS_CCSRBAR 0xffe00000
136 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR 136 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
137 137
138 #if defined(CONFIG_NAND_SPL) 138 #if defined(CONFIG_NAND_SPL)
139 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE 139 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
140 #endif 140 #endif
141 141
142 /* DDR Setup */ 142 /* DDR Setup */
143 #define CONFIG_SYS_FSL_DDR2 143 #define CONFIG_SYS_FSL_DDR2
144 #undef CONFIG_FSL_DDR_INTERACTIVE 144 #undef CONFIG_FSL_DDR_INTERACTIVE
145 #undef CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ 145 #undef CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
146 146
147 #define CONFIG_MEM_INIT_VALUE 0xDeadBeef 147 #define CONFIG_MEM_INIT_VALUE 0xDeadBeef
148 148
149 #define CONFIG_SYS_SDRAM_SIZE 1024 /* DDR size on P1_P2 RDBs */ 149 #define CONFIG_SYS_SDRAM_SIZE 1024 /* DDR size on P1_P2 RDBs */
150 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 150 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
151 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE 151 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
152 152
153 #define CONFIG_NUM_DDR_CONTROLLERS 1 153 #define CONFIG_NUM_DDR_CONTROLLERS 1
154 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 154 #define CONFIG_DIMM_SLOTS_PER_CTLR 1
155 #define CONFIG_CHIP_SELECTS_PER_CTRL 1 155 #define CONFIG_CHIP_SELECTS_PER_CTRL 1
156 156
157 #define CONFIG_SYS_DDR_ERR_INT_EN 0x0000000d 157 #define CONFIG_SYS_DDR_ERR_INT_EN 0x0000000d
158 #define CONFIG_SYS_DDR_ERR_DIS 0x00000000 158 #define CONFIG_SYS_DDR_ERR_DIS 0x00000000
159 #define CONFIG_SYS_DDR_SBE 0x00FF0000 159 #define CONFIG_SYS_DDR_SBE 0x00FF0000
160 160
161 /* 161 /*
162 * Memory map 162 * Memory map
163 * 163 *
164 * 0x0000_0000 0x3fff_ffff DDR 1G cacheablen 164 * 0x0000_0000 0x3fff_ffff DDR 1G cacheablen
165 * 0x8000_0000 0xbfff_ffff PCI Express Mem 1G non-cacheable 165 * 0x8000_0000 0xbfff_ffff PCI Express Mem 1G non-cacheable
166 * 0xffc0_0000 0xffc3_ffff PCI IO range 256k non-cacheable 166 * 0xffc0_0000 0xffc3_ffff PCI IO range 256k non-cacheable
167 * 167 *
168 * Localbus cacheable (TBD) 168 * Localbus cacheable (TBD)
169 * 0xXXXX_XXXX 0xXXXX_XXXX SRAM YZ M Cacheable 169 * 0xXXXX_XXXX 0xXXXX_XXXX SRAM YZ M Cacheable
170 * 170 *
171 * Localbus non-cacheable 171 * Localbus non-cacheable
172 * 0xef00_0000 0xefff_ffff FLASH 16M non-cacheable 172 * 0xef00_0000 0xefff_ffff FLASH 16M non-cacheable
173 * 0xffa0_0000 0xffaf_ffff NAND 1M non-cacheable 173 * 0xffa0_0000 0xffaf_ffff NAND 1M non-cacheable
174 * 0xffb0_0000 0xffbf_ffff VSC7385 switch 1M non-cacheable 174 * 0xffb0_0000 0xffbf_ffff VSC7385 switch 1M non-cacheable
175 * 0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0 175 * 0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0
176 * 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable 176 * 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable
177 */ 177 */
178 178
179 /* 179 /*
180 * Local Bus Definitions 180 * Local Bus Definitions
181 */ 181 */
182 #define CONFIG_SYS_FLASH_BASE 0xef000000 /* start of FLASH 16M */ 182 #define CONFIG_SYS_FLASH_BASE 0xef000000 /* start of FLASH 16M */
183 183
184 #ifdef CONFIG_PHYS_64BIT 184 #ifdef CONFIG_PHYS_64BIT
185 #define CONFIG_SYS_FLASH_BASE_PHYS 0xfef000000ull 185 #define CONFIG_SYS_FLASH_BASE_PHYS 0xfef000000ull
186 #else 186 #else
187 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE 187 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
188 #endif 188 #endif
189 189
190 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ 190 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \
191 BR_PS_16 | BR_V) 191 BR_PS_16 | BR_V)
192 #define CONFIG_FLASH_OR_PRELIM 0xff000ff7 192 #define CONFIG_FLASH_OR_PRELIM 0xff000ff7
193 193
194 #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS} 194 #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS}
195 #define CONFIG_SYS_FLASH_QUIET_TEST 195 #define CONFIG_SYS_FLASH_QUIET_TEST
196 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ 196 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
197 197
198 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ 198 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
199 #define CONFIG_SYS_MAX_FLASH_SECT 128 /* sectors per device */ 199 #define CONFIG_SYS_MAX_FLASH_SECT 128 /* sectors per device */
200 #undef CONFIG_SYS_FLASH_CHECKSUM 200 #undef CONFIG_SYS_FLASH_CHECKSUM
201 #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ 201 #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
202 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ 202 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
203 203
204 #if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_RAMBOOT_SDCARD) || \ 204 #if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_RAMBOOT_SDCARD) || \
205 defined(CONFIG_RAMBOOT_SPIFLASH) 205 defined(CONFIG_RAMBOOT_SPIFLASH)
206 #define CONFIG_SYS_RAMBOOT 206 #define CONFIG_SYS_RAMBOOT
207 #define CONFIG_SYS_EXTRA_ENV_RELOC 207 #define CONFIG_SYS_EXTRA_ENV_RELOC
208 #else 208 #else
209 #undef CONFIG_SYS_RAMBOOT 209 #undef CONFIG_SYS_RAMBOOT
210 #endif 210 #endif
211 211
212 #define CONFIG_FLASH_CFI_DRIVER 212 #define CONFIG_FLASH_CFI_DRIVER
213 #define CONFIG_SYS_FLASH_CFI 213 #define CONFIG_SYS_FLASH_CFI
214 #define CONFIG_SYS_FLASH_EMPTY_INFO 214 #define CONFIG_SYS_FLASH_EMPTY_INFO
215 #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 215 #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7
216 216
217 #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ 217 #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */
218 #define CONFIG_MISC_INIT_R 218 #define CONFIG_MISC_INIT_R
219 #define CONFIG_HWCONFIG 219 #define CONFIG_HWCONFIG
220 220
221 #define CONFIG_SYS_INIT_RAM_LOCK 1 221 #define CONFIG_SYS_INIT_RAM_LOCK 1
222 #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */ 222 #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */
223 #ifdef CONFIG_PHYS_64BIT 223 #ifdef CONFIG_PHYS_64BIT
224 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf 224 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf
225 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR 225 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR
226 /* The assembler doesn't like typecast */ 226 /* The assembler doesn't like typecast */
227 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ 227 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
228 ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ 228 ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
229 CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) 229 CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
230 #else 230 #else
231 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS CONFIG_SYS_INIT_RAM_ADDR /* Initial L1 address */ 231 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS CONFIG_SYS_INIT_RAM_ADDR /* Initial L1 address */
232 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0 232 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
233 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS 233 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
234 #endif 234 #endif
235 #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */ 235 #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */
236 236
237 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE \ 237 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE \
238 - GENERATED_GBL_DATA_SIZE) 238 - GENERATED_GBL_DATA_SIZE)
239 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 239 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
240 240
241 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon*/ 241 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon*/
242 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc*/ 242 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc*/
243 243
244 #ifndef CONFIG_NAND_SPL 244 #ifndef CONFIG_NAND_SPL
245 #define CONFIG_SYS_NAND_BASE 0xffa00000 245 #define CONFIG_SYS_NAND_BASE 0xffa00000
246 #ifdef CONFIG_PHYS_64BIT 246 #ifdef CONFIG_PHYS_64BIT
247 #define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull 247 #define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull
248 #else 248 #else
249 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE 249 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
250 #endif 250 #endif
251 #else 251 #else
252 #define CONFIG_SYS_NAND_BASE 0xfff00000 252 #define CONFIG_SYS_NAND_BASE 0xfff00000
253 #ifdef CONFIG_PHYS_64BIT 253 #ifdef CONFIG_PHYS_64BIT
254 #define CONFIG_SYS_NAND_BASE_PHYS 0xffff00000ull 254 #define CONFIG_SYS_NAND_BASE_PHYS 0xffff00000ull
255 #else 255 #else
256 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE 256 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
257 #endif 257 #endif
258 #endif 258 #endif
259 259
260 #define CONFIG_CMD_NAND 260 #define CONFIG_CMD_NAND
261 #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} 261 #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
262 #define CONFIG_SYS_MAX_NAND_DEVICE 1 262 #define CONFIG_SYS_MAX_NAND_DEVICE 1
263 #define CONFIG_MTD_NAND_VERIFY_WRITE 263 #define CONFIG_MTD_NAND_VERIFY_WRITE
264 #define CONFIG_NAND_FSL_ELBC 1 264 #define CONFIG_NAND_FSL_ELBC 1
265 #define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024) 265 #define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024)
266 266
267 /* NAND boot: 4K NAND loader config */ 267 /* NAND boot: 4K NAND loader config */
268 #define CONFIG_SYS_NAND_SPL_SIZE 0x1000 268 #define CONFIG_SYS_NAND_SPL_SIZE 0x1000
269 #define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000) 269 #define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000)
270 #define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR) 270 #define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR)
271 #define CONFIG_SYS_NAND_U_BOOT_START (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE) 271 #define CONFIG_SYS_NAND_U_BOOT_START (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE)
272 #define CONFIG_SYS_NAND_U_BOOT_OFFS (0) 272 #define CONFIG_SYS_NAND_U_BOOT_OFFS (0)
273 #define CONFIG_SYS_NAND_U_BOOT_RELOC (CONFIG_SYS_INIT_L2_END - 0x2000) 273 #define CONFIG_SYS_NAND_U_BOOT_RELOC (CONFIG_SYS_INIT_L2_END - 0x2000)
274 #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF) 274 #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF)
275 275
276 /* NAND flash config */ 276 /* NAND flash config */
277 #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ 277 #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
278 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ 278 | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
279 | BR_PS_8 /* Port Size = 8 bit */ \ 279 | BR_PS_8 /* Port Size = 8 bit */ \
280 | BR_MS_FCM /* MSEL = FCM */ \ 280 | BR_MS_FCM /* MSEL = FCM */ \
281 | BR_V) /* valid */ 281 | BR_V) /* valid */
282 282
283 #define CONFIG_SYS_NAND_OR_PRELIM (0xFFF80000 /* length 32K */ \ 283 #define CONFIG_SYS_NAND_OR_PRELIM (0xFFF80000 /* length 32K */ \
284 | OR_FCM_CSCT \ 284 | OR_FCM_CSCT \
285 | OR_FCM_CST \ 285 | OR_FCM_CST \
286 | OR_FCM_CHT \ 286 | OR_FCM_CHT \
287 | OR_FCM_SCY_1 \ 287 | OR_FCM_SCY_1 \
288 | OR_FCM_TRLX \ 288 | OR_FCM_TRLX \
289 | OR_FCM_EHTR) 289 | OR_FCM_EHTR)
290 290
291 #ifdef CONFIG_RAMBOOT_NAND 291 #ifdef CONFIG_RAMBOOT_NAND
292 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ 292 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
293 #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ 293 #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
294 #define CONFIG_SYS_BR1_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ 294 #define CONFIG_SYS_BR1_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
295 #define CONFIG_SYS_OR1_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ 295 #define CONFIG_SYS_OR1_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */
296 #else 296 #else
297 #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ 297 #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
298 #define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ 298 #define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */
299 #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ 299 #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
300 #define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ 300 #define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
301 #endif 301 #endif
302 302
303 #define CONFIG_SYS_VSC7385_BASE 0xffb00000 303 #define CONFIG_SYS_VSC7385_BASE 0xffb00000
304 304
305 #ifdef CONFIG_PHYS_64BIT 305 #ifdef CONFIG_PHYS_64BIT
306 #define CONFIG_SYS_VSC7385_BASE_PHYS 0xfffb00000ull 306 #define CONFIG_SYS_VSC7385_BASE_PHYS 0xfffb00000ull
307 #else 307 #else
308 #define CONFIG_SYS_VSC7385_BASE_PHYS CONFIG_SYS_VSC7385_BASE 308 #define CONFIG_SYS_VSC7385_BASE_PHYS CONFIG_SYS_VSC7385_BASE
309 #endif 309 #endif
310 310
311 #define CONFIG_SYS_BR2_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_VSC7385_BASE) \ 311 #define CONFIG_SYS_BR2_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_VSC7385_BASE) \
312 | BR_PS_8 | BR_V) 312 | BR_PS_8 | BR_V)
313 #define CONFIG_SYS_OR2_PRELIM (OR_AM_128KB | OR_GPCM_CSNT | OR_GPCM_XACS | \ 313 #define CONFIG_SYS_OR2_PRELIM (OR_AM_128KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
314 OR_GPCM_SCY_15 | OR_GPCM_SETA | OR_GPCM_TRLX | \ 314 OR_GPCM_SCY_15 | OR_GPCM_SETA | OR_GPCM_TRLX | \
315 OR_GPCM_EHTR | OR_GPCM_EAD) 315 OR_GPCM_EHTR | OR_GPCM_EAD)
316 316
317 /* Serial Port - controlled on board with jumper J8 317 /* Serial Port - controlled on board with jumper J8
318 * open - index 2 318 * open - index 2
319 * shorted - index 1 319 * shorted - index 1
320 */ 320 */
321 #define CONFIG_CONS_INDEX 1 321 #define CONFIG_CONS_INDEX 1
322 #define CONFIG_SYS_NS16550 322 #define CONFIG_SYS_NS16550
323 #define CONFIG_SYS_NS16550_SERIAL 323 #define CONFIG_SYS_NS16550_SERIAL
324 #define CONFIG_SYS_NS16550_REG_SIZE 1 324 #define CONFIG_SYS_NS16550_REG_SIZE 1
325 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) 325 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
326 #ifdef CONFIG_NAND_SPL 326 #ifdef CONFIG_NAND_SPL
327 #define CONFIG_NS16550_MIN_FUNCTIONS 327 #define CONFIG_NS16550_MIN_FUNCTIONS
328 #endif 328 #endif
329 329
330 #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */ 330 #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */
331 331
332 #define CONFIG_SYS_BAUDRATE_TABLE \ 332 #define CONFIG_SYS_BAUDRATE_TABLE \
333 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} 333 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
334 334
335 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) 335 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
336 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) 336 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
337 337
338 /* Use the HUSH parser */ 338 /* Use the HUSH parser */
339 #define CONFIG_SYS_HUSH_PARSER 339 #define CONFIG_SYS_HUSH_PARSER
340 340
341 /* 341 /*
342 * Pass open firmware flat tree 342 * Pass open firmware flat tree
343 */ 343 */
344 #define CONFIG_OF_LIBFDT 1 344 #define CONFIG_OF_LIBFDT 1
345 #define CONFIG_OF_BOARD_SETUP 1 345 #define CONFIG_OF_BOARD_SETUP 1
346 #define CONFIG_OF_STDOUT_VIA_ALIAS 1 346 #define CONFIG_OF_STDOUT_VIA_ALIAS 1
347 347
348 /* new uImage format support */ 348 /* new uImage format support */
349 #define CONFIG_FIT 1 349 #define CONFIG_FIT 1
350 #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ 350 #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
351 351
352 /* I2C */ 352 /* I2C */
353 #define CONFIG_SYS_I2C 353 #define CONFIG_SYS_I2C
354 #define CONFIG_SYS_I2C_FSL 354 #define CONFIG_SYS_I2C_FSL
355 #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 355 #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
356 #define CONFIG_SYS_FSL_I2C_SPEED 400000 356 #define CONFIG_SYS_FSL_I2C_SPEED 400000
357 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F 357 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
358 #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 358 #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
359 #define CONFIG_SYS_FSL_I2C2_SPEED 400000 359 #define CONFIG_SYS_FSL_I2C2_SPEED 400000
360 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F 360 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
361 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} } 361 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} }
362 362
363 /* 363 /*
364 * I2C2 EEPROM 364 * I2C2 EEPROM
365 */ 365 */
366 #define CONFIG_ID_EEPROM 366 #define CONFIG_ID_EEPROM
367 #ifdef CONFIG_ID_EEPROM 367 #ifdef CONFIG_ID_EEPROM
368 #define CONFIG_SYS_I2C_EEPROM_NXID 368 #define CONFIG_SYS_I2C_EEPROM_NXID
369 #endif 369 #endif
370 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 370 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
371 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 371 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
372 #define CONFIG_SYS_EEPROM_BUS_NUM 1 372 #define CONFIG_SYS_EEPROM_BUS_NUM 1
373 373
374 #define CONFIG_SYS_I2C_PCA9557_ADDR 0x18 374 #define CONFIG_SYS_I2C_PCA9557_ADDR 0x18
375 375
376 #define CONFIG_RTC_DS1337 376 #define CONFIG_RTC_DS1337
377 #define CONFIG_SYS_RTC_DS1337_NOOSC 377 #define CONFIG_SYS_RTC_DS1337_NOOSC
378 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 378 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
379 379
380 /* eSPI - Enhanced SPI */ 380 /* eSPI - Enhanced SPI */
381 #define CONFIG_FSL_ESPI 381 #define CONFIG_FSL_ESPI
382 #define CONFIG_SPI_FLASH 382 #define CONFIG_SPI_FLASH
383 #define CONFIG_SPI_FLASH_SPANSION 383 #define CONFIG_SPI_FLASH_SPANSION
384 #define CONFIG_CMD_SF 384 #define CONFIG_CMD_SF
385 #define CONFIG_SF_DEFAULT_SPEED 10000000 385 #define CONFIG_SF_DEFAULT_SPEED 10000000
386 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 386 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
387 387
388 /* 388 /*
389 * General PCI 389 * General PCI
390 * Memory space is mapped 1-1, but I/O space must start from 0. 390 * Memory space is mapped 1-1, but I/O space must start from 0.
391 */ 391 */
392 392
393 #if defined(CONFIG_PCI) 393 #if defined(CONFIG_PCI)
394 /* controller 2, Slot 2, tgtid 2, Base address 9000 */ 394 /* controller 2, Slot 2, tgtid 2, Base address 9000 */
395 #define CONFIG_SYS_PCIE2_NAME "Slot 1" 395 #define CONFIG_SYS_PCIE2_NAME "Slot 1"
396 #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 396 #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000
397 #ifdef CONFIG_PHYS_64BIT 397 #ifdef CONFIG_PHYS_64BIT
398 #define CONFIG_SYS_PCIE2_MEM_BUS 0xc0000000 398 #define CONFIG_SYS_PCIE2_MEM_BUS 0xc0000000
399 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull 399 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull
400 #else 400 #else
401 #define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 401 #define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000
402 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 402 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000
403 #endif 403 #endif
404 #define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ 404 #define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */
405 #define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000 405 #define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000
406 #define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 406 #define CONFIG_SYS_PCIE2_IO_BUS 0x00000000
407 #ifdef CONFIG_PHYS_64BIT 407 #ifdef CONFIG_PHYS_64BIT
408 #define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc10000ull 408 #define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc10000ull
409 #else 409 #else
410 #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 410 #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000
411 #endif 411 #endif
412 #define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ 412 #define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */
413 413
414 /* controller 1, Slot 1, tgtid 1, Base address a000 */ 414 /* controller 1, Slot 1, tgtid 1, Base address a000 */
415 #define CONFIG_SYS_PCIE1_NAME "Slot 2" 415 #define CONFIG_SYS_PCIE1_NAME "Slot 2"
416 #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 416 #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000
417 #ifdef CONFIG_PHYS_64BIT 417 #ifdef CONFIG_PHYS_64BIT
418 #define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 418 #define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000
419 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull 419 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull
420 #else 420 #else
421 #define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 421 #define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000
422 #define CONFIG_SYS_PCIE1_MEM_PHYS 0x80000000 422 #define CONFIG_SYS_PCIE1_MEM_PHYS 0x80000000
423 #endif 423 #endif
424 #define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ 424 #define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */
425 #define CONFIG_SYS_PCIE1_IO_VIRT 0xffc00000 425 #define CONFIG_SYS_PCIE1_IO_VIRT 0xffc00000
426 #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 426 #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
427 #ifdef CONFIG_PHYS_64BIT 427 #ifdef CONFIG_PHYS_64BIT
428 #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc00000ull 428 #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc00000ull
429 #else 429 #else
430 #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc00000 430 #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc00000
431 #endif 431 #endif
432 #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ 432 #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
433 433
434 #define CONFIG_PCI_PNP /* do pci plug-and-play */ 434 #define CONFIG_PCI_PNP /* do pci plug-and-play */
435 435
436 #undef CONFIG_EEPRO100 436 #undef CONFIG_EEPRO100
437 #undef CONFIG_TULIP 437 #undef CONFIG_TULIP
438 #undef CONFIG_RTL8139 438 #undef CONFIG_RTL8139
439 439
440 #ifdef CONFIG_RTL8139 440 #ifdef CONFIG_RTL8139
441 /* This macro is used by RTL8139 but not defined in PPC architecture */ 441 /* This macro is used by RTL8139 but not defined in PPC architecture */
442 #define KSEG1ADDR(x) (x) 442 #define KSEG1ADDR(x) (x)
443 #define _IO_BASE 0x00000000 443 #define _IO_BASE 0x00000000
444 #endif 444 #endif
445 445
446 446
447 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ 447 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
448 #define CONFIG_DOS_PARTITION 448 #define CONFIG_DOS_PARTITION
449 449
450 #endif /* CONFIG_PCI */ 450 #endif /* CONFIG_PCI */
451 451
452 452
453 #if defined(CONFIG_TSEC_ENET) 453 #if defined(CONFIG_TSEC_ENET)
454 #define CONFIG_MII 1 /* MII PHY management */ 454 #define CONFIG_MII 1 /* MII PHY management */
455 #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ 455 #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
456 #define CONFIG_TSEC1 1 456 #define CONFIG_TSEC1 1
457 #define CONFIG_TSEC1_NAME "eTSEC1" 457 #define CONFIG_TSEC1_NAME "eTSEC1"
458 #define CONFIG_TSEC2 1 458 #define CONFIG_TSEC2 1
459 #define CONFIG_TSEC2_NAME "eTSEC2" 459 #define CONFIG_TSEC2_NAME "eTSEC2"
460 #define CONFIG_TSEC3 1 460 #define CONFIG_TSEC3 1
461 #define CONFIG_TSEC3_NAME "eTSEC3" 461 #define CONFIG_TSEC3_NAME "eTSEC3"
462 462
463 #define TSEC1_PHY_ADDR 2 463 #define TSEC1_PHY_ADDR 2
464 #define TSEC2_PHY_ADDR 0 464 #define TSEC2_PHY_ADDR 0
465 #define TSEC3_PHY_ADDR 1 465 #define TSEC3_PHY_ADDR 1
466 466
467 #define CONFIG_VSC7385_ENET 467 #define CONFIG_VSC7385_ENET
468 468
469 #define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) 469 #define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
470 #define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) 470 #define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
471 #define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) 471 #define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
472 472
473 #define TSEC1_PHYIDX 0 473 #define TSEC1_PHYIDX 0
474 #define TSEC2_PHYIDX 0 474 #define TSEC2_PHYIDX 0
475 #define TSEC3_PHYIDX 0 475 #define TSEC3_PHYIDX 0
476 476
477 /* Vitesse 7385 */ 477 /* Vitesse 7385 */
478 478
479 #ifdef CONFIG_VSC7385_ENET 479 #ifdef CONFIG_VSC7385_ENET
480 /* The size of the VSC7385 firmware image */ 480 /* The size of the VSC7385 firmware image */
481 #define CONFIG_VSC7385_IMAGE_SIZE 8192 481 #define CONFIG_VSC7385_IMAGE_SIZE 8192
482 #endif 482 #endif
483 483
484 #define CONFIG_ETHPRIME "eTSEC1" 484 #define CONFIG_ETHPRIME "eTSEC1"
485 485
486 #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ 486 #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
487 487
488 #endif /* CONFIG_TSEC_ENET */ 488 #endif /* CONFIG_TSEC_ENET */
489 489
490 /* 490 /*
491 * Environment 491 * Environment
492 */ 492 */
493 #if defined(CONFIG_SYS_RAMBOOT) 493 #if defined(CONFIG_SYS_RAMBOOT)
494 #if defined(CONFIG_RAMBOOT_NAND) 494 #if defined(CONFIG_RAMBOOT_NAND)
495 #define CONFIG_ENV_IS_IN_NAND 1 495 #define CONFIG_ENV_IS_IN_NAND 1
496 #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE 496 #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
497 #define CONFIG_ENV_OFFSET ((768*1024)+CONFIG_SYS_NAND_BLOCK_SIZE) 497 #define CONFIG_ENV_OFFSET ((768*1024)+CONFIG_SYS_NAND_BLOCK_SIZE)
498 #elif defined(CONFIG_RAMBOOT_SDCARD) 498 #elif defined(CONFIG_RAMBOOT_SDCARD)
499 #define CONFIG_ENV_IS_IN_MMC 499 #define CONFIG_ENV_IS_IN_MMC
500 #define CONFIG_FSL_FIXED_MMC_LOCATION 500 #define CONFIG_FSL_FIXED_MMC_LOCATION
501 #define CONFIG_ENV_SIZE 0x2000 501 #define CONFIG_ENV_SIZE 0x2000
502 #define CONFIG_SYS_MMC_ENV_DEV 0 502 #define CONFIG_SYS_MMC_ENV_DEV 0
503 #elif defined(CONFIG_RAMBOOT_SPIFLASH) 503 #elif defined(CONFIG_RAMBOOT_SPIFLASH)
504 #define CONFIG_ENV_IS_IN_SPI_FLASH 504 #define CONFIG_ENV_IS_IN_SPI_FLASH
505 #define CONFIG_ENV_SPI_BUS 0 505 #define CONFIG_ENV_SPI_BUS 0
506 #define CONFIG_ENV_SPI_CS 0 506 #define CONFIG_ENV_SPI_CS 0
507 #define CONFIG_ENV_SPI_MAX_HZ 10000000 507 #define CONFIG_ENV_SPI_MAX_HZ 10000000
508 #define CONFIG_ENV_SPI_MODE 0 508 #define CONFIG_ENV_SPI_MODE 0
509 #define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ 509 #define CONFIG_ENV_OFFSET 0x100000 /* 1MB */
510 #define CONFIG_ENV_SECT_SIZE 0x10000 510 #define CONFIG_ENV_SECT_SIZE 0x10000
511 #define CONFIG_ENV_SIZE 0x2000 511 #define CONFIG_ENV_SIZE 0x2000
512 #endif 512 #endif
513 #else 513 #else
514 #define CONFIG_ENV_IS_IN_FLASH 1 514 #define CONFIG_ENV_IS_IN_FLASH 1
515 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) 515 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
516 #define CONFIG_ENV_SIZE 0x2000 516 #define CONFIG_ENV_SIZE 0x2000
517 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ 517 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
518 #endif 518 #endif
519 519
520 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ 520 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
521 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ 521 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
522 522
523 /* 523 /*
524 * Command line configuration. 524 * Command line configuration.
525 */ 525 */
526 #include <config_cmd_default.h> 526 #include <config_cmd_default.h>
527 527
528 #define CONFIG_CMD_DATE 528 #define CONFIG_CMD_DATE
529 #define CONFIG_CMD_ELF 529 #define CONFIG_CMD_ELF
530 #define CONFIG_CMD_I2C 530 #define CONFIG_CMD_I2C
531 #define CONFIG_CMD_IRQ 531 #define CONFIG_CMD_IRQ
532 #define CONFIG_CMD_MII 532 #define CONFIG_CMD_MII
533 #define CONFIG_CMD_PING 533 #define CONFIG_CMD_PING
534 #define CONFIG_CMD_SETEXPR 534 #define CONFIG_CMD_SETEXPR
535 #define CONFIG_CMD_REGINFO 535 #define CONFIG_CMD_REGINFO
536 536
537 #if defined(CONFIG_PCI) 537 #if defined(CONFIG_PCI)
538 #define CONFIG_CMD_NET 538 #define CONFIG_CMD_NET
539 #define CONFIG_CMD_PCI 539 #define CONFIG_CMD_PCI
540 #endif 540 #endif
541 541
542 #undef CONFIG_WATCHDOG /* watchdog disabled */ 542 #undef CONFIG_WATCHDOG /* watchdog disabled */
543 543
544 #define CONFIG_MMC 1 544 #define CONFIG_MMC 1
545 545
546 #ifdef CONFIG_MMC 546 #ifdef CONFIG_MMC
547 #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ 547 #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
548 #define CONFIG_CMD_MMC 548 #define CONFIG_CMD_MMC
549 #define CONFIG_DOS_PARTITION 549 #define CONFIG_DOS_PARTITION
550 #define CONFIG_FSL_ESDHC 550 #define CONFIG_FSL_ESDHC
551 #define CONFIG_GENERIC_MMC 551 #define CONFIG_GENERIC_MMC
552 #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR 552 #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
553 #ifdef CONFIG_P2020 553 #ifdef CONFIG_P2020
554 #define CONFIG_SYS_FSL_ESDHC_USE_PIO /* P2020 eSDHC DMA is not functional*/ 554 #define CONFIG_SYS_FSL_ESDHC_USE_PIO /* P2020 eSDHC DMA is not functional*/
555 #endif 555 #endif
556 #endif 556 #endif
557 557
558 #define CONFIG_HAS_FSL_DR_USB 558 #define CONFIG_HAS_FSL_DR_USB
559 559
560 #if defined(CONFIG_HAS_FSL_DR_USB) 560 #if defined(CONFIG_HAS_FSL_DR_USB)
561 #define CONFIG_USB_EHCI 561 #define CONFIG_USB_EHCI
562 562
563 #ifdef CONFIG_USB_EHCI 563 #ifdef CONFIG_USB_EHCI
564 #define CONFIG_CMD_USB 564 #define CONFIG_CMD_USB
565 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 565 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
566 #define CONFIG_USB_EHCI_FSL 566 #define CONFIG_USB_EHCI_FSL
567 #define CONFIG_USB_STORAGE 567 #define CONFIG_USB_STORAGE
568 #endif 568 #endif
569 #endif 569 #endif
570 570
571 #if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI) 571 #if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI)
572 #define CONFIG_CMD_EXT2 572 #define CONFIG_CMD_EXT2
573 #define CONFIG_CMD_FAT 573 #define CONFIG_CMD_FAT
574 #define CONFIG_DOS_PARTITION 574 #define CONFIG_DOS_PARTITION
575 #endif 575 #endif
576 576
577 /* 577 /*
578 * Miscellaneous configurable options 578 * Miscellaneous configurable options
579 */ 579 */
580 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 580 #define CONFIG_SYS_LONGHELP /* undef to save memory */
581 #define CONFIG_CMDLINE_EDITING /* Command-line editing */ 581 #define CONFIG_CMDLINE_EDITING /* Command-line editing */
582 #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ 582 #define CONFIG_AUTO_COMPLETE /* add autocompletion support */
583 #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ 583 #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
584 #if defined(CONFIG_CMD_KGDB) 584 #if defined(CONFIG_CMD_KGDB)
585 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 585 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
586 #else 586 #else
587 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 587 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
588 #endif 588 #endif
589 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 589 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
590 /* Print Buffer Size */ 590 /* Print Buffer Size */
591 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 591 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
592 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ 592 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
593 593
594 /* 594 /*
595 * For booting Linux, the board info and command line data 595 * For booting Linux, the board info and command line data
596 * have to be in the first 64 MB of memory, since this is 596 * have to be in the first 64 MB of memory, since this is
597 * the maximum mapped by the Linux kernel during initialization. 597 * the maximum mapped by the Linux kernel during initialization.
598 */ 598 */
599 #define CONFIG_SYS_BOOTMAPSZ (64 << 20)/* Initial Memory map for Linux*/ 599 #define CONFIG_SYS_BOOTMAPSZ (64 << 20)/* Initial Memory map for Linux*/
600 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ 600 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
601 601
602 #if defined(CONFIG_CMD_KGDB) 602 #if defined(CONFIG_CMD_KGDB)
603 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ 603 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
604 #endif 604 #endif
605 605
606 /* 606 /*
607 * Environment Configuration 607 * Environment Configuration
608 */ 608 */
609 609
610 #if defined(CONFIG_TSEC_ENET) 610 #if defined(CONFIG_TSEC_ENET)
611 #define CONFIG_HAS_ETH0 611 #define CONFIG_HAS_ETH0
612 #define CONFIG_HAS_ETH1 612 #define CONFIG_HAS_ETH1
613 #define CONFIG_HAS_ETH2 613 #define CONFIG_HAS_ETH2
614 #endif 614 #endif
615 615
616 #define CONFIG_HOSTNAME P2020RDB 616 #define CONFIG_HOSTNAME P2020RDB
617 #define CONFIG_ROOTPATH "/opt/nfsroot" 617 #define CONFIG_ROOTPATH "/opt/nfsroot"
618 #define CONFIG_BOOTFILE "uImage" 618 #define CONFIG_BOOTFILE "uImage"
619 #define CONFIG_UBOOTPATH u-boot.bin/* U-Boot image on TFTP server */ 619 #define CONFIG_UBOOTPATH u-boot.bin/* U-Boot image on TFTP server */
620 620
621 /* default location for tftp and bootm */ 621 /* default location for tftp and bootm */
622 #define CONFIG_LOADADDR 1000000 622 #define CONFIG_LOADADDR 1000000
623 623
624 #define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ 624 #define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */
625 #undef CONFIG_BOOTARGS /* the boot command will set bootargs */ 625 #undef CONFIG_BOOTARGS /* the boot command will set bootargs */
626 626
627 #define CONFIG_BAUDRATE 115200 627 #define CONFIG_BAUDRATE 115200
628 628
629 #define CONFIG_EXTRA_ENV_SETTINGS \ 629 #define CONFIG_EXTRA_ENV_SETTINGS \
630 "netdev=eth0\0" \ 630 "netdev=eth0\0" \
631 "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ 631 "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
632 "loadaddr=1000000\0" \ 632 "loadaddr=1000000\0" \
633 "tftpflash=tftpboot $loadaddr $uboot; " \ 633 "tftpflash=tftpboot $loadaddr $uboot; " \
634 "protect off " __stringify(CONFIG_SYS_TEXT_BASE) \ 634 "protect off " __stringify(CONFIG_SYS_TEXT_BASE) \
635 " +$filesize; " \ 635 " +$filesize; " \
636 "erase " __stringify(CONFIG_SYS_TEXT_BASE) \ 636 "erase " __stringify(CONFIG_SYS_TEXT_BASE) \
637 " +$filesize; " \ 637 " +$filesize; " \
638 "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ 638 "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \
639 " $filesize; " \ 639 " $filesize; " \
640 "protect on " __stringify(CONFIG_SYS_TEXT_BASE) \ 640 "protect on " __stringify(CONFIG_SYS_TEXT_BASE) \
641 " +$filesize; " \ 641 " +$filesize; " \
642 "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ 642 "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \
643 " $filesize\0" \ 643 " $filesize\0" \
644 "consoledev=ttyS0\0" \ 644 "consoledev=ttyS0\0" \
645 "ramdiskaddr=2000000\0" \ 645 "ramdiskaddr=2000000\0" \
646 "ramdiskfile=rootfs.ext2.gz.uboot\0" \ 646 "ramdiskfile=rootfs.ext2.gz.uboot\0" \
647 "fdtaddr=c00000\0" \ 647 "fdtaddr=c00000\0" \
648 "fdtfile=p2020rdb.dtb\0" \ 648 "fdtfile=p2020rdb.dtb\0" \
649 "bdev=sda1\0" \ 649 "bdev=sda1\0" \
650 "jffs2nor=mtdblock3\0" \ 650 "jffs2nor=mtdblock3\0" \
651 "norbootaddr=ef080000\0" \ 651 "norbootaddr=ef080000\0" \
652 "norfdtaddr=ef040000\0" \ 652 "norfdtaddr=ef040000\0" \
653 "jffs2nand=mtdblock9\0" \ 653 "jffs2nand=mtdblock9\0" \
654 "nandbootaddr=100000\0" \ 654 "nandbootaddr=100000\0" \
655 "nandfdtaddr=80000\0" \ 655 "nandfdtaddr=80000\0" \
656 "nandimgsize=400000\0" \ 656 "nandimgsize=400000\0" \
657 "nandfdtsize=80000\0" \ 657 "nandfdtsize=80000\0" \
658 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0" \ 658 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0" \
659 "vscfw_addr=ef000000\0" \ 659 "vscfw_addr=ef000000\0" \
660 "othbootargs=ramdisk_size=600000\0" \ 660 "othbootargs=ramdisk_size=600000\0" \
661 "usbfatboot=setenv bootargs root=/dev/ram rw " \ 661 "usbfatboot=setenv bootargs root=/dev/ram rw " \
662 "console=$consoledev,$baudrate $othbootargs; " \ 662 "console=$consoledev,$baudrate $othbootargs; " \
663 "usb start;" \ 663 "usb start;" \
664 "fatload usb 0:2 $loadaddr $bootfile;" \ 664 "fatload usb 0:2 $loadaddr $bootfile;" \
665 "fatload usb 0:2 $fdtaddr $fdtfile;" \ 665 "fatload usb 0:2 $fdtaddr $fdtfile;" \
666 "fatload usb 0:2 $ramdiskaddr $ramdiskfile;" \ 666 "fatload usb 0:2 $ramdiskaddr $ramdiskfile;" \
667 "bootm $loadaddr $ramdiskaddr $fdtaddr\0" \ 667 "bootm $loadaddr $ramdiskaddr $fdtaddr\0" \
668 "usbext2boot=setenv bootargs root=/dev/ram rw " \ 668 "usbext2boot=setenv bootargs root=/dev/ram rw " \
669 "console=$consoledev,$baudrate $othbootargs; " \ 669 "console=$consoledev,$baudrate $othbootargs; " \
670 "usb start;" \ 670 "usb start;" \
671 "ext2load usb 0:4 $loadaddr $bootfile;" \ 671 "ext2load usb 0:4 $loadaddr $bootfile;" \
672 "ext2load usb 0:4 $fdtaddr $fdtfile;" \ 672 "ext2load usb 0:4 $fdtaddr $fdtfile;" \
673 "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;" \ 673 "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;" \
674 "bootm $loadaddr $ramdiskaddr $fdtaddr\0" \ 674 "bootm $loadaddr $ramdiskaddr $fdtaddr\0" \
675 "norboot=setenv bootargs root=/dev/$jffs2nor rw " \ 675 "norboot=setenv bootargs root=/dev/$jffs2nor rw " \
676 "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;" \ 676 "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;" \
677 "bootm $norbootaddr - $norfdtaddr\0" \ 677 "bootm $norbootaddr - $norfdtaddr\0" \
678 "nandboot=setenv bootargs root=/dev/$jffs2nand rw rootfstype=jffs2 " \ 678 "nandboot=setenv bootargs root=/dev/$jffs2nand rw rootfstype=jffs2 " \
679 "console=$consoledev,$baudrate $othbootargs;" \ 679 "console=$consoledev,$baudrate $othbootargs;" \
680 "nand read 2000000 $nandbootaddr $nandimgsize;" \ 680 "nand read 2000000 $nandbootaddr $nandimgsize;" \
681 "nand read 3000000 $nandfdtaddr $nandfdtsize;" \ 681 "nand read 3000000 $nandfdtaddr $nandfdtsize;" \
682 "bootm 2000000 - 3000000;\0" 682 "bootm 2000000 - 3000000;\0"
683 683
684 #define CONFIG_NFSBOOTCOMMAND \ 684 #define CONFIG_NFSBOOTCOMMAND \
685 "setenv bootargs root=/dev/nfs rw " \ 685 "setenv bootargs root=/dev/nfs rw " \
686 "nfsroot=$serverip:$rootpath " \ 686 "nfsroot=$serverip:$rootpath " \
687 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ 687 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
688 "console=$consoledev,$baudrate $othbootargs;" \ 688 "console=$consoledev,$baudrate $othbootargs;" \
689 "tftp $loadaddr $bootfile;" \ 689 "tftp $loadaddr $bootfile;" \
690 "tftp $fdtaddr $fdtfile;" \ 690 "tftp $fdtaddr $fdtfile;" \
691 "bootm $loadaddr - $fdtaddr" 691 "bootm $loadaddr - $fdtaddr"
692 692
693 #define CONFIG_HDBOOT \ 693 #define CONFIG_HDBOOT \
694 "setenv bootargs root=/dev/$bdev rw rootdelay=30 " \ 694 "setenv bootargs root=/dev/$bdev rw rootdelay=30 " \
695 "console=$consoledev,$baudrate $othbootargs;" \ 695 "console=$consoledev,$baudrate $othbootargs;" \
696 "usb start;" \ 696 "usb start;" \
697 "ext2load usb 0:1 $loadaddr /boot/$bootfile;" \ 697 "ext2load usb 0:1 $loadaddr /boot/$bootfile;" \
698 "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;" \ 698 "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;" \
699 "bootm $loadaddr - $fdtaddr" 699 "bootm $loadaddr - $fdtaddr"
700 700
701 #define CONFIG_RAMBOOTCOMMAND \ 701 #define CONFIG_RAMBOOTCOMMAND \
702 "setenv bootargs root=/dev/ram rw " \ 702 "setenv bootargs root=/dev/ram rw " \
703 "console=$consoledev,$baudrate $othbootargs; " \ 703 "console=$consoledev,$baudrate $othbootargs; " \
704 "tftp $ramdiskaddr $ramdiskfile;" \ 704 "tftp $ramdiskaddr $ramdiskfile;" \
705 "tftp $loadaddr $bootfile;" \ 705 "tftp $loadaddr $bootfile;" \
706 "tftp $fdtaddr $fdtfile;" \ 706 "tftp $fdtaddr $fdtfile;" \
707 "bootm $loadaddr $ramdiskaddr $fdtaddr" 707 "bootm $loadaddr $ramdiskaddr $fdtaddr"
708 708
709 #define CONFIG_BOOTCOMMAND CONFIG_HDBOOT 709 #define CONFIG_BOOTCOMMAND CONFIG_HDBOOT
710 710
711 #endif /* __CONFIG_H */ 711 #endif /* __CONFIG_H */
712 712