Commit 63602a7cd553347666ad63d137937f3b290529e8
Committed by
Ye Li
1 parent
7118cdc00b
Exists in
smarc_8mm-imx_v2019.04_4.19.35_1.1.0
and in
1 other branch
MLK-22766-2: configs: remove the unnecessary space in mtdparts
remove the unnecessary space in imx6sx sabreauto mtdparts Signed-off-by: Han Xu <han.xu@nxp.com> (cherry picked from commit c8bbf2b43767fe7be69a0383ab426172b5083ee1)
Showing 1 changed file with 1 additions and 1 deletions Inline Diff
include/configs/mx6sxsabreauto.h
1 | /* SPDX-License-Identifier: GPL-2.0+ */ | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* | 2 | /* |
3 | * Copyright 2014 Freescale Semiconductor, Inc. | 3 | * Copyright 2014 Freescale Semiconductor, Inc. |
4 | * Copyright 2019 NXP | 4 | * Copyright 2019 NXP |
5 | * | 5 | * |
6 | * Configuration settings for the Freescale i.MX6SX Sabreauto board. | 6 | * Configuration settings for the Freescale i.MX6SX Sabreauto board. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #ifndef __CONFIG_H | 9 | #ifndef __CONFIG_H |
10 | #define __CONFIG_H | 10 | #define __CONFIG_H |
11 | 11 | ||
12 | #include "mx6_common.h" | 12 | #include "mx6_common.h" |
13 | #include "imx_env.h" | 13 | #include "imx_env.h" |
14 | 14 | ||
15 | #define CONFIG_DBG_MONITOR | 15 | #define CONFIG_DBG_MONITOR |
16 | 16 | ||
17 | /* Size of malloc() pool */ | 17 | /* Size of malloc() pool */ |
18 | #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) | 18 | #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) |
19 | 19 | ||
20 | #define CONFIG_MXC_UART | 20 | #define CONFIG_MXC_UART |
21 | #define CONFIG_MXC_UART_BASE UART1_BASE | 21 | #define CONFIG_MXC_UART_BASE UART1_BASE |
22 | 22 | ||
23 | #ifdef CONFIG_NAND_BOOT | 23 | #ifdef CONFIG_NAND_BOOT |
24 | #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(nandboot),16m(nandkernel),16m(nanddtb),16m(nandtee),-(nandrootfs) " | 24 | #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(nandboot),16m(nandkernel),16m(nanddtb),16m(nandtee),-(nandrootfs)" |
25 | #else | 25 | #else |
26 | #define MFG_NAND_PARTITION "" | 26 | #define MFG_NAND_PARTITION "" |
27 | #endif | 27 | #endif |
28 | 28 | ||
29 | #ifdef CONFIG_IMX_BOOTAUX | 29 | #ifdef CONFIG_IMX_BOOTAUX |
30 | 30 | ||
31 | /* Set to QSPI1 B flash at default */ | 31 | /* Set to QSPI1 B flash at default */ |
32 | #ifdef CONFIG_DM_SPI | 32 | #ifdef CONFIG_DM_SPI |
33 | #define CONFIG_SYS_AUXCORE_BOOTDATA 0x68000000 | 33 | #define CONFIG_SYS_AUXCORE_BOOTDATA 0x68000000 |
34 | #define SF_QSPI1_B_CS_NUM 2 | 34 | #define SF_QSPI1_B_CS_NUM 2 |
35 | #else | 35 | #else |
36 | #define CONFIG_SYS_AUXCORE_BOOTDATA 0x62000000 | 36 | #define CONFIG_SYS_AUXCORE_BOOTDATA 0x62000000 |
37 | #define SF_QSPI1_B_CS_NUM 1 | 37 | #define SF_QSPI1_B_CS_NUM 1 |
38 | #endif | 38 | #endif |
39 | 39 | ||
40 | 40 | ||
41 | #define UPDATE_M4_ENV \ | 41 | #define UPDATE_M4_ENV \ |
42 | "m4image=m4_qspi.bin\0" \ | 42 | "m4image=m4_qspi.bin\0" \ |
43 | "m4_qspi_cs="__stringify(SF_QSPI1_B_CS_NUM)"\0" \ | 43 | "m4_qspi_cs="__stringify(SF_QSPI1_B_CS_NUM)"\0" \ |
44 | "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \ | 44 | "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \ |
45 | "update_m4_from_sd=" \ | 45 | "update_m4_from_sd=" \ |
46 | "if sf probe 0:${m4_qspi_cs}; then " \ | 46 | "if sf probe 0:${m4_qspi_cs}; then " \ |
47 | "if run loadm4image; then " \ | 47 | "if run loadm4image; then " \ |
48 | "setexpr fw_sz ${filesize} + 0xffff; " \ | 48 | "setexpr fw_sz ${filesize} + 0xffff; " \ |
49 | "setexpr fw_sz ${fw_sz} / 0x10000; " \ | 49 | "setexpr fw_sz ${fw_sz} / 0x10000; " \ |
50 | "setexpr fw_sz ${fw_sz} * 0x10000; " \ | 50 | "setexpr fw_sz ${fw_sz} * 0x10000; " \ |
51 | "sf erase 0x0 ${fw_sz}; " \ | 51 | "sf erase 0x0 ${fw_sz}; " \ |
52 | "sf write ${loadaddr} 0x0 ${filesize}; " \ | 52 | "sf write ${loadaddr} 0x0 ${filesize}; " \ |
53 | "fi; " \ | 53 | "fi; " \ |
54 | "fi\0" \ | 54 | "fi\0" \ |
55 | "m4boot=sf probe 0:${m4_qspi_cs}; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" | 55 | "m4boot=sf probe 0:${m4_qspi_cs}; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" |
56 | #else | 56 | #else |
57 | #define UPDATE_M4_ENV "" | 57 | #define UPDATE_M4_ENV "" |
58 | #endif | 58 | #endif |
59 | 59 | ||
60 | 60 | ||
61 | #define CONFIG_MFG_ENV_SETTINGS \ | 61 | #define CONFIG_MFG_ENV_SETTINGS \ |
62 | CONFIG_MFG_ENV_SETTINGS_DEFAULT \ | 62 | CONFIG_MFG_ENV_SETTINGS_DEFAULT \ |
63 | "initrd_addr=0x86800000\0" \ | 63 | "initrd_addr=0x86800000\0" \ |
64 | "initrd_high=0xffffffff\0" \ | 64 | "initrd_high=0xffffffff\0" \ |
65 | "sd_dev=2\0" \ | 65 | "sd_dev=2\0" \ |
66 | "mtdparts=" MFG_NAND_PARTITION \ | 66 | "mtdparts=" MFG_NAND_PARTITION \ |
67 | "\0"\ | 67 | "\0"\ |
68 | 68 | ||
69 | #if defined(CONFIG_NAND_BOOT) | 69 | #if defined(CONFIG_NAND_BOOT) |
70 | #define CONFIG_EXTRA_ENV_SETTINGS \ | 70 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
71 | CONFIG_MFG_ENV_SETTINGS \ | 71 | CONFIG_MFG_ENV_SETTINGS \ |
72 | TEE_ENV \ | 72 | TEE_ENV \ |
73 | "tee_addr=0x84000000\0" \ | 73 | "tee_addr=0x84000000\0" \ |
74 | "panel=Hannstar-XGA\0" \ | 74 | "panel=Hannstar-XGA\0" \ |
75 | "fdt_addr=0x83000000\0" \ | 75 | "fdt_addr=0x83000000\0" \ |
76 | "fdt_high=0xffffffff\0" \ | 76 | "fdt_high=0xffffffff\0" \ |
77 | "console=ttymxc0\0" \ | 77 | "console=ttymxc0\0" \ |
78 | "bootargs=console=ttymxc0,115200 ubi.mtd=6 " \ | 78 | "bootargs=console=ttymxc0,115200 ubi.mtd=6 " \ |
79 | "root=ubi0:nandrootfs rootfstype=ubifs " \ | 79 | "root=ubi0:nandrootfs rootfstype=ubifs " \ |
80 | MFG_NAND_PARTITION \ | 80 | MFG_NAND_PARTITION \ |
81 | "\0" \ | 81 | "\0" \ |
82 | "bootcmd=nand read ${loadaddr} 0x4000000 0x800000;"\ | 82 | "bootcmd=nand read ${loadaddr} 0x4000000 0x800000;"\ |
83 | "nand read ${fdt_addr} 0x5000000 0x100000;"\ | 83 | "nand read ${fdt_addr} 0x5000000 0x100000;"\ |
84 | "if test ${tee} = yes; then " \ | 84 | "if test ${tee} = yes; then " \ |
85 | "nand read ${tee_addr} 0x6000000 0x400000;"\ | 85 | "nand read ${tee_addr} 0x6000000 0x400000;"\ |
86 | "bootm ${tee_addr} - ${fdt_addr};" \ | 86 | "bootm ${tee_addr} - ${fdt_addr};" \ |
87 | "else " \ | 87 | "else " \ |
88 | "bootz ${loadaddr} - ${fdt_addr};" \ | 88 | "bootz ${loadaddr} - ${fdt_addr};" \ |
89 | "fi\0" | 89 | "fi\0" |
90 | 90 | ||
91 | #else | 91 | #else |
92 | #define CONFIG_EXTRA_ENV_SETTINGS \ | 92 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
93 | UPDATE_M4_ENV \ | 93 | UPDATE_M4_ENV \ |
94 | CONFIG_MFG_ENV_SETTINGS \ | 94 | CONFIG_MFG_ENV_SETTINGS \ |
95 | TEE_ENV \ | 95 | TEE_ENV \ |
96 | "script=boot.scr\0" \ | 96 | "script=boot.scr\0" \ |
97 | "image=zImage\0" \ | 97 | "image=zImage\0" \ |
98 | "console=ttymxc0\0" \ | 98 | "console=ttymxc0\0" \ |
99 | "fdt_high=0xffffffff\0" \ | 99 | "fdt_high=0xffffffff\0" \ |
100 | "initrd_high=0xffffffff\0" \ | 100 | "initrd_high=0xffffffff\0" \ |
101 | "fdt_file=undefined\0" \ | 101 | "fdt_file=undefined\0" \ |
102 | "fdt_addr=0x83000000\0" \ | 102 | "fdt_addr=0x83000000\0" \ |
103 | "tee_addr=0x84000000\0" \ | 103 | "tee_addr=0x84000000\0" \ |
104 | "tee_file=uTee-6sxauto\0" \ | 104 | "tee_file=uTee-6sxauto\0" \ |
105 | "boot_fdt=try\0" \ | 105 | "boot_fdt=try\0" \ |
106 | "ip_dyn=yes\0" \ | 106 | "ip_dyn=yes\0" \ |
107 | "panel=Hannstar-XGA\0" \ | 107 | "panel=Hannstar-XGA\0" \ |
108 | "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ | 108 | "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ |
109 | "mmcpart=1\0" \ | 109 | "mmcpart=1\0" \ |
110 | "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ | 110 | "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ |
111 | "mmcautodetect=yes\0" \ | 111 | "mmcautodetect=yes\0" \ |
112 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ | 112 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ |
113 | "root=${mmcroot}\0" \ | 113 | "root=${mmcroot}\0" \ |
114 | "loadbootscript=" \ | 114 | "loadbootscript=" \ |
115 | "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | 115 | "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ |
116 | "bootscript=echo Running bootscript from mmc ...; " \ | 116 | "bootscript=echo Running bootscript from mmc ...; " \ |
117 | "source\0" \ | 117 | "source\0" \ |
118 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ | 118 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ |
119 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ | 119 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ |
120 | "loadtee=fatload mmc ${mmcdev}:${mmcpart} ${tee_addr} ${tee_file}\0" \ | 120 | "loadtee=fatload mmc ${mmcdev}:${mmcpart} ${tee_addr} ${tee_file}\0" \ |
121 | "mmcboot=echo Booting from mmc ...; " \ | 121 | "mmcboot=echo Booting from mmc ...; " \ |
122 | "run mmcargs; " \ | 122 | "run mmcargs; " \ |
123 | "if test ${tee} = yes; then " \ | 123 | "if test ${tee} = yes; then " \ |
124 | "run loadfdt; run loadtee; bootm ${tee_addr} - ${fdt_addr}; " \ | 124 | "run loadfdt; run loadtee; bootm ${tee_addr} - ${fdt_addr}; " \ |
125 | "else " \ | 125 | "else " \ |
126 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | 126 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
127 | "if run loadfdt; then " \ | 127 | "if run loadfdt; then " \ |
128 | "bootz ${loadaddr} - ${fdt_addr}; " \ | 128 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
129 | "else " \ | 129 | "else " \ |
130 | "if test ${boot_fdt} = try; then " \ | 130 | "if test ${boot_fdt} = try; then " \ |
131 | "bootz; " \ | 131 | "bootz; " \ |
132 | "else " \ | 132 | "else " \ |
133 | "echo WARN: Cannot load the DT; " \ | 133 | "echo WARN: Cannot load the DT; " \ |
134 | "fi; " \ | 134 | "fi; " \ |
135 | "fi; " \ | 135 | "fi; " \ |
136 | "else " \ | 136 | "else " \ |
137 | "bootz; " \ | 137 | "bootz; " \ |
138 | "fi; " \ | 138 | "fi; " \ |
139 | "fi;\0" \ | 139 | "fi;\0" \ |
140 | "netargs=setenv bootargs console=${console},${baudrate} " \ | 140 | "netargs=setenv bootargs console=${console},${baudrate} " \ |
141 | "root=/dev/nfs " \ | 141 | "root=/dev/nfs " \ |
142 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ | 142 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ |
143 | "netboot=echo Booting from net ...; " \ | 143 | "netboot=echo Booting from net ...; " \ |
144 | "run netargs; " \ | 144 | "run netargs; " \ |
145 | "if test ${ip_dyn} = yes; then " \ | 145 | "if test ${ip_dyn} = yes; then " \ |
146 | "setenv get_cmd dhcp; " \ | 146 | "setenv get_cmd dhcp; " \ |
147 | "else " \ | 147 | "else " \ |
148 | "setenv get_cmd tftp; " \ | 148 | "setenv get_cmd tftp; " \ |
149 | "fi; " \ | 149 | "fi; " \ |
150 | "${get_cmd} ${image}; " \ | 150 | "${get_cmd} ${image}; " \ |
151 | "if test ${tee} = yes; then " \ | 151 | "if test ${tee} = yes; then " \ |
152 | "${get_cmd} ${tee_addr} ${tee_file}; " \ | 152 | "${get_cmd} ${tee_addr} ${tee_file}; " \ |
153 | "${get_cmd} ${fdt_addr} ${fdt_file}; " \ | 153 | "${get_cmd} ${fdt_addr} ${fdt_file}; " \ |
154 | "bootm ${tee_addr} - ${fdt_addr}; " \ | 154 | "bootm ${tee_addr} - ${fdt_addr}; " \ |
155 | "else " \ | 155 | "else " \ |
156 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | 156 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
157 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ | 157 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ |
158 | "bootz ${loadaddr} - ${fdt_addr}; " \ | 158 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
159 | "else " \ | 159 | "else " \ |
160 | "if test ${boot_fdt} = try; then " \ | 160 | "if test ${boot_fdt} = try; then " \ |
161 | "bootz; " \ | 161 | "bootz; " \ |
162 | "else " \ | 162 | "else " \ |
163 | "echo WARN: Cannot load the DT; " \ | 163 | "echo WARN: Cannot load the DT; " \ |
164 | "fi; " \ | 164 | "fi; " \ |
165 | "fi; " \ | 165 | "fi; " \ |
166 | "else " \ | 166 | "else " \ |
167 | "bootz; " \ | 167 | "bootz; " \ |
168 | "fi;" \ | 168 | "fi;" \ |
169 | "fi;\0" \ | 169 | "fi;\0" \ |
170 | "findfdt="\ | 170 | "findfdt="\ |
171 | "if test $fdt_file = undefined; then " \ | 171 | "if test $fdt_file = undefined; then " \ |
172 | "setenv fdt_file imx6sx-sabreauto.dtb; " \ | 172 | "setenv fdt_file imx6sx-sabreauto.dtb; " \ |
173 | "fi;\0" \ | 173 | "fi;\0" \ |
174 | 174 | ||
175 | #define CONFIG_BOOTCOMMAND \ | 175 | #define CONFIG_BOOTCOMMAND \ |
176 | "run findfdt;" \ | 176 | "run findfdt;" \ |
177 | "mmc dev ${mmcdev}; if mmc rescan; then " \ | 177 | "mmc dev ${mmcdev}; if mmc rescan; then " \ |
178 | "if run loadbootscript; then " \ | 178 | "if run loadbootscript; then " \ |
179 | "run bootscript; " \ | 179 | "run bootscript; " \ |
180 | "else " \ | 180 | "else " \ |
181 | "if run loadimage; then " \ | 181 | "if run loadimage; then " \ |
182 | "run mmcboot; " \ | 182 | "run mmcboot; " \ |
183 | "else run netboot; " \ | 183 | "else run netboot; " \ |
184 | "fi; " \ | 184 | "fi; " \ |
185 | "fi; " \ | 185 | "fi; " \ |
186 | "else run netboot; fi" | 186 | "else run netboot; fi" |
187 | #endif | 187 | #endif |
188 | 188 | ||
189 | /* Miscellaneous configurable options */ | 189 | /* Miscellaneous configurable options */ |
190 | #define CONFIG_SYS_MEMTEST_START 0x80000000 | 190 | #define CONFIG_SYS_MEMTEST_START 0x80000000 |
191 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) | 191 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) |
192 | 192 | ||
193 | /* Physical Memory Map */ | 193 | /* Physical Memory Map */ |
194 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR | 194 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
195 | 195 | ||
196 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | 196 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
197 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | 197 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
198 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | 198 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
199 | 199 | ||
200 | #define CONFIG_SYS_INIT_SP_OFFSET \ | 200 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
201 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | 201 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
202 | #define CONFIG_SYS_INIT_SP_ADDR \ | 202 | #define CONFIG_SYS_INIT_SP_ADDR \ |
203 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | 203 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
204 | 204 | ||
205 | /* MMC Configuration */ | 205 | /* MMC Configuration */ |
206 | #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR | 206 | #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR |
207 | 207 | ||
208 | /* I2C Configs */ | 208 | /* I2C Configs */ |
209 | #define CONFIG_SYS_I2C_MXC | 209 | #define CONFIG_SYS_I2C_MXC |
210 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ | 210 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
211 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | 211 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ |
212 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ | 212 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
213 | #define CONFIG_SYS_I2C_SPEED 100000 | 213 | #define CONFIG_SYS_I2C_SPEED 100000 |
214 | 214 | ||
215 | /* NAND stuff */ | 215 | /* NAND stuff */ |
216 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | 216 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
217 | #define CONFIG_SYS_NAND_BASE 0x40000000 | 217 | #define CONFIG_SYS_NAND_BASE 0x40000000 |
218 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | 218 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
219 | #define CONFIG_SYS_NAND_ONFI_DETECTION | 219 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
220 | 220 | ||
221 | /* DMA stuff, needed for GPMI/MXS NAND support */ | 221 | /* DMA stuff, needed for GPMI/MXS NAND support */ |
222 | 222 | ||
223 | /* Network */ | 223 | /* Network */ |
224 | 224 | ||
225 | #define CONFIG_FEC_MXC | 225 | #define CONFIG_FEC_MXC |
226 | 226 | ||
227 | #define CONFIG_FEC_ENET_DEV 1 /* Use onboard ethernet as default */ | 227 | #define CONFIG_FEC_ENET_DEV 1 /* Use onboard ethernet as default */ |
228 | 228 | ||
229 | #if (CONFIG_FEC_ENET_DEV == 0) | 229 | #if (CONFIG_FEC_ENET_DEV == 0) |
230 | #define IMX_FEC_BASE ENET_BASE_ADDR | 230 | #define IMX_FEC_BASE ENET_BASE_ADDR |
231 | #define CONFIG_FEC_MXC_PHYADDR 0x1 | 231 | #define CONFIG_FEC_MXC_PHYADDR 0x1 |
232 | #ifdef CONFIG_DM_ETH | 232 | #ifdef CONFIG_DM_ETH |
233 | #define CONFIG_ETHPRIME "eth0" | 233 | #define CONFIG_ETHPRIME "eth0" |
234 | #else | 234 | #else |
235 | #define CONFIG_ETHPRIME "FEC0" | 235 | #define CONFIG_ETHPRIME "FEC0" |
236 | #endif | 236 | #endif |
237 | #elif (CONFIG_FEC_ENET_DEV == 1) | 237 | #elif (CONFIG_FEC_ENET_DEV == 1) |
238 | #define IMX_FEC_BASE ENET2_BASE_ADDR | 238 | #define IMX_FEC_BASE ENET2_BASE_ADDR |
239 | #define CONFIG_FEC_MXC_PHYADDR 0x0 | 239 | #define CONFIG_FEC_MXC_PHYADDR 0x0 |
240 | #ifdef CONFIG_DM_ETH | 240 | #ifdef CONFIG_DM_ETH |
241 | #define CONFIG_ETHPRIME "eth1" | 241 | #define CONFIG_ETHPRIME "eth1" |
242 | #else | 242 | #else |
243 | #define CONFIG_ETHPRIME "FEC1" | 243 | #define CONFIG_ETHPRIME "FEC1" |
244 | #endif | 244 | #endif |
245 | #endif | 245 | #endif |
246 | 246 | ||
247 | #define CONFIG_FEC_XCV_TYPE RGMII | 247 | #define CONFIG_FEC_XCV_TYPE RGMII |
248 | 248 | ||
249 | #define CONFIG_PHY_ATHEROS | 249 | #define CONFIG_PHY_ATHEROS |
250 | #define CONFIG_FEC_MXC_MDIO_BASE ENET_BASE_ADDR | 250 | #define CONFIG_FEC_MXC_MDIO_BASE ENET_BASE_ADDR |
251 | 251 | ||
252 | #define CONFIG_SERIAL_TAG | 252 | #define CONFIG_SERIAL_TAG |
253 | 253 | ||
254 | #ifdef CONFIG_CMD_USB | 254 | #ifdef CONFIG_CMD_USB |
255 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET | 255 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET |
256 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | 256 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
257 | #define CONFIG_MXC_USB_FLAGS 0 | 257 | #define CONFIG_MXC_USB_FLAGS 0 |
258 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 | 258 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
259 | #endif | 259 | #endif |
260 | 260 | ||
261 | #define CONFIG_IMX_THERMAL | 261 | #define CONFIG_IMX_THERMAL |
262 | 262 | ||
263 | #ifdef CONFIG_FSL_QSPI | 263 | #ifdef CONFIG_FSL_QSPI |
264 | #define CONFIG_SYS_FSL_QSPI_AHB | 264 | #define CONFIG_SYS_FSL_QSPI_AHB |
265 | #define FSL_QSPI_FLASH_SIZE SZ_32M | 265 | #define FSL_QSPI_FLASH_SIZE SZ_32M |
266 | #define FSL_QSPI_FLASH_NUM 2 | 266 | #define FSL_QSPI_FLASH_NUM 2 |
267 | #endif | 267 | #endif |
268 | 268 | ||
269 | #define CONFIG_ENV_SIZE SZ_8K | 269 | #define CONFIG_ENV_SIZE SZ_8K |
270 | 270 | ||
271 | #define CONFIG_SYS_FSL_USDHC_NUM 2 | 271 | #define CONFIG_SYS_FSL_USDHC_NUM 2 |
272 | #define CONFIG_MMCROOT "/dev/mmcblk2p2" /* USDHC3 */ | 272 | #define CONFIG_MMCROOT "/dev/mmcblk2p2" /* USDHC3 */ |
273 | #define CONFIG_SYS_MMC_ENV_DEV 2 /*USDHC3*/ | 273 | #define CONFIG_SYS_MMC_ENV_DEV 2 /*USDHC3*/ |
274 | #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ | 274 | #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ |
275 | 275 | ||
276 | #if defined(CONFIG_ENV_IS_IN_MMC) | 276 | #if defined(CONFIG_ENV_IS_IN_MMC) |
277 | #define CONFIG_ENV_OFFSET (14 * SZ_64K) | 277 | #define CONFIG_ENV_OFFSET (14 * SZ_64K) |
278 | #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) | 278 | #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) |
279 | #define CONFIG_ENV_OFFSET (896 * 1024) | 279 | #define CONFIG_ENV_OFFSET (896 * 1024) |
280 | #define CONFIG_ENV_SECT_SIZE (64 * 1024) | 280 | #define CONFIG_ENV_SECT_SIZE (64 * 1024) |
281 | #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS | 281 | #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS |
282 | #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS | 282 | #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS |
283 | #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE | 283 | #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE |
284 | #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED | 284 | #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED |
285 | #elif defined(CONFIG_ENV_IS_IN_NAND) | 285 | #elif defined(CONFIG_ENV_IS_IN_NAND) |
286 | #undef CONFIG_ENV_SIZE | 286 | #undef CONFIG_ENV_SIZE |
287 | #define CONFIG_ENV_OFFSET (60 << 20) | 287 | #define CONFIG_ENV_OFFSET (60 << 20) |
288 | #define CONFIG_ENV_SECT_SIZE (128 << 10) | 288 | #define CONFIG_ENV_SECT_SIZE (128 << 10) |
289 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE | 289 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE |
290 | #endif | 290 | #endif |
291 | 291 | ||
292 | #ifndef CONFIG_DM_PCA953X | 292 | #ifndef CONFIG_DM_PCA953X |
293 | #define CONFIG_PCA953X | 293 | #define CONFIG_PCA953X |
294 | #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} } | 294 | #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} } |
295 | #endif | 295 | #endif |
296 | 296 | ||
297 | #ifdef CONFIG_VIDEO | 297 | #ifdef CONFIG_VIDEO |
298 | #define CONFIG_VIDEO_GIS | 298 | #define CONFIG_VIDEO_GIS |
299 | #define CONFIG_VIDEO_MXS | 299 | #define CONFIG_VIDEO_MXS |
300 | #define CONFIG_VIDEO_LOGO | 300 | #define CONFIG_VIDEO_LOGO |
301 | #define CONFIG_SPLASH_SCREEN | 301 | #define CONFIG_SPLASH_SCREEN |
302 | #define CONFIG_SPLASH_SCREEN_ALIGN | 302 | #define CONFIG_SPLASH_SCREEN_ALIGN |
303 | #define CONFIG_CMD_BMP | 303 | #define CONFIG_CMD_BMP |
304 | #define CONFIG_BMP_16BPP | 304 | #define CONFIG_BMP_16BPP |
305 | #define CONFIG_VIDEO_BMP_RLE8 | 305 | #define CONFIG_VIDEO_BMP_RLE8 |
306 | #define CONFIG_VIDEO_BMP_LOGO | 306 | #define CONFIG_VIDEO_BMP_LOGO |
307 | #define CONFIG_IMX_VIDEO_SKIP | 307 | #define CONFIG_IMX_VIDEO_SKIP |
308 | #define CONFIG_SYS_CONSOLE_BG_COL 0x00 | 308 | #define CONFIG_SYS_CONSOLE_BG_COL 0x00 |
309 | #define CONFIG_SYS_CONSOLE_FG_COL 0xa0 | 309 | #define CONFIG_SYS_CONSOLE_FG_COL 0xa0 |
310 | #ifdef CONFIG_VIDEO_GIS | 310 | #ifdef CONFIG_VIDEO_GIS |
311 | #define CONFIG_VIDEO_CSI | 311 | #define CONFIG_VIDEO_CSI |
312 | #define CONFIG_VIDEO_PXP | 312 | #define CONFIG_VIDEO_PXP |
313 | #define CONFIG_VIDEO_VADC | 313 | #define CONFIG_VIDEO_VADC |
314 | #endif | 314 | #endif |
315 | #endif | 315 | #endif |
316 | 316 | ||
317 | #if defined(CONFIG_ANDROID_SUPPORT) | 317 | #if defined(CONFIG_ANDROID_SUPPORT) |
318 | #include "mx6sxsabreautoandroid.h" | 318 | #include "mx6sxsabreautoandroid.h" |
319 | #endif | 319 | #endif |
320 | 320 | ||
321 | #endif /* __CONFIG_H */ | 321 | #endif /* __CONFIG_H */ |
322 | 322 |