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Commit 66f30bf983bdc82a799d019401a88bfc720a5a05

Authored by Benoît Thébaudeau
Committed by Albert ARIBAUD
1 parent e53232250b
Exists in master and in 53 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

arm: Remove deprecated and now unused NAND SPL 

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>

Showing 3 changed files with 6 additions and 24 deletions Inline Diff

1 # 1 #
2 # (C) Copyright 2000-2002 2 # (C) Copyright 2000-2002
3 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. 3 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 # 4 #
5 # See file CREDITS for list of people who contributed to this 5 # See file CREDITS for list of people who contributed to this
6 # project. 6 # project.
7 # 7 #
8 # This program is free software; you can redistribute it and/or 8 # This program is free software; you can redistribute it and/or
9 # modify it under the terms of the GNU General Public License as 9 # modify it under the terms of the GNU General Public License as
10 # published by the Free Software Foundation; either version 2 of 10 # published by the Free Software Foundation; either version 2 of
11 # the License, or (at your option) any later version. 11 # the License, or (at your option) any later version.
12 # 12 #
13 # This program is distributed in the hope that it will be useful, 13 # This program is distributed in the hope that it will be useful,
14 # but WITHOUT ANY WARRANTY; without even the implied warranty of 14 # but WITHOUT ANY WARRANTY; without even the implied warranty of
15 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 # GNU General Public License for more details. 16 # GNU General Public License for more details.
17 # 17 #
18 # You should have received a copy of the GNU General Public License 18 # You should have received a copy of the GNU General Public License
19 # along with this program; if not, write to the Free Software 19 # along with this program; if not, write to the Free Software
20 # Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 # MA 02111-1307 USA 21 # MA 02111-1307 USA
22 # 22 #
23 23
24 CROSS_COMPILE ?= arm-linux- 24 CROSS_COMPILE ?= arm-linux-
25 25
26 ifndef CONFIG_STANDALONE_LOAD_ADDR 26 ifndef CONFIG_STANDALONE_LOAD_ADDR
27 ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),) 27 ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),)
28 CONFIG_STANDALONE_LOAD_ADDR = 0x80300000 28 CONFIG_STANDALONE_LOAD_ADDR = 0x80300000
29 else 29 else
30 CONFIG_STANDALONE_LOAD_ADDR = 0xc100000 30 CONFIG_STANDALONE_LOAD_ADDR = 0xc100000
31 endif 31 endif
32 endif 32 endif
33 33
34 # Support generic board on ARM 34 # Support generic board on ARM
35 __HAVE_ARCH_GENERIC_BOARD := y 35 __HAVE_ARCH_GENERIC_BOARD := y
36 36
37 PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__ 37 PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__
38 38
39 # Choose between ARM/Thumb instruction sets 39 # Choose between ARM/Thumb instruction sets
40 ifeq ($(CONFIG_SYS_THUMB_BUILD),y) 40 ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
41 PF_CPPFLAGS_ARM := $(call cc-option, -mthumb -mthumb-interwork,\ 41 PF_CPPFLAGS_ARM := $(call cc-option, -mthumb -mthumb-interwork,\
42 $(call cc-option,-marm,)\ 42 $(call cc-option,-marm,)\
43 $(call cc-option,-mno-thumb-interwork,)\ 43 $(call cc-option,-mno-thumb-interwork,)\
44 ) 44 )
45 else 45 else
46 PF_CPPFLAGS_ARM := $(call cc-option,-marm,) \ 46 PF_CPPFLAGS_ARM := $(call cc-option,-marm,) \
47 $(call cc-option,-mno-thumb-interwork,) 47 $(call cc-option,-mno-thumb-interwork,)
48 endif 48 endif
49 49
50 # Only test once 50 # Only test once
51 ifneq ($(CONFIG_SPL_BUILD),y) 51 ifneq ($(CONFIG_SPL_BUILD),y)
52 ALL-$(CONFIG_SYS_THUMB_BUILD) += checkthumb 52 ALL-$(CONFIG_SYS_THUMB_BUILD) += checkthumb
53 endif 53 endif
54 54
55 # Try if EABI is supported, else fall back to old API, 55 # Try if EABI is supported, else fall back to old API,
56 # i. e. for example: 56 # i. e. for example:
57 # - with ELDK 4.2 (EABI supported), use: 57 # - with ELDK 4.2 (EABI supported), use:
58 # -mabi=aapcs-linux 58 # -mabi=aapcs-linux
59 # - with ELDK 4.1 (gcc 4.x, no EABI), use: 59 # - with ELDK 4.1 (gcc 4.x, no EABI), use:
60 # -mabi=apcs-gnu 60 # -mabi=apcs-gnu
61 # - with ELDK 3.1 (gcc 3.x), use: 61 # - with ELDK 3.1 (gcc 3.x), use:
62 # -mapcs-32 62 # -mapcs-32
63 PF_CPPFLAGS_ABI := $(call cc-option,\ 63 PF_CPPFLAGS_ABI := $(call cc-option,\
64 -mabi=aapcs-linux,\ 64 -mabi=aapcs-linux,\
65 $(call cc-option,\ 65 $(call cc-option,\
66 -mapcs-32,\ 66 -mapcs-32,\
67 $(call cc-option,\ 67 $(call cc-option,\
68 -mabi=apcs-gnu,\ 68 -mabi=apcs-gnu,\
69 )\ 69 )\
70 )\ 70 )\
71 ) 71 )
72 PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARM) $(PF_CPPFLAGS_ABI) 72 PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARM) $(PF_CPPFLAGS_ABI)
73 73
74 # For EABI, make sure to provide raise() 74 # For EABI, make sure to provide raise()
75 ifneq (,$(findstring -mabi=aapcs-linux,$(PLATFORM_CPPFLAGS))) 75 ifneq (,$(findstring -mabi=aapcs-linux,$(PLATFORM_CPPFLAGS)))
76 # This file is parsed many times, so the string may get added multiple 76 # This file is parsed many times, so the string may get added multiple
77 # times. Also, the prefix needs to be different based on whether 77 # times. Also, the prefix needs to be different based on whether
78 # CONFIG_SPL_BUILD is defined or not. 'filter-out' the existing entry 78 # CONFIG_SPL_BUILD is defined or not. 'filter-out' the existing entry
79 # before adding the correct one. 79 # before adding the correct one.
80 ifdef CONFIG_SPL_BUILD 80 ifdef CONFIG_SPL_BUILD
81 PLATFORM_LIBS := $(SPLTREE)/arch/arm/lib/eabi_compat.o \ 81 PLATFORM_LIBS := $(SPLTREE)/arch/arm/lib/eabi_compat.o \
82 $(filter-out %/arch/arm/lib/eabi_compat.o, $(PLATFORM_LIBS)) 82 $(filter-out %/arch/arm/lib/eabi_compat.o, $(PLATFORM_LIBS))
83 else 83 else
84 PLATFORM_LIBS := $(OBJTREE)/arch/arm/lib/eabi_compat.o \ 84 PLATFORM_LIBS := $(OBJTREE)/arch/arm/lib/eabi_compat.o \
85 $(filter-out %/arch/arm/lib/eabi_compat.o, $(PLATFORM_LIBS)) 85 $(filter-out %/arch/arm/lib/eabi_compat.o, $(PLATFORM_LIBS))
86 endif 86 endif
87 endif 87 endif
88 88
89 # needed for relocation 89 # needed for relocation
90 ifndef CONFIG_NAND_SPL
91 LDFLAGS_u-boot += -pie 90 LDFLAGS_u-boot += -pie
92 endif
93 91
94 # 92 #
95 # FIXME: binutils versions < 2.22 have a bug in the assembler where 93 # FIXME: binutils versions < 2.22 have a bug in the assembler where
96 # branches to weak symbols can be incorrectly optimized in thumb mode 94 # branches to weak symbols can be incorrectly optimized in thumb mode
97 # to a short branch (b.n instruction) that won't reach when the symbol 95 # to a short branch (b.n instruction) that won't reach when the symbol
98 # gets preempted 96 # gets preempted
99 # 97 #
100 # http://sourceware.org/bugzilla/show_bug.cgi?id=12532 98 # http://sourceware.org/bugzilla/show_bug.cgi?id=12532
101 # 99 #
102 ifeq ($(CONFIG_SYS_THUMB_BUILD),y) 100 ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
103 ifeq ($(GAS_BUG_12532),) 101 ifeq ($(GAS_BUG_12532),)
104 export GAS_BUG_12532:=$(shell if [ $(call binutils-version) -lt 0222 ] ; \ 102 export GAS_BUG_12532:=$(shell if [ $(call binutils-version) -lt 0222 ] ; \
105 then echo y; else echo n; fi) 103 then echo y; else echo n; fi)
106 endif 104 endif
107 ifeq ($(GAS_BUG_12532),y) 105 ifeq ($(GAS_BUG_12532),y)
108 PLATFORM_RELFLAGS += -fno-optimize-sibling-calls 106 PLATFORM_RELFLAGS += -fno-optimize-sibling-calls
109 endif 107 endif
110 endif 108 endif
111 109
arch/arm/cpu/arm1176/start.S
Diff comments   View file @ 66f30bf
1 /* 1 /*
2 * armboot - Startup Code for ARM1176 CPU-core 2 * armboot - Startup Code for ARM1176 CPU-core
3 * 3 *
4 * Copyright (c) 2007 Samsung Electronics 4 * Copyright (c) 2007 Samsung Electronics
5 * 5 *
6 * Copyright (C) 2008 6 * Copyright (C) 2008
7 * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> 7 * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
8 * 8 *
9 * See file CREDITS for list of people who contributed to this 9 * See file CREDITS for list of people who contributed to this
10 * project. 10 * project.
11 * 11 *
12 * This program is free software; you can redistribute it and/or 12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as 13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of 14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version. 15 * the License, or (at your option) any later version.
16 * 16 *
17 * This program is distributed in the hope that it will be useful, 17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details. 20 * GNU General Public License for more details.
21 * 21 *
22 * You should have received a copy of the GNU General Public License 22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software 23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA 25 * MA 02111-1307 USA
26 * 26 *
27 * 2007-09-21 - Restructured codes by jsgood (jsgood.yang@samsung.com) 27 * 2007-09-21 - Restructured codes by jsgood (jsgood.yang@samsung.com)
28 * 2007-09-21 - Added MoviNAND and OneNAND boot codes by 28 * 2007-09-21 - Added MoviNAND and OneNAND boot codes by
29 * jsgood (jsgood.yang@samsung.com) 29 * jsgood (jsgood.yang@samsung.com)
30 * Base codes by scsuh (sc.suh) 30 * Base codes by scsuh (sc.suh)
31 */ 31 */
32 32
33 #include <asm-offsets.h> 33 #include <asm-offsets.h>
34 #include <config.h> 34 #include <config.h>
35 #include <version.h> 35 #include <version.h>
36 #ifdef CONFIG_ENABLE_MMU 36 #ifdef CONFIG_ENABLE_MMU
37 #include <asm/proc/domain.h> 37 #include <asm/proc/domain.h>
38 #endif 38 #endif
39 39
40 #if !defined(CONFIG_ENABLE_MMU) && !defined(CONFIG_SYS_PHY_UBOOT_BASE) 40 #if !defined(CONFIG_ENABLE_MMU) && !defined(CONFIG_SYS_PHY_UBOOT_BASE)
41 #define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE 41 #define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE
42 #endif 42 #endif
43 43
44 /* 44 /*
45 ************************************************************************* 45 *************************************************************************
46 * 46 *
47 * Jump vector table as in table 3.1 in [1] 47 * Jump vector table as in table 3.1 in [1]
48 * 48 *
49 ************************************************************************* 49 *************************************************************************
50 */ 50 */
51 51
52 .globl _start 52 .globl _start
53 _start: b reset 53 _start: b reset
54 #ifndef CONFIG_NAND_SPL 54 #ifndef CONFIG_SPL_BUILD
55 ldr pc, _undefined_instruction 55 ldr pc, _undefined_instruction
56 ldr pc, _software_interrupt 56 ldr pc, _software_interrupt
57 ldr pc, _prefetch_abort 57 ldr pc, _prefetch_abort
58 ldr pc, _data_abort 58 ldr pc, _data_abort
59 ldr pc, _not_used 59 ldr pc, _not_used
60 ldr pc, _irq 60 ldr pc, _irq
61 ldr pc, _fiq 61 ldr pc, _fiq
62 62
63 _undefined_instruction: 63 _undefined_instruction:
64 .word undefined_instruction 64 .word undefined_instruction
65 _software_interrupt: 65 _software_interrupt:
66 .word software_interrupt 66 .word software_interrupt
67 _prefetch_abort: 67 _prefetch_abort:
68 .word prefetch_abort 68 .word prefetch_abort
69 _data_abort: 69 _data_abort:
70 .word data_abort 70 .word data_abort
71 _not_used: 71 _not_used:
72 .word not_used 72 .word not_used
73 _irq: 73 _irq:
74 .word irq 74 .word irq
75 _fiq: 75 _fiq:
76 .word fiq 76 .word fiq
77 _pad: 77 _pad:
78 .word 0x12345678 /* now 16*4=64 */ 78 .word 0x12345678 /* now 16*4=64 */
79 #else 79 #else
80 . = _start + 64 80 . = _start + 64
81 #endif 81 #endif
82 82
83 .global _end_vect 83 .global _end_vect
84 _end_vect: 84 _end_vect:
85 .balignl 16,0xdeadbeef 85 .balignl 16,0xdeadbeef
86 /* 86 /*
87 ************************************************************************* 87 *************************************************************************
88 * 88 *
89 * Startup Code (reset vector) 89 * Startup Code (reset vector)
90 * 90 *
91 * do important init only if we don't start from memory! 91 * do important init only if we don't start from memory!
92 * setup Memory and board specific bits prior to relocation. 92 * setup Memory and board specific bits prior to relocation.
93 * relocate armboot to ram 93 * relocate armboot to ram
94 * setup stack 94 * setup stack
95 * 95 *
96 ************************************************************************* 96 *************************************************************************
97 */ 97 */
98 98
99 .globl _TEXT_BASE 99 .globl _TEXT_BASE
100 _TEXT_BASE: 100 _TEXT_BASE:
101 #ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */
102 .word CONFIG_SYS_TEXT_BASE
103 #else
104 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE) 101 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
105 .word CONFIG_SPL_TEXT_BASE 102 .word CONFIG_SPL_TEXT_BASE
106 #else 103 #else
107 .word CONFIG_SYS_TEXT_BASE 104 .word CONFIG_SYS_TEXT_BASE
108 #endif 105 #endif
109 #endif
110 106
111 /* 107 /*
112 * Below variable is very important because we use MMU in U-Boot. 108 * Below variable is very important because we use MMU in U-Boot.
113 * Without it, we cannot run code correctly before MMU is ON. 109 * Without it, we cannot run code correctly before MMU is ON.
114 * by scsuh. 110 * by scsuh.
115 */ 111 */
116 _TEXT_PHY_BASE: 112 _TEXT_PHY_BASE:
117 .word CONFIG_SYS_PHY_UBOOT_BASE 113 .word CONFIG_SYS_PHY_UBOOT_BASE
118 114
119 /* 115 /*
120 * These are defined in the board-specific linker script. 116 * These are defined in the board-specific linker script.
121 * Subtracting _start from them lets the linker put their 117 * Subtracting _start from them lets the linker put their
122 * relative position in the executable instead of leaving 118 * relative position in the executable instead of leaving
123 * them null. 119 * them null.
124 */ 120 */
125 121
126 .globl _bss_start_ofs 122 .globl _bss_start_ofs
127 _bss_start_ofs: 123 _bss_start_ofs:
128 .word __bss_start - _start 124 .word __bss_start - _start
129 125
130 .globl _image_copy_end_ofs 126 .globl _image_copy_end_ofs
131 _image_copy_end_ofs: 127 _image_copy_end_ofs:
132 .word __image_copy_end - _start 128 .word __image_copy_end - _start
133 129
134 .globl _bss_end_ofs 130 .globl _bss_end_ofs
135 _bss_end_ofs: 131 _bss_end_ofs:
136 .word __bss_end - _start 132 .word __bss_end - _start
137 133
138 .globl _end_ofs 134 .globl _end_ofs
139 _end_ofs: 135 _end_ofs:
140 .word _end - _start 136 .word _end - _start
141 137
142 /* IRQ stack memory (calculated at run-time) + 8 bytes */ 138 /* IRQ stack memory (calculated at run-time) + 8 bytes */
143 .globl IRQ_STACK_START_IN 139 .globl IRQ_STACK_START_IN
144 IRQ_STACK_START_IN: 140 IRQ_STACK_START_IN:
145 .word 0x0badc0de 141 .word 0x0badc0de
146 142
147 /* 143 /*
148 * the actual reset code 144 * the actual reset code
149 */ 145 */
150 146
151 reset: 147 reset:
152 /* 148 /*
153 * set the cpu to SVC32 mode 149 * set the cpu to SVC32 mode
154 */ 150 */
155 mrs r0, cpsr 151 mrs r0, cpsr
156 bic r0, r0, #0x3f 152 bic r0, r0, #0x3f
157 orr r0, r0, #0xd3 153 orr r0, r0, #0xd3
158 msr cpsr, r0 154 msr cpsr, r0
159 155
160 /* 156 /*
161 ************************************************************************* 157 *************************************************************************
162 * 158 *
163 * CPU_init_critical registers 159 * CPU_init_critical registers
164 * 160 *
165 * setup important registers 161 * setup important registers
166 * setup memory timing 162 * setup memory timing
167 * 163 *
168 ************************************************************************* 164 *************************************************************************
169 */ 165 */
170 /* 166 /*
171 * we do sys-critical inits only at reboot, 167 * we do sys-critical inits only at reboot,
172 * not when booting from ram! 168 * not when booting from ram!
173 */ 169 */
174 cpu_init_crit: 170 cpu_init_crit:
175 /* 171 /*
176 * When booting from NAND - it has definitely been a reset, so, no need 172 * When booting from NAND - it has definitely been a reset, so, no need
177 * to flush caches and disable the MMU 173 * to flush caches and disable the MMU
178 */ 174 */
179 #ifndef CONFIG_NAND_SPL 175 #ifndef CONFIG_SPL_BUILD
180 /* 176 /*
181 * flush v4 I/D caches 177 * flush v4 I/D caches
182 */ 178 */
183 mov r0, #0 179 mov r0, #0
184 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ 180 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
185 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ 181 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
186 182
187 /* 183 /*
188 * disable MMU stuff and caches 184 * disable MMU stuff and caches
189 */ 185 */
190 mrc p15, 0, r0, c1, c0, 0 186 mrc p15, 0, r0, c1, c0, 0
191 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS) 187 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
192 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM) 188 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
193 orr r0, r0, #0x00000002 @ set bit 2 (A) Align 189 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
194 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache 190 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
195 191
196 /* Prepare to disable the MMU */ 192 /* Prepare to disable the MMU */
197 adr r2, mmu_disable_phys 193 adr r2, mmu_disable_phys
198 sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE) 194 sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE)
199 b mmu_disable 195 b mmu_disable
200 196
201 .align 5 197 .align 5
202 /* Run in a single cache-line */ 198 /* Run in a single cache-line */
203 mmu_disable: 199 mmu_disable:
204 mcr p15, 0, r0, c1, c0, 0 200 mcr p15, 0, r0, c1, c0, 0
205 nop 201 nop
206 nop 202 nop
207 mov pc, r2 203 mov pc, r2
208 mmu_disable_phys: 204 mmu_disable_phys:
209 205
210 #ifdef CONFIG_DISABLE_TCM 206 #ifdef CONFIG_DISABLE_TCM
211 /* 207 /*
212 * Disable the TCMs 208 * Disable the TCMs
213 */ 209 */
214 mrc p15, 0, r0, c0, c0, 2 /* Return TCM details */ 210 mrc p15, 0, r0, c0, c0, 2 /* Return TCM details */
215 cmp r0, #0 211 cmp r0, #0
216 beq skip_tcmdisable 212 beq skip_tcmdisable
217 mov r1, #0 213 mov r1, #0
218 mov r2, #1 214 mov r2, #1
219 tst r0, r2 215 tst r0, r2
220 mcrne p15, 0, r1, c9, c1, 1 /* Disable Instruction TCM if present*/ 216 mcrne p15, 0, r1, c9, c1, 1 /* Disable Instruction TCM if present*/
221 tst r0, r2, LSL #16 217 tst r0, r2, LSL #16
222 mcrne p15, 0, r1, c9, c1, 0 /* Disable Data TCM if present*/ 218 mcrne p15, 0, r1, c9, c1, 0 /* Disable Data TCM if present*/
223 skip_tcmdisable: 219 skip_tcmdisable:
224 #endif 220 #endif
225 #endif 221 #endif
226 222
227 #ifdef CONFIG_PERIPORT_REMAP 223 #ifdef CONFIG_PERIPORT_REMAP
228 /* Peri port setup */ 224 /* Peri port setup */
229 ldr r0, =CONFIG_PERIPORT_BASE 225 ldr r0, =CONFIG_PERIPORT_BASE
230 orr r0, r0, #CONFIG_PERIPORT_SIZE 226 orr r0, r0, #CONFIG_PERIPORT_SIZE
231 mcr p15,0,r0,c15,c2,4 227 mcr p15,0,r0,c15,c2,4
232 #endif 228 #endif
233 229
234 /* 230 /*
235 * Go setup Memory and board specific bits prior to relocation. 231 * Go setup Memory and board specific bits prior to relocation.
236 */ 232 */
237 bl lowlevel_init /* go setup pll,mux,memory */ 233 bl lowlevel_init /* go setup pll,mux,memory */
238 234
239 bl _main 235 bl _main
240 236
241 /*------------------------------------------------------------------------------*/ 237 /*------------------------------------------------------------------------------*/
242 238
243 /* 239 /*
244 * void relocate_code(addr_moni) 240 * void relocate_code(addr_moni)
245 * 241 *
246 * This function relocates the monitor code. 242 * This function relocates the monitor code.
247 */ 243 */
248 .globl relocate_code 244 .globl relocate_code
249 relocate_code: 245 relocate_code:
250 mov r6, r0 /* save addr of destination */ 246 mov r6, r0 /* save addr of destination */
251 247
252 adr r0, _start 248 adr r0, _start
253 subs r9, r6, r0 /* r9 <- relocation offset */ 249 subs r9, r6, r0 /* r9 <- relocation offset */
254 beq relocate_done /* skip relocation */ 250 beq relocate_done /* skip relocation */
255 mov r1, r6 /* r1 <- scratch for copy_loop */ 251 mov r1, r6 /* r1 <- scratch for copy_loop */
256 ldr r3, _image_copy_end_ofs 252 ldr r3, _image_copy_end_ofs
257 add r2, r0, r3 /* r2 <- source end address */ 253 add r2, r0, r3 /* r2 <- source end address */
258 254
259 copy_loop: 255 copy_loop:
260 ldmia r0!, {r10-r11} /* copy from source address [r0] */ 256 ldmia r0!, {r10-r11} /* copy from source address [r0] */
261 stmia r1!, {r10-r11} /* copy to target address [r1] */ 257 stmia r1!, {r10-r11} /* copy to target address [r1] */
262 cmp r0, r2 /* until source end address [r2] */ 258 cmp r0, r2 /* until source end address [r2] */
263 blo copy_loop 259 blo copy_loop
264 260
265 #ifndef CONFIG_SPL_BUILD 261 #ifndef CONFIG_SPL_BUILD
266 /* 262 /*
267 * fix .rel.dyn relocations 263 * fix .rel.dyn relocations
268 */ 264 */
269 ldr r0, _TEXT_BASE /* r0 <- Text base */ 265 ldr r0, _TEXT_BASE /* r0 <- Text base */
270 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ 266 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
271 add r10, r10, r0 /* r10 <- sym table in FLASH */ 267 add r10, r10, r0 /* r10 <- sym table in FLASH */
272 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ 268 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
273 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */ 269 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
274 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */ 270 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
275 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */ 271 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
276 fixloop: 272 fixloop:
277 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ 273 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
278 add r0, r0, r9 /* r0 <- location to fix up in RAM */ 274 add r0, r0, r9 /* r0 <- location to fix up in RAM */
279 ldr r1, [r2, #4] 275 ldr r1, [r2, #4]
280 and r7, r1, #0xff 276 and r7, r1, #0xff
281 cmp r7, #23 /* relative fixup? */ 277 cmp r7, #23 /* relative fixup? */
282 beq fixrel 278 beq fixrel
283 cmp r7, #2 /* absolute fixup? */ 279 cmp r7, #2 /* absolute fixup? */
284 beq fixabs 280 beq fixabs
285 /* ignore unknown type of fixup */ 281 /* ignore unknown type of fixup */
286 b fixnext 282 b fixnext
287 fixabs: 283 fixabs:
288 /* absolute fix: set location to (offset) symbol value */ 284 /* absolute fix: set location to (offset) symbol value */
289 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ 285 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
290 add r1, r10, r1 /* r1 <- address of symbol in table */ 286 add r1, r10, r1 /* r1 <- address of symbol in table */
291 ldr r1, [r1, #4] /* r1 <- symbol value */ 287 ldr r1, [r1, #4] /* r1 <- symbol value */
292 add r1, r1, r9 /* r1 <- relocated sym addr */ 288 add r1, r1, r9 /* r1 <- relocated sym addr */
293 b fixnext 289 b fixnext
294 fixrel: 290 fixrel:
295 /* relative fix: increase location by offset */ 291 /* relative fix: increase location by offset */
296 ldr r1, [r0] 292 ldr r1, [r0]
297 add r1, r1, r9 293 add r1, r1, r9
298 fixnext: 294 fixnext:
299 str r1, [r0] 295 str r1, [r0]
300 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ 296 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
301 cmp r2, r3 297 cmp r2, r3
302 blo fixloop 298 blo fixloop
303 #endif 299 #endif
304 300
305 #ifdef CONFIG_ENABLE_MMU 301 #ifdef CONFIG_ENABLE_MMU
306 enable_mmu: 302 enable_mmu:
307 /* enable domain access */ 303 /* enable domain access */
308 ldr r5, =0x0000ffff 304 ldr r5, =0x0000ffff
309 mcr p15, 0, r5, c3, c0, 0 /* load domain access register */ 305 mcr p15, 0, r5, c3, c0, 0 /* load domain access register */
310 306
311 /* Set the TTB register */ 307 /* Set the TTB register */
312 ldr r0, _mmu_table_base 308 ldr r0, _mmu_table_base
313 ldr r1, =CONFIG_SYS_PHY_UBOOT_BASE 309 ldr r1, =CONFIG_SYS_PHY_UBOOT_BASE
314 ldr r2, =0xfff00000 310 ldr r2, =0xfff00000
315 bic r0, r0, r2 311 bic r0, r0, r2
316 orr r1, r0, r1 312 orr r1, r0, r1
317 mcr p15, 0, r1, c2, c0, 0 313 mcr p15, 0, r1, c2, c0, 0
318 314
319 /* Enable the MMU */ 315 /* Enable the MMU */
320 mrc p15, 0, r0, c1, c0, 0 316 mrc p15, 0, r0, c1, c0, 0
321 orr r0, r0, #1 /* Set CR_M to enable MMU */ 317 orr r0, r0, #1 /* Set CR_M to enable MMU */
322 318
323 /* Prepare to enable the MMU */ 319 /* Prepare to enable the MMU */
324 adr r1, skip_hw_init 320 adr r1, skip_hw_init
325 and r1, r1, #0x3fc 321 and r1, r1, #0x3fc
326 ldr r2, _TEXT_BASE 322 ldr r2, _TEXT_BASE
327 ldr r3, =0xfff00000 323 ldr r3, =0xfff00000
328 and r2, r2, r3 324 and r2, r2, r3
329 orr r2, r2, r1 325 orr r2, r2, r1
330 b mmu_enable 326 b mmu_enable
331 327
332 .align 5 328 .align 5
333 /* Run in a single cache-line */ 329 /* Run in a single cache-line */
334 mmu_enable: 330 mmu_enable:
335 331
336 mcr p15, 0, r0, c1, c0, 0 332 mcr p15, 0, r0, c1, c0, 0
337 nop 333 nop
338 nop 334 nop
339 mov pc, r2 335 mov pc, r2
340 skip_hw_init: 336 skip_hw_init:
341 #endif 337 #endif
342 338
343 relocate_done: 339 relocate_done:
344 340
345 bx lr 341 bx lr
346 342
347 _rel_dyn_start_ofs: 343 _rel_dyn_start_ofs:
348 .word __rel_dyn_start - _start 344 .word __rel_dyn_start - _start
349 _rel_dyn_end_ofs: 345 _rel_dyn_end_ofs:
350 .word __rel_dyn_end - _start 346 .word __rel_dyn_end - _start
351 _dynsym_start_ofs: 347 _dynsym_start_ofs:
352 .word __dynsym_start - _start 348 .word __dynsym_start - _start
353 349
354 #ifdef CONFIG_ENABLE_MMU 350 #ifdef CONFIG_ENABLE_MMU
355 _mmu_table_base: 351 _mmu_table_base:
356 .word mmu_table 352 .word mmu_table
357 #endif 353 #endif
358 354
359 .globl c_runtime_cpu_setup 355 .globl c_runtime_cpu_setup
360 c_runtime_cpu_setup: 356 c_runtime_cpu_setup:
361 357
362 mov pc, lr 358 mov pc, lr
363 359
364 #ifndef CONFIG_NAND_SPL 360 #ifndef CONFIG_SPL_BUILD
365 /* 361 /*
366 * we assume that cache operation is done before. (eg. cleanup_before_linux()) 362 * we assume that cache operation is done before. (eg. cleanup_before_linux())
367 * actually, we don't need to do anything about cache if not use d-cache in 363 * actually, we don't need to do anything about cache if not use d-cache in
368 * U-Boot. So, in this function we clean only MMU. by scsuh 364 * U-Boot. So, in this function we clean only MMU. by scsuh
369 * 365 *
370 * void theLastJump(void *kernel, int arch_num, uint boot_params); 366 * void theLastJump(void *kernel, int arch_num, uint boot_params);
371 */ 367 */
372 #ifdef CONFIG_ENABLE_MMU 368 #ifdef CONFIG_ENABLE_MMU
373 .globl theLastJump 369 .globl theLastJump
374 theLastJump: 370 theLastJump:
375 mov r9, r0 371 mov r9, r0
376 ldr r3, =0xfff00000 372 ldr r3, =0xfff00000
377 ldr r4, _TEXT_PHY_BASE 373 ldr r4, _TEXT_PHY_BASE
378 adr r5, phy_last_jump 374 adr r5, phy_last_jump
379 bic r5, r5, r3 375 bic r5, r5, r3
380 orr r5, r5, r4 376 orr r5, r5, r4
381 mov pc, r5 377 mov pc, r5
382 phy_last_jump: 378 phy_last_jump:
383 /* 379 /*
384 * disable MMU stuff 380 * disable MMU stuff
385 */ 381 */
386 mrc p15, 0, r0, c1, c0, 0 382 mrc p15, 0, r0, c1, c0, 0
387 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */ 383 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
388 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */ 384 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
389 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */ 385 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
390 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */ 386 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
391 mcr p15, 0, r0, c1, c0, 0 387 mcr p15, 0, r0, c1, c0, 0
392 388
393 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ 389 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
394 390
395 mov r0, #0 391 mov r0, #0
396 mov pc, r9 392 mov pc, r9
397 #endif 393 #endif
398 394
399 395
400 /* 396 /*
401 ************************************************************************* 397 *************************************************************************
402 * 398 *
403 * Interrupt handling 399 * Interrupt handling
404 * 400 *
405 ************************************************************************* 401 *************************************************************************
406 */ 402 */
407 @ 403 @
408 @ IRQ stack frame. 404 @ IRQ stack frame.
409 @ 405 @
410 #define S_FRAME_SIZE 72 406 #define S_FRAME_SIZE 72
411 407
412 #define S_OLD_R0 68 408 #define S_OLD_R0 68
413 #define S_PSR 64 409 #define S_PSR 64
414 #define S_PC 60 410 #define S_PC 60
415 #define S_LR 56 411 #define S_LR 56
416 #define S_SP 52 412 #define S_SP 52
417 413
418 #define S_IP 48 414 #define S_IP 48
419 #define S_FP 44 415 #define S_FP 44
420 #define S_R10 40 416 #define S_R10 40
421 #define S_R9 36 417 #define S_R9 36
422 #define S_R8 32 418 #define S_R8 32
423 #define S_R7 28 419 #define S_R7 28
424 #define S_R6 24 420 #define S_R6 24
425 #define S_R5 20 421 #define S_R5 20
426 #define S_R4 16 422 #define S_R4 16
427 #define S_R3 12 423 #define S_R3 12
428 #define S_R2 8 424 #define S_R2 8
429 #define S_R1 4 425 #define S_R1 4
430 #define S_R0 0 426 #define S_R0 0
431 427
432 #define MODE_SVC 0x13 428 #define MODE_SVC 0x13
433 #define I_BIT 0x80 429 #define I_BIT 0x80
434 430
435 /* 431 /*
436 * use bad_save_user_regs for abort/prefetch/undef/swi ... 432 * use bad_save_user_regs for abort/prefetch/undef/swi ...
437 */ 433 */
438 434
439 .macro bad_save_user_regs 435 .macro bad_save_user_regs
440 /* carve out a frame on current user stack */ 436 /* carve out a frame on current user stack */
441 sub sp, sp, #S_FRAME_SIZE 437 sub sp, sp, #S_FRAME_SIZE
442 /* Save user registers (now in svc mode) r0-r12 */ 438 /* Save user registers (now in svc mode) r0-r12 */
443 stmia sp, {r0 - r12} 439 stmia sp, {r0 - r12}
444 440
445 ldr r2, IRQ_STACK_START_IN 441 ldr r2, IRQ_STACK_START_IN
446 /* get values for "aborted" pc and cpsr (into parm regs) */ 442 /* get values for "aborted" pc and cpsr (into parm regs) */
447 ldmia r2, {r2 - r3} 443 ldmia r2, {r2 - r3}
448 /* grab pointer to old stack */ 444 /* grab pointer to old stack */
449 add r0, sp, #S_FRAME_SIZE 445 add r0, sp, #S_FRAME_SIZE
450 446
451 add r5, sp, #S_SP 447 add r5, sp, #S_SP
452 mov r1, lr 448 mov r1, lr
453 /* save sp_SVC, lr_SVC, pc, cpsr */ 449 /* save sp_SVC, lr_SVC, pc, cpsr */
454 stmia r5, {r0 - r3} 450 stmia r5, {r0 - r3}
455 /* save current stack into r0 (param register) */ 451 /* save current stack into r0 (param register) */
456 mov r0, sp 452 mov r0, sp
457 .endm 453 .endm
458 454
459 .macro get_bad_stack 455 .macro get_bad_stack
460 ldr r13, IRQ_STACK_START_IN @ setup our mode stack 456 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
461 457
462 /* save caller lr in position 0 of saved stack */ 458 /* save caller lr in position 0 of saved stack */
463 str lr, [r13] 459 str lr, [r13]
464 /* get the spsr */ 460 /* get the spsr */
465 mrs lr, spsr 461 mrs lr, spsr
466 /* save spsr in position 1 of saved stack */ 462 /* save spsr in position 1 of saved stack */
467 str lr, [r13, #4] 463 str lr, [r13, #4]
468 464
469 /* prepare SVC-Mode */ 465 /* prepare SVC-Mode */
470 mov r13, #MODE_SVC 466 mov r13, #MODE_SVC
471 @ msr spsr_c, r13 467 @ msr spsr_c, r13
472 /* switch modes, make sure moves will execute */ 468 /* switch modes, make sure moves will execute */
473 msr spsr, r13 469 msr spsr, r13
474 /* capture return pc */ 470 /* capture return pc */
475 mov lr, pc 471 mov lr, pc
476 /* jump to next instruction & switch modes. */ 472 /* jump to next instruction & switch modes. */
477 movs pc, lr 473 movs pc, lr
478 .endm 474 .endm
479 475
480 .macro get_bad_stack_swi 476 .macro get_bad_stack_swi
481 /* space on current stack for scratch reg. */ 477 /* space on current stack for scratch reg. */
482 sub r13, r13, #4 478 sub r13, r13, #4
483 /* save R0's value. */ 479 /* save R0's value. */
484 str r0, [r13] 480 str r0, [r13]
485 ldr r13, IRQ_STACK_START_IN @ setup our mode stack 481 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
486 /* save caller lr in position 0 of saved stack */ 482 /* save caller lr in position 0 of saved stack */
487 str lr, [r0] 483 str lr, [r0]
488 /* get the spsr */ 484 /* get the spsr */
489 mrs r0, spsr 485 mrs r0, spsr
490 /* save spsr in position 1 of saved stack */ 486 /* save spsr in position 1 of saved stack */
491 str lr, [r0, #4] 487 str lr, [r0, #4]
492 /* restore r0 */ 488 /* restore r0 */
493 ldr r0, [r13] 489 ldr r0, [r13]
494 /* pop stack entry */ 490 /* pop stack entry */
495 add r13, r13, #4 491 add r13, r13, #4
496 .endm 492 .endm
497 493
498 /* 494 /*
499 * exception handlers 495 * exception handlers
500 */ 496 */
501 .align 5 497 .align 5
502 undefined_instruction: 498 undefined_instruction:
503 get_bad_stack 499 get_bad_stack
504 bad_save_user_regs 500 bad_save_user_regs
505 bl do_undefined_instruction 501 bl do_undefined_instruction
506 502
507 .align 5 503 .align 5
508 software_interrupt: 504 software_interrupt:
509 get_bad_stack_swi 505 get_bad_stack_swi
510 bad_save_user_regs 506 bad_save_user_regs
511 bl do_software_interrupt 507 bl do_software_interrupt
512 508
513 .align 5 509 .align 5
514 prefetch_abort: 510 prefetch_abort:
515 get_bad_stack 511 get_bad_stack
516 bad_save_user_regs 512 bad_save_user_regs
517 bl do_prefetch_abort 513 bl do_prefetch_abort
518 514
519 .align 5 515 .align 5
520 data_abort: 516 data_abort:
521 get_bad_stack 517 get_bad_stack
522 bad_save_user_regs 518 bad_save_user_regs
523 bl do_data_abort 519 bl do_data_abort
524 520
525 .align 5 521 .align 5
526 not_used: 522 not_used:
527 get_bad_stack 523 get_bad_stack
528 bad_save_user_regs 524 bad_save_user_regs
529 bl do_not_used 525 bl do_not_used
530 526
531 .align 5 527 .align 5
532 irq: 528 irq:
533 get_bad_stack 529 get_bad_stack
534 bad_save_user_regs 530 bad_save_user_regs
535 bl do_irq 531 bl do_irq
536 532
537 .align 5 533 .align 5
538 fiq: 534 fiq:
539 get_bad_stack 535 get_bad_stack
540 bad_save_user_regs 536 bad_save_user_regs
541 bl do_fiq 537 bl do_fiq
542 #endif /* CONFIG_NAND_SPL */ 538 #endif /* CONFIG_SPL_BUILD */
543 539
1 /* 1 /*
2 * crt0 - C-runtime startup Code for ARM U-Boot 2 * crt0 - C-runtime startup Code for ARM U-Boot
3 * 3 *
4 * Copyright (c) 2012 Albert ARIBAUD <albert.u.boot@aribaud.net> 4 * Copyright (c) 2012 Albert ARIBAUD <albert.u.boot@aribaud.net>
5 * 5 *
6 * See file CREDITS for list of people who contributed to this 6 * See file CREDITS for list of people who contributed to this
7 * project. 7 * project.
8 * 8 *
9 * This program is free software; you can redistribute it and/or 9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as 10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of 11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version. 12 * the License, or (at your option) any later version.
13 * 13 *
14 * This program is distributed in the hope that it will be useful, 14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details. 17 * GNU General Public License for more details.
18 * 18 *
19 * You should have received a copy of the GNU General Public License 19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software 20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA 22 * MA 02111-1307 USA
23 */ 23 */
24 24
25 #include <config.h> 25 #include <config.h>
26 #include <asm-offsets.h> 26 #include <asm-offsets.h>
27 #include <linux/linkage.h> 27 #include <linux/linkage.h>
28 28
29 /* 29 /*
30 * This file handles the target-independent stages of the U-Boot 30 * This file handles the target-independent stages of the U-Boot
31 * start-up where a C runtime environment is needed. Its entry point 31 * start-up where a C runtime environment is needed. Its entry point
32 * is _main and is branched into from the target's start.S file. 32 * is _main and is branched into from the target's start.S file.
33 * 33 *
34 * _main execution sequence is: 34 * _main execution sequence is:
35 * 35 *
36 * 1. Set up initial environment for calling board_init_f(). 36 * 1. Set up initial environment for calling board_init_f().
37 * This environment only provides a stack and a place to store 37 * This environment only provides a stack and a place to store
38 * the GD ('global data') structure, both located in some readily 38 * the GD ('global data') structure, both located in some readily
39 * available RAM (SRAM, locked cache...). In this context, VARIABLE 39 * available RAM (SRAM, locked cache...). In this context, VARIABLE
40 * global data, initialized or not (BSS), are UNAVAILABLE; only 40 * global data, initialized or not (BSS), are UNAVAILABLE; only
41 * CONSTANT initialized data are available. 41 * CONSTANT initialized data are available.
42 * 42 *
43 * 2. Call board_init_f(). This function prepares the hardware for 43 * 2. Call board_init_f(). This function prepares the hardware for
44 * execution from system RAM (DRAM, DDR...) As system RAM may not 44 * execution from system RAM (DRAM, DDR...) As system RAM may not
45 * be available yet, , board_init_f() must use the current GD to 45 * be available yet, , board_init_f() must use the current GD to
46 * store any data which must be passed on to later stages. These 46 * store any data which must be passed on to later stages. These
47 * data include the relocation destination, the future stack, and 47 * data include the relocation destination, the future stack, and
48 * the future GD location. 48 * the future GD location.
49 * 49 *
50 * (the following applies only to non-SPL builds) 50 * (the following applies only to non-SPL builds)
51 * 51 *
52 * 3. Set up intermediate environment where the stack and GD are the 52 * 3. Set up intermediate environment where the stack and GD are the
53 * ones allocated by board_init_f() in system RAM, but BSS and 53 * ones allocated by board_init_f() in system RAM, but BSS and
54 * initialized non-const data are still not available. 54 * initialized non-const data are still not available.
55 * 55 *
56 * 4. Call relocate_code(). This function relocates U-Boot from its 56 * 4. Call relocate_code(). This function relocates U-Boot from its
57 * current location into the relocation destination computed by 57 * current location into the relocation destination computed by
58 * board_init_f(). 58 * board_init_f().
59 * 59 *
60 * 5. Set up final environment for calling board_init_r(). This 60 * 5. Set up final environment for calling board_init_r(). This
61 * environment has BSS (initialized to 0), initialized non-const 61 * environment has BSS (initialized to 0), initialized non-const
62 * data (initialized to their intended value), and stack in system 62 * data (initialized to their intended value), and stack in system
63 * RAM. GD has retained values set by board_init_f(). Some CPUs 63 * RAM. GD has retained values set by board_init_f(). Some CPUs
64 * have some work left to do at this point regarding memory, so 64 * have some work left to do at this point regarding memory, so
65 * call c_runtime_cpu_setup. 65 * call c_runtime_cpu_setup.
66 * 66 *
67 * 6. Branch to either nand_boot() or board_init_r(). 67 * 6. Branch to board_init_r().
68 */ 68 */
69 69
70 /* 70 /*
71 * entry point of crt0 sequence 71 * entry point of crt0 sequence
72 */ 72 */
73 73
74 ENTRY(_main) 74 ENTRY(_main)
75 75
76 /* 76 /*
77 * Set up initial C runtime environment and call board_init_f(0). 77 * Set up initial C runtime environment and call board_init_f(0).
78 */ 78 */
79 79
80 #if defined(CONFIG_NAND_SPL) 80 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
81 /* deprecated, use instead CONFIG_SPL_BUILD */
82 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
83 #elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
84 ldr sp, =(CONFIG_SPL_STACK) 81 ldr sp, =(CONFIG_SPL_STACK)
85 #else 82 #else
86 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) 83 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
87 #endif 84 #endif
88 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ 85 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
89 sub sp, #GD_SIZE /* allocate one GD above SP */ 86 sub sp, #GD_SIZE /* allocate one GD above SP */
90 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ 87 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
91 mov r8, sp /* GD is above SP */ 88 mov r8, sp /* GD is above SP */
92 mov r0, #0 89 mov r0, #0
93 bl board_init_f 90 bl board_init_f
94 91
95 #if ! defined(CONFIG_SPL_BUILD) 92 #if ! defined(CONFIG_SPL_BUILD)
96 93
97 /* 94 /*
98 * Set up intermediate environment (new sp and gd) and call 95 * Set up intermediate environment (new sp and gd) and call
99 * relocate_code(addr_moni). Trick here is that we'll return 96 * relocate_code(addr_moni). Trick here is that we'll return
100 * 'here' but relocated. 97 * 'here' but relocated.
101 */ 98 */
102 99
103 ldr sp, [r8, #GD_START_ADDR_SP] /* r8 = gd->start_addr_sp */ 100 ldr sp, [r8, #GD_START_ADDR_SP] /* r8 = gd->start_addr_sp */
104 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ 101 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
105 ldr r8, [r8, #GD_BD] /* r8 = gd->bd */ 102 ldr r8, [r8, #GD_BD] /* r8 = gd->bd */
106 sub r8, r8, #GD_SIZE /* new GD is below bd */ 103 sub r8, r8, #GD_SIZE /* new GD is below bd */
107 104
108 adr lr, here 105 adr lr, here
109 ldr r0, [r8, #GD_RELOC_OFF] /* lr = gd->start_addr_sp */ 106 ldr r0, [r8, #GD_RELOC_OFF] /* lr = gd->start_addr_sp */
110 add lr, lr, r0 107 add lr, lr, r0
111 ldr r0, [r8, #GD_RELOCADDR] /* r0 = gd->relocaddr */ 108 ldr r0, [r8, #GD_RELOCADDR] /* r0 = gd->relocaddr */
112 b relocate_code 109 b relocate_code
113 here: 110 here:
114 111
115 /* Set up final (full) environment */ 112 /* Set up final (full) environment */
116 113
117 bl c_runtime_cpu_setup /* we still call old routine here */ 114 bl c_runtime_cpu_setup /* we still call old routine here */
118 115
119 ldr r0, =__bss_start /* this is auto-relocated! */ 116 ldr r0, =__bss_start /* this is auto-relocated! */
120 ldr r1, =__bss_end /* this is auto-relocated! */ 117 ldr r1, =__bss_end /* this is auto-relocated! */
121 118
122 mov r2, #0x00000000 /* prepare zero to clear BSS */ 119 mov r2, #0x00000000 /* prepare zero to clear BSS */
123 120
124 clbss_l:cmp r0, r1 /* while not at end of BSS */ 121 clbss_l:cmp r0, r1 /* while not at end of BSS */
125 strlo r2, [r0] /* clear 32-bit BSS word */ 122 strlo r2, [r0] /* clear 32-bit BSS word */
126 addlo r0, r0, #4 /* move to next */ 123 addlo r0, r0, #4 /* move to next */
127 blo clbss_l 124 blo clbss_l
128 125
129 bl coloured_LED_init 126 bl coloured_LED_init
130 bl red_led_on 127 bl red_led_on
131 128
132 #if defined(CONFIG_NAND_SPL)
133
134 /* call _nand_boot() */
135 ldr pc, =nand_boot
136
137 #else
138
139 /* call board_init_r(gd_t *id, ulong dest_addr) */ 129 /* call board_init_r(gd_t *id, ulong dest_addr) */
140 mov r0, r8 /* gd_t */ 130 mov r0, r8 /* gd_t */
141 ldr r1, [r8, #GD_RELOCADDR] /* dest_addr */ 131 ldr r1, [r8, #GD_RELOCADDR] /* dest_addr */
142 /* call board_init_r */ 132 /* call board_init_r */
143 ldr pc, =board_init_r /* this is auto-relocated! */ 133 ldr pc, =board_init_r /* this is auto-relocated! */
144
145 #endif
146 134
147 /* we should not return here. */ 135 /* we should not return here. */
148 136
149 #endif 137 #endif
150 138
151 ENDPROC(_main) 139 ENDPROC(_main)
152 140