Eric Lee / smarc-uboot

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Commit 68ccab51936d92551e3e65944af172ad64ca2ca9

Authored by Tom Rini
1 parent 29cb2b3b90
Exists in smarc_8mq_lf_v2020.04 and in 17 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

omap3: Migrate CONFIG_OMAP3_GPIO_X to Kconfig 

The symbols CONFIG_OMAP3_GPIO_X control if we enable the clocks for a
given GPIO bank in U-Boot.  select the required banks for each target.
In some cases we need to also migrate from CONFIG_USB_EHCI (deprecated,
in include/configs/) to CONFIG_USB_EHCI_HCD as we only require the GPIO
bank to be enabled if USB is also enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>

Showing 20 changed files with 58 additions and 73 deletions Inline Diff

arch/arm/mach-omap2/omap3/Kconfig
Diff comments   View file @ 68ccab5
1 if OMAP34XX 1 if OMAP34XX
2 2
3 # We only enable the clocks for the GPIO banks that a given board requies.
4 config OMAP3_GPIO_2
5 bool
6
7 config OMAP3_GPIO_3
8 bool
9
10 config OMAP3_GPIO_4
11 bool
12
13 config OMAP3_GPIO_5
14 bool
15
16 config OMAP3_GPIO_6
17 bool
18
3 choice 19 choice
4 prompt "OMAP3 board select" 20 prompt "OMAP3 board select"
5 optional 21 optional
6 22
7 config TARGET_AM3517_EVM 23 config TARGET_AM3517_EVM
8 bool "AM3517 EVM" 24 bool "AM3517 EVM"
9 25
10 config TARGET_MT_VENTOUX 26 config TARGET_MT_VENTOUX
11 bool "TeeJet Mt.Ventoux" 27 bool "TeeJet Mt.Ventoux"
28 select OMAP3_GPIO_4
29 select OMAP3_GPIO_5 if USB_EHCI_HCD
12 30
13 config TARGET_OMAP3_BEAGLE 31 config TARGET_OMAP3_BEAGLE
14 bool "TI OMAP3 BeagleBoard" 32 bool "TI OMAP3 BeagleBoard"
15 select DM 33 select DM
16 select DM_SERIAL 34 select DM_SERIAL
17 select DM_GPIO 35 select DM_GPIO
36 select OMAP3_GPIO_5
37 select OMAP3_GPIO_6
18 38
19 config TARGET_CM_T35 39 config TARGET_CM_T35
20 bool "CompuLab CM-T3530 and CM-T3730 boards" 40 bool "CompuLab CM-T3530 and CM-T3730 boards"
41 select OMAP3_GPIO_2
42 select OMAP3_GPIO_5
43 select OMAP3_GPIO_6 if LED_STATUS
21 44
22 config TARGET_CM_T3517 45 config TARGET_CM_T3517
23 bool "CompuLab CM-T3517 boards" 46 bool "CompuLab CM-T3517 boards"
47 select OMAP3_GPIO_2
48 select OMAP3_GPIO_5
49 select OMAP3_GPIO_6 if LED_STATUS
24 50
25 config TARGET_DEVKIT8000 51 config TARGET_DEVKIT8000
26 bool "TimLL OMAP3 Devkit8000" 52 bool "TimLL OMAP3 Devkit8000"
27 select DM 53 select DM
28 select DM_SERIAL 54 select DM_SERIAL
29 select DM_GPIO 55 select DM_GPIO
30 56
31 config TARGET_OMAP3_EVM 57 config TARGET_OMAP3_EVM
32 bool "TI OMAP3 EVM" 58 bool "TI OMAP3 EVM"
33 59
34 config TARGET_OMAP3_IGEP00X0 60 config TARGET_OMAP3_IGEP00X0
35 bool "IGEP" 61 bool "IGEP"
36 select DM 62 select DM
37 select DM_SERIAL 63 select DM_SERIAL
38 select DM_GPIO 64 select DM_GPIO
65 select OMAP3_GPIO_3
66 select OMAP3_GPIO_5
67 select OMAP3_GPIO_6
39 68
40 config TARGET_OMAP3_OVERO 69 config TARGET_OMAP3_OVERO
41 bool "OMAP35xx Gumstix Overo" 70 bool "OMAP35xx Gumstix Overo"
42 select DM 71 select DM
43 select DM_SERIAL 72 select DM_SERIAL
44 select DM_GPIO 73 select DM_GPIO
74 select OMAP3_GPIO_2
75 select OMAP3_GPIO_3
76 select OMAP3_GPIO_4
77 select OMAP3_GPIO_5
78 select OMAP3_GPIO_6
45 79
46 config TARGET_OMAP3_ZOOM1 80 config TARGET_OMAP3_ZOOM1
47 bool "TI Zoom1" 81 bool "TI Zoom1"
48 select DM 82 select DM
49 select DM_SERIAL 83 select DM_SERIAL
50 select DM_GPIO 84 select DM_GPIO
51 85
52 config TARGET_AM3517_CRANE 86 config TARGET_AM3517_CRANE
53 bool "am3517_crane" 87 bool "am3517_crane"
54 88
55 config TARGET_OMAP3_PANDORA 89 config TARGET_OMAP3_PANDORA
56 bool "OMAP3 Pandora" 90 bool "OMAP3 Pandora"
91 select OMAP3_GPIO_4
92 select OMAP3_GPIO_6
57 93
58 config TARGET_ECO5PK 94 config TARGET_ECO5PK
59 bool "ECO5PK" 95 bool "ECO5PK"
96 select OMAP3_GPIO_5 if USB_EHCI_HCD
60 97
61 config TARGET_TRICORDER 98 config TARGET_TRICORDER
62 bool "Tricorder" 99 bool "Tricorder"
100 select OMAP3_GPIO_2
63 101
64 config TARGET_MCX 102 config TARGET_MCX
65 bool "MCX" 103 bool "MCX"
66 select BOARD_LATE_INIT 104 select BOARD_LATE_INIT
105 select OMAP3_GPIO_2 if USB_EHCI_HCD
106 select OMAP3_GPIO_5 if USB_EHCI_HCD
67 107
68 config TARGET_OMAP3_LOGIC 108 config TARGET_OMAP3_LOGIC
69 bool "OMAP3 Logic" 109 bool "OMAP3 Logic"
70 select BOARD_LATE_INIT 110 select BOARD_LATE_INIT
71 select DM 111 select DM
72 select DM_SERIAL 112 select DM_SERIAL
73 select DM_GPIO 113 select DM_GPIO
114 select OMAP3_GPIO_4
115 select OMAP3_GPIO_6
74 116
75 config TARGET_NOKIA_RX51 117 config TARGET_NOKIA_RX51
76 bool "Nokia RX51" 118 bool "Nokia RX51"
77 119
78 config TARGET_TAO3530 120 config TARGET_TAO3530
79 bool "TAO3530" 121 bool "TAO3530"
122 select OMAP3_GPIO_2
123 select OMAP3_GPIO_3
124 select OMAP3_GPIO_4
125 select OMAP3_GPIO_5
126 select OMAP3_GPIO_6
80 127
81 config TARGET_TWISTER 128 config TARGET_TWISTER
82 bool "Twister" 129 bool "Twister"
130 select OMAP3_GPIO_2
131 select OMAP3_GPIO_5 if USB_EHCI_HCD
83 132
84 config TARGET_OMAP3_CAIRO 133 config TARGET_OMAP3_CAIRO
85 bool "QUIPOS CAIRO" 134 bool "QUIPOS CAIRO"
86 select DM 135 select DM
87 select DM_SERIAL 136 select DM_SERIAL
88 select DM_GPIO 137 select DM_GPIO
89 138
90 config TARGET_SNIPER 139 config TARGET_SNIPER
91 bool "LG Optimus Black" 140 bool "LG Optimus Black"
92 select DM 141 select DM
93 select DM_SERIAL 142 select DM_SERIAL
94 select DM_GPIO 143 select DM_GPIO
144 select OMAP3_GPIO_2
145 select OMAP3_GPIO_3
146 select OMAP3_GPIO_4
147 select OMAP3_GPIO_5
148 select OMAP3_GPIO_6
95 149
96 endchoice 150 endchoice
97 151
98 config SYS_SOC 152 config SYS_SOC
99 default "omap3" 153 default "omap3"
100 154
101 source "board/logicpd/am3517evm/Kconfig" 155 source "board/logicpd/am3517evm/Kconfig"
102 source "board/teejet/mt_ventoux/Kconfig" 156 source "board/teejet/mt_ventoux/Kconfig"
103 source "board/ti/beagle/Kconfig" 157 source "board/ti/beagle/Kconfig"
104 source "board/compulab/cm_t35/Kconfig" 158 source "board/compulab/cm_t35/Kconfig"
105 source "board/compulab/cm_t3517/Kconfig" 159 source "board/compulab/cm_t3517/Kconfig"
106 source "board/timll/devkit8000/Kconfig" 160 source "board/timll/devkit8000/Kconfig"
107 source "board/ti/evm/Kconfig" 161 source "board/ti/evm/Kconfig"
108 source "board/isee/igep00x0/Kconfig" 162 source "board/isee/igep00x0/Kconfig"
109 source "board/overo/Kconfig" 163 source "board/overo/Kconfig"
110 source "board/logicpd/zoom1/Kconfig" 164 source "board/logicpd/zoom1/Kconfig"
111 source "board/ti/am3517crane/Kconfig" 165 source "board/ti/am3517crane/Kconfig"
112 source "board/pandora/Kconfig" 166 source "board/pandora/Kconfig"
113 source "board/8dtech/eco5pk/Kconfig" 167 source "board/8dtech/eco5pk/Kconfig"
114 source "board/corscience/tricorder/Kconfig" 168 source "board/corscience/tricorder/Kconfig"
115 source "board/htkw/mcx/Kconfig" 169 source "board/htkw/mcx/Kconfig"
116 source "board/logicpd/omap3som/Kconfig" 170 source "board/logicpd/omap3som/Kconfig"
117 source "board/nokia/rx51/Kconfig" 171 source "board/nokia/rx51/Kconfig"
118 source "board/technexion/tao3530/Kconfig" 172 source "board/technexion/tao3530/Kconfig"
119 source "board/technexion/twister/Kconfig" 173 source "board/technexion/twister/Kconfig"
120 source "board/quipos/cairo/Kconfig" 174 source "board/quipos/cairo/Kconfig"
121 source "board/lg/sniper/Kconfig" 175 source "board/lg/sniper/Kconfig"
122 176
123 endif 177 endif
124 178
configs/eco5pk_defconfig
Diff comments   View file @ 68ccab5
1 CONFIG_ARM=y 1 CONFIG_ARM=y
2 # CONFIG_SYS_THUMB_BUILD is not set 2 # CONFIG_SYS_THUMB_BUILD is not set
3 CONFIG_ARCH_OMAP2PLUS=y 3 CONFIG_ARCH_OMAP2PLUS=y
4 CONFIG_OMAP34XX=y 4 CONFIG_OMAP34XX=y
5 CONFIG_TARGET_ECO5PK=y 5 CONFIG_TARGET_ECO5PK=y
6 CONFIG_BOOTDELAY=10 6 CONFIG_BOOTDELAY=10
7 CONFIG_SPL=y 7 CONFIG_SPL=y
8 # CONFIG_SPL_EXT_SUPPORT is not set 8 # CONFIG_SPL_EXT_SUPPORT is not set
9 CONFIG_HUSH_PARSER=y 9 CONFIG_HUSH_PARSER=y
10 CONFIG_SYS_PROMPT="ECO5-PK # " 10 CONFIG_SYS_PROMPT="ECO5-PK # "
11 # CONFIG_CMD_IMLS is not set 11 # CONFIG_CMD_IMLS is not set
12 # CONFIG_CMD_FLASH is not set 12 # CONFIG_CMD_FLASH is not set
13 CONFIG_CMD_MMC=y 13 CONFIG_CMD_MMC=y
14 CONFIG_CMD_I2C=y 14 CONFIG_CMD_I2C=y
15 CONFIG_CMD_GPIO=y 15 CONFIG_CMD_GPIO=y
16 # CONFIG_CMD_SETEXPR is not set 16 # CONFIG_CMD_SETEXPR is not set
17 CONFIG_CMD_DHCP=y 17 CONFIG_CMD_DHCP=y
18 CONFIG_CMD_MII=y 18 CONFIG_CMD_MII=y
19 CONFIG_CMD_PING=y 19 CONFIG_CMD_PING=y
20 CONFIG_CMD_CACHE=y 20 CONFIG_CMD_CACHE=y
21 CONFIG_CMD_EXT2=y 21 CONFIG_CMD_EXT2=y
22 CONFIG_CMD_FAT=y 22 CONFIG_CMD_FAT=y
23 CONFIG_CMD_UBI=y 23 CONFIG_CMD_UBI=y
24 CONFIG_MMC_OMAP_HS=y 24 CONFIG_MMC_OMAP_HS=y
25 CONFIG_SYS_NS16550=y 25 CONFIG_SYS_NS16550=y
26 CONFIG_USB=y 26 CONFIG_USB=y
27 CONFIG_USB_EHCI_HCD=y
27 CONFIG_USB_STORAGE=y 28 CONFIG_USB_STORAGE=y
28 CONFIG_OF_LIBFDT=y 29 CONFIG_OF_LIBFDT=y
29 30
configs/mcx_defconfig
Diff comments   View file @ 68ccab5
1 CONFIG_ARM=y 1 CONFIG_ARM=y
2 # CONFIG_SYS_THUMB_BUILD is not set 2 # CONFIG_SYS_THUMB_BUILD is not set
3 CONFIG_ARCH_OMAP2PLUS=y 3 CONFIG_ARCH_OMAP2PLUS=y
4 # CONFIG_SPL_GPIO_SUPPORT is not set 4 # CONFIG_SPL_GPIO_SUPPORT is not set
5 CONFIG_OMAP34XX=y 5 CONFIG_OMAP34XX=y
6 CONFIG_TARGET_MCX=y 6 CONFIG_TARGET_MCX=y
7 CONFIG_VIDEO=y 7 CONFIG_VIDEO=y
8 CONFIG_BOOTDELAY=3 8 CONFIG_BOOTDELAY=3
9 # CONFIG_CONSOLE_MUX is not set 9 # CONFIG_CONSOLE_MUX is not set
10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y 10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
11 CONFIG_SPL=y 11 CONFIG_SPL=y
12 # CONFIG_SPL_EXT_SUPPORT is not set 12 # CONFIG_SPL_EXT_SUPPORT is not set
13 CONFIG_HUSH_PARSER=y 13 CONFIG_HUSH_PARSER=y
14 CONFIG_SYS_PROMPT="mcx # " 14 CONFIG_SYS_PROMPT="mcx # "
15 # CONFIG_CMD_IMI is not set 15 # CONFIG_CMD_IMI is not set
16 # CONFIG_CMD_IMLS is not set 16 # CONFIG_CMD_IMLS is not set
17 # CONFIG_CMD_FLASH is not set 17 # CONFIG_CMD_FLASH is not set
18 CONFIG_CMD_MMC=y 18 CONFIG_CMD_MMC=y
19 CONFIG_CMD_I2C=y 19 CONFIG_CMD_I2C=y
20 CONFIG_CMD_USB=y 20 CONFIG_CMD_USB=y
21 # CONFIG_CMD_FPGA is not set 21 # CONFIG_CMD_FPGA is not set
22 CONFIG_CMD_GPIO=y 22 CONFIG_CMD_GPIO=y
23 # CONFIG_CMD_SETEXPR is not set 23 # CONFIG_CMD_SETEXPR is not set
24 CONFIG_CMD_DHCP=y 24 CONFIG_CMD_DHCP=y
25 CONFIG_CMD_MII=y 25 CONFIG_CMD_MII=y
26 CONFIG_CMD_PING=y 26 CONFIG_CMD_PING=y
27 CONFIG_CMD_BMP=y 27 CONFIG_CMD_BMP=y
28 CONFIG_CMD_CACHE=y 28 CONFIG_CMD_CACHE=y
29 CONFIG_CMD_DATE=y 29 CONFIG_CMD_DATE=y
30 CONFIG_CMD_EXT2=y 30 CONFIG_CMD_EXT2=y
31 CONFIG_CMD_FAT=y 31 CONFIG_CMD_FAT=y
32 CONFIG_CMD_UBI=y 32 CONFIG_CMD_UBI=y
33 CONFIG_MMC_OMAP_HS=y 33 CONFIG_MMC_OMAP_HS=y
34 CONFIG_SYS_NS16550=y 34 CONFIG_SYS_NS16550=y
35 CONFIG_USB=y 35 CONFIG_USB=y
36 CONFIG_USB_EHCI_HCD=y
36 CONFIG_USB_ULPI_VIEWPORT_OMAP=y 37 CONFIG_USB_ULPI_VIEWPORT_OMAP=y
37 CONFIG_USB_ULPI=y 38 CONFIG_USB_ULPI=y
38 CONFIG_USB_STORAGE=y 39 CONFIG_USB_STORAGE=y
39 # CONFIG_VIDEO_SW_CURSOR is not set 40 # CONFIG_VIDEO_SW_CURSOR is not set
40 CONFIG_OF_LIBFDT=y 41 CONFIG_OF_LIBFDT=y
41 42
configs/mt_ventoux_defconfig
Diff comments   View file @ 68ccab5
1 CONFIG_ARM=y 1 CONFIG_ARM=y
2 # CONFIG_SYS_THUMB_BUILD is not set 2 # CONFIG_SYS_THUMB_BUILD is not set
3 CONFIG_ARCH_OMAP2PLUS=y 3 CONFIG_ARCH_OMAP2PLUS=y
4 CONFIG_OMAP34XX=y 4 CONFIG_OMAP34XX=y
5 CONFIG_TARGET_MT_VENTOUX=y 5 CONFIG_TARGET_MT_VENTOUX=y
6 CONFIG_VIDEO=y 6 CONFIG_VIDEO=y
7 CONFIG_BOOTDELAY=10 7 CONFIG_BOOTDELAY=10
8 # CONFIG_CONSOLE_MUX is not set 8 # CONFIG_CONSOLE_MUX is not set
9 CONFIG_SYS_CONSOLE_IS_IN_ENV=y 9 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
10 CONFIG_SPL=y 10 CONFIG_SPL=y
11 # CONFIG_SPL_EXT_SUPPORT is not set 11 # CONFIG_SPL_EXT_SUPPORT is not set
12 CONFIG_HUSH_PARSER=y 12 CONFIG_HUSH_PARSER=y
13 CONFIG_SYS_PROMPT="mt_ventoux => " 13 CONFIG_SYS_PROMPT="mt_ventoux => "
14 # CONFIG_CMD_IMLS is not set 14 # CONFIG_CMD_IMLS is not set
15 # CONFIG_CMD_FLASH is not set 15 # CONFIG_CMD_FLASH is not set
16 CONFIG_CMD_MMC=y 16 CONFIG_CMD_MMC=y
17 CONFIG_CMD_I2C=y 17 CONFIG_CMD_I2C=y
18 CONFIG_CMD_USB=y 18 CONFIG_CMD_USB=y
19 CONFIG_CMD_GPIO=y 19 CONFIG_CMD_GPIO=y
20 # CONFIG_CMD_SETEXPR is not set 20 # CONFIG_CMD_SETEXPR is not set
21 CONFIG_CMD_DHCP=y 21 CONFIG_CMD_DHCP=y
22 CONFIG_CMD_MII=y 22 CONFIG_CMD_MII=y
23 CONFIG_CMD_PING=y 23 CONFIG_CMD_PING=y
24 CONFIG_CMD_BMP=y 24 CONFIG_CMD_BMP=y
25 CONFIG_CMD_CACHE=y 25 CONFIG_CMD_CACHE=y
26 CONFIG_CMD_EXT2=y 26 CONFIG_CMD_EXT2=y
27 CONFIG_CMD_FAT=y 27 CONFIG_CMD_FAT=y
28 CONFIG_CMD_UBI=y 28 CONFIG_CMD_UBI=y
29 CONFIG_MMC_OMAP_HS=y 29 CONFIG_MMC_OMAP_HS=y
30 CONFIG_SYS_NS16550=y 30 CONFIG_SYS_NS16550=y
31 CONFIG_USB=y 31 CONFIG_USB=y
32 CONFIG_USB_EHCI_HCD=y
32 CONFIG_USB_ULPI_VIEWPORT_OMAP=y 33 CONFIG_USB_ULPI_VIEWPORT_OMAP=y
33 CONFIG_USB_ULPI=y 34 CONFIG_USB_ULPI=y
34 CONFIG_USB_STORAGE=y 35 CONFIG_USB_STORAGE=y
35 # CONFIG_VIDEO_SW_CURSOR is not set 36 # CONFIG_VIDEO_SW_CURSOR is not set
36 CONFIG_OF_LIBFDT=y 37 CONFIG_OF_LIBFDT=y
37 38
configs/twister_defconfig
Diff comments   View file @ 68ccab5
1 CONFIG_ARM=y 1 CONFIG_ARM=y
2 # CONFIG_SYS_THUMB_BUILD is not set 2 # CONFIG_SYS_THUMB_BUILD is not set
3 CONFIG_ARCH_OMAP2PLUS=y 3 CONFIG_ARCH_OMAP2PLUS=y
4 CONFIG_OMAP34XX=y 4 CONFIG_OMAP34XX=y
5 CONFIG_TARGET_TWISTER=y 5 CONFIG_TARGET_TWISTER=y
6 CONFIG_BOOTDELAY=10 6 CONFIG_BOOTDELAY=10
7 CONFIG_SPL=y 7 CONFIG_SPL=y
8 # CONFIG_SPL_EXT_SUPPORT is not set 8 # CONFIG_SPL_EXT_SUPPORT is not set
9 CONFIG_SPL_OS_BOOT=y 9 CONFIG_SPL_OS_BOOT=y
10 CONFIG_HUSH_PARSER=y 10 CONFIG_HUSH_PARSER=y
11 CONFIG_SYS_PROMPT="twister => " 11 CONFIG_SYS_PROMPT="twister => "
12 # CONFIG_CMD_IMLS is not set 12 # CONFIG_CMD_IMLS is not set
13 # CONFIG_CMD_FLASH is not set 13 # CONFIG_CMD_FLASH is not set
14 CONFIG_CMD_MMC=y 14 CONFIG_CMD_MMC=y
15 CONFIG_CMD_I2C=y 15 CONFIG_CMD_I2C=y
16 CONFIG_CMD_USB=y 16 CONFIG_CMD_USB=y
17 CONFIG_CMD_GPIO=y 17 CONFIG_CMD_GPIO=y
18 # CONFIG_CMD_SETEXPR is not set 18 # CONFIG_CMD_SETEXPR is not set
19 CONFIG_CMD_DHCP=y 19 CONFIG_CMD_DHCP=y
20 CONFIG_CMD_MII=y 20 CONFIG_CMD_MII=y
21 CONFIG_CMD_PING=y 21 CONFIG_CMD_PING=y
22 CONFIG_CMD_CACHE=y 22 CONFIG_CMD_CACHE=y
23 CONFIG_CMD_EXT2=y 23 CONFIG_CMD_EXT2=y
24 CONFIG_CMD_FAT=y 24 CONFIG_CMD_FAT=y
25 CONFIG_CMD_UBI=y 25 CONFIG_CMD_UBI=y
26 CONFIG_MMC_OMAP_HS=y 26 CONFIG_MMC_OMAP_HS=y
27 CONFIG_SYS_NS16550=y 27 CONFIG_SYS_NS16550=y
28 CONFIG_USB=y 28 CONFIG_USB=y
29 CONFIG_USB_EHCI_HCD=y
29 CONFIG_USB_ULPI_VIEWPORT_OMAP=y 30 CONFIG_USB_ULPI_VIEWPORT_OMAP=y
30 CONFIG_USB_ULPI=y 31 CONFIG_USB_ULPI=y
31 CONFIG_USB_STORAGE=y 32 CONFIG_USB_STORAGE=y
32 CONFIG_OF_LIBFDT=y 33 CONFIG_OF_LIBFDT=y
33 34
include/configs/cm_t35.h
Diff comments   View file @ 68ccab5
1 /* 1 /*
2 * (C) Copyright 2011 CompuLab, Ltd. 2 * (C) Copyright 2011 CompuLab, Ltd.
3 * Mike Rapoport <mike@compulab.co.il> 3 * Mike Rapoport <mike@compulab.co.il>
4 * Igor Grinberg <grinberg@compulab.co.il> 4 * Igor Grinberg <grinberg@compulab.co.il>
5 * 5 *
6 * Based on omap3_beagle.h 6 * Based on omap3_beagle.h
7 * (C) Copyright 2006-2008 7 * (C) Copyright 2006-2008
8 * Texas Instruments. 8 * Texas Instruments.
9 * Richard Woodruff <r-woodruff2@ti.com> 9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <x0khasim@ti.com> 10 * Syed Mohammed Khasim <x0khasim@ti.com>
11 * 11 *
12 * Configuration settings for the CompuLab CM-T35 and CM-T3730 boards 12 * Configuration settings for the CompuLab CM-T35 and CM-T3730 boards
13 * 13 *
14 * SPDX-License-Identifier: GPL-2.0+ 14 * SPDX-License-Identifier: GPL-2.0+
15 */ 15 */
16 16
17 #ifndef __CONFIG_H 17 #ifndef __CONFIG_H
18 #define __CONFIG_H 18 #define __CONFIG_H
19 19
20 #define CONFIG_SYS_CACHELINE_SIZE 64 20 #define CONFIG_SYS_CACHELINE_SIZE 64
21 21
22 /* 22 /*
23 * High Level Configuration Options 23 * High Level Configuration Options
24 */ 24 */
25 #define CONFIG_CM_T3X /* working with CM-T35 and CM-T3730 */ 25 #define CONFIG_CM_T3X /* working with CM-T35 and CM-T3730 */
26 26
27 #define CONFIG_SDRC /* The chip has SDRC controller */ 27 #define CONFIG_SDRC /* The chip has SDRC controller */
28 28
29 #include <asm/arch/cpu.h> /* get chip and board defs */ 29 #include <asm/arch/cpu.h> /* get chip and board defs */
30 #include <asm/arch/omap.h> 30 #include <asm/arch/omap.h>
31 31
32 /* Clock Defines */ 32 /* Clock Defines */
33 #define V_OSCK 26000000 /* Clock output from T2 */ 33 #define V_OSCK 26000000 /* Clock output from T2 */
34 #define V_SCLK (V_OSCK >> 1) 34 #define V_SCLK (V_OSCK >> 1)
35 35
36 #define CONFIG_MISC_INIT_R 36 #define CONFIG_MISC_INIT_R
37 37
38 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 38 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
39 #define CONFIG_SETUP_MEMORY_TAGS 39 #define CONFIG_SETUP_MEMORY_TAGS
40 #define CONFIG_INITRD_TAG 40 #define CONFIG_INITRD_TAG
41 #define CONFIG_REVISION_TAG 41 #define CONFIG_REVISION_TAG
42 #define CONFIG_SERIAL_TAG 42 #define CONFIG_SERIAL_TAG
43 43
44 /* 44 /*
45 * Size of malloc() pool 45 * Size of malloc() pool
46 */ 46 */
47 #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ 47 #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
48 /* Sector */ 48 /* Sector */
49 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 49 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
50 50
51 /* 51 /*
52 * Hardware drivers 52 * Hardware drivers
53 */ 53 */
54 54
55 /* 55 /*
56 * NS16550 Configuration 56 * NS16550 Configuration
57 */ 57 */
58 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 58 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
59 59
60 #define CONFIG_SYS_NS16550_SERIAL 60 #define CONFIG_SYS_NS16550_SERIAL
61 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 61 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
62 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 62 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
63 63
64 /* 64 /*
65 * select serial console configuration 65 * select serial console configuration
66 */ 66 */
67 #define CONFIG_CONS_INDEX 3 67 #define CONFIG_CONS_INDEX 3
68 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 68 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
69 #define CONFIG_SERIAL3 3 /* UART3 */ 69 #define CONFIG_SERIAL3 3 /* UART3 */
70 70
71 /* allow to overwrite serial and ethaddr */ 71 /* allow to overwrite serial and ethaddr */
72 #define CONFIG_ENV_OVERWRITE 72 #define CONFIG_ENV_OVERWRITE
73 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 73 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
74 115200} 74 115200}
75 75
76 /* USB */ 76 /* USB */
77 #define CONFIG_USB_OMAP3 77 #define CONFIG_USB_OMAP3
78 #define CONFIG_USB_EHCI 78 #define CONFIG_USB_EHCI
79 #define CONFIG_USB_EHCI_OMAP 79 #define CONFIG_USB_EHCI_OMAP
80 #define CONFIG_USB_MUSB_UDC 80 #define CONFIG_USB_MUSB_UDC
81 #define CONFIG_TWL4030_USB 81 #define CONFIG_TWL4030_USB
82 82
83 /* USB device configuration */ 83 /* USB device configuration */
84 #define CONFIG_USB_DEVICE 84 #define CONFIG_USB_DEVICE
85 #define CONFIG_USB_TTY 85 #define CONFIG_USB_TTY
86 86
87 /* commands to include */ 87 /* commands to include */
88 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 88 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
89 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 89 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
90 #define CONFIG_MTD_PARTITIONS 90 #define CONFIG_MTD_PARTITIONS
91 #define MTDIDS_DEFAULT "nand0=nand" 91 #define MTDIDS_DEFAULT "nand0=nand"
92 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 92 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
93 "1920k(u-boot),256k(u-boot-env),"\ 93 "1920k(u-boot),256k(u-boot-env),"\
94 "4m(kernel),-(fs)" 94 "4m(kernel),-(fs)"
95 95
96 #define CONFIG_CMD_NAND /* NAND support */ 96 #define CONFIG_CMD_NAND /* NAND support */
97 97
98 #define CONFIG_SYS_I2C 98 #define CONFIG_SYS_I2C
99 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 99 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
100 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 100 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
101 #define CONFIG_SYS_I2C_OMAP34XX 101 #define CONFIG_SYS_I2C_OMAP34XX
102 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 102 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
103 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 103 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
104 #define CONFIG_SYS_I2C_EEPROM_BUS 0 104 #define CONFIG_SYS_I2C_EEPROM_BUS 0
105 #define CONFIG_I2C_MULTI_BUS 105 #define CONFIG_I2C_MULTI_BUS
106 106
107 /* 107 /*
108 * TWL4030 108 * TWL4030
109 */ 109 */
110 #define CONFIG_TWL4030_LED 110 #define CONFIG_TWL4030_LED
111 111
112 /* 112 /*
113 * Board NAND Info. 113 * Board NAND Info.
114 */ 114 */
115 #define CONFIG_NAND_OMAP_GPMC 115 #define CONFIG_NAND_OMAP_GPMC
116 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 116 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
117 /* to access nand */ 117 /* to access nand */
118 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 118 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
119 /* to access nand at */ 119 /* to access nand at */
120 /* CS0 */ 120 /* CS0 */
121 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 121 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
122 /* devices */ 122 /* devices */
123 123
124 /* Environment information */ 124 /* Environment information */
125 #define CONFIG_EXTRA_ENV_SETTINGS \ 125 #define CONFIG_EXTRA_ENV_SETTINGS \
126 "loadaddr=0x82000000\0" \ 126 "loadaddr=0x82000000\0" \
127 "usbtty=cdc_acm\0" \ 127 "usbtty=cdc_acm\0" \
128 "console=ttyO2,115200n8\0" \ 128 "console=ttyO2,115200n8\0" \
129 "mpurate=500\0" \ 129 "mpurate=500\0" \
130 "vram=12M\0" \ 130 "vram=12M\0" \
131 "dvimode=1024x768MR-16@60\0" \ 131 "dvimode=1024x768MR-16@60\0" \
132 "defaultdisplay=dvi\0" \ 132 "defaultdisplay=dvi\0" \
133 "mmcdev=0\0" \ 133 "mmcdev=0\0" \
134 "mmcroot=/dev/mmcblk0p2 rw\0" \ 134 "mmcroot=/dev/mmcblk0p2 rw\0" \
135 "mmcrootfstype=ext4 rootwait\0" \ 135 "mmcrootfstype=ext4 rootwait\0" \
136 "nandroot=/dev/mtdblock4 rw\0" \ 136 "nandroot=/dev/mtdblock4 rw\0" \
137 "nandrootfstype=ubifs\0" \ 137 "nandrootfstype=ubifs\0" \
138 "mmcargs=setenv bootargs console=${console} " \ 138 "mmcargs=setenv bootargs console=${console} " \
139 "mpurate=${mpurate} " \ 139 "mpurate=${mpurate} " \
140 "vram=${vram} " \ 140 "vram=${vram} " \
141 "omapfb.mode=dvi:${dvimode} " \ 141 "omapfb.mode=dvi:${dvimode} " \
142 "omapdss.def_disp=${defaultdisplay} " \ 142 "omapdss.def_disp=${defaultdisplay} " \
143 "root=${mmcroot} " \ 143 "root=${mmcroot} " \
144 "rootfstype=${mmcrootfstype}\0" \ 144 "rootfstype=${mmcrootfstype}\0" \
145 "nandargs=setenv bootargs console=${console} " \ 145 "nandargs=setenv bootargs console=${console} " \
146 "mpurate=${mpurate} " \ 146 "mpurate=${mpurate} " \
147 "vram=${vram} " \ 147 "vram=${vram} " \
148 "omapfb.mode=dvi:${dvimode} " \ 148 "omapfb.mode=dvi:${dvimode} " \
149 "omapdss.def_disp=${defaultdisplay} " \ 149 "omapdss.def_disp=${defaultdisplay} " \
150 "root=${nandroot} " \ 150 "root=${nandroot} " \
151 "rootfstype=${nandrootfstype}\0" \ 151 "rootfstype=${nandrootfstype}\0" \
152 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 152 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
153 "bootscript=echo Running bootscript from mmc ...; " \ 153 "bootscript=echo Running bootscript from mmc ...; " \
154 "source ${loadaddr}\0" \ 154 "source ${loadaddr}\0" \
155 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 155 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
156 "mmcboot=echo Booting from mmc ...; " \ 156 "mmcboot=echo Booting from mmc ...; " \
157 "run mmcargs; " \ 157 "run mmcargs; " \
158 "bootm ${loadaddr}\0" \ 158 "bootm ${loadaddr}\0" \
159 "nandboot=echo Booting from nand ...; " \ 159 "nandboot=echo Booting from nand ...; " \
160 "run nandargs; " \ 160 "run nandargs; " \
161 "nand read ${loadaddr} 2a0000 400000; " \ 161 "nand read ${loadaddr} 2a0000 400000; " \
162 "bootm ${loadaddr}\0" \ 162 "bootm ${loadaddr}\0" \
163 163
164 #define CONFIG_BOOTCOMMAND \ 164 #define CONFIG_BOOTCOMMAND \
165 "mmc dev ${mmcdev}; if mmc rescan; then " \ 165 "mmc dev ${mmcdev}; if mmc rescan; then " \
166 "if run loadbootscript; then " \ 166 "if run loadbootscript; then " \
167 "run bootscript; " \ 167 "run bootscript; " \
168 "else " \ 168 "else " \
169 "if run loaduimage; then " \ 169 "if run loaduimage; then " \
170 "run mmcboot; " \ 170 "run mmcboot; " \
171 "else run nandboot; " \ 171 "else run nandboot; " \
172 "fi; " \ 172 "fi; " \
173 "fi; " \ 173 "fi; " \
174 "else run nandboot; fi" 174 "else run nandboot; fi"
175 175
176 /* 176 /*
177 * Miscellaneous configurable options 177 * Miscellaneous configurable options
178 */ 178 */
179 #define CONFIG_AUTO_COMPLETE 179 #define CONFIG_AUTO_COMPLETE
180 #define CONFIG_CMDLINE_EDITING 180 #define CONFIG_CMDLINE_EDITING
181 #define CONFIG_TIMESTAMP 181 #define CONFIG_TIMESTAMP
182 #define CONFIG_SYS_AUTOLOAD "no" 182 #define CONFIG_SYS_AUTOLOAD "no"
183 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 183 #define CONFIG_SYS_LONGHELP /* undef to save memory */
184 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 184 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
185 /* Print Buffer Size */ 185 /* Print Buffer Size */
186 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 186 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
187 sizeof(CONFIG_SYS_PROMPT) + 16) 187 sizeof(CONFIG_SYS_PROMPT) + 16)
188 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 188 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
189 /* Boot Argument Buffer Size */ 189 /* Boot Argument Buffer Size */
190 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 190 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
191 191
192 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ 192 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
193 /* works on */ 193 /* works on */
194 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 194 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
195 0x01F00000) /* 31MB */ 195 0x01F00000) /* 31MB */
196 196
197 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ 197 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
198 /* load address */ 198 /* load address */
199 199
200 /* 200 /*
201 * OMAP3 has 12 GP timers, they can be driven by the system clock 201 * OMAP3 has 12 GP timers, they can be driven by the system clock
202 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 202 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
203 * This rate is divided by a local divisor. 203 * This rate is divided by a local divisor.
204 */ 204 */
205 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 205 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
206 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 206 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
207 207
208 /*----------------------------------------------------------------------- 208 /*-----------------------------------------------------------------------
209 * Physical Memory Map 209 * Physical Memory Map
210 */ 210 */
211 #define CONFIG_NR_DRAM_BANKS 1 /* CS1 is never populated */ 211 #define CONFIG_NR_DRAM_BANKS 1 /* CS1 is never populated */
212 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 212 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
213 213
214 /*----------------------------------------------------------------------- 214 /*-----------------------------------------------------------------------
215 * FLASH and environment organization 215 * FLASH and environment organization
216 */ 216 */
217 217
218 /* **** PISMO SUPPORT *** */ 218 /* **** PISMO SUPPORT *** */
219 /* Monitor at start of flash */ 219 /* Monitor at start of flash */
220 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 220 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
221 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 221 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
222 222
223 #define CONFIG_ENV_IS_IN_NAND 223 #define CONFIG_ENV_IS_IN_NAND
224 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 224 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
225 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 225 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
226 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 226 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
227 227
228 #if defined(CONFIG_CMD_NET) 228 #if defined(CONFIG_CMD_NET)
229 #define CONFIG_SMC911X 229 #define CONFIG_SMC911X
230 #define CONFIG_SMC911X_32_BIT 230 #define CONFIG_SMC911X_32_BIT
231 #define CM_T3X_SMC911X_BASE 0x2C000000 231 #define CM_T3X_SMC911X_BASE 0x2C000000
232 #define SB_T35_SMC911X_BASE (CM_T3X_SMC911X_BASE + (16 << 20)) 232 #define SB_T35_SMC911X_BASE (CM_T3X_SMC911X_BASE + (16 << 20))
233 #define CONFIG_SMC911X_BASE CM_T3X_SMC911X_BASE 233 #define CONFIG_SMC911X_BASE CM_T3X_SMC911X_BASE
234 #endif /* (CONFIG_CMD_NET) */ 234 #endif /* (CONFIG_CMD_NET) */
235 235
236 /* additions for new relocation code, must be added to all boards */ 236 /* additions for new relocation code, must be added to all boards */
237 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 237 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
238 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 238 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
239 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 239 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
240 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 240 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
241 CONFIG_SYS_INIT_RAM_SIZE - \ 241 CONFIG_SYS_INIT_RAM_SIZE - \
242 GENERATED_GBL_DATA_SIZE) 242 GENERATED_GBL_DATA_SIZE)
243 243
244 /* Status LED */ 244 /* Status LED */
245 #define GREEN_LED_GPIO 186 /* CM-T35 Green LED is GPIO186 */ 245 #define GREEN_LED_GPIO 186 /* CM-T35 Green LED is GPIO186 */
246 246
247 #define CONFIG_SPLASHIMAGE_GUARD 247 #define CONFIG_SPLASHIMAGE_GUARD
248 248
249 /* GPIO banks */
250 #ifdef CONFIG_LED_STATUS
251 #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */
252 #endif
253
254 /* Display Configuration */ 249 /* Display Configuration */
255 #define CONFIG_OMAP3_GPIO_2
256 #define CONFIG_OMAP3_GPIO_5
257 #define CONFIG_VIDEO_OMAP3 250 #define CONFIG_VIDEO_OMAP3
258 #define LCD_BPP LCD_COLOR16 251 #define LCD_BPP LCD_COLOR16
259 252
260 #define CONFIG_SPLASH_SCREEN 253 #define CONFIG_SPLASH_SCREEN
261 #define CONFIG_SPLASH_SOURCE 254 #define CONFIG_SPLASH_SOURCE
262 #define CONFIG_BMP_16BPP 255 #define CONFIG_BMP_16BPP
263 #define CONFIG_SCF0403_LCD 256 #define CONFIG_SCF0403_LCD
264 257
265 #define CONFIG_OMAP3_SPI 258 #define CONFIG_OMAP3_SPI
266 259
267 /* Defines for SPL */ 260 /* Defines for SPL */
268 #define CONFIG_SPL_FRAMEWORK 261 #define CONFIG_SPL_FRAMEWORK
269 #define CONFIG_SPL_NAND_SIMPLE 262 #define CONFIG_SPL_NAND_SIMPLE
270 263
271 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 264 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
272 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 265 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
273 266
274 #define CONFIG_SPL_BOARD_INIT 267 #define CONFIG_SPL_BOARD_INIT
275 #define CONFIG_SPL_NAND_BASE 268 #define CONFIG_SPL_NAND_BASE
276 #define CONFIG_SPL_NAND_DRIVERS 269 #define CONFIG_SPL_NAND_DRIVERS
277 #define CONFIG_SPL_NAND_ECC 270 #define CONFIG_SPL_NAND_ECC
278 #define CONFIG_SPL_OMAP3_ID_NAND 271 #define CONFIG_SPL_OMAP3_ID_NAND
279 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" 272 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
280 273
281 /* NAND boot config */ 274 /* NAND boot config */
282 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 275 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
283 #define CONFIG_SYS_NAND_PAGE_COUNT 64 276 #define CONFIG_SYS_NAND_PAGE_COUNT 64
284 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 277 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
285 #define CONFIG_SYS_NAND_OOBSIZE 64 278 #define CONFIG_SYS_NAND_OOBSIZE 64
286 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 279 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
287 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 280 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
288 /* 281 /*
289 * Use the ECC/OOB layout from omap_gpmc.h that matches your chip: 282 * Use the ECC/OOB layout from omap_gpmc.h that matches your chip:
290 * SP vs LP, 8bit vs 16bit: GPMC_NAND_HW_ECC_LAYOUT 283 * SP vs LP, 8bit vs 16bit: GPMC_NAND_HW_ECC_LAYOUT
291 */ 284 */
292 #define CONFIG_SYS_NAND_ECCPOS { 1, 2, 3, 4, 5, 6, 7, 8, 9, \ 285 #define CONFIG_SYS_NAND_ECCPOS { 1, 2, 3, 4, 5, 6, 7, 8, 9, \
293 10, 11, 12 } 286 10, 11, 12 }
294 #define CONFIG_SYS_NAND_ECCSIZE 512 287 #define CONFIG_SYS_NAND_ECCSIZE 512
295 #define CONFIG_SYS_NAND_ECCBYTES 3 288 #define CONFIG_SYS_NAND_ECCBYTES 3
296 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 289 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
297 290
298 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 291 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
299 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 292 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
300 293
301 #define CONFIG_SPL_TEXT_BASE 0x40200800 294 #define CONFIG_SPL_TEXT_BASE 0x40200800
302 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 295 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
303 CONFIG_SPL_TEXT_BASE) 296 CONFIG_SPL_TEXT_BASE)
304 297
305 /* 298 /*
306 * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the 299 * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the
307 * older x-loader implementations. And move the BSS area so that it 300 * older x-loader implementations. And move the BSS area so that it
308 * doesn't overlap with TEXT_BASE. 301 * doesn't overlap with TEXT_BASE.
309 */ 302 */
310 #define CONFIG_SYS_TEXT_BASE 0x80008000 303 #define CONFIG_SYS_TEXT_BASE 0x80008000
311 #define CONFIG_SPL_BSS_START_ADDR 0x80100000 304 #define CONFIG_SPL_BSS_START_ADDR 0x80100000
312 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 305 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
313 306
314 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 307 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
315 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 308 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
316 309
317 /* EEPROM */ 310 /* EEPROM */
318 #define CONFIG_CMD_EEPROM 311 #define CONFIG_CMD_EEPROM
319 #define CONFIG_ENV_EEPROM_IS_ON_I2C 312 #define CONFIG_ENV_EEPROM_IS_ON_I2C
320 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 313 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
321 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 314 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
322 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 315 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
323 #define CONFIG_SYS_EEPROM_SIZE 256 316 #define CONFIG_SYS_EEPROM_SIZE 256
324 317
325 #define CONFIG_CMD_EEPROM_LAYOUT 318 #define CONFIG_CMD_EEPROM_LAYOUT
326 #define CONFIG_EEPROM_LAYOUT_HELP_STRING "legacy, v1, v2, v3" 319 #define CONFIG_EEPROM_LAYOUT_HELP_STRING "legacy, v1, v2, v3"
327 320
328 #endif /* __CONFIG_H */ 321 #endif /* __CONFIG_H */
329 322
include/configs/cm_t3517.h
Diff comments   View file @ 68ccab5
1 /* 1 /*
2 * (C) Copyright 2013 CompuLab, Ltd. 2 * (C) Copyright 2013 CompuLab, Ltd.
3 * Author: Igor Grinberg <grinberg@compulab.co.il> 3 * Author: Igor Grinberg <grinberg@compulab.co.il>
4 * 4 *
5 * Configuration settings for the CompuLab CM-T3517 board 5 * Configuration settings for the CompuLab CM-T3517 board
6 * 6 *
7 * SPDX-License-Identifier: GPL-2.0+ 7 * SPDX-License-Identifier: GPL-2.0+
8 */ 8 */
9 9
10 #ifndef __CONFIG_H 10 #ifndef __CONFIG_H
11 #define __CONFIG_H 11 #define __CONFIG_H
12 12
13 /* 13 /*
14 * High Level Configuration Options 14 * High Level Configuration Options
15 */ 15 */
16 #define CONFIG_CM_T3517 /* working with CM-T3517 */ 16 #define CONFIG_CM_T3517 /* working with CM-T3517 */
17 17
18 #define CONFIG_SYS_TEXT_BASE 0x80008000 18 #define CONFIG_SYS_TEXT_BASE 0x80008000
19 19
20 /* 20 /*
21 * This is needed for the DMA stuff. 21 * This is needed for the DMA stuff.
22 * Although the default iss 64, we still define it 22 * Although the default iss 64, we still define it
23 * to be on the safe side once the default is changed. 23 * to be on the safe side once the default is changed.
24 */ 24 */
25 25
26 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ 26 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
27 27
28 #include <asm/arch/cpu.h> /* get chip and board defs */ 28 #include <asm/arch/cpu.h> /* get chip and board defs */
29 #include <asm/arch/omap.h> 29 #include <asm/arch/omap.h>
30 30
31 #define CONFIG_MACH_TYPE MACH_TYPE_CM_T3517 31 #define CONFIG_MACH_TYPE MACH_TYPE_CM_T3517
32 32
33 /* Clock Defines */ 33 /* Clock Defines */
34 #define V_OSCK 26000000 /* Clock output from T2 */ 34 #define V_OSCK 26000000 /* Clock output from T2 */
35 #define V_SCLK (V_OSCK >> 1) 35 #define V_SCLK (V_OSCK >> 1)
36 36
37 #define CONFIG_MISC_INIT_R 37 #define CONFIG_MISC_INIT_R
38 38
39 /* 39 /*
40 * The early kernel mapping on ARM currently only maps from the base of DRAM 40 * The early kernel mapping on ARM currently only maps from the base of DRAM
41 * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. 41 * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000.
42 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000, 42 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
43 * so that leaves DRAM base to DRAM base + 0x4000 available. 43 * so that leaves DRAM base to DRAM base + 0x4000 available.
44 */ 44 */
45 #define CONFIG_SYS_BOOTMAPSZ 0x4000 45 #define CONFIG_SYS_BOOTMAPSZ 0x4000
46 46
47 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 47 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
48 #define CONFIG_SETUP_MEMORY_TAGS 48 #define CONFIG_SETUP_MEMORY_TAGS
49 #define CONFIG_INITRD_TAG 49 #define CONFIG_INITRD_TAG
50 #define CONFIG_REVISION_TAG 50 #define CONFIG_REVISION_TAG
51 #define CONFIG_SERIAL_TAG 51 #define CONFIG_SERIAL_TAG
52 52
53 /* 53 /*
54 * Size of malloc() pool 54 * Size of malloc() pool
55 */ 55 */
56 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 56 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
57 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 57 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
58 58
59 /* 59 /*
60 * Hardware drivers 60 * Hardware drivers
61 */ 61 */
62 62
63 /* 63 /*
64 * NS16550 Configuration 64 * NS16550 Configuration
65 */ 65 */
66 #define CONFIG_SYS_NS16550_SERIAL 66 #define CONFIG_SYS_NS16550_SERIAL
67 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 67 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
68 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 68 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
69 69
70 /* 70 /*
71 * select serial console configuration 71 * select serial console configuration
72 */ 72 */
73 #define CONFIG_CONS_INDEX 3 73 #define CONFIG_CONS_INDEX 3
74 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 74 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
75 #define CONFIG_SERIAL3 3 /* UART3 */ 75 #define CONFIG_SERIAL3 3 /* UART3 */
76 76
77 /* allow to overwrite serial and ethaddr */ 77 /* allow to overwrite serial and ethaddr */
78 #define CONFIG_ENV_OVERWRITE 78 #define CONFIG_ENV_OVERWRITE
79 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 79 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
80 115200} 80 115200}
81 81
82 /* USB */ 82 /* USB */
83 #define CONFIG_USB_MUSB_AM35X 83 #define CONFIG_USB_MUSB_AM35X
84 84
85 #ifndef CONFIG_USB_MUSB_AM35X 85 #ifndef CONFIG_USB_MUSB_AM35X
86 #define CONFIG_USB_OMAP3 86 #define CONFIG_USB_OMAP3
87 #define CONFIG_USB_EHCI 87 #define CONFIG_USB_EHCI
88 #define CONFIG_USB_EHCI_OMAP 88 #define CONFIG_USB_EHCI_OMAP
89 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146 89 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
90 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147 90 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147
91 #else /* !CONFIG_USB_MUSB_AM35X */ 91 #else /* !CONFIG_USB_MUSB_AM35X */
92 #define CONFIG_USB_MUSB_PIO_ONLY 92 #define CONFIG_USB_MUSB_PIO_ONLY
93 #endif /* CONFIG_USB_MUSB_AM35X */ 93 #endif /* CONFIG_USB_MUSB_AM35X */
94 94
95 /* commands to include */ 95 /* commands to include */
96 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 96 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
97 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 97 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
98 #define CONFIG_MTD_PARTITIONS 98 #define CONFIG_MTD_PARTITIONS
99 #define MTDIDS_DEFAULT "nand0=nand" 99 #define MTDIDS_DEFAULT "nand0=nand"
100 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 100 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
101 "1920k(u-boot),256k(u-boot-env),"\ 101 "1920k(u-boot),256k(u-boot-env),"\
102 "4m(kernel),-(fs)" 102 "4m(kernel),-(fs)"
103 103
104 #define CONFIG_CMD_NAND /* NAND support */ 104 #define CONFIG_CMD_NAND /* NAND support */
105 105
106 #define CONFIG_SYS_I2C 106 #define CONFIG_SYS_I2C
107 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000 107 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000
108 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 108 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
109 #define CONFIG_SYS_I2C_OMAP34XX 109 #define CONFIG_SYS_I2C_OMAP34XX
110 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 110 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
111 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 111 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
112 #define CONFIG_SYS_I2C_EEPROM_BUS 0 112 #define CONFIG_SYS_I2C_EEPROM_BUS 0
113 #define CONFIG_I2C_MULTI_BUS 113 #define CONFIG_I2C_MULTI_BUS
114 114
115 /* 115 /*
116 * Board NAND Info. 116 * Board NAND Info.
117 */ 117 */
118 #define CONFIG_NAND_OMAP_GPMC 118 #define CONFIG_NAND_OMAP_GPMC
119 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 119 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
120 /* to access nand */ 120 /* to access nand */
121 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 121 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
122 /* to access nand at */ 122 /* to access nand at */
123 /* CS0 */ 123 /* CS0 */
124 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 124 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
125 /* devices */ 125 /* devices */
126 126
127 /* Environment information */ 127 /* Environment information */
128 #define CONFIG_EXTRA_ENV_SETTINGS \ 128 #define CONFIG_EXTRA_ENV_SETTINGS \
129 "loadaddr=0x82000000\0" \ 129 "loadaddr=0x82000000\0" \
130 "baudrate=115200\0" \ 130 "baudrate=115200\0" \
131 "console=ttyO2,115200n8\0" \ 131 "console=ttyO2,115200n8\0" \
132 "netretry=yes\0" \ 132 "netretry=yes\0" \
133 "mpurate=auto\0" \ 133 "mpurate=auto\0" \
134 "vram=12M\0" \ 134 "vram=12M\0" \
135 "dvimode=1024x768MR-16@60\0" \ 135 "dvimode=1024x768MR-16@60\0" \
136 "defaultdisplay=dvi\0" \ 136 "defaultdisplay=dvi\0" \
137 "mmcdev=0\0" \ 137 "mmcdev=0\0" \
138 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 138 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
139 "mmcrootfstype=ext4\0" \ 139 "mmcrootfstype=ext4\0" \
140 "nandroot=/dev/mtdblock4 rw\0" \ 140 "nandroot=/dev/mtdblock4 rw\0" \
141 "nandrootfstype=ubifs\0" \ 141 "nandrootfstype=ubifs\0" \
142 "mmcargs=setenv bootargs console=${console} " \ 142 "mmcargs=setenv bootargs console=${console} " \
143 "mpurate=${mpurate} " \ 143 "mpurate=${mpurate} " \
144 "vram=${vram} " \ 144 "vram=${vram} " \
145 "omapfb.mode=dvi:${dvimode} " \ 145 "omapfb.mode=dvi:${dvimode} " \
146 "omapdss.def_disp=${defaultdisplay} " \ 146 "omapdss.def_disp=${defaultdisplay} " \
147 "root=${mmcroot} " \ 147 "root=${mmcroot} " \
148 "rootfstype=${mmcrootfstype}\0" \ 148 "rootfstype=${mmcrootfstype}\0" \
149 "nandargs=setenv bootargs console=${console} " \ 149 "nandargs=setenv bootargs console=${console} " \
150 "mpurate=${mpurate} " \ 150 "mpurate=${mpurate} " \
151 "vram=${vram} " \ 151 "vram=${vram} " \
152 "omapfb.mode=dvi:${dvimode} " \ 152 "omapfb.mode=dvi:${dvimode} " \
153 "omapdss.def_disp=${defaultdisplay} " \ 153 "omapdss.def_disp=${defaultdisplay} " \
154 "root=${nandroot} " \ 154 "root=${nandroot} " \
155 "rootfstype=${nandrootfstype}\0" \ 155 "rootfstype=${nandrootfstype}\0" \
156 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 156 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
157 "bootscript=echo Running bootscript from mmc ...; " \ 157 "bootscript=echo Running bootscript from mmc ...; " \
158 "source ${loadaddr}\0" \ 158 "source ${loadaddr}\0" \
159 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 159 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
160 "mmcboot=echo Booting from mmc ...; " \ 160 "mmcboot=echo Booting from mmc ...; " \
161 "run mmcargs; " \ 161 "run mmcargs; " \
162 "bootm ${loadaddr}\0" \ 162 "bootm ${loadaddr}\0" \
163 "nandboot=echo Booting from nand ...; " \ 163 "nandboot=echo Booting from nand ...; " \
164 "run nandargs; " \ 164 "run nandargs; " \
165 "nand read ${loadaddr} 2a0000 400000; " \ 165 "nand read ${loadaddr} 2a0000 400000; " \
166 "bootm ${loadaddr}\0" \ 166 "bootm ${loadaddr}\0" \
167 167
168 #define CONFIG_BOOTCOMMAND \ 168 #define CONFIG_BOOTCOMMAND \
169 "mmc dev ${mmcdev}; if mmc rescan; then " \ 169 "mmc dev ${mmcdev}; if mmc rescan; then " \
170 "if run loadbootscript; then " \ 170 "if run loadbootscript; then " \
171 "run bootscript; " \ 171 "run bootscript; " \
172 "else " \ 172 "else " \
173 "if run loaduimage; then " \ 173 "if run loaduimage; then " \
174 "run mmcboot; " \ 174 "run mmcboot; " \
175 "else run nandboot; " \ 175 "else run nandboot; " \
176 "fi; " \ 176 "fi; " \
177 "fi; " \ 177 "fi; " \
178 "else run nandboot; fi" 178 "else run nandboot; fi"
179 179
180 /* 180 /*
181 * Miscellaneous configurable options 181 * Miscellaneous configurable options
182 */ 182 */
183 #define CONFIG_AUTO_COMPLETE 183 #define CONFIG_AUTO_COMPLETE
184 #define CONFIG_CMDLINE_EDITING 184 #define CONFIG_CMDLINE_EDITING
185 #define CONFIG_TIMESTAMP 185 #define CONFIG_TIMESTAMP
186 #define CONFIG_SYS_AUTOLOAD "no" 186 #define CONFIG_SYS_AUTOLOAD "no"
187 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 187 #define CONFIG_SYS_LONGHELP /* undef to save memory */
188 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 188 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
189 /* Print Buffer Size */ 189 /* Print Buffer Size */
190 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 190 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
191 sizeof(CONFIG_SYS_PROMPT) + 16) 191 sizeof(CONFIG_SYS_PROMPT) + 16)
192 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 192 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
193 /* Boot Argument Buffer Size */ 193 /* Boot Argument Buffer Size */
194 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 194 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
195 195
196 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) 196 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
197 197
198 /* 198 /*
199 * AM3517 has 12 GP timers, they can be driven by the system clock 199 * AM3517 has 12 GP timers, they can be driven by the system clock
200 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 200 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
201 * This rate is divided by a local divisor. 201 * This rate is divided by a local divisor.
202 */ 202 */
203 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 203 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
204 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 204 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
205 #define CONFIG_SYS_HZ 1000 205 #define CONFIG_SYS_HZ 1000
206 206
207 /*----------------------------------------------------------------------- 207 /*-----------------------------------------------------------------------
208 * Physical Memory Map 208 * Physical Memory Map
209 */ 209 */
210 #define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */ 210 #define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */
211 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 211 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
212 #define CONFIG_SYS_CS0_SIZE (256 << 20) 212 #define CONFIG_SYS_CS0_SIZE (256 << 20)
213 213
214 /*----------------------------------------------------------------------- 214 /*-----------------------------------------------------------------------
215 * FLASH and environment organization 215 * FLASH and environment organization
216 */ 216 */
217 217
218 /* **** PISMO SUPPORT *** */ 218 /* **** PISMO SUPPORT *** */
219 /* Monitor at start of flash */ 219 /* Monitor at start of flash */
220 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 220 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
221 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 221 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
222 222
223 #define CONFIG_ENV_IS_IN_NAND 223 #define CONFIG_ENV_IS_IN_NAND
224 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 224 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
225 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 225 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
226 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 226 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
227 227
228 #if defined(CONFIG_CMD_NET) 228 #if defined(CONFIG_CMD_NET)
229 #define CONFIG_DRIVER_TI_EMAC 229 #define CONFIG_DRIVER_TI_EMAC
230 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 230 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
231 #define CONFIG_MII 231 #define CONFIG_MII
232 #define CONFIG_SMC911X 232 #define CONFIG_SMC911X
233 #define CONFIG_SMC911X_32_BIT 233 #define CONFIG_SMC911X_32_BIT
234 #define CONFIG_SMC911X_BASE (0x2C000000 + (16 << 20)) 234 #define CONFIG_SMC911X_BASE (0x2C000000 + (16 << 20))
235 #define CONFIG_ARP_TIMEOUT 200UL 235 #define CONFIG_ARP_TIMEOUT 200UL
236 #define CONFIG_NET_RETRY_COUNT 5 236 #define CONFIG_NET_RETRY_COUNT 5
237 #endif /* CONFIG_CMD_NET */ 237 #endif /* CONFIG_CMD_NET */
238 238
239 /* additions for new relocation code, must be added to all boards */ 239 /* additions for new relocation code, must be added to all boards */
240 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 240 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
241 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 241 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
242 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 242 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
243 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 243 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
244 CONFIG_SYS_INIT_RAM_SIZE - \ 244 CONFIG_SYS_INIT_RAM_SIZE - \
245 GENERATED_GBL_DATA_SIZE) 245 GENERATED_GBL_DATA_SIZE)
246 246
247 /* Status LED */ 247 /* Status LED */
248 #define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */ 248 #define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */
249 249
250 /* GPIO banks */
251 #ifdef CONFIG_LED_STATUS
252 #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */
253 #endif
254
255 /* Display Configuration */ 250 /* Display Configuration */
256 #define CONFIG_OMAP3_GPIO_2
257 #define CONFIG_OMAP3_GPIO_5
258 #define CONFIG_VIDEO_OMAP3 251 #define CONFIG_VIDEO_OMAP3
259 #define LCD_BPP LCD_COLOR16 252 #define LCD_BPP LCD_COLOR16
260 253
261 #define CONFIG_SPLASH_SCREEN 254 #define CONFIG_SPLASH_SCREEN
262 #define CONFIG_SPLASHIMAGE_GUARD 255 #define CONFIG_SPLASHIMAGE_GUARD
263 #define CONFIG_BMP_16BPP 256 #define CONFIG_BMP_16BPP
264 #define CONFIG_SCF0403_LCD 257 #define CONFIG_SCF0403_LCD
265 258
266 #define CONFIG_OMAP3_SPI 259 #define CONFIG_OMAP3_SPI
267 260
268 /* EEPROM */ 261 /* EEPROM */
269 #define CONFIG_CMD_EEPROM 262 #define CONFIG_CMD_EEPROM
270 #define CONFIG_ENV_EEPROM_IS_ON_I2C 263 #define CONFIG_ENV_EEPROM_IS_ON_I2C
271 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 264 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
272 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 265 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
273 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 266 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
274 #define CONFIG_SYS_EEPROM_SIZE 256 267 #define CONFIG_SYS_EEPROM_SIZE 256
275 268
276 #define CONFIG_CMD_EEPROM_LAYOUT 269 #define CONFIG_CMD_EEPROM_LAYOUT
277 #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v1, v2, v3" 270 #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v1, v2, v3"
278 271
279 #endif /* __CONFIG_H */ 272 #endif /* __CONFIG_H */
280 273
include/configs/mcx.h
Diff comments   View file @ 68ccab5
1 /* 1 /*
2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems 2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3 * 3 *
4 * Based on omap3_evm_config.h 4 * Based on omap3_evm_config.h
5 * 5 *
6 * SPDX-License-Identifier: GPL-2.0+ 6 * SPDX-License-Identifier: GPL-2.0+
7 */ 7 */
8 8
9 #ifndef __CONFIG_H 9 #ifndef __CONFIG_H
10 #define __CONFIG_H 10 #define __CONFIG_H
11 11
12 /* 12 /*
13 * High Level Configuration Options 13 * High Level Configuration Options
14 */ 14 */
15 15
16 #define CONFIG_MACH_TYPE MACH_TYPE_MCX 16 #define CONFIG_MACH_TYPE MACH_TYPE_MCX
17 17
18 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ 18 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
19 19
20 #include <asm/arch/cpu.h> /* get chip and board defs */ 20 #include <asm/arch/cpu.h> /* get chip and board defs */
21 #include <asm/arch/omap.h> 21 #include <asm/arch/omap.h>
22 22
23 /* 23 /*
24 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader 24 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
25 * and older u-boot.bin with the new U-Boot SPL. 25 * and older u-boot.bin with the new U-Boot SPL.
26 */ 26 */
27 #define CONFIG_SYS_TEXT_BASE 0x80008000 27 #define CONFIG_SYS_TEXT_BASE 0x80008000
28 28
29 /* Clock Defines */ 29 /* Clock Defines */
30 #define V_OSCK 26000000 /* Clock output from T2 */ 30 #define V_OSCK 26000000 /* Clock output from T2 */
31 #define V_SCLK (V_OSCK >> 1) 31 #define V_SCLK (V_OSCK >> 1)
32 32
33 #define CONFIG_MISC_INIT_R 33 #define CONFIG_MISC_INIT_R
34 34
35 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 35 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
36 #define CONFIG_SETUP_MEMORY_TAGS 36 #define CONFIG_SETUP_MEMORY_TAGS
37 #define CONFIG_INITRD_TAG 37 #define CONFIG_INITRD_TAG
38 #define CONFIG_REVISION_TAG 38 #define CONFIG_REVISION_TAG
39 39
40 /* 40 /*
41 * Size of malloc() pool 41 * Size of malloc() pool
42 */ 42 */
43 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ 43 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
44 #define CONFIG_SYS_MALLOC_LEN (1024 << 10) 44 #define CONFIG_SYS_MALLOC_LEN (1024 << 10)
45 /* 45 /*
46 * DDR related 46 * DDR related
47 */ 47 */
48 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) 48 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
49 49
50 /* 50 /*
51 * Hardware drivers 51 * Hardware drivers
52 */ 52 */
53 53
54 /* 54 /*
55 * NS16550 Configuration 55 * NS16550 Configuration
56 */ 56 */
57 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 57 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
58 58
59 #define CONFIG_SYS_NS16550_SERIAL 59 #define CONFIG_SYS_NS16550_SERIAL
60 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 60 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
61 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 61 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
62 62
63 /* 63 /*
64 * select serial console configuration 64 * select serial console configuration
65 */ 65 */
66 #define CONFIG_CONS_INDEX 3 66 #define CONFIG_CONS_INDEX 3
67 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 67 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
68 #define CONFIG_SERIAL3 3 /* UART3 */ 68 #define CONFIG_SERIAL3 3 /* UART3 */
69 69
70 /* allow to overwrite serial and ethaddr */ 70 /* allow to overwrite serial and ethaddr */
71 #define CONFIG_ENV_OVERWRITE 71 #define CONFIG_ENV_OVERWRITE
72 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 72 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
73 115200} 73 115200}
74 74
75 /* EHCI */ 75 /* EHCI */
76 #define CONFIG_OMAP3_GPIO_2
77 #define CONFIG_OMAP3_GPIO_5
78 #define CONFIG_USB_EHCI
79 #define CONFIG_USB_EHCI_OMAP 76 #define CONFIG_USB_EHCI_OMAP
80 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57 77 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57
81 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 78 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
82 #define CONFIG_USB_HOST_ETHER 79 #define CONFIG_USB_HOST_ETHER
83 #define CONFIG_USB_ETHER_ASIX 80 #define CONFIG_USB_ETHER_ASIX
84 #define CONFIG_USB_ETHER_MCS7830 81 #define CONFIG_USB_ETHER_MCS7830
85 82
86 /* commands to include */ 83 /* commands to include */
87 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ 84 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
88 85
89 #define CONFIG_CMD_NAND /* NAND support */ 86 #define CONFIG_CMD_NAND /* NAND support */
90 #define CONFIG_CMD_UBIFS 87 #define CONFIG_CMD_UBIFS
91 #define CONFIG_RBTREE 88 #define CONFIG_RBTREE
92 #define CONFIG_LZO 89 #define CONFIG_LZO
93 #define CONFIG_MTD_PARTITIONS 90 #define CONFIG_MTD_PARTITIONS
94 #define CONFIG_MTD_DEVICE 91 #define CONFIG_MTD_DEVICE
95 #define CONFIG_CMD_MTDPARTS 92 #define CONFIG_CMD_MTDPARTS
96 93
97 #define CONFIG_SYS_I2C 94 #define CONFIG_SYS_I2C
98 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 95 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
99 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 96 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
100 #define CONFIG_SYS_I2C_OMAP34XX 97 #define CONFIG_SYS_I2C_OMAP34XX
101 98
102 /* RTC */ 99 /* RTC */
103 #define CONFIG_RTC_DS1337 100 #define CONFIG_RTC_DS1337
104 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 101 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
105 102
106 /* 103 /*
107 * Board NAND Info. 104 * Board NAND Info.
108 */ 105 */
109 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 106 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
110 /* to access nand */ 107 /* to access nand */
111 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 108 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
112 /* to access */ 109 /* to access */
113 /* nand at CS0 */ 110 /* nand at CS0 */
114 111
115 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 112 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
116 /* NAND devices */ 113 /* NAND devices */
117 #define CONFIG_JFFS2_NAND 114 #define CONFIG_JFFS2_NAND
118 /* nand device jffs2 lives on */ 115 /* nand device jffs2 lives on */
119 #define CONFIG_JFFS2_DEV "nand0" 116 #define CONFIG_JFFS2_DEV "nand0"
120 /* start of jffs2 partition */ 117 /* start of jffs2 partition */
121 #define CONFIG_JFFS2_PART_OFFSET 0x680000 118 #define CONFIG_JFFS2_PART_OFFSET 0x680000
122 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */ 119 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */
123 120
124 /* Environment information */ 121 /* Environment information */
125 122
126 #define CONFIG_BOOTFILE "uImage" 123 #define CONFIG_BOOTFILE "uImage"
127 124
128 /* Setup MTD for NAND on the SOM */ 125 /* Setup MTD for NAND on the SOM */
129 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 126 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
130 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \ 127 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
131 "1m(u-boot),256k(env1)," \ 128 "1m(u-boot),256k(env1)," \
132 "256k(env2),6m(kernel),6m(k_recovery)," \ 129 "256k(env2),6m(kernel),6m(k_recovery)," \
133 "8m(fs_recovery),-(common_data)" 130 "8m(fs_recovery),-(common_data)"
134 131
135 #define CONFIG_HOSTNAME mcx 132 #define CONFIG_HOSTNAME mcx
136 #define CONFIG_EXTRA_ENV_SETTINGS \ 133 #define CONFIG_EXTRA_ENV_SETTINGS \
137 "adddbg=setenv bootargs ${bootargs} trace_buf_size=64M\0" \ 134 "adddbg=setenv bootargs ${bootargs} trace_buf_size=64M\0" \
138 "adddebug=setenv bootargs ${bootargs} earlyprintk=serial\0" \ 135 "adddebug=setenv bootargs ${bootargs} earlyprintk=serial\0" \
139 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ 136 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
140 "addfb=setenv bootargs ${bootargs} vram=6M " \ 137 "addfb=setenv bootargs ${bootargs} vram=6M " \
141 "omapfb.vram=1:2M,2:2M,3:2M omapdss.def_disp=lcd\0" \ 138 "omapfb.vram=1:2M,2:2M,3:2M omapdss.def_disp=lcd\0" \
142 "addip_sta=setenv bootargs ${bootargs} " \ 139 "addip_sta=setenv bootargs ${bootargs} " \
143 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 140 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
144 "${netmask}:${hostname}:eth0:off\0" \ 141 "${netmask}:${hostname}:eth0:off\0" \
145 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 142 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
146 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 143 "addip=if test -n ${ipdyn};then run addip_dyn;" \
147 "else run addip_sta;fi\0" \ 144 "else run addip_sta;fi\0" \
148 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 145 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
149 "addtty=setenv bootargs ${bootargs} " \ 146 "addtty=setenv bootargs ${bootargs} " \
150 "console=${consoledev},${baudrate}\0" \ 147 "console=${consoledev},${baudrate}\0" \
151 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 148 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
152 "baudrate=115200\0" \ 149 "baudrate=115200\0" \
153 "consoledev=ttyO2\0" \ 150 "consoledev=ttyO2\0" \
154 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 151 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
155 "loadaddr=0x82000000\0" \ 152 "loadaddr=0x82000000\0" \
156 "load=tftp ${loadaddr} ${u-boot}\0" \ 153 "load=tftp ${loadaddr} ${u-boot}\0" \
157 "load_k=tftp ${loadaddr} ${bootfile}\0" \ 154 "load_k=tftp ${loadaddr} ${bootfile}\0" \
158 "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ 155 "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
159 "loadmlo=tftp ${loadaddr} ${mlo}\0" \ 156 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
160 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \ 157 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \
161 "mmcargs=root=/dev/mmcblk0p2 rw " \ 158 "mmcargs=root=/dev/mmcblk0p2 rw " \
162 "rootfstype=ext3 rootwait\0" \ 159 "rootfstype=ext3 rootwait\0" \
163 "mmcboot=echo Booting from mmc ...; " \ 160 "mmcboot=echo Booting from mmc ...; " \
164 "run mmcargs; " \ 161 "run mmcargs; " \
165 "run addip addtty addmtd addfb addeth addmisc;" \ 162 "run addip addtty addmtd addfb addeth addmisc;" \
166 "run loaduimage; " \ 163 "run loaduimage; " \
167 "bootm ${loadaddr}\0" \ 164 "bootm ${loadaddr}\0" \
168 "net_nfs=run load_k; " \ 165 "net_nfs=run load_k; " \
169 "run nfsargs; " \ 166 "run nfsargs; " \
170 "run addip addtty addmtd addfb addeth addmisc;" \ 167 "run addip addtty addmtd addfb addeth addmisc;" \
171 "bootm ${loadaddr}\0" \ 168 "bootm ${loadaddr}\0" \
172 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 169 "nfsargs=setenv bootargs root=/dev/nfs rw " \
173 "nfsroot=${serverip}:${rootpath}\0" \ 170 "nfsroot=${serverip}:${rootpath}\0" \
174 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \ 171 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \
175 "uboot_addr=0x80000\0" \ 172 "uboot_addr=0x80000\0" \
176 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ 173 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
177 "nand write ${loadaddr} ${uboot_addr} 80000\0" \ 174 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
178 "updatemlo=nandecc hw;nand erase 0 20000;" \ 175 "updatemlo=nandecc hw;nand erase 0 20000;" \
179 "nand write ${loadaddr} 0 20000\0" \ 176 "nand write ${loadaddr} 0 20000\0" \
180 "upd=if run load;then echo Updating u-boot;if run update;" \ 177 "upd=if run load;then echo Updating u-boot;if run update;" \
181 "then echo U-Boot updated;" \ 178 "then echo U-Boot updated;" \
182 "else echo Error updating u-boot !;" \ 179 "else echo Error updating u-boot !;" \
183 "echo Board without bootloader !!;" \ 180 "echo Board without bootloader !!;" \
184 "fi;" \ 181 "fi;" \
185 "else echo U-Boot not downloaded..exiting;fi\0" \ 182 "else echo U-Boot not downloaded..exiting;fi\0" \
186 "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ 183 "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
187 "bootscript=echo Running bootscript from mmc ...; " \ 184 "bootscript=echo Running bootscript from mmc ...; " \
188 "source ${loadaddr}\0" \ 185 "source ${loadaddr}\0" \
189 "nandargs=setenv bootargs ubi.mtd=7 " \ 186 "nandargs=setenv bootargs ubi.mtd=7 " \
190 "root=ubi0:rootfs rootfstype=ubifs\0" \ 187 "root=ubi0:rootfs rootfstype=ubifs\0" \
191 "nandboot=echo Booting from nand ...; " \ 188 "nandboot=echo Booting from nand ...; " \
192 "run nandargs; " \ 189 "run nandargs; " \
193 "ubi part nand0,4;" \ 190 "ubi part nand0,4;" \
194 "ubi readvol ${loadaddr} kernel;" \ 191 "ubi readvol ${loadaddr} kernel;" \
195 "run addtty addmtd addfb addeth addmisc;" \ 192 "run addtty addmtd addfb addeth addmisc;" \
196 "bootm ${loadaddr}\0" \ 193 "bootm ${loadaddr}\0" \
197 "preboot=ubi part nand0,7;" \ 194 "preboot=ubi part nand0,7;" \
198 "ubi readvol ${loadaddr} splash;" \ 195 "ubi readvol ${loadaddr} splash;" \
199 "bmp display ${loadaddr};" \ 196 "bmp display ${loadaddr};" \
200 "gpio set 55\0" \ 197 "gpio set 55\0" \
201 "swupdate_args=setenv bootargs root=/dev/ram " \ 198 "swupdate_args=setenv bootargs root=/dev/ram " \
202 "quiet loglevel=1 " \ 199 "quiet loglevel=1 " \
203 "consoleblank=0 ${swupdate_misc}\0" \ 200 "consoleblank=0 ${swupdate_misc}\0" \
204 "swupdate=echo Running Sw-Update...;" \ 201 "swupdate=echo Running Sw-Update...;" \
205 "if printenv mtdparts;then echo Starting SwUpdate...; " \ 202 "if printenv mtdparts;then echo Starting SwUpdate...; " \
206 "else mtdparts default;fi; " \ 203 "else mtdparts default;fi; " \
207 "ubi part nand0,5;" \ 204 "ubi part nand0,5;" \
208 "ubi readvol 0x82000000 kernel_recovery;" \ 205 "ubi readvol 0x82000000 kernel_recovery;" \
209 "ubi part nand0,6;" \ 206 "ubi part nand0,6;" \
210 "ubi readvol 0x84000000 fs_recovery;" \ 207 "ubi readvol 0x84000000 fs_recovery;" \
211 "run swupdate_args; " \ 208 "run swupdate_args; " \
212 "setenv bootargs ${bootargs} " \ 209 "setenv bootargs ${bootargs} " \
213 "${mtdparts} " \ 210 "${mtdparts} " \
214 "vram=6M omapfb.vram=1:2M,2:2M,3:2M " \ 211 "vram=6M omapfb.vram=1:2M,2:2M,3:2M " \
215 "omapdss.def_disp=lcd;" \ 212 "omapdss.def_disp=lcd;" \
216 "bootm 0x82000000 0x84000000\0" \ 213 "bootm 0x82000000 0x84000000\0" \
217 "bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;" \ 214 "bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;" \
218 "then source 82000000;else run nandboot;fi\0" 215 "then source 82000000;else run nandboot;fi\0"
219 216
220 #define CONFIG_AUTO_COMPLETE 217 #define CONFIG_AUTO_COMPLETE
221 #define CONFIG_CMDLINE_EDITING 218 #define CONFIG_CMDLINE_EDITING
222 219
223 /* 220 /*
224 * Miscellaneous configurable options 221 * Miscellaneous configurable options
225 */ 222 */
226 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 223 #define CONFIG_SYS_LONGHELP /* undef to save memory */
227 #define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */ 224 #define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */
228 /* Print Buffer Size */ 225 /* Print Buffer Size */
229 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 226 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
230 sizeof(CONFIG_SYS_PROMPT) + 16) 227 sizeof(CONFIG_SYS_PROMPT) + 16)
231 #define CONFIG_SYS_MAXARGS 16 /* max number of command */ 228 #define CONFIG_SYS_MAXARGS 16 /* max number of command */
232 /* args */ 229 /* args */
233 /* Boot Argument Buffer Size */ 230 /* Boot Argument Buffer Size */
234 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 231 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
235 /* memtest works on */ 232 /* memtest works on */
236 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 233 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
237 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 234 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
238 0x01F00000) /* 31MB */ 235 0x01F00000) /* 31MB */
239 236
240 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 237 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
241 /* address */ 238 /* address */
242 #define CONFIG_PREBOOT 239 #define CONFIG_PREBOOT
243 240
244 /* 241 /*
245 * AM3517 has 12 GP timers, they can be driven by the system clock 242 * AM3517 has 12 GP timers, they can be driven by the system clock
246 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 243 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
247 * This rate is divided by a local divisor. 244 * This rate is divided by a local divisor.
248 */ 245 */
249 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 246 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
250 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 247 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
251 248
252 /* 249 /*
253 * Physical Memory Map 250 * Physical Memory Map
254 */ 251 */
255 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 252 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
256 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 253 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
257 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 254 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
258 255
259 /* 256 /*
260 * FLASH and environment organization 257 * FLASH and environment organization
261 */ 258 */
262 259
263 /* **** PISMO SUPPORT *** */ 260 /* **** PISMO SUPPORT *** */
264 #define CONFIG_NAND 261 #define CONFIG_NAND
265 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 262 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
266 #define CONFIG_NAND_OMAP_GPMC 263 #define CONFIG_NAND_OMAP_GPMC
267 #define CONFIG_NAND_OMAP_GPMC_PREFETCH 264 #define CONFIG_NAND_OMAP_GPMC_PREFETCH
268 #define CONFIG_ENV_IS_IN_NAND 265 #define CONFIG_ENV_IS_IN_NAND
269 #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */ 266 #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
270 267
271 /* Redundant Environment */ 268 /* Redundant Environment */
272 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 269 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
273 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 270 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
274 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 271 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
275 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 272 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
276 2 * CONFIG_SYS_ENV_SECT_SIZE) 273 2 * CONFIG_SYS_ENV_SECT_SIZE)
277 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 274 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
278 275
279 /* Flash banks JFFS2 should use */ 276 /* Flash banks JFFS2 should use */
280 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ 277 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
281 CONFIG_SYS_MAX_NAND_DEVICE) 278 CONFIG_SYS_MAX_NAND_DEVICE)
282 #define CONFIG_SYS_JFFS2_MEM_NAND 279 #define CONFIG_SYS_JFFS2_MEM_NAND
283 /* use flash_info[2] */ 280 /* use flash_info[2] */
284 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS 281 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
285 #define CONFIG_SYS_JFFS2_NUM_BANKS 1 282 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
286 283
287 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 284 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
288 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 285 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
289 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 286 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
290 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 287 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
291 CONFIG_SYS_INIT_RAM_SIZE - \ 288 CONFIG_SYS_INIT_RAM_SIZE - \
292 GENERATED_GBL_DATA_SIZE) 289 GENERATED_GBL_DATA_SIZE)
293 290
294 /* Defines for SPL */ 291 /* Defines for SPL */
295 #define CONFIG_SPL_FRAMEWORK 292 #define CONFIG_SPL_FRAMEWORK
296 #define CONFIG_SPL_BOARD_INIT 293 #define CONFIG_SPL_BOARD_INIT
297 #define CONFIG_SPL_NAND_SIMPLE 294 #define CONFIG_SPL_NAND_SIMPLE
298 295
299 #define CONFIG_SPL_NAND_BASE 296 #define CONFIG_SPL_NAND_BASE
300 #define CONFIG_SPL_NAND_DRIVERS 297 #define CONFIG_SPL_NAND_DRIVERS
301 #define CONFIG_SPL_NAND_ECC 298 #define CONFIG_SPL_NAND_ECC
302 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" 299 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
303 300
304 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 301 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
305 #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ 302 #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
306 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 303 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
307 304
308 /* move malloc and bss high to prevent clashing with the main image */ 305 /* move malloc and bss high to prevent clashing with the main image */
309 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 306 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
310 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 307 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
311 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ 308 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
312 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 309 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
313 310
314 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 311 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
315 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 312 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
316 313
317 /* NAND boot config */ 314 /* NAND boot config */
318 #define CONFIG_SYS_NAND_PAGE_COUNT 64 315 #define CONFIG_SYS_NAND_PAGE_COUNT 64
319 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 316 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
320 #define CONFIG_SYS_NAND_OOBSIZE 64 317 #define CONFIG_SYS_NAND_OOBSIZE 64
321 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 318 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
322 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 319 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
323 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 320 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
324 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ 321 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
325 48, 49, 50, 51, 52, 53, 54, 55,\ 322 48, 49, 50, 51, 52, 53, 54, 55,\
326 56, 57, 58, 59, 60, 61, 62, 63} 323 56, 57, 58, 59, 60, 61, 62, 63}
327 #define CONFIG_SYS_NAND_ECCSIZE 256 324 #define CONFIG_SYS_NAND_ECCSIZE 256
328 #define CONFIG_SYS_NAND_ECCBYTES 3 325 #define CONFIG_SYS_NAND_ECCBYTES 3
329 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW 326 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
330 #define CONFIG_SPL_NAND_SOFTECC 327 #define CONFIG_SPL_NAND_SOFTECC
331 328
332 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 329 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
333 330
334 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 331 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
335 332
336 /* 333 /*
337 * ethernet support 334 * ethernet support
338 * 335 *
339 */ 336 */
340 #if defined(CONFIG_CMD_NET) 337 #if defined(CONFIG_CMD_NET)
341 #define CONFIG_DRIVER_TI_EMAC 338 #define CONFIG_DRIVER_TI_EMAC
342 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 339 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
343 #define CONFIG_MII 340 #define CONFIG_MII
344 #define CONFIG_BOOTP_DNS 341 #define CONFIG_BOOTP_DNS
345 #define CONFIG_BOOTP_DNS2 342 #define CONFIG_BOOTP_DNS2
346 #define CONFIG_BOOTP_SEND_HOSTNAME 343 #define CONFIG_BOOTP_SEND_HOSTNAME
347 #define CONFIG_NET_RETRY_COUNT 10 344 #define CONFIG_NET_RETRY_COUNT 10
348 #endif 345 #endif
349 346
350 #define CONFIG_SPLASH_SCREEN 347 #define CONFIG_SPLASH_SCREEN
351 #define CONFIG_VIDEO_BMP_RLE8 348 #define CONFIG_VIDEO_BMP_RLE8
352 #define CONFIG_VIDEO_OMAP3 349 #define CONFIG_VIDEO_OMAP3
353 350
354 #endif /* __CONFIG_H */ 351 #endif /* __CONFIG_H */
355 352
include/configs/mt_ventoux.h
Diff comments   View file @ 68ccab5
1 /* 1 /*
2 * Copyright (C) 2011 2 * Copyright (C) 2011
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de. 3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4 * 4 *
5 * 5 *
6 * Configuration settings for the Teejet mt_ventoux board. 6 * Configuration settings for the Teejet mt_ventoux board.
7 * 7 *
8 * Copyright (C) 2009 TechNexion Ltd. 8 * Copyright (C) 2009 TechNexion Ltd.
9 * 9 *
10 * SPDX-License-Identifier: GPL-2.0+ 10 * SPDX-License-Identifier: GPL-2.0+
11 */ 11 */
12 12
13 #ifndef __CONFIG_H 13 #ifndef __CONFIG_H
14 #define __CONFIG_H 14 #define __CONFIG_H
15 15
16 #include "tam3517-common.h" 16 #include "tam3517-common.h"
17 17
18 #undef CONFIG_SYS_MALLOC_LEN 18 #undef CONFIG_SYS_MALLOC_LEN
19 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \ 19 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
20 6 * 1024 * 1024) 20 6 * 1024 * 1024)
21 21
22 #define CONFIG_MACH_TYPE MACH_TYPE_AM3517_MT_VENTOUX 22 #define CONFIG_MACH_TYPE MACH_TYPE_AM3517_MT_VENTOUX
23 23
24 #define CONFIG_BOOTFILE "uImage" 24 #define CONFIG_BOOTFILE "uImage"
25 #define CONFIG_AUTO_COMPLETE 25 #define CONFIG_AUTO_COMPLETE
26 26
27 #define CONFIG_OMAP3_GPIO_4
28 #define CONFIG_HOSTNAME mt_ventoux 27 #define CONFIG_HOSTNAME mt_ventoux
29 28
30 /* 29 /*
31 * Set its own mtdparts, different from common 30 * Set its own mtdparts, different from common
32 */ 31 */
33 #undef MTDIDS_DEFAULT 32 #undef MTDIDS_DEFAULT
34 #undef MTDPARTS_DEFAULT 33 #undef MTDPARTS_DEFAULT
35 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 34 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
36 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \ 35 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
37 "1m(u-boot),256k(env1)," \ 36 "1m(u-boot),256k(env1)," \
38 "256k(env2),8m(ubisystem),-(rootfs)" 37 "256k(env2),8m(ubisystem),-(rootfs)"
39 38
40 /* 39 /*
41 * FPGA 40 * FPGA
42 */ 41 */
43 #define CONFIG_CMD_FPGA_LOADMK 42 #define CONFIG_CMD_FPGA_LOADMK
44 #define CONFIG_FPGA 43 #define CONFIG_FPGA
45 #define CONFIG_FPGA_XILINX 44 #define CONFIG_FPGA_XILINX
46 #define CONFIG_FPGA_SPARTAN3 45 #define CONFIG_FPGA_SPARTAN3
47 #define CONFIG_SYS_FPGA_PROG_FEEDBACK 46 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
48 #define CONFIG_SYS_FPGA_WAIT 10000 47 #define CONFIG_SYS_FPGA_WAIT 10000
49 #define CONFIG_MAX_FPGA_DEVICES 1 48 #define CONFIG_MAX_FPGA_DEVICES 1
50 #define CONFIG_FPGA_DELAY() udelay(1) 49 #define CONFIG_FPGA_DELAY() udelay(1)
51 #define CONFIG_SYS_FPGA_PROG_FEEDBACK 50 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
52 51
53 #define CONFIG_SPLASH_SCREEN 52 #define CONFIG_SPLASH_SCREEN
54 #define CONFIG_VIDEO_BMP_RLE8 53 #define CONFIG_VIDEO_BMP_RLE8
55 #define CONFIG_VIDEO_OMAP3 /* DSS Support */ 54 #define CONFIG_VIDEO_OMAP3 /* DSS Support */
56 55
57 #define CONFIG_EXTRA_ENV_SETTINGS CONFIG_TAM3517_SETTINGS \ 56 #define CONFIG_EXTRA_ENV_SETTINGS CONFIG_TAM3517_SETTINGS \
58 "bootcmd=run net_nfs\0" 57 "bootcmd=run net_nfs\0"
59 58
60 #endif /* __CONFIG_H */ 59 #endif /* __CONFIG_H */
61 60
include/configs/omap3_beagle.h
Diff comments   View file @ 68ccab5
1 /* 1 /*
2 * (C) Copyright 2006-2008 2 * (C) Copyright 2006-2008
3 * Texas Instruments. 3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com> 4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 * 6 *
7 * Configuration settings for the TI OMAP3530 Beagle board. 7 * Configuration settings for the TI OMAP3530 Beagle board.
8 * 8 *
9 * SPDX-License-Identifier: GPL-2.0+ 9 * SPDX-License-Identifier: GPL-2.0+
10 */ 10 */
11 11
12 #ifndef __CONFIG_H 12 #ifndef __CONFIG_H
13 #define __CONFIG_H 13 #define __CONFIG_H
14 14
15 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 15 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
16 16
17 /* 17 /*
18 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 18 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
19 * 64 bytes before this address should be set aside for u-boot.img's 19 * 64 bytes before this address should be set aside for u-boot.img's
20 * header. That is 0x800FFFC0--0x80100000 should not be used for any 20 * header. That is 0x800FFFC0--0x80100000 should not be used for any
21 * other needs. We use this rather than the inherited defines from 21 * other needs. We use this rather than the inherited defines from
22 * ti_armv7_common.h for backwards compatibility. 22 * ti_armv7_common.h for backwards compatibility.
23 */ 23 */
24 #define CONFIG_SYS_TEXT_BASE 0x80100000 24 #define CONFIG_SYS_TEXT_BASE 0x80100000
25 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 25 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
26 #define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */ 26 #define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */
27 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 27 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
28 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 28 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
29 29
30 #include <configs/ti_omap3_common.h> 30 #include <configs/ti_omap3_common.h>
31 31
32 #define CONFIG_MISC_INIT_R 32 #define CONFIG_MISC_INIT_R
33 33
34 #define CONFIG_REVISION_TAG 1 34 #define CONFIG_REVISION_TAG 1
35 #define CONFIG_ENV_OVERWRITE 35 #define CONFIG_ENV_OVERWRITE
36 36
37 /* Status LED */ 37 /* Status LED */
38 38
39 /* Enable Multi Bus support for I2C */ 39 /* Enable Multi Bus support for I2C */
40 #define CONFIG_I2C_MULTI_BUS 1 40 #define CONFIG_I2C_MULTI_BUS 1
41 41
42 /* Probe all devices */ 42 /* Probe all devices */
43 #define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}} 43 #define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}}
44 44
45 /* USB */ 45 /* USB */
46 #define CONFIG_USB_MUSB_OMAP2PLUS 46 #define CONFIG_USB_MUSB_OMAP2PLUS
47 #define CONFIG_USB_MUSB_PIO_ONLY 47 #define CONFIG_USB_MUSB_PIO_ONLY
48 #define CONFIG_TWL4030_USB 1 48 #define CONFIG_TWL4030_USB 1
49 #define CONFIG_USB_ETHER 49 #define CONFIG_USB_ETHER
50 #define CONFIG_USB_ETHER_RNDIS 50 #define CONFIG_USB_ETHER_RNDIS
51 #define CONFIG_USB_FUNCTION_FASTBOOT 51 #define CONFIG_USB_FUNCTION_FASTBOOT
52 #define CONFIG_CMD_FASTBOOT 52 #define CONFIG_CMD_FASTBOOT
53 #define CONFIG_ANDROID_BOOT_IMAGE 53 #define CONFIG_ANDROID_BOOT_IMAGE
54 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 54 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
55 #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 55 #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
56 56
57 /* USB EHCI */ 57 /* USB EHCI */
58 #define CONFIG_USB_EHCI 58 #define CONFIG_USB_EHCI
59 59
60 #define CONFIG_USB_EHCI_OMAP 60 #define CONFIG_USB_EHCI_OMAP
61 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147 61 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147
62 62
63 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 63 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
64 #define CONFIG_USB_HOST_ETHER 64 #define CONFIG_USB_HOST_ETHER
65 #define CONFIG_USB_ETHER_ASIX 65 #define CONFIG_USB_ETHER_ASIX
66 #define CONFIG_USB_ETHER_MCS7830 66 #define CONFIG_USB_ETHER_MCS7830
67 #define CONFIG_USB_ETHER_SMSC95XX 67 #define CONFIG_USB_ETHER_SMSC95XX
68 68
69 /* GPIO banks */
70 #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */
71 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
72
73 /* commands to include */ 69 /* commands to include */
74 70
75 #define MTDIDS_DEFAULT "nand0=nand" 71 #define MTDIDS_DEFAULT "nand0=nand"
76 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 72 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
77 "1920k(u-boot),128k(u-boot-env),"\ 73 "1920k(u-boot),128k(u-boot-env),"\
78 "4m(kernel),-(fs)" 74 "4m(kernel),-(fs)"
79 75
80 #define CONFIG_CMD_NAND /* NAND support */ 76 #define CONFIG_CMD_NAND /* NAND support */
81 77
82 #define CONFIG_VIDEO_OMAP3 /* DSS Support */ 78 #define CONFIG_VIDEO_OMAP3 /* DSS Support */
83 79
84 /* 80 /*
85 * TWL4030 81 * TWL4030
86 */ 82 */
87 #define CONFIG_TWL4030_LED 1 83 #define CONFIG_TWL4030_LED 1
88 84
89 /* 85 /*
90 * Board NAND Info. 86 * Board NAND Info.
91 */ 87 */
92 #define CONFIG_NAND_OMAP_GPMC 88 #define CONFIG_NAND_OMAP_GPMC
93 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 89 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
94 /* devices */ 90 /* devices */
95 91
96 #define BOOT_TARGET_DEVICES(func) \ 92 #define BOOT_TARGET_DEVICES(func) \
97 func(MMC, mmc, 0) 93 func(MMC, mmc, 0)
98 94
99 #define CONFIG_BOOTCOMMAND \ 95 #define CONFIG_BOOTCOMMAND \
100 "run findfdt; " \ 96 "run findfdt; " \
101 "run distro_bootcmd; " \ 97 "run distro_bootcmd; " \
102 "mmc dev ${mmcdev}; if mmc rescan; then " \ 98 "mmc dev ${mmcdev}; if mmc rescan; then " \
103 "if run userbutton; then " \ 99 "if run userbutton; then " \
104 "setenv bootenv uEnv.txt;" \ 100 "setenv bootenv uEnv.txt;" \
105 "else " \ 101 "else " \
106 "setenv bootenv user.txt;" \ 102 "setenv bootenv user.txt;" \
107 "fi;" \ 103 "fi;" \
108 "echo SD/MMC found on device ${mmcdev};" \ 104 "echo SD/MMC found on device ${mmcdev};" \
109 "if run loadbootenv; then " \ 105 "if run loadbootenv; then " \
110 "echo Loaded environment from ${bootenv};" \ 106 "echo Loaded environment from ${bootenv};" \
111 "run importbootenv;" \ 107 "run importbootenv;" \
112 "fi;" \ 108 "fi;" \
113 "if test -n $uenvcmd; then " \ 109 "if test -n $uenvcmd; then " \
114 "echo Running uenvcmd ...;" \ 110 "echo Running uenvcmd ...;" \
115 "run uenvcmd;" \ 111 "run uenvcmd;" \
116 "fi;" \ 112 "fi;" \
117 "if run loadbootscript; then " \ 113 "if run loadbootscript; then " \
118 "run bootscript; " \ 114 "run bootscript; " \
119 "else " \ 115 "else " \
120 "if run loadimage; then " \ 116 "if run loadimage; then " \
121 "run mmcboot;" \ 117 "run mmcboot;" \
122 "fi;" \ 118 "fi;" \
123 "fi; " \ 119 "fi; " \
124 "fi;" \ 120 "fi;" \
125 "run nandboot;" \ 121 "run nandboot;" \
126 "setenv bootfile zImage;" \ 122 "setenv bootfile zImage;" \
127 "if run loadimage; then " \ 123 "if run loadimage; then " \
128 "run loadfdt;" \ 124 "run loadfdt;" \
129 "run mmcbootz; " \ 125 "run mmcbootz; " \
130 "fi; " \ 126 "fi; " \
131 127
132 #include <config_distro_bootcmd.h> 128 #include <config_distro_bootcmd.h>
133 129
134 #define CONFIG_EXTRA_ENV_SETTINGS \ 130 #define CONFIG_EXTRA_ENV_SETTINGS \
135 "loadaddr=0x80200000\0" \ 131 "loadaddr=0x80200000\0" \
136 "kernel_addr_r=0x80200000\0" \ 132 "kernel_addr_r=0x80200000\0" \
137 "rdaddr=0x81000000\0" \ 133 "rdaddr=0x81000000\0" \
138 "initrd_addr_r=0x81000000\0" \ 134 "initrd_addr_r=0x81000000\0" \
139 "fdt_high=0xffffffff\0" \ 135 "fdt_high=0xffffffff\0" \
140 "fdtaddr=0x80f80000\0" \ 136 "fdtaddr=0x80f80000\0" \
141 "fdt_addr_r=0x80f80000\0" \ 137 "fdt_addr_r=0x80f80000\0" \
142 "usbtty=cdc_acm\0" \ 138 "usbtty=cdc_acm\0" \
143 "bootfile=uImage\0" \ 139 "bootfile=uImage\0" \
144 "ramdisk=ramdisk.gz\0" \ 140 "ramdisk=ramdisk.gz\0" \
145 "bootdir=/boot\0" \ 141 "bootdir=/boot\0" \
146 "bootpart=0:2\0" \ 142 "bootpart=0:2\0" \
147 "console=ttyO2,115200n8\0" \ 143 "console=ttyO2,115200n8\0" \
148 "mpurate=auto\0" \ 144 "mpurate=auto\0" \
149 "buddy=none\0" \ 145 "buddy=none\0" \
150 "optargs=\0" \ 146 "optargs=\0" \
151 "camera=none\0" \ 147 "camera=none\0" \
152 "vram=12M\0" \ 148 "vram=12M\0" \
153 "dvimode=640x480MR-16@60\0" \ 149 "dvimode=640x480MR-16@60\0" \
154 "defaultdisplay=dvi\0" \ 150 "defaultdisplay=dvi\0" \
155 "mmcdev=0\0" \ 151 "mmcdev=0\0" \
156 "mmcroot=/dev/mmcblk0p2 rw\0" \ 152 "mmcroot=/dev/mmcblk0p2 rw\0" \
157 "mmcrootfstype=ext3 rootwait\0" \ 153 "mmcrootfstype=ext3 rootwait\0" \
158 "nandroot=ubi0:rootfs ubi.mtd=4\0" \ 154 "nandroot=ubi0:rootfs ubi.mtd=4\0" \
159 "nandrootfstype=ubifs\0" \ 155 "nandrootfstype=ubifs\0" \
160 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \ 156 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \
161 "ramrootfstype=ext2\0" \ 157 "ramrootfstype=ext2\0" \
162 "mmcargs=setenv bootargs console=${console} " \ 158 "mmcargs=setenv bootargs console=${console} " \
163 "${optargs} " \ 159 "${optargs} " \
164 "mpurate=${mpurate} " \ 160 "mpurate=${mpurate} " \
165 "buddy=${buddy} "\ 161 "buddy=${buddy} "\
166 "camera=${camera} "\ 162 "camera=${camera} "\
167 "vram=${vram} " \ 163 "vram=${vram} " \
168 "omapfb.mode=dvi:${dvimode} " \ 164 "omapfb.mode=dvi:${dvimode} " \
169 "omapdss.def_disp=${defaultdisplay} " \ 165 "omapdss.def_disp=${defaultdisplay} " \
170 "root=${mmcroot} " \ 166 "root=${mmcroot} " \
171 "rootfstype=${mmcrootfstype}\0" \ 167 "rootfstype=${mmcrootfstype}\0" \
172 "nandargs=setenv bootargs console=${console} " \ 168 "nandargs=setenv bootargs console=${console} " \
173 "${optargs} " \ 169 "${optargs} " \
174 "mpurate=${mpurate} " \ 170 "mpurate=${mpurate} " \
175 "buddy=${buddy} "\ 171 "buddy=${buddy} "\
176 "camera=${camera} "\ 172 "camera=${camera} "\
177 "vram=${vram} " \ 173 "vram=${vram} " \
178 "omapfb.mode=dvi:${dvimode} " \ 174 "omapfb.mode=dvi:${dvimode} " \
179 "omapdss.def_disp=${defaultdisplay} " \ 175 "omapdss.def_disp=${defaultdisplay} " \
180 "root=${nandroot} " \ 176 "root=${nandroot} " \
181 "rootfstype=${nandrootfstype}\0" \ 177 "rootfstype=${nandrootfstype}\0" \
182 "findfdt=" \ 178 "findfdt=" \
183 "if test $beaglerev = AxBx; then " \ 179 "if test $beaglerev = AxBx; then " \
184 "setenv fdtfile omap3-beagle.dtb; fi; " \ 180 "setenv fdtfile omap3-beagle.dtb; fi; " \
185 "if test $beaglerev = Cx; then " \ 181 "if test $beaglerev = Cx; then " \
186 "setenv fdtfile omap3-beagle.dtb; fi; " \ 182 "setenv fdtfile omap3-beagle.dtb; fi; " \
187 "if test $beaglerev = C4; then " \ 183 "if test $beaglerev = C4; then " \
188 "setenv fdtfile omap3-beagle.dtb; fi; " \ 184 "setenv fdtfile omap3-beagle.dtb; fi; " \
189 "if test $beaglerev = xMAB; then " \ 185 "if test $beaglerev = xMAB; then " \
190 "setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \ 186 "setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \
191 "if test $beaglerev = xMC; then " \ 187 "if test $beaglerev = xMC; then " \
192 "setenv fdtfile omap3-beagle-xm.dtb; fi; " \ 188 "setenv fdtfile omap3-beagle-xm.dtb; fi; " \
193 "if test $fdtfile = undefined; then " \ 189 "if test $fdtfile = undefined; then " \
194 "echo WARNING: Could not determine device tree to use; fi; \0" \ 190 "echo WARNING: Could not determine device tree to use; fi; \0" \
195 "validatefdt=" \ 191 "validatefdt=" \
196 "if test $beaglerev = xMAB; then " \ 192 "if test $beaglerev = xMAB; then " \
197 "if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \ 193 "if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \
198 "setenv fdtfile omap3-beagle-xm.dtb; " \ 194 "setenv fdtfile omap3-beagle-xm.dtb; " \
199 "fi; " \ 195 "fi; " \
200 "fi; \0" \ 196 "fi; \0" \
201 "bootenv=uEnv.txt\0" \ 197 "bootenv=uEnv.txt\0" \
202 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ 198 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
203 "importbootenv=echo Importing environment from mmc ...; " \ 199 "importbootenv=echo Importing environment from mmc ...; " \
204 "env import -t -r $loadaddr $filesize\0" \ 200 "env import -t -r $loadaddr $filesize\0" \
205 "ramargs=setenv bootargs console=${console} " \ 201 "ramargs=setenv bootargs console=${console} " \
206 "${optargs} " \ 202 "${optargs} " \
207 "mpurate=${mpurate} " \ 203 "mpurate=${mpurate} " \
208 "buddy=${buddy} "\ 204 "buddy=${buddy} "\
209 "vram=${vram} " \ 205 "vram=${vram} " \
210 "omapfb.mode=dvi:${dvimode} " \ 206 "omapfb.mode=dvi:${dvimode} " \
211 "omapdss.def_disp=${defaultdisplay} " \ 207 "omapdss.def_disp=${defaultdisplay} " \
212 "root=${ramroot} " \ 208 "root=${ramroot} " \
213 "rootfstype=${ramrootfstype}\0" \ 209 "rootfstype=${ramrootfstype}\0" \
214 "loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \ 210 "loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \
215 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ 211 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
216 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 212 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
217 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ 213 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
218 "source ${loadaddr}\0" \ 214 "source ${loadaddr}\0" \
219 "loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ 215 "loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
220 "mmcboot=echo Booting from mmc ...; " \ 216 "mmcboot=echo Booting from mmc ...; " \
221 "run mmcargs; " \ 217 "run mmcargs; " \
222 "bootm ${loadaddr}\0" \ 218 "bootm ${loadaddr}\0" \
223 "mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \ 219 "mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
224 "run mmcargs; " \ 220 "run mmcargs; " \
225 "bootz ${loadaddr} - ${fdtaddr}\0" \ 221 "bootz ${loadaddr} - ${fdtaddr}\0" \
226 "nandboot=echo Booting from nand ...; " \ 222 "nandboot=echo Booting from nand ...; " \
227 "run nandargs; " \ 223 "run nandargs; " \
228 "nand read ${loadaddr} 280000 400000; " \ 224 "nand read ${loadaddr} 280000 400000; " \
229 "bootm ${loadaddr}\0" \ 225 "bootm ${loadaddr}\0" \
230 "ramboot=echo Booting from ramdisk ...; " \ 226 "ramboot=echo Booting from ramdisk ...; " \
231 "run ramargs; " \ 227 "run ramargs; " \
232 "bootm ${loadaddr}\0" \ 228 "bootm ${loadaddr}\0" \
233 "userbutton=if gpio input 173; then run userbutton_xm; " \ 229 "userbutton=if gpio input 173; then run userbutton_xm; " \
234 "else run userbutton_nonxm; fi;\0" \ 230 "else run userbutton_nonxm; fi;\0" \
235 "userbutton_xm=gpio input 4;\0" \ 231 "userbutton_xm=gpio input 4;\0" \
236 "userbutton_nonxm=gpio input 7;\0" \ 232 "userbutton_nonxm=gpio input 7;\0" \
237 BOOTENV 233 BOOTENV
238 234
239 /* 235 /*
240 * OMAP3 has 12 GP timers, they can be driven by the system clock 236 * OMAP3 has 12 GP timers, they can be driven by the system clock
241 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 237 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
242 * This rate is divided by a local divisor. 238 * This rate is divided by a local divisor.
243 */ 239 */
244 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 240 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
245 241
246 /*----------------------------------------------------------------------- 242 /*-----------------------------------------------------------------------
247 * FLASH and environment organization 243 * FLASH and environment organization
248 */ 244 */
249 245
250 /* **** PISMO SUPPORT *** */ 246 /* **** PISMO SUPPORT *** */
251 #if defined(CONFIG_CMD_NAND) 247 #if defined(CONFIG_CMD_NAND)
252 #define CONFIG_SYS_FLASH_BASE NAND_BASE 248 #define CONFIG_SYS_FLASH_BASE NAND_BASE
253 #endif 249 #endif
254 250
255 /* Monitor at start of flash */ 251 /* Monitor at start of flash */
256 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 252 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
257 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 253 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
258 254
259 #define CONFIG_ENV_IS_IN_NAND 1 255 #define CONFIG_ENV_IS_IN_NAND 1
260 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 256 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
261 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 257 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
262 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 258 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
263 259
264 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 260 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
265 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 261 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
266 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 262 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
267 263
268 #define CONFIG_OMAP3_SPI 264 #define CONFIG_OMAP3_SPI
269 265
270 /* Defines for SPL */ 266 /* Defines for SPL */
271 #define CONFIG_SPL_OMAP3_ID_NAND 267 #define CONFIG_SPL_OMAP3_ID_NAND
272 268
273 /* NAND boot config */ 269 /* NAND boot config */
274 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 270 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
275 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 271 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
276 #define CONFIG_SYS_NAND_PAGE_COUNT 64 272 #define CONFIG_SYS_NAND_PAGE_COUNT 64
277 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 273 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
278 #define CONFIG_SYS_NAND_OOBSIZE 64 274 #define CONFIG_SYS_NAND_OOBSIZE 64
279 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 275 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
280 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 276 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
281 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 277 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
282 10, 11, 12, 13} 278 10, 11, 12, 13}
283 #define CONFIG_SYS_NAND_ECCSIZE 512 279 #define CONFIG_SYS_NAND_ECCSIZE 512
284 #define CONFIG_SYS_NAND_ECCBYTES 3 280 #define CONFIG_SYS_NAND_ECCBYTES 3
285 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 281 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
286 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 282 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
287 /* NAND: SPL falcon mode configs */ 283 /* NAND: SPL falcon mode configs */
288 #ifdef CONFIG_SPL_OS_BOOT 284 #ifdef CONFIG_SPL_OS_BOOT
289 #define CONFIG_CMD_SPL_NAND_OFS 0x240000 285 #define CONFIG_CMD_SPL_NAND_OFS 0x240000
290 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 286 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
291 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 287 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
292 #endif 288 #endif
293 289
294 #endif /* __CONFIG_H */ 290 #endif /* __CONFIG_H */
295 291
include/configs/omap3_igep00x0.h
Diff comments   View file @ 68ccab5
1 /* 1 /*
2 * Common configuration settings for IGEP technology based boards 2 * Common configuration settings for IGEP technology based boards
3 * 3 *
4 * (C) Copyright 2012 4 * (C) Copyright 2012
5 * ISEE 2007 SL, <www.iseebcn.com> 5 * ISEE 2007 SL, <www.iseebcn.com>
6 * 6 *
7 * SPDX-License-Identifier: GPL-2.0+ 7 * SPDX-License-Identifier: GPL-2.0+
8 */ 8 */
9 9
10 #ifndef __IGEP00X0_H 10 #ifndef __IGEP00X0_H
11 #define __IGEP00X0_H 11 #define __IGEP00X0_H
12 12
13 #define CONFIG_NR_DRAM_BANKS 2 13 #define CONFIG_NR_DRAM_BANKS 2
14 #define CONFIG_NAND 14 #define CONFIG_NAND
15 15
16 #include <configs/ti_omap3_common.h> 16 #include <configs/ti_omap3_common.h>
17 #include <asm/mach-types.h> 17 #include <asm/mach-types.h>
18 18
19 /* 19 /*
20 * We are only ever GP parts and will utilize all of the "downloaded image" 20 * We are only ever GP parts and will utilize all of the "downloaded image"
21 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB). 21 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
22 */ 22 */
23 #undef CONFIG_SPL_TEXT_BASE 23 #undef CONFIG_SPL_TEXT_BASE
24 #define CONFIG_SPL_TEXT_BASE 0x40200000 24 #define CONFIG_SPL_TEXT_BASE 0x40200000
25 25
26 #define CONFIG_MISC_INIT_R 26 #define CONFIG_MISC_INIT_R
27 27
28 #define CONFIG_REVISION_TAG 1 28 #define CONFIG_REVISION_TAG 1
29 29
30 /* Status LED available for IGEP0020 and IGEP0030 but not IGEP0032 */ 30 /* Status LED available for IGEP0020 and IGEP0030 but not IGEP0032 */
31 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \ 31 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
32 (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) 32 (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
33 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) 33 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020)
34 #define RED_LED_GPIO 27 34 #define RED_LED_GPIO 27
35 #elif (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) 35 #elif (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
36 #define RED_LED_GPIO 16 36 #define RED_LED_GPIO 16
37 #endif 37 #endif
38 #endif 38 #endif
39 39
40 /* GPIO banks */
41 #define CONFIG_OMAP3_GPIO_3 /* GPIO64 .. 95 is in GPIO bank 3 */
42 #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */
43 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
44
45 /* USB */ 40 /* USB */
46 #define CONFIG_USB_MUSB_UDC 1 41 #define CONFIG_USB_MUSB_UDC 1
47 #define CONFIG_USB_OMAP3 1 42 #define CONFIG_USB_OMAP3 1
48 #define CONFIG_TWL4030_USB 1 43 #define CONFIG_TWL4030_USB 1
49 44
50 /* USB device configuration */ 45 /* USB device configuration */
51 #define CONFIG_USB_DEVICE 1 46 #define CONFIG_USB_DEVICE 1
52 #define CONFIG_USB_TTY 1 47 #define CONFIG_USB_TTY 1
53 48
54 /* Change these to suit your needs */ 49 /* Change these to suit your needs */
55 #define CONFIG_USBD_VENDORID 0x0451 50 #define CONFIG_USBD_VENDORID 0x0451
56 #define CONFIG_USBD_PRODUCTID 0x5678 51 #define CONFIG_USBD_PRODUCTID 0x5678
57 #define CONFIG_USBD_MANUFACTURER "Texas Instruments" 52 #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
58 #define CONFIG_USBD_PRODUCT_NAME "IGEP" 53 #define CONFIG_USBD_PRODUCT_NAME "IGEP"
59 54
60 #define CONFIG_CMD_MTDPARTS 55 #define CONFIG_CMD_MTDPARTS
61 #define CONFIG_CMD_ONENAND 56 #define CONFIG_CMD_ONENAND
62 57
63 #ifndef CONFIG_SPL_BUILD 58 #ifndef CONFIG_SPL_BUILD
64 59
65 /* Environment */ 60 /* Environment */
66 #define ENV_DEVICE_SETTINGS \ 61 #define ENV_DEVICE_SETTINGS \
67 "stdin=serial\0" \ 62 "stdin=serial\0" \
68 "stdout=serial\0" \ 63 "stdout=serial\0" \
69 "stderr=serial\0" 64 "stderr=serial\0"
70 65
71 #define MEM_LAYOUT_SETTINGS \ 66 #define MEM_LAYOUT_SETTINGS \
72 DEFAULT_LINUX_BOOT_ENV \ 67 DEFAULT_LINUX_BOOT_ENV \
73 "scriptaddr=0x87E00000\0" \ 68 "scriptaddr=0x87E00000\0" \
74 "pxefile_addr_r=0x87F00000\0" 69 "pxefile_addr_r=0x87F00000\0"
75 70
76 #define BOOT_TARGET_DEVICES(func) \ 71 #define BOOT_TARGET_DEVICES(func) \
77 func(MMC, mmc, 0) 72 func(MMC, mmc, 0)
78 73
79 #include <config_distro_bootcmd.h> 74 #include <config_distro_bootcmd.h>
80 75
81 #define CONFIG_EXTRA_ENV_SETTINGS \ 76 #define CONFIG_EXTRA_ENV_SETTINGS \
82 ENV_DEVICE_SETTINGS \ 77 ENV_DEVICE_SETTINGS \
83 MEM_LAYOUT_SETTINGS \ 78 MEM_LAYOUT_SETTINGS \
84 BOOTENV 79 BOOTENV
85 80
86 #endif 81 #endif
87 82
88 /* 83 /*
89 * SMSC911x Ethernet 84 * SMSC911x Ethernet
90 */ 85 */
91 #if defined(CONFIG_CMD_NET) 86 #if defined(CONFIG_CMD_NET)
92 #define CONFIG_SMC911X 87 #define CONFIG_SMC911X
93 #define CONFIG_SMC911X_32_BIT 88 #define CONFIG_SMC911X_32_BIT
94 #define CONFIG_SMC911X_BASE 0x2C000000 89 #define CONFIG_SMC911X_BASE 0x2C000000
95 #endif /* (CONFIG_CMD_NET) */ 90 #endif /* (CONFIG_CMD_NET) */
96 91
97 #define CONFIG_RBTREE 92 #define CONFIG_RBTREE
98 #define CONFIG_MTD_PARTITIONS 93 #define CONFIG_MTD_PARTITIONS
99 #define CONFIG_SYS_MTDPARTS_RUNTIME 94 #define CONFIG_SYS_MTDPARTS_RUNTIME
100 95
101 /* OneNAND config */ 96 /* OneNAND config */
102 #define CONFIG_USE_ONENAND_BOARD_INIT 97 #define CONFIG_USE_ONENAND_BOARD_INIT
103 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 98 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
104 #define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024) 99 #define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024)
105 100
106 /* NAND config */ 101 /* NAND config */
107 #define CONFIG_SPL_OMAP3_ID_NAND 102 #define CONFIG_SPL_OMAP3_ID_NAND
108 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 103 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
109 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 104 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
110 #define CONFIG_SYS_NAND_PAGE_COUNT 64 105 #define CONFIG_SYS_NAND_PAGE_COUNT 64
111 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 106 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
112 #define CONFIG_SYS_NAND_OOBSIZE 64 107 #define CONFIG_SYS_NAND_OOBSIZE 64
113 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 108 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
114 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 109 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
115 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 110 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
116 10, 11, 12, 13, 14, 15, 16, 17, \ 111 10, 11, 12, 13, 14, 15, 16, 17, \
117 18, 19, 20, 21, 22, 23, 24, 25, \ 112 18, 19, 20, 21, 22, 23, 24, 25, \
118 26, 27, 28, 29, 30, 31, 32, 33, \ 113 26, 27, 28, 29, 30, 31, 32, 33, \
119 34, 35, 36, 37, 38, 39, 40, 41, \ 114 34, 35, 36, 37, 38, 39, 40, 41, \
120 42, 43, 44, 45, 46, 47, 48, 49, \ 115 42, 43, 44, 45, 46, 47, 48, 49, \
121 50, 51, 52, 53, 54, 55, 56, 57, } 116 50, 51, 52, 53, 54, 55, 56, 57, }
122 #define CONFIG_SYS_NAND_ECCSIZE 512 117 #define CONFIG_SYS_NAND_ECCSIZE 512
123 #define CONFIG_SYS_NAND_ECCBYTES 14 118 #define CONFIG_SYS_NAND_ECCBYTES 14
124 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW 119 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
125 #define CONFIG_NAND_OMAP_GPMC 120 #define CONFIG_NAND_OMAP_GPMC
126 #define CONFIG_BCH 121 #define CONFIG_BCH
127 122
128 /* UBI configuration */ 123 /* UBI configuration */
129 #define CONFIG_SPL_UBI 1 124 #define CONFIG_SPL_UBI 1
130 #define CONFIG_SPL_UBI_MAX_VOL_LEBS 256 125 #define CONFIG_SPL_UBI_MAX_VOL_LEBS 256
131 #define CONFIG_SPL_UBI_MAX_PEB_SIZE (256*1024) 126 #define CONFIG_SPL_UBI_MAX_PEB_SIZE (256*1024)
132 #define CONFIG_SPL_UBI_MAX_PEBS 4096 127 #define CONFIG_SPL_UBI_MAX_PEBS 4096
133 #define CONFIG_SPL_UBI_VOL_IDS 8 128 #define CONFIG_SPL_UBI_VOL_IDS 8
134 #define CONFIG_SPL_UBI_LOAD_MONITOR_ID 0 129 #define CONFIG_SPL_UBI_LOAD_MONITOR_ID 0
135 #define CONFIG_SPL_UBI_LOAD_KERNEL_ID 3 130 #define CONFIG_SPL_UBI_LOAD_KERNEL_ID 3
136 #define CONFIG_SPL_UBI_LOAD_ARGS_ID 4 131 #define CONFIG_SPL_UBI_LOAD_ARGS_ID 4
137 #define CONFIG_SPL_UBI_PEB_OFFSET 4 132 #define CONFIG_SPL_UBI_PEB_OFFSET 4
138 #define CONFIG_SPL_UBI_VID_OFFSET 512 133 #define CONFIG_SPL_UBI_VID_OFFSET 512
139 #define CONFIG_SPL_UBI_LEB_START 2048 134 #define CONFIG_SPL_UBI_LEB_START 2048
140 #define CONFIG_SPL_UBI_INFO_ADDR 0x88080000 135 #define CONFIG_SPL_UBI_INFO_ADDR 0x88080000
141 136
142 /* environment organization */ 137 /* environment organization */
143 #define CONFIG_ENV_IS_NOWHERE 1 138 #define CONFIG_ENV_IS_NOWHERE 1
144 #define CONFIG_ENV_UBI_PART "UBI" 139 #define CONFIG_ENV_UBI_PART "UBI"
145 #define CONFIG_ENV_UBI_VOLUME "config" 140 #define CONFIG_ENV_UBI_VOLUME "config"
146 #define CONFIG_ENV_UBI_VOLUME_REDUND "config_r" 141 #define CONFIG_ENV_UBI_VOLUME_REDUND "config_r"
147 #define CONFIG_UBI_SILENCE_MSG 1 142 #define CONFIG_UBI_SILENCE_MSG 1
148 #define CONFIG_UBIFS_SILENCE_MSG 1 143 #define CONFIG_UBIFS_SILENCE_MSG 1
149 #define CONFIG_ENV_SIZE (32*1024) 144 #define CONFIG_ENV_SIZE (32*1024)
150 145
151 #endif /* __IGEP00X0_H */ 146 #endif /* __IGEP00X0_H */
152 147
include/configs/omap3_logic.h
Diff comments   View file @ 68ccab5
1 /* 1 /*
2 * (C) Copyright 2011 Logic Product Development <www.logicpd.com> 2 * (C) Copyright 2011 Logic Product Development <www.logicpd.com>
3 * Peter Barada <peter.barada@logicpd.com> 3 * Peter Barada <peter.barada@logicpd.com>
4 * 4 *
5 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo 5 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
6 * reference boards. 6 * reference boards.
7 * 7 *
8 * SPDX-License-Identifier: GPL-2.0+ 8 * SPDX-License-Identifier: GPL-2.0+
9 */ 9 */
10 10
11 #ifndef __CONFIG_H 11 #ifndef __CONFIG_H
12 #define __CONFIG_H 12 #define __CONFIG_H
13 13
14 /* High Level Configuration Options */ 14 /* High Level Configuration Options */
15 15
16 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 16 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
17 17
18 #include <configs/ti_omap3_common.h> 18 #include <configs/ti_omap3_common.h>
19 19
20 #ifdef CONFIG_SPL_BUILD 20 #ifdef CONFIG_SPL_BUILD
21 /* 21 /*
22 * Disable MMC DM for SPL build and can be re-enabled after adding 22 * Disable MMC DM for SPL build and can be re-enabled after adding
23 * DM support in SPL 23 * DM support in SPL
24 */ 24 */
25 #undef CONFIG_DM_MMC 25 #undef CONFIG_DM_MMC
26 #undef OMAP_HSMMC_USE_GPIO 26 #undef OMAP_HSMMC_USE_GPIO
27 27
28 /* select serial console configuration for SPL */ 28 /* select serial console configuration for SPL */
29 #undef CONFIG_CONS_INDEX 29 #undef CONFIG_CONS_INDEX
30 #define CONFIG_CONS_INDEX 1 30 #define CONFIG_CONS_INDEX 1
31 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 31 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
32 #endif 32 #endif
33 33
34 34
35 /* 35 /*
36 * We are only ever GP parts and will utilize all of the "downloaded image" 36 * We are only ever GP parts and will utilize all of the "downloaded image"
37 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in 37 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in
38 * order to allow for BCH8 to fit in. 38 * order to allow for BCH8 to fit in.
39 */ 39 */
40 #undef CONFIG_SPL_TEXT_BASE 40 #undef CONFIG_SPL_TEXT_BASE
41 #define CONFIG_SPL_FRAMEWORK 41 #define CONFIG_SPL_FRAMEWORK
42 #define CONFIG_SPL_TEXT_BASE 0x40200000 42 #define CONFIG_SPL_TEXT_BASE 0x40200000
43 43
44 #define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */ 44 #define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */
45 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 45 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
46 #define CONFIG_SETUP_MEMORY_TAGS 46 #define CONFIG_SETUP_MEMORY_TAGS
47 #define CONFIG_INITRD_TAG 47 #define CONFIG_INITRD_TAG
48 #define CONFIG_REVISION_TAG 48 #define CONFIG_REVISION_TAG
49 49
50 /* Hardware drivers */ 50 /* Hardware drivers */
51 51
52 /* GPIO banks */
53 #define CONFIG_OMAP3_GPIO_4 /* GPIO 96..128 is in GPIO bank 4 */
54 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
55
56 #define CONFIG_USB_OMAP3 52 #define CONFIG_USB_OMAP3
57 53
58 /* commands to include */ 54 /* commands to include */
59 #define CONFIG_CMD_NAND 55 #define CONFIG_CMD_NAND
60 #define CONFIG_CMD_MTDPARTS 56 #define CONFIG_CMD_MTDPARTS
61 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ 57 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
62 58
63 /* I2C */ 59 /* I2C */
64 #define CONFIG_SYS_I2C_OMAP34XX 60 #define CONFIG_SYS_I2C_OMAP34XX
65 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */ 61 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */
66 62
67 /* USB */ 63 /* USB */
68 #define CONFIG_USB_MUSB_OMAP2PLUS 64 #define CONFIG_USB_MUSB_OMAP2PLUS
69 #define CONFIG_USB_MUSB_PIO_ONLY 65 #define CONFIG_USB_MUSB_PIO_ONLY
70 #define CONFIG_USB_ETHER 66 #define CONFIG_USB_ETHER
71 #define CONFIG_USB_ETHER_RNDIS 67 #define CONFIG_USB_ETHER_RNDIS
72 #define CONFIG_USB_FUNCTION_FASTBOOT 68 #define CONFIG_USB_FUNCTION_FASTBOOT
73 #define CONFIG_CMD_FASTBOOT 69 #define CONFIG_CMD_FASTBOOT
74 #define CONFIG_ANDROID_BOOT_IMAGE 70 #define CONFIG_ANDROID_BOOT_IMAGE
75 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 71 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
76 #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 72 #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
77 73
78 /* TWL4030 */ 74 /* TWL4030 */
79 #define CONFIG_TWL4030_PWM 75 #define CONFIG_TWL4030_PWM
80 #define CONFIG_TWL4030_USB 76 #define CONFIG_TWL4030_USB
81 77
82 /* Board NAND Info. */ 78 /* Board NAND Info. */
83 #ifdef CONFIG_NAND 79 #ifdef CONFIG_NAND
84 #define CONFIG_NAND_OMAP_GPMC 80 #define CONFIG_NAND_OMAP_GPMC
85 81
86 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */ 82 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
87 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */ 83 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
88 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */ 84 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
89 85
90 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 86 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
91 /* to access nand */ 87 /* to access nand */
92 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 88 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
93 /* NAND devices */ 89 /* NAND devices */
94 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 90 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
95 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 91 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
96 #define CONFIG_SYS_NAND_PAGE_COUNT 64 92 #define CONFIG_SYS_NAND_PAGE_COUNT 64
97 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 93 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
98 #define CONFIG_SYS_NAND_OOBSIZE 64 94 #define CONFIG_SYS_NAND_OOBSIZE 64
99 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 95 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
100 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 96 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
101 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ 97 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
102 13, 14, 16, 17, 18, 19, 20, 21, 22, \ 98 13, 14, 16, 17, 18, 19, 20, 21, 22, \
103 23, 24, 25, 26, 27, 28, 30, 31, 32, \ 99 23, 24, 25, 26, 27, 28, 30, 31, 32, \
104 33, 34, 35, 36, 37, 38, 39, 40, 41, \ 100 33, 34, 35, 36, 37, 38, 39, 40, 41, \
105 42, 44, 45, 46, 47, 48, 49, 50, 51, \ 101 42, 44, 45, 46, 47, 48, 49, 50, 51, \
106 52, 53, 54, 55, 56} 102 52, 53, 54, 55, 56}
107 103
108 #define CONFIG_SYS_NAND_ECCSIZE 512 104 #define CONFIG_SYS_NAND_ECCSIZE 512
109 #define CONFIG_SYS_NAND_ECCBYTES 13 105 #define CONFIG_SYS_NAND_ECCBYTES 13
110 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW 106 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
111 #define CONFIG_BCH 107 #define CONFIG_BCH
112 #define CONFIG_SYS_NAND_MAX_OOBFREE 2 108 #define CONFIG_SYS_NAND_MAX_OOBFREE 2
113 #define CONFIG_SYS_NAND_MAX_ECCPOS 56 109 #define CONFIG_SYS_NAND_MAX_ECCPOS 56
114 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 110 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
115 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 111 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
116 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ 112 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
117 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 113 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
118 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"\ 114 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"\
119 "512k(MLO),"\ 115 "512k(MLO),"\
120 "1792k(u-boot),"\ 116 "1792k(u-boot),"\
121 "128k(spl-os)," \ 117 "128k(spl-os)," \
122 "128k(u-boot-env),"\ 118 "128k(u-boot-env),"\
123 "6m(kernel),-(fs)" 119 "6m(kernel),-(fs)"
124 #endif 120 #endif
125 121
126 /* Environment information */ 122 /* Environment information */
127 123
128 #define CONFIG_PREBOOT \ 124 #define CONFIG_PREBOOT \
129 "setenv preboot;" \ 125 "setenv preboot;" \
130 "nand unlock;" \ 126 "nand unlock;" \
131 "saveenv;" 127 "saveenv;"
132 128
133 #define CONFIG_EXTRA_ENV_SETTINGS \ 129 #define CONFIG_EXTRA_ENV_SETTINGS \
134 DEFAULT_LINUX_BOOT_ENV \ 130 DEFAULT_LINUX_BOOT_ENV \
135 "mtdids=" MTDIDS_DEFAULT "\0" \ 131 "mtdids=" MTDIDS_DEFAULT "\0" \
136 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 132 "mtdparts=" MTDPARTS_DEFAULT "\0" \
137 "mmcdev=0\0" \ 133 "mmcdev=0\0" \
138 "mmcroot=/dev/mmcblk0p2 rw\0" \ 134 "mmcroot=/dev/mmcblk0p2 rw\0" \
139 "mmcrootfstype=ext4 rootwait\0" \ 135 "mmcrootfstype=ext4 rootwait\0" \
140 "nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \ 136 "nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \
141 "nandrootfstype=ubifs rootwait\0" \ 137 "nandrootfstype=ubifs rootwait\0" \
142 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ 138 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
143 "if run loadbootscript; then " \ 139 "if run loadbootscript; then " \
144 "run bootscript; " \ 140 "run bootscript; " \
145 "else " \ 141 "else " \
146 "run defaultboot;" \ 142 "run defaultboot;" \
147 "fi; " \ 143 "fi; " \
148 "else run defaultboot; fi\0" \ 144 "else run defaultboot; fi\0" \
149 "defaultboot=run mmcramboot\0" \ 145 "defaultboot=run mmcramboot\0" \
150 "consoledevice=ttyO0\0" \ 146 "consoledevice=ttyO0\0" \
151 "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \ 147 "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
152 "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \ 148 "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
153 "rotation=0\0" \ 149 "rotation=0\0" \
154 "vrfb_arg=if itest ${rotation} -ne 0; then " \ 150 "vrfb_arg=if itest ${rotation} -ne 0; then " \
155 "setenv bootargs ${bootargs} omapfb.vrfb=y " \ 151 "setenv bootargs ${bootargs} omapfb.vrfb=y " \
156 "omapfb.rotate=${rotation}; " \ 152 "omapfb.rotate=${rotation}; " \
157 "fi\0" \ 153 "fi\0" \
158 "optargs=ignore_loglevel early_printk no_console_suspend\0" \ 154 "optargs=ignore_loglevel early_printk no_console_suspend\0" \
159 "common_bootargs=run setconsole; setenv bootargs " \ 155 "common_bootargs=run setconsole; setenv bootargs " \
160 "${bootargs} "\ 156 "${bootargs} "\
161 "console=${console} " \ 157 "console=${console} " \
162 "${mtdparts} "\ 158 "${mtdparts} "\
163 "${optargs}; " \ 159 "${optargs}; " \
164 "run vrfb_arg\0" \ 160 "run vrfb_arg\0" \
165 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 161 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
166 "bootscript=echo 'Running bootscript from mmc ...'; " \ 162 "bootscript=echo 'Running bootscript from mmc ...'; " \
167 "source ${loadaddr}\0" \ 163 "source ${loadaddr}\0" \
168 "loadimage=mmc rescan; " \ 164 "loadimage=mmc rescan; " \
169 "load mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \ 165 "load mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
170 "ramdisksize=64000\0" \ 166 "ramdisksize=64000\0" \
171 "ramdiskimage=rootfs.ext2.gz.uboot\0" \ 167 "ramdiskimage=rootfs.ext2.gz.uboot\0" \
172 "loadramdisk=mmc rescan; " \ 168 "loadramdisk=mmc rescan; " \
173 "load mmc ${mmcdev} ${rdaddr} ${ramdiskimage}\0" \ 169 "load mmc ${mmcdev} ${rdaddr} ${ramdiskimage}\0" \
174 "ramargs=setenv bootargs "\ 170 "ramargs=setenv bootargs "\
175 "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \ 171 "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
176 "mmcargs=setenv bootargs "\ 172 "mmcargs=setenv bootargs "\
177 "root=${mmcroot} rootfstype=${mmcrootfstype}\0" \ 173 "root=${mmcroot} rootfstype=${mmcrootfstype}\0" \
178 "nandargs=setenv bootargs "\ 174 "nandargs=setenv bootargs "\
179 "root=${nandroot} " \ 175 "root=${nandroot} " \
180 "rootfstype=${nandrootfstype}\0" \ 176 "rootfstype=${nandrootfstype}\0" \
181 "nfsargs=setenv serverip ${tftpserver}; " \ 177 "nfsargs=setenv serverip ${tftpserver}; " \
182 "setenv bootargs root=/dev/nfs " \ 178 "setenv bootargs root=/dev/nfs " \
183 "nfsroot=${nfsrootpath} " \ 179 "nfsroot=${nfsrootpath} " \
184 "ip=${ipaddr}:${tftpserver}:${gatewayip}:${netmask}::eth0:off\0" \ 180 "ip=${ipaddr}:${tftpserver}:${gatewayip}:${netmask}::eth0:off\0" \
185 "nfsrootpath=/opt/nfs-exports/omap\0" \ 181 "nfsrootpath=/opt/nfs-exports/omap\0" \
186 "autoload=no\0" \ 182 "autoload=no\0" \
187 "loadfdt=mmc rescan; " \ 183 "loadfdt=mmc rescan; " \
188 "load mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \ 184 "load mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \
189 "mmcbootcommon=echo Booting with DT from mmc${mmcdev} ...; " \ 185 "mmcbootcommon=echo Booting with DT from mmc${mmcdev} ...; " \
190 "run mmcargs; " \ 186 "run mmcargs; " \
191 "run common_bootargs; " \ 187 "run common_bootargs; " \
192 "run dump_bootargs; " \ 188 "run dump_bootargs; " \
193 "run loadimage; " \ 189 "run loadimage; " \
194 "run loadfdt;\0 " \ 190 "run loadfdt;\0 " \
195 "mmcbootz=setenv bootfile zImage; " \ 191 "mmcbootz=setenv bootfile zImage; " \
196 "run mmcbootcommon; "\ 192 "run mmcbootcommon; "\
197 "bootz ${loadaddr} - ${fdtaddr}\0" \ 193 "bootz ${loadaddr} - ${fdtaddr}\0" \
198 "mmcboot=setenv bootfile uImage; "\ 194 "mmcboot=setenv bootfile uImage; "\
199 "run mmcbootcommon; "\ 195 "run mmcbootcommon; "\
200 "bootm ${loadaddr} - ${fdtaddr}\0" \ 196 "bootm ${loadaddr} - ${fdtaddr}\0" \
201 "mmcrambootcommon=echo 'Booting kernel from MMC w/ramdisk...'; " \ 197 "mmcrambootcommon=echo 'Booting kernel from MMC w/ramdisk...'; " \
202 "run ramargs; " \ 198 "run ramargs; " \
203 "run common_bootargs; " \ 199 "run common_bootargs; " \
204 "run dump_bootargs; " \ 200 "run dump_bootargs; " \
205 "run loadimage; " \ 201 "run loadimage; " \
206 "run loadfdt; " \ 202 "run loadfdt; " \
207 "run loadramdisk\0" \ 203 "run loadramdisk\0" \
208 "mmcramboot=setenv bootfile uImage; " \ 204 "mmcramboot=setenv bootfile uImage; " \
209 "run mmcrambootcommon; " \ 205 "run mmcrambootcommon; " \
210 "bootm ${loadaddr} ${rdaddr} ${fdtimage}\0" \ 206 "bootm ${loadaddr} ${rdaddr} ${fdtimage}\0" \
211 "mmcrambootz=setenv bootfile zImage; " \ 207 "mmcrambootz=setenv bootfile zImage; " \
212 "run mmcrambootcommon; " \ 208 "run mmcrambootcommon; " \
213 "bootz ${loadaddr} ${rdaddr} ${fdtimage}\0" \ 209 "bootz ${loadaddr} ${rdaddr} ${fdtimage}\0" \
214 "tftpboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \ 210 "tftpboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
215 "run ramargs; " \ 211 "run ramargs; " \
216 "run common_bootargs; " \ 212 "run common_bootargs; " \
217 "run dump_bootargs; " \ 213 "run dump_bootargs; " \
218 "tftpboot ${loadaddr} ${zimage}; " \ 214 "tftpboot ${loadaddr} ${zimage}; " \
219 "tftpboot ${rdaddr} ${ramdiskimage}; " \ 215 "tftpboot ${rdaddr} ${ramdiskimage}; " \
220 "bootm ${loadaddr} ${rdaddr}\0" \ 216 "bootm ${loadaddr} ${rdaddr}\0" \
221 "tftpbootz=echo 'Booting kernel NFS rootfs...'; " \ 217 "tftpbootz=echo 'Booting kernel NFS rootfs...'; " \
222 "dhcp;" \ 218 "dhcp;" \
223 "run nfsargs;" \ 219 "run nfsargs;" \
224 "run common_bootargs;" \ 220 "run common_bootargs;" \
225 "run dump_bootargs;" \ 221 "run dump_bootargs;" \
226 "tftpboot $loadaddr zImage;" \ 222 "tftpboot $loadaddr zImage;" \
227 "bootz $loadaddr\0" \ 223 "bootz $loadaddr\0" \
228 "nandbootcommon=echo 'Booting kernel from NAND...';" \ 224 "nandbootcommon=echo 'Booting kernel from NAND...';" \
229 "nand unlock;" \ 225 "nand unlock;" \
230 "run nandargs;" \ 226 "run nandargs;" \
231 "run common_bootargs;" \ 227 "run common_bootargs;" \
232 "run dump_bootargs;" \ 228 "run dump_bootargs;" \
233 "nand read ${loadaddr} kernel;" \ 229 "nand read ${loadaddr} kernel;" \
234 "nand read ${fdtaddr} spl-os;\0" \ 230 "nand read ${fdtaddr} spl-os;\0" \
235 "nandbootz=run nandbootcommon; "\ 231 "nandbootz=run nandbootcommon; "\
236 "bootz ${loadaddr} - ${fdtaddr}\0"\ 232 "bootz ${loadaddr} - ${fdtaddr}\0"\
237 "nandboot=run nandbootcommon; "\ 233 "nandboot=run nandbootcommon; "\
238 "bootm ${loadaddr} - ${fdtaddr}\0"\ 234 "bootm ${loadaddr} - ${fdtaddr}\0"\
239 235
240 #define CONFIG_BOOTCOMMAND \ 236 #define CONFIG_BOOTCOMMAND \
241 "run autoboot" 237 "run autoboot"
242 238
243 /* Miscellaneous configurable options */ 239 /* Miscellaneous configurable options */
244 240
245 /* memtest works on */ 241 /* memtest works on */
246 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 242 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
247 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 243 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
248 0x01F00000) /* 31MB */ 244 0x01F00000) /* 31MB */
249 245
250 /* FLASH and environment organization */ 246 /* FLASH and environment organization */
251 247
252 /* **** PISMO SUPPORT *** */ 248 /* **** PISMO SUPPORT *** */
253 #if defined(CONFIG_CMD_NAND) 249 #if defined(CONFIG_CMD_NAND)
254 #define CONFIG_SYS_FLASH_BASE NAND_BASE 250 #define CONFIG_SYS_FLASH_BASE NAND_BASE
255 #endif 251 #endif
256 252
257 /* Monitor at start of flash */ 253 /* Monitor at start of flash */
258 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 254 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
259 255
260 #define CONFIG_ENV_IS_IN_NAND 1 256 #define CONFIG_ENV_IS_IN_NAND 1
261 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 257 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
262 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 258 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
263 259
264 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 260 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
265 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 261 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
266 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 262 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
267 263
268 /* SMSC922x Ethernet */ 264 /* SMSC922x Ethernet */
269 #if defined(CONFIG_CMD_NET) 265 #if defined(CONFIG_CMD_NET)
270 #define CONFIG_SMC911X 266 #define CONFIG_SMC911X
271 #define CONFIG_SMC911X_32_BIT 267 #define CONFIG_SMC911X_32_BIT
272 #define CONFIG_SMC911X_BASE 0x08000000 268 #define CONFIG_SMC911X_BASE 0x08000000
273 #endif /* (CONFIG_CMD_NET) */ 269 #endif /* (CONFIG_CMD_NET) */
274 270
275 /* Defines for SPL */ 271 /* Defines for SPL */
276 272
277 #define CONFIG_SPL_OMAP3_ID_NAND 273 #define CONFIG_SPL_OMAP3_ID_NAND
278 274
279 /* NAND: SPL falcon mode configs */ 275 /* NAND: SPL falcon mode configs */
280 #ifdef CONFIG_SPL_OS_BOOT 276 #ifdef CONFIG_SPL_OS_BOOT
281 #define CONFIG_CMD_SPL_NAND_OFS 0x240000 277 #define CONFIG_CMD_SPL_NAND_OFS 0x240000
282 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 278 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
283 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 279 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
284 #endif 280 #endif
285 281
286 #endif /* __CONFIG_H */ 282 #endif /* __CONFIG_H */
287 283
include/configs/omap3_overo.h
Diff comments   View file @ 68ccab5
1 /* 1 /*
2 * Configuration settings for the Gumstix Overo board. 2 * Configuration settings for the Gumstix Overo board.
3 * 3 *
4 * SPDX-License-Identifier: GPL-2.0+ 4 * SPDX-License-Identifier: GPL-2.0+
5 */ 5 */
6 6
7 #ifndef __CONFIG_H 7 #ifndef __CONFIG_H
8 #define __CONFIG_H 8 #define __CONFIG_H
9 9
10 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 10 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
11 #define CONFIG_NAND 11 #define CONFIG_NAND
12 12
13 #include <configs/ti_omap3_common.h> 13 #include <configs/ti_omap3_common.h>
14 /* 14 /*
15 * We are only ever GP parts and will utilize all of the "downloaded image" 15 * We are only ever GP parts and will utilize all of the "downloaded image"
16 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB). 16 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
17 */ 17 */
18 #undef CONFIG_SPL_TEXT_BASE 18 #undef CONFIG_SPL_TEXT_BASE
19 #define CONFIG_SPL_TEXT_BASE 0x40200000 19 #define CONFIG_SPL_TEXT_BASE 0x40200000
20 20
21 #define CONFIG_BCH 21 #define CONFIG_BCH
22 22
23 /* call misc_init_r */ 23 /* call misc_init_r */
24 #define CONFIG_MISC_INIT_R 24 #define CONFIG_MISC_INIT_R
25 25
26 /* pass the revision tag */ 26 /* pass the revision tag */
27 #define CONFIG_REVISION_TAG 27 #define CONFIG_REVISION_TAG
28 28
29 /* override size of malloc() pool */ 29 /* override size of malloc() pool */
30 #undef CONFIG_SYS_MALLOC_LEN 30 #undef CONFIG_SYS_MALLOC_LEN
31 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ 31 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
32 /* Shift 128 << 15 provides 4 MiB heap to support UBI commands. 32 /* Shift 128 << 15 provides 4 MiB heap to support UBI commands.
33 * Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */ 33 * Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */
34 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15)) 34 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15))
35 35
36 /* I2C Support */ 36 /* I2C Support */
37 #define CONFIG_SYS_I2C_OMAP34XX 37 #define CONFIG_SYS_I2C_OMAP34XX
38 38
39 /* TWL4030 LED */ 39 /* TWL4030 LED */
40 #define CONFIG_TWL4030_LED 40 #define CONFIG_TWL4030_LED
41 41
42 /* USB EHCI */ 42 /* USB EHCI */
43 #define CONFIG_USB_EHCI 43 #define CONFIG_USB_EHCI
44 #define CONFIG_USB_EHCI_OMAP 44 #define CONFIG_USB_EHCI_OMAP
45 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 183 45 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 183
46 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 46 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
47 47
48 /* Initialize GPIOs by default */
49 #define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 is in GPIO Bank 2 */
50 #define CONFIG_OMAP3_GPIO_3 /* GPIO64..95 is in GPIO Bank 3 */
51 #define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO Bank 4 */
52 #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO Bank 5 */
53 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO Bank 6 */
54
55 /* commands to include */ 48 /* commands to include */
56 49
57 #ifdef CONFIG_NAND 50 #ifdef CONFIG_NAND
58 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */ 51 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
59 52
60 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */ 53 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
61 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */ 54 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
62 55
63 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ 56 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
64 57
65 /* NAND block size is 128 KiB. Synchronize these values with 58 /* NAND block size is 128 KiB. Synchronize these values with
66 * overo_nand_partitions in mach-omap2/board-overo.c in Linux: 59 * overo_nand_partitions in mach-omap2/board-overo.c in Linux:
67 * xloader 4 * NAND_BLOCK_SIZE = 512 KiB 60 * xloader 4 * NAND_BLOCK_SIZE = 512 KiB
68 * uboot 14 * NAND_BLOCK_SIZE = 1792 KiB 61 * uboot 14 * NAND_BLOCK_SIZE = 1792 KiB
69 * uboot environtment 2 * NAND_BLOCK_SIZE = 256 KiB 62 * uboot environtment 2 * NAND_BLOCK_SIZE = 256 KiB
70 * linux 64 * NAND_BLOCK_SIZE = 8 MiB 63 * linux 64 * NAND_BLOCK_SIZE = 8 MiB
71 * rootfs remainder 64 * rootfs remainder
72 */ 65 */
73 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 66 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
74 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ 67 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
75 "512k(xloader)," \ 68 "512k(xloader)," \
76 "1792k(u-boot)," \ 69 "1792k(u-boot)," \
77 "256k(environ)," \ 70 "256k(environ)," \
78 "8m(linux)," \ 71 "8m(linux)," \
79 "-(rootfs)" 72 "-(rootfs)"
80 #else /* CONFIG_NAND */ 73 #else /* CONFIG_NAND */
81 #define MTDPARTS_DEFAULT 74 #define MTDPARTS_DEFAULT
82 #endif /* CONFIG_NAND */ 75 #endif /* CONFIG_NAND */
83 76
84 /* Board NAND Info. */ 77 /* Board NAND Info. */
85 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 78 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
86 /* to access nand */ 79 /* to access nand */
87 /* Environment information */ 80 /* Environment information */
88 #define CONFIG_EXTRA_ENV_SETTINGS \ 81 #define CONFIG_EXTRA_ENV_SETTINGS \
89 DEFAULT_LINUX_BOOT_ENV \ 82 DEFAULT_LINUX_BOOT_ENV \
90 "bootdir=/boot\0" \ 83 "bootdir=/boot\0" \
91 "bootfile=zImage\0" \ 84 "bootfile=zImage\0" \
92 "usbtty=cdc_acm\0" \ 85 "usbtty=cdc_acm\0" \
93 "console=ttyO2,115200n8\0" \ 86 "console=ttyO2,115200n8\0" \
94 "mpurate=auto\0" \ 87 "mpurate=auto\0" \
95 "optargs=\0" \ 88 "optargs=\0" \
96 "vram=12M\0" \ 89 "vram=12M\0" \
97 "dvimode=1024x768MR-16@60\0" \ 90 "dvimode=1024x768MR-16@60\0" \
98 "defaultdisplay=dvi\0" \ 91 "defaultdisplay=dvi\0" \
99 "mmcdev=0\0" \ 92 "mmcdev=0\0" \
100 "mmcroot=/dev/mmcblk0p2 rw\0" \ 93 "mmcroot=/dev/mmcblk0p2 rw\0" \
101 "mmcrootfstype=ext4 rootwait\0" \ 94 "mmcrootfstype=ext4 rootwait\0" \
102 "nandroot=ubi0:rootfs ubi.mtd=4\0" \ 95 "nandroot=ubi0:rootfs ubi.mtd=4\0" \
103 "nandrootfstype=ubifs\0" \ 96 "nandrootfstype=ubifs\0" \
104 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 97 "mtdparts=" MTDPARTS_DEFAULT "\0" \
105 "mmcargs=setenv bootargs console=${console} " \ 98 "mmcargs=setenv bootargs console=${console} " \
106 "${optargs} " \ 99 "${optargs} " \
107 "mpurate=${mpurate} " \ 100 "mpurate=${mpurate} " \
108 "vram=${vram} " \ 101 "vram=${vram} " \
109 "omapfb.mode=dvi:${dvimode} " \ 102 "omapfb.mode=dvi:${dvimode} " \
110 "omapdss.def_disp=${defaultdisplay} " \ 103 "omapdss.def_disp=${defaultdisplay} " \
111 "root=${mmcroot} " \ 104 "root=${mmcroot} " \
112 "rootfstype=${mmcrootfstype}\0" \ 105 "rootfstype=${mmcrootfstype}\0" \
113 "nandargs=setenv bootargs console=${console} " \ 106 "nandargs=setenv bootargs console=${console} " \
114 "${optargs} " \ 107 "${optargs} " \
115 "mpurate=${mpurate} " \ 108 "mpurate=${mpurate} " \
116 "vram=${vram} " \ 109 "vram=${vram} " \
117 "omapfb.mode=dvi:${dvimode} " \ 110 "omapfb.mode=dvi:${dvimode} " \
118 "omapdss.def_disp=${defaultdisplay} " \ 111 "omapdss.def_disp=${defaultdisplay} " \
119 "root=${nandroot} " \ 112 "root=${nandroot} " \
120 "rootfstype=${nandrootfstype}\0" \ 113 "rootfstype=${nandrootfstype}\0" \
121 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 114 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
122 "bootscript=echo Running boot script from mmc ...; " \ 115 "bootscript=echo Running boot script from mmc ...; " \
123 "source ${loadaddr}\0" \ 116 "source ${loadaddr}\0" \
124 "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ 117 "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
125 "importbootenv=echo Importing environment from mmc ...; " \ 118 "importbootenv=echo Importing environment from mmc ...; " \
126 "env import -t ${loadaddr} ${filesize}\0" \ 119 "env import -t ${loadaddr} ${filesize}\0" \
127 "loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \ 120 "loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \
128 "mmcboot=echo Booting from mmc...; " \ 121 "mmcboot=echo Booting from mmc...; " \
129 "run mmcargs; " \ 122 "run mmcargs; " \
130 "bootm ${loadaddr}\0" \ 123 "bootm ${loadaddr}\0" \
131 "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \ 124 "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \
132 "loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \ 125 "loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \
133 "loadubizimage=ubifsload ${loadaddr} ${bootdir}/${bootfile}\0" \ 126 "loadubizimage=ubifsload ${loadaddr} ${bootdir}/${bootfile}\0" \
134 "loadubifdt=ubifsload ${fdtaddr} ${bootdir}/${fdtfile}\0" \ 127 "loadubifdt=ubifsload ${fdtaddr} ${bootdir}/${fdtfile}\0" \
135 "mmcbootfdt=echo Booting with DT from mmc ...; " \ 128 "mmcbootfdt=echo Booting with DT from mmc ...; " \
136 "run mmcargs; " \ 129 "run mmcargs; " \
137 "bootz ${loadaddr} - ${fdtaddr}\0" \ 130 "bootz ${loadaddr} - ${fdtaddr}\0" \
138 "nandboot=echo Booting from nand ...; " \ 131 "nandboot=echo Booting from nand ...; " \
139 "run nandargs; " \ 132 "run nandargs; " \
140 "if nand read ${loadaddr} linux; then " \ 133 "if nand read ${loadaddr} linux; then " \
141 "bootm ${loadaddr};" \ 134 "bootm ${loadaddr};" \
142 "fi;\0" \ 135 "fi;\0" \
143 "nanddtsboot=echo Booting from nand with DTS...; " \ 136 "nanddtsboot=echo Booting from nand with DTS...; " \
144 "run nandargs; " \ 137 "run nandargs; " \
145 "ubi part rootfs; "\ 138 "ubi part rootfs; "\
146 "ubifsmount ubi0:rootfs; "\ 139 "ubifsmount ubi0:rootfs; "\
147 "run loadubifdt; "\ 140 "run loadubifdt; "\
148 "run loadubizimage; "\ 141 "run loadubizimage; "\
149 "bootz ${loadaddr} - ${fdtaddr}\0" \ 142 "bootz ${loadaddr} - ${fdtaddr}\0" \
150 143
151 #define CONFIG_BOOTCOMMAND \ 144 #define CONFIG_BOOTCOMMAND \
152 "mmc dev ${mmcdev}; if mmc rescan; then " \ 145 "mmc dev ${mmcdev}; if mmc rescan; then " \
153 "if run loadbootscript; then " \ 146 "if run loadbootscript; then " \
154 "run bootscript; " \ 147 "run bootscript; " \
155 "fi;" \ 148 "fi;" \
156 "if run loadbootenv; then " \ 149 "if run loadbootenv; then " \
157 "echo Loaded environment from ${bootenv};" \ 150 "echo Loaded environment from ${bootenv};" \
158 "run importbootenv;" \ 151 "run importbootenv;" \
159 "fi;" \ 152 "fi;" \
160 "if test -n $uenvcmd; then " \ 153 "if test -n $uenvcmd; then " \
161 "echo Running uenvcmd ...;" \ 154 "echo Running uenvcmd ...;" \
162 "run uenvcmd;" \ 155 "run uenvcmd;" \
163 "fi;" \ 156 "fi;" \
164 "if run loaduimage; then " \ 157 "if run loaduimage; then " \
165 "run mmcboot;" \ 158 "run mmcboot;" \
166 "fi;" \ 159 "fi;" \
167 "if run loadzimage; then " \ 160 "if run loadzimage; then " \
168 "if test -z \"${fdtfile}\"; then " \ 161 "if test -z \"${fdtfile}\"; then " \
169 "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \ 162 "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
170 "fi;" \ 163 "fi;" \
171 "if run loadfdt; then " \ 164 "if run loadfdt; then " \
172 "run mmcbootfdt;" \ 165 "run mmcbootfdt;" \
173 "fi;" \ 166 "fi;" \
174 "fi;" \ 167 "fi;" \
175 "fi;" \ 168 "fi;" \
176 "run nandboot; " \ 169 "run nandboot; " \
177 "if test -z \"${fdtfile}\"; then "\ 170 "if test -z \"${fdtfile}\"; then "\
178 "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \ 171 "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
179 "fi;" \ 172 "fi;" \
180 "run nanddtsboot; " \ 173 "run nanddtsboot; " \
181 174
182 /* memtest works on */ 175 /* memtest works on */
183 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 176 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
184 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 177 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
185 0x01F00000) /* 31MB */ 178 0x01F00000) /* 31MB */
186 179
187 /* FLASH and environment organization */ 180 /* FLASH and environment organization */
188 #if defined(CONFIG_NAND) 181 #if defined(CONFIG_NAND)
189 #define CONFIG_SYS_FLASH_BASE NAND_BASE 182 #define CONFIG_SYS_FLASH_BASE NAND_BASE
190 #endif 183 #endif
191 184
192 /* Monitor at start of flash */ 185 /* Monitor at start of flash */
193 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 186 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
194 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 187 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
195 188
196 #define CONFIG_ENV_IS_IN_NAND 189 #define CONFIG_ENV_IS_IN_NAND
197 #define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */ 190 #define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */
198 #define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */ 191 #define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */
199 192
200 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 193 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
201 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 194 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
202 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 195 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
203 196
204 /* Configure SMSC9211 ethernet */ 197 /* Configure SMSC9211 ethernet */
205 #if defined(CONFIG_CMD_NET) 198 #if defined(CONFIG_CMD_NET)
206 #define CONFIG_SMC911X 199 #define CONFIG_SMC911X
207 #define CONFIG_SMC911X_32_BIT 200 #define CONFIG_SMC911X_32_BIT
208 #define CONFIG_SMC911X_BASE 0x2C000000 201 #define CONFIG_SMC911X_BASE 0x2C000000
209 #endif /* (CONFIG_CMD_NET) */ 202 #endif /* (CONFIG_CMD_NET) */
210 203
211 /* Initial RAM setup */ 204 /* Initial RAM setup */
212 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 205 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
213 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 206 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
214 207
215 /* NAND boot config */ 208 /* NAND boot config */
216 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 209 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
217 #define CONFIG_SYS_NAND_MAX_ECCPOS 56 210 #define CONFIG_SYS_NAND_MAX_ECCPOS 56
218 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 211 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
219 #define CONFIG_SYS_NAND_PAGE_COUNT 64 212 #define CONFIG_SYS_NAND_PAGE_COUNT 64
220 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 213 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
221 #define CONFIG_SYS_NAND_OOBSIZE 64 214 #define CONFIG_SYS_NAND_OOBSIZE 64
222 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 215 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
223 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 216 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
224 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ 217 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
225 13, 14, 16, 17, 18, 19, 20, 21, 22, \ 218 13, 14, 16, 17, 18, 19, 20, 21, 22, \
226 23, 24, 25, 26, 27, 28, 30, 31, 32, \ 219 23, 24, 25, 26, 27, 28, 30, 31, 32, \
227 33, 34, 35, 36, 37, 38, 39, 40, 41, \ 220 33, 34, 35, 36, 37, 38, 39, 40, 41, \
228 42, 44, 45, 46, 47, 48, 49, 50, 51, \ 221 42, 44, 45, 46, 47, 48, 49, 50, 51, \
229 52, 53, 54, 55, 56} 222 52, 53, 54, 55, 56}
230 #define CONFIG_SYS_NAND_ECCSIZE 512 223 #define CONFIG_SYS_NAND_ECCSIZE 512
231 #define CONFIG_SYS_NAND_ECCBYTES 13 224 #define CONFIG_SYS_NAND_ECCBYTES 13
232 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW 225 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
233 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 226 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
234 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 227 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
235 /* NAND: SPL falcon mode configs */ 228 /* NAND: SPL falcon mode configs */
236 #ifdef CONFIG_SPL_OS_BOOT 229 #ifdef CONFIG_SPL_OS_BOOT
237 #define CONFIG_CMD_SPL_NAND_OFS 0x240000 230 #define CONFIG_CMD_SPL_NAND_OFS 0x240000
238 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 231 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
239 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 232 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
240 #endif 233 #endif
241 234
242 #endif /* __CONFIG_H */ 235 #endif /* __CONFIG_H */
243 236
include/configs/omap3_pandora.h
Diff comments   View file @ 68ccab5
1 /* 1 /*
2 * (C) Copyright 2008-2010 2 * (C) Copyright 2008-2010
3 * Graลพvydas Ignotas <notasas@gmail.com> 3 * Graลพvydas Ignotas <notasas@gmail.com>
4 * 4 *
5 * Configuration settings for the OMAP3 Pandora. 5 * Configuration settings for the OMAP3 Pandora.
6 * 6 *
7 * SPDX-License-Identifier: GPL-2.0+ 7 * SPDX-License-Identifier: GPL-2.0+
8 */ 8 */
9 9
10 #ifndef __CONFIG_H 10 #ifndef __CONFIG_H
11 #define __CONFIG_H 11 #define __CONFIG_H
12 12
13 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 13 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
14 #define CONFIG_NAND 14 #define CONFIG_NAND
15 15
16 /* override base for compatibility with MLO the device ships with */ 16 /* override base for compatibility with MLO the device ships with */
17 #define CONFIG_SYS_TEXT_BASE 0x80008000 17 #define CONFIG_SYS_TEXT_BASE 0x80008000
18 18
19 #include <configs/ti_omap3_common.h> 19 #include <configs/ti_omap3_common.h>
20 20
21 #define CONFIG_MISC_INIT_R 21 #define CONFIG_MISC_INIT_R
22 #define CONFIG_REVISION_TAG 1 22 #define CONFIG_REVISION_TAG 1
23 23
24 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 24 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
25 25
26 #define CONFIG_SYS_DEVICE_NULLDEV 1 26 #define CONFIG_SYS_DEVICE_NULLDEV 1
27 27
28 /* 28 /*
29 * Hardware drivers 29 * Hardware drivers
30 */ 30 */
31 31
32 /* I2C Support */ 32 /* I2C Support */
33 #define CONFIG_SYS_I2C_OMAP34XX 33 #define CONFIG_SYS_I2C_OMAP34XX
34 34
35 /* TWL4030 LED */ 35 /* TWL4030 LED */
36 #define CONFIG_TWL4030_LED 36 #define CONFIG_TWL4030_LED
37 37
38 /* Initialize GPIOs by default */
39 #define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO Bank 4 */
40 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO Bank 6 */
41
42 /* 38 /*
43 * NS16550 Configuration 39 * NS16550 Configuration
44 */ 40 */
45 #undef CONFIG_SYS_NS16550_CLK 41 #undef CONFIG_SYS_NS16550_CLK
46 #define CONFIG_SYS_NS16550_SERIAL 42 #define CONFIG_SYS_NS16550_SERIAL
47 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 43 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
48 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 44 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
49 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 45 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
50 #define CONFIG_SERIAL3 3 46 #define CONFIG_SERIAL3 3
51 47
52 /* commands to include */ 48 /* commands to include */
53 49
54 /* 50 /*
55 * Board NAND Info. 51 * Board NAND Info.
56 */ 52 */
57 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 53 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
58 /* to access nand */ 54 /* to access nand */
59 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 55 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
60 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW 56 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
61 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 57 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
62 #define CONFIG_SYS_NAND_OOBSIZE 64 58 #define CONFIG_SYS_NAND_OOBSIZE 64
63 59
64 #ifdef CONFIG_NAND 60 #ifdef CONFIG_NAND
65 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */ 61 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
66 62
67 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */ 63 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
68 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */ 64 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
69 65
70 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ 66 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
71 67
72 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 68 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
73 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(xloader),"\ 69 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(xloader),"\
74 "1920k(uboot),128k(uboot-env),"\ 70 "1920k(uboot),128k(uboot-env),"\
75 "10m(boot),-(rootfs)" 71 "10m(boot),-(rootfs)"
76 #else 72 #else
77 #define MTDPARTS_DEFAULT 73 #define MTDPARTS_DEFAULT
78 #endif 74 #endif
79 75
80 76
81 #define CONFIG_BOOTCOMMAND \ 77 #define CONFIG_BOOTCOMMAND \
82 "run distro_bootcmd; " \ 78 "run distro_bootcmd; " \
83 "setenv bootargs ${bootargs_ubi}; " \ 79 "setenv bootargs ${bootargs_ubi}; " \
84 "if mmc rescan && load mmc 0:1 ${loadaddr} autoboot.scr; then " \ 80 "if mmc rescan && load mmc 0:1 ${loadaddr} autoboot.scr; then " \
85 "source ${loadaddr}; " \ 81 "source ${loadaddr}; " \
86 "fi; " \ 82 "fi; " \
87 "ubi part boot && ubifsmount ubi:boot && " \ 83 "ubi part boot && ubifsmount ubi:boot && " \
88 "ubifsload ${loadaddr} uImage && bootm ${loadaddr}" 84 "ubifsload ${loadaddr} uImage && bootm ${loadaddr}"
89 85
90 #define BOOT_TARGET_DEVICES(func) \ 86 #define BOOT_TARGET_DEVICES(func) \
91 func(MMC, mmc, 0) \ 87 func(MMC, mmc, 0) \
92 88
93 #include <config_distro_bootcmd.h> 89 #include <config_distro_bootcmd.h>
94 90
95 #define CONFIG_EXTRA_ENV_SETTINGS \ 91 #define CONFIG_EXTRA_ENV_SETTINGS \
96 DEFAULT_LINUX_BOOT_ENV \ 92 DEFAULT_LINUX_BOOT_ENV \
97 "usbtty=cdc_acm\0" \ 93 "usbtty=cdc_acm\0" \
98 "bootargs_ubi=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \ 94 "bootargs_ubi=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
99 "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \ 95 "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \
100 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 96 "mtdparts=" MTDPARTS_DEFAULT "\0" \
101 BOOTENV \ 97 BOOTENV \
102 98
103 /* memtest works on */ 99 /* memtest works on */
104 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 100 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
105 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 101 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
106 0x01F00000) /* 31MB */ 102 0x01F00000) /* 31MB */
107 103
108 #if defined(CONFIG_NAND) 104 #if defined(CONFIG_NAND)
109 #define CONFIG_SYS_FLASH_BASE NAND_BASE 105 #define CONFIG_SYS_FLASH_BASE NAND_BASE
110 #endif 106 #endif
111 107
112 /* Monitor at start of flash */ 108 /* Monitor at start of flash */
113 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 109 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
114 110
115 #define CONFIG_ENV_IS_IN_NAND 1 111 #define CONFIG_ENV_IS_IN_NAND 1
116 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 112 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
117 113
118 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 114 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
119 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 115 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
120 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 116 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
121 117
122 #endif /* __CONFIG_H */ 118 #endif /* __CONFIG_H */
123 119
include/configs/sniper.h
Diff comments   View file @ 68ccab5
1 /* 1 /*
2 * LG Optimus Black codename sniper config 2 * LG Optimus Black codename sniper config
3 * 3 *
4 * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr> 4 * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
5 * 5 *
6 * SPDX-License-Identifier: GPL-2.0+ 6 * SPDX-License-Identifier: GPL-2.0+
7 */ 7 */
8 8
9 #ifndef __CONFIG_H 9 #ifndef __CONFIG_H
10 #define __CONFIG_H 10 #define __CONFIG_H
11 11
12 #include <asm/arch/cpu.h> 12 #include <asm/arch/cpu.h>
13 #include <asm/arch/omap.h> 13 #include <asm/arch/omap.h>
14 14
15 /* 15 /*
16 * CPU 16 * CPU
17 */ 17 */
18 18
19 #define CONFIG_ARM_ARCH_CP15_ERRATA 19 #define CONFIG_ARM_ARCH_CP15_ERRATA
20 20
21 /* 21 /*
22 * Board 22 * Board
23 */ 23 */
24 24
25 #define CONFIG_MISC_INIT_R 25 #define CONFIG_MISC_INIT_R
26 26
27 /* 27 /*
28 * Clocks 28 * Clocks
29 */ 29 */
30 30
31 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 31 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
32 #define CONFIG_SYS_PTV 2 32 #define CONFIG_SYS_PTV 2
33 33
34 #define V_NS16550_CLK 48000000 34 #define V_NS16550_CLK 48000000
35 #define V_OSCK 26000000 35 #define V_OSCK 26000000
36 #define V_SCLK (V_OSCK >> 1) 36 #define V_SCLK (V_OSCK >> 1)
37 37
38 /* 38 /*
39 * DRAM 39 * DRAM
40 */ 40 */
41 41
42 #define CONFIG_SDRC 42 #define CONFIG_SDRC
43 #define CONFIG_NR_DRAM_BANKS 2 43 #define CONFIG_NR_DRAM_BANKS 2
44 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 44 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
45 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 45 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
46 46
47 /* 47 /*
48 * Memory 48 * Memory
49 */ 49 */
50 50
51 #define CONFIG_SYS_TEXT_BASE 0x80100000 51 #define CONFIG_SYS_TEXT_BASE 0x80100000
52 #define CONFIG_SYS_SDRAM_BASE 0x80000000 52 #define CONFIG_SYS_SDRAM_BASE 0x80000000
53 #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ 53 #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
54 GENERATED_GBL_DATA_SIZE) 54 GENERATED_GBL_DATA_SIZE)
55 55
56 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE) 56 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE)
57 57
58 /* 58 /*
59 * GPIO
60 */
61 #define CONFIG_OMAP3_GPIO_2
62 #define CONFIG_OMAP3_GPIO_3
63 #define CONFIG_OMAP3_GPIO_4
64 #define CONFIG_OMAP3_GPIO_5
65 #define CONFIG_OMAP3_GPIO_6
66
67 /*
68 * I2C 59 * I2C
69 */ 60 */
70 61
71 #define CONFIG_SYS_I2C 62 #define CONFIG_SYS_I2C
72 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000 63 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000
73 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 64 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
74 #define CONFIG_SYS_I2C_OMAP34XX 65 #define CONFIG_SYS_I2C_OMAP34XX
75 #define CONFIG_I2C_MULTI_BUS 66 #define CONFIG_I2C_MULTI_BUS
76 67
77 /* 68 /*
78 * Input 69 * Input
79 */ 70 */
80 71
81 #define CONFIG_TWL4030_INPUT 72 #define CONFIG_TWL4030_INPUT
82 73
83 /* 74 /*
84 * SPL 75 * SPL
85 */ 76 */
86 77
87 #define CONFIG_SPL_FRAMEWORK 78 #define CONFIG_SPL_FRAMEWORK
88 79
89 #define CONFIG_SPL_TEXT_BASE 0x40200000 80 #define CONFIG_SPL_TEXT_BASE 0x40200000
90 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 81 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
91 CONFIG_SPL_TEXT_BASE) 82 CONFIG_SPL_TEXT_BASE)
92 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 83 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
93 #define CONFIG_SPL_BSS_MAX_SIZE (512 * 1024) 84 #define CONFIG_SPL_BSS_MAX_SIZE (512 * 1024)
94 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 85 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
95 #define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024) 86 #define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024)
96 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 87 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
97 88
98 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" 89 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
99 #define CONFIG_SPL_BOARD_INIT 90 #define CONFIG_SPL_BOARD_INIT
100 91
101 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 92 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
102 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 93 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
103 94
104 #define CONFIG_AUTO_COMPLETE 95 #define CONFIG_AUTO_COMPLETE
105 96
106 #define CONFIG_SYS_LONGHELP 97 #define CONFIG_SYS_LONGHELP
107 98
108 #define CONFIG_SYS_MAXARGS 16 99 #define CONFIG_SYS_MAXARGS 16
109 #define CONFIG_SYS_CBSIZE 512 100 #define CONFIG_SYS_CBSIZE 512
110 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \ 101 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \
111 + 16) 102 + 16)
112 103
113 /* 104 /*
114 * Serial 105 * Serial
115 */ 106 */
116 107
117 #ifdef CONFIG_SPL_BUILD 108 #ifdef CONFIG_SPL_BUILD
118 #define CONFIG_SYS_NS16550_SERIAL 109 #define CONFIG_SYS_NS16550_SERIAL
119 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 110 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
120 #endif 111 #endif
121 112
122 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 113 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
123 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 114 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
124 #define CONFIG_CONS_INDEX 3 115 #define CONFIG_CONS_INDEX 3
125 116
126 #define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, \ 117 #define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, \
127 115200 } 118 115200 }
128 119
129 /* 120 /*
130 * USB gadget 121 * USB gadget
131 */ 122 */
132 123
133 #define CONFIG_USB_MUSB_PIO_ONLY 124 #define CONFIG_USB_MUSB_PIO_ONLY
134 #define CONFIG_USB_MUSB_OMAP2PLUS 125 #define CONFIG_USB_MUSB_OMAP2PLUS
135 #define CONFIG_TWL4030_USB 126 #define CONFIG_TWL4030_USB
136 127
137 /* 128 /*
138 * Fastboot 129 * Fastboot
139 */ 130 */
140 131
141 #define CONFIG_USB_FUNCTION_FASTBOOT 132 #define CONFIG_USB_FUNCTION_FASTBOOT
142 133
143 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 134 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
144 #define CONFIG_FASTBOOT_BUF_SIZE 0x2000000 135 #define CONFIG_FASTBOOT_BUF_SIZE 0x2000000
145 136
146 #define CONFIG_FASTBOOT_FLASH 137 #define CONFIG_FASTBOOT_FLASH
147 #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 138 #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
148 139
149 #define CONFIG_CMD_FASTBOOT 140 #define CONFIG_CMD_FASTBOOT
150 141
151 /* 142 /*
152 * Environment 143 * Environment
153 */ 144 */
154 145
155 #define CONFIG_ENV_SIZE (128 * 1024) 146 #define CONFIG_ENV_SIZE (128 * 1024)
156 #define CONFIG_ENV_IS_NOWHERE 147 #define CONFIG_ENV_IS_NOWHERE
157 148
158 #define CONFIG_ENV_OVERWRITE 149 #define CONFIG_ENV_OVERWRITE
159 150
160 #define CONFIG_EXTRA_ENV_SETTINGS \ 151 #define CONFIG_EXTRA_ENV_SETTINGS \
161 "kernel_addr_r=0x82000000\0" \ 152 "kernel_addr_r=0x82000000\0" \
162 "loadaddr=0x82000000\0" \ 153 "loadaddr=0x82000000\0" \
163 "fdt_addr_r=0x88000000\0" \ 154 "fdt_addr_r=0x88000000\0" \
164 "fdtaddr=0x88000000\0" \ 155 "fdtaddr=0x88000000\0" \
165 "ramdisk_addr_r=0x88080000\0" \ 156 "ramdisk_addr_r=0x88080000\0" \
166 "pxefile_addr_r=0x80100000\0" \ 157 "pxefile_addr_r=0x80100000\0" \
167 "scriptaddr=0x80000000\0" \ 158 "scriptaddr=0x80000000\0" \
168 "bootm_size=0x10000000\0" \ 159 "bootm_size=0x10000000\0" \
169 "boot_mmc_dev=0\0" \ 160 "boot_mmc_dev=0\0" \
170 "kernel_mmc_part=3\0" \ 161 "kernel_mmc_part=3\0" \
171 "recovery_mmc_part=4\0" \ 162 "recovery_mmc_part=4\0" \
172 "fdtfile=omap3-sniper.dtb\0" \ 163 "fdtfile=omap3-sniper.dtb\0" \
173 "bootfile=/boot/extlinux/extlinux.conf\0" \ 164 "bootfile=/boot/extlinux/extlinux.conf\0" \
174 "bootargs=console=ttyO2,115200 vram=5M,0x9FA00000 omapfb.vram=0:5M\0" 165 "bootargs=console=ttyO2,115200 vram=5M,0x9FA00000 omapfb.vram=0:5M\0"
175 166
176 /* 167 /*
177 * ATAGs 168 * ATAGs
178 */ 169 */
179 170
180 #define CONFIG_SETUP_MEMORY_TAGS 171 #define CONFIG_SETUP_MEMORY_TAGS
181 #define CONFIG_CMDLINE_TAG 172 #define CONFIG_CMDLINE_TAG
182 #define CONFIG_INITRD_TAG 173 #define CONFIG_INITRD_TAG
183 #define CONFIG_REVISION_TAG 174 #define CONFIG_REVISION_TAG
184 #define CONFIG_SERIAL_TAG 175 #define CONFIG_SERIAL_TAG
185 176
186 /* 177 /*
187 * Boot 178 * Boot
188 */ 179 */
189 180
190 #define CONFIG_SYS_LOAD_ADDR 0x82000000 181 #define CONFIG_SYS_LOAD_ADDR 0x82000000
191 182
192 #define CONFIG_ANDROID_BOOT_IMAGE 183 #define CONFIG_ANDROID_BOOT_IMAGE
193 184
194 #define CONFIG_BOOTCOMMAND \ 185 #define CONFIG_BOOTCOMMAND \
195 "setenv boot_mmc_part ${kernel_mmc_part}; " \ 186 "setenv boot_mmc_part ${kernel_mmc_part}; " \
196 "if test reboot-${reboot-mode} = reboot-r; then " \ 187 "if test reboot-${reboot-mode} = reboot-r; then " \
197 "echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; " \ 188 "echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; " \
198 "if test reboot-${reboot-mode} = reboot-b; then " \ 189 "if test reboot-${reboot-mode} = reboot-b; then " \
199 "echo fastboot; fastboot 0; fi; " \ 190 "echo fastboot; fastboot 0; fi; " \
200 "part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; " \ 191 "part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; " \
201 "part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; " \ 192 "part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; " \
202 "mmc dev ${boot_mmc_dev}; " \ 193 "mmc dev ${boot_mmc_dev}; " \
203 "mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && " \ 194 "mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && " \
204 "bootm ${kernel_addr_r};" 195 "bootm ${kernel_addr_r};"
205 196
206 /* 197 /*
207 * Defaults 198 * Defaults
208 */ 199 */
209 200
210 #include <config_defaults.h> 201 #include <config_defaults.h>
211 #include <config_distro_defaults.h> 202 #include <config_distro_defaults.h>
212 203
213 #endif 204 #endif
214 205
include/configs/tam3517-common.h
Diff comments   View file @ 68ccab5
1 /* 1 /*
2 * Copyright (C) 2011 2 * Copyright (C) 2011
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de. 3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4 * 4 *
5 * Copyright (C) 2009 TechNexion Ltd. 5 * Copyright (C) 2009 TechNexion Ltd.
6 * 6 *
7 * SPDX-License-Identifier: GPL-2.0+ 7 * SPDX-License-Identifier: GPL-2.0+
8 */ 8 */
9 9
10 #ifndef __TAM3517_H 10 #ifndef __TAM3517_H
11 #define __TAM3517_H 11 #define __TAM3517_H
12 12
13 /* 13 /*
14 * High Level Configuration Options 14 * High Level Configuration Options
15 */ 15 */
16 16
17 #define CONFIG_SYS_TEXT_BASE 0x80008000 17 #define CONFIG_SYS_TEXT_BASE 0x80008000
18 18
19 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ 19 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
20 20
21 #include <asm/arch/cpu.h> /* get chip and board defs */ 21 #include <asm/arch/cpu.h> /* get chip and board defs */
22 #include <asm/arch/omap.h> 22 #include <asm/arch/omap.h>
23 23
24 /* Clock Defines */ 24 /* Clock Defines */
25 #define V_OSCK 26000000 /* Clock output from T2 */ 25 #define V_OSCK 26000000 /* Clock output from T2 */
26 #define V_SCLK (V_OSCK >> 1) 26 #define V_SCLK (V_OSCK >> 1)
27 27
28 #define CONFIG_MISC_INIT_R 28 #define CONFIG_MISC_INIT_R
29 29
30 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 30 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
31 #define CONFIG_SETUP_MEMORY_TAGS 31 #define CONFIG_SETUP_MEMORY_TAGS
32 #define CONFIG_INITRD_TAG 32 #define CONFIG_INITRD_TAG
33 #define CONFIG_REVISION_TAG 33 #define CONFIG_REVISION_TAG
34 34
35 /* 35 /*
36 * Size of malloc() pool 36 * Size of malloc() pool
37 */ 37 */
38 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ 38 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
39 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \ 39 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
40 2 * 1024 * 1024) 40 2 * 1024 * 1024)
41 /* 41 /*
42 * DDR related 42 * DDR related
43 */ 43 */
44 #define CONFIG_OMAP3_MICRON_DDR /* Micron DDR */ 44 #define CONFIG_OMAP3_MICRON_DDR /* Micron DDR */
45 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) 45 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
46 46
47 /* 47 /*
48 * Hardware drivers 48 * Hardware drivers
49 */ 49 */
50 50
51 /* 51 /*
52 * NS16550 Configuration 52 * NS16550 Configuration
53 */ 53 */
54 #define CONFIG_SYS_NS16550_SERIAL 54 #define CONFIG_SYS_NS16550_SERIAL
55 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 55 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
56 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 56 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
57 57
58 /* 58 /*
59 * select serial console configuration 59 * select serial console configuration
60 */ 60 */
61 #define CONFIG_CONS_INDEX 1 61 #define CONFIG_CONS_INDEX 1
62 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 62 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
63 #define CONFIG_SERIAL1 /* UART1 */ 63 #define CONFIG_SERIAL1 /* UART1 */
64 64
65 /* allow to overwrite serial and ethaddr */ 65 /* allow to overwrite serial and ethaddr */
66 #define CONFIG_ENV_OVERWRITE 66 #define CONFIG_ENV_OVERWRITE
67 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 67 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
68 115200} 68 115200}
69 /* EHCI */ 69 /* EHCI */
70 #define CONFIG_OMAP3_GPIO_5
71 #define CONFIG_USB_EHCI
72 #define CONFIG_USB_EHCI_OMAP 70 #define CONFIG_USB_EHCI_OMAP
73 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25 71 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
74 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 72 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
75 73
76 /* commands to include */ 74 /* commands to include */
77 #define CONFIG_CMD_NAND /* NAND support */ 75 #define CONFIG_CMD_NAND /* NAND support */
78 #define CONFIG_CMD_EEPROM 76 #define CONFIG_CMD_EEPROM
79 77
80 #define CONFIG_SYS_I2C 78 #define CONFIG_SYS_I2C
81 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000 79 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000
82 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 80 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
83 #define CONFIG_SYS_I2C_OMAP34XX 81 #define CONFIG_SYS_I2C_OMAP34XX
84 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */ 82 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
85 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ 83 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
86 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07 84 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
87 85
88 /* 86 /*
89 * Board NAND Info. 87 * Board NAND Info.
90 */ 88 */
91 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 89 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
92 /* to access */ 90 /* to access */
93 /* nand at CS0 */ 91 /* nand at CS0 */
94 92
95 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 93 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
96 /* NAND devices */ 94 /* NAND devices */
97 95
98 #define CONFIG_AUTO_COMPLETE 96 #define CONFIG_AUTO_COMPLETE
99 97
100 /* 98 /*
101 * Miscellaneous configurable options 99 * Miscellaneous configurable options
102 */ 100 */
103 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 101 #define CONFIG_SYS_LONGHELP /* undef to save memory */
104 #define CONFIG_CMDLINE_EDITING 102 #define CONFIG_CMDLINE_EDITING
105 #define CONFIG_AUTO_COMPLETE 103 #define CONFIG_AUTO_COMPLETE
106 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 104 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
107 105
108 /* Print Buffer Size */ 106 /* Print Buffer Size */
109 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 107 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
110 sizeof(CONFIG_SYS_PROMPT) + 16) 108 sizeof(CONFIG_SYS_PROMPT) + 16)
111 #define CONFIG_SYS_MAXARGS 32 /* max number of command */ 109 #define CONFIG_SYS_MAXARGS 32 /* max number of command */
112 /* args */ 110 /* args */
113 /* Boot Argument Buffer Size */ 111 /* Boot Argument Buffer Size */
114 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 112 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
115 /* memtest works on */ 113 /* memtest works on */
116 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 114 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
117 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 115 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
118 0x01F00000) /* 31MB */ 116 0x01F00000) /* 31MB */
119 117
120 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 118 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
121 /* address */ 119 /* address */
122 120
123 /* 121 /*
124 * AM3517 has 12 GP timers, they can be driven by the system clock 122 * AM3517 has 12 GP timers, they can be driven by the system clock
125 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 123 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
126 * This rate is divided by a local divisor. 124 * This rate is divided by a local divisor.
127 */ 125 */
128 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 126 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
129 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 127 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
130 128
131 /* 129 /*
132 * Physical Memory Map 130 * Physical Memory Map
133 */ 131 */
134 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 132 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
135 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 133 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
136 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 134 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
137 135
138 /* 136 /*
139 * FLASH and environment organization 137 * FLASH and environment organization
140 */ 138 */
141 139
142 /* **** PISMO SUPPORT *** */ 140 /* **** PISMO SUPPORT *** */
143 #define CONFIG_NAND 141 #define CONFIG_NAND
144 #define CONFIG_NAND_OMAP_GPMC 142 #define CONFIG_NAND_OMAP_GPMC
145 #define CONFIG_ENV_IS_IN_NAND 143 #define CONFIG_ENV_IS_IN_NAND
146 #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */ 144 #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
147 145
148 /* Redundant Environment */ 146 /* Redundant Environment */
149 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 147 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
150 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 148 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
151 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 149 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
152 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 150 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
153 2 * CONFIG_SYS_ENV_SECT_SIZE) 151 2 * CONFIG_SYS_ENV_SECT_SIZE)
154 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 152 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
155 153
156 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 154 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
157 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 155 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
158 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 156 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
159 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 157 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
160 CONFIG_SYS_INIT_RAM_SIZE - \ 158 CONFIG_SYS_INIT_RAM_SIZE - \
161 GENERATED_GBL_DATA_SIZE) 159 GENERATED_GBL_DATA_SIZE)
162 160
163 /* 161 /*
164 * ethernet support, EMAC 162 * ethernet support, EMAC
165 * 163 *
166 */ 164 */
167 #define CONFIG_DRIVER_TI_EMAC 165 #define CONFIG_DRIVER_TI_EMAC
168 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 166 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
169 #define CONFIG_MII 167 #define CONFIG_MII
170 #define CONFIG_BOOTP_DNS 168 #define CONFIG_BOOTP_DNS
171 #define CONFIG_BOOTP_DNS2 169 #define CONFIG_BOOTP_DNS2
172 #define CONFIG_BOOTP_SEND_HOSTNAME 170 #define CONFIG_BOOTP_SEND_HOSTNAME
173 #define CONFIG_NET_RETRY_COUNT 10 171 #define CONFIG_NET_RETRY_COUNT 10
174 172
175 /* Defines for SPL */ 173 /* Defines for SPL */
176 #define CONFIG_SPL_FRAMEWORK 174 #define CONFIG_SPL_FRAMEWORK
177 #define CONFIG_SPL_BOARD_INIT 175 #define CONFIG_SPL_BOARD_INIT
178 #define CONFIG_SPL_CONSOLE 176 #define CONFIG_SPL_CONSOLE
179 #define CONFIG_SPL_NAND_SIMPLE 177 #define CONFIG_SPL_NAND_SIMPLE
180 #define CONFIG_SPL_NAND_SOFTECC 178 #define CONFIG_SPL_NAND_SOFTECC
181 #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ 179 #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
182 180
183 #define CONFIG_SPL_NAND_BASE 181 #define CONFIG_SPL_NAND_BASE
184 #define CONFIG_SPL_NAND_DRIVERS 182 #define CONFIG_SPL_NAND_DRIVERS
185 #define CONFIG_SPL_NAND_ECC 183 #define CONFIG_SPL_NAND_ECC
186 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" 184 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
187 185
188 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 186 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
189 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 187 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
190 CONFIG_SPL_TEXT_BASE) 188 CONFIG_SPL_TEXT_BASE)
191 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 189 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
192 190
193 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 191 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
194 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 192 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
195 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ 193 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
196 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 194 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
197 195
198 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 196 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
199 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 197 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
200 198
201 /* FAT */ 199 /* FAT */
202 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 200 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
203 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" 201 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
204 202
205 /* RAW SD card / eMMC */ 203 /* RAW SD card / eMMC */
206 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ 204 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */
207 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ 205 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
208 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ 206 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
209 207
210 /* NAND boot config */ 208 /* NAND boot config */
211 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 209 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
212 #define CONFIG_SYS_NAND_PAGE_COUNT 64 210 #define CONFIG_SYS_NAND_PAGE_COUNT 64
213 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 211 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
214 #define CONFIG_SYS_NAND_OOBSIZE 64 212 #define CONFIG_SYS_NAND_OOBSIZE 64
215 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 213 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
216 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 214 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
217 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 215 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
218 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ 216 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
219 48, 49, 50, 51, 52, 53, 54, 55,\ 217 48, 49, 50, 51, 52, 53, 54, 55,\
220 56, 57, 58, 59, 60, 61, 62, 63} 218 56, 57, 58, 59, 60, 61, 62, 63}
221 #define CONFIG_SYS_NAND_ECCSIZE 256 219 #define CONFIG_SYS_NAND_ECCSIZE 256
222 #define CONFIG_SYS_NAND_ECCBYTES 3 220 #define CONFIG_SYS_NAND_ECCBYTES 3
223 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW 221 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
224 #define CONFIG_NAND_OMAP_GPMC_PREFETCH 222 #define CONFIG_NAND_OMAP_GPMC_PREFETCH
225 223
226 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 224 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
227 225
228 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 226 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
229 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 227 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
230 228
231 #define CONFIG_CMD_UBIFS 229 #define CONFIG_CMD_UBIFS
232 #define CONFIG_RBTREE 230 #define CONFIG_RBTREE
233 #define CONFIG_LZO 231 #define CONFIG_LZO
234 #define CONFIG_MTD_PARTITIONS 232 #define CONFIG_MTD_PARTITIONS
235 #define CONFIG_MTD_DEVICE 233 #define CONFIG_MTD_DEVICE
236 #define CONFIG_CMD_MTDPARTS 234 #define CONFIG_CMD_MTDPARTS
237 235
238 /* Setup MTD for NAND on the SOM */ 236 /* Setup MTD for NAND on the SOM */
239 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 237 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
240 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \ 238 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
241 "1m(u-boot),256k(env1)," \ 239 "1m(u-boot),256k(env1)," \
242 "256k(env2),6m(kernel),-(rootfs)" 240 "256k(env2),6m(kernel),-(rootfs)"
243 241
244 #define CONFIG_TAM3517_SETTINGS \ 242 #define CONFIG_TAM3517_SETTINGS \
245 "netdev=eth0\0" \ 243 "netdev=eth0\0" \
246 "nandargs=setenv bootargs root=${nandroot} " \ 244 "nandargs=setenv bootargs root=${nandroot} " \
247 "rootfstype=${nandrootfstype}\0" \ 245 "rootfstype=${nandrootfstype}\0" \
248 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 246 "nfsargs=setenv bootargs root=/dev/nfs rw " \
249 "nfsroot=${serverip}:${rootpath}\0" \ 247 "nfsroot=${serverip}:${rootpath}\0" \
250 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 248 "ramargs=setenv bootargs root=/dev/ram rw\0" \
251 "addip_sta=setenv bootargs ${bootargs} " \ 249 "addip_sta=setenv bootargs ${bootargs} " \
252 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 250 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
253 ":${hostname}:${netdev}:off panic=1\0" \ 251 ":${hostname}:${netdev}:off panic=1\0" \
254 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 252 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
255 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 253 "addip=if test -n ${ipdyn};then run addip_dyn;" \
256 "else run addip_sta;fi\0" \ 254 "else run addip_sta;fi\0" \
257 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 255 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
258 "addtty=setenv bootargs ${bootargs}" \ 256 "addtty=setenv bootargs ${bootargs}" \
259 " console=ttyO0,${baudrate}\0" \ 257 " console=ttyO0,${baudrate}\0" \
260 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 258 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
261 "loadaddr=82000000\0" \ 259 "loadaddr=82000000\0" \
262 "kernel_addr_r=82000000\0" \ 260 "kernel_addr_r=82000000\0" \
263 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 261 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
264 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 262 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
265 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 263 "flash_self=run ramargs addip addtty addmtd addmisc;" \
266 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 264 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
267 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 265 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
268 "bootm ${kernel_addr}\0" \ 266 "bootm ${kernel_addr}\0" \
269 "nandboot=run nandargs addip addtty addmtd addmisc;" \ 267 "nandboot=run nandargs addip addtty addmtd addmisc;" \
270 "nand read ${kernel_addr_r} kernel\0" \ 268 "nand read ${kernel_addr_r} kernel\0" \
271 "bootm ${kernel_addr_r}\0" \ 269 "bootm ${kernel_addr_r}\0" \
272 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 270 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
273 "run nfsargs addip addtty addmtd addmisc;" \ 271 "run nfsargs addip addtty addmtd addmisc;" \
274 "bootm ${kernel_addr_r}\0" \ 272 "bootm ${kernel_addr_r}\0" \
275 "net_self=if run net_self_load;then " \ 273 "net_self=if run net_self_load;then " \
276 "run ramargs addip addtty addmtd addmisc;" \ 274 "run ramargs addip addtty addmtd addmisc;" \
277 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ 275 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
278 "else echo Images not loades;fi\0" \ 276 "else echo Images not loades;fi\0" \
279 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \ 277 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \
280 "load=tftp ${loadaddr} ${u-boot}\0" \ 278 "load=tftp ${loadaddr} ${u-boot}\0" \
281 "loadmlo=tftp ${loadaddr} ${mlo}\0" \ 279 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
282 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \ 280 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \
283 "uboot_addr=0x80000\0" \ 281 "uboot_addr=0x80000\0" \
284 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ 282 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
285 "nand write ${loadaddr} ${uboot_addr} 80000\0" \ 283 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
286 "updatemlo=nandecc hw;nand erase 0 20000;" \ 284 "updatemlo=nandecc hw;nand erase 0 20000;" \
287 "nand write ${loadaddr} 0 20000\0" \ 285 "nand write ${loadaddr} 0 20000\0" \
288 "upd=if run load;then echo Updating u-boot;if run update;" \ 286 "upd=if run load;then echo Updating u-boot;if run update;" \
289 "then echo U-Boot updated;" \ 287 "then echo U-Boot updated;" \
290 "else echo Error updating u-boot !;" \ 288 "else echo Error updating u-boot !;" \
291 "echo Board without bootloader !!;" \ 289 "echo Board without bootloader !!;" \
292 "fi;" \ 290 "fi;" \
293 "else echo U-Boot not downloaded..exiting;fi\0" \ 291 "else echo U-Boot not downloaded..exiting;fi\0" \
294 292
295 /* 293 /*
296 * this is common code for all TAM3517 boards. 294 * this is common code for all TAM3517 boards.
297 * MAC address is stored from manufacturer in 295 * MAC address is stored from manufacturer in
298 * I2C EEPROM 296 * I2C EEPROM
299 */ 297 */
300 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) 298 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
301 /* 299 /*
302 * The I2C EEPROM on the TAM3517 contains 300 * The I2C EEPROM on the TAM3517 contains
303 * mac address and production data 301 * mac address and production data
304 */ 302 */
305 struct tam3517_module_info { 303 struct tam3517_module_info {
306 char customer[48]; 304 char customer[48];
307 char product[48]; 305 char product[48];
308 306
309 /* 307 /*
310 * bit 0~47 : sequence number 308 * bit 0~47 : sequence number
311 * bit 48~55 : week of year, from 0. 309 * bit 48~55 : week of year, from 0.
312 * bit 56~63 : year 310 * bit 56~63 : year
313 */ 311 */
314 unsigned long long sequence_number; 312 unsigned long long sequence_number;
315 313
316 /* 314 /*
317 * bit 0~7 : revision fixed 315 * bit 0~7 : revision fixed
318 * bit 8~15 : revision major 316 * bit 8~15 : revision major
319 * bit 16~31 : TNxxx 317 * bit 16~31 : TNxxx
320 */ 318 */
321 unsigned int revision; 319 unsigned int revision;
322 unsigned char eth_addr[4][8]; 320 unsigned char eth_addr[4][8];
323 unsigned char _rev[100]; 321 unsigned char _rev[100];
324 }; 322 };
325 323
326 #define TAM3517_READ_EEPROM(info, ret) \ 324 #define TAM3517_READ_EEPROM(info, ret) \
327 do { \ 325 do { \
328 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \ 326 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
329 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \ 327 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
330 (void *)info, sizeof(*info))) \ 328 (void *)info, sizeof(*info))) \
331 ret = 1; \ 329 ret = 1; \
332 else \ 330 else \
333 ret = 0; \ 331 ret = 0; \
334 } while (0) 332 } while (0)
335 333
336 #define TAM3517_READ_MAC_FROM_EEPROM(info) \ 334 #define TAM3517_READ_MAC_FROM_EEPROM(info) \
337 do { \ 335 do { \
338 char buf[80], ethname[20]; \ 336 char buf[80], ethname[20]; \
339 int i; \ 337 int i; \
340 memset(buf, 0, sizeof(buf)); \ 338 memset(buf, 0, sizeof(buf)); \
341 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \ 339 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \
342 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \ 340 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \
343 (info)->eth_addr[i][5], \ 341 (info)->eth_addr[i][5], \
344 (info)->eth_addr[i][4], \ 342 (info)->eth_addr[i][4], \
345 (info)->eth_addr[i][3], \ 343 (info)->eth_addr[i][3], \
346 (info)->eth_addr[i][2], \ 344 (info)->eth_addr[i][2], \
347 (info)->eth_addr[i][1], \ 345 (info)->eth_addr[i][1], \
348 (info)->eth_addr[i][0]); \ 346 (info)->eth_addr[i][0]); \
349 \ 347 \
350 if (i) \ 348 if (i) \
351 sprintf(ethname, "eth%daddr", i); \ 349 sprintf(ethname, "eth%daddr", i); \
352 else \ 350 else \
353 strcpy(ethname, "ethaddr"); \ 351 strcpy(ethname, "ethaddr"); \
354 printf("Setting %s from EEPROM with %s\n", ethname, buf);\ 352 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
355 setenv(ethname, buf); \ 353 setenv(ethname, buf); \
356 } \ 354 } \
357 } while (0) 355 } while (0)
358 356
359 /* The following macros are taken from Technexion's documentation */ 357 /* The following macros are taken from Technexion's documentation */
360 #define TAM3517_sequence_number(info) \ 358 #define TAM3517_sequence_number(info) \
361 ((info)->sequence_number % 0x1000000000000LL) 359 ((info)->sequence_number % 0x1000000000000LL)
362 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100) 360 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
363 #define TAM3517_year(info) ((info)->sequence_number >> 56) 361 #define TAM3517_year(info) ((info)->sequence_number >> 56)
364 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100) 362 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
365 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100) 363 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
366 #define TAM3517_revision_tn(info) ((info)->revision >> 16) 364 #define TAM3517_revision_tn(info) ((info)->revision >> 16)
367 365
368 #define TAM3517_PRINT_SOM_INFO(info) \ 366 #define TAM3517_PRINT_SOM_INFO(info) \
369 do { \ 367 do { \
370 printf("Vendor:%s\n", (info)->customer); \ 368 printf("Vendor:%s\n", (info)->customer); \
371 printf("SOM: %s\n", (info)->product); \ 369 printf("SOM: %s\n", (info)->product); \
372 printf("SeqNr: %02llu%02llu%012llu\n", \ 370 printf("SeqNr: %02llu%02llu%012llu\n", \
373 TAM3517_year(info), \ 371 TAM3517_year(info), \
374 TAM3517_week_of_year(info), \ 372 TAM3517_week_of_year(info), \
375 TAM3517_sequence_number(info)); \ 373 TAM3517_sequence_number(info)); \
376 printf("Rev: TN%u %u.%u\n", \ 374 printf("Rev: TN%u %u.%u\n", \
377 TAM3517_revision_tn(info), \ 375 TAM3517_revision_tn(info), \
378 TAM3517_revision_major(info), \ 376 TAM3517_revision_major(info), \
379 TAM3517_revision_fixed(info)); \ 377 TAM3517_revision_fixed(info)); \
380 } while (0) 378 } while (0)
381 379
382 #endif 380 #endif
383 381
384 #endif /* __TAM3517_H */ 382 #endif /* __TAM3517_H */
385 383
include/configs/tao3530.h
Diff comments   View file @ 68ccab5
1 /* 1 /*
2 * Configuration settings for the TechNexion TAO-3530 SOM 2 * Configuration settings for the TechNexion TAO-3530 SOM
3 * equipped on Thunder baseboard. 3 * equipped on Thunder baseboard.
4 * 4 *
5 * Edward Lin <linuxfae@technexion.com> 5 * Edward Lin <linuxfae@technexion.com>
6 * Tapani Utriainen <linuxfae@technexion.com> 6 * Tapani Utriainen <linuxfae@technexion.com>
7 * 7 *
8 * Copyright (C) 2013 Stefan Roese <sr@denx.de> 8 * Copyright (C) 2013 Stefan Roese <sr@denx.de>
9 * 9 *
10 * SPDX-License-Identifier: GPL-2.0+ 10 * SPDX-License-Identifier: GPL-2.0+
11 */ 11 */
12 12
13 #ifndef __CONFIG_H 13 #ifndef __CONFIG_H
14 #define __CONFIG_H 14 #define __CONFIG_H
15 15
16 /* 16 /*
17 * High Level Configuration Options 17 * High Level Configuration Options
18 */ 18 */
19 19
20 #define CONFIG_SDRC /* Has an SDRC controller */ 20 #define CONFIG_SDRC /* Has an SDRC controller */
21 21
22 #include <asm/arch/cpu.h> /* get chip and board defs */ 22 #include <asm/arch/cpu.h> /* get chip and board defs */
23 #include <asm/arch/omap.h> 23 #include <asm/arch/omap.h>
24 24
25 /* Clock Defines */ 25 /* Clock Defines */
26 #define V_OSCK 26000000 /* Clock output from T2 */ 26 #define V_OSCK 26000000 /* Clock output from T2 */
27 #define V_SCLK (V_OSCK >> 1) 27 #define V_SCLK (V_OSCK >> 1)
28 28
29 #define CONFIG_MISC_INIT_R 29 #define CONFIG_MISC_INIT_R
30 30
31 #define CONFIG_CMDLINE_TAG 31 #define CONFIG_CMDLINE_TAG
32 #define CONFIG_SETUP_MEMORY_TAGS 32 #define CONFIG_SETUP_MEMORY_TAGS
33 #define CONFIG_INITRD_TAG 33 #define CONFIG_INITRD_TAG
34 #define CONFIG_REVISION_TAG 34 #define CONFIG_REVISION_TAG
35 35
36 /* 36 /*
37 * Size of malloc() pool 37 * Size of malloc() pool
38 */ 38 */
39 #define CONFIG_SYS_MALLOC_LEN (4 << 20) 39 #define CONFIG_SYS_MALLOC_LEN (4 << 20)
40 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ 40 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
41 41
42 /* 42 /*
43 * Hardware drivers 43 * Hardware drivers
44 */ 44 */
45 45
46 /* 46 /*
47 * NS16550 Configuration 47 * NS16550 Configuration
48 */ 48 */
49 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 49 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
50 50
51 #define CONFIG_SYS_NS16550_SERIAL 51 #define CONFIG_SYS_NS16550_SERIAL
52 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 52 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
53 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 53 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
54 54
55 /* 55 /*
56 * select serial console configuration 56 * select serial console configuration
57 */ 57 */
58 #define CONFIG_CONS_INDEX 3 58 #define CONFIG_CONS_INDEX 3
59 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 59 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
60 60
61 /* allow to overwrite serial and ethaddr */ 61 /* allow to overwrite serial and ethaddr */
62 #define CONFIG_ENV_OVERWRITE 62 #define CONFIG_ENV_OVERWRITE
63 63
64 /* GPIO banks */
65 #define CONFIG_OMAP3_GPIO_2 /* GPIO32 ..63 is in GPIO bank 2 */
66 #define CONFIG_OMAP3_GPIO_3 /* GPIO64 ..95 is in GPIO bank 3 */
67 #define CONFIG_OMAP3_GPIO_4 /* GPIO96 ..127 is in GPIO bank 4 */
68 #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */
69 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
70
71 /* commands to include */ 64 /* commands to include */
72 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 65 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
73 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 66 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
74 #define MTDIDS_DEFAULT "nand0=nand" 67 #define MTDIDS_DEFAULT "nand0=nand"
75 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 68 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
76 "1920k(u-boot),128k(u-boot-env),"\ 69 "1920k(u-boot),128k(u-boot-env),"\
77 "4m(kernel),-(fs)" 70 "4m(kernel),-(fs)"
78 71
79 #define CONFIG_CMD_NAND /* NAND support */ 72 #define CONFIG_CMD_NAND /* NAND support */
80 73
81 #define CONFIG_SYS_I2C 74 #define CONFIG_SYS_I2C
82 #define CONFIG_SYS_I2C_OMAP34XX 75 #define CONFIG_SYS_I2C_OMAP34XX
83 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 76 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
84 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 77 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
85 #define CONFIG_I2C_MULTI_BUS 78 #define CONFIG_I2C_MULTI_BUS
86 79
87 /* 80 /*
88 * TWL4030 81 * TWL4030
89 */ 82 */
90 #define CONFIG_TWL4030_LED 83 #define CONFIG_TWL4030_LED
91 84
92 /* 85 /*
93 * Board NAND Info. 86 * Board NAND Info.
94 */ 87 */
95 #define CONFIG_NAND_OMAP_GPMC 88 #define CONFIG_NAND_OMAP_GPMC
96 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 89 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
97 /* to access nand */ 90 /* to access nand */
98 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 91 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
99 /* to access nand at */ 92 /* to access nand at */
100 /* CS0 */ 93 /* CS0 */
101 94
102 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 95 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
103 /* devices */ 96 /* devices */
104 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 97 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
105 /* Environment information */ 98 /* Environment information */
106 99
107 #define CONFIG_EXTRA_ENV_SETTINGS \ 100 #define CONFIG_EXTRA_ENV_SETTINGS \
108 "loadaddr=0x82000000\0" \ 101 "loadaddr=0x82000000\0" \
109 "console=ttyO2,115200n8\0" \ 102 "console=ttyO2,115200n8\0" \
110 "mpurate=600\0" \ 103 "mpurate=600\0" \
111 "dvi_mode=omapfb.mode=dvi:1280x720-24@60\0" \ 104 "dvi_mode=omapfb.mode=dvi:1280x720-24@60\0" \
112 "tv_mode=omapfb.mode=tv:ntsc\0" \ 105 "tv_mode=omapfb.mode=tv:ntsc\0" \
113 "video_mode=omapdss.def_disp=lcd vram=6M omapfb.vram=0:2M,1:2M,2:2M\0" \ 106 "video_mode=omapdss.def_disp=lcd vram=6M omapfb.vram=0:2M,1:2M,2:2M\0" \
114 "lcd_mode=omapfb.mode=lcd:800x480@60 \0" \ 107 "lcd_mode=omapfb.mode=lcd:800x480@60 \0" \
115 "extra_options= \0" \ 108 "extra_options= \0" \
116 "mmcdev=0\0" \ 109 "mmcdev=0\0" \
117 "mmcroot=/dev/mmcblk0p2 rw\0" \ 110 "mmcroot=/dev/mmcblk0p2 rw\0" \
118 "mmcrootfstype=ext3 rootwait\0" \ 111 "mmcrootfstype=ext3 rootwait\0" \
119 "nandroot=ubi0:rootfs ubi.mtd=4\0" \ 112 "nandroot=ubi0:rootfs ubi.mtd=4\0" \
120 "nandrootfstype=ubifs\0" \ 113 "nandrootfstype=ubifs\0" \
121 "mmcargs=setenv bootargs console=${console} " \ 114 "mmcargs=setenv bootargs console=${console} " \
122 "mpurate=${mpurate} " \ 115 "mpurate=${mpurate} " \
123 "${video_mode} " \ 116 "${video_mode} " \
124 "root=${mmcroot} " \ 117 "root=${mmcroot} " \
125 "rootfstype=${mmcrootfstype} " \ 118 "rootfstype=${mmcrootfstype} " \
126 "${extra_options}\0" \ 119 "${extra_options}\0" \
127 "nandargs=setenv bootargs console=${console} " \ 120 "nandargs=setenv bootargs console=${console} " \
128 "mpurate=${mpurate} " \ 121 "mpurate=${mpurate} " \
129 "${video_mode} " \ 122 "${video_mode} " \
130 "${network_setting} " \ 123 "${network_setting} " \
131 "root=${nandroot} " \ 124 "root=${nandroot} " \
132 "rootfstype=${nandrootfstype} "\ 125 "rootfstype=${nandrootfstype} "\
133 "${extra_options}\0" \ 126 "${extra_options}\0" \
134 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 127 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
135 "bootscript=echo Running bootscript from mmc ...; " \ 128 "bootscript=echo Running bootscript from mmc ...; " \
136 "source ${loadaddr}\0" \ 129 "source ${loadaddr}\0" \
137 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 130 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
138 "mmcboot=echo Booting from mmc ...; " \ 131 "mmcboot=echo Booting from mmc ...; " \
139 "run mmcargs; " \ 132 "run mmcargs; " \
140 "bootm ${loadaddr}\0" \ 133 "bootm ${loadaddr}\0" \
141 "nandboot=echo Booting from nand ...; " \ 134 "nandboot=echo Booting from nand ...; " \
142 "run nandargs; " \ 135 "run nandargs; " \
143 "nand read ${loadaddr} 280000 400000; " \ 136 "nand read ${loadaddr} 280000 400000; " \
144 "bootm ${loadaddr}\0" \ 137 "bootm ${loadaddr}\0" \
145 138
146 #define CONFIG_BOOTCOMMAND \ 139 #define CONFIG_BOOTCOMMAND \
147 "if mmc rescan ${mmcdev}; then " \ 140 "if mmc rescan ${mmcdev}; then " \
148 "if run loadbootscript; then " \ 141 "if run loadbootscript; then " \
149 "run bootscript; " \ 142 "run bootscript; " \
150 "else " \ 143 "else " \
151 "if run loaduimage; then " \ 144 "if run loaduimage; then " \
152 "run mmcboot; " \ 145 "run mmcboot; " \
153 "else run nandboot; " \ 146 "else run nandboot; " \
154 "fi; " \ 147 "fi; " \
155 "fi; " \ 148 "fi; " \
156 "else run nandboot; fi" 149 "else run nandboot; fi"
157 150
158 /* 151 /*
159 * Miscellaneous configurable options 152 * Miscellaneous configurable options
160 */ 153 */
161 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 154 #define CONFIG_SYS_LONGHELP /* undef to save memory */
162 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 155 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
163 156
164 /* turn on command-line edit/hist/auto */ 157 /* turn on command-line edit/hist/auto */
165 #define CONFIG_CMDLINE_EDITING 158 #define CONFIG_CMDLINE_EDITING
166 #define CONFIG_AUTO_COMPLETE 159 #define CONFIG_AUTO_COMPLETE
167 160
168 /* Print Buffer Size */ 161 /* Print Buffer Size */
169 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 162 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
170 sizeof(CONFIG_SYS_PROMPT) + 16) 163 sizeof(CONFIG_SYS_PROMPT) + 16)
171 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 164 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
172 /* Boot Argument Buffer Size */ 165 /* Boot Argument Buffer Size */
173 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 166 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
174 167
175 #define CONFIG_SYS_ALT_MEMTEST 1 168 #define CONFIG_SYS_ALT_MEMTEST 1
176 #define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest */ 169 #define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest */
177 /* defaults */ 170 /* defaults */
178 #define CONFIG_SYS_MEMTEST_END (0x83FFFFFF) /* 64MB */ 171 #define CONFIG_SYS_MEMTEST_END (0x83FFFFFF) /* 64MB */
179 #define CONFIG_SYS_MEMTEST_SCRATCH (0x81000000) /* dummy address */ 172 #define CONFIG_SYS_MEMTEST_SCRATCH (0x81000000) /* dummy address */
180 173
181 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ 174 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
182 /* load address */ 175 /* load address */
183 #define CONFIG_SYS_TEXT_BASE 0x80008000 176 #define CONFIG_SYS_TEXT_BASE 0x80008000
184 177
185 /* 178 /*
186 * OMAP3 has 12 GP timers, they can be driven by the system clock 179 * OMAP3 has 12 GP timers, they can be driven by the system clock
187 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 180 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
188 * This rate is divided by a local divisor. 181 * This rate is divided by a local divisor.
189 */ 182 */
190 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 183 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
191 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 184 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
192 185
193 /* 186 /*
194 * Physical Memory Map 187 * Physical Memory Map
195 */ 188 */
196 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 189 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
197 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 190 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
198 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */ 191 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
199 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 192 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
200 193
201 /* 194 /*
202 * FLASH and environment organization 195 * FLASH and environment organization
203 */ 196 */
204 197
205 /* **** PISMO SUPPORT *** */ 198 /* **** PISMO SUPPORT *** */
206 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 199 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
207 #define CONFIG_SYS_FLASH_BASE NAND_BASE 200 #define CONFIG_SYS_FLASH_BASE NAND_BASE
208 201
209 /* Monitor at start of flash */ 202 /* Monitor at start of flash */
210 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 203 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
211 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 204 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
212 205
213 #define CONFIG_ENV_IS_IN_NAND 1 206 #define CONFIG_ENV_IS_IN_NAND 1
214 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 207 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
215 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 208 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
216 209
217 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) 210 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10)
218 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 211 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
219 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET 212 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
220 213
221 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 214 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
222 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 215 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
223 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 216 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
224 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 217 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
225 CONFIG_SYS_INIT_RAM_SIZE - \ 218 CONFIG_SYS_INIT_RAM_SIZE - \
226 GENERATED_GBL_DATA_SIZE) 219 GENERATED_GBL_DATA_SIZE)
227 220
228 #define CONFIG_OMAP3_SPI 221 #define CONFIG_OMAP3_SPI
229 222
230 /* 223 /*
231 * USB 224 * USB
232 * 225 *
233 * Currently only EHCI is enabled, the MUSB OTG controller 226 * Currently only EHCI is enabled, the MUSB OTG controller
234 * is not enabled. 227 * is not enabled.
235 */ 228 */
236 229
237 /* USB EHCI */ 230 /* USB EHCI */
238 #define CONFIG_USB_EHCI 231 #define CONFIG_USB_EHCI
239 #define CONFIG_USB_EHCI_OMAP 232 #define CONFIG_USB_EHCI_OMAP
240 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 162 233 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 162
241 234
242 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 235 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
243 #define CONFIG_USB_HOST_ETHER 236 #define CONFIG_USB_HOST_ETHER
244 #define CONFIG_USB_ETHER_SMSC95XX 237 #define CONFIG_USB_ETHER_SMSC95XX
245 238
246 #define CONFIG_USB_ETHER 239 #define CONFIG_USB_ETHER
247 #define CONFIG_USB_ETHER_RNDIS 240 #define CONFIG_USB_ETHER_RNDIS
248 241
249 /* Defines for SPL */ 242 /* Defines for SPL */
250 #define CONFIG_SPL_FRAMEWORK 243 #define CONFIG_SPL_FRAMEWORK
251 #define CONFIG_SPL_NAND_SIMPLE 244 #define CONFIG_SPL_NAND_SIMPLE
252 245
253 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 246 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
254 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 247 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
255 248
256 #define CONFIG_SPL_BOARD_INIT 249 #define CONFIG_SPL_BOARD_INIT
257 #define CONFIG_SPL_NAND_BASE 250 #define CONFIG_SPL_NAND_BASE
258 #define CONFIG_SPL_NAND_DRIVERS 251 #define CONFIG_SPL_NAND_DRIVERS
259 #define CONFIG_SPL_NAND_ECC 252 #define CONFIG_SPL_NAND_ECC
260 #define CONFIG_SPL_OMAP3_ID_NAND 253 #define CONFIG_SPL_OMAP3_ID_NAND
261 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" 254 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
262 255
263 /* NAND boot config */ 256 /* NAND boot config */
264 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 257 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
265 #define CONFIG_SYS_NAND_PAGE_COUNT 64 258 #define CONFIG_SYS_NAND_PAGE_COUNT 64
266 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 259 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
267 #define CONFIG_SYS_NAND_OOBSIZE 64 260 #define CONFIG_SYS_NAND_OOBSIZE 64
268 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 261 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
269 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 262 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
270 /* 263 /*
271 * Use the ECC/OOB layout from omap_gpmc.h that matches your chip: 264 * Use the ECC/OOB layout from omap_gpmc.h that matches your chip:
272 * SP vs LP, 8bit vs 16bit: GPMC_NAND_HW_ECC_LAYOUT 265 * SP vs LP, 8bit vs 16bit: GPMC_NAND_HW_ECC_LAYOUT
273 */ 266 */
274 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 267 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
275 10, 11, 12, 13 } 268 10, 11, 12, 13 }
276 #define CONFIG_SYS_NAND_ECCSIZE 512 269 #define CONFIG_SYS_NAND_ECCSIZE 512
277 #define CONFIG_SYS_NAND_ECCBYTES 3 270 #define CONFIG_SYS_NAND_ECCBYTES 3
278 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 271 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
279 272
280 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 273 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
281 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 274 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
282 275
283 #define CONFIG_SPL_TEXT_BASE 0x40200800 276 #define CONFIG_SPL_TEXT_BASE 0x40200800
284 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 277 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
285 CONFIG_SPL_TEXT_BASE) 278 CONFIG_SPL_TEXT_BASE)
286 279
287 /* 280 /*
288 * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the 281 * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the
289 * older x-loader implementations. And move the BSS area so that it 282 * older x-loader implementations. And move the BSS area so that it
290 * doesn't overlap with TEXT_BASE. 283 * doesn't overlap with TEXT_BASE.
291 */ 284 */
292 #define CONFIG_SYS_TEXT_BASE 0x80008000 285 #define CONFIG_SYS_TEXT_BASE 0x80008000
293 #define CONFIG_SPL_BSS_START_ADDR 0x80100000 286 #define CONFIG_SPL_BSS_START_ADDR 0x80100000
294 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 287 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
295 288
296 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 289 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
297 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 290 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
298 291
299 #endif /* __CONFIG_H */ 292 #endif /* __CONFIG_H */
300 293
include/configs/tricorder.h
Diff comments   View file @ 68ccab5
1 /* 1 /*
2 * (C) Copyright 2006-2008 2 * (C) Copyright 2006-2008
3 * Texas Instruments. 3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com> 4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 * 6 *
7 * (C) Copyright 2012 7 * (C) Copyright 2012
8 * Corscience GmbH & Co. KG 8 * Corscience GmbH & Co. KG
9 * Thomas Weber <weber@corscience.de> 9 * Thomas Weber <weber@corscience.de>
10 * 10 *
11 * Configuration settings for the Tricorder board. 11 * Configuration settings for the Tricorder board.
12 * 12 *
13 * SPDX-License-Identifier: GPL-2.0+ 13 * SPDX-License-Identifier: GPL-2.0+
14 */ 14 */
15 15
16 #ifndef __CONFIG_H 16 #ifndef __CONFIG_H
17 #define __CONFIG_H 17 #define __CONFIG_H
18 18
19 #define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER 19 #define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER
20 /* 20 /*
21 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 21 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
22 * 64 bytes before this address should be set aside for u-boot.img's 22 * 64 bytes before this address should be set aside for u-boot.img's
23 * header. That is 0x800FFFC0--0x80100000 should not be used for any 23 * header. That is 0x800FFFC0--0x80100000 should not be used for any
24 * other needs. 24 * other needs.
25 */ 25 */
26 #define CONFIG_SYS_TEXT_BASE 0x80100000 26 #define CONFIG_SYS_TEXT_BASE 0x80100000
27 27
28 #define CONFIG_SDRC /* The chip has SDRC controller */ 28 #define CONFIG_SDRC /* The chip has SDRC controller */
29 29
30 #include <asm/arch/cpu.h> /* get chip and board defs */ 30 #include <asm/arch/cpu.h> /* get chip and board defs */
31 #include <asm/arch/omap.h> 31 #include <asm/arch/omap.h>
32 32
33 /* Clock Defines */ 33 /* Clock Defines */
34 #define V_OSCK 26000000 /* Clock output from T2 */ 34 #define V_OSCK 26000000 /* Clock output from T2 */
35 #define V_SCLK (V_OSCK >> 1) 35 #define V_SCLK (V_OSCK >> 1)
36 36
37 #define CONFIG_MISC_INIT_R 37 #define CONFIG_MISC_INIT_R
38 38
39 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 39 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
40 #define CONFIG_SETUP_MEMORY_TAGS 40 #define CONFIG_SETUP_MEMORY_TAGS
41 #define CONFIG_INITRD_TAG 41 #define CONFIG_INITRD_TAG
42 #define CONFIG_REVISION_TAG 42 #define CONFIG_REVISION_TAG
43 43
44 /* Size of malloc() pool */ 44 /* Size of malloc() pool */
45 #define CONFIG_SYS_MALLOC_LEN (1024*1024) 45 #define CONFIG_SYS_MALLOC_LEN (1024*1024)
46 46
47 /* Hardware drivers */ 47 /* Hardware drivers */
48 48
49 /* GPIO banks */
50 #define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 are in GPIO bank 2 */
51
52 /* LED support */
53
54 /* NS16550 Configuration */ 49 /* NS16550 Configuration */
55 #define CONFIG_SYS_NS16550_SERIAL 50 #define CONFIG_SYS_NS16550_SERIAL
56 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 51 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
57 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 52 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
58 53
59 /* select serial console configuration */ 54 /* select serial console configuration */
60 #define CONFIG_CONS_INDEX 3 55 #define CONFIG_CONS_INDEX 3
61 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 56 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
62 #define CONFIG_SERIAL3 3 57 #define CONFIG_SERIAL3 3
63 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 58 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
64 115200} 59 115200}
65 60
66 /* I2C */ 61 /* I2C */
67 #define CONFIG_SYS_I2C 62 #define CONFIG_SYS_I2C
68 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 63 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
69 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 64 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
70 #define CONFIG_SYS_I2C_OMAP34XX 65 #define CONFIG_SYS_I2C_OMAP34XX
71 66
72 67
73 /* EEPROM */ 68 /* EEPROM */
74 #define CONFIG_CMD_EEPROM 69 #define CONFIG_CMD_EEPROM
75 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 70 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
76 #define CONFIG_SYS_EEPROM_BUS_NUM 1 71 #define CONFIG_SYS_EEPROM_BUS_NUM 1
77 72
78 /* TWL4030 */ 73 /* TWL4030 */
79 #define CONFIG_TWL4030_LED 74 #define CONFIG_TWL4030_LED
80 75
81 /* Board NAND Info */ 76 /* Board NAND Info */
82 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 77 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
83 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 78 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
84 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ 79 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
85 "128k(SPL)," \ 80 "128k(SPL)," \
86 "1m(u-boot)," \ 81 "1m(u-boot)," \
87 "384k(u-boot-env1)," \ 82 "384k(u-boot-env1)," \
88 "1152k(mtdoops)," \ 83 "1152k(mtdoops)," \
89 "384k(u-boot-env2)," \ 84 "384k(u-boot-env2)," \
90 "5m(kernel)," \ 85 "5m(kernel)," \
91 "2m(fdt)," \ 86 "2m(fdt)," \
92 "-(ubi)" 87 "-(ubi)"
93 88
94 #define CONFIG_NAND_OMAP_GPMC 89 #define CONFIG_NAND_OMAP_GPMC
95 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 90 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
96 /* to access nand */ 91 /* to access nand */
97 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 92 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
98 /* to access nand at */ 93 /* to access nand at */
99 /* CS0 */ 94 /* CS0 */
100 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 95 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
101 /* devices */ 96 /* devices */
102 #define CONFIG_BCH 97 #define CONFIG_BCH
103 #define CONFIG_SYS_NAND_MAX_OOBFREE 2 98 #define CONFIG_SYS_NAND_MAX_OOBFREE 2
104 #define CONFIG_SYS_NAND_MAX_ECCPOS 56 99 #define CONFIG_SYS_NAND_MAX_ECCPOS 56
105 100
106 /* commands to include */ 101 /* commands to include */
107 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 102 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
108 #define CONFIG_CMD_NAND /* NAND support */ 103 #define CONFIG_CMD_NAND /* NAND support */
109 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ 104 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
110 #define CONFIG_CMD_UBIFS /* UBIFS commands */ 105 #define CONFIG_CMD_UBIFS /* UBIFS commands */
111 #define CONFIG_LZO /* LZO is needed for UBIFS */ 106 #define CONFIG_LZO /* LZO is needed for UBIFS */
112 107
113 #undef CONFIG_CMD_JFFS2 /* JFFS2 Support */ 108 #undef CONFIG_CMD_JFFS2 /* JFFS2 Support */
114 109
115 /* needed for ubi */ 110 /* needed for ubi */
116 #define CONFIG_RBTREE 111 #define CONFIG_RBTREE
117 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 112 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
118 #define CONFIG_MTD_PARTITIONS 113 #define CONFIG_MTD_PARTITIONS
119 114
120 /* Environment information (this is the common part) */ 115 /* Environment information (this is the common part) */
121 116
122 117
123 /* hang() the board on panic() */ 118 /* hang() the board on panic() */
124 #define CONFIG_PANIC_HANG 119 #define CONFIG_PANIC_HANG
125 120
126 /* environment placement (for NAND), is different for FLASHCARD but does not 121 /* environment placement (for NAND), is different for FLASHCARD but does not
127 * harm there */ 122 * harm there */
128 #define CONFIG_ENV_OFFSET 0x120000 /* env start */ 123 #define CONFIG_ENV_OFFSET 0x120000 /* env start */
129 #define CONFIG_ENV_OFFSET_REDUND 0x2A0000 /* redundant env start */ 124 #define CONFIG_ENV_OFFSET_REDUND 0x2A0000 /* redundant env start */
130 #define CONFIG_ENV_SIZE (16 << 10) /* use 16KiB for env */ 125 #define CONFIG_ENV_SIZE (16 << 10) /* use 16KiB for env */
131 #define CONFIG_ENV_RANGE (384 << 10) /* allow badblocks in env */ 126 #define CONFIG_ENV_RANGE (384 << 10) /* allow badblocks in env */
132 127
133 /* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend 128 /* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend
134 * value can not be used here! */ 129 * value can not be used here! */
135 #define CONFIG_LOADADDR 0x82000000 130 #define CONFIG_LOADADDR 0x82000000
136 131
137 #define CONFIG_COMMON_ENV_SETTINGS \ 132 #define CONFIG_COMMON_ENV_SETTINGS \
138 "console=ttyO2,115200n8\0" \ 133 "console=ttyO2,115200n8\0" \
139 "mmcdev=0\0" \ 134 "mmcdev=0\0" \
140 "vram=3M\0" \ 135 "vram=3M\0" \
141 "defaultdisplay=lcd\0" \ 136 "defaultdisplay=lcd\0" \
142 "kernelopts=mtdoops.mtddev=3\0" \ 137 "kernelopts=mtdoops.mtddev=3\0" \
143 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 138 "mtdparts=" MTDPARTS_DEFAULT "\0" \
144 "mtdids=" MTDIDS_DEFAULT "\0" \ 139 "mtdids=" MTDIDS_DEFAULT "\0" \
145 "commonargs=" \ 140 "commonargs=" \
146 "setenv bootargs console=${console} " \ 141 "setenv bootargs console=${console} " \
147 "${mtdparts} " \ 142 "${mtdparts} " \
148 "${kernelopts} " \ 143 "${kernelopts} " \
149 "vt.global_cursor_default=0 " \ 144 "vt.global_cursor_default=0 " \
150 "vram=${vram} " \ 145 "vram=${vram} " \
151 "omapdss.def_disp=${defaultdisplay}\0" 146 "omapdss.def_disp=${defaultdisplay}\0"
152 147
153 #define CONFIG_BOOTCOMMAND "run autoboot" 148 #define CONFIG_BOOTCOMMAND "run autoboot"
154 149
155 /* specific environment settings for different use cases 150 /* specific environment settings for different use cases
156 * FLASHCARD: used to run a rdimage from sdcard to program the device 151 * FLASHCARD: used to run a rdimage from sdcard to program the device
157 * 'NORMAL': used to boot kernel from sdcard, nand, ... 152 * 'NORMAL': used to boot kernel from sdcard, nand, ...
158 * 153 *
159 * The main aim for the FLASHCARD skin is to have an embedded environment 154 * The main aim for the FLASHCARD skin is to have an embedded environment
160 * which will not be influenced by any data already on the device. 155 * which will not be influenced by any data already on the device.
161 */ 156 */
162 #ifdef CONFIG_FLASHCARD 157 #ifdef CONFIG_FLASHCARD
163 158
164 #define CONFIG_ENV_IS_NOWHERE 159 #define CONFIG_ENV_IS_NOWHERE
165 160
166 /* the rdaddr is 16 MiB before the loadaddr */ 161 /* the rdaddr is 16 MiB before the loadaddr */
167 #define CONFIG_ENV_RDADDR "rdaddr=0x81000000\0" 162 #define CONFIG_ENV_RDADDR "rdaddr=0x81000000\0"
168 163
169 #define CONFIG_EXTRA_ENV_SETTINGS \ 164 #define CONFIG_EXTRA_ENV_SETTINGS \
170 CONFIG_COMMON_ENV_SETTINGS \ 165 CONFIG_COMMON_ENV_SETTINGS \
171 CONFIG_ENV_RDADDR \ 166 CONFIG_ENV_RDADDR \
172 "autoboot=" \ 167 "autoboot=" \
173 "run commonargs; " \ 168 "run commonargs; " \
174 "setenv bootargs ${bootargs} " \ 169 "setenv bootargs ${bootargs} " \
175 "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \ 170 "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \
176 "rdinit=/sbin/init; " \ 171 "rdinit=/sbin/init; " \
177 "mmc dev ${mmcdev}; mmc rescan; " \ 172 "mmc dev ${mmcdev}; mmc rescan; " \
178 "fatload mmc ${mmcdev} ${loadaddr} uImage; " \ 173 "fatload mmc ${mmcdev} ${loadaddr} uImage; " \
179 "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \ 174 "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \
180 "bootm ${loadaddr} ${rdaddr}\0" 175 "bootm ${loadaddr} ${rdaddr}\0"
181 176
182 #else /* CONFIG_FLASHCARD */ 177 #else /* CONFIG_FLASHCARD */
183 178
184 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */ 179 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
185 180
186 #define CONFIG_ENV_IS_IN_NAND 181 #define CONFIG_ENV_IS_IN_NAND
187 182
188 #define CONFIG_EXTRA_ENV_SETTINGS \ 183 #define CONFIG_EXTRA_ENV_SETTINGS \
189 CONFIG_COMMON_ENV_SETTINGS \ 184 CONFIG_COMMON_ENV_SETTINGS \
190 "mmcargs=" \ 185 "mmcargs=" \
191 "run commonargs; " \ 186 "run commonargs; " \
192 "setenv bootargs ${bootargs} " \ 187 "setenv bootargs ${bootargs} " \
193 "root=/dev/mmcblk0p2 " \ 188 "root=/dev/mmcblk0p2 " \
194 "rootwait " \ 189 "rootwait " \
195 "rw\0" \ 190 "rw\0" \
196 "nandargs=" \ 191 "nandargs=" \
197 "run commonargs; " \ 192 "run commonargs; " \
198 "setenv bootargs ${bootargs} " \ 193 "setenv bootargs ${bootargs} " \
199 "root=ubi0:root " \ 194 "root=ubi0:root " \
200 "ubi.mtd=7 " \ 195 "ubi.mtd=7 " \
201 "rootfstype=ubifs " \ 196 "rootfstype=ubifs " \
202 "ro\0" \ 197 "ro\0" \
203 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 198 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
204 "bootscript=echo Running bootscript from mmc ...; " \ 199 "bootscript=echo Running bootscript from mmc ...; " \
205 "source ${loadaddr}\0" \ 200 "source ${loadaddr}\0" \
206 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 201 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
207 "mmcboot=echo Booting from mmc ...; " \ 202 "mmcboot=echo Booting from mmc ...; " \
208 "run mmcargs; " \ 203 "run mmcargs; " \
209 "bootm ${loadaddr}\0" \ 204 "bootm ${loadaddr}\0" \
210 "loaduimage_ubi=ubi part ubi; " \ 205 "loaduimage_ubi=ubi part ubi; " \
211 "ubifsmount ubi:root; " \ 206 "ubifsmount ubi:root; " \
212 "ubifsload ${loadaddr} /boot/uImage\0" \ 207 "ubifsload ${loadaddr} /boot/uImage\0" \
213 "loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \ 208 "loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \
214 "nandboot=echo Booting from nand ...; " \ 209 "nandboot=echo Booting from nand ...; " \
215 "run nandargs; " \ 210 "run nandargs; " \
216 "run loaduimage_nand; " \ 211 "run loaduimage_nand; " \
217 "bootm ${loadaddr}\0" \ 212 "bootm ${loadaddr}\0" \
218 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ 213 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
219 "if run loadbootscript; then " \ 214 "if run loadbootscript; then " \
220 "run bootscript; " \ 215 "run bootscript; " \
221 "else " \ 216 "else " \
222 "if run loaduimage; then " \ 217 "if run loaduimage; then " \
223 "run mmcboot; " \ 218 "run mmcboot; " \
224 "else run nandboot; " \ 219 "else run nandboot; " \
225 "fi; " \ 220 "fi; " \
226 "fi; " \ 221 "fi; " \
227 "else run nandboot; fi\0" 222 "else run nandboot; fi\0"
228 223
229 #endif /* CONFIG_FLASHCARD */ 224 #endif /* CONFIG_FLASHCARD */
230 225
231 /* Miscellaneous configurable options */ 226 /* Miscellaneous configurable options */
232 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 227 #define CONFIG_SYS_LONGHELP /* undef to save memory */
233 #define CONFIG_CMDLINE_EDITING /* enable cmdline history */ 228 #define CONFIG_CMDLINE_EDITING /* enable cmdline history */
234 #define CONFIG_AUTO_COMPLETE 229 #define CONFIG_AUTO_COMPLETE
235 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 230 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
236 /* Print Buffer Size */ 231 /* Print Buffer Size */
237 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 232 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
238 sizeof(CONFIG_SYS_PROMPT) + 16) 233 sizeof(CONFIG_SYS_PROMPT) + 16)
239 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 234 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
240 235
241 /* Boot Argument Buffer Size */ 236 /* Boot Argument Buffer Size */
242 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 237 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
243 238
244 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x00000000) 239 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x00000000)
245 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 240 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
246 0x07000000) /* 112 MB */ 241 0x07000000) /* 112 MB */
247 242
248 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) 243 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
249 244
250 /* 245 /*
251 * OMAP3 has 12 GP timers, they can be driven by the system clock 246 * OMAP3 has 12 GP timers, they can be driven by the system clock
252 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 247 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
253 * This rate is divided by a local divisor. 248 * This rate is divided by a local divisor.
254 */ 249 */
255 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 250 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
256 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 251 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
257 252
258 /* Physical Memory Map */ 253 /* Physical Memory Map */
259 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 254 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
260 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 255 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
261 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 256 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
262 257
263 /* NAND and environment organization */ 258 /* NAND and environment organization */
264 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 259 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
265 260
266 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 261 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
267 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 262 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
268 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 263 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
269 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 264 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
270 CONFIG_SYS_INIT_RAM_SIZE - \ 265 CONFIG_SYS_INIT_RAM_SIZE - \
271 GENERATED_GBL_DATA_SIZE) 266 GENERATED_GBL_DATA_SIZE)
272 267
273 /* SRAM config */ 268 /* SRAM config */
274 #define CONFIG_SYS_SRAM_START 0x40200000 269 #define CONFIG_SYS_SRAM_START 0x40200000
275 #define CONFIG_SYS_SRAM_SIZE 0x10000 270 #define CONFIG_SYS_SRAM_SIZE 0x10000
276 271
277 /* Defines for SPL */ 272 /* Defines for SPL */
278 #define CONFIG_SPL_FRAMEWORK 273 #define CONFIG_SPL_FRAMEWORK
279 #define CONFIG_SPL_NAND_SIMPLE 274 #define CONFIG_SPL_NAND_SIMPLE
280 275
281 #define CONFIG_SPL_BOARD_INIT 276 #define CONFIG_SPL_BOARD_INIT
282 #define CONFIG_SPL_NAND_BASE 277 #define CONFIG_SPL_NAND_BASE
283 #define CONFIG_SPL_NAND_DRIVERS 278 #define CONFIG_SPL_NAND_DRIVERS
284 #define CONFIG_SPL_NAND_ECC 279 #define CONFIG_SPL_NAND_ECC
285 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" 280 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
286 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 281 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
287 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 282 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
288 283
289 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 284 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
290 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 285 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
291 CONFIG_SPL_TEXT_BASE) 286 CONFIG_SPL_TEXT_BASE)
292 287
293 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/ 288 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
294 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 289 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
295 290
296 /* NAND boot config */ 291 /* NAND boot config */
297 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 292 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
298 #define CONFIG_SYS_NAND_PAGE_COUNT 64 293 #define CONFIG_SYS_NAND_PAGE_COUNT 64
299 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 294 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
300 #define CONFIG_SYS_NAND_OOBSIZE 64 295 #define CONFIG_SYS_NAND_OOBSIZE 64
301 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 296 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
302 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 297 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
303 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ 298 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
304 13, 14, 16, 17, 18, 19, 20, 21, 22, \ 299 13, 14, 16, 17, 18, 19, 20, 21, 22, \
305 23, 24, 25, 26, 27, 28, 30, 31, 32, \ 300 23, 24, 25, 26, 27, 28, 30, 31, 32, \
306 33, 34, 35, 36, 37, 38, 39, 40, 41, \ 301 33, 34, 35, 36, 37, 38, 39, 40, 41, \
307 42, 44, 45, 46, 47, 48, 49, 50, 51, \ 302 42, 44, 45, 46, 47, 48, 49, 50, 51, \
308 52, 53, 54, 55, 56} 303 52, 53, 54, 55, 56}
309 304
310 #define CONFIG_SYS_NAND_ECCSIZE 512 305 #define CONFIG_SYS_NAND_ECCSIZE 512
311 #define CONFIG_SYS_NAND_ECCBYTES 13 306 #define CONFIG_SYS_NAND_ECCBYTES 13
312 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW 307 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
313 308
314 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 309 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
315 310
316 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 311 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
317 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x100000 312 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x100000
318 313
319 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 314 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
320 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ 315 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
321 316
322 #define CONFIG_SYS_ALT_MEMTEST 317 #define CONFIG_SYS_ALT_MEMTEST
323 #define CONFIG_SYS_MEMTEST_SCRATCH 0x81000000 318 #define CONFIG_SYS_MEMTEST_SCRATCH 0x81000000
324 #endif /* __CONFIG_H */ 319 #endif /* __CONFIG_H */
325 320
include/configs/twister.h
Diff comments   View file @ 68ccab5
1 /* 1 /*
2 * Copyright (C) 2011 2 * Copyright (C) 2011
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de. 3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4 * 4 *
5 * Copyright (C) 2009 TechNexion Ltd. 5 * Copyright (C) 2009 TechNexion Ltd.
6 * 6 *
7 * Configuration for the Technexion twister board. 7 * Configuration for the Technexion twister board.
8 * 8 *
9 * SPDX-License-Identifier: GPL-2.0+ 9 * SPDX-License-Identifier: GPL-2.0+
10 */ 10 */
11 11
12 #ifndef __CONFIG_H 12 #ifndef __CONFIG_H
13 #define __CONFIG_H 13 #define __CONFIG_H
14 14
15 #include "tam3517-common.h" 15 #include "tam3517-common.h"
16 16
17 #define CONFIG_MACH_TYPE MACH_TYPE_TAM3517 17 #define CONFIG_MACH_TYPE MACH_TYPE_TAM3517
18 18
19 #define CONFIG_TAM3517_SW3_SETTINGS 19 #define CONFIG_TAM3517_SW3_SETTINGS
20 #define CONFIG_XR16L2751 20 #define CONFIG_XR16L2751
21 21
22 22
23 #define CONFIG_BOOTFILE "uImage" 23 #define CONFIG_BOOTFILE "uImage"
24 24
25 #define CONFIG_HOSTNAME twister 25 #define CONFIG_HOSTNAME twister
26 26
27 /* 27 /*
28 * Miscellaneous configurable options 28 * Miscellaneous configurable options
29 */ 29 */
30 #define CONFIG_SMC911X 30 #define CONFIG_SMC911X
31 #define CONFIG_SMC911X_16_BIT 31 #define CONFIG_SMC911X_16_BIT
32 #define CONFIG_SMC911X_BASE 0x2C000000 32 #define CONFIG_SMC911X_BASE 0x2C000000
33 #define CONFIG_SMC911X_NO_EEPROM 33 #define CONFIG_SMC911X_NO_EEPROM
34 34
35 #define CONFIG_EXTRA_ENV_SETTINGS CONFIG_TAM3517_SETTINGS \ 35 #define CONFIG_EXTRA_ENV_SETTINGS CONFIG_TAM3517_SETTINGS \
36 "bootcmd=run nandboot\0" 36 "bootcmd=run nandboot\0"
37 37
38 /* SPL OS boot options */ 38 /* SPL OS boot options */
39 #define CONFIG_CMD_SPL 39 #define CONFIG_CMD_SPL
40 #define CONFIG_CMD_SPL_WRITE_SIZE 0x400 /* 1024 byte */ 40 #define CONFIG_CMD_SPL_WRITE_SIZE 0x400 /* 1024 byte */
41 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 41 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000
42 #define CONFIG_CMD_SPL_NAND_OFS (CONFIG_SYS_NAND_SPL_KERNEL_OFFS+\ 42 #define CONFIG_CMD_SPL_NAND_OFS (CONFIG_SYS_NAND_SPL_KERNEL_OFFS+\
43 0x600000) 43 0x600000)
44 44
45 #define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100) 45 #define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100)
46 #define CONFIG_SPL_BOARD_INIT 46 #define CONFIG_SPL_BOARD_INIT
47 47
48 /* gpio 55 is used as SPL_OS_BOOT_KEY */
49 #define CONFIG_OMAP3_GPIO_2
50
51 #endif /* __CONFIG_H */ 48 #endif /* __CONFIG_H */
52 49
scripts/config_whitelist.txt
Diff comments   View file @ 68ccab5
1 CONFIG_16BIT 1 CONFIG_16BIT
2 CONFIG_33 2 CONFIG_33
3 CONFIG_400MHZ_MODE 3 CONFIG_400MHZ_MODE
4 CONFIG_405 4 CONFIG_405
5 CONFIG_405EP 5 CONFIG_405EP
6 CONFIG_405EX 6 CONFIG_405EX
7 CONFIG_405EX_CHIP21_ECID3_REV_D 7 CONFIG_405EX_CHIP21_ECID3_REV_D
8 CONFIG_405EX_CHIP21_PVR_REV_C 8 CONFIG_405EX_CHIP21_PVR_REV_C
9 CONFIG_405EX_CHIP21_PVR_REV_D 9 CONFIG_405EX_CHIP21_PVR_REV_D
10 CONFIG_405EZ 10 CONFIG_405EZ
11 CONFIG_405GP 11 CONFIG_405GP
12 CONFIG_440 12 CONFIG_440
13 CONFIG_440EP 13 CONFIG_440EP
14 CONFIG_440EPX 14 CONFIG_440EPX
15 CONFIG_440GP 15 CONFIG_440GP
16 CONFIG_440GR 16 CONFIG_440GR
17 CONFIG_440GRX 17 CONFIG_440GRX
18 CONFIG_440GX 18 CONFIG_440GX
19 CONFIG_440SP 19 CONFIG_440SP
20 CONFIG_440SPE 20 CONFIG_440SPE
21 CONFIG_440SPE_REVA 21 CONFIG_440SPE_REVA
22 CONFIG_440_GX 22 CONFIG_440_GX
23 CONFIG_4430SDP 23 CONFIG_4430SDP
24 CONFIG_460EX 24 CONFIG_460EX
25 CONFIG_460GT 25 CONFIG_460GT
26 CONFIG_460SX 26 CONFIG_460SX
27 CONFIG_4xx_CONFIG_BLOCKSIZE 27 CONFIG_4xx_CONFIG_BLOCKSIZE
28 CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR 28 CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR
29 CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET 29 CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET
30 CONFIG_4xx_DCACHE 30 CONFIG_4xx_DCACHE
31 CONFIG_521X 31 CONFIG_521X
32 CONFIG_533MHZ_MODE 32 CONFIG_533MHZ_MODE
33 CONFIG_5xx_CONS_SCI1 33 CONFIG_5xx_CONS_SCI1
34 CONFIG_5xx_CONS_SCI2 34 CONFIG_5xx_CONS_SCI2
35 CONFIG_5xx_GCLK_FREQ 35 CONFIG_5xx_GCLK_FREQ
36 CONFIG_64BIT_PHYS_ADDR 36 CONFIG_64BIT_PHYS_ADDR
37 CONFIG_66 37 CONFIG_66
38 CONFIG_8260_CLKIN 38 CONFIG_8260_CLKIN
39 CONFIG_8349_CLKIN 39 CONFIG_8349_CLKIN
40 CONFIG_83XX 40 CONFIG_83XX
41 CONFIG_83XX_CLKIN 41 CONFIG_83XX_CLKIN
42 CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES 42 CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES
43 CONFIG_83XX_PCICLK 43 CONFIG_83XX_PCICLK
44 CONFIG_83XX_PCI_STREAMING 44 CONFIG_83XX_PCI_STREAMING
45 CONFIG_88F5182 45 CONFIG_88F5182
46 CONFIG_8xx_CONS_NONE 46 CONFIG_8xx_CONS_NONE
47 CONFIG_8xx_CONS_SCCx 47 CONFIG_8xx_CONS_SCCx
48 CONFIG_8xx_CONS_SMC1 48 CONFIG_8xx_CONS_SMC1
49 CONFIG_8xx_CONS_SMC2 49 CONFIG_8xx_CONS_SMC2
50 CONFIG_8xx_CONS_SMCx 50 CONFIG_8xx_CONS_SMCx
51 CONFIG_8xx_CPUCLK_DEFAULT 51 CONFIG_8xx_CPUCLK_DEFAULT
52 CONFIG_8xx_GCLK_FREQ 52 CONFIG_8xx_GCLK_FREQ
53 CONFIG_8xx_OSCLK 53 CONFIG_8xx_OSCLK
54 CONFIG_A003399_NOR_WORKAROUND 54 CONFIG_A003399_NOR_WORKAROUND
55 CONFIG_A008044_WORKAROUND 55 CONFIG_A008044_WORKAROUND
56 CONFIG_A3M071 56 CONFIG_A3M071
57 CONFIG_A4M072 57 CONFIG_A4M072
58 CONFIG_A4M2K 58 CONFIG_A4M2K
59 CONFIG_AC14XX 59 CONFIG_AC14XX
60 CONFIG_ACADIA 60 CONFIG_ACADIA
61 CONFIG_ACX517AKN 61 CONFIG_ACX517AKN
62 CONFIG_ACX544AKN 62 CONFIG_ACX544AKN
63 CONFIG_ADCIOP 63 CONFIG_ADCIOP
64 CONFIG_ADDMISC 64 CONFIG_ADDMISC
65 CONFIG_ADDRESS 65 CONFIG_ADDRESS
66 CONFIG_ADDR_AUTO_INCR_BIT 66 CONFIG_ADDR_AUTO_INCR_BIT
67 CONFIG_ADDR_MAP 67 CONFIG_ADDR_MAP
68 CONFIG_ADDR_STREAMING 68 CONFIG_ADDR_STREAMING
69 CONFIG_ADNPESC1 69 CONFIG_ADNPESC1
70 CONFIG_ADP_AG101P 70 CONFIG_ADP_AG101P
71 CONFIG_AEABI 71 CONFIG_AEABI
72 CONFIG_AEMIF_CNTRL_BASE 72 CONFIG_AEMIF_CNTRL_BASE
73 CONFIG_ALTERA_SPI_IDLE_VAL 73 CONFIG_ALTERA_SPI_IDLE_VAL
74 CONFIG_ALTIVEC 74 CONFIG_ALTIVEC
75 CONFIG_ALT_LB_ADDR 75 CONFIG_ALT_LB_ADDR
76 CONFIG_ALT_LH_ADDR 76 CONFIG_ALT_LH_ADDR
77 CONFIG_ALU 77 CONFIG_ALU
78 CONFIG_AM335X_LCD 78 CONFIG_AM335X_LCD
79 CONFIG_AM335X_USB0 79 CONFIG_AM335X_USB0
80 CONFIG_AM335X_USB0_MODE 80 CONFIG_AM335X_USB0_MODE
81 CONFIG_AM335X_USB1 81 CONFIG_AM335X_USB1
82 CONFIG_AM335X_USB1_MODE 82 CONFIG_AM335X_USB1_MODE
83 CONFIG_AM437X_USB2PHY2_HOST 83 CONFIG_AM437X_USB2PHY2_HOST
84 CONFIG_AMCC_DEF_ENV 84 CONFIG_AMCC_DEF_ENV
85 CONFIG_AMCC_DEF_ENV_NOR_UPD 85 CONFIG_AMCC_DEF_ENV_NOR_UPD
86 CONFIG_AMCC_DEF_ENV_POWERPC 86 CONFIG_AMCC_DEF_ENV_POWERPC
87 CONFIG_AMCC_DEF_ENV_PPC 87 CONFIG_AMCC_DEF_ENV_PPC
88 CONFIG_AMCC_DEF_ENV_PPC_OLD 88 CONFIG_AMCC_DEF_ENV_PPC_OLD
89 CONFIG_AMCC_DEF_ENV_ROOTPATH 89 CONFIG_AMCC_DEF_ENV_ROOTPATH
90 CONFIG_AMCORE 90 CONFIG_AMCORE
91 CONFIG_ANDES_PCU 91 CONFIG_ANDES_PCU
92 CONFIG_ANDES_PCU_BASE 92 CONFIG_ANDES_PCU_BASE
93 CONFIG_AP325RXA 93 CONFIG_AP325RXA
94 CONFIG_APBH_DMA 94 CONFIG_APBH_DMA
95 CONFIG_APBH_DMA_BURST 95 CONFIG_APBH_DMA_BURST
96 CONFIG_APBH_DMA_BURST8 96 CONFIG_APBH_DMA_BURST8
97 CONFIG_APER_0_BASE 97 CONFIG_APER_0_BASE
98 CONFIG_APER_1_BASE 98 CONFIG_APER_1_BASE
99 CONFIG_APER_SIZE 99 CONFIG_APER_SIZE
100 CONFIG_APUS_FAST_EXCEPT 100 CONFIG_APUS_FAST_EXCEPT
101 CONFIG_AP_SH4A_4A 101 CONFIG_AP_SH4A_4A
102 CONFIG_ARCH_ADPAG101P 102 CONFIG_ARCH_ADPAG101P
103 CONFIG_ARCH_CPU_INIT 103 CONFIG_ARCH_CPU_INIT
104 CONFIG_ARCH_CSB226 104 CONFIG_ARCH_CSB226
105 CONFIG_ARCH_HAS_ILOG2_U32 105 CONFIG_ARCH_HAS_ILOG2_U32
106 CONFIG_ARCH_HAS_ILOG2_U64 106 CONFIG_ARCH_HAS_ILOG2_U64
107 CONFIG_ARCH_INNOKOM 107 CONFIG_ARCH_INNOKOM
108 CONFIG_ARCH_KIRKWOOD 108 CONFIG_ARCH_KIRKWOOD
109 CONFIG_ARCH_LUBBOCK 109 CONFIG_ARCH_LUBBOCK
110 CONFIG_ARCH_MAP_SYSMEM 110 CONFIG_ARCH_MAP_SYSMEM
111 CONFIG_ARCH_OMAP4 111 CONFIG_ARCH_OMAP4
112 CONFIG_ARCH_ORION5X 112 CONFIG_ARCH_ORION5X
113 CONFIG_ARCH_PLEB 113 CONFIG_ARCH_PLEB
114 CONFIG_ARCH_PXA_CERF 114 CONFIG_ARCH_PXA_CERF
115 CONFIG_ARCH_PXA_IDP 115 CONFIG_ARCH_PXA_IDP
116 CONFIG_ARCH_RMOBILE_BOARD_STRING 116 CONFIG_ARCH_RMOBILE_BOARD_STRING
117 CONFIG_ARCH_RMOBILE_EXTRAM_BOOT 117 CONFIG_ARCH_RMOBILE_EXTRAM_BOOT
118 CONFIG_ARCH_TEGRA 118 CONFIG_ARCH_TEGRA
119 CONFIG_ARCH_USE_BUILTIN_BSWAP 119 CONFIG_ARCH_USE_BUILTIN_BSWAP
120 CONFIG_ARC_MMU_VER 120 CONFIG_ARC_MMU_VER
121 CONFIG_ARC_SERIAL 121 CONFIG_ARC_SERIAL
122 CONFIG_ARC_UART_BASE 122 CONFIG_ARC_UART_BASE
123 CONFIG_ARIA 123 CONFIG_ARIA
124 CONFIG_ARIA_FPGA 124 CONFIG_ARIA_FPGA
125 CONFIG_ARIES_M28_V10 125 CONFIG_ARIES_M28_V10
126 CONFIG_ARM926EJS 126 CONFIG_ARM926EJS
127 CONFIG_ARMADA100 127 CONFIG_ARMADA100
128 CONFIG_ARMADA100_FEC 128 CONFIG_ARMADA100_FEC
129 CONFIG_ARMADA168 129 CONFIG_ARMADA168
130 CONFIG_ARMADA_39X 130 CONFIG_ARMADA_39X
131 CONFIG_ARMCORTEXA9 131 CONFIG_ARMCORTEXA9
132 CONFIG_ARMV7_PSCI_1_0 132 CONFIG_ARMV7_PSCI_1_0
133 CONFIG_ARMV7_SECURE_BASE 133 CONFIG_ARMV7_SECURE_BASE
134 CONFIG_ARMV7_SECURE_MAX_SIZE 134 CONFIG_ARMV7_SECURE_MAX_SIZE
135 CONFIG_ARMV7_SECURE_RESERVE_SIZE 135 CONFIG_ARMV7_SECURE_RESERVE_SIZE
136 CONFIG_ARMV8_SWITCH_TO_EL1 136 CONFIG_ARMV8_SWITCH_TO_EL1
137 CONFIG_ARM_ARCH_CP15_ERRATA 137 CONFIG_ARM_ARCH_CP15_ERRATA
138 CONFIG_ARM_ASM_UNIFIED 138 CONFIG_ARM_ASM_UNIFIED
139 CONFIG_ARM_DCC 139 CONFIG_ARM_DCC
140 CONFIG_ARM_FREQ 140 CONFIG_ARM_FREQ
141 CONFIG_ARM_GIC_BASE_ADDRESS 141 CONFIG_ARM_GIC_BASE_ADDRESS
142 CONFIG_ARM_PL180_MMCI 142 CONFIG_ARM_PL180_MMCI
143 CONFIG_ARM_PL180_MMCI_BASE 143 CONFIG_ARM_PL180_MMCI_BASE
144 CONFIG_ARM_PL180_MMCI_CLOCK_FREQ 144 CONFIG_ARM_PL180_MMCI_CLOCK_FREQ
145 CONFIG_ARM_THUMB 145 CONFIG_ARM_THUMB
146 CONFIG_ARP_TIMEOUT 146 CONFIG_ARP_TIMEOUT
147 CONFIG_ASTRO5373L 147 CONFIG_ASTRO5373L
148 CONFIG_ASTRO_COFDMDUOS2 148 CONFIG_ASTRO_COFDMDUOS2
149 CONFIG_ASTRO_TWIN7S2 149 CONFIG_ASTRO_TWIN7S2
150 CONFIG_ASTRO_V512 150 CONFIG_ASTRO_V512
151 CONFIG_ASTRO_V532 151 CONFIG_ASTRO_V532
152 CONFIG_ASTRO_V912 152 CONFIG_ASTRO_V912
153 CONFIG_AT32AP 153 CONFIG_AT32AP
154 CONFIG_AT32AP7000 154 CONFIG_AT32AP7000
155 CONFIG_AT32UC3A0xxx 155 CONFIG_AT32UC3A0xxx
156 CONFIG_AT91C_PQFP_UHPBUG 156 CONFIG_AT91C_PQFP_UHPBUG
157 CONFIG_AT91FAMILY 157 CONFIG_AT91FAMILY
158 CONFIG_AT91RESET_EXTRST 158 CONFIG_AT91RESET_EXTRST
159 CONFIG_AT91RM9200 159 CONFIG_AT91RM9200
160 CONFIG_AT91RM9200EK 160 CONFIG_AT91RM9200EK
161 CONFIG_AT91SAM9260 161 CONFIG_AT91SAM9260
162 CONFIG_AT91SAM9260EK 162 CONFIG_AT91SAM9260EK
163 CONFIG_AT91SAM9261 163 CONFIG_AT91SAM9261
164 CONFIG_AT91SAM9261EK 164 CONFIG_AT91SAM9261EK
165 CONFIG_AT91SAM9263 165 CONFIG_AT91SAM9263
166 CONFIG_AT91SAM9263EK 166 CONFIG_AT91SAM9263EK
167 CONFIG_AT91SAM9G10 167 CONFIG_AT91SAM9G10
168 CONFIG_AT91SAM9G10EK 168 CONFIG_AT91SAM9G10EK
169 CONFIG_AT91SAM9G20 169 CONFIG_AT91SAM9G20
170 CONFIG_AT91SAM9G20EK 170 CONFIG_AT91SAM9G20EK
171 CONFIG_AT91SAM9G20EK_2MMC 171 CONFIG_AT91SAM9G20EK_2MMC
172 CONFIG_AT91SAM9G45 172 CONFIG_AT91SAM9G45
173 CONFIG_AT91SAM9G45EKES 173 CONFIG_AT91SAM9G45EKES
174 CONFIG_AT91SAM9G45_LCD_BASE 174 CONFIG_AT91SAM9G45_LCD_BASE
175 CONFIG_AT91SAM9M10G45 175 CONFIG_AT91SAM9M10G45
176 CONFIG_AT91SAM9M10G45EK 176 CONFIG_AT91SAM9M10G45EK
177 CONFIG_AT91SAM9N12 177 CONFIG_AT91SAM9N12
178 CONFIG_AT91SAM9RL 178 CONFIG_AT91SAM9RL
179 CONFIG_AT91SAM9RLEK 179 CONFIG_AT91SAM9RLEK
180 CONFIG_AT91SAM9X5 180 CONFIG_AT91SAM9X5
181 CONFIG_AT91SAM9X5EK 181 CONFIG_AT91SAM9X5EK
182 CONFIG_AT91SAM9XE 182 CONFIG_AT91SAM9XE
183 CONFIG_AT91SAM9_WATCHDOG 183 CONFIG_AT91SAM9_WATCHDOG
184 CONFIG_AT91_CAN 184 CONFIG_AT91_CAN
185 CONFIG_AT91_EFLASH 185 CONFIG_AT91_EFLASH
186 CONFIG_AT91_GPIO_PULLUP 186 CONFIG_AT91_GPIO_PULLUP
187 CONFIG_AT91_HW_WDT_TIMEOUT 187 CONFIG_AT91_HW_WDT_TIMEOUT
188 CONFIG_AT91_LED 188 CONFIG_AT91_LED
189 CONFIG_AT91_WANTS_COMMON_PHY 189 CONFIG_AT91_WANTS_COMMON_PHY
190 CONFIG_ATAPI 190 CONFIG_ATAPI
191 CONFIG_ATA_ACPI 191 CONFIG_ATA_ACPI
192 CONFIG_ATI 192 CONFIG_ATI
193 CONFIG_ATI_RADEON_FB 193 CONFIG_ATI_RADEON_FB
194 CONFIG_ATM 194 CONFIG_ATM
195 CONFIG_ATMEL_DATAFLASH_SPI 195 CONFIG_ATMEL_DATAFLASH_SPI
196 CONFIG_ATMEL_LCD 196 CONFIG_ATMEL_LCD
197 CONFIG_ATMEL_LCD_BGR555 197 CONFIG_ATMEL_LCD_BGR555
198 CONFIG_ATMEL_LCD_RGB565 198 CONFIG_ATMEL_LCD_RGB565
199 CONFIG_ATMEL_LEGACY 199 CONFIG_ATMEL_LEGACY
200 CONFIG_ATMEL_MCI_8BIT 200 CONFIG_ATMEL_MCI_8BIT
201 CONFIG_ATMEL_NAND_HWECC 201 CONFIG_ATMEL_NAND_HWECC
202 CONFIG_ATMEL_NAND_HW_PMECC 202 CONFIG_ATMEL_NAND_HW_PMECC
203 CONFIG_ATMEL_SPI0 203 CONFIG_ATMEL_SPI0
204 CONFIG_ATNGW100 204 CONFIG_ATNGW100
205 CONFIG_ATNGW100MKII 205 CONFIG_ATNGW100MKII
206 CONFIG_ATSTK1000 206 CONFIG_ATSTK1000
207 CONFIG_ATSTK1000_16MB_SDRAM 207 CONFIG_ATSTK1000_16MB_SDRAM
208 CONFIG_ATSTK1002 208 CONFIG_ATSTK1002
209 CONFIG_AT_TRANS 209 CONFIG_AT_TRANS
210 CONFIG_AUTOCALIB 210 CONFIG_AUTOCALIB
211 CONFIG_AUTONEG_TIMEOUT 211 CONFIG_AUTONEG_TIMEOUT
212 CONFIG_AUTO_COMPLETE 212 CONFIG_AUTO_COMPLETE
213 CONFIG_AUTO_ZRELADDR 213 CONFIG_AUTO_ZRELADDR
214 CONFIG_BACKSIDE_L2_CACHE 214 CONFIG_BACKSIDE_L2_CACHE
215 CONFIG_BAMBOO 215 CONFIG_BAMBOO
216 CONFIG_BAMBOO_NAND 216 CONFIG_BAMBOO_NAND
217 CONFIG_BARIX_IPAM390 217 CONFIG_BARIX_IPAM390
218 CONFIG_BAT_CMD 218 CONFIG_BAT_CMD
219 CONFIG_BAT_PAIR 219 CONFIG_BAT_PAIR
220 CONFIG_BAT_RW 220 CONFIG_BAT_RW
221 CONFIG_BCH 221 CONFIG_BCH
222 CONFIG_BCH_CONST_M 222 CONFIG_BCH_CONST_M
223 CONFIG_BCH_CONST_PARAMS 223 CONFIG_BCH_CONST_PARAMS
224 CONFIG_BCH_CONST_T 224 CONFIG_BCH_CONST_T
225 CONFIG_BCM2835_GPIO 225 CONFIG_BCM2835_GPIO
226 CONFIG_BCM283X_MU_SERIAL 226 CONFIG_BCM283X_MU_SERIAL
227 CONFIG_BCM_SF2_ETH 227 CONFIG_BCM_SF2_ETH
228 CONFIG_BCM_SF2_ETH_DEFAULT_PORT 228 CONFIG_BCM_SF2_ETH_DEFAULT_PORT
229 CONFIG_BCM_SF2_ETH_GMAC 229 CONFIG_BCM_SF2_ETH_GMAC
230 CONFIG_BD_NUM_CPUS 230 CONFIG_BD_NUM_CPUS
231 CONFIG_BIOSEMU 231 CONFIG_BIOSEMU
232 CONFIG_BITBANGMII_MULTI 232 CONFIG_BITBANGMII_MULTI
233 CONFIG_BKUP_FLASH 233 CONFIG_BKUP_FLASH
234 CONFIG_BL1_OFFSET 234 CONFIG_BL1_OFFSET
235 CONFIG_BL1_SIZE 235 CONFIG_BL1_SIZE
236 CONFIG_BL2_OFFSET 236 CONFIG_BL2_OFFSET
237 CONFIG_BL2_SIZE 237 CONFIG_BL2_SIZE
238 CONFIG_BMP_16BPP 238 CONFIG_BMP_16BPP
239 CONFIG_BMP_24BMP 239 CONFIG_BMP_24BMP
240 CONFIG_BMP_24BPP 240 CONFIG_BMP_24BPP
241 CONFIG_BMP_32BPP 241 CONFIG_BMP_32BPP
242 CONFIG_BOARDDIR 242 CONFIG_BOARDDIR
243 CONFIG_BOARDINFO 243 CONFIG_BOARDINFO
244 CONFIG_BOARDNAME 244 CONFIG_BOARDNAME
245 CONFIG_BOARDNAME_LOCAL 245 CONFIG_BOARDNAME_LOCAL
246 CONFIG_BOARD_AXM 246 CONFIG_BOARD_AXM
247 CONFIG_BOARD_BOOTCMD 247 CONFIG_BOARD_BOOTCMD
248 CONFIG_BOARD_COMMON 248 CONFIG_BOARD_COMMON
249 CONFIG_BOARD_EARLY_INIT_R 249 CONFIG_BOARD_EARLY_INIT_R
250 CONFIG_BOARD_ECC_SUPPORT 250 CONFIG_BOARD_ECC_SUPPORT
251 CONFIG_BOARD_EMAC_COUNT 251 CONFIG_BOARD_EMAC_COUNT
252 CONFIG_BOARD_H2200 252 CONFIG_BOARD_H2200
253 CONFIG_BOARD_IS_OPENRD_BASE 253 CONFIG_BOARD_IS_OPENRD_BASE
254 CONFIG_BOARD_IS_OPENRD_CLIENT 254 CONFIG_BOARD_IS_OPENRD_CLIENT
255 CONFIG_BOARD_IS_OPENRD_ULTIMATE 255 CONFIG_BOARD_IS_OPENRD_ULTIMATE
256 CONFIG_BOARD_MEM_LIMIT 256 CONFIG_BOARD_MEM_LIMIT
257 CONFIG_BOARD_NAME 257 CONFIG_BOARD_NAME
258 CONFIG_BOARD_POSTCLK_INIT 258 CONFIG_BOARD_POSTCLK_INIT
259 CONFIG_BOARD_RESET 259 CONFIG_BOARD_RESET
260 CONFIG_BOARD_REVISION_TAG 260 CONFIG_BOARD_REVISION_TAG
261 CONFIG_BOARD_SIZE_LIMIT 261 CONFIG_BOARD_SIZE_LIMIT
262 CONFIG_BOARD_TAURUS 262 CONFIG_BOARD_TAURUS
263 CONFIG_BOARD_TYPES 263 CONFIG_BOARD_TYPES
264 CONFIG_BOOGER 264 CONFIG_BOOGER
265 CONFIG_BOOM 265 CONFIG_BOOM
266 CONFIG_BOOTARGS 266 CONFIG_BOOTARGS
267 CONFIG_BOOTARGS_AXM 267 CONFIG_BOOTARGS_AXM
268 CONFIG_BOOTARGS_TAURUS 268 CONFIG_BOOTARGS_TAURUS
269 CONFIG_BOOTBLOCK 269 CONFIG_BOOTBLOCK
270 CONFIG_BOOTCOMMAND 270 CONFIG_BOOTCOMMAND
271 CONFIG_BOOTCOUNT_ALEN 271 CONFIG_BOOTCOUNT_ALEN
272 CONFIG_BOOTCOUNT_AM33XX 272 CONFIG_BOOTCOUNT_AM33XX
273 CONFIG_BOOTCOUNT_ENV 273 CONFIG_BOOTCOUNT_ENV
274 CONFIG_BOOTCOUNT_I2C 274 CONFIG_BOOTCOUNT_I2C
275 CONFIG_BOOTCOUNT_LIMIT 275 CONFIG_BOOTCOUNT_LIMIT
276 CONFIG_BOOTCOUNT_RAM 276 CONFIG_BOOTCOUNT_RAM
277 CONFIG_BOOTFILE 277 CONFIG_BOOTFILE
278 CONFIG_BOOTMAPSZ 278 CONFIG_BOOTMAPSZ
279 CONFIG_BOOTMODE 279 CONFIG_BOOTMODE
280 CONFIG_BOOTM_LINUX 280 CONFIG_BOOTM_LINUX
281 CONFIG_BOOTM_NETBSD 281 CONFIG_BOOTM_NETBSD
282 CONFIG_BOOTM_OPENRTOS 282 CONFIG_BOOTM_OPENRTOS
283 CONFIG_BOOTM_OSE 283 CONFIG_BOOTM_OSE
284 CONFIG_BOOTM_PLAN9 284 CONFIG_BOOTM_PLAN9
285 CONFIG_BOOTM_RTEMS 285 CONFIG_BOOTM_RTEMS
286 CONFIG_BOOTM_VXWORKS 286 CONFIG_BOOTM_VXWORKS
287 CONFIG_BOOTP_ 287 CONFIG_BOOTP_
288 CONFIG_BOOTP_BOOTFILE 288 CONFIG_BOOTP_BOOTFILE
289 CONFIG_BOOTP_BOOTFILESIZE 289 CONFIG_BOOTP_BOOTFILESIZE
290 CONFIG_BOOTP_BOOTPATH 290 CONFIG_BOOTP_BOOTPATH
291 CONFIG_BOOTP_DEFAULT 291 CONFIG_BOOTP_DEFAULT
292 CONFIG_BOOTP_DHCP_REQUEST_DELAY 292 CONFIG_BOOTP_DHCP_REQUEST_DELAY
293 CONFIG_BOOTP_DNS 293 CONFIG_BOOTP_DNS
294 CONFIG_BOOTP_DNS2 294 CONFIG_BOOTP_DNS2
295 CONFIG_BOOTP_GATEWAY 295 CONFIG_BOOTP_GATEWAY
296 CONFIG_BOOTP_HOSTNAME 296 CONFIG_BOOTP_HOSTNAME
297 CONFIG_BOOTP_ID_CACHE_SIZE 297 CONFIG_BOOTP_ID_CACHE_SIZE
298 CONFIG_BOOTP_MAY_FAIL 298 CONFIG_BOOTP_MAY_FAIL
299 CONFIG_BOOTP_NISDOMAIN 299 CONFIG_BOOTP_NISDOMAIN
300 CONFIG_BOOTP_NTPSERVER 300 CONFIG_BOOTP_NTPSERVER
301 CONFIG_BOOTP_PXE 301 CONFIG_BOOTP_PXE
302 CONFIG_BOOTP_RANDOM_DELAY 302 CONFIG_BOOTP_RANDOM_DELAY
303 CONFIG_BOOTP_SEND_HOSTNAME 303 CONFIG_BOOTP_SEND_HOSTNAME
304 CONFIG_BOOTP_SERVERIP 304 CONFIG_BOOTP_SERVERIP
305 CONFIG_BOOTP_SUBNETMASK 305 CONFIG_BOOTP_SUBNETMASK
306 CONFIG_BOOTP_TIMEOFFSET 306 CONFIG_BOOTP_TIMEOFFSET
307 CONFIG_BOOTP_VENDOREX 307 CONFIG_BOOTP_VENDOREX
308 CONFIG_BOOTROM_ERR_REG 308 CONFIG_BOOTROM_ERR_REG
309 CONFIG_BOOTSCRIPT_ADDR 309 CONFIG_BOOTSCRIPT_ADDR
310 CONFIG_BOOTSCRIPT_COPY_RAM 310 CONFIG_BOOTSCRIPT_COPY_RAM
311 CONFIG_BOOTSCRIPT_HDR_ADDR 311 CONFIG_BOOTSCRIPT_HDR_ADDR
312 CONFIG_BOOTSCRIPT_KEY_HASH 312 CONFIG_BOOTSCRIPT_KEY_HASH
313 CONFIG_BOOT_DIR 313 CONFIG_BOOT_DIR
314 CONFIG_BOOT_FROM_XMD 314 CONFIG_BOOT_FROM_XMD
315 CONFIG_BOOT_MODE_BIT 315 CONFIG_BOOT_MODE_BIT
316 CONFIG_BOOT_OS_NET 316 CONFIG_BOOT_OS_NET
317 CONFIG_BOOT_PARAMS_ADDR 317 CONFIG_BOOT_PARAMS_ADDR
318 CONFIG_BOOT_PCI 318 CONFIG_BOOT_PCI
319 CONFIG_BOOT_RETRY_MIN 319 CONFIG_BOOT_RETRY_MIN
320 CONFIG_BOOT_RETRY_TIME 320 CONFIG_BOOT_RETRY_TIME
321 CONFIG_BOUNCE_BUFFER 321 CONFIG_BOUNCE_BUFFER
322 CONFIG_BPTR_VIRT_ADDR 322 CONFIG_BPTR_VIRT_ADDR
323 CONFIG_BSEIP 323 CONFIG_BSEIP
324 CONFIG_BS_ADDR_DEVICE 324 CONFIG_BS_ADDR_DEVICE
325 CONFIG_BS_ADDR_RAM 325 CONFIG_BS_ADDR_RAM
326 CONFIG_BS_COPY_CMD 326 CONFIG_BS_COPY_CMD
327 CONFIG_BS_COPY_ENV 327 CONFIG_BS_COPY_ENV
328 CONFIG_BS_HDR_ADDR_DEVICE 328 CONFIG_BS_HDR_ADDR_DEVICE
329 CONFIG_BS_HDR_ADDR_RAM 329 CONFIG_BS_HDR_ADDR_RAM
330 CONFIG_BS_HDR_SIZE 330 CONFIG_BS_HDR_SIZE
331 CONFIG_BS_SIZE 331 CONFIG_BS_SIZE
332 CONFIG_BTB 332 CONFIG_BTB
333 CONFIG_BUBINGA 333 CONFIG_BUBINGA
334 CONFIG_BUFNO_AUTO_INCR_BIT 334 CONFIG_BUFNO_AUTO_INCR_BIT
335 CONFIG_BUILD_ENVCRC 335 CONFIG_BUILD_ENVCRC
336 CONFIG_BUILD_TARGET 336 CONFIG_BUILD_TARGET
337 CONFIG_BUS_WIDTH 337 CONFIG_BUS_WIDTH
338 CONFIG_BZIP2 338 CONFIG_BZIP2
339 CONFIG_CADDY2 339 CONFIG_CADDY2
340 CONFIG_CALXEDA_XGMAC 340 CONFIG_CALXEDA_XGMAC
341 CONFIG_CAM5200 341 CONFIG_CAM5200
342 CONFIG_CAM5200_NIOSFLASH 342 CONFIG_CAM5200_NIOSFLASH
343 CONFIG_CANMB 343 CONFIG_CANMB
344 CONFIG_CAN_DRIVER 344 CONFIG_CAN_DRIVER
345 CONFIG_CDP_APPLIANCE_VLAN_TYPE 345 CONFIG_CDP_APPLIANCE_VLAN_TYPE
346 CONFIG_CDP_CAPABILITIES 346 CONFIG_CDP_CAPABILITIES
347 CONFIG_CDP_DEVICE_ID 347 CONFIG_CDP_DEVICE_ID
348 CONFIG_CDP_DEVICE_ID_PREFIX 348 CONFIG_CDP_DEVICE_ID_PREFIX
349 CONFIG_CDP_PLATFORM 349 CONFIG_CDP_PLATFORM
350 CONFIG_CDP_PORT_ID 350 CONFIG_CDP_PORT_ID
351 CONFIG_CDP_POWER_CONSUMPTION 351 CONFIG_CDP_POWER_CONSUMPTION
352 CONFIG_CDP_TRIGGER 352 CONFIG_CDP_TRIGGER
353 CONFIG_CDP_VERSION 353 CONFIG_CDP_VERSION
354 CONFIG_CFG_DATA_SECTOR 354 CONFIG_CFG_DATA_SECTOR
355 CONFIG_CFG_FAT 355 CONFIG_CFG_FAT
356 CONFIG_CFG_USB 356 CONFIG_CFG_USB
357 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 357 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
358 CONFIG_CF_DSPI 358 CONFIG_CF_DSPI
359 CONFIG_CF_SBF 359 CONFIG_CF_SBF
360 CONFIG_CF_SPI 360 CONFIG_CF_SPI
361 CONFIG_CF_V2 361 CONFIG_CF_V2
362 CONFIG_CF_V3 362 CONFIG_CF_V3
363 CONFIG_CF_V4 363 CONFIG_CF_V4
364 CONFIG_CF_V4E 364 CONFIG_CF_V4E
365 CONFIG_CHAIN_BOOT_CMD 365 CONFIG_CHAIN_BOOT_CMD
366 CONFIG_CHARON 366 CONFIG_CHARON
367 CONFIG_CHIP_SELECTS_PER_CTRL 367 CONFIG_CHIP_SELECTS_PER_CTRL
368 CONFIG_CHIP_SELECT_QUAD_CAPABLE 368 CONFIG_CHIP_SELECT_QUAD_CAPABLE
369 CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS 369 CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS
370 CONFIG_CIS8201_PHY 370 CONFIG_CIS8201_PHY
371 CONFIG_CI_UDC_HAS_HOSTPC 371 CONFIG_CI_UDC_HAS_HOSTPC
372 CONFIG_CLK0_DIV 372 CONFIG_CLK0_DIV
373 CONFIG_CLK0_EN 373 CONFIG_CLK0_EN
374 CONFIG_CLK_1000_200_200 374 CONFIG_CLK_1000_200_200
375 CONFIG_CLK_1000_330_165 375 CONFIG_CLK_1000_330_165
376 CONFIG_CLK_1000_400_200 376 CONFIG_CLK_1000_400_200
377 CONFIG_CLK_800_330_165 377 CONFIG_CLK_800_330_165
378 CONFIG_CLK_DEBUG 378 CONFIG_CLK_DEBUG
379 CONFIG_CLOCKS 379 CONFIG_CLOCKS
380 CONFIG_CLOCKS_IN_MHZ 380 CONFIG_CLOCKS_IN_MHZ
381 CONFIG_CLOCK_SYNTHESIZER 381 CONFIG_CLOCK_SYNTHESIZER
382 CONFIG_CM5200 382 CONFIG_CM5200
383 CONFIG_CM922T_XA10 383 CONFIG_CM922T_XA10
384 CONFIG_CMDLINE_EDITING 384 CONFIG_CMDLINE_EDITING
385 CONFIG_CMDLINE_PS_SUPPORT 385 CONFIG_CMDLINE_PS_SUPPORT
386 CONFIG_CMDLINE_TAG 386 CONFIG_CMDLINE_TAG
387 CONFIG_CMD_DS4510 387 CONFIG_CMD_DS4510
388 CONFIG_CMD_DS4510_INFO 388 CONFIG_CMD_DS4510_INFO
389 CONFIG_CMD_DS4510_MEM 389 CONFIG_CMD_DS4510_MEM
390 CONFIG_CMD_DS4510_RST 390 CONFIG_CMD_DS4510_RST
391 CONFIG_CMD_DTT 391 CONFIG_CMD_DTT
392 CONFIG_CMD_ECCTEST 392 CONFIG_CMD_ECCTEST
393 CONFIG_CMD_EECONFIG 393 CONFIG_CMD_EECONFIG
394 CONFIG_CMD_EEPROM 394 CONFIG_CMD_EEPROM
395 CONFIG_CMD_EEPROM_LAYOUT 395 CONFIG_CMD_EEPROM_LAYOUT
396 CONFIG_CMD_ENTERRCM 396 CONFIG_CMD_ENTERRCM
397 CONFIG_CMD_ENV 397 CONFIG_CMD_ENV
398 CONFIG_CMD_ENV_CALLBACK 398 CONFIG_CMD_ENV_CALLBACK
399 CONFIG_CMD_ENV_FLAGS 399 CONFIG_CMD_ENV_FLAGS
400 CONFIG_CMD_ERRATA 400 CONFIG_CMD_ERRATA
401 CONFIG_CMD_ESBC_VALIDATE 401 CONFIG_CMD_ESBC_VALIDATE
402 CONFIG_CMD_ETHSW 402 CONFIG_CMD_ETHSW
403 CONFIG_CMD_FDC 403 CONFIG_CMD_FDC
404 CONFIG_CMD_FDT_MAX_DUMP 404 CONFIG_CMD_FDT_MAX_DUMP
405 CONFIG_CMD_FPGAD 405 CONFIG_CMD_FPGAD
406 CONFIG_CMD_FPGA_LOADBP 406 CONFIG_CMD_FPGA_LOADBP
407 CONFIG_CMD_FPGA_LOADFS 407 CONFIG_CMD_FPGA_LOADFS
408 CONFIG_CMD_FPGA_LOADMK 408 CONFIG_CMD_FPGA_LOADMK
409 CONFIG_CMD_FPGA_LOADP 409 CONFIG_CMD_FPGA_LOADP
410 CONFIG_CMD_FUSE 410 CONFIG_CMD_FUSE
411 CONFIG_CMD_GETTIME 411 CONFIG_CMD_GETTIME
412 CONFIG_CMD_GSC 412 CONFIG_CMD_GSC
413 CONFIG_CMD_HASH 413 CONFIG_CMD_HASH
414 CONFIG_CMD_HD44760 414 CONFIG_CMD_HD44760
415 CONFIG_CMD_HD44780 415 CONFIG_CMD_HD44780
416 CONFIG_CMD_HDMIDETECT 416 CONFIG_CMD_HDMIDETECT
417 CONFIG_CMD_IDE 417 CONFIG_CMD_IDE
418 CONFIG_CMD_IMMAP 418 CONFIG_CMD_IMMAP
419 CONFIG_CMD_IMXOTP 419 CONFIG_CMD_IMXOTP
420 CONFIG_CMD_IMX_FUSE 420 CONFIG_CMD_IMX_FUSE
421 CONFIG_CMD_IO 421 CONFIG_CMD_IO
422 CONFIG_CMD_IOLOOP 422 CONFIG_CMD_IOLOOP
423 CONFIG_CMD_IOTRACE 423 CONFIG_CMD_IOTRACE
424 CONFIG_CMD_IRQ 424 CONFIG_CMD_IRQ
425 CONFIG_CMD_JFFS2 425 CONFIG_CMD_JFFS2
426 CONFIG_CMD_KGDB 426 CONFIG_CMD_KGDB
427 CONFIG_CMD_LOADY 427 CONFIG_CMD_LOADY
428 CONFIG_CMD_LZMADEC 428 CONFIG_CMD_LZMADEC
429 CONFIG_CMD_MAX6957 429 CONFIG_CMD_MAX6957
430 CONFIG_CMD_MEM 430 CONFIG_CMD_MEM
431 CONFIG_CMD_MFSL 431 CONFIG_CMD_MFSL
432 CONFIG_CMD_MMC_SPI 432 CONFIG_CMD_MMC_SPI
433 CONFIG_CMD_MTDPARTS_SPREAD 433 CONFIG_CMD_MTDPARTS_SPREAD
434 CONFIG_CMD_ONENAND 434 CONFIG_CMD_ONENAND
435 CONFIG_CMD_PCA953X 435 CONFIG_CMD_PCA953X
436 CONFIG_CMD_PCA953X_INFO 436 CONFIG_CMD_PCA953X_INFO
437 CONFIG_CMD_PCI 437 CONFIG_CMD_PCI
438 CONFIG_CMD_PCI_ENUM 438 CONFIG_CMD_PCI_ENUM
439 CONFIG_CMD_PCMCIA 439 CONFIG_CMD_PCMCIA
440 CONFIG_CMD_PORTIO 440 CONFIG_CMD_PORTIO
441 CONFIG_CMD_READ 441 CONFIG_CMD_READ
442 CONFIG_CMD_REGINFO 442 CONFIG_CMD_REGINFO
443 CONFIG_CMD_REISER 443 CONFIG_CMD_REISER
444 CONFIG_CMD_SANDBOX 444 CONFIG_CMD_SANDBOX
445 CONFIG_CMD_SATA 445 CONFIG_CMD_SATA
446 CONFIG_CMD_SAVES 446 CONFIG_CMD_SAVES
447 CONFIG_CMD_SCSI 447 CONFIG_CMD_SCSI
448 CONFIG_CMD_SDRAM 448 CONFIG_CMD_SDRAM
449 CONFIG_CMD_SF_TEST 449 CONFIG_CMD_SF_TEST
450 CONFIG_CMD_SH_ZIMAGEBOOT 450 CONFIG_CMD_SH_ZIMAGEBOOT
451 CONFIG_CMD_SPL 451 CONFIG_CMD_SPL
452 CONFIG_CMD_SPL_NAND_OFS 452 CONFIG_CMD_SPL_NAND_OFS
453 CONFIG_CMD_SPL_WRITE_SIZE 453 CONFIG_CMD_SPL_WRITE_SIZE
454 CONFIG_CMD_STRINGS 454 CONFIG_CMD_STRINGS
455 CONFIG_CMD_SX151X 455 CONFIG_CMD_SX151X
456 CONFIG_CMD_TCA642X 456 CONFIG_CMD_TCA642X
457 CONFIG_CMD_TERMINAL 457 CONFIG_CMD_TERMINAL
458 CONFIG_CMD_TFTP 458 CONFIG_CMD_TFTP
459 CONFIG_CMD_THOR_DOWNLOAD 459 CONFIG_CMD_THOR_DOWNLOAD
460 CONFIG_CMD_TRACE 460 CONFIG_CMD_TRACE
461 CONFIG_CMD_TSI148 461 CONFIG_CMD_TSI148
462 CONFIG_CMD_UNIVERSE 462 CONFIG_CMD_UNIVERSE
463 CONFIG_CMD_UUID 463 CONFIG_CMD_UUID
464 CONFIG_CMD_ZBOOT 464 CONFIG_CMD_ZBOOT
465 CONFIG_CMD_ZFS 465 CONFIG_CMD_ZFS
466 CONFIG_CM_INIT 466 CONFIG_CM_INIT
467 CONFIG_CM_MULTIPLE_SSRAM 467 CONFIG_CM_MULTIPLE_SSRAM
468 CONFIG_CM_REMAP 468 CONFIG_CM_REMAP
469 CONFIG_CM_SPD_DETECT 469 CONFIG_CM_SPD_DETECT
470 CONFIG_CM_T335 470 CONFIG_CM_T335
471 CONFIG_CM_T3517 471 CONFIG_CM_T3517
472 CONFIG_CM_T3X 472 CONFIG_CM_T3X
473 CONFIG_CM_T43 473 CONFIG_CM_T43
474 CONFIG_CM_T54 474 CONFIG_CM_T54
475 CONFIG_CM_TCRAM 475 CONFIG_CM_TCRAM
476 CONFIG_CNTL 476 CONFIG_CNTL
477 CONFIG_COLDFIRE 477 CONFIG_COLDFIRE
478 CONFIG_COMMANDS 478 CONFIG_COMMANDS
479 CONFIG_COMMON_BOOT 479 CONFIG_COMMON_BOOT
480 CONFIG_COMMON_ENV_MISC 480 CONFIG_COMMON_ENV_MISC
481 CONFIG_COMMON_ENV_SETTINGS 481 CONFIG_COMMON_ENV_SETTINGS
482 CONFIG_COMMON_ENV_UBI 482 CONFIG_COMMON_ENV_UBI
483 CONFIG_COMPACT_FLASH 483 CONFIG_COMPACT_FLASH
484 CONFIG_COMPAT 484 CONFIG_COMPAT
485 CONFIG_CONS_EXTC_PINSEL 485 CONFIG_CONS_EXTC_PINSEL
486 CONFIG_CONS_EXTC_RATE 486 CONFIG_CONS_EXTC_RATE
487 CONFIG_CONS_NONE 487 CONFIG_CONS_NONE
488 CONFIG_CONS_ON_SCC 488 CONFIG_CONS_ON_SCC
489 CONFIG_CONS_ON_SMC 489 CONFIG_CONS_ON_SMC
490 CONFIG_CONS_SCIF0 490 CONFIG_CONS_SCIF0
491 CONFIG_CONS_SCIF1 491 CONFIG_CONS_SCIF1
492 CONFIG_CONS_SCIF2 492 CONFIG_CONS_SCIF2
493 CONFIG_CONS_SCIF3 493 CONFIG_CONS_SCIF3
494 CONFIG_CONS_SCIF4 494 CONFIG_CONS_SCIF4
495 CONFIG_CONS_SCIF5 495 CONFIG_CONS_SCIF5
496 CONFIG_CONS_SCIF7 496 CONFIG_CONS_SCIF7
497 CONFIG_CONTROL 497 CONFIG_CONTROL
498 CONFIG_CONTROLCENTERD 498 CONFIG_CONTROLCENTERD
499 CONFIG_CON_ROT 499 CONFIG_CON_ROT
500 CONFIG_CORE_COUNT 500 CONFIG_CORE_COUNT
501 CONFIG_CORTINA_FW_ADDR 501 CONFIG_CORTINA_FW_ADDR
502 CONFIG_CORTINA_FW_LENGTH 502 CONFIG_CORTINA_FW_LENGTH
503 CONFIG_CPCI405 503 CONFIG_CPCI405
504 CONFIG_CPCI405_6U 504 CONFIG_CPCI405_6U
505 CONFIG_CPCI405_VER2 505 CONFIG_CPCI405_VER2
506 CONFIG_CPLD_BR_PRELIM 506 CONFIG_CPLD_BR_PRELIM
507 CONFIG_CPLD_OR_PRELIM 507 CONFIG_CPLD_OR_PRELIM
508 CONFIG_CPM2 508 CONFIG_CPM2
509 CONFIG_CPUAT91 509 CONFIG_CPUAT91
510 CONFIG_CPU_ARCHS34 510 CONFIG_CPU_ARCHS34
511 CONFIG_CPU_ARMV8 511 CONFIG_CPU_ARMV8
512 CONFIG_CPU_CAVIUM_OCTEON 512 CONFIG_CPU_CAVIUM_OCTEON
513 CONFIG_CPU_FREQ_HZ 513 CONFIG_CPU_FREQ_HZ
514 CONFIG_CPU_HAS_LLSC 514 CONFIG_CPU_HAS_LLSC
515 CONFIG_CPU_HAS_PREFETCH 515 CONFIG_CPU_HAS_PREFETCH
516 CONFIG_CPU_HAS_SMARTMIPS 516 CONFIG_CPU_HAS_SMARTMIPS
517 CONFIG_CPU_HAS_SR_RB 517 CONFIG_CPU_HAS_SR_RB
518 CONFIG_CPU_HAS_WB 518 CONFIG_CPU_HAS_WB
519 CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED 519 CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
520 CONFIG_CPU_LITTLE_ENDIAN 520 CONFIG_CPU_LITTLE_ENDIAN
521 CONFIG_CPU_MICROMIPS 521 CONFIG_CPU_MICROMIPS
522 CONFIG_CPU_MIPSR2 522 CONFIG_CPU_MIPSR2
523 CONFIG_CPU_MONAHANS 523 CONFIG_CPU_MONAHANS
524 CONFIG_CPU_PXA25X 524 CONFIG_CPU_PXA25X
525 CONFIG_CPU_PXA26X 525 CONFIG_CPU_PXA26X
526 CONFIG_CPU_PXA27X 526 CONFIG_CPU_PXA27X
527 CONFIG_CPU_PXA300 527 CONFIG_CPU_PXA300
528 CONFIG_CPU_R8000 528 CONFIG_CPU_R8000
529 CONFIG_CPU_SH7203 529 CONFIG_CPU_SH7203
530 CONFIG_CPU_SH7264 530 CONFIG_CPU_SH7264
531 CONFIG_CPU_SH7269 531 CONFIG_CPU_SH7269
532 CONFIG_CPU_SH7706 532 CONFIG_CPU_SH7706
533 CONFIG_CPU_SH7720 533 CONFIG_CPU_SH7720
534 CONFIG_CPU_SH7722 534 CONFIG_CPU_SH7722
535 CONFIG_CPU_SH7723 535 CONFIG_CPU_SH7723
536 CONFIG_CPU_SH7724 536 CONFIG_CPU_SH7724
537 CONFIG_CPU_SH7734 537 CONFIG_CPU_SH7734
538 CONFIG_CPU_SH7750 538 CONFIG_CPU_SH7750
539 CONFIG_CPU_SH7751 539 CONFIG_CPU_SH7751
540 CONFIG_CPU_SH7752 540 CONFIG_CPU_SH7752
541 CONFIG_CPU_SH7753 541 CONFIG_CPU_SH7753
542 CONFIG_CPU_SH7757 542 CONFIG_CPU_SH7757
543 CONFIG_CPU_SH7763 543 CONFIG_CPU_SH7763
544 CONFIG_CPU_SH7780 544 CONFIG_CPU_SH7780
545 CONFIG_CPU_SH7785 545 CONFIG_CPU_SH7785
546 CONFIG_CPU_SH_TYPE_R 546 CONFIG_CPU_SH_TYPE_R
547 CONFIG_CPU_TYPE_R 547 CONFIG_CPU_TYPE_R
548 CONFIG_CPU_VR41XX 548 CONFIG_CPU_VR41XX
549 CONFIG_CP_CLK_FREQ 549 CONFIG_CP_CLK_FREQ
550 CONFIG_CQSPI_DECODER 550 CONFIG_CQSPI_DECODER
551 CONFIG_CQSPI_REF_CLK 551 CONFIG_CQSPI_REF_CLK
552 CONFIG_CRC32 552 CONFIG_CRC32
553 CONFIG_CRC32_VERIFY 553 CONFIG_CRC32_VERIFY
554 CONFIG_CS8900 554 CONFIG_CS8900
555 CONFIG_CS8900_BASE 555 CONFIG_CS8900_BASE
556 CONFIG_CS8900_BUS16 556 CONFIG_CS8900_BUS16
557 CONFIG_CS8900_BUS32 557 CONFIG_CS8900_BUS32
558 CONFIG_CSF_SIZE 558 CONFIG_CSF_SIZE
559 CONFIG_CTL_JTAG 559 CONFIG_CTL_JTAG
560 CONFIG_CTL_TBE 560 CONFIG_CTL_TBE
561 CONFIG_CTRD1_PROBE_T1 561 CONFIG_CTRD1_PROBE_T1
562 CONFIG_CTRD1_PROBE_T2 562 CONFIG_CTRD1_PROBE_T2
563 CONFIG_CUSTOMER_BOARD_SUPPORT 563 CONFIG_CUSTOMER_BOARD_SUPPORT
564 CONFIG_CYRUS 564 CONFIG_CYRUS
565 CONFIG_D2NET_V2 565 CONFIG_D2NET_V2
566 CONFIG_DA850_AM18X_EVM 566 CONFIG_DA850_AM18X_EVM
567 CONFIG_DA850_EVM_MAX_CPU_CLK 567 CONFIG_DA850_EVM_MAX_CPU_CLK
568 CONFIG_DA850_LOWLEVEL 568 CONFIG_DA850_LOWLEVEL
569 CONFIG_DA8XX_GPIO 569 CONFIG_DA8XX_GPIO
570 CONFIG_DASA_SIM 570 CONFIG_DASA_SIM
571 CONFIG_DAVINCI_SPI 571 CONFIG_DAVINCI_SPI
572 CONFIG_DBAU1000 572 CONFIG_DBAU1000
573 CONFIG_DBAU1X00 573 CONFIG_DBAU1X00
574 CONFIG_DBGU 574 CONFIG_DBGU
575 CONFIG_DBG_MONITOR 575 CONFIG_DBG_MONITOR
576 CONFIG_DB_784MP_GP 576 CONFIG_DB_784MP_GP
577 CONFIG_DCACHE 577 CONFIG_DCACHE
578 CONFIG_DCACHE_OFF 578 CONFIG_DCACHE_OFF
579 CONFIG_DCFG_ADDR 579 CONFIG_DCFG_ADDR
580 CONFIG_DDR_ 580 CONFIG_DDR_
581 CONFIG_DDR_2HCLK 581 CONFIG_DDR_2HCLK
582 CONFIG_DDR_2T_TIMING 582 CONFIG_DDR_2T_TIMING
583 CONFIG_DDR_32BIT 583 CONFIG_DDR_32BIT
584 CONFIG_DDR_64BIT 584 CONFIG_DDR_64BIT
585 CONFIG_DDR_CLK_FREQ 585 CONFIG_DDR_CLK_FREQ
586 CONFIG_DDR_DATA_EYE 586 CONFIG_DDR_DATA_EYE
587 CONFIG_DDR_DEFAULT_CL 587 CONFIG_DDR_DEFAULT_CL
588 CONFIG_DDR_ECC 588 CONFIG_DDR_ECC
589 CONFIG_DDR_ECC_CMD 589 CONFIG_DDR_ECC_CMD
590 CONFIG_DDR_ECC_ENABLE 590 CONFIG_DDR_ECC_ENABLE
591 CONFIG_DDR_ECC_INIT_VIA_DMA 591 CONFIG_DDR_ECC_INIT_VIA_DMA
592 CONFIG_DDR_FIXED_SIZE 592 CONFIG_DDR_FIXED_SIZE
593 CONFIG_DDR_HCLK 593 CONFIG_DDR_HCLK
594 CONFIG_DDR_HYB25D512160BF 594 CONFIG_DDR_HYB25D512160BF
595 CONFIG_DDR_II 595 CONFIG_DDR_II
596 CONFIG_DDR_K4H511638C 596 CONFIG_DDR_K4H511638C
597 CONFIG_DDR_LOG_LEVEL 597 CONFIG_DDR_LOG_LEVEL
598 CONFIG_DDR_MB 598 CONFIG_DDR_MB
599 CONFIG_DDR_MT46V16M16 599 CONFIG_DDR_MT46V16M16
600 CONFIG_DDR_MT46V32M16 600 CONFIG_DDR_MT46V32M16
601 CONFIG_DDR_MT47H128M8 601 CONFIG_DDR_MT47H128M8
602 CONFIG_DDR_MT47H32M16 602 CONFIG_DDR_MT47H32M16
603 CONFIG_DDR_MT47H64M16 603 CONFIG_DDR_MT47H64M16
604 CONFIG_DDR_PLL2 604 CONFIG_DDR_PLL2
605 CONFIG_DDR_RFDC_FIXED 605 CONFIG_DDR_RFDC_FIXED
606 CONFIG_DDR_RQDC_FIXED 606 CONFIG_DDR_RQDC_FIXED
607 CONFIG_DDR_SPD 607 CONFIG_DDR_SPD
608 CONFIG_DEBUG 608 CONFIG_DEBUG
609 CONFIG_DEBUG_FS 609 CONFIG_DEBUG_FS
610 CONFIG_DEBUG_LED 610 CONFIG_DEBUG_LED
611 CONFIG_DEBUG_LOCK_ALLOC 611 CONFIG_DEBUG_LOCK_ALLOC
612 CONFIG_DEBUG_SECTION_MISMATCH 612 CONFIG_DEBUG_SECTION_MISMATCH
613 CONFIG_DEBUG_SEMIHOSTING 613 CONFIG_DEBUG_SEMIHOSTING
614 CONFIG_DEBUG_UART_LINFLEXUART 614 CONFIG_DEBUG_UART_LINFLEXUART
615 CONFIG_DEBUG_WRITECOUNT 615 CONFIG_DEBUG_WRITECOUNT
616 CONFIG_DEEP_SLEEP 616 CONFIG_DEEP_SLEEP
617 CONFIG_DEFAULT 617 CONFIG_DEFAULT
618 CONFIG_DEFAULT_CONSOLE 618 CONFIG_DEFAULT_CONSOLE
619 CONFIG_DEFAULT_IMMR 619 CONFIG_DEFAULT_IMMR
620 CONFIG_DEFAULT_SPI_BUS 620 CONFIG_DEFAULT_SPI_BUS
621 CONFIG_DEFAULT_SPI_CS 621 CONFIG_DEFAULT_SPI_CS
622 CONFIG_DEFAULT_SPI_MODE 622 CONFIG_DEFAULT_SPI_MODE
623 CONFIG_DEF_HWCONFIG 623 CONFIG_DEF_HWCONFIG
624 CONFIG_DELAY_ENVIRONMENT 624 CONFIG_DELAY_ENVIRONMENT
625 CONFIG_DESIGNWARE_ETH 625 CONFIG_DESIGNWARE_ETH
626 CONFIG_DESIGNWARE_WATCHDOG 626 CONFIG_DESIGNWARE_WATCHDOG
627 CONFIG_DEVCONCENTER 627 CONFIG_DEVCONCENTER
628 CONFIG_DEVELOP 628 CONFIG_DEVELOP
629 CONFIG_DEVICE_TREE_LIST 629 CONFIG_DEVICE_TREE_LIST
630 CONFIG_DEV_USB_PHY_BASE 630 CONFIG_DEV_USB_PHY_BASE
631 CONFIG_DFU_ALT 631 CONFIG_DFU_ALT
632 CONFIG_DFU_ALT_BOOT_EMMC 632 CONFIG_DFU_ALT_BOOT_EMMC
633 CONFIG_DFU_ALT_BOOT_SD 633 CONFIG_DFU_ALT_BOOT_SD
634 CONFIG_DFU_ALT_SYSTEM 634 CONFIG_DFU_ALT_SYSTEM
635 CONFIG_DFU_ENV_SETTINGS 635 CONFIG_DFU_ENV_SETTINGS
636 CONFIG_DFU_MTD 636 CONFIG_DFU_MTD
637 CONFIG_DHCP_MIN_EXT_LEN 637 CONFIG_DHCP_MIN_EXT_LEN
638 CONFIG_DIALOG_POWER 638 CONFIG_DIALOG_POWER
639 CONFIG_DIGSY_MTC 639 CONFIG_DIGSY_MTC
640 CONFIG_DIGSY_REV5 640 CONFIG_DIGSY_REV5
641 CONFIG_DIMM_SLOTS_PER_CTLR 641 CONFIG_DIMM_SLOTS_PER_CTLR
642 CONFIG_DIRECT_NOR_BOOT 642 CONFIG_DIRECT_NOR_BOOT
643 CONFIG_DISABLE_CONSOLE 643 CONFIG_DISABLE_CONSOLE
644 CONFIG_DISABLE_IMAGE_LEGACY 644 CONFIG_DISABLE_IMAGE_LEGACY
645 CONFIG_DISABLE_PISE_TEST 645 CONFIG_DISABLE_PISE_TEST
646 CONFIG_DISCONTIGMEM 646 CONFIG_DISCONTIGMEM
647 CONFIG_DISCOVER_PHY 647 CONFIG_DISCOVER_PHY
648 CONFIG_DISPLAY_AER_xxxx 648 CONFIG_DISPLAY_AER_xxxx
649 CONFIG_DISPLAY_BOARDINFO_LATE 649 CONFIG_DISPLAY_BOARDINFO_LATE
650 CONFIG_DLVISION 650 CONFIG_DLVISION
651 CONFIG_DLVISION_10G 651 CONFIG_DLVISION_10G
652 CONFIG_DM9000_BASE 652 CONFIG_DM9000_BASE
653 CONFIG_DM9000_BYTE_SWAPPED 653 CONFIG_DM9000_BYTE_SWAPPED
654 CONFIG_DM9000_DEBUG 654 CONFIG_DM9000_DEBUG
655 CONFIG_DM9000_NO_SROM 655 CONFIG_DM9000_NO_SROM
656 CONFIG_DM9000_USE_16BIT 656 CONFIG_DM9000_USE_16BIT
657 CONFIG_DMA_COHERENT 657 CONFIG_DMA_COHERENT
658 CONFIG_DMA_COHERENT_SIZE 658 CONFIG_DMA_COHERENT_SIZE
659 CONFIG_DMA_LPC32XX 659 CONFIG_DMA_LPC32XX
660 CONFIG_DMA_NONCOHERENT 660 CONFIG_DMA_NONCOHERENT
661 CONFIG_DMA_REQ_BIT 661 CONFIG_DMA_REQ_BIT
662 CONFIG_DNET_AUTONEG_TIMEOUT 662 CONFIG_DNET_AUTONEG_TIMEOUT
663 CONFIG_DP_DDR_CTRL 663 CONFIG_DP_DDR_CTRL
664 CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 664 CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR
665 CONFIG_DP_DDR_NUM_CTRLS 665 CONFIG_DP_DDR_NUM_CTRLS
666 CONFIG_DRAM_2G 666 CONFIG_DRAM_2G
667 CONFIG_DRAM_TIMINGS_ 667 CONFIG_DRAM_TIMINGS_
668 CONFIG_DRIVER_AT91EMAC 668 CONFIG_DRIVER_AT91EMAC
669 CONFIG_DRIVER_AT91EMAC_PHYADDR 669 CONFIG_DRIVER_AT91EMAC_PHYADDR
670 CONFIG_DRIVER_AT91EMAC_QUIET 670 CONFIG_DRIVER_AT91EMAC_QUIET
671 CONFIG_DRIVER_AX88796L 671 CONFIG_DRIVER_AX88796L
672 CONFIG_DRIVER_DM9000 672 CONFIG_DRIVER_DM9000
673 CONFIG_DRIVER_EP93XX_MAC 673 CONFIG_DRIVER_EP93XX_MAC
674 CONFIG_DRIVER_ETHER 674 CONFIG_DRIVER_ETHER
675 CONFIG_DRIVER_NE2000 675 CONFIG_DRIVER_NE2000
676 CONFIG_DRIVER_NE2000_BASE 676 CONFIG_DRIVER_NE2000_BASE
677 CONFIG_DRIVER_NE2000_CCR 677 CONFIG_DRIVER_NE2000_CCR
678 CONFIG_DRIVER_NE2000_VAL 678 CONFIG_DRIVER_NE2000_VAL
679 CONFIG_DRIVER_SMC911X_BASE 679 CONFIG_DRIVER_SMC911X_BASE
680 CONFIG_DRIVER_TI_CPSW 680 CONFIG_DRIVER_TI_CPSW
681 CONFIG_DRIVER_TI_EMAC 681 CONFIG_DRIVER_TI_EMAC
682 CONFIG_DRIVER_TI_EMAC_RMII_NO_NEGOTIATE 682 CONFIG_DRIVER_TI_EMAC_RMII_NO_NEGOTIATE
683 CONFIG_DRIVER_TI_EMAC_USE_RMII 683 CONFIG_DRIVER_TI_EMAC_USE_RMII
684 CONFIG_DRIVER_TI_KEYSTONE_NET 684 CONFIG_DRIVER_TI_KEYSTONE_NET
685 CONFIG_DRIVE_MMC 685 CONFIG_DRIVE_MMC
686 CONFIG_DRIVE_SATA 686 CONFIG_DRIVE_SATA
687 CONFIG_DRIVE_TYPES 687 CONFIG_DRIVE_TYPES
688 CONFIG_DRIVE_USB 688 CONFIG_DRIVE_USB
689 CONFIG_DS4510 689 CONFIG_DS4510
690 CONFIG_DSP_CLUSTER_START 690 CONFIG_DSP_CLUSTER_START
691 CONFIG_DTT 691 CONFIG_DTT
692 CONFIG_DTT_AD7414 692 CONFIG_DTT_AD7414
693 CONFIG_DTT_ADM1021 693 CONFIG_DTT_ADM1021
694 CONFIG_DTT_DS1621 694 CONFIG_DTT_DS1621
695 CONFIG_DTT_DS1775 695 CONFIG_DTT_DS1775
696 CONFIG_DTT_DS620 696 CONFIG_DTT_DS620
697 CONFIG_DTT_HYSTERESIS 697 CONFIG_DTT_HYSTERESIS
698 CONFIG_DTT_LM63 698 CONFIG_DTT_LM63
699 CONFIG_DTT_LM75 699 CONFIG_DTT_LM75
700 CONFIG_DTT_MAX_TEMP 700 CONFIG_DTT_MAX_TEMP
701 CONFIG_DTT_MIN_TEMP 701 CONFIG_DTT_MIN_TEMP
702 CONFIG_DTT_PWM_LOOKUPTABLE 702 CONFIG_DTT_PWM_LOOKUPTABLE
703 CONFIG_DTT_SENSORS 703 CONFIG_DTT_SENSORS
704 CONFIG_DTT_TACH_LIMIT 704 CONFIG_DTT_TACH_LIMIT
705 CONFIG_DUOVERO 705 CONFIG_DUOVERO
706 CONFIG_DV_USBPHY_CTL 706 CONFIG_DV_USBPHY_CTL
707 CONFIG_DWC2_DFLT_SPEED_FULL 707 CONFIG_DWC2_DFLT_SPEED_FULL
708 CONFIG_DWC2_DMA_BURST_SIZE 708 CONFIG_DWC2_DMA_BURST_SIZE
709 CONFIG_DWC2_DMA_ENABLE 709 CONFIG_DWC2_DMA_ENABLE
710 CONFIG_DWC2_ENABLE_DYNAMIC_FIFO 710 CONFIG_DWC2_ENABLE_DYNAMIC_FIFO
711 CONFIG_DWC2_HOST_NPERIO_TX_FIFO_SIZE 711 CONFIG_DWC2_HOST_NPERIO_TX_FIFO_SIZE
712 CONFIG_DWC2_HOST_PERIO_TX_FIFO_SIZE 712 CONFIG_DWC2_HOST_PERIO_TX_FIFO_SIZE
713 CONFIG_DWC2_HOST_RX_FIFO_SIZE 713 CONFIG_DWC2_HOST_RX_FIFO_SIZE
714 CONFIG_DWC2_I2C_ENABLE 714 CONFIG_DWC2_I2C_ENABLE
715 CONFIG_DWC2_IC_USB_CAP 715 CONFIG_DWC2_IC_USB_CAP
716 CONFIG_DWC2_MAX_CHANNELS 716 CONFIG_DWC2_MAX_CHANNELS
717 CONFIG_DWC2_MAX_PACKET_COUNT 717 CONFIG_DWC2_MAX_PACKET_COUNT
718 CONFIG_DWC2_MAX_TRANSFER_SIZE 718 CONFIG_DWC2_MAX_TRANSFER_SIZE
719 CONFIG_DWC2_PHY_TYPE 719 CONFIG_DWC2_PHY_TYPE
720 CONFIG_DWC2_PHY_ULPI_DDR 720 CONFIG_DWC2_PHY_ULPI_DDR
721 CONFIG_DWC2_PHY_ULPI_EXT_VBUS 721 CONFIG_DWC2_PHY_ULPI_EXT_VBUS
722 CONFIG_DWC2_THR_CTL 722 CONFIG_DWC2_THR_CTL
723 CONFIG_DWC2_TS_DLINE 723 CONFIG_DWC2_TS_DLINE
724 CONFIG_DWC2_TX_THR_LENGTH 724 CONFIG_DWC2_TX_THR_LENGTH
725 CONFIG_DWC2_ULPI_FS_LS 725 CONFIG_DWC2_ULPI_FS_LS
726 CONFIG_DWC2_UTMI_WIDTH 726 CONFIG_DWC2_UTMI_WIDTH
727 CONFIG_DWCDDR21MCTL 727 CONFIG_DWCDDR21MCTL
728 CONFIG_DWCDDR21MCTL_BASE 728 CONFIG_DWCDDR21MCTL_BASE
729 CONFIG_DWC_AHSATA 729 CONFIG_DWC_AHSATA
730 CONFIG_DWC_AHSATA_BASE_ADDR 730 CONFIG_DWC_AHSATA_BASE_ADDR
731 CONFIG_DWC_AHSATA_PORT_ID 731 CONFIG_DWC_AHSATA_PORT_ID
732 CONFIG_DW_ALTDESCRIPTOR 732 CONFIG_DW_ALTDESCRIPTOR
733 CONFIG_DW_AXI_BURST_LEN 733 CONFIG_DW_AXI_BURST_LEN
734 CONFIG_DW_GMAC_DEFAULT_DMA_PBL 734 CONFIG_DW_GMAC_DEFAULT_DMA_PBL
735 CONFIG_DW_MAC_FORCE_THRESHOLD_MODE 735 CONFIG_DW_MAC_FORCE_THRESHOLD_MODE
736 CONFIG_DW_SERIAL 736 CONFIG_DW_SERIAL
737 CONFIG_DW_UDC 737 CONFIG_DW_UDC
738 CONFIG_DW_WDT_BASE 738 CONFIG_DW_WDT_BASE
739 CONFIG_DW_WDT_CLOCK_KHZ 739 CONFIG_DW_WDT_CLOCK_KHZ
740 CONFIG_DYNAMIC_MMC_DEVNO 740 CONFIG_DYNAMIC_MMC_DEVNO
741 CONFIG_E1000_NO_NVM 741 CONFIG_E1000_NO_NVM
742 CONFIG_E300 742 CONFIG_E300
743 CONFIG_E5500 743 CONFIG_E5500
744 CONFIG_EBC_PPC4xx_IBM_VER1 744 CONFIG_EBC_PPC4xx_IBM_VER1
745 CONFIG_ECC 745 CONFIG_ECC
746 CONFIG_ECC_INIT_VIA_DDRCONTROLLER 746 CONFIG_ECC_INIT_VIA_DDRCONTROLLER
747 CONFIG_ECC_MODE_MASK 747 CONFIG_ECC_MODE_MASK
748 CONFIG_ECC_MODE_SHIFT 748 CONFIG_ECC_MODE_SHIFT
749 CONFIG_ECC_SRAM_ADDR_MASK 749 CONFIG_ECC_SRAM_ADDR_MASK
750 CONFIG_ECC_SRAM_ADDR_SHIFT 750 CONFIG_ECC_SRAM_ADDR_SHIFT
751 CONFIG_ECC_SRAM_REQ_BIT 751 CONFIG_ECC_SRAM_REQ_BIT
752 CONFIG_ECOVEC 752 CONFIG_ECOVEC
753 CONFIG_ECOVEC_ROMIMAGE_ADDR 753 CONFIG_ECOVEC_ROMIMAGE_ADDR
754 CONFIG_EDB9301 754 CONFIG_EDB9301
755 CONFIG_EDB9302 755 CONFIG_EDB9302
756 CONFIG_EDB9302A 756 CONFIG_EDB9302A
757 CONFIG_EDB9307 757 CONFIG_EDB9307
758 CONFIG_EDB9307A 758 CONFIG_EDB9307A
759 CONFIG_EDB9312 759 CONFIG_EDB9312
760 CONFIG_EDB9315 760 CONFIG_EDB9315
761 CONFIG_EDB9315A 761 CONFIG_EDB9315A
762 CONFIG_EDB93XX_INDUSTRIAL 762 CONFIG_EDB93XX_INDUSTRIAL
763 CONFIG_EDB93XX_SDCS0 763 CONFIG_EDB93XX_SDCS0
764 CONFIG_EDB93XX_SDCS1 764 CONFIG_EDB93XX_SDCS1
765 CONFIG_EDB93XX_SDCS2 765 CONFIG_EDB93XX_SDCS2
766 CONFIG_EDB93XX_SDCS3 766 CONFIG_EDB93XX_SDCS3
767 CONFIG_EEPRO100 767 CONFIG_EEPRO100
768 CONFIG_EEPRO100_SROM_WRITE 768 CONFIG_EEPRO100_SROM_WRITE
769 CONFIG_EEPROM_LAYOUT_HELP_STRING 769 CONFIG_EEPROM_LAYOUT_HELP_STRING
770 CONFIG_EFLASH_PROTSECTORS 770 CONFIG_EFLASH_PROTSECTORS
771 CONFIG_EHCI_DESC_BIG_ENDIAN 771 CONFIG_EHCI_DESC_BIG_ENDIAN
772 CONFIG_EHCI_HCD_INIT_AFTER_RESET 772 CONFIG_EHCI_HCD_INIT_AFTER_RESET
773 CONFIG_EHCI_IS_TDI 773 CONFIG_EHCI_IS_TDI
774 CONFIG_EHCI_MMIO_BIG_ENDIAN 774 CONFIG_EHCI_MMIO_BIG_ENDIAN
775 CONFIG_EHCI_MXS_PORT0 775 CONFIG_EHCI_MXS_PORT0
776 CONFIG_EHCI_MXS_PORT1 776 CONFIG_EHCI_MXS_PORT1
777 CONFIG_ELBC_NAND_SPL_STATIC_PGSIZE 777 CONFIG_ELBC_NAND_SPL_STATIC_PGSIZE
778 CONFIG_EMAC_NR_START 778 CONFIG_EMAC_NR_START
779 CONFIG_EMAC_PHY_MODE 779 CONFIG_EMAC_PHY_MODE
780 CONFIG_EMIF4 780 CONFIG_EMIF4
781 CONFIG_EMMC_BOOT 781 CONFIG_EMMC_BOOT
782 CONFIG_EMU 782 CONFIG_EMU
783 CONFIG_ENABLE_36BIT_PHYS 783 CONFIG_ENABLE_36BIT_PHYS
784 CONFIG_ENABLE_MMU 784 CONFIG_ENABLE_MMU
785 CONFIG_ENABLE_MUST_CHECK 785 CONFIG_ENABLE_MUST_CHECK
786 CONFIG_ENABLE_WARN_DEPRECATED 786 CONFIG_ENABLE_WARN_DEPRECATED
787 CONFIG_ENC_SILENTLINK 787 CONFIG_ENC_SILENTLINK
788 CONFIG_ENV_ACCESS_IGNORE_FORCE 788 CONFIG_ENV_ACCESS_IGNORE_FORCE
789 CONFIG_ENV_ADDR 789 CONFIG_ENV_ADDR
790 CONFIG_ENV_ADDR_FLEX 790 CONFIG_ENV_ADDR_FLEX
791 CONFIG_ENV_ADDR_REDUND 791 CONFIG_ENV_ADDR_REDUND
792 CONFIG_ENV_AES 792 CONFIG_ENV_AES
793 CONFIG_ENV_BASE 793 CONFIG_ENV_BASE
794 CONFIG_ENV_CALLBACK_LIST_DEFAULT 794 CONFIG_ENV_CALLBACK_LIST_DEFAULT
795 CONFIG_ENV_CALLBACK_LIST_STATIC 795 CONFIG_ENV_CALLBACK_LIST_STATIC
796 CONFIG_ENV_COMMON_BOOT 796 CONFIG_ENV_COMMON_BOOT
797 CONFIG_ENV_EEPROM_IS_ON_I2C 797 CONFIG_ENV_EEPROM_IS_ON_I2C
798 CONFIG_ENV_FIT_UCBOOT 798 CONFIG_ENV_FIT_UCBOOT
799 CONFIG_ENV_FLAGS_LIST_DEFAULT 799 CONFIG_ENV_FLAGS_LIST_DEFAULT
800 CONFIG_ENV_FLAGS_LIST_STATIC 800 CONFIG_ENV_FLAGS_LIST_STATIC
801 CONFIG_ENV_FLASHBOOT 801 CONFIG_ENV_FLASHBOOT
802 CONFIG_ENV_IS_EMBEDDED 802 CONFIG_ENV_IS_EMBEDDED
803 CONFIG_ENV_IS_IN_ 803 CONFIG_ENV_IS_IN_
804 CONFIG_ENV_IS_IN_DATAFLASH 804 CONFIG_ENV_IS_IN_DATAFLASH
805 CONFIG_ENV_IS_IN_EEPROM 805 CONFIG_ENV_IS_IN_EEPROM
806 CONFIG_ENV_IS_IN_FAT 806 CONFIG_ENV_IS_IN_FAT
807 CONFIG_ENV_IS_IN_FLASH 807 CONFIG_ENV_IS_IN_FLASH
808 CONFIG_ENV_IS_IN_MRAM 808 CONFIG_ENV_IS_IN_MRAM
809 CONFIG_ENV_IS_IN_NVRAM 809 CONFIG_ENV_IS_IN_NVRAM
810 CONFIG_ENV_IS_IN_ONENAND 810 CONFIG_ENV_IS_IN_ONENAND
811 CONFIG_ENV_IS_IN_REMOTE 811 CONFIG_ENV_IS_IN_REMOTE
812 CONFIG_ENV_IS_IN_SPI_FLASH 812 CONFIG_ENV_IS_IN_SPI_FLASH
813 CONFIG_ENV_MAX_ENTRIES 813 CONFIG_ENV_MAX_ENTRIES
814 CONFIG_ENV_MIN_ENTRIES 814 CONFIG_ENV_MIN_ENTRIES
815 CONFIG_ENV_OFFSET_OOB 815 CONFIG_ENV_OFFSET_OOB
816 CONFIG_ENV_OFFSET_REDUND 816 CONFIG_ENV_OFFSET_REDUND
817 CONFIG_ENV_OVERWRITE 817 CONFIG_ENV_OVERWRITE
818 CONFIG_ENV_RANGE 818 CONFIG_ENV_RANGE
819 CONFIG_ENV_RDADDR 819 CONFIG_ENV_RDADDR
820 CONFIG_ENV_REFLASH 820 CONFIG_ENV_REFLASH
821 CONFIG_ENV_SECT_SIZE 821 CONFIG_ENV_SECT_SIZE
822 CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS 822 CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS
823 CONFIG_ENV_SETTINGS_NAND_V1 823 CONFIG_ENV_SETTINGS_NAND_V1
824 CONFIG_ENV_SETTINGS_NAND_V2 824 CONFIG_ENV_SETTINGS_NAND_V2
825 CONFIG_ENV_SETTINGS_V1 825 CONFIG_ENV_SETTINGS_V1
826 CONFIG_ENV_SETTINGS_V2 826 CONFIG_ENV_SETTINGS_V2
827 CONFIG_ENV_SIZE_FLEX 827 CONFIG_ENV_SIZE_FLEX
828 CONFIG_ENV_SIZE_REDUND 828 CONFIG_ENV_SIZE_REDUND
829 CONFIG_ENV_SPI_BASE 829 CONFIG_ENV_SPI_BASE
830 CONFIG_ENV_SPI_BUS 830 CONFIG_ENV_SPI_BUS
831 CONFIG_ENV_SPI_CS 831 CONFIG_ENV_SPI_CS
832 CONFIG_ENV_SPI_MAX_HZ 832 CONFIG_ENV_SPI_MAX_HZ
833 CONFIG_ENV_SPI_MODE 833 CONFIG_ENV_SPI_MODE
834 CONFIG_ENV_SROM_BANK 834 CONFIG_ENV_SROM_BANK
835 CONFIG_ENV_TOTAL_SIZE 835 CONFIG_ENV_TOTAL_SIZE
836 CONFIG_ENV_UBIFS_OPTION 836 CONFIG_ENV_UBIFS_OPTION
837 CONFIG_ENV_UBI_MTD 837 CONFIG_ENV_UBI_MTD
838 CONFIG_ENV_UBI_VOLUME_REDUND 838 CONFIG_ENV_UBI_VOLUME_REDUND
839 CONFIG_ENV_VARS_UBOOT_CONFIG 839 CONFIG_ENV_VARS_UBOOT_CONFIG
840 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 840 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
841 CONFIG_ENV_VERSION 841 CONFIG_ENV_VERSION
842 CONFIG_ENV_xxx 842 CONFIG_ENV_xxx
843 CONFIG_EP9301 843 CONFIG_EP9301
844 CONFIG_EP9302 844 CONFIG_EP9302
845 CONFIG_EP9307 845 CONFIG_EP9307
846 CONFIG_EP9312 846 CONFIG_EP9312
847 CONFIG_EP9315 847 CONFIG_EP9315
848 CONFIG_EP93XX 848 CONFIG_EP93XX
849 CONFIG_EP93XX_NO_FLASH_CFG 849 CONFIG_EP93XX_NO_FLASH_CFG
850 CONFIG_EPH_POWER_EN 850 CONFIG_EPH_POWER_EN
851 CONFIG_EPOLL 851 CONFIG_EPOLL
852 CONFIG_ESBC_ADDR_64BIT 852 CONFIG_ESBC_ADDR_64BIT
853 CONFIG_ESBC_HDR_LS 853 CONFIG_ESBC_HDR_LS
854 CONFIG_ESDHC_DETECT_8_BIT_QUIRK 854 CONFIG_ESDHC_DETECT_8_BIT_QUIRK
855 CONFIG_ESDHC_DETECT_QUIRK 855 CONFIG_ESDHC_DETECT_QUIRK
856 CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1 856 CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1
857 CONFIG_ESDHC_HC_BLK_ADDR 857 CONFIG_ESDHC_HC_BLK_ADDR
858 CONFIG_ESPRESSO7420 858 CONFIG_ESPRESSO7420
859 CONFIG_ESPT 859 CONFIG_ESPT
860 CONFIG_ET1100_BASE 860 CONFIG_ET1100_BASE
861 CONFIG_ETH1ADDR 861 CONFIG_ETH1ADDR
862 CONFIG_ETH2ADDR 862 CONFIG_ETH2ADDR
863 CONFIG_ETHADDR 863 CONFIG_ETHADDR
864 CONFIG_ETHBASE 864 CONFIG_ETHBASE
865 CONFIG_ETHER_INDEX 865 CONFIG_ETHER_INDEX
866 CONFIG_ETHER_LOOPBACK_TEST 866 CONFIG_ETHER_LOOPBACK_TEST
867 CONFIG_ETHER_NONE 867 CONFIG_ETHER_NONE
868 CONFIG_ETHER_ON_FCC 868 CONFIG_ETHER_ON_FCC
869 CONFIG_ETHER_ON_FCC1 869 CONFIG_ETHER_ON_FCC1
870 CONFIG_ETHER_ON_FCC2 870 CONFIG_ETHER_ON_FCC2
871 CONFIG_ETHER_ON_FCC3 871 CONFIG_ETHER_ON_FCC3
872 CONFIG_ETHER_ON_FEC1 872 CONFIG_ETHER_ON_FEC1
873 CONFIG_ETHER_ON_FEC2 873 CONFIG_ETHER_ON_FEC2
874 CONFIG_ETHER_ON_SCC 874 CONFIG_ETHER_ON_SCC
875 CONFIG_ETHPRIME 875 CONFIG_ETHPRIME
876 CONFIG_ETH_BUFSIZE 876 CONFIG_ETH_BUFSIZE
877 CONFIG_ETH_RXSIZE 877 CONFIG_ETH_RXSIZE
878 CONFIG_EXT4_WRITE 878 CONFIG_EXT4_WRITE
879 CONFIG_EXTRA_BOOTARGS 879 CONFIG_EXTRA_BOOTARGS
880 CONFIG_EXTRA_CLOCK 880 CONFIG_EXTRA_CLOCK
881 CONFIG_EXTRA_ENV 881 CONFIG_EXTRA_ENV
882 CONFIG_EXTRA_ENV_BOARD_SETTINGS 882 CONFIG_EXTRA_ENV_BOARD_SETTINGS
883 CONFIG_EXTRA_ENV_ITB 883 CONFIG_EXTRA_ENV_ITB
884 CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS 884 CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS
885 CONFIG_EXTRA_ENV_SETTINGS 885 CONFIG_EXTRA_ENV_SETTINGS
886 CONFIG_EXTRA_ENV_SETTINGS_COMMON 886 CONFIG_EXTRA_ENV_SETTINGS_COMMON
887 CONFIG_EXTRA_ENV_SETTINGS_DEVEL 887 CONFIG_EXTRA_ENV_SETTINGS_DEVEL
888 CONFIG_EXTRA_ENV_UNLOCK 888 CONFIG_EXTRA_ENV_UNLOCK
889 CONFIG_EXTRA_ENV_USBTTY 889 CONFIG_EXTRA_ENV_USBTTY
890 CONFIG_EXT_AHB2AHB_BASE 890 CONFIG_EXT_AHB2AHB_BASE
891 CONFIG_EXT_AHBAPBBRG_BASE 891 CONFIG_EXT_AHBAPBBRG_BASE
892 CONFIG_EXT_AHBPCIBRG_BASE 892 CONFIG_EXT_AHBPCIBRG_BASE
893 CONFIG_EXT_AHBSLAVE01_BASE 893 CONFIG_EXT_AHBSLAVE01_BASE
894 CONFIG_EXT_AHBSLAVE02_BASE 894 CONFIG_EXT_AHBSLAVE02_BASE
895 CONFIG_EXT_PHY 895 CONFIG_EXT_PHY
896 CONFIG_EXT_USB_HOST_BASE 896 CONFIG_EXT_USB_HOST_BASE
897 CONFIG_EXYNOS4 897 CONFIG_EXYNOS4
898 CONFIG_EXYNOS4210 898 CONFIG_EXYNOS4210
899 CONFIG_EXYNOS5 899 CONFIG_EXYNOS5
900 CONFIG_EXYNOS5250 900 CONFIG_EXYNOS5250
901 CONFIG_EXYNOS5420 901 CONFIG_EXYNOS5420
902 CONFIG_EXYNOS5800 902 CONFIG_EXYNOS5800
903 CONFIG_EXYNOS5_DT 903 CONFIG_EXYNOS5_DT
904 CONFIG_EXYNOS7420 904 CONFIG_EXYNOS7420
905 CONFIG_EXYNOS_ACE_SHA 905 CONFIG_EXYNOS_ACE_SHA
906 CONFIG_EXYNOS_DP 906 CONFIG_EXYNOS_DP
907 CONFIG_EXYNOS_FB 907 CONFIG_EXYNOS_FB
908 CONFIG_EXYNOS_MIPI_DSIM 908 CONFIG_EXYNOS_MIPI_DSIM
909 CONFIG_EXYNOS_RELOCATE_CODE_BASE 909 CONFIG_EXYNOS_RELOCATE_CODE_BASE
910 CONFIG_EXYNOS_SPL 910 CONFIG_EXYNOS_SPL
911 CONFIG_EXYNOS_TMU 911 CONFIG_EXYNOS_TMU
912 CONFIG_FACTORYSET 912 CONFIG_FACTORYSET
913 CONFIG_FASTBOOT_FLASH_FILLBUF_SIZE 913 CONFIG_FASTBOOT_FLASH_FILLBUF_SIZE
914 CONFIG_FASTBOOT_FLASH_NAND_DEV 914 CONFIG_FASTBOOT_FLASH_NAND_DEV
915 CONFIG_FASTBOOT_FLASH_NAND_TRIMFFS 915 CONFIG_FASTBOOT_FLASH_NAND_TRIMFFS
916 CONFIG_FAST_FLASH_BIT 916 CONFIG_FAST_FLASH_BIT
917 CONFIG_FAT_WRITE 917 CONFIG_FAT_WRITE
918 CONFIG_FB_ADDR 918 CONFIG_FB_ADDR
919 CONFIG_FB_BACKLIGHT 919 CONFIG_FB_BACKLIGHT
920 CONFIG_FB_DEFERRED_IO 920 CONFIG_FB_DEFERRED_IO
921 CONFIG_FDT1_ENV_ADDR 921 CONFIG_FDT1_ENV_ADDR
922 CONFIG_FDT2_ENV_ADDR 922 CONFIG_FDT2_ENV_ADDR
923 CONFIG_FDTADDR 923 CONFIG_FDTADDR
924 CONFIG_FDTFILE 924 CONFIG_FDTFILE
925 CONFIG_FDT_ENV_ADDR 925 CONFIG_FDT_ENV_ADDR
926 CONFIG_FDT_FIXUP_NOR_FLASH_SIZE 926 CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
927 CONFIG_FDT_FIXUP_PCI_IRQ 927 CONFIG_FDT_FIXUP_PCI_IRQ
928 CONFIG_FEATURE_CLEAN_UP 928 CONFIG_FEATURE_CLEAN_UP
929 CONFIG_FEATURE_COMMAND_EDITING 929 CONFIG_FEATURE_COMMAND_EDITING
930 CONFIG_FEATURE_SH_APPLETS_ALWAYS_WIN 930 CONFIG_FEATURE_SH_APPLETS_ALWAYS_WIN
931 CONFIG_FEATURE_SH_EXTRA_QUIET 931 CONFIG_FEATURE_SH_EXTRA_QUIET
932 CONFIG_FEATURE_SH_FANCY_PROMPT 932 CONFIG_FEATURE_SH_FANCY_PROMPT
933 CONFIG_FEATURE_SH_STANDALONE_SHELL 933 CONFIG_FEATURE_SH_STANDALONE_SHELL
934 CONFIG_FEC1_PHY 934 CONFIG_FEC1_PHY
935 CONFIG_FEC2_PHY 935 CONFIG_FEC2_PHY
936 CONFIG_FEC_10MBIT 936 CONFIG_FEC_10MBIT
937 CONFIG_FEC_AN_TIMEOUT 937 CONFIG_FEC_AN_TIMEOUT
938 CONFIG_FEC_ENET 938 CONFIG_FEC_ENET
939 CONFIG_FEC_ENET_DEV 939 CONFIG_FEC_ENET_DEV
940 CONFIG_FEC_FIXED_SPEED 940 CONFIG_FEC_FIXED_SPEED
941 CONFIG_FEC_MXC_25M_REF_CLK 941 CONFIG_FEC_MXC_25M_REF_CLK
942 CONFIG_FEC_MXC_PHYADDR 942 CONFIG_FEC_MXC_PHYADDR
943 CONFIG_FEC_MXC_SWAP_PACKET 943 CONFIG_FEC_MXC_SWAP_PACKET
944 CONFIG_FEC_XCV_TYPE 944 CONFIG_FEC_XCV_TYPE
945 CONFIG_FEROCEON 945 CONFIG_FEROCEON
946 CONFIG_FEROCEON_88FR131 946 CONFIG_FEROCEON_88FR131
947 CONFIG_FFUART 947 CONFIG_FFUART
948 CONFIG_FILE 948 CONFIG_FILE
949 CONFIG_FIRMWARE_OFFSET 949 CONFIG_FIRMWARE_OFFSET
950 CONFIG_FIRMWARE_SIZE 950 CONFIG_FIRMWARE_SIZE
951 CONFIG_FIT_DISABLE_SHA256 951 CONFIG_FIT_DISABLE_SHA256
952 CONFIG_FIXED_PHY 952 CONFIG_FIXED_PHY
953 CONFIG_FIXED_PHY_ADDR 953 CONFIG_FIXED_PHY_ADDR
954 CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 954 CONFIG_FIXED_SDHCI_ALIGNED_BUFFER
955 CONFIG_FLASHBOOTCOMMAND 955 CONFIG_FLASHBOOTCOMMAND
956 CONFIG_FLASHCARD 956 CONFIG_FLASHCARD
957 CONFIG_FLASH_16BIT 957 CONFIG_FLASH_16BIT
958 CONFIG_FLASH_BASE 958 CONFIG_FLASH_BASE
959 CONFIG_FLASH_BR_PRELIM 959 CONFIG_FLASH_BR_PRELIM
960 CONFIG_FLASH_CFI_DRIVER 960 CONFIG_FLASH_CFI_DRIVER
961 CONFIG_FLASH_CFI_LEGACY 961 CONFIG_FLASH_CFI_LEGACY
962 CONFIG_FLASH_CFI_MTD 962 CONFIG_FLASH_CFI_MTD
963 CONFIG_FLASH_END 963 CONFIG_FLASH_END
964 CONFIG_FLASH_NOT_MEM_MAPPED 964 CONFIG_FLASH_NOT_MEM_MAPPED
965 CONFIG_FLASH_OR_PRELIM 965 CONFIG_FLASH_OR_PRELIM
966 CONFIG_FLASH_PNOR 966 CONFIG_FLASH_PNOR
967 CONFIG_FLASH_SECTOR_SIZE 967 CONFIG_FLASH_SECTOR_SIZE
968 CONFIG_FLASH_SHOW_PROGRESS 968 CONFIG_FLASH_SHOW_PROGRESS
969 CONFIG_FLASH_SPANSION_S29WS_N 969 CONFIG_FLASH_SPANSION_S29WS_N
970 CONFIG_FLASH_VERIFY 970 CONFIG_FLASH_VERIFY
971 CONFIG_FMAN_ENET 971 CONFIG_FMAN_ENET
972 CONFIG_FM_PLAT_CLK_DIV 972 CONFIG_FM_PLAT_CLK_DIV
973 CONFIG_FO300 973 CONFIG_FO300
974 CONFIG_FORCE_DDR_DATA_BUS_WIDTH_32 974 CONFIG_FORCE_DDR_DATA_BUS_WIDTH_32
975 CONFIG_FORMIKE 975 CONFIG_FORMIKE
976 CONFIG_FPGA_COUNT 976 CONFIG_FPGA_COUNT
977 CONFIG_FPGA_DELAY 977 CONFIG_FPGA_DELAY
978 CONFIG_FPGA_SOCFPGA 978 CONFIG_FPGA_SOCFPGA
979 CONFIG_FPGA_SPARTAN2 979 CONFIG_FPGA_SPARTAN2
980 CONFIG_FPGA_SPARTAN3 980 CONFIG_FPGA_SPARTAN3
981 CONFIG_FPGA_STRATIX_V 981 CONFIG_FPGA_STRATIX_V
982 CONFIG_FPGA_ZYNQPL 982 CONFIG_FPGA_ZYNQPL
983 CONFIG_FSLDMAFEC 983 CONFIG_FSLDMAFEC
984 CONFIG_FSL_CADMUS 984 CONFIG_FSL_CADMUS
985 CONFIG_FSL_CORENET 985 CONFIG_FSL_CORENET
986 CONFIG_FSL_CPLD 986 CONFIG_FSL_CPLD
987 CONFIG_FSL_DCU_SII9022A 987 CONFIG_FSL_DCU_SII9022A
988 CONFIG_FSL_DDR_BIST 988 CONFIG_FSL_DDR_BIST
989 CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE 989 CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
990 CONFIG_FSL_DDR_INTERACTIVE 990 CONFIG_FSL_DDR_INTERACTIVE
991 CONFIG_FSL_DDR_SYNC_REFRESH 991 CONFIG_FSL_DDR_SYNC_REFRESH
992 CONFIG_FSL_DEEP_SLEEP 992 CONFIG_FSL_DEEP_SLEEP
993 CONFIG_FSL_DEVICE_DISABLE 993 CONFIG_FSL_DEVICE_DISABLE
994 CONFIG_FSL_DIU_CH7301 994 CONFIG_FSL_DIU_CH7301
995 CONFIG_FSL_DIU_FB 995 CONFIG_FSL_DIU_FB
996 CONFIG_FSL_DMA 996 CONFIG_FSL_DMA
997 CONFIG_FSL_DSPI1 997 CONFIG_FSL_DSPI1
998 CONFIG_FSL_ESDHC 998 CONFIG_FSL_ESDHC
999 CONFIG_FSL_ESDHC_ADAPTER_IDENT 999 CONFIG_FSL_ESDHC_ADAPTER_IDENT
1000 CONFIG_FSL_ESDHC_PIN_MUX 1000 CONFIG_FSL_ESDHC_PIN_MUX
1001 CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK 1001 CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
1002 CONFIG_FSL_FIXED_MMC_LOCATION 1002 CONFIG_FSL_FIXED_MMC_LOCATION
1003 CONFIG_FSL_FM_10GEC_REGULAR_NOTATION 1003 CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
1004 CONFIG_FSL_I2C_CUSTOM_DFSR 1004 CONFIG_FSL_I2C_CUSTOM_DFSR
1005 CONFIG_FSL_I2C_CUSTOM_FDR 1005 CONFIG_FSL_I2C_CUSTOM_FDR
1006 CONFIG_FSL_IIM 1006 CONFIG_FSL_IIM
1007 CONFIG_FSL_ISBC_KEY_EXT 1007 CONFIG_FSL_ISBC_KEY_EXT
1008 CONFIG_FSL_LAYERSCAPE 1008 CONFIG_FSL_LAYERSCAPE
1009 CONFIG_FSL_LBC 1009 CONFIG_FSL_LBC
1010 CONFIG_FSL_LINFLEXUART 1010 CONFIG_FSL_LINFLEXUART
1011 CONFIG_FSL_MC9SDZ60 1011 CONFIG_FSL_MC9SDZ60
1012 CONFIG_FSL_MEMAC 1012 CONFIG_FSL_MEMAC
1013 CONFIG_FSL_NFC_CHIPS 1013 CONFIG_FSL_NFC_CHIPS
1014 CONFIG_FSL_NFC_SPARE_SIZE 1014 CONFIG_FSL_NFC_SPARE_SIZE
1015 CONFIG_FSL_NFC_WIDTH 1015 CONFIG_FSL_NFC_WIDTH
1016 CONFIG_FSL_NFC_WRITE_SIZE 1016 CONFIG_FSL_NFC_WRITE_SIZE
1017 CONFIG_FSL_NGPIXIS 1017 CONFIG_FSL_NGPIXIS
1018 CONFIG_FSL_PCIE_DISABLE_ASPM 1018 CONFIG_FSL_PCIE_DISABLE_ASPM
1019 CONFIG_FSL_PCIE_RESET 1019 CONFIG_FSL_PCIE_RESET
1020 CONFIG_FSL_PCI_INIT 1020 CONFIG_FSL_PCI_INIT
1021 CONFIG_FSL_PIXIS 1021 CONFIG_FSL_PIXIS
1022 CONFIG_FSL_PMIC_BITLEN 1022 CONFIG_FSL_PMIC_BITLEN
1023 CONFIG_FSL_PMIC_BUS 1023 CONFIG_FSL_PMIC_BUS
1024 CONFIG_FSL_PMIC_CLK 1024 CONFIG_FSL_PMIC_CLK
1025 CONFIG_FSL_PMIC_CS 1025 CONFIG_FSL_PMIC_CS
1026 CONFIG_FSL_PMIC_MODE 1026 CONFIG_FSL_PMIC_MODE
1027 CONFIG_FSL_QIXIS 1027 CONFIG_FSL_QIXIS
1028 CONFIG_FSL_QIXIS_CLOCK_MEASUREMENT 1028 CONFIG_FSL_QIXIS_CLOCK_MEASUREMENT
1029 CONFIG_FSL_QIXIS_V2 1029 CONFIG_FSL_QIXIS_V2
1030 CONFIG_FSL_SATA 1030 CONFIG_FSL_SATA
1031 CONFIG_FSL_SATA_V2 1031 CONFIG_FSL_SATA_V2
1032 CONFIG_FSL_SDHC_V2_3 1032 CONFIG_FSL_SDHC_V2_3
1033 CONFIG_FSL_SDRAM_TYPE 1033 CONFIG_FSL_SDRAM_TYPE
1034 CONFIG_FSL_SERDES 1034 CONFIG_FSL_SERDES
1035 CONFIG_FSL_SERDES1 1035 CONFIG_FSL_SERDES1
1036 CONFIG_FSL_SERDES2 1036 CONFIG_FSL_SERDES2
1037 CONFIG_FSL_SGMII_RISER 1037 CONFIG_FSL_SGMII_RISER
1038 CONFIG_FSL_SPI_INTERFACE 1038 CONFIG_FSL_SPI_INTERFACE
1039 CONFIG_FSL_TBCLK_EXTRA_DIV 1039 CONFIG_FSL_TBCLK_EXTRA_DIV
1040 CONFIG_FSL_TRUST_ARCH_v1 1040 CONFIG_FSL_TRUST_ARCH_v1
1041 CONFIG_FSL_TZASC_400 1041 CONFIG_FSL_TZASC_400
1042 CONFIG_FSL_TZPC_BP147 1042 CONFIG_FSL_TZPC_BP147
1043 CONFIG_FSL_USDHC 1043 CONFIG_FSL_USDHC
1044 CONFIG_FSL_VIA 1044 CONFIG_FSL_VIA
1045 CONFIG_FSMC_NAND_BASE 1045 CONFIG_FSMC_NAND_BASE
1046 CONFIG_FSMTDBLK 1046 CONFIG_FSMTDBLK
1047 CONFIG_FSNOTIFY 1047 CONFIG_FSNOTIFY
1048 CONFIG_FS_EXT4 1048 CONFIG_FS_EXT4
1049 CONFIG_FS_FAT 1049 CONFIG_FS_FAT
1050 CONFIG_FS_FAT_MAX_CLUSTSIZE 1050 CONFIG_FS_FAT_MAX_CLUSTSIZE
1051 CONFIG_FS_POSIX_ACL 1051 CONFIG_FS_POSIX_ACL
1052 CONFIG_FTAHBC020S 1052 CONFIG_FTAHBC020S
1053 CONFIG_FTAHBC020S_BASE 1053 CONFIG_FTAHBC020S_BASE
1054 CONFIG_FTAPBBRG020S_01_BASE 1054 CONFIG_FTAPBBRG020S_01_BASE
1055 CONFIG_FTCFC010_BASE 1055 CONFIG_FTCFC010_BASE
1056 CONFIG_FTDMAC020_BASE 1056 CONFIG_FTDMAC020_BASE
1057 CONFIG_FTGMAC100_BASE 1057 CONFIG_FTGMAC100_BASE
1058 CONFIG_FTGMAC100_EGIGA 1058 CONFIG_FTGMAC100_EGIGA
1059 CONFIG_FTGPIO010_BASE 1059 CONFIG_FTGPIO010_BASE
1060 CONFIG_FTI2C010_BASE1 1060 CONFIG_FTI2C010_BASE1
1061 CONFIG_FTI2C010_BASE2 1061 CONFIG_FTI2C010_BASE2
1062 CONFIG_FTI2C010_BASE3 1062 CONFIG_FTI2C010_BASE3
1063 CONFIG_FTI2C010_CLOCK 1063 CONFIG_FTI2C010_CLOCK
1064 CONFIG_FTI2C010_TIMEOUT 1064 CONFIG_FTI2C010_TIMEOUT
1065 CONFIG_FTIDE020S_BASE 1065 CONFIG_FTIDE020S_BASE
1066 CONFIG_FTIIC010_BASE 1066 CONFIG_FTIIC010_BASE
1067 CONFIG_FTINTC010_BASE 1067 CONFIG_FTINTC010_BASE
1068 CONFIG_FTLCDC100_BASE 1068 CONFIG_FTLCDC100_BASE
1069 CONFIG_FTMAC100 1069 CONFIG_FTMAC100
1070 CONFIG_FTMAC100_BASE 1070 CONFIG_FTMAC100_BASE
1071 CONFIG_FTMAC110_BASE 1071 CONFIG_FTMAC110_BASE
1072 CONFIG_FTPCI100_BASE 1072 CONFIG_FTPCI100_BASE
1073 CONFIG_FTPCI100_IO_SIZE 1073 CONFIG_FTPCI100_IO_SIZE
1074 CONFIG_FTPCI100_MEM_BASE 1074 CONFIG_FTPCI100_MEM_BASE
1075 CONFIG_FTPCI100_MEM_SIZE 1075 CONFIG_FTPCI100_MEM_SIZE
1076 CONFIG_FTPMU010 1076 CONFIG_FTPMU010
1077 CONFIG_FTPMU010_BASE 1077 CONFIG_FTPMU010_BASE
1078 CONFIG_FTPMU010_POWER 1078 CONFIG_FTPMU010_POWER
1079 CONFIG_FTPWM010_BASE 1079 CONFIG_FTPWM010_BASE
1080 CONFIG_FTRACE_MCOUNT_RECORD 1080 CONFIG_FTRACE_MCOUNT_RECORD
1081 CONFIG_FTRTC010_BASE 1081 CONFIG_FTRTC010_BASE
1082 CONFIG_FTRTC010_EXTCLK 1082 CONFIG_FTRTC010_EXTCLK
1083 CONFIG_FTRTC010_PCLK 1083 CONFIG_FTRTC010_PCLK
1084 CONFIG_FTSDC010 1084 CONFIG_FTSDC010
1085 CONFIG_FTSDC010_BASE 1085 CONFIG_FTSDC010_BASE
1086 CONFIG_FTSDC010_BASE_LIST 1086 CONFIG_FTSDC010_BASE_LIST
1087 CONFIG_FTSDC010_NUMBER 1087 CONFIG_FTSDC010_NUMBER
1088 CONFIG_FTSDC010_SDIO 1088 CONFIG_FTSDC010_SDIO
1089 CONFIG_FTSDMC021 1089 CONFIG_FTSDMC021
1090 CONFIG_FTSDMC021_BASE 1090 CONFIG_FTSDMC021_BASE
1091 CONFIG_FTSMC020 1091 CONFIG_FTSMC020
1092 CONFIG_FTSMC020_BASE 1092 CONFIG_FTSMC020_BASE
1093 CONFIG_FTSSP010_01_BASE 1093 CONFIG_FTSSP010_01_BASE
1094 CONFIG_FTSSP010_02_BASE 1094 CONFIG_FTSSP010_02_BASE
1095 CONFIG_FTTMR010_BASE 1095 CONFIG_FTTMR010_BASE
1096 CONFIG_FTTMR010_EXT_CLK 1096 CONFIG_FTTMR010_EXT_CLK
1097 CONFIG_FTUART010_01_BASE 1097 CONFIG_FTUART010_01_BASE
1098 CONFIG_FTUART010_02_BASE 1098 CONFIG_FTUART010_02_BASE
1099 CONFIG_FTUART010_03_BASE 1099 CONFIG_FTUART010_03_BASE
1100 CONFIG_FTWDT010_BASE 1100 CONFIG_FTWDT010_BASE
1101 CONFIG_FTWDT010_WATCHDOG 1101 CONFIG_FTWDT010_WATCHDOG
1102 CONFIG_FUNC_ISRAM_ADDR 1102 CONFIG_FUNC_ISRAM_ADDR
1103 CONFIG_FWUPDATE_DEBUG 1103 CONFIG_FWUPDATE_DEBUG
1104 CONFIG_FZOTG266HD0A_BASE 1104 CONFIG_FZOTG266HD0A_BASE
1105 CONFIG_GATEWAYIP 1105 CONFIG_GATEWAYIP
1106 CONFIG_GCOV_KERNEL 1106 CONFIG_GCOV_KERNEL
1107 CONFIG_GCOV_PROFILE_ALL 1107 CONFIG_GCOV_PROFILE_ALL
1108 CONFIG_GICV2 1108 CONFIG_GICV2
1109 CONFIG_GICV3 1109 CONFIG_GICV3
1110 CONFIG_GLOBAL_DATA_NOT_REG10 1110 CONFIG_GLOBAL_DATA_NOT_REG10
1111 CONFIG_GLOBAL_TIMER 1111 CONFIG_GLOBAL_TIMER
1112 CONFIG_GMII 1112 CONFIG_GMII
1113 CONFIG_GOOD_SESH4 1113 CONFIG_GOOD_SESH4
1114 CONFIG_GPCNTRL 1114 CONFIG_GPCNTRL
1115 CONFIG_GPCS_PHY1_ADDR 1115 CONFIG_GPCS_PHY1_ADDR
1116 CONFIG_GPCS_PHY2_ADDR 1116 CONFIG_GPCS_PHY2_ADDR
1117 CONFIG_GPCS_PHY3_ADDR 1117 CONFIG_GPCS_PHY3_ADDR
1118 CONFIG_GPCS_PHY_ADDR 1118 CONFIG_GPCS_PHY_ADDR
1119 CONFIG_GPIO 1119 CONFIG_GPIO
1120 CONFIG_GPIO_ENABLE_SPI_FLASH 1120 CONFIG_GPIO_ENABLE_SPI_FLASH
1121 CONFIG_GPIO_LED_INVERTED_TABLE 1121 CONFIG_GPIO_LED_INVERTED_TABLE
1122 CONFIG_GPIO_LED_STUBS 1122 CONFIG_GPIO_LED_STUBS
1123 CONFIG_GREEN_LED 1123 CONFIG_GREEN_LED
1124 CONFIG_GURNARD_FPGA 1124 CONFIG_GURNARD_FPGA
1125 CONFIG_GURNARD_SPLASH 1125 CONFIG_GURNARD_SPLASH
1126 CONFIG_GZIP 1126 CONFIG_GZIP
1127 CONFIG_GZIP_COMPRESSED 1127 CONFIG_GZIP_COMPRESSED
1128 CONFIG_GZIP_COMPRESS_DEF_SZ 1128 CONFIG_GZIP_COMPRESS_DEF_SZ
1129 CONFIG_G_DNL_THOR_PRODUCT_NUM 1129 CONFIG_G_DNL_THOR_PRODUCT_NUM
1130 CONFIG_G_DNL_THOR_VENDOR_NUM 1130 CONFIG_G_DNL_THOR_VENDOR_NUM
1131 CONFIG_G_DNL_UMS_PRODUCT_NUM 1131 CONFIG_G_DNL_UMS_PRODUCT_NUM
1132 CONFIG_G_DNL_UMS_VENDOR_NUM 1132 CONFIG_G_DNL_UMS_VENDOR_NUM
1133 CONFIG_H264_FREQ 1133 CONFIG_H264_FREQ
1134 CONFIG_H8300 1134 CONFIG_H8300
1135 CONFIG_HALEAKALA 1135 CONFIG_HALEAKALA
1136 CONFIG_HARD_I2C 1136 CONFIG_HARD_I2C
1137 CONFIG_HARD_SPI 1137 CONFIG_HARD_SPI
1138 CONFIG_HASH_VERIFY 1138 CONFIG_HASH_VERIFY
1139 CONFIG_HAS_DATAFLASH 1139 CONFIG_HAS_DATAFLASH
1140 CONFIG_HAS_ETH0 1140 CONFIG_HAS_ETH0
1141 CONFIG_HAS_ETH1 1141 CONFIG_HAS_ETH1
1142 CONFIG_HAS_ETH2 1142 CONFIG_HAS_ETH2
1143 CONFIG_HAS_ETH3 1143 CONFIG_HAS_ETH3
1144 CONFIG_HAS_ETH4 1144 CONFIG_HAS_ETH4
1145 CONFIG_HAS_ETH5 1145 CONFIG_HAS_ETH5
1146 CONFIG_HAS_ETH7 1146 CONFIG_HAS_ETH7
1147 CONFIG_HAS_FEC 1147 CONFIG_HAS_FEC
1148 CONFIG_HAS_FSL_DR_USB 1148 CONFIG_HAS_FSL_DR_USB
1149 CONFIG_HAS_FSL_MPH_USB 1149 CONFIG_HAS_FSL_MPH_USB
1150 CONFIG_HAS_FSL_XHCI_USB 1150 CONFIG_HAS_FSL_XHCI_USB
1151 CONFIG_HAS_POST 1151 CONFIG_HAS_POST
1152 CONFIG_HAVE_ACPI_RESUME 1152 CONFIG_HAVE_ACPI_RESUME
1153 CONFIG_HAVE_OWN_RESET 1153 CONFIG_HAVE_OWN_RESET
1154 CONFIG_HCLK_FREQ 1154 CONFIG_HCLK_FREQ
1155 CONFIG_HDBOOT 1155 CONFIG_HDBOOT
1156 CONFIG_HDMI_ENCODER_I2C_ADDR 1156 CONFIG_HDMI_ENCODER_I2C_ADDR
1157 CONFIG_HETROGENOUS_CLUSTERS 1157 CONFIG_HETROGENOUS_CLUSTERS
1158 CONFIG_HIDE_LOGO_VERSION 1158 CONFIG_HIDE_LOGO_VERSION
1159 CONFIG_HIGH_BATS 1159 CONFIG_HIGH_BATS
1160 CONFIG_HIKEY_GPIO 1160 CONFIG_HIKEY_GPIO
1161 CONFIG_HIS_DRIVER 1161 CONFIG_HIS_DRIVER
1162 CONFIG_HITACHI_SP19X001_Z1A 1162 CONFIG_HITACHI_SP19X001_Z1A
1163 CONFIG_HITACHI_SX14 1163 CONFIG_HITACHI_SX14
1164 CONFIG_HLD1045 1164 CONFIG_HLD1045
1165 CONFIG_HOSTNAME 1165 CONFIG_HOSTNAME
1166 CONFIG_HOST_MAX_DEVICES 1166 CONFIG_HOST_MAX_DEVICES
1167 CONFIG_HOTPLUG 1167 CONFIG_HOTPLUG
1168 CONFIG_HPS_ALTERAGRP_DBGATCLK 1168 CONFIG_HPS_ALTERAGRP_DBGATCLK
1169 CONFIG_HPS_ALTERAGRP_MAINCLK 1169 CONFIG_HPS_ALTERAGRP_MAINCLK
1170 CONFIG_HPS_ALTERAGRP_MPUCLK 1170 CONFIG_HPS_ALTERAGRP_MPUCLK
1171 CONFIG_HPS_CLK_CAN0_HZ 1171 CONFIG_HPS_CLK_CAN0_HZ
1172 CONFIG_HPS_CLK_CAN1_HZ 1172 CONFIG_HPS_CLK_CAN1_HZ
1173 CONFIG_HPS_CLK_EMAC0_HZ 1173 CONFIG_HPS_CLK_EMAC0_HZ
1174 CONFIG_HPS_CLK_EMAC1_HZ 1174 CONFIG_HPS_CLK_EMAC1_HZ
1175 CONFIG_HPS_CLK_F2S_PER_REF_HZ 1175 CONFIG_HPS_CLK_F2S_PER_REF_HZ
1176 CONFIG_HPS_CLK_F2S_SDR_REF_HZ 1176 CONFIG_HPS_CLK_F2S_SDR_REF_HZ
1177 CONFIG_HPS_CLK_GPIODB_HZ 1177 CONFIG_HPS_CLK_GPIODB_HZ
1178 CONFIG_HPS_CLK_L4_MP_HZ 1178 CONFIG_HPS_CLK_L4_MP_HZ
1179 CONFIG_HPS_CLK_L4_SP_HZ 1179 CONFIG_HPS_CLK_L4_SP_HZ
1180 CONFIG_HPS_CLK_MAINVCO_HZ 1180 CONFIG_HPS_CLK_MAINVCO_HZ
1181 CONFIG_HPS_CLK_NAND_HZ 1181 CONFIG_HPS_CLK_NAND_HZ
1182 CONFIG_HPS_CLK_OSC1_HZ 1182 CONFIG_HPS_CLK_OSC1_HZ
1183 CONFIG_HPS_CLK_OSC2_HZ 1183 CONFIG_HPS_CLK_OSC2_HZ
1184 CONFIG_HPS_CLK_PERVCO_HZ 1184 CONFIG_HPS_CLK_PERVCO_HZ
1185 CONFIG_HPS_CLK_QSPI_HZ 1185 CONFIG_HPS_CLK_QSPI_HZ
1186 CONFIG_HPS_CLK_SDMMC_HZ 1186 CONFIG_HPS_CLK_SDMMC_HZ
1187 CONFIG_HPS_CLK_SDRVCO_HZ 1187 CONFIG_HPS_CLK_SDRVCO_HZ
1188 CONFIG_HPS_CLK_SPIM_HZ 1188 CONFIG_HPS_CLK_SPIM_HZ
1189 CONFIG_HPS_CLK_USBCLK_HZ 1189 CONFIG_HPS_CLK_USBCLK_HZ
1190 CONFIG_HPS_DBCTRL_STAYOSC1 1190 CONFIG_HPS_DBCTRL_STAYOSC1
1191 CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH 1191 CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH
1192 CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH 1192 CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH
1193 CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH 1193 CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH
1194 CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH 1194 CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
1195 CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT 1195 CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT
1196 CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT 1196 CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT
1197 CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK 1197 CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK
1198 CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK 1198 CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK
1199 CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP 1199 CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP
1200 CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP 1200 CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP
1201 CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT 1201 CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT
1202 CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK 1202 CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK
1203 CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK 1203 CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK
1204 CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK 1204 CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK
1205 CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK 1205 CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK
1206 CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT 1206 CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT
1207 CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT 1207 CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT
1208 CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT 1208 CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT
1209 CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK 1209 CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK
1210 CONFIG_HPS_MAINPLLGRP_VCO_DENOM 1210 CONFIG_HPS_MAINPLLGRP_VCO_DENOM
1211 CONFIG_HPS_MAINPLLGRP_VCO_NUMER 1211 CONFIG_HPS_MAINPLLGRP_VCO_NUMER
1212 CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK 1212 CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK
1213 CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK 1213 CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK
1214 CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK 1214 CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK
1215 CONFIG_HPS_PERPLLGRP_DIV_USBCLK 1215 CONFIG_HPS_PERPLLGRP_DIV_USBCLK
1216 CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT 1216 CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT
1217 CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT 1217 CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT
1218 CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK 1218 CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK
1219 CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT 1219 CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT
1220 CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT 1220 CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT
1221 CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT 1221 CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT
1222 CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT 1222 CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT
1223 CONFIG_HPS_PERPLLGRP_SRC_NAND 1223 CONFIG_HPS_PERPLLGRP_SRC_NAND
1224 CONFIG_HPS_PERPLLGRP_SRC_QSPI 1224 CONFIG_HPS_PERPLLGRP_SRC_QSPI
1225 CONFIG_HPS_PERPLLGRP_SRC_SDMMC 1225 CONFIG_HPS_PERPLLGRP_SRC_SDMMC
1226 CONFIG_HPS_PERPLLGRP_VCO_DENOM 1226 CONFIG_HPS_PERPLLGRP_VCO_DENOM
1227 CONFIG_HPS_PERPLLGRP_VCO_NUMER 1227 CONFIG_HPS_PERPLLGRP_VCO_NUMER
1228 CONFIG_HPS_PERPLLGRP_VCO_PSRC 1228 CONFIG_HPS_PERPLLGRP_VCO_PSRC
1229 CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT 1229 CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT
1230 CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE 1230 CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE
1231 CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT 1231 CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT
1232 CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE 1232 CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE
1233 CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT 1233 CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT
1234 CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE 1234 CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE
1235 CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT 1235 CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT
1236 CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE 1236 CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE
1237 CONFIG_HPS_SDRPLLGRP_VCO_DENOM 1237 CONFIG_HPS_SDRPLLGRP_VCO_DENOM
1238 CONFIG_HPS_SDRPLLGRP_VCO_NUMER 1238 CONFIG_HPS_SDRPLLGRP_VCO_NUMER
1239 CONFIG_HPS_SDRPLLGRP_VCO_SSRC 1239 CONFIG_HPS_SDRPLLGRP_VCO_SSRC
1240 CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR 1240 CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR
1241 CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP 1241 CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP
1242 CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH 1242 CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH
1243 CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP 1243 CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP
1244 CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER 1244 CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER
1245 CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN 1245 CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN
1246 CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN 1246 CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN
1247 CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN 1247 CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN
1248 CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL 1248 CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL
1249 CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE 1249 CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE
1250 CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS 1250 CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS
1251 CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN 1251 CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN
1252 CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT 1252 CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT
1253 CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH 1253 CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH
1254 CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS 1254 CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS
1255 CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS 1255 CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS
1256 CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS 1256 CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS
1257 CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS 1257 CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS
1258 CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH 1258 CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH
1259 CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH 1259 CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH
1260 CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN 1260 CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN
1261 CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ 1261 CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ
1262 CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE 1262 CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE
1263 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL 1263 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL
1264 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL 1264 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL
1265 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL 1265 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL
1266 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW 1266 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW
1267 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC 1267 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC
1268 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD 1268 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD
1269 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD 1269 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD
1270 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI 1270 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI
1271 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP 1271 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP
1272 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR 1272 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR
1273 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR 1273 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR
1274 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD 1274 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD
1275 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD 1275 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD
1276 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS 1276 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS
1277 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC 1277 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC
1278 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP 1278 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP
1279 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT 1279 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT
1280 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT 1280 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT
1281 CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC 1281 CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC
1282 CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE 1282 CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE
1283 CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST 1283 CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST
1284 CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_COMMAND_PORT_USED 1284 CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_COMMAND_PORT_USED
1285 CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_READ_PORT_USED 1285 CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_READ_PORT_USED
1286 CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_WRITE_PORT_USED 1286 CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_WRITE_PORT_USED
1287 CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK 1287 CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK
1288 CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES 1288 CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES
1289 CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES 1289 CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES
1290 CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0 1290 CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0
1291 CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32 1291 CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32
1292 CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0 1292 CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0
1293 CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4 1293 CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4
1294 CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36 1294 CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36
1295 CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY 1295 CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY
1296 CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0 1296 CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0
1297 CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32 1297 CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32
1298 CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64 1298 CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64
1299 CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0 1299 CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0
1300 CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32 1300 CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32
1301 CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0 1301 CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0
1302 CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14 1302 CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14
1303 CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46 1303 CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46
1304 CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0 1304 CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0
1305 CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN 1305 CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN
1306 CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP 1306 CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP
1307 CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL 1307 CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL
1308 CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA 1308 CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA
1309 CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP 1309 CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP
1310 CONFIG_HP_CLK_FREQ 1310 CONFIG_HP_CLK_FREQ
1311 CONFIG_HRCON 1311 CONFIG_HRCON
1312 CONFIG_HRCON_DH 1312 CONFIG_HRCON_DH
1313 CONFIG_HRCON_FANS 1313 CONFIG_HRCON_FANS
1314 CONFIG_HSMMC2_8BIT 1314 CONFIG_HSMMC2_8BIT
1315 CONFIG_HUSH_INIT_VAR 1315 CONFIG_HUSH_INIT_VAR
1316 CONFIG_HVBOOT 1316 CONFIG_HVBOOT
1317 CONFIG_HWCONFIG 1317 CONFIG_HWCONFIG
1318 CONFIG_HW_ENV_SETTINGS 1318 CONFIG_HW_ENV_SETTINGS
1319 CONFIG_HW_WATCHDOG 1319 CONFIG_HW_WATCHDOG
1320 CONFIG_HW_WATCHDOG_TIMEOUT_MS 1320 CONFIG_HW_WATCHDOG_TIMEOUT_MS
1321 CONFIG_I2C 1321 CONFIG_I2C
1322 CONFIG_I2CFAST 1322 CONFIG_I2CFAST
1323 CONFIG_I2C_CHIPADDRESS 1323 CONFIG_I2C_CHIPADDRESS
1324 CONFIG_I2C_CMD_TREE 1324 CONFIG_I2C_CMD_TREE
1325 CONFIG_I2C_ENV_EEPROM_BUS 1325 CONFIG_I2C_ENV_EEPROM_BUS
1326 CONFIG_I2C_FPGA 1326 CONFIG_I2C_FPGA
1327 CONFIG_I2C_GSC 1327 CONFIG_I2C_GSC
1328 CONFIG_I2C_MAC_OFFSET 1328 CONFIG_I2C_MAC_OFFSET
1329 CONFIG_I2C_MBB_TIMEOUT 1329 CONFIG_I2C_MBB_TIMEOUT
1330 CONFIG_I2C_MULTI_BUS 1330 CONFIG_I2C_MULTI_BUS
1331 CONFIG_I2C_MV 1331 CONFIG_I2C_MV
1332 CONFIG_I2C_MVTWSI 1332 CONFIG_I2C_MVTWSI
1333 CONFIG_I2C_MVTWSI_BASE 1333 CONFIG_I2C_MVTWSI_BASE
1334 CONFIG_I2C_MVTWSI_BASE0 1334 CONFIG_I2C_MVTWSI_BASE0
1335 CONFIG_I2C_MVTWSI_BASE1 1335 CONFIG_I2C_MVTWSI_BASE1
1336 CONFIG_I2C_MVTWSI_BASE2 1336 CONFIG_I2C_MVTWSI_BASE2
1337 CONFIG_I2C_MVTWSI_BASE3 1337 CONFIG_I2C_MVTWSI_BASE3
1338 CONFIG_I2C_MVTWSI_BASE4 1338 CONFIG_I2C_MVTWSI_BASE4
1339 CONFIG_I2C_MVTWSI_BASE5 1339 CONFIG_I2C_MVTWSI_BASE5
1340 CONFIG_I2C_MXC 1340 CONFIG_I2C_MXC
1341 CONFIG_I2C_REPEATED_START 1341 CONFIG_I2C_REPEATED_START
1342 CONFIG_I2C_RTC_ADDR 1342 CONFIG_I2C_RTC_ADDR
1343 CONFIG_I2C_TIMEOUT 1343 CONFIG_I2C_TIMEOUT
1344 CONFIG_IBM_EMAC4_V4 1344 CONFIG_IBM_EMAC4_V4
1345 CONFIG_ICACHE 1345 CONFIG_ICACHE
1346 CONFIG_ICON 1346 CONFIG_ICON
1347 CONFIG_ICS307_REFCLK_HZ 1347 CONFIG_ICS307_REFCLK_HZ
1348 CONFIG_IDE_8xx_DIRECT 1348 CONFIG_IDE_8xx_DIRECT
1349 CONFIG_IDE_8xx_PCCARD 1349 CONFIG_IDE_8xx_PCCARD
1350 CONFIG_IDE_INIT_POSTRESET 1350 CONFIG_IDE_INIT_POSTRESET
1351 CONFIG_IDE_LED 1351 CONFIG_IDE_LED
1352 CONFIG_IDE_PCMCIA 1352 CONFIG_IDE_PCMCIA
1353 CONFIG_IDE_PREINIT 1353 CONFIG_IDE_PREINIT
1354 CONFIG_IDE_REG_CS 1354 CONFIG_IDE_REG_CS
1355 CONFIG_IDE_RESET 1355 CONFIG_IDE_RESET
1356 CONFIG_IDE_RESET_ROUTINE 1356 CONFIG_IDE_RESET_ROUTINE
1357 CONFIG_IDE_SIL680 1357 CONFIG_IDE_SIL680
1358 CONFIG_IDE_SWAP_IO 1358 CONFIG_IDE_SWAP_IO
1359 CONFIG_IDS8313 1359 CONFIG_IDS8313
1360 CONFIG_IDT8T49N222A 1360 CONFIG_IDT8T49N222A
1361 CONFIG_ID_EEPROM 1361 CONFIG_ID_EEPROM
1362 CONFIG_IFM_DEFAULT_ENV_NEW 1362 CONFIG_IFM_DEFAULT_ENV_NEW
1363 CONFIG_IFM_DEFAULT_ENV_OLD 1363 CONFIG_IFM_DEFAULT_ENV_OLD
1364 CONFIG_IFM_DEFAULT_ENV_SETTINGS 1364 CONFIG_IFM_DEFAULT_ENV_SETTINGS
1365 CONFIG_IFM_SENSOR_TYPE 1365 CONFIG_IFM_SENSOR_TYPE
1366 CONFIG_IMA 1366 CONFIG_IMA
1367 CONFIG_IMAGE_FORMAT_LEGACY 1367 CONFIG_IMAGE_FORMAT_LEGACY
1368 CONFIG_IMX 1368 CONFIG_IMX
1369 CONFIG_IMX6_PWM_PER_CLK 1369 CONFIG_IMX6_PWM_PER_CLK
1370 CONFIG_IMX_HDMI 1370 CONFIG_IMX_HDMI
1371 CONFIG_IMX_NAND 1371 CONFIG_IMX_NAND
1372 CONFIG_IMX_OTP 1372 CONFIG_IMX_OTP
1373 CONFIG_IMX_VIDEO_SKIP 1373 CONFIG_IMX_VIDEO_SKIP
1374 CONFIG_IMX_WATCHDOG 1374 CONFIG_IMX_WATCHDOG
1375 CONFIG_INETSPACE_V2 1375 CONFIG_INETSPACE_V2
1376 CONFIG_INITRD_TAG 1376 CONFIG_INITRD_TAG
1377 CONFIG_INIT_CRITICAL 1377 CONFIG_INIT_CRITICAL
1378 CONFIG_INIT_IGNORE_ERROR 1378 CONFIG_INIT_IGNORE_ERROR
1379 CONFIG_INIT_TLB 1379 CONFIG_INIT_TLB
1380 CONFIG_INI_ALLOW_MULTILINE 1380 CONFIG_INI_ALLOW_MULTILINE
1381 CONFIG_INI_CASE_INSENSITIVE 1381 CONFIG_INI_CASE_INSENSITIVE
1382 CONFIG_INI_MAX_LINE 1382 CONFIG_INI_MAX_LINE
1383 CONFIG_INI_MAX_NAME 1383 CONFIG_INI_MAX_NAME
1384 CONFIG_INI_MAX_SECTION 1384 CONFIG_INI_MAX_SECTION
1385 CONFIG_INKA4X0 1385 CONFIG_INKA4X0
1386 CONFIG_INTEGRITY 1386 CONFIG_INTEGRITY
1387 CONFIG_INTEL_ICH6_GPIO 1387 CONFIG_INTEL_ICH6_GPIO
1388 CONFIG_INTERRUPTS 1388 CONFIG_INTERRUPTS
1389 CONFIG_INTIB 1389 CONFIG_INTIB
1390 CONFIG_IO 1390 CONFIG_IO
1391 CONFIG_IO64 1391 CONFIG_IO64
1392 CONFIG_IOCON 1392 CONFIG_IOCON
1393 CONFIG_IODELAY_RECALIBRATION 1393 CONFIG_IODELAY_RECALIBRATION
1394 CONFIG_IOMUX_LPSR 1394 CONFIG_IOMUX_LPSR
1395 CONFIG_IOMUX_SHARE_CONF_REG 1395 CONFIG_IOMUX_SHARE_CONF_REG
1396 CONFIG_IOS 1396 CONFIG_IOS
1397 CONFIG_IO_TRACE 1397 CONFIG_IO_TRACE
1398 CONFIG_IP86x 1398 CONFIG_IP86x
1399 CONFIG_IPADDR 1399 CONFIG_IPADDR
1400 CONFIG_IPADDR1 1400 CONFIG_IPADDR1
1401 CONFIG_IPADDR2 1401 CONFIG_IPADDR2
1402 CONFIG_IPAM390_GPIO_BOOTMODE 1402 CONFIG_IPAM390_GPIO_BOOTMODE
1403 CONFIG_IPAM390_GPIO_LED_GREEN 1403 CONFIG_IPAM390_GPIO_LED_GREEN
1404 CONFIG_IPAM390_GPIO_LED_RED 1404 CONFIG_IPAM390_GPIO_LED_RED
1405 CONFIG_IPEK01 1405 CONFIG_IPEK01
1406 CONFIG_IPROC 1406 CONFIG_IPROC
1407 CONFIG_IPUV3_CLK 1407 CONFIG_IPUV3_CLK
1408 CONFIG_IP_DEFRAG 1408 CONFIG_IP_DEFRAG
1409 CONFIG_IRAM_BASE 1409 CONFIG_IRAM_BASE
1410 CONFIG_IRAM_END 1410 CONFIG_IRAM_END
1411 CONFIG_IRAM_SIZE 1411 CONFIG_IRAM_SIZE
1412 CONFIG_IRAM_STACK 1412 CONFIG_IRAM_STACK
1413 CONFIG_IRAM_TOP 1413 CONFIG_IRAM_TOP
1414 CONFIG_IRDA_BASE 1414 CONFIG_IRDA_BASE
1415 CONFIG_ISP1362_USB 1415 CONFIG_ISP1362_USB
1416 CONFIG_IS_BUILTIN 1416 CONFIG_IS_BUILTIN
1417 CONFIG_IS_ENABLED 1417 CONFIG_IS_ENABLED
1418 CONFIG_IS_INVALID 1418 CONFIG_IS_INVALID
1419 CONFIG_IS_MODULE 1419 CONFIG_IS_MODULE
1420 CONFIG_IS_VALID 1420 CONFIG_IS_VALID
1421 CONFIG_IVMS8 1421 CONFIG_IVMS8
1422 CONFIG_JFFS2_CMDLINE 1422 CONFIG_JFFS2_CMDLINE
1423 CONFIG_JFFS2_DEV 1423 CONFIG_JFFS2_DEV
1424 CONFIG_JFFS2_LZO 1424 CONFIG_JFFS2_LZO
1425 CONFIG_JFFS2_NAND 1425 CONFIG_JFFS2_NAND
1426 CONFIG_JFFS2_PART_OFFSET 1426 CONFIG_JFFS2_PART_OFFSET
1427 CONFIG_JFFS2_PART_SIZE 1427 CONFIG_JFFS2_PART_SIZE
1428 CONFIG_JFFS2_SUMMARY 1428 CONFIG_JFFS2_SUMMARY
1429 CONFIG_JRSTARTR_JR0 1429 CONFIG_JRSTARTR_JR0
1430 CONFIG_JTAG_CONSOLE 1430 CONFIG_JTAG_CONSOLE
1431 CONFIG_JUPITER 1431 CONFIG_JUPITER
1432 CONFIG_KASAN 1432 CONFIG_KASAN
1433 CONFIG_KATMAI 1433 CONFIG_KATMAI
1434 CONFIG_KCLK_DIS 1434 CONFIG_KCLK_DIS
1435 CONFIG_KEEP_SERVERADDR 1435 CONFIG_KEEP_SERVERADDR
1436 CONFIG_KERNEL_OFFSET 1436 CONFIG_KERNEL_OFFSET
1437 CONFIG_KEYBOARD 1437 CONFIG_KEYBOARD
1438 CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE 1438 CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE
1439 CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE 1439 CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE
1440 CONFIG_KEYSTONE_RBL_NAND 1440 CONFIG_KEYSTONE_RBL_NAND
1441 CONFIG_KEY_REVOCATION 1441 CONFIG_KEY_REVOCATION
1442 CONFIG_KGDB_BAUDRATE 1442 CONFIG_KGDB_BAUDRATE
1443 CONFIG_KGDB_EXTC_PINSEL 1443 CONFIG_KGDB_EXTC_PINSEL
1444 CONFIG_KGDB_EXTC_RATE 1444 CONFIG_KGDB_EXTC_RATE
1445 CONFIG_KGDB_INDEX 1445 CONFIG_KGDB_INDEX
1446 CONFIG_KGDB_ON_SCC 1446 CONFIG_KGDB_ON_SCC
1447 CONFIG_KGDB_ON_SMC 1447 CONFIG_KGDB_ON_SMC
1448 CONFIG_KGDB_SER_INDEX 1448 CONFIG_KGDB_SER_INDEX
1449 CONFIG_KILAUEA 1449 CONFIG_KILAUEA
1450 CONFIG_KIRKWOOD_EGIGA_INIT 1450 CONFIG_KIRKWOOD_EGIGA_INIT
1451 CONFIG_KIRKWOOD_GPIO 1451 CONFIG_KIRKWOOD_GPIO
1452 CONFIG_KIRKWOOD_PCIE_INIT 1452 CONFIG_KIRKWOOD_PCIE_INIT
1453 CONFIG_KIRKWOOD_RGMII_PAD_1V8 1453 CONFIG_KIRKWOOD_RGMII_PAD_1V8
1454 CONFIG_KIRKWOOD_SPI 1454 CONFIG_KIRKWOOD_SPI
1455 CONFIG_KIRQ_EN 1455 CONFIG_KIRQ_EN
1456 CONFIG_KM8321 1456 CONFIG_KM8321
1457 CONFIG_KM8XX 1457 CONFIG_KM8XX
1458 CONFIG_KMCOGE4 1458 CONFIG_KMCOGE4
1459 CONFIG_KMCOGE5NE 1459 CONFIG_KMCOGE5NE
1460 CONFIG_KMETER1 1460 CONFIG_KMETER1
1461 CONFIG_KMLION1 1461 CONFIG_KMLION1
1462 CONFIG_KMOPTI2 1462 CONFIG_KMOPTI2
1463 CONFIG_KMP204X 1463 CONFIG_KMP204X
1464 CONFIG_KMSUPX5 1464 CONFIG_KMSUPX5
1465 CONFIG_KMTEGR1 1465 CONFIG_KMTEGR1
1466 CONFIG_KMTEPR2 1466 CONFIG_KMTEPR2
1467 CONFIG_KMVECT1 1467 CONFIG_KMVECT1
1468 CONFIG_KM_82XX 1468 CONFIG_KM_82XX
1469 CONFIG_KM_BOARD_EXTRA_ENV 1469 CONFIG_KM_BOARD_EXTRA_ENV
1470 CONFIG_KM_BOARD_NAME 1470 CONFIG_KM_BOARD_NAME
1471 CONFIG_KM_COGE5UN 1471 CONFIG_KM_COGE5UN
1472 CONFIG_KM_COMMON_ETH_INIT 1472 CONFIG_KM_COMMON_ETH_INIT
1473 CONFIG_KM_CONSOLE_TTY 1473 CONFIG_KM_CONSOLE_TTY
1474 CONFIG_KM_CRAMFS_ADDR 1474 CONFIG_KM_CRAMFS_ADDR
1475 CONFIG_KM_DEF_ARCH 1475 CONFIG_KM_DEF_ARCH
1476 CONFIG_KM_DEF_BOOT_ARGS_CPU 1476 CONFIG_KM_DEF_BOOT_ARGS_CPU
1477 CONFIG_KM_DEF_ENV 1477 CONFIG_KM_DEF_ENV
1478 CONFIG_KM_DEF_ENV_BOOTARGS 1478 CONFIG_KM_DEF_ENV_BOOTARGS
1479 CONFIG_KM_DEF_ENV_BOOTPARAMS 1479 CONFIG_KM_DEF_ENV_BOOTPARAMS
1480 CONFIG_KM_DEF_ENV_BOOTTARGETS 1480 CONFIG_KM_DEF_ENV_BOOTTARGETS
1481 CONFIG_KM_DEF_ENV_CONSTANTS 1481 CONFIG_KM_DEF_ENV_CONSTANTS
1482 CONFIG_KM_DEF_ENV_CPU 1482 CONFIG_KM_DEF_ENV_CPU
1483 CONFIG_KM_DEF_ENV_FLASH_BOOT 1483 CONFIG_KM_DEF_ENV_FLASH_BOOT
1484 CONFIG_KM_DEF_NETDEV 1484 CONFIG_KM_DEF_NETDEV
1485 CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI 1485 CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI
1486 CONFIG_KM_DISABLE_PCI 1486 CONFIG_KM_DISABLE_PCI
1487 CONFIG_KM_DISABLE_PCIE 1487 CONFIG_KM_DISABLE_PCIE
1488 CONFIG_KM_ECC_MODE 1488 CONFIG_KM_ECC_MODE
1489 CONFIG_KM_ENV_IS_IN_SPI_NOR 1489 CONFIG_KM_ENV_IS_IN_SPI_NOR
1490 CONFIG_KM_FDT_ADDR 1490 CONFIG_KM_FDT_ADDR
1491 CONFIG_KM_FPGA_CONFIG 1491 CONFIG_KM_FPGA_CONFIG
1492 CONFIG_KM_I2C_ABORT 1492 CONFIG_KM_I2C_ABORT
1493 CONFIG_KM_IVM_BUS 1493 CONFIG_KM_IVM_BUS
1494 CONFIG_KM_KERNEL_ADDR 1494 CONFIG_KM_KERNEL_ADDR
1495 CONFIG_KM_KIRKWOOD 1495 CONFIG_KM_KIRKWOOD
1496 CONFIG_KM_KIRKWOOD_128M16 1496 CONFIG_KM_KIRKWOOD_128M16
1497 CONFIG_KM_KIRKWOOD_PCI 1497 CONFIG_KM_KIRKWOOD_PCI
1498 CONFIG_KM_MGCOGE3UN 1498 CONFIG_KM_MGCOGE3UN
1499 CONFIG_KM_MVEXTSW_ADDR 1499 CONFIG_KM_MVEXTSW_ADDR
1500 CONFIG_KM_NEW_ENV 1500 CONFIG_KM_NEW_ENV
1501 CONFIG_KM_NUSA 1501 CONFIG_KM_NUSA
1502 CONFIG_KM_PHRAM 1502 CONFIG_KM_PHRAM
1503 CONFIG_KM_PIGGY4_88E6061 1503 CONFIG_KM_PIGGY4_88E6061
1504 CONFIG_KM_PIGGY4_88E6352 1504 CONFIG_KM_PIGGY4_88E6352
1505 CONFIG_KM_PNVRAM 1505 CONFIG_KM_PNVRAM
1506 CONFIG_KM_PORTL2 1506 CONFIG_KM_PORTL2
1507 CONFIG_KM_RESERVED_PRAM 1507 CONFIG_KM_RESERVED_PRAM
1508 CONFIG_KM_ROOTFSSIZE 1508 CONFIG_KM_ROOTFSSIZE
1509 CONFIG_KM_SUGP1 1509 CONFIG_KM_SUGP1
1510 CONFIG_KM_SUV31 1510 CONFIG_KM_SUV31
1511 CONFIG_KM_UBI_LINUX_MTD 1511 CONFIG_KM_UBI_LINUX_MTD
1512 CONFIG_KM_UBI_PARTITION_NAME_APP 1512 CONFIG_KM_UBI_PARTITION_NAME_APP
1513 CONFIG_KM_UBI_PARTITION_NAME_BOOT 1513 CONFIG_KM_UBI_PARTITION_NAME_BOOT
1514 CONFIG_KM_UBI_PART_BOOT_OPTS 1514 CONFIG_KM_UBI_PART_BOOT_OPTS
1515 CONFIG_KM_UIMAGE_NAME 1515 CONFIG_KM_UIMAGE_NAME
1516 CONFIG_KM_UPDATE_UBOOT 1516 CONFIG_KM_UPDATE_UBOOT
1517 CONFIG_KONA 1517 CONFIG_KONA
1518 CONFIG_KONA_GPIO 1518 CONFIG_KONA_GPIO
1519 CONFIG_KONA_RESET_S 1519 CONFIG_KONA_RESET_S
1520 CONFIG_KPROBES 1520 CONFIG_KPROBES
1521 CONFIG_KS8851_MLL 1521 CONFIG_KS8851_MLL
1522 CONFIG_KS8851_MLL_BASEADDR 1522 CONFIG_KS8851_MLL_BASEADDR
1523 CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE 1523 CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE
1524 CONFIG_KSNAV_NETCP_PDMA_RX_BASE 1524 CONFIG_KSNAV_NETCP_PDMA_RX_BASE
1525 CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM 1525 CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM
1526 CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE 1526 CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE
1527 CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM 1527 CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM
1528 CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE 1528 CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE
1529 CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE 1529 CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE
1530 CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE 1530 CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE
1531 CONFIG_KSNAV_NETCP_PDMA_TX_BASE 1531 CONFIG_KSNAV_NETCP_PDMA_TX_BASE
1532 CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM 1532 CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM
1533 CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE 1533 CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE
1534 CONFIG_KSNAV_PKTDMA_NETCP 1534 CONFIG_KSNAV_PKTDMA_NETCP
1535 CONFIG_KSNAV_QM_BASE_ADDRESS 1535 CONFIG_KSNAV_QM_BASE_ADDRESS
1536 CONFIG_KSNAV_QM_CONF_BASE 1536 CONFIG_KSNAV_QM_CONF_BASE
1537 CONFIG_KSNAV_QM_DESC_SETUP_BASE 1537 CONFIG_KSNAV_QM_DESC_SETUP_BASE
1538 CONFIG_KSNAV_QM_INTD_CONF_BASE 1538 CONFIG_KSNAV_QM_INTD_CONF_BASE
1539 CONFIG_KSNAV_QM_LINK_RAM_BASE 1539 CONFIG_KSNAV_QM_LINK_RAM_BASE
1540 CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE 1540 CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE
1541 CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE 1541 CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE
1542 CONFIG_KSNAV_QM_PDSP1_CMD_BASE 1542 CONFIG_KSNAV_QM_PDSP1_CMD_BASE
1543 CONFIG_KSNAV_QM_PDSP1_CTRL_BASE 1543 CONFIG_KSNAV_QM_PDSP1_CTRL_BASE
1544 CONFIG_KSNAV_QM_PDSP1_IRAM_BASE 1544 CONFIG_KSNAV_QM_PDSP1_IRAM_BASE
1545 CONFIG_KSNAV_QM_QPOOL_NUM 1545 CONFIG_KSNAV_QM_QPOOL_NUM
1546 CONFIG_KSNAV_QM_QUEUE_STATUS_BASE 1546 CONFIG_KSNAV_QM_QUEUE_STATUS_BASE
1547 CONFIG_KSNAV_QM_REGION_NUM 1547 CONFIG_KSNAV_QM_REGION_NUM
1548 CONFIG_KSNAV_QM_STATUS_RAM_BASE 1548 CONFIG_KSNAV_QM_STATUS_RAM_BASE
1549 CONFIG_KSNET_CPSW_NUM_PORTS 1549 CONFIG_KSNET_CPSW_NUM_PORTS
1550 CONFIG_KSNET_MAC_ID_BASE 1550 CONFIG_KSNET_MAC_ID_BASE
1551 CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE 1551 CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
1552 CONFIG_KSNET_NETCP_BASE 1552 CONFIG_KSNET_NETCP_BASE
1553 CONFIG_KSNET_NETCP_V1_0 1553 CONFIG_KSNET_NETCP_V1_0
1554 CONFIG_KSNET_NETCP_V1_5 1554 CONFIG_KSNET_NETCP_V1_5
1555 CONFIG_KSNET_SERDES_LANES_PER_SGMII 1555 CONFIG_KSNET_SERDES_LANES_PER_SGMII
1556 CONFIG_KSNET_SERDES_SGMII2_BASE 1556 CONFIG_KSNET_SERDES_SGMII2_BASE
1557 CONFIG_KSNET_SERDES_SGMII_BASE 1557 CONFIG_KSNET_SERDES_SGMII_BASE
1558 CONFIG_KVM_GUEST 1558 CONFIG_KVM_GUEST
1559 CONFIG_KW88F6192 1559 CONFIG_KW88F6192
1560 CONFIG_KW88F6281 1560 CONFIG_KW88F6281
1561 CONFIG_KW88F6702 1561 CONFIG_KW88F6702
1562 CONFIG_KYOCERA_KCS057QV1AJ 1562 CONFIG_KYOCERA_KCS057QV1AJ
1563 CONFIG_KZM_A9_GT 1563 CONFIG_KZM_A9_GT
1564 CONFIG_L1_INIT_RAM 1564 CONFIG_L1_INIT_RAM
1565 CONFIG_L2_CACHE 1565 CONFIG_L2_CACHE
1566 CONFIG_LAN91C96_USE_32_BIT 1566 CONFIG_LAN91C96_USE_32_BIT
1567 CONFIG_LAST_STAGE_INIT 1567 CONFIG_LAST_STAGE_INIT
1568 CONFIG_LAYERSCAPE_NS_ACCESS 1568 CONFIG_LAYERSCAPE_NS_ACCESS
1569 CONFIG_LBA48 1569 CONFIG_LBA48
1570 CONFIG_LBD 1570 CONFIG_LBD
1571 CONFIG_LBDAF 1571 CONFIG_LBDAF
1572 CONFIG_LCD_ALIGNMENT 1572 CONFIG_LCD_ALIGNMENT
1573 CONFIG_LCD_BMP_RLE8 1573 CONFIG_LCD_BMP_RLE8
1574 CONFIG_LCD_DT_SIMPLEFB 1574 CONFIG_LCD_DT_SIMPLEFB
1575 CONFIG_LCD_INFO 1575 CONFIG_LCD_INFO
1576 CONFIG_LCD_INFO_BELOW_LOGO 1576 CONFIG_LCD_INFO_BELOW_LOGO
1577 CONFIG_LCD_IN_PSRAM 1577 CONFIG_LCD_IN_PSRAM
1578 CONFIG_LCD_LOGO 1578 CONFIG_LCD_LOGO
1579 CONFIG_LCD_MENU 1579 CONFIG_LCD_MENU
1580 CONFIG_LCD_MENU_BOARD 1580 CONFIG_LCD_MENU_BOARD
1581 CONFIG_LCD_NOSTDOUT 1581 CONFIG_LCD_NOSTDOUT
1582 CONFIG_LCD_ROTATION 1582 CONFIG_LCD_ROTATION
1583 CONFIG_LD9040 1583 CONFIG_LD9040
1584 CONFIG_LEGACY 1584 CONFIG_LEGACY
1585 CONFIG_LEGACY_BOOTCMD_ENV 1585 CONFIG_LEGACY_BOOTCMD_ENV
1586 CONFIG_LG4573 1586 CONFIG_LG4573
1587 CONFIG_LG4573_BUS 1587 CONFIG_LG4573_BUS
1588 CONFIG_LG4573_CS 1588 CONFIG_LG4573_CS
1589 CONFIG_LIBATA 1589 CONFIG_LIBATA
1590 CONFIG_LIB_HW_RAND 1590 CONFIG_LIB_HW_RAND
1591 CONFIG_LIB_UUID 1591 CONFIG_LIB_UUID
1592 CONFIG_LINUX 1592 CONFIG_LINUX
1593 CONFIG_LINUX_RESET_VEC 1593 CONFIG_LINUX_RESET_VEC
1594 CONFIG_LITTLETON_LCD 1594 CONFIG_LITTLETON_LCD
1595 CONFIG_LMB 1595 CONFIG_LMB
1596 CONFIG_LMS283GF05 1596 CONFIG_LMS283GF05
1597 CONFIG_LOADADDR 1597 CONFIG_LOADADDR
1598 CONFIG_LOADCMD 1598 CONFIG_LOADCMD
1599 CONFIG_LOADS_ECHO 1599 CONFIG_LOADS_ECHO
1600 CONFIG_LOGBUFFER 1600 CONFIG_LOGBUFFER
1601 CONFIG_LOWBOOT 1601 CONFIG_LOWBOOT
1602 CONFIG_LOWPOWER_ADDR 1602 CONFIG_LOWPOWER_ADDR
1603 CONFIG_LOWPOWER_FLAG 1603 CONFIG_LOWPOWER_FLAG
1604 CONFIG_LOW_MCFCLK 1604 CONFIG_LOW_MCFCLK
1605 CONFIG_LPC32XX_ETH 1605 CONFIG_LPC32XX_ETH
1606 CONFIG_LPC32XX_ETH_BUFS_BASE 1606 CONFIG_LPC32XX_ETH_BUFS_BASE
1607 CONFIG_LPC32XX_HSUART 1607 CONFIG_LPC32XX_HSUART
1608 CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY 1608 CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY
1609 CONFIG_LPC32XX_NAND_MLC_NAND_TA 1609 CONFIG_LPC32XX_NAND_MLC_NAND_TA
1610 CONFIG_LPC32XX_NAND_MLC_RD_HIGH 1610 CONFIG_LPC32XX_NAND_MLC_RD_HIGH
1611 CONFIG_LPC32XX_NAND_MLC_RD_LOW 1611 CONFIG_LPC32XX_NAND_MLC_RD_LOW
1612 CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY 1612 CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY
1613 CONFIG_LPC32XX_NAND_MLC_WR_HIGH 1613 CONFIG_LPC32XX_NAND_MLC_WR_HIGH
1614 CONFIG_LPC32XX_NAND_MLC_WR_LOW 1614 CONFIG_LPC32XX_NAND_MLC_WR_LOW
1615 CONFIG_LPC32XX_NAND_SLC_RDR_CLKS 1615 CONFIG_LPC32XX_NAND_SLC_RDR_CLKS
1616 CONFIG_LPC32XX_NAND_SLC_RHOLD 1616 CONFIG_LPC32XX_NAND_SLC_RHOLD
1617 CONFIG_LPC32XX_NAND_SLC_RSETUP 1617 CONFIG_LPC32XX_NAND_SLC_RSETUP
1618 CONFIG_LPC32XX_NAND_SLC_RWIDTH 1618 CONFIG_LPC32XX_NAND_SLC_RWIDTH
1619 CONFIG_LPC32XX_NAND_SLC_WDR_CLKS 1619 CONFIG_LPC32XX_NAND_SLC_WDR_CLKS
1620 CONFIG_LPC32XX_NAND_SLC_WHOLD 1620 CONFIG_LPC32XX_NAND_SLC_WHOLD
1621 CONFIG_LPC32XX_NAND_SLC_WSETUP 1621 CONFIG_LPC32XX_NAND_SLC_WSETUP
1622 CONFIG_LPC32XX_NAND_SLC_WWIDTH 1622 CONFIG_LPC32XX_NAND_SLC_WWIDTH
1623 CONFIG_LPC32XX_SDRAM_ 1623 CONFIG_LPC32XX_SDRAM_
1624 CONFIG_LPC32XX_SPL 1624 CONFIG_LPC32XX_SPL
1625 CONFIG_LPC32XX_SSP 1625 CONFIG_LPC32XX_SSP
1626 CONFIG_LPC32XX_SSP_TIMEOUT 1626 CONFIG_LPC32XX_SSP_TIMEOUT
1627 CONFIG_LPC_BASE 1627 CONFIG_LPC_BASE
1628 CONFIG_LPC_IO_BASE 1628 CONFIG_LPC_IO_BASE
1629 CONFIG_LPUART 1629 CONFIG_LPUART
1630 CONFIG_LPUART_32B_REG 1630 CONFIG_LPUART_32B_REG
1631 CONFIG_LQ038J7DH53 1631 CONFIG_LQ038J7DH53
1632 CONFIG_LS102XA_STREAM_ID 1632 CONFIG_LS102XA_STREAM_ID
1633 CONFIG_LSCHLV2 1633 CONFIG_LSCHLV2
1634 CONFIG_LSXHL 1634 CONFIG_LSXHL
1635 CONFIG_LUAN 1635 CONFIG_LUAN
1636 CONFIG_LWMON5 1636 CONFIG_LWMON5
1637 CONFIG_LXT971_NO_SLEEP 1637 CONFIG_LXT971_NO_SLEEP
1638 CONFIG_LYNXKDI 1638 CONFIG_LYNXKDI
1639 CONFIG_LZMA 1639 CONFIG_LZMA
1640 CONFIG_M41T94_SPI_CS 1640 CONFIG_M41T94_SPI_CS
1641 CONFIG_M520x 1641 CONFIG_M520x
1642 CONFIG_M52277EVB 1642 CONFIG_M52277EVB
1643 CONFIG_M5253DEMO 1643 CONFIG_M5253DEMO
1644 CONFIG_M5253EVBE 1644 CONFIG_M5253EVBE
1645 CONFIG_M5275EVB 1645 CONFIG_M5275EVB
1646 CONFIG_M5301x 1646 CONFIG_M5301x
1647 CONFIG_M54418TWR 1647 CONFIG_M54418TWR
1648 CONFIG_M54451EVB 1648 CONFIG_M54451EVB
1649 CONFIG_M54455EVB 1649 CONFIG_M54455EVB
1650 CONFIG_M88E1111_DISABLE_FIBER 1650 CONFIG_M88E1111_DISABLE_FIBER
1651 CONFIG_M88E1111_PHY 1651 CONFIG_M88E1111_PHY
1652 CONFIG_M88E1112_PHY 1652 CONFIG_M88E1112_PHY
1653 CONFIG_M88E1141_PHY 1653 CONFIG_M88E1141_PHY
1654 CONFIG_MACB0_PHY 1654 CONFIG_MACB0_PHY
1655 CONFIG_MACB1_PHY 1655 CONFIG_MACB1_PHY
1656 CONFIG_MACB2_PHY 1656 CONFIG_MACB2_PHY
1657 CONFIG_MACB3_PHY 1657 CONFIG_MACB3_PHY
1658 CONFIG_MACB_SEARCH_PHY 1658 CONFIG_MACB_SEARCH_PHY
1659 CONFIG_MACH_ASPENITE 1659 CONFIG_MACH_ASPENITE
1660 CONFIG_MACH_DAVINCI_CALIMAIN 1660 CONFIG_MACH_DAVINCI_CALIMAIN
1661 CONFIG_MACH_DAVINCI_DA850_EVM 1661 CONFIG_MACH_DAVINCI_DA850_EVM
1662 CONFIG_MACH_DOCKSTAR 1662 CONFIG_MACH_DOCKSTAR
1663 CONFIG_MACH_EDMINIV2 1663 CONFIG_MACH_EDMINIV2
1664 CONFIG_MACH_GOFLEXHOME 1664 CONFIG_MACH_GOFLEXHOME
1665 CONFIG_MACH_GONI 1665 CONFIG_MACH_GONI
1666 CONFIG_MACH_GURUPLUG 1666 CONFIG_MACH_GURUPLUG
1667 CONFIG_MACH_KM_KIRKWOOD 1667 CONFIG_MACH_KM_KIRKWOOD
1668 CONFIG_MACH_OMAPL138_LCDK 1668 CONFIG_MACH_OMAPL138_LCDK
1669 CONFIG_MACH_OPENRD_BASE 1669 CONFIG_MACH_OPENRD_BASE
1670 CONFIG_MACH_SHEEVAPLUG 1670 CONFIG_MACH_SHEEVAPLUG
1671 CONFIG_MACH_SPECIFIC 1671 CONFIG_MACH_SPECIFIC
1672 CONFIG_MACH_TYPE 1672 CONFIG_MACH_TYPE
1673 CONFIG_MACH_TYPE_COMPAT_REV 1673 CONFIG_MACH_TYPE_COMPAT_REV
1674 CONFIG_MACRESET_TIMEOUT 1674 CONFIG_MACRESET_TIMEOUT
1675 CONFIG_MAC_ADDR_IN_EEPROM 1675 CONFIG_MAC_ADDR_IN_EEPROM
1676 CONFIG_MAC_ADDR_IN_SPIFLASH 1676 CONFIG_MAC_ADDR_IN_SPIFLASH
1677 CONFIG_MAC_OFFSET 1677 CONFIG_MAC_OFFSET
1678 CONFIG_MAKALU 1678 CONFIG_MAKALU
1679 CONFIG_MALLOC_F_ADDR 1679 CONFIG_MALLOC_F_ADDR
1680 CONFIG_MALTA 1680 CONFIG_MALTA
1681 CONFIG_MARCO_MEMSET 1681 CONFIG_MARCO_MEMSET
1682 CONFIG_MARUBUN_PCCARD 1682 CONFIG_MARUBUN_PCCARD
1683 CONFIG_MARVELL 1683 CONFIG_MARVELL
1684 CONFIG_MARVELL_GPIO 1684 CONFIG_MARVELL_GPIO
1685 CONFIG_MARVELL_MFP 1685 CONFIG_MARVELL_MFP
1686 CONFIG_MASK_AER_AO 1686 CONFIG_MASK_AER_AO
1687 CONFIG_MAX_DSP_CPUS 1687 CONFIG_MAX_DSP_CPUS
1688 CONFIG_MAX_FPGA_DEVICES 1688 CONFIG_MAX_FPGA_DEVICES
1689 CONFIG_MAX_MEM_MAPPED 1689 CONFIG_MAX_MEM_MAPPED
1690 CONFIG_MAX_PKT 1690 CONFIG_MAX_PKT
1691 CONFIG_MAX_RAM_BANK_SIZE 1691 CONFIG_MAX_RAM_BANK_SIZE
1692 CONFIG_MCAST_TFTP 1692 CONFIG_MCAST_TFTP
1693 CONFIG_MCF5249 1693 CONFIG_MCF5249
1694 CONFIG_MCF5253 1694 CONFIG_MCF5253
1695 CONFIG_MCFFEC 1695 CONFIG_MCFFEC
1696 CONFIG_MCFPIT 1696 CONFIG_MCFPIT
1697 CONFIG_MCFRTC 1697 CONFIG_MCFRTC
1698 CONFIG_MCFTMR 1698 CONFIG_MCFTMR
1699 CONFIG_MCFUART 1699 CONFIG_MCFUART
1700 CONFIG_MCLK_DIS 1700 CONFIG_MCLK_DIS
1701 CONFIG_MDIO_TIMEOUT 1701 CONFIG_MDIO_TIMEOUT
1702 CONFIG_MECP5123 1702 CONFIG_MECP5123
1703 CONFIG_MEMSIZE 1703 CONFIG_MEMSIZE
1704 CONFIG_MEMSIZE_IN_BYTES 1704 CONFIG_MEMSIZE_IN_BYTES
1705 CONFIG_MEMSIZE_MASK 1705 CONFIG_MEMSIZE_MASK
1706 CONFIG_MEM_HOLE_16M 1706 CONFIG_MEM_HOLE_16M
1707 CONFIG_MEM_INIT_VALUE 1707 CONFIG_MEM_INIT_VALUE
1708 CONFIG_MEM_REMAP 1708 CONFIG_MEM_REMAP
1709 CONFIG_MENUKEY 1709 CONFIG_MENUKEY
1710 CONFIG_MENUPROMPT 1710 CONFIG_MENUPROMPT
1711 CONFIG_MENU_SHOW 1711 CONFIG_MENU_SHOW
1712 CONFIG_MFG_ENV_SETTINGS 1712 CONFIG_MFG_ENV_SETTINGS
1713 CONFIG_MGCOGE 1713 CONFIG_MGCOGE
1714 CONFIG_MGCOGE3NE 1714 CONFIG_MGCOGE3NE
1715 CONFIG_MIGO_R 1715 CONFIG_MIGO_R
1716 CONFIG_MII 1716 CONFIG_MII
1717 CONFIG_MIIM_ADDRESS 1717 CONFIG_MIIM_ADDRESS
1718 CONFIG_MII_DEFAULT_TSEC 1718 CONFIG_MII_DEFAULT_TSEC
1719 CONFIG_MII_INIT 1719 CONFIG_MII_INIT
1720 CONFIG_MII_SUPPRESS_PREAMBLE 1720 CONFIG_MII_SUPPRESS_PREAMBLE
1721 CONFIG_MINIFAP 1721 CONFIG_MINIFAP
1722 CONFIG_MIPS_HUGE_TLB_SUPPORT 1722 CONFIG_MIPS_HUGE_TLB_SUPPORT
1723 CONFIG_MIPS_MT_FPAFF 1723 CONFIG_MIPS_MT_FPAFF
1724 CONFIG_MIRQ_EN 1724 CONFIG_MIRQ_EN
1725 CONFIG_MISC_COMMON 1725 CONFIG_MISC_COMMON
1726 CONFIG_MISC_INIT_F 1726 CONFIG_MISC_INIT_F
1727 CONFIG_MISC_INIT_R 1727 CONFIG_MISC_INIT_R
1728 CONFIG_MIU_1BIT_INTERLEAVED 1728 CONFIG_MIU_1BIT_INTERLEAVED
1729 CONFIG_MIU_2BIT_21_7_INTERLEAVED 1729 CONFIG_MIU_2BIT_21_7_INTERLEAVED
1730 CONFIG_MIU_2BIT_INTERLEAVED 1730 CONFIG_MIU_2BIT_INTERLEAVED
1731 CONFIG_MIU_LINEAR 1731 CONFIG_MIU_LINEAR
1732 CONFIG_MK_edb9301 1732 CONFIG_MK_edb9301
1733 CONFIG_MK_edb9315a 1733 CONFIG_MK_edb9315a
1734 CONFIG_MMCBOOTCOMMAND 1734 CONFIG_MMCBOOTCOMMAND
1735 CONFIG_MMCROOT 1735 CONFIG_MMCROOT
1736 CONFIG_MMC_DEFAULT_DEV 1736 CONFIG_MMC_DEFAULT_DEV
1737 CONFIG_MMC_RPMB_TRACE 1737 CONFIG_MMC_RPMB_TRACE
1738 CONFIG_MMC_SPI 1738 CONFIG_MMC_SPI
1739 CONFIG_MMC_SPI_BUS 1739 CONFIG_MMC_SPI_BUS
1740 CONFIG_MMC_SPI_CRC_ON 1740 CONFIG_MMC_SPI_CRC_ON
1741 CONFIG_MMC_SPI_CS 1741 CONFIG_MMC_SPI_CS
1742 CONFIG_MMC_SPI_MODE 1742 CONFIG_MMC_SPI_MODE
1743 CONFIG_MMC_SPI_SPEED 1743 CONFIG_MMC_SPI_SPEED
1744 CONFIG_MMC_SUNXI_SLOT 1744 CONFIG_MMC_SUNXI_SLOT
1745 CONFIG_MMC_TRACE 1745 CONFIG_MMC_TRACE
1746 CONFIG_MMU 1746 CONFIG_MMU
1747 CONFIG_MODVERSIONS 1747 CONFIG_MODVERSIONS
1748 CONFIG_MONITOR_IS_IN_RAM 1748 CONFIG_MONITOR_IS_IN_RAM
1749 CONFIG_MOTIONPRO 1749 CONFIG_MOTIONPRO
1750 CONFIG_MP 1750 CONFIG_MP
1751 CONFIG_MPC5121ADS 1751 CONFIG_MPC5121ADS
1752 CONFIG_MPC5121ADS_REV2 1752 CONFIG_MPC5121ADS_REV2
1753 CONFIG_MPC512x_FEC 1753 CONFIG_MPC512x_FEC
1754 CONFIG_MPC5200 1754 CONFIG_MPC5200
1755 CONFIG_MPC5200_DDR 1755 CONFIG_MPC5200_DDR
1756 CONFIG_MPC555 1756 CONFIG_MPC555
1757 CONFIG_MPC5xxx_FEC 1757 CONFIG_MPC5xxx_FEC
1758 CONFIG_MPC5xxx_FEC_MII10 1758 CONFIG_MPC5xxx_FEC_MII10
1759 CONFIG_MPC5xxx_FEC_MII100 1759 CONFIG_MPC5xxx_FEC_MII100
1760 CONFIG_MPC823 1760 CONFIG_MPC823
1761 CONFIG_MPC8247 1761 CONFIG_MPC8247
1762 CONFIG_MPC8255 1762 CONFIG_MPC8255
1763 CONFIG_MPC8272_FAMILY 1763 CONFIG_MPC8272_FAMILY
1764 CONFIG_MPC8308 1764 CONFIG_MPC8308
1765 CONFIG_MPC8308RDB 1765 CONFIG_MPC8308RDB
1766 CONFIG_MPC8308_P1M 1766 CONFIG_MPC8308_P1M
1767 CONFIG_MPC8309 1767 CONFIG_MPC8309
1768 CONFIG_MPC830x 1768 CONFIG_MPC830x
1769 CONFIG_MPC8313 1769 CONFIG_MPC8313
1770 CONFIG_MPC8313ERDB 1770 CONFIG_MPC8313ERDB
1771 CONFIG_MPC8315 1771 CONFIG_MPC8315
1772 CONFIG_MPC8315ERDB 1772 CONFIG_MPC8315ERDB
1773 CONFIG_MPC831x 1773 CONFIG_MPC831x
1774 CONFIG_MPC832XEMDS 1774 CONFIG_MPC832XEMDS
1775 CONFIG_MPC832x 1775 CONFIG_MPC832x
1776 CONFIG_MPC8349 1776 CONFIG_MPC8349
1777 CONFIG_MPC8349EMDS 1777 CONFIG_MPC8349EMDS
1778 CONFIG_MPC8349ITX 1778 CONFIG_MPC8349ITX
1779 CONFIG_MPC8349ITXGP 1779 CONFIG_MPC8349ITXGP
1780 CONFIG_MPC834x 1780 CONFIG_MPC834x
1781 CONFIG_MPC8360 1781 CONFIG_MPC8360
1782 CONFIG_MPC837XEMDS 1782 CONFIG_MPC837XEMDS
1783 CONFIG_MPC837XERDB 1783 CONFIG_MPC837XERDB
1784 CONFIG_MPC837x 1784 CONFIG_MPC837x
1785 CONFIG_MPC83XX_GPIO 1785 CONFIG_MPC83XX_GPIO
1786 CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION 1786 CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION
1787 CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN 1787 CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN
1788 CONFIG_MPC83XX_GPIO_0_INIT_VALUE 1788 CONFIG_MPC83XX_GPIO_0_INIT_VALUE
1789 CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION 1789 CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION
1790 CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN 1790 CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN
1791 CONFIG_MPC83XX_GPIO_1_INIT_VALUE 1791 CONFIG_MPC83XX_GPIO_1_INIT_VALUE
1792 CONFIG_MPC83XX_PCI2 1792 CONFIG_MPC83XX_PCI2
1793 CONFIG_MPC850 1793 CONFIG_MPC850
1794 CONFIG_MPC855 1794 CONFIG_MPC855
1795 CONFIG_MPC857 1795 CONFIG_MPC857
1796 CONFIG_MPC85XX_FEC 1796 CONFIG_MPC85XX_FEC
1797 CONFIG_MPC85XX_FEC_NAME 1797 CONFIG_MPC85XX_FEC_NAME
1798 CONFIG_MPC85XX_PCI2 1798 CONFIG_MPC85XX_PCI2
1799 CONFIG_MPC860 1799 CONFIG_MPC860
1800 CONFIG_MPC860T 1800 CONFIG_MPC860T
1801 CONFIG_MPC862 1801 CONFIG_MPC862
1802 CONFIG_MPC866 1802 CONFIG_MPC866
1803 CONFIG_MPC866_FAMILY 1803 CONFIG_MPC866_FAMILY
1804 CONFIG_MPC86x 1804 CONFIG_MPC86x
1805 CONFIG_MPC885 1805 CONFIG_MPC885
1806 CONFIG_MPC885_FAMILY 1806 CONFIG_MPC885_FAMILY
1807 CONFIG_MPC8XXX_SPI 1807 CONFIG_MPC8XXX_SPI
1808 CONFIG_MPC8XX_LCD 1808 CONFIG_MPC8XX_LCD
1809 CONFIG_MPC8xxx_DISABLE_BPTR 1809 CONFIG_MPC8xxx_DISABLE_BPTR
1810 CONFIG_MPLL_FREQ 1810 CONFIG_MPLL_FREQ
1811 CONFIG_MPR2 1811 CONFIG_MPR2
1812 CONFIG_MPX5200 1812 CONFIG_MPX5200
1813 CONFIG_MP_CLK_FREQ 1813 CONFIG_MP_CLK_FREQ
1814 CONFIG_MS7720SE 1814 CONFIG_MS7720SE
1815 CONFIG_MS7722SE 1815 CONFIG_MS7722SE
1816 CONFIG_MS7750SE 1816 CONFIG_MS7750SE
1817 CONFIG_MSHC_FREQ 1817 CONFIG_MSHC_FREQ
1818 CONFIG_MTDMAP 1818 CONFIG_MTDMAP
1819 CONFIG_MTDPARTS 1819 CONFIG_MTDPARTS
1820 CONFIG_MTD_CONCAT 1820 CONFIG_MTD_CONCAT
1821 CONFIG_MTD_DEBUG 1821 CONFIG_MTD_DEBUG
1822 CONFIG_MTD_DEBUG_VERBOSE 1822 CONFIG_MTD_DEBUG_VERBOSE
1823 CONFIG_MTD_DEVICE 1823 CONFIG_MTD_DEVICE
1824 CONFIG_MTD_ECC_SOFT 1824 CONFIG_MTD_ECC_SOFT
1825 CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR 1825 CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR
1826 CONFIG_MTD_NAND_ECC_SMC 1826 CONFIG_MTD_NAND_ECC_SMC
1827 CONFIG_MTD_NAND_MUSEUM_IDS 1827 CONFIG_MTD_NAND_MUSEUM_IDS
1828 CONFIG_MTD_NAND_VERIFY_WRITE 1828 CONFIG_MTD_NAND_VERIFY_WRITE
1829 CONFIG_MTD_ONENAND_VERIFY_WRITE 1829 CONFIG_MTD_ONENAND_VERIFY_WRITE
1830 CONFIG_MTD_PARTITION 1830 CONFIG_MTD_PARTITION
1831 CONFIG_MTD_PARTITIONS 1831 CONFIG_MTD_PARTITIONS
1832 CONFIG_MTD_UBI_BEB_RESERVE 1832 CONFIG_MTD_UBI_BEB_RESERVE
1833 CONFIG_MTD_UBI_BLOCK 1833 CONFIG_MTD_UBI_BLOCK
1834 CONFIG_MTD_UBI_DEBUG 1834 CONFIG_MTD_UBI_DEBUG
1835 CONFIG_MTD_UBI_DEBUG_MSG 1835 CONFIG_MTD_UBI_DEBUG_MSG
1836 CONFIG_MTD_UBI_DEBUG_MSG_BLD 1836 CONFIG_MTD_UBI_DEBUG_MSG_BLD
1837 CONFIG_MTD_UBI_DEBUG_MSG_EBA 1837 CONFIG_MTD_UBI_DEBUG_MSG_EBA
1838 CONFIG_MTD_UBI_DEBUG_MSG_IO 1838 CONFIG_MTD_UBI_DEBUG_MSG_IO
1839 CONFIG_MTD_UBI_DEBUG_MSG_WL 1839 CONFIG_MTD_UBI_DEBUG_MSG_WL
1840 CONFIG_MTD_UBI_DEBUG_PARANOID 1840 CONFIG_MTD_UBI_DEBUG_PARANOID
1841 CONFIG_MTD_UBI_GLUEBI 1841 CONFIG_MTD_UBI_GLUEBI
1842 CONFIG_MTD_UBI_MODULE 1842 CONFIG_MTD_UBI_MODULE
1843 CONFIG_MULTI_CS 1843 CONFIG_MULTI_CS
1844 CONFIG_MUNICES 1844 CONFIG_MUNICES
1845 CONFIG_MUSB_HOST 1845 CONFIG_MUSB_HOST
1846 CONFIG_MVEBU_MMC 1846 CONFIG_MVEBU_MMC
1847 CONFIG_MVGBE 1847 CONFIG_MVGBE
1848 CONFIG_MVGBE_PORTS 1848 CONFIG_MVGBE_PORTS
1849 CONFIG_MVMFP_V2 1849 CONFIG_MVMFP_V2
1850 CONFIG_MVNETA 1850 CONFIG_MVNETA
1851 CONFIG_MVS 1851 CONFIG_MVS
1852 CONFIG_MVSATA_IDE 1852 CONFIG_MVSATA_IDE
1853 CONFIG_MVSATA_IDE_USE_PORT0 1853 CONFIG_MVSATA_IDE_USE_PORT0
1854 CONFIG_MVSATA_IDE_USE_PORT1 1854 CONFIG_MVSATA_IDE_USE_PORT1
1855 CONFIG_MV_ETH_RXQ 1855 CONFIG_MV_ETH_RXQ
1856 CONFIG_MV_I2C_NUM 1856 CONFIG_MV_I2C_NUM
1857 CONFIG_MV_I2C_REG 1857 CONFIG_MV_I2C_REG
1858 CONFIG_MX23 1858 CONFIG_MX23
1859 CONFIG_MX25 1859 CONFIG_MX25
1860 CONFIG_MX25_CLK32 1860 CONFIG_MX25_CLK32
1861 CONFIG_MX25_HCLK_FREQ 1861 CONFIG_MX25_HCLK_FREQ
1862 CONFIG_MX27 1862 CONFIG_MX27
1863 CONFIG_MX27_CLK32 1863 CONFIG_MX27_CLK32
1864 CONFIG_MX27_TIMER_HIGH_PRECISION 1864 CONFIG_MX27_TIMER_HIGH_PRECISION
1865 CONFIG_MX28 1865 CONFIG_MX28
1866 CONFIG_MX28_FEC_MAC_IN_OCOTP 1866 CONFIG_MX28_FEC_MAC_IN_OCOTP
1867 CONFIG_MX31 1867 CONFIG_MX31
1868 CONFIG_MX31_CLK32 1868 CONFIG_MX31_CLK32
1869 CONFIG_MX31_HCLK_FREQ 1869 CONFIG_MX31_HCLK_FREQ
1870 CONFIG_MX35 1870 CONFIG_MX35
1871 CONFIG_MX35_CLK32 1871 CONFIG_MX35_CLK32
1872 CONFIG_MX35_HCLK_FREQ 1872 CONFIG_MX35_HCLK_FREQ
1873 CONFIG_MX6DL_LPDDR2 1873 CONFIG_MX6DL_LPDDR2
1874 CONFIG_MX6DQ_LPDDR2 1874 CONFIG_MX6DQ_LPDDR2
1875 CONFIG_MX6SX_SABRESD_REVA 1875 CONFIG_MX6SX_SABRESD_REVA
1876 CONFIG_MX6UL_14X14_EVK_EMMC_REWORK 1876 CONFIG_MX6UL_14X14_EVK_EMMC_REWORK
1877 CONFIG_MXC_EPDC 1877 CONFIG_MXC_EPDC
1878 CONFIG_MXC_GPIO 1878 CONFIG_MXC_GPIO
1879 CONFIG_MXC_GPT_HCLK 1879 CONFIG_MXC_GPT_HCLK
1880 CONFIG_MXC_MCI_REGS_BASE 1880 CONFIG_MXC_MCI_REGS_BASE
1881 CONFIG_MXC_NAND_HWECC 1881 CONFIG_MXC_NAND_HWECC
1882 CONFIG_MXC_NAND_IP_REGS_BASE 1882 CONFIG_MXC_NAND_IP_REGS_BASE
1883 CONFIG_MXC_NAND_REGS_BASE 1883 CONFIG_MXC_NAND_REGS_BASE
1884 CONFIG_MXC_SPI 1884 CONFIG_MXC_SPI
1885 CONFIG_MXC_UART_BASE 1885 CONFIG_MXC_UART_BASE
1886 CONFIG_MXC_USB_FLAGS 1886 CONFIG_MXC_USB_FLAGS
1887 CONFIG_MXC_USB_PORT 1887 CONFIG_MXC_USB_PORT
1888 CONFIG_MXC_USB_PORTSC 1888 CONFIG_MXC_USB_PORTSC
1889 CONFIG_MXS 1889 CONFIG_MXS
1890 CONFIG_MXS_AUART 1890 CONFIG_MXS_AUART
1891 CONFIG_MXS_AUART_BASE 1891 CONFIG_MXS_AUART_BASE
1892 CONFIG_MXS_GPIO 1892 CONFIG_MXS_GPIO
1893 CONFIG_MXS_OCOTP 1893 CONFIG_MXS_OCOTP
1894 CONFIG_MXS_SPI 1894 CONFIG_MXS_SPI
1895 CONFIG_MX_CYCLIC 1895 CONFIG_MX_CYCLIC
1896 CONFIG_MY_OPTION 1896 CONFIG_MY_OPTION
1897 CONFIG_NAND 1897 CONFIG_NAND
1898 CONFIG_NANDFLASH_SIZE 1898 CONFIG_NANDFLASH_SIZE
1899 CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC 1899 CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
1900 CONFIG_NAND_ACTL 1900 CONFIG_NAND_ACTL
1901 CONFIG_NAND_ATMEL 1901 CONFIG_NAND_ATMEL
1902 CONFIG_NAND_CS_INIT 1902 CONFIG_NAND_CS_INIT
1903 CONFIG_NAND_DATA_REG 1903 CONFIG_NAND_DATA_REG
1904 CONFIG_NAND_DAVINCI 1904 CONFIG_NAND_DAVINCI
1905 CONFIG_NAND_DENALI_ECC_SIZE 1905 CONFIG_NAND_DENALI_ECC_SIZE
1906 CONFIG_NAND_ECC_BCH 1906 CONFIG_NAND_ECC_BCH
1907 CONFIG_NAND_ENV_DST 1907 CONFIG_NAND_ENV_DST
1908 CONFIG_NAND_FSL_ELBC 1908 CONFIG_NAND_FSL_ELBC
1909 CONFIG_NAND_FSL_IFC 1909 CONFIG_NAND_FSL_IFC
1910 CONFIG_NAND_FSL_NFC 1910 CONFIG_NAND_FSL_NFC
1911 CONFIG_NAND_FSMC 1911 CONFIG_NAND_FSMC
1912 CONFIG_NAND_KIRKWOOD 1912 CONFIG_NAND_KIRKWOOD
1913 CONFIG_NAND_KMETER1 1913 CONFIG_NAND_KMETER1
1914 CONFIG_NAND_LPC32XX_MLC 1914 CONFIG_NAND_LPC32XX_MLC
1915 CONFIG_NAND_LPC32XX_SLC 1915 CONFIG_NAND_LPC32XX_SLC
1916 CONFIG_NAND_MODE_REG 1916 CONFIG_NAND_MODE_REG
1917 CONFIG_NAND_MPC5121_NFC 1917 CONFIG_NAND_MPC5121_NFC
1918 CONFIG_NAND_MXC 1918 CONFIG_NAND_MXC
1919 CONFIG_NAND_MXC_V1_1 1919 CONFIG_NAND_MXC_V1_1
1920 CONFIG_NAND_NDFC 1920 CONFIG_NAND_NDFC
1921 CONFIG_NAND_OMAP_ECCSCHEME 1921 CONFIG_NAND_OMAP_ECCSCHEME
1922 CONFIG_NAND_OMAP_ELM 1922 CONFIG_NAND_OMAP_ELM
1923 CONFIG_NAND_OMAP_GPMC 1923 CONFIG_NAND_OMAP_GPMC
1924 CONFIG_NAND_OMAP_GPMC_PREFETCH 1924 CONFIG_NAND_OMAP_GPMC_PREFETCH
1925 CONFIG_NAND_OMAP_GPMC_WSCFG 1925 CONFIG_NAND_OMAP_GPMC_WSCFG
1926 CONFIG_NAND_SECBOOT 1926 CONFIG_NAND_SECBOOT
1927 CONFIG_NAND_SPL 1927 CONFIG_NAND_SPL
1928 CONFIG_NAND_U_BOOT 1928 CONFIG_NAND_U_BOOT
1929 CONFIG_NATSEMI 1929 CONFIG_NATSEMI
1930 CONFIG_NB 1930 CONFIG_NB
1931 CONFIG_NCEL2C100_BASE 1931 CONFIG_NCEL2C100_BASE
1932 CONFIG_NCEMIC100_BASE 1932 CONFIG_NCEMIC100_BASE
1933 CONFIG_NDS_DLM1_BASE 1933 CONFIG_NDS_DLM1_BASE
1934 CONFIG_NDS_DLM2_BASE 1934 CONFIG_NDS_DLM2_BASE
1935 CONFIG_NEC_NL6448AC33 1935 CONFIG_NEC_NL6448AC33
1936 CONFIG_NEC_NL6448BC20 1936 CONFIG_NEC_NL6448BC20
1937 CONFIG_NEC_NL6448BC33_54 1937 CONFIG_NEC_NL6448BC33_54
1938 CONFIG_NEEDS_MANUAL_RELOC 1938 CONFIG_NEEDS_MANUAL_RELOC
1939 CONFIG_NEO 1939 CONFIG_NEO
1940 CONFIG_NET2BIG_V2 1940 CONFIG_NET2BIG_V2
1941 CONFIG_NETCONSOLE_BUFFER_SIZE 1941 CONFIG_NETCONSOLE_BUFFER_SIZE
1942 CONFIG_NETDEV 1942 CONFIG_NETDEV
1943 CONFIG_NETMASK 1943 CONFIG_NETMASK
1944 CONFIG_NETSPACE_LITE_V2 1944 CONFIG_NETSPACE_LITE_V2
1945 CONFIG_NETSPACE_MAX_V2 1945 CONFIG_NETSPACE_MAX_V2
1946 CONFIG_NETSPACE_MINI_V2 1946 CONFIG_NETSPACE_MINI_V2
1947 CONFIG_NETSPACE_V2 1947 CONFIG_NETSPACE_V2
1948 CONFIG_NET_MAXDEFRAG 1948 CONFIG_NET_MAXDEFRAG
1949 CONFIG_NET_MULTI 1949 CONFIG_NET_MULTI
1950 CONFIG_NET_RETRY_COUNT 1950 CONFIG_NET_RETRY_COUNT
1951 CONFIG_NEVER_ASSERT_ODT_TO_CPU 1951 CONFIG_NEVER_ASSERT_ODT_TO_CPU
1952 CONFIG_NFC_FREQ 1952 CONFIG_NFC_FREQ
1953 CONFIG_NFSBOOTCOMMAND 1953 CONFIG_NFSBOOTCOMMAND
1954 CONFIG_NFS_READ_SIZE 1954 CONFIG_NFS_READ_SIZE
1955 CONFIG_NFS_TIMEOUT 1955 CONFIG_NFS_TIMEOUT
1956 CONFIG_NOBQFMAN 1956 CONFIG_NOBQFMAN
1957 CONFIG_NON_SECURE 1957 CONFIG_NON_SECURE
1958 CONFIG_NORBOOT 1958 CONFIG_NORBOOT
1959 CONFIG_NORFLASH_PS32BIT 1959 CONFIG_NORFLASH_PS32BIT
1960 CONFIG_NOT_SELECTED 1960 CONFIG_NOT_SELECTED
1961 CONFIG_NO_ETH 1961 CONFIG_NO_ETH
1962 CONFIG_NO_RELOCATION 1962 CONFIG_NO_RELOCATION
1963 CONFIG_NO_SERIAL_EEPROM 1963 CONFIG_NO_SERIAL_EEPROM
1964 CONFIG_NO_WAIT 1964 CONFIG_NO_WAIT
1965 CONFIG_NR_CPUS 1965 CONFIG_NR_CPUS
1966 CONFIG_NR_DRAM_BANKS 1966 CONFIG_NR_DRAM_BANKS
1967 CONFIG_NR_DRAM_BANKS_MAX 1967 CONFIG_NR_DRAM_BANKS_MAX
1968 CONFIG_NR_DRAM_POPULATED 1968 CONFIG_NR_DRAM_POPULATED
1969 CONFIG_NS16550_MIN_FUNCTIONS 1969 CONFIG_NS16550_MIN_FUNCTIONS
1970 CONFIG_NS8382X 1970 CONFIG_NS8382X
1971 CONFIG_NS87308 1971 CONFIG_NS87308
1972 CONFIG_NUM_DSP_CPUS 1972 CONFIG_NUM_DSP_CPUS
1973 CONFIG_NUM_PAMU 1973 CONFIG_NUM_PAMU
1974 CONFIG_ODROID_REV_AIN 1974 CONFIG_ODROID_REV_AIN
1975 CONFIG_OFF_PADCONF 1975 CONFIG_OFF_PADCONF
1976 CONFIG_OF_ 1976 CONFIG_OF_
1977 CONFIG_OF_IDE_FIXUP 1977 CONFIG_OF_IDE_FIXUP
1978 CONFIG_OF_SPI 1978 CONFIG_OF_SPI
1979 CONFIG_OF_SPI_FLASH 1979 CONFIG_OF_SPI_FLASH
1980 CONFIG_OF_STDOUT_PATH 1980 CONFIG_OF_STDOUT_PATH
1981 CONFIG_OF_SUPPORT_OLD_DEVICE_TREES 1981 CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
1982 CONFIG_OMAP3_GPIO_2
1983 CONFIG_OMAP3_GPIO_3
1984 CONFIG_OMAP3_GPIO_4
1985 CONFIG_OMAP3_GPIO_5
1986 CONFIG_OMAP3_GPIO_6
1987 CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID 1982 CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID
1988 CONFIG_OMAP3_MICRON_DDR 1983 CONFIG_OMAP3_MICRON_DDR
1989 CONFIG_OMAP3_SPI_D0_D1_SWAPPED 1984 CONFIG_OMAP3_SPI_D0_D1_SWAPPED
1990 CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 1985 CONFIG_OMAP_EHCI_PHY1_RESET_GPIO
1991 CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 1986 CONFIG_OMAP_EHCI_PHY2_RESET_GPIO
1992 CONFIG_OMAP_EHCI_PHY3_RESET_GPIO 1987 CONFIG_OMAP_EHCI_PHY3_RESET_GPIO
1993 CONFIG_OMAP_USB2PHY2_HOST 1988 CONFIG_OMAP_USB2PHY2_HOST
1994 CONFIG_OMAP_USB3PHY1_HOST 1989 CONFIG_OMAP_USB3PHY1_HOST
1995 CONFIG_OMAP_USB_PHY 1990 CONFIG_OMAP_USB_PHY
1996 CONFIG_OMAP_VC_I2C_HS_MCODE 1991 CONFIG_OMAP_VC_I2C_HS_MCODE
1997 CONFIG_OMAP_WATCHDOG 1992 CONFIG_OMAP_WATCHDOG
1998 CONFIG_OPTREX_BW 1993 CONFIG_OPTREX_BW
1999 CONFIG_ORIGEN 1994 CONFIG_ORIGEN
2000 CONFIG_OS1_ENV_ADDR 1995 CONFIG_OS1_ENV_ADDR
2001 CONFIG_OS2_ENV_ADDR 1996 CONFIG_OS2_ENV_ADDR
2002 CONFIG_OS_ENV_ADDR 1997 CONFIG_OS_ENV_ADDR
2003 CONFIG_OTHBOOTARGS 1998 CONFIG_OTHBOOTARGS
2004 CONFIG_OVERWRITE_ETHADDR_ONCE 1999 CONFIG_OVERWRITE_ETHADDR_ONCE
2005 CONFIG_PAGE_CNT_MASK 2000 CONFIG_PAGE_CNT_MASK
2006 CONFIG_PAGE_CNT_SHIFT 2001 CONFIG_PAGE_CNT_SHIFT
2007 CONFIG_PALMAS_AUDPWR 2002 CONFIG_PALMAS_AUDPWR
2008 CONFIG_PALMAS_POWER 2003 CONFIG_PALMAS_POWER
2009 CONFIG_PALMAS_SMPS7_FPWM 2004 CONFIG_PALMAS_SMPS7_FPWM
2010 CONFIG_PALMAS_USB_SS_PWR 2005 CONFIG_PALMAS_USB_SS_PWR
2011 CONFIG_PANIC_HANG 2006 CONFIG_PANIC_HANG
2012 CONFIG_PARAVIRT 2007 CONFIG_PARAVIRT
2013 CONFIG_PATI 2008 CONFIG_PATI
2014 CONFIG_PB1000 2009 CONFIG_PB1000
2015 CONFIG_PB1100 2010 CONFIG_PB1100
2016 CONFIG_PB1500 2011 CONFIG_PB1500
2017 CONFIG_PB1X00 2012 CONFIG_PB1X00
2018 CONFIG_PCA953X 2013 CONFIG_PCA953X
2019 CONFIG_PCA9698 2014 CONFIG_PCA9698
2020 CONFIG_PCI1 2015 CONFIG_PCI1
2021 CONFIG_PCI2 2016 CONFIG_PCI2
2022 CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 2017 CONFIG_PCIAUTO_SKIP_HOST_BRIDGE
2023 CONFIG_PCIE 2018 CONFIG_PCIE
2024 CONFIG_PCIE1 2019 CONFIG_PCIE1
2025 CONFIG_PCIE2 2020 CONFIG_PCIE2
2026 CONFIG_PCIE3 2021 CONFIG_PCIE3
2027 CONFIG_PCIE4 2022 CONFIG_PCIE4
2028 CONFIG_PCIE_IMX 2023 CONFIG_PCIE_IMX
2029 CONFIG_PCIE_IMX_PERST_GPIO 2024 CONFIG_PCIE_IMX_PERST_GPIO
2030 CONFIG_PCIE_IMX_POWER_GPIO 2025 CONFIG_PCIE_IMX_POWER_GPIO
2031 CONFIG_PCISLAVE 2026 CONFIG_PCISLAVE
2032 CONFIG_PCIX_CHECK 2027 CONFIG_PCIX_CHECK
2033 CONFIG_PCI_33M 2028 CONFIG_PCI_33M
2034 CONFIG_PCI_4xx_PTM_OVERWRITE 2029 CONFIG_PCI_4xx_PTM_OVERWRITE
2035 CONFIG_PCI_66M 2030 CONFIG_PCI_66M
2036 CONFIG_PCI_BOOTDELAY 2031 CONFIG_PCI_BOOTDELAY
2037 CONFIG_PCI_CLK_FREQ 2032 CONFIG_PCI_CLK_FREQ
2038 CONFIG_PCI_CONFIG_HOST_BRIDGE 2033 CONFIG_PCI_CONFIG_HOST_BRIDGE
2039 CONFIG_PCI_DISABLE_PCIE 2034 CONFIG_PCI_DISABLE_PCIE
2040 CONFIG_PCI_EHCI_DEVICE 2035 CONFIG_PCI_EHCI_DEVICE
2041 CONFIG_PCI_EHCI_DEVNO 2036 CONFIG_PCI_EHCI_DEVNO
2042 CONFIG_PCI_ENUM_ONLY 2037 CONFIG_PCI_ENUM_ONLY
2043 CONFIG_PCI_FIXUP_DEV 2038 CONFIG_PCI_FIXUP_DEV
2044 CONFIG_PCI_GT64120 2039 CONFIG_PCI_GT64120
2045 CONFIG_PCI_HOST 2040 CONFIG_PCI_HOST
2046 CONFIG_PCI_INDIRECT_BRIDGE 2041 CONFIG_PCI_INDIRECT_BRIDGE
2047 CONFIG_PCI_IO_BUS 2042 CONFIG_PCI_IO_BUS
2048 CONFIG_PCI_IO_PHYS 2043 CONFIG_PCI_IO_PHYS
2049 CONFIG_PCI_IO_SIZE 2044 CONFIG_PCI_IO_SIZE
2050 CONFIG_PCI_MEMORY_BUS 2045 CONFIG_PCI_MEMORY_BUS
2051 CONFIG_PCI_MEMORY_PHYS 2046 CONFIG_PCI_MEMORY_PHYS
2052 CONFIG_PCI_MEMORY_SIZE 2047 CONFIG_PCI_MEMORY_SIZE
2053 CONFIG_PCI_MEM_BUS 2048 CONFIG_PCI_MEM_BUS
2054 CONFIG_PCI_MEM_PHYS 2049 CONFIG_PCI_MEM_PHYS
2055 CONFIG_PCI_MEM_SIZE 2050 CONFIG_PCI_MEM_SIZE
2056 CONFIG_PCI_MSC01 2051 CONFIG_PCI_MSC01
2057 CONFIG_PCI_MVEBU 2052 CONFIG_PCI_MVEBU
2058 CONFIG_PCI_NOSCAN 2053 CONFIG_PCI_NOSCAN
2059 CONFIG_PCI_OHCI 2054 CONFIG_PCI_OHCI
2060 CONFIG_PCI_OHCI_DEVNO 2055 CONFIG_PCI_OHCI_DEVNO
2061 CONFIG_PCI_PREF_BUS 2056 CONFIG_PCI_PREF_BUS
2062 CONFIG_PCI_PREF_PHYS 2057 CONFIG_PCI_PREF_PHYS
2063 CONFIG_PCI_PREF_SIZE 2058 CONFIG_PCI_PREF_SIZE
2064 CONFIG_PCI_SCAN_SHOW 2059 CONFIG_PCI_SCAN_SHOW
2065 CONFIG_PCI_SKIP_HOST_BRIDGE 2060 CONFIG_PCI_SKIP_HOST_BRIDGE
2066 CONFIG_PCI_SYS_BUS 2061 CONFIG_PCI_SYS_BUS
2067 CONFIG_PCI_SYS_MEM_BUS 2062 CONFIG_PCI_SYS_MEM_BUS
2068 CONFIG_PCI_SYS_MEM_PHYS 2063 CONFIG_PCI_SYS_MEM_PHYS
2069 CONFIG_PCI_SYS_MEM_SIZE 2064 CONFIG_PCI_SYS_MEM_SIZE
2070 CONFIG_PCI_SYS_PHYS 2065 CONFIG_PCI_SYS_PHYS
2071 CONFIG_PCI_SYS_SIZE 2066 CONFIG_PCI_SYS_SIZE
2072 CONFIG_PCMCIA 2067 CONFIG_PCMCIA
2073 CONFIG_PCMCIA_SLOT_A 2068 CONFIG_PCMCIA_SLOT_A
2074 CONFIG_PCMCIA_SLOT_B 2069 CONFIG_PCMCIA_SLOT_B
2075 CONFIG_PCNET 2070 CONFIG_PCNET
2076 CONFIG_PCNET_79C973 2071 CONFIG_PCNET_79C973
2077 CONFIG_PCNET_79C975 2072 CONFIG_PCNET_79C975
2078 CONFIG_PDM360NG 2073 CONFIG_PDM360NG
2079 CONFIG_PEN_ADDR_BIG_ENDIAN 2074 CONFIG_PEN_ADDR_BIG_ENDIAN
2080 CONFIG_PERIF1_FREQ 2075 CONFIG_PERIF1_FREQ
2081 CONFIG_PERIF2_FREQ 2076 CONFIG_PERIF2_FREQ
2082 CONFIG_PERIF3_FREQ 2077 CONFIG_PERIF3_FREQ
2083 CONFIG_PERIF4_FREQ 2078 CONFIG_PERIF4_FREQ
2084 CONFIG_PHY1_ADDR 2079 CONFIG_PHY1_ADDR
2085 CONFIG_PHY2_ADDR 2080 CONFIG_PHY2_ADDR
2086 CONFIG_PHY3_ADDR 2081 CONFIG_PHY3_ADDR
2087 CONFIG_PHYCORE_MPC5200B_TINY 2082 CONFIG_PHYCORE_MPC5200B_TINY
2088 CONFIG_PHYSMEM 2083 CONFIG_PHYSMEM
2089 CONFIG_PHY_ADDR 2084 CONFIG_PHY_ADDR
2090 CONFIG_PHY_BASE_ADR 2085 CONFIG_PHY_BASE_ADR
2091 CONFIG_PHY_BCM5421S 2086 CONFIG_PHY_BCM5421S
2092 CONFIG_PHY_CLK_FREQ 2087 CONFIG_PHY_CLK_FREQ
2093 CONFIG_PHY_CMD_DELAY 2088 CONFIG_PHY_CMD_DELAY
2094 CONFIG_PHY_DYNAMIC_ANEG 2089 CONFIG_PHY_DYNAMIC_ANEG
2095 CONFIG_PHY_ET1011C_TX_CLK_FIX 2090 CONFIG_PHY_ET1011C_TX_CLK_FIX
2096 CONFIG_PHY_GIGE 2091 CONFIG_PHY_GIGE
2097 CONFIG_PHY_ID 2092 CONFIG_PHY_ID
2098 CONFIG_PHY_INTERFACE_MODE 2093 CONFIG_PHY_INTERFACE_MODE
2099 CONFIG_PHY_IRAM_BASE 2094 CONFIG_PHY_IRAM_BASE
2100 CONFIG_PHY_KSZ9031 2095 CONFIG_PHY_KSZ9031
2101 CONFIG_PHY_M88E1111 2096 CONFIG_PHY_M88E1111
2102 CONFIG_PHY_MAX_ADDR 2097 CONFIG_PHY_MAX_ADDR
2103 CONFIG_PHY_MICREL_KSZ9021 2098 CONFIG_PHY_MICREL_KSZ9021
2104 CONFIG_PHY_MICREL_KSZ9031 2099 CONFIG_PHY_MICREL_KSZ9031
2105 CONFIG_PHY_MODE_NEED_CHANGE 2100 CONFIG_PHY_MODE_NEED_CHANGE
2106 CONFIG_PHY_RESET 2101 CONFIG_PHY_RESET
2107 CONFIG_PHY_RESET_DELAY 2102 CONFIG_PHY_RESET_DELAY
2108 CONFIG_PHY_TYPE 2103 CONFIG_PHY_TYPE
2109 CONFIG_PHYx_ADDR 2104 CONFIG_PHYx_ADDR
2110 CONFIG_PICOSAM 2105 CONFIG_PICOSAM
2111 CONFIG_PIGGY_MAC_ADRESS_OFFSET 2106 CONFIG_PIGGY_MAC_ADRESS_OFFSET
2112 CONFIG_PIP405 2107 CONFIG_PIP405
2113 CONFIG_PIXIS_BRDCFG0_SPI 2108 CONFIG_PIXIS_BRDCFG0_SPI
2114 CONFIG_PIXIS_BRDCFG0_USB2 2109 CONFIG_PIXIS_BRDCFG0_USB2
2115 CONFIG_PIXIS_BRDCFG1_AUDCLK_11 2110 CONFIG_PIXIS_BRDCFG1_AUDCLK_11
2116 CONFIG_PIXIS_BRDCFG1_AUDCLK_12 2111 CONFIG_PIXIS_BRDCFG1_AUDCLK_12
2117 CONFIG_PIXIS_BRDCFG1_AUDCLK_MASK 2112 CONFIG_PIXIS_BRDCFG1_AUDCLK_MASK
2118 CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK 2113 CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK
2119 CONFIG_PIXIS_BRDCFG1_SSI_TDM_SSI 2114 CONFIG_PIXIS_BRDCFG1_SSI_TDM_SSI
2120 CONFIG_PIXIS_BRDCFG1_TDM 2115 CONFIG_PIXIS_BRDCFG1_TDM
2121 CONFIG_PIXIS_SGMII_CMD 2116 CONFIG_PIXIS_SGMII_CMD
2122 CONFIG_PL010_SERIAL 2117 CONFIG_PL010_SERIAL
2123 CONFIG_PL011_CLOCK 2118 CONFIG_PL011_CLOCK
2124 CONFIG_PL011_SERIAL 2119 CONFIG_PL011_SERIAL
2125 CONFIG_PL011_SERIAL_RLCR 2120 CONFIG_PL011_SERIAL_RLCR
2126 CONFIG_PL01X_SERIAL 2121 CONFIG_PL01X_SERIAL
2127 CONFIG_PL01x_PORTS 2122 CONFIG_PL01x_PORTS
2128 CONFIG_PLATFORM_ENV_SETTINGS 2123 CONFIG_PLATFORM_ENV_SETTINGS
2129 CONFIG_PLATINUM_BOARD 2124 CONFIG_PLATINUM_BOARD
2130 CONFIG_PLATINUM_CPU 2125 CONFIG_PLATINUM_CPU
2131 CONFIG_PLATINUM_PICON 2126 CONFIG_PLATINUM_PICON
2132 CONFIG_PLATINUM_PROJECT 2127 CONFIG_PLATINUM_PROJECT
2133 CONFIG_PLATINUM_TITANIUM 2128 CONFIG_PLATINUM_TITANIUM
2134 CONFIG_PLL 2129 CONFIG_PLL
2135 CONFIG_PLL1_CLK_FREQ 2130 CONFIG_PLL1_CLK_FREQ
2136 CONFIG_PLL1_DIV2_CLK_FREQ 2131 CONFIG_PLL1_DIV2_CLK_FREQ
2137 CONFIG_PLU405 2132 CONFIG_PLU405
2138 CONFIG_PM 2133 CONFIG_PM
2139 CONFIG_PM9261 2134 CONFIG_PM9261
2140 CONFIG_PM9263 2135 CONFIG_PM9263
2141 CONFIG_PM9G45 2136 CONFIG_PM9G45
2142 CONFIG_PMC405DE 2137 CONFIG_PMC405DE
2143 CONFIG_PMC_BR_PRELIM 2138 CONFIG_PMC_BR_PRELIM
2144 CONFIG_PMC_OR_PRELIM 2139 CONFIG_PMC_OR_PRELIM
2145 CONFIG_PMECC_CAP 2140 CONFIG_PMECC_CAP
2146 CONFIG_PMECC_INDEX_TABLE_OFFSET 2141 CONFIG_PMECC_INDEX_TABLE_OFFSET
2147 CONFIG_PMECC_SECTOR_SIZE 2142 CONFIG_PMECC_SECTOR_SIZE
2148 CONFIG_PME_PLAT_CLK_DIV 2143 CONFIG_PME_PLAT_CLK_DIV
2149 CONFIG_PMU 2144 CONFIG_PMU
2150 CONFIG_PMW_BASE 2145 CONFIG_PMW_BASE
2151 CONFIG_PM_SLEEP 2146 CONFIG_PM_SLEEP
2152 CONFIG_PORTMUX_PIO 2147 CONFIG_PORTMUX_PIO
2153 CONFIG_PORT_ADDR 2148 CONFIG_PORT_ADDR
2154 CONFIG_PORT_AP 2149 CONFIG_PORT_AP
2155 CONFIG_PORT_BEM 2150 CONFIG_PORT_BEM
2156 CONFIG_PORT_BME 2151 CONFIG_PORT_BME
2157 CONFIG_PORT_BS 2152 CONFIG_PORT_BS
2158 CONFIG_PORT_BU 2153 CONFIG_PORT_BU
2159 CONFIG_PORT_BW 2154 CONFIG_PORT_BW
2160 CONFIG_PORT_CR 2155 CONFIG_PORT_CR
2161 CONFIG_PORT_CSN 2156 CONFIG_PORT_CSN
2162 CONFIG_PORT_OEN 2157 CONFIG_PORT_OEN
2163 CONFIG_PORT_PEN 2158 CONFIG_PORT_PEN
2164 CONFIG_PORT_RE 2159 CONFIG_PORT_RE
2165 CONFIG_PORT_SOR 2160 CONFIG_PORT_SOR
2166 CONFIG_PORT_TH 2161 CONFIG_PORT_TH
2167 CONFIG_PORT_TWE 2162 CONFIG_PORT_TWE
2168 CONFIG_PORT_WBF 2163 CONFIG_PORT_WBF
2169 CONFIG_PORT_WBN 2164 CONFIG_PORT_WBN
2170 CONFIG_POST 2165 CONFIG_POST
2171 CONFIG_POSTBOOTMENU 2166 CONFIG_POSTBOOTMENU
2172 CONFIG_POST_ALT_LIST 2167 CONFIG_POST_ALT_LIST
2173 CONFIG_POST_BSPEC1 2168 CONFIG_POST_BSPEC1
2174 CONFIG_POST_BSPEC2 2169 CONFIG_POST_BSPEC2
2175 CONFIG_POST_BSPEC3 2170 CONFIG_POST_BSPEC3
2176 CONFIG_POST_BSPEC4 2171 CONFIG_POST_BSPEC4
2177 CONFIG_POST_BSPEC5 2172 CONFIG_POST_BSPEC5
2178 CONFIG_POST_EXTERNAL_WORD_FUNCS 2173 CONFIG_POST_EXTERNAL_WORD_FUNCS
2179 CONFIG_POST_KEY_MAGIC 2174 CONFIG_POST_KEY_MAGIC
2180 CONFIG_POST_SKIP_ENV_FLAGS 2175 CONFIG_POST_SKIP_ENV_FLAGS
2181 CONFIG_POST_STD_LIST 2176 CONFIG_POST_STD_LIST
2182 CONFIG_POST_UART 2177 CONFIG_POST_UART
2183 CONFIG_POST_WATCHDOG 2178 CONFIG_POST_WATCHDOG
2184 CONFIG_POWER 2179 CONFIG_POWER
2185 CONFIG_POWER_FSL 2180 CONFIG_POWER_FSL
2186 CONFIG_POWER_FSL_MC13892 2181 CONFIG_POWER_FSL_MC13892
2187 CONFIG_POWER_FSL_MC34704 2182 CONFIG_POWER_FSL_MC34704
2188 CONFIG_POWER_HI6553 2183 CONFIG_POWER_HI6553
2189 CONFIG_POWER_I2C 2184 CONFIG_POWER_I2C
2190 CONFIG_POWER_LTC3676 2185 CONFIG_POWER_LTC3676
2191 CONFIG_POWER_LTC3676_I2C_ADDR 2186 CONFIG_POWER_LTC3676_I2C_ADDR
2192 CONFIG_POWER_MAX77696 2187 CONFIG_POWER_MAX77696
2193 CONFIG_POWER_MAX77696_I2C_ADDR 2188 CONFIG_POWER_MAX77696_I2C_ADDR
2194 CONFIG_POWER_PFUZE100 2189 CONFIG_POWER_PFUZE100
2195 CONFIG_POWER_PFUZE100_I2C_ADDR 2190 CONFIG_POWER_PFUZE100_I2C_ADDR
2196 CONFIG_POWER_PFUZE3000 2191 CONFIG_POWER_PFUZE3000
2197 CONFIG_POWER_PFUZE3000_I2C_ADDR 2192 CONFIG_POWER_PFUZE3000_I2C_ADDR
2198 CONFIG_POWER_SPI 2193 CONFIG_POWER_SPI
2199 CONFIG_POWER_TPS62362 2194 CONFIG_POWER_TPS62362
2200 CONFIG_POWER_TPS65090_EC 2195 CONFIG_POWER_TPS65090_EC
2201 CONFIG_POWER_TPS65217 2196 CONFIG_POWER_TPS65217
2202 CONFIG_POWER_TPS65218 2197 CONFIG_POWER_TPS65218
2203 CONFIG_POWER_TPS65910 2198 CONFIG_POWER_TPS65910
2204 CONFIG_PPC4XX_RAPIDIO_DEBUG 2199 CONFIG_PPC4XX_RAPIDIO_DEBUG
2205 CONFIG_PPC4XX_RAPIDIO_IN_BAR_USE_OCM 2200 CONFIG_PPC4XX_RAPIDIO_IN_BAR_USE_OCM
2206 CONFIG_PPC4XX_RAPIDIO_LOOPBACK 2201 CONFIG_PPC4XX_RAPIDIO_LOOPBACK
2207 CONFIG_PPC4XX_RAPIDIO_PROMISCUOUS_MODE 2202 CONFIG_PPC4XX_RAPIDIO_PROMISCUOUS_MODE
2208 CONFIG_PPC4XX_RAPIDIO_USE_HB_PLB 2203 CONFIG_PPC4XX_RAPIDIO_USE_HB_PLB
2209 CONFIG_PPC4xx_DDR_AUTOCALIBRATION 2204 CONFIG_PPC4xx_DDR_AUTOCALIBRATION
2210 CONFIG_PPC4xx_DDR_METHOD_A 2205 CONFIG_PPC4xx_DDR_METHOD_A
2211 CONFIG_PPC4xx_EMAC 2206 CONFIG_PPC4xx_EMAC
2212 CONFIG_PPC64BRIDGE 2207 CONFIG_PPC64BRIDGE
2213 CONFIG_PPC_CLUSTER_START 2208 CONFIG_PPC_CLUSTER_START
2214 CONFIG_PPC_SPINTABLE_COMPATIBLE 2209 CONFIG_PPC_SPINTABLE_COMPATIBLE
2215 CONFIG_PQ_MDS_PIB 2210 CONFIG_PQ_MDS_PIB
2216 CONFIG_PQ_MDS_PIB_ATM 2211 CONFIG_PQ_MDS_PIB_ATM
2217 CONFIG_PRAM 2212 CONFIG_PRAM
2218 CONFIG_PREBOOT 2213 CONFIG_PREBOOT
2219 CONFIG_PRIMEVIEW_V16C6448AC 2214 CONFIG_PRIMEVIEW_V16C6448AC
2220 CONFIG_PRINTK 2215 CONFIG_PRINTK
2221 CONFIG_PROC_FS 2216 CONFIG_PROC_FS
2222 CONFIG_PROFILE_ALL_BRANCHES 2217 CONFIG_PROFILE_ALL_BRANCHES
2223 CONFIG_PROFILING 2218 CONFIG_PROFILING
2224 CONFIG_PROG_FDT 2219 CONFIG_PROG_FDT
2225 CONFIG_PROG_FDT1 2220 CONFIG_PROG_FDT1
2226 CONFIG_PROG_FDT2 2221 CONFIG_PROG_FDT2
2227 CONFIG_PROG_OS 2222 CONFIG_PROG_OS
2228 CONFIG_PROG_OS1 2223 CONFIG_PROG_OS1
2229 CONFIG_PROG_OS2 2224 CONFIG_PROG_OS2
2230 CONFIG_PROG_SDRAM_TLB 2225 CONFIG_PROG_SDRAM_TLB
2231 CONFIG_PROG_UBOOT 2226 CONFIG_PROG_UBOOT
2232 CONFIG_PROG_UBOOT1 2227 CONFIG_PROG_UBOOT1
2233 CONFIG_PROG_UBOOT2 2228 CONFIG_PROG_UBOOT2
2234 CONFIG_PROOF_POINTS 2229 CONFIG_PROOF_POINTS
2235 CONFIG_PRPMC_PCI_ALIAS 2230 CONFIG_PRPMC_PCI_ALIAS
2236 CONFIG_PS2KBD 2231 CONFIG_PS2KBD
2237 CONFIG_PS2MULT 2232 CONFIG_PS2MULT
2238 CONFIG_PS2MULT_DELAY 2233 CONFIG_PS2MULT_DELAY
2239 CONFIG_PS2SERIAL 2234 CONFIG_PS2SERIAL
2240 CONFIG_PSC3_USB 2235 CONFIG_PSC3_USB
2241 CONFIG_PSC_CONSOLE 2236 CONFIG_PSC_CONSOLE
2242 CONFIG_PSC_CONSOLE2 2237 CONFIG_PSC_CONSOLE2
2243 CONFIG_PSRAM_SCFG 2238 CONFIG_PSRAM_SCFG
2244 CONFIG_PWM 2239 CONFIG_PWM
2245 CONFIG_PWM_IMX 2240 CONFIG_PWM_IMX
2246 CONFIG_PXA_LCD 2241 CONFIG_PXA_LCD
2247 CONFIG_PXA_MMC_GENERIC 2242 CONFIG_PXA_MMC_GENERIC
2248 CONFIG_PXA_PWR_I2C 2243 CONFIG_PXA_PWR_I2C
2249 CONFIG_PXA_STD_I2C 2244 CONFIG_PXA_STD_I2C
2250 CONFIG_PXA_VGA 2245 CONFIG_PXA_VGA
2251 CONFIG_PXA_VIDEO 2246 CONFIG_PXA_VIDEO
2252 CONFIG_P_CLK_FREQ 2247 CONFIG_P_CLK_FREQ
2253 CONFIG_QBMAN_CLK_DIV 2248 CONFIG_QBMAN_CLK_DIV
2254 CONFIG_QE 2249 CONFIG_QE
2255 CONFIG_QEMU_MIPS 2250 CONFIG_QEMU_MIPS
2256 CONFIG_QIXIS_I2C_ACCESS 2251 CONFIG_QIXIS_I2C_ACCESS
2257 CONFIG_QSPI 2252 CONFIG_QSPI
2258 CONFIG_QSPI_QUAD_SUPPORT 2253 CONFIG_QSPI_QUAD_SUPPORT
2259 CONFIG_QSPI_SEL_GPIO 2254 CONFIG_QSPI_SEL_GPIO
2260 CONFIG_QUOTA 2255 CONFIG_QUOTA
2261 CONFIG_R0P7734 2256 CONFIG_R0P7734
2262 CONFIG_R2DPLUS 2257 CONFIG_R2DPLUS
2263 CONFIG_R7780MP 2258 CONFIG_R7780MP
2264 CONFIG_R8A66597_BASE_ADDR 2259 CONFIG_R8A66597_BASE_ADDR
2265 CONFIG_R8A66597_ENDIAN 2260 CONFIG_R8A66597_ENDIAN
2266 CONFIG_R8A66597_LDRV 2261 CONFIG_R8A66597_LDRV
2267 CONFIG_R8A66597_XTAL 2262 CONFIG_R8A66597_XTAL
2268 CONFIG_R8A7740 2263 CONFIG_R8A7740
2269 CONFIG_R8A7790 2264 CONFIG_R8A7790
2270 CONFIG_R8A7791 2265 CONFIG_R8A7791
2271 CONFIG_R8A7792 2266 CONFIG_R8A7792
2272 CONFIG_R8A7793 2267 CONFIG_R8A7793
2273 CONFIG_R8A7794 2268 CONFIG_R8A7794
2274 CONFIG_RAINIER 2269 CONFIG_RAINIER
2275 CONFIG_RAMBOOT 2270 CONFIG_RAMBOOT
2276 CONFIG_RAMBOOTCOMMAND 2271 CONFIG_RAMBOOTCOMMAND
2277 CONFIG_RAMBOOTCOMMAND_TFTP 2272 CONFIG_RAMBOOTCOMMAND_TFTP
2278 CONFIG_RAMBOOT_NAND 2273 CONFIG_RAMBOOT_NAND
2279 CONFIG_RAMBOOT_PBL 2274 CONFIG_RAMBOOT_PBL
2280 CONFIG_RAMBOOT_SDCARD 2275 CONFIG_RAMBOOT_SDCARD
2281 CONFIG_RAMBOOT_SPIFLASH 2276 CONFIG_RAMBOOT_SPIFLASH
2282 CONFIG_RAMBOOT_TEXT_BASE 2277 CONFIG_RAMBOOT_TEXT_BASE
2283 CONFIG_RAMDISKFILE 2278 CONFIG_RAMDISKFILE
2284 CONFIG_RAMDISK_ADDR 2279 CONFIG_RAMDISK_ADDR
2285 CONFIG_RAMDISK_BOOT 2280 CONFIG_RAMDISK_BOOT
2286 CONFIG_RAM_BOOT 2281 CONFIG_RAM_BOOT
2287 CONFIG_RAM_BOOT_PHYS 2282 CONFIG_RAM_BOOT_PHYS
2288 CONFIG_RANDOM_UUID 2283 CONFIG_RANDOM_UUID
2289 CONFIG_RAPIDIO 2284 CONFIG_RAPIDIO
2290 CONFIG_RCAR_BOARD_STRING 2285 CONFIG_RCAR_BOARD_STRING
2291 CONFIG_RD_LVL 2286 CONFIG_RD_LVL
2292 CONFIG_REALMODE_DEBUG 2287 CONFIG_REALMODE_DEBUG
2293 CONFIG_RED_LED 2288 CONFIG_RED_LED
2294 CONFIG_REFCLK_FREQ 2289 CONFIG_REFCLK_FREQ
2295 CONFIG_REG 2290 CONFIG_REG
2296 CONFIG_REG_0 2291 CONFIG_REG_0
2297 CONFIG_REG_1_BASE 2292 CONFIG_REG_1_BASE
2298 CONFIG_REG_2 2293 CONFIG_REG_2
2299 CONFIG_REG_3 2294 CONFIG_REG_3
2300 CONFIG_REG_8 2295 CONFIG_REG_8
2301 CONFIG_REG_APER_SIZE 2296 CONFIG_REG_APER_SIZE
2302 CONFIG_REMAKE_ELF 2297 CONFIG_REMAKE_ELF
2303 CONFIG_REQ 2298 CONFIG_REQ
2304 CONFIG_RESERVED_01_BASE 2299 CONFIG_RESERVED_01_BASE
2305 CONFIG_RESERVED_02_BASE 2300 CONFIG_RESERVED_02_BASE
2306 CONFIG_RESERVED_03_BASE 2301 CONFIG_RESERVED_03_BASE
2307 CONFIG_RESERVED_04_BASE 2302 CONFIG_RESERVED_04_BASE
2308 CONFIG_RESET 2303 CONFIG_RESET
2309 CONFIG_RESET_PHY_R 2304 CONFIG_RESET_PHY_R
2310 CONFIG_RESET_TO_RETRY 2305 CONFIG_RESET_TO_RETRY
2311 CONFIG_RESET_VECTOR_ADDRESS 2306 CONFIG_RESET_VECTOR_ADDRESS
2312 CONFIG_RESTORE_FLASH 2307 CONFIG_RESTORE_FLASH
2313 CONFIG_RES_BLOCK_SIZE 2308 CONFIG_RES_BLOCK_SIZE
2314 CONFIG_REV1 2309 CONFIG_REV1
2315 CONFIG_REV3 2310 CONFIG_REV3
2316 CONFIG_REVISION_TAG 2311 CONFIG_REVISION_TAG
2317 CONFIG_RFSPART 2312 CONFIG_RFSPART
2318 CONFIG_RIO 2313 CONFIG_RIO
2319 CONFIG_RMII 2314 CONFIG_RMII
2320 CONFIG_RMOBILE_BOARD_STRING 2315 CONFIG_RMOBILE_BOARD_STRING
2321 CONFIG_RMSTP0_ENA 2316 CONFIG_RMSTP0_ENA
2322 CONFIG_RMSTP10_ENA 2317 CONFIG_RMSTP10_ENA
2323 CONFIG_RMSTP11_ENA 2318 CONFIG_RMSTP11_ENA
2324 CONFIG_RMSTP1_ENA 2319 CONFIG_RMSTP1_ENA
2325 CONFIG_RMSTP2_ENA 2320 CONFIG_RMSTP2_ENA
2326 CONFIG_RMSTP3_ENA 2321 CONFIG_RMSTP3_ENA
2327 CONFIG_RMSTP4_ENA 2322 CONFIG_RMSTP4_ENA
2328 CONFIG_RMSTP5_ENA 2323 CONFIG_RMSTP5_ENA
2329 CONFIG_RMSTP6_ENA 2324 CONFIG_RMSTP6_ENA
2330 CONFIG_RMSTP7_ENA 2325 CONFIG_RMSTP7_ENA
2331 CONFIG_RMSTP8_ENA 2326 CONFIG_RMSTP8_ENA
2332 CONFIG_RMSTP9_ENA 2327 CONFIG_RMSTP9_ENA
2333 CONFIG_ROCKCHIP_CHIP_TAG 2328 CONFIG_ROCKCHIP_CHIP_TAG
2334 CONFIG_ROCKCHIP_MAX_INIT_SIZE 2329 CONFIG_ROCKCHIP_MAX_INIT_SIZE
2335 CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 2330 CONFIG_ROCKCHIP_SDHCI_MAX_FREQ
2336 CONFIG_ROCKCHIP_USB2_PHY 2331 CONFIG_ROCKCHIP_USB2_PHY
2337 CONFIG_ROM_STUBS 2332 CONFIG_ROM_STUBS
2338 CONFIG_ROOTFS_OFFSET 2333 CONFIG_ROOTFS_OFFSET
2339 CONFIG_ROOTPATH 2334 CONFIG_ROOTPATH
2340 CONFIG_RSK7203 2335 CONFIG_RSK7203
2341 CONFIG_RSK7264 2336 CONFIG_RSK7264
2342 CONFIG_RSK7269 2337 CONFIG_RSK7269
2343 CONFIG_RTC_DS1307 2338 CONFIG_RTC_DS1307
2344 CONFIG_RTC_DS1337 2339 CONFIG_RTC_DS1337
2345 CONFIG_RTC_DS1338 2340 CONFIG_RTC_DS1338
2346 CONFIG_RTC_DS1374 2341 CONFIG_RTC_DS1374
2347 CONFIG_RTC_DS1388 2342 CONFIG_RTC_DS1388
2348 CONFIG_RTC_DS1556 2343 CONFIG_RTC_DS1556
2349 CONFIG_RTC_DS174x 2344 CONFIG_RTC_DS174x
2350 CONFIG_RTC_DS3231 2345 CONFIG_RTC_DS3231
2351 CONFIG_RTC_FTRTC010 2346 CONFIG_RTC_FTRTC010
2352 CONFIG_RTC_IMXDI 2347 CONFIG_RTC_IMXDI
2353 CONFIG_RTC_INTERNAL 2348 CONFIG_RTC_INTERNAL
2354 CONFIG_RTC_M41T11 2349 CONFIG_RTC_M41T11
2355 CONFIG_RTC_M41T60 2350 CONFIG_RTC_M41T60
2356 CONFIG_RTC_M41T62 2351 CONFIG_RTC_M41T62
2357 CONFIG_RTC_M48T35A 2352 CONFIG_RTC_M48T35A
2358 CONFIG_RTC_MC13XXX 2353 CONFIG_RTC_MC13XXX
2359 CONFIG_RTC_MC146818 2354 CONFIG_RTC_MC146818
2360 CONFIG_RTC_MCFRRTC 2355 CONFIG_RTC_MCFRRTC
2361 CONFIG_RTC_MCP79411 2356 CONFIG_RTC_MCP79411
2362 CONFIG_RTC_MPC5200 2357 CONFIG_RTC_MPC5200
2363 CONFIG_RTC_MPC8xx 2358 CONFIG_RTC_MPC8xx
2364 CONFIG_RTC_MV 2359 CONFIG_RTC_MV
2365 CONFIG_RTC_MXS 2360 CONFIG_RTC_MXS
2366 CONFIG_RTC_PCF8563 2361 CONFIG_RTC_PCF8563
2367 CONFIG_RTC_PT7C4338 2362 CONFIG_RTC_PT7C4338
2368 CONFIG_RTC_RTC4543 2363 CONFIG_RTC_RTC4543
2369 CONFIG_RTC_RV3029 2364 CONFIG_RTC_RV3029
2370 CONFIG_RTC_RX8025 2365 CONFIG_RTC_RX8025
2371 CONFIG_RTC_X1205 2366 CONFIG_RTC_X1205
2372 CONFIG_RUN_FROM_DDR0 2367 CONFIG_RUN_FROM_DDR0
2373 CONFIG_RUN_FROM_DDR1 2368 CONFIG_RUN_FROM_DDR1
2374 CONFIG_RUN_FROM_IRAM_ONLY 2369 CONFIG_RUN_FROM_IRAM_ONLY
2375 CONFIG_RX_DESCR_NUM 2370 CONFIG_RX_DESCR_NUM
2376 CONFIG_S32V234 2371 CONFIG_S32V234
2377 CONFIG_S3C2400 2372 CONFIG_S3C2400
2378 CONFIG_S3C2410 2373 CONFIG_S3C2410
2379 CONFIG_S3C2410_NAND_BBT 2374 CONFIG_S3C2410_NAND_BBT
2380 CONFIG_S3C2410_NAND_HWECC 2375 CONFIG_S3C2410_NAND_HWECC
2381 CONFIG_S3C2440 2376 CONFIG_S3C2440
2382 CONFIG_S3C24X0 2377 CONFIG_S3C24X0
2383 CONFIG_S3C24XX_TACLS 2378 CONFIG_S3C24XX_TACLS
2384 CONFIG_S3C24XX_TWRPH0 2379 CONFIG_S3C24XX_TWRPH0
2385 CONFIG_S3C24XX_TWRPH1 2380 CONFIG_S3C24XX_TWRPH1
2386 CONFIG_S3D2_CLK_FREQ 2381 CONFIG_S3D2_CLK_FREQ
2387 CONFIG_S5P 2382 CONFIG_S5P
2388 CONFIG_S5PC100 2383 CONFIG_S5PC100
2389 CONFIG_S5PC110 2384 CONFIG_S5PC110
2390 CONFIG_S5P_PA_SYSRAM 2385 CONFIG_S5P_PA_SYSRAM
2391 CONFIG_S6E63D6 2386 CONFIG_S6E63D6
2392 CONFIG_S6E8AX0 2387 CONFIG_S6E8AX0
2393 CONFIG_SABRELITE 2388 CONFIG_SABRELITE
2394 CONFIG_SAMA5D2 2389 CONFIG_SAMA5D2
2395 CONFIG_SAMA5D3 2390 CONFIG_SAMA5D3
2396 CONFIG_SAMA5D3_LCD_BASE 2391 CONFIG_SAMA5D3_LCD_BASE
2397 CONFIG_SAMA5D4 2392 CONFIG_SAMA5D4
2398 CONFIG_SAMSUNG 2393 CONFIG_SAMSUNG
2399 CONFIG_SAMSUNG_ONENAND 2394 CONFIG_SAMSUNG_ONENAND
2400 CONFIG_SANDBOX_ARCH 2395 CONFIG_SANDBOX_ARCH
2401 CONFIG_SANDBOX_BIG_ENDIAN 2396 CONFIG_SANDBOX_BIG_ENDIAN
2402 CONFIG_SANDBOX_BITS_PER_LONG 2397 CONFIG_SANDBOX_BITS_PER_LONG
2403 CONFIG_SANDBOX_SDL 2398 CONFIG_SANDBOX_SDL
2404 CONFIG_SANDBOX_SPI_MAX_BUS 2399 CONFIG_SANDBOX_SPI_MAX_BUS
2405 CONFIG_SANDBOX_SPI_MAX_CS 2400 CONFIG_SANDBOX_SPI_MAX_CS
2406 CONFIG_SAR2_REG 2401 CONFIG_SAR2_REG
2407 CONFIG_SAR_REG 2402 CONFIG_SAR_REG
2408 CONFIG_SATA1 2403 CONFIG_SATA1
2409 CONFIG_SATA2 2404 CONFIG_SATA2
2410 CONFIG_SATA_DWC 2405 CONFIG_SATA_DWC
2411 CONFIG_SATA_MV 2406 CONFIG_SATA_MV
2412 CONFIG_SATA_SIL 2407 CONFIG_SATA_SIL
2413 CONFIG_SATA_SIL3114 2408 CONFIG_SATA_SIL3114
2414 CONFIG_SATA_ULI5288 2409 CONFIG_SATA_ULI5288
2415 CONFIG_SBC8349 2410 CONFIG_SBC8349
2416 CONFIG_SBC8548 2411 CONFIG_SBC8548
2417 CONFIG_SBC8641D 2412 CONFIG_SBC8641D
2418 CONFIG_SCC1_ENET 2413 CONFIG_SCC1_ENET
2419 CONFIG_SCC2_ENET 2414 CONFIG_SCC2_ENET
2420 CONFIG_SCF0403_LCD 2415 CONFIG_SCF0403_LCD
2421 CONFIG_SCIF 2416 CONFIG_SCIF
2422 CONFIG_SCIF_A 2417 CONFIG_SCIF_A
2423 CONFIG_SCIF_CONSOLE 2418 CONFIG_SCIF_CONSOLE
2424 CONFIG_SCIF_EXT_CLOCK 2419 CONFIG_SCIF_EXT_CLOCK
2425 CONFIG_SCIF_USE_EXT_CLK 2420 CONFIG_SCIF_USE_EXT_CLK
2426 CONFIG_SCSI 2421 CONFIG_SCSI
2427 CONFIG_SCSI_AHCI 2422 CONFIG_SCSI_AHCI
2428 CONFIG_SCSI_AHCI_PLAT 2423 CONFIG_SCSI_AHCI_PLAT
2429 CONFIG_SCSI_DEV_ID 2424 CONFIG_SCSI_DEV_ID
2430 CONFIG_SCSI_DEV_LIST 2425 CONFIG_SCSI_DEV_LIST
2431 CONFIG_SCSI_SYM53C8XX 2426 CONFIG_SCSI_SYM53C8XX
2432 CONFIG_SC_TIMER_CLK 2427 CONFIG_SC_TIMER_CLK
2433 CONFIG_SDCARD 2428 CONFIG_SDCARD
2434 CONFIG_SDRAM_BANK0 2429 CONFIG_SDRAM_BANK0
2435 CONFIG_SDRAM_BANK1 2430 CONFIG_SDRAM_BANK1
2436 CONFIG_SDRAM_ECC 2431 CONFIG_SDRAM_ECC
2437 CONFIG_SDRAM_OFFSET_FOR_RT 2432 CONFIG_SDRAM_OFFSET_FOR_RT
2438 CONFIG_SDRAM_PPC4xx_DENALI_DDR2 2433 CONFIG_SDRAM_PPC4xx_DENALI_DDR2
2439 CONFIG_SDRAM_PPC4xx_IBM_DDR 2434 CONFIG_SDRAM_PPC4xx_IBM_DDR
2440 CONFIG_SDRAM_PPC4xx_IBM_DDR2 2435 CONFIG_SDRAM_PPC4xx_IBM_DDR2
2441 CONFIG_SDRAM_PPC4xx_IBM_SDRAM 2436 CONFIG_SDRAM_PPC4xx_IBM_SDRAM
2442 CONFIG_SDRC 2437 CONFIG_SDRC
2443 CONFIG_SDR_MT48LC16M16A2 2438 CONFIG_SDR_MT48LC16M16A2
2444 CONFIG_SD_BOOT_QSPI 2439 CONFIG_SD_BOOT_QSPI
2445 CONFIG_SECBOOT 2440 CONFIG_SECBOOT
2446 CONFIG_SECURE_BL1_ONLY 2441 CONFIG_SECURE_BL1_ONLY
2447 CONFIG_SECURE_RUNTIME_RESV_SRAM_SZ 2442 CONFIG_SECURE_RUNTIME_RESV_SRAM_SZ
2448 CONFIG_SECURITY 2443 CONFIG_SECURITY
2449 CONFIG_SEC_DEQ_TIMEOUT 2444 CONFIG_SEC_DEQ_TIMEOUT
2450 CONFIG_SEC_FW_SIZE 2445 CONFIG_SEC_FW_SIZE
2451 CONFIG_SELECTED 2446 CONFIG_SELECTED
2452 CONFIG_SEQUOIA 2447 CONFIG_SEQUOIA
2453 CONFIG_SERIAL0 2448 CONFIG_SERIAL0
2454 CONFIG_SERIAL1 2449 CONFIG_SERIAL1
2455 CONFIG_SERIAL2 2450 CONFIG_SERIAL2
2456 CONFIG_SERIAL3 2451 CONFIG_SERIAL3
2457 CONFIG_SERIAL_BOOT 2452 CONFIG_SERIAL_BOOT
2458 CONFIG_SERIAL_FLASH 2453 CONFIG_SERIAL_FLASH
2459 CONFIG_SERIAL_HW_FLOW_CONTROL 2454 CONFIG_SERIAL_HW_FLOW_CONTROL
2460 CONFIG_SERIAL_MULTI 2455 CONFIG_SERIAL_MULTI
2461 CONFIG_SERIAL_SOFTWARE_FIFO 2456 CONFIG_SERIAL_SOFTWARE_FIFO
2462 CONFIG_SERIAL_TAG 2457 CONFIG_SERIAL_TAG
2463 CONFIG_SERIRQ_CONTINUOUS_MODE 2458 CONFIG_SERIRQ_CONTINUOUS_MODE
2464 CONFIG_SERVERIP 2459 CONFIG_SERVERIP
2465 CONFIG_SETUP_INITRD_TAG 2460 CONFIG_SETUP_INITRD_TAG
2466 CONFIG_SETUP_MEMORY_TAGS 2461 CONFIG_SETUP_MEMORY_TAGS
2467 CONFIG_SET_BIST 2462 CONFIG_SET_BIST
2468 CONFIG_SET_BOOTARGS 2463 CONFIG_SET_BOOTARGS
2469 CONFIG_SET_DFU_ALT_BUF_LEN 2464 CONFIG_SET_DFU_ALT_BUF_LEN
2470 CONFIG_SET_DFU_ALT_INFO 2465 CONFIG_SET_DFU_ALT_INFO
2471 CONFIG_SFIO 2466 CONFIG_SFIO
2472 CONFIG_SF_DATAFLASH 2467 CONFIG_SF_DATAFLASH
2473 CONFIG_SF_DEFAULT_BUS 2468 CONFIG_SF_DEFAULT_BUS
2474 CONFIG_SF_DEFAULT_CS 2469 CONFIG_SF_DEFAULT_CS
2475 CONFIG_SF_DEFAULT_MODE 2470 CONFIG_SF_DEFAULT_MODE
2476 CONFIG_SF_DEFAULT_SPEED 2471 CONFIG_SF_DEFAULT_SPEED
2477 CONFIG_SF_DUAL_FLASH 2472 CONFIG_SF_DUAL_FLASH
2478 CONFIG_SGI_IP28 2473 CONFIG_SGI_IP28
2479 CONFIG_SH4_PCI 2474 CONFIG_SH4_PCI
2480 CONFIG_SH73A0 2475 CONFIG_SH73A0
2481 CONFIG_SH7751_PCI 2476 CONFIG_SH7751_PCI
2482 CONFIG_SH7752EVB 2477 CONFIG_SH7752EVB
2483 CONFIG_SH7753EVB 2478 CONFIG_SH7753EVB
2484 CONFIG_SH7757LCR 2479 CONFIG_SH7757LCR
2485 CONFIG_SH7757LCR_DDR_ECC 2480 CONFIG_SH7757LCR_DDR_ECC
2486 CONFIG_SH7763RDP 2481 CONFIG_SH7763RDP
2487 CONFIG_SH7780_PCI 2482 CONFIG_SH7780_PCI
2488 CONFIG_SH7780_PCI_BAR 2483 CONFIG_SH7780_PCI_BAR
2489 CONFIG_SH7780_PCI_LAR 2484 CONFIG_SH7780_PCI_LAR
2490 CONFIG_SH7780_PCI_LSR 2485 CONFIG_SH7780_PCI_LSR
2491 CONFIG_SH7785LCR 2486 CONFIG_SH7785LCR
2492 CONFIG_SHA1SUM_VERIFY 2487 CONFIG_SHA1SUM_VERIFY
2493 CONFIG_SHARP_16x9 2488 CONFIG_SHARP_16x9
2494 CONFIG_SHARP_LM8V31 2489 CONFIG_SHARP_LM8V31
2495 CONFIG_SHARP_LQ035Q7DH06 2490 CONFIG_SHARP_LQ035Q7DH06
2496 CONFIG_SHARP_LQ057Q3DC02 2491 CONFIG_SHARP_LQ057Q3DC02
2497 CONFIG_SHARP_LQ065T9DR51U 2492 CONFIG_SHARP_LQ065T9DR51U
2498 CONFIG_SHARP_LQ084V1DG21 2493 CONFIG_SHARP_LQ084V1DG21
2499 CONFIG_SHARP_LQ104V7DS01 2494 CONFIG_SHARP_LQ104V7DS01
2500 CONFIG_SHARP_LQ64D341 2495 CONFIG_SHARP_LQ64D341
2501 CONFIG_SHEEVA_88SV131 2496 CONFIG_SHEEVA_88SV131
2502 CONFIG_SHEEVA_88SV331xV5 2497 CONFIG_SHEEVA_88SV331xV5
2503 CONFIG_SHELL 2498 CONFIG_SHELL
2504 CONFIG_SHMIN 2499 CONFIG_SHMIN
2505 CONFIG_SHOW_ACTIVITY 2500 CONFIG_SHOW_ACTIVITY
2506 CONFIG_SHOW_BOOT_PROGRESS 2501 CONFIG_SHOW_BOOT_PROGRESS
2507 CONFIG_SH_CMT_CLK_FREQ 2502 CONFIG_SH_CMT_CLK_FREQ
2508 CONFIG_SH_DSP 2503 CONFIG_SH_DSP
2509 CONFIG_SH_ETHER 2504 CONFIG_SH_ETHER
2510 CONFIG_SH_ETHER_ALIGNE_SIZE 2505 CONFIG_SH_ETHER_ALIGNE_SIZE
2511 CONFIG_SH_ETHER_BASE_ADDR 2506 CONFIG_SH_ETHER_BASE_ADDR
2512 CONFIG_SH_ETHER_CACHE_INVALIDATE 2507 CONFIG_SH_ETHER_CACHE_INVALIDATE
2513 CONFIG_SH_ETHER_CACHE_WRITEBACK 2508 CONFIG_SH_ETHER_CACHE_WRITEBACK
2514 CONFIG_SH_ETHER_PHY_ADDR 2509 CONFIG_SH_ETHER_PHY_ADDR
2515 CONFIG_SH_ETHER_PHY_MODE 2510 CONFIG_SH_ETHER_PHY_MODE
2516 CONFIG_SH_ETHER_SH7734_MII 2511 CONFIG_SH_ETHER_SH7734_MII
2517 CONFIG_SH_ETHER_USE_GETHER 2512 CONFIG_SH_ETHER_USE_GETHER
2518 CONFIG_SH_ETHER_USE_PORT 2513 CONFIG_SH_ETHER_USE_PORT
2519 CONFIG_SH_GPIO_PFC 2514 CONFIG_SH_GPIO_PFC
2520 CONFIG_SH_I2C_8BIT 2515 CONFIG_SH_I2C_8BIT
2521 CONFIG_SH_I2C_BASE0 2516 CONFIG_SH_I2C_BASE0
2522 CONFIG_SH_I2C_BASE1 2517 CONFIG_SH_I2C_BASE1
2523 CONFIG_SH_I2C_CLOCK 2518 CONFIG_SH_I2C_CLOCK
2524 CONFIG_SH_I2C_DATA_HIGH 2519 CONFIG_SH_I2C_DATA_HIGH
2525 CONFIG_SH_I2C_DATA_LOW 2520 CONFIG_SH_I2C_DATA_LOW
2526 CONFIG_SH_MMCIF 2521 CONFIG_SH_MMCIF
2527 CONFIG_SH_MMCIF_ADDR 2522 CONFIG_SH_MMCIF_ADDR
2528 CONFIG_SH_MMCIF_CLK 2523 CONFIG_SH_MMCIF_CLK
2529 CONFIG_SH_QSPI 2524 CONFIG_SH_QSPI
2530 CONFIG_SH_QSPI_BASE 2525 CONFIG_SH_QSPI_BASE
2531 CONFIG_SH_SCIF_CLK_FREQ 2526 CONFIG_SH_SCIF_CLK_FREQ
2532 CONFIG_SH_SDHI_FREQ 2527 CONFIG_SH_SDHI_FREQ
2533 CONFIG_SH_SDRAM_OFFSET 2528 CONFIG_SH_SDRAM_OFFSET
2534 CONFIG_SH_SH7734_I2C 2529 CONFIG_SH_SH7734_I2C
2535 CONFIG_SH_SPI 2530 CONFIG_SH_SPI
2536 CONFIG_SH_SPI_BASE 2531 CONFIG_SH_SPI_BASE
2537 CONFIG_SH_TMU_CLK_FREQ 2532 CONFIG_SH_TMU_CLK_FREQ
2538 CONFIG_SIEMENS_DRACO 2533 CONFIG_SIEMENS_DRACO
2539 CONFIG_SIEMENS_MACH_TYPE 2534 CONFIG_SIEMENS_MACH_TYPE
2540 CONFIG_SIEMENS_PXM2 2535 CONFIG_SIEMENS_PXM2
2541 CONFIG_SIEMENS_RUT 2536 CONFIG_SIEMENS_RUT
2542 CONFIG_SIMU 2537 CONFIG_SIMU
2543 CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION 2538 CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION
2544 CONFIG_SKIP_LOWLEVEL_INIT 2539 CONFIG_SKIP_LOWLEVEL_INIT
2545 CONFIG_SKIP_LOWLEVEL_INIT_ONLY 2540 CONFIG_SKIP_LOWLEVEL_INIT_ONLY
2546 CONFIG_SKIP_TRUNOFF_WATCHDOG 2541 CONFIG_SKIP_TRUNOFF_WATCHDOG
2547 CONFIG_SLIC 2542 CONFIG_SLIC
2548 CONFIG_SLTTMR 2543 CONFIG_SLTTMR
2549 CONFIG_SMC91111 2544 CONFIG_SMC91111
2550 CONFIG_SMC91111_BASE 2545 CONFIG_SMC91111_BASE
2551 CONFIG_SMC91111_EXT_PHY 2546 CONFIG_SMC91111_EXT_PHY
2552 CONFIG_SMC911X 2547 CONFIG_SMC911X
2553 CONFIG_SMC911X_16_BIT 2548 CONFIG_SMC911X_16_BIT
2554 CONFIG_SMC911X_32_BIT 2549 CONFIG_SMC911X_32_BIT
2555 CONFIG_SMC911X_BASE 2550 CONFIG_SMC911X_BASE
2556 CONFIG_SMC911X_NO_EEPROM 2551 CONFIG_SMC911X_NO_EEPROM
2557 CONFIG_SMC_AUTONEG_TIMEOUT 2552 CONFIG_SMC_AUTONEG_TIMEOUT
2558 CONFIG_SMC_USE_32_BIT 2553 CONFIG_SMC_USE_32_BIT
2559 CONFIG_SMC_USE_IOFUNCS 2554 CONFIG_SMC_USE_IOFUNCS
2560 CONFIG_SMDK5420 2555 CONFIG_SMDK5420
2561 CONFIG_SMDKC100 2556 CONFIG_SMDKC100
2562 CONFIG_SMDKV310 2557 CONFIG_SMDKV310
2563 CONFIG_SMP_PEN_ADDR 2558 CONFIG_SMP_PEN_ADDR
2564 CONFIG_SMSC_LPC47M 2559 CONFIG_SMSC_LPC47M
2565 CONFIG_SMSC_SIO1007 2560 CONFIG_SMSC_SIO1007
2566 CONFIG_SMSTP0_ENA 2561 CONFIG_SMSTP0_ENA
2567 CONFIG_SMSTP10_ENA 2562 CONFIG_SMSTP10_ENA
2568 CONFIG_SMSTP11_ENA 2563 CONFIG_SMSTP11_ENA
2569 CONFIG_SMSTP1_ENA 2564 CONFIG_SMSTP1_ENA
2570 CONFIG_SMSTP2_ENA 2565 CONFIG_SMSTP2_ENA
2571 CONFIG_SMSTP3_ENA 2566 CONFIG_SMSTP3_ENA
2572 CONFIG_SMSTP4_ENA 2567 CONFIG_SMSTP4_ENA
2573 CONFIG_SMSTP5_ENA 2568 CONFIG_SMSTP5_ENA
2574 CONFIG_SMSTP6_ENA 2569 CONFIG_SMSTP6_ENA
2575 CONFIG_SMSTP7_ENA 2570 CONFIG_SMSTP7_ENA
2576 CONFIG_SMSTP8_ENA 2571 CONFIG_SMSTP8_ENA
2577 CONFIG_SMSTP9_ENA 2572 CONFIG_SMSTP9_ENA
2578 CONFIG_SOCFPGA_VIRTUAL_TARGET 2573 CONFIG_SOCFPGA_VIRTUAL_TARGET
2579 CONFIG_SOCRATES 2574 CONFIG_SOCRATES
2580 CONFIG_SOC_AU1000 2575 CONFIG_SOC_AU1000
2581 CONFIG_SOC_AU1100 2576 CONFIG_SOC_AU1100
2582 CONFIG_SOC_AU1500 2577 CONFIG_SOC_AU1500
2583 CONFIG_SOC_AU1550 2578 CONFIG_SOC_AU1550
2584 CONFIG_SOC_AU1X00 2579 CONFIG_SOC_AU1X00
2585 CONFIG_SOC_DA850 2580 CONFIG_SOC_DA850
2586 CONFIG_SOC_DA8XX 2581 CONFIG_SOC_DA8XX
2587 CONFIG_SOC_DM355 2582 CONFIG_SOC_DM355
2588 CONFIG_SOC_DM365 2583 CONFIG_SOC_DM365
2589 CONFIG_SOC_DM644X 2584 CONFIG_SOC_DM644X
2590 CONFIG_SOC_DM646X 2585 CONFIG_SOC_DM646X
2591 CONFIG_SOC_K2E 2586 CONFIG_SOC_K2E
2592 CONFIG_SOC_K2G 2587 CONFIG_SOC_K2G
2593 CONFIG_SOC_K2HK 2588 CONFIG_SOC_K2HK
2594 CONFIG_SOC_K2L 2589 CONFIG_SOC_K2L
2595 CONFIG_SOC_KEYSTONE 2590 CONFIG_SOC_KEYSTONE
2596 CONFIG_SOC_OMAP3430 2591 CONFIG_SOC_OMAP3430
2597 CONFIG_SOFT_I2C_GPIO_SCL 2592 CONFIG_SOFT_I2C_GPIO_SCL
2598 CONFIG_SOFT_I2C_GPIO_SDA 2593 CONFIG_SOFT_I2C_GPIO_SDA
2599 CONFIG_SOFT_I2C_READ_REPEATED_START 2594 CONFIG_SOFT_I2C_READ_REPEATED_START
2600 CONFIG_SOFT_SPI 2595 CONFIG_SOFT_SPI
2601 CONFIG_SOFT_TWS 2596 CONFIG_SOFT_TWS
2602 CONFIG_SOURCE 2597 CONFIG_SOURCE
2603 CONFIG_SPARSE_RCU_POINTER 2598 CONFIG_SPARSE_RCU_POINTER
2604 CONFIG_SPDDRAM_SILENT 2599 CONFIG_SPDDRAM_SILENT
2605 CONFIG_SPD_EEPROM 2600 CONFIG_SPD_EEPROM
2606 CONFIG_SPEAR300 2601 CONFIG_SPEAR300
2607 CONFIG_SPEAR310 2602 CONFIG_SPEAR310
2608 CONFIG_SPEAR320 2603 CONFIG_SPEAR320
2609 CONFIG_SPEAR3XX 2604 CONFIG_SPEAR3XX
2610 CONFIG_SPEAR600 2605 CONFIG_SPEAR600
2611 CONFIG_SPEAR_BOOTSTRAPCFG 2606 CONFIG_SPEAR_BOOTSTRAPCFG
2612 CONFIG_SPEAR_BOOTSTRAPMASK 2607 CONFIG_SPEAR_BOOTSTRAPMASK
2613 CONFIG_SPEAR_BOOTSTRAPSHFT 2608 CONFIG_SPEAR_BOOTSTRAPSHFT
2614 CONFIG_SPEAR_EMI 2609 CONFIG_SPEAR_EMI
2615 CONFIG_SPEAR_EMIBASE 2610 CONFIG_SPEAR_EMIBASE
2616 CONFIG_SPEAR_ETHBASE 2611 CONFIG_SPEAR_ETHBASE
2617 CONFIG_SPEAR_GPIO 2612 CONFIG_SPEAR_GPIO
2618 CONFIG_SPEAR_HZ 2613 CONFIG_SPEAR_HZ
2619 CONFIG_SPEAR_HZ_CLOCK 2614 CONFIG_SPEAR_HZ_CLOCK
2620 CONFIG_SPEAR_MISCBASE 2615 CONFIG_SPEAR_MISCBASE
2621 CONFIG_SPEAR_MPMCBASE 2616 CONFIG_SPEAR_MPMCBASE
2622 CONFIG_SPEAR_MPMCREGS 2617 CONFIG_SPEAR_MPMCREGS
2623 CONFIG_SPEAR_NORNAND16BOOT 2618 CONFIG_SPEAR_NORNAND16BOOT
2624 CONFIG_SPEAR_NORNAND8BOOT 2619 CONFIG_SPEAR_NORNAND8BOOT
2625 CONFIG_SPEAR_NORNANDBOOT 2620 CONFIG_SPEAR_NORNANDBOOT
2626 CONFIG_SPEAR_ONLYSNORBOOT 2621 CONFIG_SPEAR_ONLYSNORBOOT
2627 CONFIG_SPEAR_RASBASE 2622 CONFIG_SPEAR_RASBASE
2628 CONFIG_SPEAR_SYSCNTLBASE 2623 CONFIG_SPEAR_SYSCNTLBASE
2629 CONFIG_SPEAR_TIMERBASE 2624 CONFIG_SPEAR_TIMERBASE
2630 CONFIG_SPEAR_UART48M 2625 CONFIG_SPEAR_UART48M
2631 CONFIG_SPEAR_UARTCLKMSK 2626 CONFIG_SPEAR_UARTCLKMSK
2632 CONFIG_SPEAR_USBBOOT 2627 CONFIG_SPEAR_USBBOOT
2633 CONFIG_SPEAR_USBTTY 2628 CONFIG_SPEAR_USBTTY
2634 CONFIG_SPI 2629 CONFIG_SPI
2635 CONFIG_SPI_ADDR 2630 CONFIG_SPI_ADDR
2636 CONFIG_SPI_BOOTING 2631 CONFIG_SPI_BOOTING
2637 CONFIG_SPI_CS_IS_VALID 2632 CONFIG_SPI_CS_IS_VALID
2638 CONFIG_SPI_DATAFLASH_WRITE_VERIFY 2633 CONFIG_SPI_DATAFLASH_WRITE_VERIFY
2639 CONFIG_SPI_FLASH_ISSI 2634 CONFIG_SPI_FLASH_ISSI
2640 CONFIG_SPI_FLASH_QUAD 2635 CONFIG_SPI_FLASH_QUAD
2641 CONFIG_SPI_FLASH_SIZE 2636 CONFIG_SPI_FLASH_SIZE
2642 CONFIG_SPI_HALF_DUPLEX 2637 CONFIG_SPI_HALF_DUPLEX
2643 CONFIG_SPI_IDLE_VAL 2638 CONFIG_SPI_IDLE_VAL
2644 CONFIG_SPI_LENGTH 2639 CONFIG_SPI_LENGTH
2645 CONFIG_SPI_N25Q256A_RESET 2640 CONFIG_SPI_N25Q256A_RESET
2646 CONFIG_SPLASHIMAGE_GUARD 2641 CONFIG_SPLASHIMAGE_GUARD
2647 CONFIG_SPLASH_SCREEN 2642 CONFIG_SPLASH_SCREEN
2648 CONFIG_SPLASH_SCREEN_ALIGN 2643 CONFIG_SPLASH_SCREEN_ALIGN
2649 CONFIG_SPLASH_SOURCE 2644 CONFIG_SPLASH_SOURCE
2650 CONFIG_SPLL_FREQ 2645 CONFIG_SPLL_FREQ
2651 CONFIG_SPL_ 2646 CONFIG_SPL_
2652 CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC 2647 CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
2653 CONFIG_SPL_ATMEL_SIZE 2648 CONFIG_SPL_ATMEL_SIZE
2654 CONFIG_SPL_BOARD_INIT 2649 CONFIG_SPL_BOARD_INIT
2655 CONFIG_SPL_BOARD_LOAD_IMAGE 2650 CONFIG_SPL_BOARD_LOAD_IMAGE
2656 CONFIG_SPL_BOOTROM_SAVE 2651 CONFIG_SPL_BOOTROM_SAVE
2657 CONFIG_SPL_BOOT_DEVICE 2652 CONFIG_SPL_BOOT_DEVICE
2658 CONFIG_SPL_BSS_MAX_SIZE 2653 CONFIG_SPL_BSS_MAX_SIZE
2659 CONFIG_SPL_BSS_START_ADDR 2654 CONFIG_SPL_BSS_START_ADDR
2660 CONFIG_SPL_CMT 2655 CONFIG_SPL_CMT
2661 CONFIG_SPL_CMT_DEBUG 2656 CONFIG_SPL_CMT_DEBUG
2662 CONFIG_SPL_COMMON_INIT_DDR 2657 CONFIG_SPL_COMMON_INIT_DDR
2663 CONFIG_SPL_CONSOLE 2658 CONFIG_SPL_CONSOLE
2664 CONFIG_SPL_ETH_DEVICE 2659 CONFIG_SPL_ETH_DEVICE
2665 CONFIG_SPL_FLUSH_IMAGE 2660 CONFIG_SPL_FLUSH_IMAGE
2666 CONFIG_SPL_FRAMEWORK 2661 CONFIG_SPL_FRAMEWORK
2667 CONFIG_SPL_FSL_PBL 2662 CONFIG_SPL_FSL_PBL
2668 CONFIG_SPL_FS_LOAD_ARGS_NAME 2663 CONFIG_SPL_FS_LOAD_ARGS_NAME
2669 CONFIG_SPL_FS_LOAD_KERNEL_NAME 2664 CONFIG_SPL_FS_LOAD_KERNEL_NAME
2670 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME 2665 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
2671 CONFIG_SPL_GD_ADDR 2666 CONFIG_SPL_GD_ADDR
2672 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER 2667 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
2673 CONFIG_SPL_INIT_MINIMAL 2668 CONFIG_SPL_INIT_MINIMAL
2674 CONFIG_SPL_JR0_LIODN_NS 2669 CONFIG_SPL_JR0_LIODN_NS
2675 CONFIG_SPL_JR0_LIODN_S 2670 CONFIG_SPL_JR0_LIODN_S
2676 CONFIG_SPL_LDSCRIPT 2671 CONFIG_SPL_LDSCRIPT
2677 CONFIG_SPL_LOAD_FIT_ADDRESS 2672 CONFIG_SPL_LOAD_FIT_ADDRESS
2678 CONFIG_SPL_MAX_FOOTPRINT 2673 CONFIG_SPL_MAX_FOOTPRINT
2679 CONFIG_SPL_MAX_PEB_SIZE 2674 CONFIG_SPL_MAX_PEB_SIZE
2680 CONFIG_SPL_MAX_SIZE 2675 CONFIG_SPL_MAX_SIZE
2681 CONFIG_SPL_MMC_BOOT 2676 CONFIG_SPL_MMC_BOOT
2682 CONFIG_SPL_MMC_LOAD 2677 CONFIG_SPL_MMC_LOAD
2683 CONFIG_SPL_MMC_MINIMAL 2678 CONFIG_SPL_MMC_MINIMAL
2684 CONFIG_SPL_MPC83XX_WAIT_FOR_NAND 2679 CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
2685 CONFIG_SPL_MXS_PSWITCH_WAIT 2680 CONFIG_SPL_MXS_PSWITCH_WAIT
2686 CONFIG_SPL_NAND_AM33XX_BCH 2681 CONFIG_SPL_NAND_AM33XX_BCH
2687 CONFIG_SPL_NAND_BASE 2682 CONFIG_SPL_NAND_BASE
2688 CONFIG_SPL_NAND_BOOT 2683 CONFIG_SPL_NAND_BOOT
2689 CONFIG_SPL_NAND_DRIVERS 2684 CONFIG_SPL_NAND_DRIVERS
2690 CONFIG_SPL_NAND_ECC 2685 CONFIG_SPL_NAND_ECC
2691 CONFIG_SPL_NAND_INIT 2686 CONFIG_SPL_NAND_INIT
2692 CONFIG_SPL_NAND_LOAD 2687 CONFIG_SPL_NAND_LOAD
2693 CONFIG_SPL_NAND_MINIMAL 2688 CONFIG_SPL_NAND_MINIMAL
2694 CONFIG_SPL_NAND_MXS 2689 CONFIG_SPL_NAND_MXS
2695 CONFIG_SPL_NAND_RAW_ONLY 2690 CONFIG_SPL_NAND_RAW_ONLY
2696 CONFIG_SPL_NAND_SIMPLE 2691 CONFIG_SPL_NAND_SIMPLE
2697 CONFIG_SPL_NAND_SOFTECC 2692 CONFIG_SPL_NAND_SOFTECC
2698 CONFIG_SPL_NAND_WORKSPACE 2693 CONFIG_SPL_NAND_WORKSPACE
2699 CONFIG_SPL_NO_CPU_SUPPORT_CODE 2694 CONFIG_SPL_NO_CPU_SUPPORT_CODE
2700 CONFIG_SPL_OMAP3_ID_NAND 2695 CONFIG_SPL_OMAP3_ID_NAND
2701 CONFIG_SPL_PAD_TO 2696 CONFIG_SPL_PAD_TO
2702 CONFIG_SPL_PANIC_ON_RAW_IMAGE 2697 CONFIG_SPL_PANIC_ON_RAW_IMAGE
2703 CONFIG_SPL_PBL_PAD 2698 CONFIG_SPL_PBL_PAD
2704 CONFIG_SPL_PPAACT_ADDR 2699 CONFIG_SPL_PPAACT_ADDR
2705 CONFIG_SPL_RELOC_MALLOC_ADDR 2700 CONFIG_SPL_RELOC_MALLOC_ADDR
2706 CONFIG_SPL_RELOC_MALLOC_SIZE 2701 CONFIG_SPL_RELOC_MALLOC_SIZE
2707 CONFIG_SPL_RELOC_STACK 2702 CONFIG_SPL_RELOC_STACK
2708 CONFIG_SPL_RELOC_STACK_SIZE 2703 CONFIG_SPL_RELOC_STACK_SIZE
2709 CONFIG_SPL_RELOC_TEXT_BASE 2704 CONFIG_SPL_RELOC_TEXT_BASE
2710 CONFIG_SPL_SATA_BOOT_DEVICE 2705 CONFIG_SPL_SATA_BOOT_DEVICE
2711 CONFIG_SPL_SIZE 2706 CONFIG_SPL_SIZE
2712 CONFIG_SPL_SKIP_RELOCATE 2707 CONFIG_SPL_SKIP_RELOCATE
2713 CONFIG_SPL_SPAACT_ADDR 2708 CONFIG_SPL_SPAACT_ADDR
2714 CONFIG_SPL_SPI_BOOT 2709 CONFIG_SPL_SPI_BOOT
2715 CONFIG_SPL_SPI_FLASH_MINIMAL 2710 CONFIG_SPL_SPI_FLASH_MINIMAL
2716 CONFIG_SPL_SPI_LOAD 2711 CONFIG_SPL_SPI_LOAD
2717 CONFIG_SPL_STACK 2712 CONFIG_SPL_STACK
2718 CONFIG_SPL_STACK_ADDR 2713 CONFIG_SPL_STACK_ADDR
2719 CONFIG_SPL_STACK_SIZE 2714 CONFIG_SPL_STACK_SIZE
2720 CONFIG_SPL_START_S_PATH 2715 CONFIG_SPL_START_S_PATH
2721 CONFIG_SPL_TARGET 2716 CONFIG_SPL_TARGET
2722 CONFIG_SPL_TEXT_BASE 2717 CONFIG_SPL_TEXT_BASE
2723 CONFIG_SPL_UBI 2718 CONFIG_SPL_UBI
2724 CONFIG_SPL_UBI_INFO_ADDR 2719 CONFIG_SPL_UBI_INFO_ADDR
2725 CONFIG_SPL_UBI_LEB_START 2720 CONFIG_SPL_UBI_LEB_START
2726 CONFIG_SPL_UBI_LOAD_ARGS_ID 2721 CONFIG_SPL_UBI_LOAD_ARGS_ID
2727 CONFIG_SPL_UBI_LOAD_KERNEL_ID 2722 CONFIG_SPL_UBI_LOAD_KERNEL_ID
2728 CONFIG_SPL_UBI_LOAD_MONITOR_ID 2723 CONFIG_SPL_UBI_LOAD_MONITOR_ID
2729 CONFIG_SPL_UBI_MAX_PEBS 2724 CONFIG_SPL_UBI_MAX_PEBS
2730 CONFIG_SPL_UBI_MAX_PEB_SIZE 2725 CONFIG_SPL_UBI_MAX_PEB_SIZE
2731 CONFIG_SPL_UBI_MAX_VOL_LEBS 2726 CONFIG_SPL_UBI_MAX_VOL_LEBS
2732 CONFIG_SPL_UBI_PEB_OFFSET 2727 CONFIG_SPL_UBI_PEB_OFFSET
2733 CONFIG_SPL_UBI_VID_OFFSET 2728 CONFIG_SPL_UBI_VID_OFFSET
2734 CONFIG_SPL_UBI_VOL_IDS 2729 CONFIG_SPL_UBI_VOL_IDS
2735 CONFIG_SPL_UBOOT_KEY_HASH 2730 CONFIG_SPL_UBOOT_KEY_HASH
2736 CONFIG_SRAM_BASE 2731 CONFIG_SRAM_BASE
2737 CONFIG_SRAM_SIZE 2732 CONFIG_SRAM_SIZE
2738 CONFIG_SRIO1 2733 CONFIG_SRIO1
2739 CONFIG_SRIO2 2734 CONFIG_SRIO2
2740 CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 2735 CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET
2741 CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 2736 CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1
2742 CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 2737 CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2
2743 CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 2738 CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS
2744 CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 2739 CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE
2745 CONFIG_SRIO_PCIE_BOOT_MASTER 2740 CONFIG_SRIO_PCIE_BOOT_MASTER
2746 CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK 2741 CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK
2747 CONFIG_SRIO_PCIE_BOOT_SLAVE 2742 CONFIG_SRIO_PCIE_BOOT_SLAVE
2748 CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 2743 CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS
2749 CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 2744 CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS
2750 CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 2745 CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE
2751 CONFIG_SSD_BR_PRELIM 2746 CONFIG_SSD_BR_PRELIM
2752 CONFIG_SSD_OR_PRELIM 2747 CONFIG_SSD_OR_PRELIM
2753 CONFIG_SSE2 2748 CONFIG_SSE2
2754 CONFIG_SSI1_FREQ 2749 CONFIG_SSI1_FREQ
2755 CONFIG_SSI2_FREQ 2750 CONFIG_SSI2_FREQ
2756 CONFIG_SSP1_BASE 2751 CONFIG_SSP1_BASE
2757 CONFIG_SSP2_BASE 2752 CONFIG_SSP2_BASE
2758 CONFIG_SSP3_BASE 2753 CONFIG_SSP3_BASE
2759 CONFIG_STACKBASE 2754 CONFIG_STACKBASE
2760 CONFIG_STANDALONE_LOAD_ADDR 2755 CONFIG_STANDALONE_LOAD_ADDR
2761 CONFIG_STATIC_BOARD_REV 2756 CONFIG_STATIC_BOARD_REV
2762 CONFIG_STATIC_RELA 2757 CONFIG_STATIC_RELA
2763 CONFIG_STD_DEVICES_SETTINGS 2758 CONFIG_STD_DEVICES_SETTINGS
2764 CONFIG_STK52XX 2759 CONFIG_STK52XX
2765 CONFIG_STK52XX_REV100 2760 CONFIG_STK52XX_REV100
2766 CONFIG_STM32F4DISCOVERY 2761 CONFIG_STM32F4DISCOVERY
2767 CONFIG_STM32X7_SERIAL 2762 CONFIG_STM32X7_SERIAL
2768 CONFIG_STM32_FLASH 2763 CONFIG_STM32_FLASH
2769 CONFIG_STM32_GPIO 2764 CONFIG_STM32_GPIO
2770 CONFIG_STM32_HSE_HZ 2765 CONFIG_STM32_HSE_HZ
2771 CONFIG_STM32_HZ 2766 CONFIG_STM32_HZ
2772 CONFIG_STM32_SERIAL 2767 CONFIG_STM32_SERIAL
2773 CONFIG_STRESS 2768 CONFIG_STRESS
2774 CONFIG_STRIDER 2769 CONFIG_STRIDER
2775 CONFIG_STRIDER_CON 2770 CONFIG_STRIDER_CON
2776 CONFIG_STRIDER_CON_DP 2771 CONFIG_STRIDER_CON_DP
2777 CONFIG_STRIDER_CPU 2772 CONFIG_STRIDER_CPU
2778 CONFIG_STRIDER_CPU_DP 2773 CONFIG_STRIDER_CPU_DP
2779 CONFIG_STRIDER_FANS 2774 CONFIG_STRIDER_FANS
2780 CONFIG_STUART 2775 CONFIG_STUART
2781 CONFIG_STV0991 2776 CONFIG_STV0991
2782 CONFIG_STV0991_HZ 2777 CONFIG_STV0991_HZ
2783 CONFIG_STV0991_HZ_CLOCK 2778 CONFIG_STV0991_HZ_CLOCK
2784 CONFIG_ST_SMI 2779 CONFIG_ST_SMI
2785 CONFIG_SUNXI_AHCI 2780 CONFIG_SUNXI_AHCI
2786 CONFIG_SUNXI_EMAC 2781 CONFIG_SUNXI_EMAC
2787 CONFIG_SUNXI_GMAC 2782 CONFIG_SUNXI_GMAC
2788 CONFIG_SUNXI_GPIO 2783 CONFIG_SUNXI_GPIO
2789 CONFIG_SUNXI_MAX_FB_SIZE 2784 CONFIG_SUNXI_MAX_FB_SIZE
2790 CONFIG_SUNXI_USB_PHYS 2785 CONFIG_SUNXI_USB_PHYS
2791 CONFIG_SUPERH_ON_CHIP_R8A66597 2786 CONFIG_SUPERH_ON_CHIP_R8A66597
2792 CONFIG_SUPPORT_EMMC_BOOT 2787 CONFIG_SUPPORT_EMMC_BOOT
2793 CONFIG_SUPPORT_EMMC_RPMB 2788 CONFIG_SUPPORT_EMMC_RPMB
2794 CONFIG_SUPPORT_RAW_INITRD 2789 CONFIG_SUPPORT_RAW_INITRD
2795 CONFIG_SUPPORT_VFAT 2790 CONFIG_SUPPORT_VFAT
2796 CONFIG_SUVD3 2791 CONFIG_SUVD3
2797 CONFIG_SX151X_GPIO_COUNT_8 2792 CONFIG_SX151X_GPIO_COUNT_8
2798 CONFIG_SX151X_SPI_BUS 2793 CONFIG_SX151X_SPI_BUS
2799 CONFIG_SXNI855T 2794 CONFIG_SXNI855T
2800 CONFIG_SYSCOUNTER_TIMER 2795 CONFIG_SYSCOUNTER_TIMER
2801 CONFIG_SYSFLAGS_ADDR 2796 CONFIG_SYSFLAGS_ADDR
2802 CONFIG_SYSFS 2797 CONFIG_SYSFS
2803 CONFIG_SYSMGR_ISWGRP_HANDOFF 2798 CONFIG_SYSMGR_ISWGRP_HANDOFF
2804 CONFIG_SYSTEMACE 2799 CONFIG_SYSTEMACE
2805 CONFIG_SYS_33MHZ 2800 CONFIG_SYS_33MHZ
2806 CONFIG_SYS_405_UART_ERRATA_59 2801 CONFIG_SYS_405_UART_ERRATA_59
2807 CONFIG_SYS_460GT_SRIO_ERRATA_1 2802 CONFIG_SYS_460GT_SRIO_ERRATA_1
2808 CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY 2803 CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY
2809 CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY 2804 CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY
2810 CONFIG_SYS_4xx_CHIP_21_405EXr_NO_SECURITY 2805 CONFIG_SYS_4xx_CHIP_21_405EXr_NO_SECURITY
2811 CONFIG_SYS_4xx_CHIP_21_405EXr_SECURITY 2806 CONFIG_SYS_4xx_CHIP_21_405EXr_SECURITY
2812 CONFIG_SYS_4xx_CHIP_21_ERRATA 2807 CONFIG_SYS_4xx_CHIP_21_ERRATA
2813 CONFIG_SYS_4xx_GPIO_TABLE 2808 CONFIG_SYS_4xx_GPIO_TABLE
2814 CONFIG_SYS_4xx_RESET_TYPE 2809 CONFIG_SYS_4xx_RESET_TYPE
2815 CONFIG_SYS_64BIT 2810 CONFIG_SYS_64BIT
2816 CONFIG_SYS_64BIT_LBA 2811 CONFIG_SYS_64BIT_LBA
2817 CONFIG_SYS_64BIT_VSPRINTF 2812 CONFIG_SYS_64BIT_VSPRINTF
2818 CONFIG_SYS_66MHZ 2813 CONFIG_SYS_66MHZ
2819 CONFIG_SYS_8313ERDB_BROKEN_PMC 2814 CONFIG_SYS_8313ERDB_BROKEN_PMC
2820 CONFIG_SYS_83XX_DDR_USES_CS0 2815 CONFIG_SYS_83XX_DDR_USES_CS0
2821 CONFIG_SYS_8XX_XIN 2816 CONFIG_SYS_8XX_XIN
2822 CONFIG_SYS_8xx_CPUCLK_MAX 2817 CONFIG_SYS_8xx_CPUCLK_MAX
2823 CONFIG_SYS_8xx_CPUCLK_MIN 2818 CONFIG_SYS_8xx_CPUCLK_MIN
2824 CONFIG_SYS_ACE_BASE 2819 CONFIG_SYS_ACE_BASE
2825 CONFIG_SYS_ACE_BASE_PHYS_H 2820 CONFIG_SYS_ACE_BASE_PHYS_H
2826 CONFIG_SYS_ACE_BASE_PHYS_L 2821 CONFIG_SYS_ACE_BASE_PHYS_L
2827 CONFIG_SYS_ACR_APARK 2822 CONFIG_SYS_ACR_APARK
2828 CONFIG_SYS_ACR_PARKM 2823 CONFIG_SYS_ACR_PARKM
2829 CONFIG_SYS_ACR_PIPE_DEP 2824 CONFIG_SYS_ACR_PIPE_DEP
2830 CONFIG_SYS_ACR_RPTCNT 2825 CONFIG_SYS_ACR_RPTCNT
2831 CONFIG_SYS_ADDRESS_MAP_A 2826 CONFIG_SYS_ADDRESS_MAP_A
2832 CONFIG_SYS_ADV7611_I2C 2827 CONFIG_SYS_ADV7611_I2C
2833 CONFIG_SYS_AHB_BASE 2828 CONFIG_SYS_AHB_BASE
2834 CONFIG_SYS_ALT_BOOT 2829 CONFIG_SYS_ALT_BOOT
2835 CONFIG_SYS_ALT_FLASH 2830 CONFIG_SYS_ALT_FLASH
2836 CONFIG_SYS_ALT_MEMTEST 2831 CONFIG_SYS_ALT_MEMTEST
2837 CONFIG_SYS_AMASK0 2832 CONFIG_SYS_AMASK0
2838 CONFIG_SYS_AMASK0_FINAL 2833 CONFIG_SYS_AMASK0_FINAL
2839 CONFIG_SYS_AMASK1 2834 CONFIG_SYS_AMASK1
2840 CONFIG_SYS_AMASK1_FINAL 2835 CONFIG_SYS_AMASK1_FINAL
2841 CONFIG_SYS_AMASK2 2836 CONFIG_SYS_AMASK2
2842 CONFIG_SYS_AMASK2_FINAL 2837 CONFIG_SYS_AMASK2_FINAL
2843 CONFIG_SYS_AMASK3 2838 CONFIG_SYS_AMASK3
2844 CONFIG_SYS_AMASK3_FINAL 2839 CONFIG_SYS_AMASK3_FINAL
2845 CONFIG_SYS_AMASK4 2840 CONFIG_SYS_AMASK4
2846 CONFIG_SYS_AMASK5 2841 CONFIG_SYS_AMASK5
2847 CONFIG_SYS_AMASK6 2842 CONFIG_SYS_AMASK6
2848 CONFIG_SYS_AMASK7 2843 CONFIG_SYS_AMASK7
2849 CONFIG_SYS_APP1_BASE 2844 CONFIG_SYS_APP1_BASE
2850 CONFIG_SYS_APP1_SIZE 2845 CONFIG_SYS_APP1_SIZE
2851 CONFIG_SYS_APP2_BASE 2846 CONFIG_SYS_APP2_BASE
2852 CONFIG_SYS_APP2_SIZE 2847 CONFIG_SYS_APP2_SIZE
2853 CONFIG_SYS_ARCH_TIMER 2848 CONFIG_SYS_ARCH_TIMER
2854 CONFIG_SYS_ARIA_FPGA_BASE 2849 CONFIG_SYS_ARIA_FPGA_BASE
2855 CONFIG_SYS_ARIA_FPGA_SIZE 2850 CONFIG_SYS_ARIA_FPGA_SIZE
2856 CONFIG_SYS_ARIA_SRAM_BASE 2851 CONFIG_SYS_ARIA_SRAM_BASE
2857 CONFIG_SYS_ARIA_SRAM_SIZE 2852 CONFIG_SYS_ARIA_SRAM_SIZE
2858 CONFIG_SYS_ARM_CACHE_WRITETHROUGH 2853 CONFIG_SYS_ARM_CACHE_WRITETHROUGH
2859 CONFIG_SYS_AT91_CPU_NAME 2854 CONFIG_SYS_AT91_CPU_NAME
2860 CONFIG_SYS_AT91_MAIN_CLOCK 2855 CONFIG_SYS_AT91_MAIN_CLOCK
2861 CONFIG_SYS_AT91_PLLA 2856 CONFIG_SYS_AT91_PLLA
2862 CONFIG_SYS_AT91_PLLB 2857 CONFIG_SYS_AT91_PLLB
2863 CONFIG_SYS_AT91_SLOW_CLOCK 2858 CONFIG_SYS_AT91_SLOW_CLOCK
2864 CONFIG_SYS_ATA_ALT_OFFSET 2859 CONFIG_SYS_ATA_ALT_OFFSET
2865 CONFIG_SYS_ATA_BASE_ADDR 2860 CONFIG_SYS_ATA_BASE_ADDR
2866 CONFIG_SYS_ATA_CS_ON_I2C2 2861 CONFIG_SYS_ATA_CS_ON_I2C2
2867 CONFIG_SYS_ATA_CS_ON_TIMER01 2862 CONFIG_SYS_ATA_CS_ON_TIMER01
2868 CONFIG_SYS_ATA_DATA_OFFSET 2863 CONFIG_SYS_ATA_DATA_OFFSET
2869 CONFIG_SYS_ATA_IDE0_OFFSET 2864 CONFIG_SYS_ATA_IDE0_OFFSET
2870 CONFIG_SYS_ATA_IDE1_OFFSET 2865 CONFIG_SYS_ATA_IDE1_OFFSET
2871 CONFIG_SYS_ATA_PORT_ADDR 2866 CONFIG_SYS_ATA_PORT_ADDR
2872 CONFIG_SYS_ATA_REG_OFFSET 2867 CONFIG_SYS_ATA_REG_OFFSET
2873 CONFIG_SYS_ATA_STRIDE 2868 CONFIG_SYS_ATA_STRIDE
2874 CONFIG_SYS_ATI_REV_A11 2869 CONFIG_SYS_ATI_REV_A11
2875 CONFIG_SYS_ATI_REV_A12 2870 CONFIG_SYS_ATI_REV_A12
2876 CONFIG_SYS_ATI_REV_A13 2871 CONFIG_SYS_ATI_REV_A13
2877 CONFIG_SYS_ATI_REV_ID_MASK 2872 CONFIG_SYS_ATI_REV_ID_MASK
2878 CONFIG_SYS_ATMEL_BASE 2873 CONFIG_SYS_ATMEL_BASE
2879 CONFIG_SYS_ATMEL_BOOT 2874 CONFIG_SYS_ATMEL_BOOT
2880 CONFIG_SYS_ATMEL_CPU_NAME 2875 CONFIG_SYS_ATMEL_CPU_NAME
2881 CONFIG_SYS_ATMEL_REGION 2876 CONFIG_SYS_ATMEL_REGION
2882 CONFIG_SYS_ATMEL_SECT 2877 CONFIG_SYS_ATMEL_SECT
2883 CONFIG_SYS_ATMEL_SECTSZ 2878 CONFIG_SYS_ATMEL_SECTSZ
2884 CONFIG_SYS_ATMEL_TOTALSECT 2879 CONFIG_SYS_ATMEL_TOTALSECT
2885 CONFIG_SYS_AUTOLOAD 2880 CONFIG_SYS_AUTOLOAD
2886 CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION 2881 CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
2887 CONFIG_SYS_AUXCORE_BOOTDATA 2882 CONFIG_SYS_AUXCORE_BOOTDATA
2888 CONFIG_SYS_BARGSIZE 2883 CONFIG_SYS_BARGSIZE
2889 CONFIG_SYS_BASE_BAUD 2884 CONFIG_SYS_BASE_BAUD
2890 CONFIG_SYS_BAUDRATE_TABLE 2885 CONFIG_SYS_BAUDRATE_TABLE
2891 CONFIG_SYS_BCR 2886 CONFIG_SYS_BCR
2892 CONFIG_SYS_BCR_60x 2887 CONFIG_SYS_BCR_60x
2893 CONFIG_SYS_BCR_SINGLE 2888 CONFIG_SYS_BCR_SINGLE
2894 CONFIG_SYS_BCSR 2889 CONFIG_SYS_BCSR
2895 CONFIG_SYS_BCSR3_PCIE 2890 CONFIG_SYS_BCSR3_PCIE
2896 CONFIG_SYS_BCSR5_PCI66EN 2891 CONFIG_SYS_BCSR5_PCI66EN
2897 CONFIG_SYS_BCSR_ADDR 2892 CONFIG_SYS_BCSR_ADDR
2898 CONFIG_SYS_BCSR_BASE 2893 CONFIG_SYS_BCSR_BASE
2899 CONFIG_SYS_BCSR_BASE_PHYS 2894 CONFIG_SYS_BCSR_BASE_PHYS
2900 CONFIG_SYS_BCSR_SIZE 2895 CONFIG_SYS_BCSR_SIZE
2901 CONFIG_SYS_BD_REV 2896 CONFIG_SYS_BD_REV
2902 CONFIG_SYS_BFTIC3_BASE 2897 CONFIG_SYS_BFTIC3_BASE
2903 CONFIG_SYS_BFTIC3_SIZE 2898 CONFIG_SYS_BFTIC3_SIZE
2904 CONFIG_SYS_BITBANG_PHY_PORT 2899 CONFIG_SYS_BITBANG_PHY_PORT
2905 CONFIG_SYS_BITBANG_PHY_PORTS 2900 CONFIG_SYS_BITBANG_PHY_PORTS
2906 CONFIG_SYS_BLACK_IN_WRITE 2901 CONFIG_SYS_BLACK_IN_WRITE
2907 CONFIG_SYS_BMAN_CENA_BASE 2902 CONFIG_SYS_BMAN_CENA_BASE
2908 CONFIG_SYS_BMAN_CENA_SIZE 2903 CONFIG_SYS_BMAN_CENA_SIZE
2909 CONFIG_SYS_BMAN_CINH_BASE 2904 CONFIG_SYS_BMAN_CINH_BASE
2910 CONFIG_SYS_BMAN_CINH_SIZE 2905 CONFIG_SYS_BMAN_CINH_SIZE
2911 CONFIG_SYS_BMAN_MEM_BASE 2906 CONFIG_SYS_BMAN_MEM_BASE
2912 CONFIG_SYS_BMAN_MEM_PHYS 2907 CONFIG_SYS_BMAN_MEM_PHYS
2913 CONFIG_SYS_BMAN_MEM_SIZE 2908 CONFIG_SYS_BMAN_MEM_SIZE
2914 CONFIG_SYS_BMAN_NUM_PORTALS 2909 CONFIG_SYS_BMAN_NUM_PORTALS
2915 CONFIG_SYS_BMAN_SP_CENA_SIZE 2910 CONFIG_SYS_BMAN_SP_CENA_SIZE
2916 CONFIG_SYS_BMAN_SP_CINH_SIZE 2911 CONFIG_SYS_BMAN_SP_CINH_SIZE
2917 CONFIG_SYS_BMAN_SWP_ISDR_REG 2912 CONFIG_SYS_BMAN_SWP_ISDR_REG
2918 CONFIG_SYS_BOARD_NAME 2913 CONFIG_SYS_BOARD_NAME
2919 CONFIG_SYS_BOARD_OMAP3_HA 2914 CONFIG_SYS_BOARD_OMAP3_HA
2920 CONFIG_SYS_BOARD_VERSION 2915 CONFIG_SYS_BOARD_VERSION
2921 CONFIG_SYS_BOOK3E_HV 2916 CONFIG_SYS_BOOK3E_HV
2922 CONFIG_SYS_BOOTCOUNT_ADDR 2917 CONFIG_SYS_BOOTCOUNT_ADDR
2923 CONFIG_SYS_BOOTCOUNT_BE 2918 CONFIG_SYS_BOOTCOUNT_BE
2924 CONFIG_SYS_BOOTCOUNT_LE 2919 CONFIG_SYS_BOOTCOUNT_LE
2925 CONFIG_SYS_BOOTCOUNT_SINGLEWORD 2920 CONFIG_SYS_BOOTCOUNT_SINGLEWORD
2926 CONFIG_SYS_BOOTCS_CFG 2921 CONFIG_SYS_BOOTCS_CFG
2927 CONFIG_SYS_BOOTCS_SIZE 2922 CONFIG_SYS_BOOTCS_SIZE
2928 CONFIG_SYS_BOOTCS_START 2923 CONFIG_SYS_BOOTCS_START
2929 CONFIG_SYS_BOOTFILE 2924 CONFIG_SYS_BOOTFILE
2930 CONFIG_SYS_BOOTFILE_PREFIX 2925 CONFIG_SYS_BOOTFILE_PREFIX
2931 CONFIG_SYS_BOOTMAPSZ 2926 CONFIG_SYS_BOOTMAPSZ
2932 CONFIG_SYS_BOOTM_LEN 2927 CONFIG_SYS_BOOTM_LEN
2933 CONFIG_SYS_BOOTPARAMS_LEN 2928 CONFIG_SYS_BOOTPARAMS_LEN
2934 CONFIG_SYS_BOOTSZ 2929 CONFIG_SYS_BOOTSZ
2935 CONFIG_SYS_BOOT_BASE_ADDR 2930 CONFIG_SYS_BOOT_BASE_ADDR
2936 CONFIG_SYS_BOOT_BLOCK 2931 CONFIG_SYS_BOOT_BLOCK
2937 CONFIG_SYS_BOOT_EEPROM_PAGE_WRITE_BITS 2932 CONFIG_SYS_BOOT_EEPROM_PAGE_WRITE_BITS
2938 CONFIG_SYS_BOOT_GET_CMDLINE 2933 CONFIG_SYS_BOOT_GET_CMDLINE
2939 CONFIG_SYS_BOOT_GET_KBD 2934 CONFIG_SYS_BOOT_GET_KBD
2940 CONFIG_SYS_BOOT_RAMDISK_HIGH 2935 CONFIG_SYS_BOOT_RAMDISK_HIGH
2941 CONFIG_SYS_BR0_64M 2936 CONFIG_SYS_BR0_64M
2942 CONFIG_SYS_BR0_8M 2937 CONFIG_SYS_BR0_8M
2943 CONFIG_SYS_BR0_PRELIM 2938 CONFIG_SYS_BR0_PRELIM
2944 CONFIG_SYS_BR10_PRELIM 2939 CONFIG_SYS_BR10_PRELIM
2945 CONFIG_SYS_BR11_PRELIM 2940 CONFIG_SYS_BR11_PRELIM
2946 CONFIG_SYS_BR1_PRELIM 2941 CONFIG_SYS_BR1_PRELIM
2947 CONFIG_SYS_BR2_PRELIM 2942 CONFIG_SYS_BR2_PRELIM
2948 CONFIG_SYS_BR3_CAN 2943 CONFIG_SYS_BR3_CAN
2949 CONFIG_SYS_BR3_PRELIM 2944 CONFIG_SYS_BR3_PRELIM
2950 CONFIG_SYS_BR4_PRELIM 2945 CONFIG_SYS_BR4_PRELIM
2951 CONFIG_SYS_BR5_ISP1362 2946 CONFIG_SYS_BR5_ISP1362
2952 CONFIG_SYS_BR5_PRELIM 2947 CONFIG_SYS_BR5_PRELIM
2953 CONFIG_SYS_BR6_64M 2948 CONFIG_SYS_BR6_64M
2954 CONFIG_SYS_BR6_8M 2949 CONFIG_SYS_BR6_8M
2955 CONFIG_SYS_BR6_PRELIM 2950 CONFIG_SYS_BR6_PRELIM
2956 CONFIG_SYS_BR7_PRELIM 2951 CONFIG_SYS_BR7_PRELIM
2957 CONFIG_SYS_BR8_PRELIM 2952 CONFIG_SYS_BR8_PRELIM
2958 CONFIG_SYS_BR9_PRELIM 2953 CONFIG_SYS_BR9_PRELIM
2959 CONFIG_SYS_BRGCLK_PRESCALE 2954 CONFIG_SYS_BRGCLK_PRESCALE
2960 CONFIG_SYS_BRIGHTNESS 2955 CONFIG_SYS_BRIGHTNESS
2961 CONFIG_SYS_BUSCLK 2956 CONFIG_SYS_BUSCLK
2962 CONFIG_SYS_CACHELINE_SHIFT 2957 CONFIG_SYS_CACHELINE_SHIFT
2963 CONFIG_SYS_CACHE_ACR0 2958 CONFIG_SYS_CACHE_ACR0
2964 CONFIG_SYS_CACHE_ACR1 2959 CONFIG_SYS_CACHE_ACR1
2965 CONFIG_SYS_CACHE_ACR2 2960 CONFIG_SYS_CACHE_ACR2
2966 CONFIG_SYS_CACHE_ACR3 2961 CONFIG_SYS_CACHE_ACR3
2967 CONFIG_SYS_CACHE_ACR4 2962 CONFIG_SYS_CACHE_ACR4
2968 CONFIG_SYS_CACHE_ACR5 2963 CONFIG_SYS_CACHE_ACR5
2969 CONFIG_SYS_CACHE_ACR6 2964 CONFIG_SYS_CACHE_ACR6
2970 CONFIG_SYS_CACHE_ACR7 2965 CONFIG_SYS_CACHE_ACR7
2971 CONFIG_SYS_CACHE_DCACR 2966 CONFIG_SYS_CACHE_DCACR
2972 CONFIG_SYS_CACHE_ICACR 2967 CONFIG_SYS_CACHE_ICACR
2973 CONFIG_SYS_CACHE_STASHING 2968 CONFIG_SYS_CACHE_STASHING
2974 CONFIG_SYS_CADMUS_BASE_REG 2969 CONFIG_SYS_CADMUS_BASE_REG
2975 CONFIG_SYS_CAN_BASE 2970 CONFIG_SYS_CAN_BASE
2976 CONFIG_SYS_CAN_OR_AM 2971 CONFIG_SYS_CAN_OR_AM
2977 CONFIG_SYS_CBSIZE 2972 CONFIG_SYS_CBSIZE
2978 CONFIG_SYS_CCCR 2973 CONFIG_SYS_CCCR
2979 CONFIG_SYS_CCI400_ADDR 2974 CONFIG_SYS_CCI400_ADDR
2980 CONFIG_SYS_CCSRBAR 2975 CONFIG_SYS_CCSRBAR
2981 CONFIG_SYS_CCSRBAR_PHYS 2976 CONFIG_SYS_CCSRBAR_PHYS
2982 CONFIG_SYS_CCSRBAR_PHYS_HIGH 2977 CONFIG_SYS_CCSRBAR_PHYS_HIGH
2983 CONFIG_SYS_CCSRBAR_PHYS_LOW 2978 CONFIG_SYS_CCSRBAR_PHYS_LOW
2984 CONFIG_SYS_CCSR_DEFAULT_DBATL 2979 CONFIG_SYS_CCSR_DEFAULT_DBATL
2985 CONFIG_SYS_CCSR_DEFAULT_DBATU 2980 CONFIG_SYS_CCSR_DEFAULT_DBATU
2986 CONFIG_SYS_CCSR_DEFAULT_IBATL 2981 CONFIG_SYS_CCSR_DEFAULT_IBATL
2987 CONFIG_SYS_CCSR_DEFAULT_IBATU 2982 CONFIG_SYS_CCSR_DEFAULT_IBATU
2988 CONFIG_SYS_CCSR_DO_NOT_RELOCATE 2983 CONFIG_SYS_CCSR_DO_NOT_RELOCATE
2989 CONFIG_SYS_CFI_FLASH_CONFIG_REGS 2984 CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2990 CONFIG_SYS_CFI_FLASH_STATUS_POLL 2985 CONFIG_SYS_CFI_FLASH_STATUS_POLL
2991 CONFIG_SYS_CF_BASE 2986 CONFIG_SYS_CF_BASE
2992 CONFIG_SYS_CF_INTC_REG1 2987 CONFIG_SYS_CF_INTC_REG1
2993 CONFIG_SYS_CF_SIZE 2988 CONFIG_SYS_CF_SIZE
2994 CONFIG_SYS_CH7301_I2C 2989 CONFIG_SYS_CH7301_I2C
2995 CONFIG_SYS_CKEN 2990 CONFIG_SYS_CKEN
2996 CONFIG_SYS_CLK 2991 CONFIG_SYS_CLK
2997 CONFIG_SYS_CLKDIV_CPU 2992 CONFIG_SYS_CLKDIV_CPU
2998 CONFIG_SYS_CLKDIV_HSB 2993 CONFIG_SYS_CLKDIV_HSB
2999 CONFIG_SYS_CLKDIV_PBA 2994 CONFIG_SYS_CLKDIV_PBA
3000 CONFIG_SYS_CLKDIV_PBB 2995 CONFIG_SYS_CLKDIV_PBB
3001 CONFIG_SYS_CLKTL_CBCDR 2996 CONFIG_SYS_CLKTL_CBCDR
3002 CONFIG_SYS_CLK_100 2997 CONFIG_SYS_CLK_100
3003 CONFIG_SYS_CLK_100_DDR_100 2998 CONFIG_SYS_CLK_100_DDR_100
3004 CONFIG_SYS_CLK_100_DDR_133 2999 CONFIG_SYS_CLK_100_DDR_133
3005 CONFIG_SYS_CLK_DIV 3000 CONFIG_SYS_CLK_DIV
3006 CONFIG_SYS_CLK_FREQ_C100 3001 CONFIG_SYS_CLK_FREQ_C100
3007 CONFIG_SYS_CLK_FREQ_C110 3002 CONFIG_SYS_CLK_FREQ_C110
3008 CONFIG_SYS_CMD_CONFIGURE 3003 CONFIG_SYS_CMD_CONFIGURE
3009 CONFIG_SYS_CMD_EL 3004 CONFIG_SYS_CMD_EL
3010 CONFIG_SYS_CMD_IAS 3005 CONFIG_SYS_CMD_IAS
3011 CONFIG_SYS_CMD_INT 3006 CONFIG_SYS_CMD_INT
3012 CONFIG_SYS_CMD_SUSPEND 3007 CONFIG_SYS_CMD_SUSPEND
3013 CONFIG_SYS_CMXFCR_MASK1 3008 CONFIG_SYS_CMXFCR_MASK1
3014 CONFIG_SYS_CMXFCR_MASK2 3009 CONFIG_SYS_CMXFCR_MASK2
3015 CONFIG_SYS_CMXFCR_MASK3 3010 CONFIG_SYS_CMXFCR_MASK3
3016 CONFIG_SYS_CMXFCR_VALUE1 3011 CONFIG_SYS_CMXFCR_VALUE1
3017 CONFIG_SYS_CMXFCR_VALUE2 3012 CONFIG_SYS_CMXFCR_VALUE2
3018 CONFIG_SYS_CMXFCR_VALUE3 3013 CONFIG_SYS_CMXFCR_VALUE3
3019 CONFIG_SYS_CMXSCR_VALUE 3014 CONFIG_SYS_CMXSCR_VALUE
3020 CONFIG_SYS_CORE_SRAM 3015 CONFIG_SYS_CORE_SRAM
3021 CONFIG_SYS_CORE_SRAM_SIZE 3016 CONFIG_SYS_CORE_SRAM_SIZE
3022 CONFIG_SYS_CORTEX_R4 3017 CONFIG_SYS_CORTEX_R4
3023 CONFIG_SYS_CORTINA_FW_IN_MMC 3018 CONFIG_SYS_CORTINA_FW_IN_MMC
3024 CONFIG_SYS_CORTINA_FW_IN_NAND 3019 CONFIG_SYS_CORTINA_FW_IN_NAND
3025 CONFIG_SYS_CORTINA_FW_IN_NOR 3020 CONFIG_SYS_CORTINA_FW_IN_NOR
3026 CONFIG_SYS_CORTINA_FW_IN_REMOTE 3021 CONFIG_SYS_CORTINA_FW_IN_REMOTE
3027 CONFIG_SYS_CORTINA_FW_IN_SPIFLASH 3022 CONFIG_SYS_CORTINA_FW_IN_SPIFLASH
3028 CONFIG_SYS_CPC_REINIT_F 3023 CONFIG_SYS_CPC_REINIT_F
3029 CONFIG_SYS_CPLD 3024 CONFIG_SYS_CPLD
3030 CONFIG_SYS_CPLD_ADDR 3025 CONFIG_SYS_CPLD_ADDR
3031 CONFIG_SYS_CPLD_AMASK 3026 CONFIG_SYS_CPLD_AMASK
3032 CONFIG_SYS_CPLD_BASE 3027 CONFIG_SYS_CPLD_BASE
3033 CONFIG_SYS_CPLD_BASE_PHYS 3028 CONFIG_SYS_CPLD_BASE_PHYS
3034 CONFIG_SYS_CPLD_CSOR 3029 CONFIG_SYS_CPLD_CSOR
3035 CONFIG_SYS_CPLD_CSPR 3030 CONFIG_SYS_CPLD_CSPR
3036 CONFIG_SYS_CPLD_CSPR_EXT 3031 CONFIG_SYS_CPLD_CSPR_EXT
3037 CONFIG_SYS_CPLD_DATA 3032 CONFIG_SYS_CPLD_DATA
3038 CONFIG_SYS_CPLD_FTIM0 3033 CONFIG_SYS_CPLD_FTIM0
3039 CONFIG_SYS_CPLD_FTIM1 3034 CONFIG_SYS_CPLD_FTIM1
3040 CONFIG_SYS_CPLD_FTIM2 3035 CONFIG_SYS_CPLD_FTIM2
3041 CONFIG_SYS_CPLD_FTIM3 3036 CONFIG_SYS_CPLD_FTIM3
3042 CONFIG_SYS_CPLD_SIZE 3037 CONFIG_SYS_CPLD_SIZE
3043 CONFIG_SYS_CPMFCR_RAMTYPE 3038 CONFIG_SYS_CPMFCR_RAMTYPE
3044 CONFIG_SYS_CPM_BOOTCOUNT_ADDR 3039 CONFIG_SYS_CPM_BOOTCOUNT_ADDR
3045 CONFIG_SYS_CPM_INTERRUPT 3040 CONFIG_SYS_CPM_INTERRUPT
3046 CONFIG_SYS_CPM_POST_WORD_ADDR 3041 CONFIG_SYS_CPM_POST_WORD_ADDR
3047 CONFIG_SYS_CPRI 3042 CONFIG_SYS_CPRI
3048 CONFIG_SYS_CPRI_CLK 3043 CONFIG_SYS_CPRI_CLK
3049 CONFIG_SYS_CPUSPEED 3044 CONFIG_SYS_CPUSPEED
3050 CONFIG_SYS_CPU_CLK 3045 CONFIG_SYS_CPU_CLK
3051 CONFIG_SYS_CPU_PCI_IO_START 3046 CONFIG_SYS_CPU_PCI_IO_START
3052 CONFIG_SYS_CPU_PCI_MEMIO_START 3047 CONFIG_SYS_CPU_PCI_MEMIO_START
3053 CONFIG_SYS_CPU_PCI_MEM_START 3048 CONFIG_SYS_CPU_PCI_MEM_START
3054 CONFIG_SYS_CS0_BASE 3049 CONFIG_SYS_CS0_BASE
3055 CONFIG_SYS_CS0_CFG 3050 CONFIG_SYS_CS0_CFG
3056 CONFIG_SYS_CS0_CTRL 3051 CONFIG_SYS_CS0_CTRL
3057 CONFIG_SYS_CS0_FTIM0 3052 CONFIG_SYS_CS0_FTIM0
3058 CONFIG_SYS_CS0_FTIM1 3053 CONFIG_SYS_CS0_FTIM1
3059 CONFIG_SYS_CS0_FTIM2 3054 CONFIG_SYS_CS0_FTIM2
3060 CONFIG_SYS_CS0_FTIM3 3055 CONFIG_SYS_CS0_FTIM3
3061 CONFIG_SYS_CS0_MASK 3056 CONFIG_SYS_CS0_MASK
3062 CONFIG_SYS_CS0_SIZE 3057 CONFIG_SYS_CS0_SIZE
3063 CONFIG_SYS_CS0_START 3058 CONFIG_SYS_CS0_START
3064 CONFIG_SYS_CS1_BASE 3059 CONFIG_SYS_CS1_BASE
3065 CONFIG_SYS_CS1_CFG 3060 CONFIG_SYS_CS1_CFG
3066 CONFIG_SYS_CS1_CTRL 3061 CONFIG_SYS_CS1_CTRL
3067 CONFIG_SYS_CS1_FLASH_BASE 3062 CONFIG_SYS_CS1_FLASH_BASE
3068 CONFIG_SYS_CS1_FTIM0 3063 CONFIG_SYS_CS1_FTIM0
3069 CONFIG_SYS_CS1_FTIM1 3064 CONFIG_SYS_CS1_FTIM1
3070 CONFIG_SYS_CS1_FTIM2 3065 CONFIG_SYS_CS1_FTIM2
3071 CONFIG_SYS_CS1_FTIM3 3066 CONFIG_SYS_CS1_FTIM3
3072 CONFIG_SYS_CS1_MASK 3067 CONFIG_SYS_CS1_MASK
3073 CONFIG_SYS_CS1_SIZE 3068 CONFIG_SYS_CS1_SIZE
3074 CONFIG_SYS_CS1_START 3069 CONFIG_SYS_CS1_START
3075 CONFIG_SYS_CS2_BASE 3070 CONFIG_SYS_CS2_BASE
3076 CONFIG_SYS_CS2_CFG 3071 CONFIG_SYS_CS2_CFG
3077 CONFIG_SYS_CS2_CTRL 3072 CONFIG_SYS_CS2_CTRL
3078 CONFIG_SYS_CS2_FLASH_BASE 3073 CONFIG_SYS_CS2_FLASH_BASE
3079 CONFIG_SYS_CS2_FTIM0 3074 CONFIG_SYS_CS2_FTIM0
3080 CONFIG_SYS_CS2_FTIM1 3075 CONFIG_SYS_CS2_FTIM1
3081 CONFIG_SYS_CS2_FTIM2 3076 CONFIG_SYS_CS2_FTIM2
3082 CONFIG_SYS_CS2_FTIM3 3077 CONFIG_SYS_CS2_FTIM3
3083 CONFIG_SYS_CS2_MASK 3078 CONFIG_SYS_CS2_MASK
3084 CONFIG_SYS_CS2_SIZE 3079 CONFIG_SYS_CS2_SIZE
3085 CONFIG_SYS_CS2_START 3080 CONFIG_SYS_CS2_START
3086 CONFIG_SYS_CS3_BASE 3081 CONFIG_SYS_CS3_BASE
3087 CONFIG_SYS_CS3_CFG 3082 CONFIG_SYS_CS3_CFG
3088 CONFIG_SYS_CS3_CTRL 3083 CONFIG_SYS_CS3_CTRL
3089 CONFIG_SYS_CS3_FLASH_BASE 3084 CONFIG_SYS_CS3_FLASH_BASE
3090 CONFIG_SYS_CS3_FTIM0 3085 CONFIG_SYS_CS3_FTIM0
3091 CONFIG_SYS_CS3_FTIM1 3086 CONFIG_SYS_CS3_FTIM1
3092 CONFIG_SYS_CS3_FTIM2 3087 CONFIG_SYS_CS3_FTIM2
3093 CONFIG_SYS_CS3_FTIM3 3088 CONFIG_SYS_CS3_FTIM3
3094 CONFIG_SYS_CS3_MASK 3089 CONFIG_SYS_CS3_MASK
3095 CONFIG_SYS_CS3_SIZE 3090 CONFIG_SYS_CS3_SIZE
3096 CONFIG_SYS_CS3_START 3091 CONFIG_SYS_CS3_START
3097 CONFIG_SYS_CS4_BASE 3092 CONFIG_SYS_CS4_BASE
3098 CONFIG_SYS_CS4_CFG 3093 CONFIG_SYS_CS4_CFG
3099 CONFIG_SYS_CS4_CTRL 3094 CONFIG_SYS_CS4_CTRL
3100 CONFIG_SYS_CS4_FLASH_BASE 3095 CONFIG_SYS_CS4_FLASH_BASE
3101 CONFIG_SYS_CS4_FTIM0 3096 CONFIG_SYS_CS4_FTIM0
3102 CONFIG_SYS_CS4_FTIM1 3097 CONFIG_SYS_CS4_FTIM1
3103 CONFIG_SYS_CS4_FTIM2 3098 CONFIG_SYS_CS4_FTIM2
3104 CONFIG_SYS_CS4_FTIM3 3099 CONFIG_SYS_CS4_FTIM3
3105 CONFIG_SYS_CS4_MASK 3100 CONFIG_SYS_CS4_MASK
3106 CONFIG_SYS_CS4_SIZE 3101 CONFIG_SYS_CS4_SIZE
3107 CONFIG_SYS_CS4_START 3102 CONFIG_SYS_CS4_START
3108 CONFIG_SYS_CS5_BASE 3103 CONFIG_SYS_CS5_BASE
3109 CONFIG_SYS_CS5_CFG 3104 CONFIG_SYS_CS5_CFG
3110 CONFIG_SYS_CS5_CTRL 3105 CONFIG_SYS_CS5_CTRL
3111 CONFIG_SYS_CS5_FLASH_BASE 3106 CONFIG_SYS_CS5_FLASH_BASE
3112 CONFIG_SYS_CS5_FTIM0 3107 CONFIG_SYS_CS5_FTIM0
3113 CONFIG_SYS_CS5_FTIM1 3108 CONFIG_SYS_CS5_FTIM1
3114 CONFIG_SYS_CS5_FTIM2 3109 CONFIG_SYS_CS5_FTIM2
3115 CONFIG_SYS_CS5_FTIM3 3110 CONFIG_SYS_CS5_FTIM3
3116 CONFIG_SYS_CS5_MASK 3111 CONFIG_SYS_CS5_MASK
3117 CONFIG_SYS_CS5_SIZE 3112 CONFIG_SYS_CS5_SIZE
3118 CONFIG_SYS_CS5_START 3113 CONFIG_SYS_CS5_START
3119 CONFIG_SYS_CS6_BASE 3114 CONFIG_SYS_CS6_BASE
3120 CONFIG_SYS_CS6_CFG 3115 CONFIG_SYS_CS6_CFG
3121 CONFIG_SYS_CS6_CTRL 3116 CONFIG_SYS_CS6_CTRL
3122 CONFIG_SYS_CS6_FTIM0 3117 CONFIG_SYS_CS6_FTIM0
3123 CONFIG_SYS_CS6_FTIM1 3118 CONFIG_SYS_CS6_FTIM1
3124 CONFIG_SYS_CS6_FTIM2 3119 CONFIG_SYS_CS6_FTIM2
3125 CONFIG_SYS_CS6_FTIM3 3120 CONFIG_SYS_CS6_FTIM3
3126 CONFIG_SYS_CS6_MASK 3121 CONFIG_SYS_CS6_MASK
3127 CONFIG_SYS_CS6_SIZE 3122 CONFIG_SYS_CS6_SIZE
3128 CONFIG_SYS_CS6_START 3123 CONFIG_SYS_CS6_START
3129 CONFIG_SYS_CS7_BASE 3124 CONFIG_SYS_CS7_BASE
3130 CONFIG_SYS_CS7_CFG 3125 CONFIG_SYS_CS7_CFG
3131 CONFIG_SYS_CS7_CTRL 3126 CONFIG_SYS_CS7_CTRL
3132 CONFIG_SYS_CS7_FTIM0 3127 CONFIG_SYS_CS7_FTIM0
3133 CONFIG_SYS_CS7_FTIM1 3128 CONFIG_SYS_CS7_FTIM1
3134 CONFIG_SYS_CS7_FTIM2 3129 CONFIG_SYS_CS7_FTIM2
3135 CONFIG_SYS_CS7_FTIM3 3130 CONFIG_SYS_CS7_FTIM3
3136 CONFIG_SYS_CS7_MASK 3131 CONFIG_SYS_CS7_MASK
3137 CONFIG_SYS_CS7_SIZE 3132 CONFIG_SYS_CS7_SIZE
3138 CONFIG_SYS_CS7_START 3133 CONFIG_SYS_CS7_START
3139 CONFIG_SYS_CSOR0 3134 CONFIG_SYS_CSOR0
3140 CONFIG_SYS_CSOR0_EXT 3135 CONFIG_SYS_CSOR0_EXT
3141 CONFIG_SYS_CSOR1 3136 CONFIG_SYS_CSOR1
3142 CONFIG_SYS_CSOR1_EXT 3137 CONFIG_SYS_CSOR1_EXT
3143 CONFIG_SYS_CSOR2 3138 CONFIG_SYS_CSOR2
3144 CONFIG_SYS_CSOR2_EXT 3139 CONFIG_SYS_CSOR2_EXT
3145 CONFIG_SYS_CSOR3 3140 CONFIG_SYS_CSOR3
3146 CONFIG_SYS_CSOR3_EXT 3141 CONFIG_SYS_CSOR3_EXT
3147 CONFIG_SYS_CSOR4 3142 CONFIG_SYS_CSOR4
3148 CONFIG_SYS_CSOR4_EXT 3143 CONFIG_SYS_CSOR4_EXT
3149 CONFIG_SYS_CSOR5 3144 CONFIG_SYS_CSOR5
3150 CONFIG_SYS_CSOR5_EXT 3145 CONFIG_SYS_CSOR5_EXT
3151 CONFIG_SYS_CSOR6 3146 CONFIG_SYS_CSOR6
3152 CONFIG_SYS_CSOR6_EXT 3147 CONFIG_SYS_CSOR6_EXT
3153 CONFIG_SYS_CSOR7 3148 CONFIG_SYS_CSOR7
3154 CONFIG_SYS_CSOR7_EXT 3149 CONFIG_SYS_CSOR7_EXT
3155 CONFIG_SYS_CSPR0 3150 CONFIG_SYS_CSPR0
3156 CONFIG_SYS_CSPR0_EXT 3151 CONFIG_SYS_CSPR0_EXT
3157 CONFIG_SYS_CSPR0_FINAL 3152 CONFIG_SYS_CSPR0_FINAL
3158 CONFIG_SYS_CSPR1 3153 CONFIG_SYS_CSPR1
3159 CONFIG_SYS_CSPR1_EXT 3154 CONFIG_SYS_CSPR1_EXT
3160 CONFIG_SYS_CSPR1_FINAL 3155 CONFIG_SYS_CSPR1_FINAL
3161 CONFIG_SYS_CSPR2 3156 CONFIG_SYS_CSPR2
3162 CONFIG_SYS_CSPR2_EXT 3157 CONFIG_SYS_CSPR2_EXT
3163 CONFIG_SYS_CSPR2_FINAL 3158 CONFIG_SYS_CSPR2_FINAL
3164 CONFIG_SYS_CSPR3 3159 CONFIG_SYS_CSPR3
3165 CONFIG_SYS_CSPR3_EXT 3160 CONFIG_SYS_CSPR3_EXT
3166 CONFIG_SYS_CSPR3_FINAL 3161 CONFIG_SYS_CSPR3_FINAL
3167 CONFIG_SYS_CSPR4 3162 CONFIG_SYS_CSPR4
3168 CONFIG_SYS_CSPR4_EXT 3163 CONFIG_SYS_CSPR4_EXT
3169 CONFIG_SYS_CSPR5 3164 CONFIG_SYS_CSPR5
3170 CONFIG_SYS_CSPR5_EXT 3165 CONFIG_SYS_CSPR5_EXT
3171 CONFIG_SYS_CSPR6 3166 CONFIG_SYS_CSPR6
3172 CONFIG_SYS_CSPR6_EXT 3167 CONFIG_SYS_CSPR6_EXT
3173 CONFIG_SYS_CSPR7 3168 CONFIG_SYS_CSPR7
3174 CONFIG_SYS_CSPR7_EXT 3169 CONFIG_SYS_CSPR7_EXT
3175 CONFIG_SYS_CS_ALETIMING 3170 CONFIG_SYS_CS_ALETIMING
3176 CONFIG_SYS_CS_BURST 3171 CONFIG_SYS_CS_BURST
3177 CONFIG_SYS_CS_DEADCYCLE 3172 CONFIG_SYS_CS_DEADCYCLE
3178 CONFIG_SYS_CS_HOLDCYCLE 3173 CONFIG_SYS_CS_HOLDCYCLE
3179 CONFIG_SYS_DA850_CS2CFG 3174 CONFIG_SYS_DA850_CS2CFG
3180 CONFIG_SYS_DA850_CS3CFG 3175 CONFIG_SYS_DA850_CS3CFG
3181 CONFIG_SYS_DA850_DDR2_DDRPHYCR 3176 CONFIG_SYS_DA850_DDR2_DDRPHYCR
3182 CONFIG_SYS_DA850_DDR2_PBBPR 3177 CONFIG_SYS_DA850_DDR2_PBBPR
3183 CONFIG_SYS_DA850_DDR2_SDBCR 3178 CONFIG_SYS_DA850_DDR2_SDBCR
3184 CONFIG_SYS_DA850_DDR2_SDBCR2 3179 CONFIG_SYS_DA850_DDR2_SDBCR2
3185 CONFIG_SYS_DA850_DDR2_SDRCR 3180 CONFIG_SYS_DA850_DDR2_SDRCR
3186 CONFIG_SYS_DA850_DDR2_SDTIMR 3181 CONFIG_SYS_DA850_DDR2_SDTIMR
3187 CONFIG_SYS_DA850_DDR2_SDTIMR2 3182 CONFIG_SYS_DA850_DDR2_SDTIMR2
3188 CONFIG_SYS_DA850_PLL0_PLLDIV1 3183 CONFIG_SYS_DA850_PLL0_PLLDIV1
3189 CONFIG_SYS_DA850_PLL0_PLLDIV2 3184 CONFIG_SYS_DA850_PLL0_PLLDIV2
3190 CONFIG_SYS_DA850_PLL0_PLLDIV3 3185 CONFIG_SYS_DA850_PLL0_PLLDIV3
3191 CONFIG_SYS_DA850_PLL0_PLLDIV4 3186 CONFIG_SYS_DA850_PLL0_PLLDIV4
3192 CONFIG_SYS_DA850_PLL0_PLLDIV5 3187 CONFIG_SYS_DA850_PLL0_PLLDIV5
3193 CONFIG_SYS_DA850_PLL0_PLLDIV6 3188 CONFIG_SYS_DA850_PLL0_PLLDIV6
3194 CONFIG_SYS_DA850_PLL0_PLLDIV7 3189 CONFIG_SYS_DA850_PLL0_PLLDIV7
3195 CONFIG_SYS_DA850_PLL0_PLLM 3190 CONFIG_SYS_DA850_PLL0_PLLM
3196 CONFIG_SYS_DA850_PLL0_POSTDIV 3191 CONFIG_SYS_DA850_PLL0_POSTDIV
3197 CONFIG_SYS_DA850_PLL0_PREDIV 3192 CONFIG_SYS_DA850_PLL0_PREDIV
3198 CONFIG_SYS_DA850_PLL1_PLLDIV1 3193 CONFIG_SYS_DA850_PLL1_PLLDIV1
3199 CONFIG_SYS_DA850_PLL1_PLLDIV2 3194 CONFIG_SYS_DA850_PLL1_PLLDIV2
3200 CONFIG_SYS_DA850_PLL1_PLLDIV3 3195 CONFIG_SYS_DA850_PLL1_PLLDIV3
3201 CONFIG_SYS_DA850_PLL1_PLLM 3196 CONFIG_SYS_DA850_PLL1_PLLM
3202 CONFIG_SYS_DA850_PLL1_POSTDIV 3197 CONFIG_SYS_DA850_PLL1_POSTDIV
3203 CONFIG_SYS_DA850_SYSCFG_SUSPSRC 3198 CONFIG_SYS_DA850_SYSCFG_SUSPSRC
3204 CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 3199 CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0
3205 CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 3200 CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
3206 CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2 3201 CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
3207 CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 3202 CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
3208 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT 3203 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
3209 CONFIG_SYS_DAVINCI_I2C_SLAVE 3204 CONFIG_SYS_DAVINCI_I2C_SLAVE
3210 CONFIG_SYS_DAVINCI_I2C_SLAVE1 3205 CONFIG_SYS_DAVINCI_I2C_SLAVE1
3211 CONFIG_SYS_DAVINCI_I2C_SLAVE2 3206 CONFIG_SYS_DAVINCI_I2C_SLAVE2
3212 CONFIG_SYS_DAVINCI_I2C_SPEED 3207 CONFIG_SYS_DAVINCI_I2C_SPEED
3213 CONFIG_SYS_DAVINCI_I2C_SPEED1 3208 CONFIG_SYS_DAVINCI_I2C_SPEED1
3214 CONFIG_SYS_DAVINCI_I2C_SPEED2 3209 CONFIG_SYS_DAVINCI_I2C_SPEED2
3215 CONFIG_SYS_DBAT 3210 CONFIG_SYS_DBAT
3216 CONFIG_SYS_DBAT0L 3211 CONFIG_SYS_DBAT0L
3217 CONFIG_SYS_DBAT0U 3212 CONFIG_SYS_DBAT0U
3218 CONFIG_SYS_DBAT1L 3213 CONFIG_SYS_DBAT1L
3219 CONFIG_SYS_DBAT1U 3214 CONFIG_SYS_DBAT1U
3220 CONFIG_SYS_DBAT2L 3215 CONFIG_SYS_DBAT2L
3221 CONFIG_SYS_DBAT2U 3216 CONFIG_SYS_DBAT2U
3222 CONFIG_SYS_DBAT3L 3217 CONFIG_SYS_DBAT3L
3223 CONFIG_SYS_DBAT3U 3218 CONFIG_SYS_DBAT3U
3224 CONFIG_SYS_DBAT4L 3219 CONFIG_SYS_DBAT4L
3225 CONFIG_SYS_DBAT4U 3220 CONFIG_SYS_DBAT4U
3226 CONFIG_SYS_DBAT5L 3221 CONFIG_SYS_DBAT5L
3227 CONFIG_SYS_DBAT5U 3222 CONFIG_SYS_DBAT5U
3228 CONFIG_SYS_DBAT6L 3223 CONFIG_SYS_DBAT6L
3229 CONFIG_SYS_DBAT6L_EARLY 3224 CONFIG_SYS_DBAT6L_EARLY
3230 CONFIG_SYS_DBAT6U 3225 CONFIG_SYS_DBAT6U
3231 CONFIG_SYS_DBAT6U_EARLY 3226 CONFIG_SYS_DBAT6U_EARLY
3232 CONFIG_SYS_DBAT7L 3227 CONFIG_SYS_DBAT7L
3233 CONFIG_SYS_DBAT7U 3228 CONFIG_SYS_DBAT7U
3234 CONFIG_SYS_DCACHE_INV 3229 CONFIG_SYS_DCACHE_INV
3235 CONFIG_SYS_DCACHE_LINESZ 3230 CONFIG_SYS_DCACHE_LINESZ
3236 CONFIG_SYS_DCACHE_SACR_VALUE 3231 CONFIG_SYS_DCACHE_SACR_VALUE
3237 CONFIG_SYS_DCSRBAR 3232 CONFIG_SYS_DCSRBAR
3238 CONFIG_SYS_DCSRBAR_PHYS 3233 CONFIG_SYS_DCSRBAR_PHYS
3239 CONFIG_SYS_DCSR_COP_CCP_ADDR 3234 CONFIG_SYS_DCSR_COP_CCP_ADDR
3240 CONFIG_SYS_DCSR_DCFG_ADDR 3235 CONFIG_SYS_DCSR_DCFG_ADDR
3241 CONFIG_SYS_DCSR_DCFG_OFFSET 3236 CONFIG_SYS_DCSR_DCFG_OFFSET
3242 CONFIG_SYS_DCU_ADDR 3237 CONFIG_SYS_DCU_ADDR
3243 CONFIG_SYS_DDR1_CS0_BNDS 3238 CONFIG_SYS_DDR1_CS0_BNDS
3244 CONFIG_SYS_DDR2_CFG_1A 3239 CONFIG_SYS_DDR2_CFG_1A
3245 CONFIG_SYS_DDR2_CFG_1B 3240 CONFIG_SYS_DDR2_CFG_1B
3246 CONFIG_SYS_DDR2_CFG_2 3241 CONFIG_SYS_DDR2_CFG_2
3247 CONFIG_SYS_DDR2_CLK_CTRL 3242 CONFIG_SYS_DDR2_CLK_CTRL
3248 CONFIG_SYS_DDR2_CS0_BNDS 3243 CONFIG_SYS_DDR2_CS0_BNDS
3249 CONFIG_SYS_DDR2_CS0_CONFIG 3244 CONFIG_SYS_DDR2_CS0_CONFIG
3250 CONFIG_SYS_DDR2_CS1_BNDS 3245 CONFIG_SYS_DDR2_CS1_BNDS
3251 CONFIG_SYS_DDR2_CS1_CONFIG 3246 CONFIG_SYS_DDR2_CS1_CONFIG
3252 CONFIG_SYS_DDR2_CS2_BNDS 3247 CONFIG_SYS_DDR2_CS2_BNDS
3253 CONFIG_SYS_DDR2_CS2_CONFIG 3248 CONFIG_SYS_DDR2_CS2_CONFIG
3254 CONFIG_SYS_DDR2_CS3_BNDS 3249 CONFIG_SYS_DDR2_CS3_BNDS
3255 CONFIG_SYS_DDR2_CS3_CONFIG 3250 CONFIG_SYS_DDR2_CS3_CONFIG
3256 CONFIG_SYS_DDR2_DATA_INIT 3251 CONFIG_SYS_DDR2_DATA_INIT
3257 CONFIG_SYS_DDR2_EXT_REFRESH 3252 CONFIG_SYS_DDR2_EXT_REFRESH
3258 CONFIG_SYS_DDR2_INTERVAL 3253 CONFIG_SYS_DDR2_INTERVAL
3259 CONFIG_SYS_DDR2_MODE_1 3254 CONFIG_SYS_DDR2_MODE_1
3260 CONFIG_SYS_DDR2_MODE_2 3255 CONFIG_SYS_DDR2_MODE_2
3261 CONFIG_SYS_DDR2_MODE_CTL 3256 CONFIG_SYS_DDR2_MODE_CTL
3262 CONFIG_SYS_DDR2_TIMING_0 3257 CONFIG_SYS_DDR2_TIMING_0
3263 CONFIG_SYS_DDR2_TIMING_1 3258 CONFIG_SYS_DDR2_TIMING_1
3264 CONFIG_SYS_DDR2_TIMING_2 3259 CONFIG_SYS_DDR2_TIMING_2
3265 CONFIG_SYS_DDRCDR 3260 CONFIG_SYS_DDRCDR
3266 CONFIG_SYS_DDRCDR_VALUE 3261 CONFIG_SYS_DDRCDR_VALUE
3267 CONFIG_SYS_DDRCMD_EM2 3262 CONFIG_SYS_DDRCMD_EM2
3268 CONFIG_SYS_DDRCMD_EM3 3263 CONFIG_SYS_DDRCMD_EM3
3269 CONFIG_SYS_DDRCMD_EN_DLL 3264 CONFIG_SYS_DDRCMD_EN_DLL
3270 CONFIG_SYS_DDRCMD_NOP 3265 CONFIG_SYS_DDRCMD_NOP
3271 CONFIG_SYS_DDRCMD_OCD_DEFAULT 3266 CONFIG_SYS_DDRCMD_OCD_DEFAULT
3272 CONFIG_SYS_DDRCMD_OCD_EXIT 3267 CONFIG_SYS_DDRCMD_OCD_EXIT
3273 CONFIG_SYS_DDRCMD_PCHG_ALL 3268 CONFIG_SYS_DDRCMD_PCHG_ALL
3274 CONFIG_SYS_DDRCMD_RES_DLL 3269 CONFIG_SYS_DDRCMD_RES_DLL
3275 CONFIG_SYS_DDRCMD_RFSH 3270 CONFIG_SYS_DDRCMD_RFSH
3276 CONFIG_SYS_DDRD 3271 CONFIG_SYS_DDRD
3277 CONFIG_SYS_DDRTC 3272 CONFIG_SYS_DDRTC
3278 CONFIG_SYS_DDRUA 3273 CONFIG_SYS_DDRUA
3279 CONFIG_SYS_DDR_BASE 3274 CONFIG_SYS_DDR_BASE
3280 CONFIG_SYS_DDR_BLOCK1_SIZE 3275 CONFIG_SYS_DDR_BLOCK1_SIZE
3281 CONFIG_SYS_DDR_BLOCK2_BASE 3276 CONFIG_SYS_DDR_BLOCK2_BASE
3282 CONFIG_SYS_DDR_CACHED_ADDR 3277 CONFIG_SYS_DDR_CACHED_ADDR
3283 CONFIG_SYS_DDR_CDR_1 3278 CONFIG_SYS_DDR_CDR_1
3284 CONFIG_SYS_DDR_CDR_2 3279 CONFIG_SYS_DDR_CDR_2
3285 CONFIG_SYS_DDR_CFG_1A 3280 CONFIG_SYS_DDR_CFG_1A
3286 CONFIG_SYS_DDR_CFG_1B 3281 CONFIG_SYS_DDR_CFG_1B
3287 CONFIG_SYS_DDR_CFG_2 3282 CONFIG_SYS_DDR_CFG_2
3288 CONFIG_SYS_DDR_CLKSEL 3283 CONFIG_SYS_DDR_CLKSEL
3289 CONFIG_SYS_DDR_CLK_CNTL 3284 CONFIG_SYS_DDR_CLK_CNTL
3290 CONFIG_SYS_DDR_CLK_CONTROL 3285 CONFIG_SYS_DDR_CLK_CONTROL
3291 CONFIG_SYS_DDR_CLK_CTRL 3286 CONFIG_SYS_DDR_CLK_CTRL
3292 CONFIG_SYS_DDR_CLK_CTRL_1000 3287 CONFIG_SYS_DDR_CLK_CTRL_1000
3293 CONFIG_SYS_DDR_CLK_CTRL_1200 3288 CONFIG_SYS_DDR_CLK_CTRL_1200
3294 CONFIG_SYS_DDR_CLK_CTRL_1333 3289 CONFIG_SYS_DDR_CLK_CTRL_1333
3295 CONFIG_SYS_DDR_CLK_CTRL_667 3290 CONFIG_SYS_DDR_CLK_CTRL_667
3296 CONFIG_SYS_DDR_CLK_CTRL_800 3291 CONFIG_SYS_DDR_CLK_CTRL_800
3297 CONFIG_SYS_DDR_CLK_CTRL_900 3292 CONFIG_SYS_DDR_CLK_CTRL_900
3298 CONFIG_SYS_DDR_CONFIG 3293 CONFIG_SYS_DDR_CONFIG
3299 CONFIG_SYS_DDR_CONFIG_2 3294 CONFIG_SYS_DDR_CONFIG_2
3300 CONFIG_SYS_DDR_CONFIG_256 3295 CONFIG_SYS_DDR_CONFIG_256
3301 CONFIG_SYS_DDR_CONTROL 3296 CONFIG_SYS_DDR_CONTROL
3302 CONFIG_SYS_DDR_CONTROL2 3297 CONFIG_SYS_DDR_CONTROL2
3303 CONFIG_SYS_DDR_CONTROL_1333 3298 CONFIG_SYS_DDR_CONTROL_1333
3304 CONFIG_SYS_DDR_CONTROL_2 3299 CONFIG_SYS_DDR_CONTROL_2
3305 CONFIG_SYS_DDR_CONTROL_2_1333 3300 CONFIG_SYS_DDR_CONTROL_2_1333
3306 CONFIG_SYS_DDR_CONTROL_2_800 3301 CONFIG_SYS_DDR_CONTROL_2_800
3307 CONFIG_SYS_DDR_CONTROL_800 3302 CONFIG_SYS_DDR_CONTROL_800
3308 CONFIG_SYS_DDR_CPO 3303 CONFIG_SYS_DDR_CPO
3309 CONFIG_SYS_DDR_CS0_BNDS 3304 CONFIG_SYS_DDR_CS0_BNDS
3310 CONFIG_SYS_DDR_CS0_CONFIG 3305 CONFIG_SYS_DDR_CS0_CONFIG
3311 CONFIG_SYS_DDR_CS0_CONFIG_1333 3306 CONFIG_SYS_DDR_CS0_CONFIG_1333
3312 CONFIG_SYS_DDR_CS0_CONFIG_2 3307 CONFIG_SYS_DDR_CS0_CONFIG_2
3313 CONFIG_SYS_DDR_CS0_CONFIG_800 3308 CONFIG_SYS_DDR_CS0_CONFIG_800
3314 CONFIG_SYS_DDR_CS1_BNDS 3309 CONFIG_SYS_DDR_CS1_BNDS
3315 CONFIG_SYS_DDR_CS1_CONFIG 3310 CONFIG_SYS_DDR_CS1_CONFIG
3316 CONFIG_SYS_DDR_CS1_CONFIG_2 3311 CONFIG_SYS_DDR_CS1_CONFIG_2
3317 CONFIG_SYS_DDR_CS2_BNDS 3312 CONFIG_SYS_DDR_CS2_BNDS
3318 CONFIG_SYS_DDR_CS2_CONFIG 3313 CONFIG_SYS_DDR_CS2_CONFIG
3319 CONFIG_SYS_DDR_CS3_BNDS 3314 CONFIG_SYS_DDR_CS3_BNDS
3320 CONFIG_SYS_DDR_CS3_CONFIG 3315 CONFIG_SYS_DDR_CS3_CONFIG
3321 CONFIG_SYS_DDR_DATA_INIT 3316 CONFIG_SYS_DDR_DATA_INIT
3322 CONFIG_SYS_DDR_ERR_DIS 3317 CONFIG_SYS_DDR_ERR_DIS
3323 CONFIG_SYS_DDR_ERR_INT_EN 3318 CONFIG_SYS_DDR_ERR_INT_EN
3324 CONFIG_SYS_DDR_INIT_ADDR 3319 CONFIG_SYS_DDR_INIT_ADDR
3325 CONFIG_SYS_DDR_INIT_EXT_ADDR 3320 CONFIG_SYS_DDR_INIT_EXT_ADDR
3326 CONFIG_SYS_DDR_INTERVAL 3321 CONFIG_SYS_DDR_INTERVAL
3327 CONFIG_SYS_DDR_INTERVAL_1000 3322 CONFIG_SYS_DDR_INTERVAL_1000
3328 CONFIG_SYS_DDR_INTERVAL_1200 3323 CONFIG_SYS_DDR_INTERVAL_1200
3329 CONFIG_SYS_DDR_INTERVAL_1333 3324 CONFIG_SYS_DDR_INTERVAL_1333
3330 CONFIG_SYS_DDR_INTERVAL_667 3325 CONFIG_SYS_DDR_INTERVAL_667
3331 CONFIG_SYS_DDR_INTERVAL_800 3326 CONFIG_SYS_DDR_INTERVAL_800
3332 CONFIG_SYS_DDR_INTERVAL_900 3327 CONFIG_SYS_DDR_INTERVAL_900
3333 CONFIG_SYS_DDR_MODE 3328 CONFIG_SYS_DDR_MODE
3334 CONFIG_SYS_DDR_MODE2 3329 CONFIG_SYS_DDR_MODE2
3335 CONFIG_SYS_DDR_MODE_1 3330 CONFIG_SYS_DDR_MODE_1
3336 CONFIG_SYS_DDR_MODE_1_1000 3331 CONFIG_SYS_DDR_MODE_1_1000
3337 CONFIG_SYS_DDR_MODE_1_1200 3332 CONFIG_SYS_DDR_MODE_1_1200
3338 CONFIG_SYS_DDR_MODE_1_1333 3333 CONFIG_SYS_DDR_MODE_1_1333
3339 CONFIG_SYS_DDR_MODE_1_667 3334 CONFIG_SYS_DDR_MODE_1_667
3340 CONFIG_SYS_DDR_MODE_1_800 3335 CONFIG_SYS_DDR_MODE_1_800
3341 CONFIG_SYS_DDR_MODE_1_900 3336 CONFIG_SYS_DDR_MODE_1_900
3342 CONFIG_SYS_DDR_MODE_2 3337 CONFIG_SYS_DDR_MODE_2
3343 CONFIG_SYS_DDR_MODE_2_1000 3338 CONFIG_SYS_DDR_MODE_2_1000
3344 CONFIG_SYS_DDR_MODE_2_1200 3339 CONFIG_SYS_DDR_MODE_2_1200
3345 CONFIG_SYS_DDR_MODE_2_1333 3340 CONFIG_SYS_DDR_MODE_2_1333
3346 CONFIG_SYS_DDR_MODE_2_667 3341 CONFIG_SYS_DDR_MODE_2_667
3347 CONFIG_SYS_DDR_MODE_2_800 3342 CONFIG_SYS_DDR_MODE_2_800
3348 CONFIG_SYS_DDR_MODE_2_900 3343 CONFIG_SYS_DDR_MODE_2_900
3349 CONFIG_SYS_DDR_MODE_CONTROL 3344 CONFIG_SYS_DDR_MODE_CONTROL
3350 CONFIG_SYS_DDR_MODE_CTL 3345 CONFIG_SYS_DDR_MODE_CTL
3351 CONFIG_SYS_DDR_MODE_WEAK 3346 CONFIG_SYS_DDR_MODE_WEAK
3352 CONFIG_SYS_DDR_OCD_CTRL 3347 CONFIG_SYS_DDR_OCD_CTRL
3353 CONFIG_SYS_DDR_OCD_STATUS 3348 CONFIG_SYS_DDR_OCD_STATUS
3354 CONFIG_SYS_DDR_RAW_TIMING 3349 CONFIG_SYS_DDR_RAW_TIMING
3355 CONFIG_SYS_DDR_RCW_1 3350 CONFIG_SYS_DDR_RCW_1
3356 CONFIG_SYS_DDR_RCW_2 3351 CONFIG_SYS_DDR_RCW_2
3357 CONFIG_SYS_DDR_SBE 3352 CONFIG_SYS_DDR_SBE
3358 CONFIG_SYS_DDR_SDRAM_BASE 3353 CONFIG_SYS_DDR_SDRAM_BASE
3359 CONFIG_SYS_DDR_SDRAM_BASE2 3354 CONFIG_SYS_DDR_SDRAM_BASE2
3360 CONFIG_SYS_DDR_SDRAM_CFG 3355 CONFIG_SYS_DDR_SDRAM_CFG
3361 CONFIG_SYS_DDR_SDRAM_CFG2 3356 CONFIG_SYS_DDR_SDRAM_CFG2
3362 CONFIG_SYS_DDR_SDRAM_CFG_2 3357 CONFIG_SYS_DDR_SDRAM_CFG_2
3363 CONFIG_SYS_DDR_SDRAM_CLK_CNTL 3358 CONFIG_SYS_DDR_SDRAM_CLK_CNTL
3364 CONFIG_SYS_DDR_SDRAM_INTERVAL 3359 CONFIG_SYS_DDR_SDRAM_INTERVAL
3365 CONFIG_SYS_DDR_SDRAM_MODE 3360 CONFIG_SYS_DDR_SDRAM_MODE
3366 CONFIG_SYS_DDR_SDRAM_MODE_2 3361 CONFIG_SYS_DDR_SDRAM_MODE_2
3367 CONFIG_SYS_DDR_SIZE 3362 CONFIG_SYS_DDR_SIZE
3368 CONFIG_SYS_DDR_SR_CNTR 3363 CONFIG_SYS_DDR_SR_CNTR
3369 CONFIG_SYS_DDR_TIMING_0 3364 CONFIG_SYS_DDR_TIMING_0
3370 CONFIG_SYS_DDR_TIMING_0_1000 3365 CONFIG_SYS_DDR_TIMING_0_1000
3371 CONFIG_SYS_DDR_TIMING_0_1200 3366 CONFIG_SYS_DDR_TIMING_0_1200
3372 CONFIG_SYS_DDR_TIMING_0_1333 3367 CONFIG_SYS_DDR_TIMING_0_1333
3373 CONFIG_SYS_DDR_TIMING_0_667 3368 CONFIG_SYS_DDR_TIMING_0_667
3374 CONFIG_SYS_DDR_TIMING_0_800 3369 CONFIG_SYS_DDR_TIMING_0_800
3375 CONFIG_SYS_DDR_TIMING_0_900 3370 CONFIG_SYS_DDR_TIMING_0_900
3376 CONFIG_SYS_DDR_TIMING_1 3371 CONFIG_SYS_DDR_TIMING_1
3377 CONFIG_SYS_DDR_TIMING_1_1000 3372 CONFIG_SYS_DDR_TIMING_1_1000
3378 CONFIG_SYS_DDR_TIMING_1_1200 3373 CONFIG_SYS_DDR_TIMING_1_1200
3379 CONFIG_SYS_DDR_TIMING_1_1333 3374 CONFIG_SYS_DDR_TIMING_1_1333
3380 CONFIG_SYS_DDR_TIMING_1_667 3375 CONFIG_SYS_DDR_TIMING_1_667
3381 CONFIG_SYS_DDR_TIMING_1_800 3376 CONFIG_SYS_DDR_TIMING_1_800
3382 CONFIG_SYS_DDR_TIMING_1_900 3377 CONFIG_SYS_DDR_TIMING_1_900
3383 CONFIG_SYS_DDR_TIMING_2 3378 CONFIG_SYS_DDR_TIMING_2
3384 CONFIG_SYS_DDR_TIMING_2_1000 3379 CONFIG_SYS_DDR_TIMING_2_1000
3385 CONFIG_SYS_DDR_TIMING_2_1200 3380 CONFIG_SYS_DDR_TIMING_2_1200
3386 CONFIG_SYS_DDR_TIMING_2_1333 3381 CONFIG_SYS_DDR_TIMING_2_1333
3387 CONFIG_SYS_DDR_TIMING_2_667 3382 CONFIG_SYS_DDR_TIMING_2_667
3388 CONFIG_SYS_DDR_TIMING_2_800 3383 CONFIG_SYS_DDR_TIMING_2_800
3389 CONFIG_SYS_DDR_TIMING_2_900 3384 CONFIG_SYS_DDR_TIMING_2_900
3390 CONFIG_SYS_DDR_TIMING_3 3385 CONFIG_SYS_DDR_TIMING_3
3391 CONFIG_SYS_DDR_TIMING_3_1000 3386 CONFIG_SYS_DDR_TIMING_3_1000
3392 CONFIG_SYS_DDR_TIMING_3_1200 3387 CONFIG_SYS_DDR_TIMING_3_1200
3393 CONFIG_SYS_DDR_TIMING_3_1333 3388 CONFIG_SYS_DDR_TIMING_3_1333
3394 CONFIG_SYS_DDR_TIMING_3_667 3389 CONFIG_SYS_DDR_TIMING_3_667
3395 CONFIG_SYS_DDR_TIMING_3_800 3390 CONFIG_SYS_DDR_TIMING_3_800
3396 CONFIG_SYS_DDR_TIMING_3_900 3391 CONFIG_SYS_DDR_TIMING_3_900
3397 CONFIG_SYS_DDR_TIMING_4 3392 CONFIG_SYS_DDR_TIMING_4
3398 CONFIG_SYS_DDR_TIMING_4_1333 3393 CONFIG_SYS_DDR_TIMING_4_1333
3399 CONFIG_SYS_DDR_TIMING_4_800 3394 CONFIG_SYS_DDR_TIMING_4_800
3400 CONFIG_SYS_DDR_TIMING_5 3395 CONFIG_SYS_DDR_TIMING_5
3401 CONFIG_SYS_DDR_TIMING_5_1333 3396 CONFIG_SYS_DDR_TIMING_5_1333
3402 CONFIG_SYS_DDR_TIMING_5_800 3397 CONFIG_SYS_DDR_TIMING_5_800
3403 CONFIG_SYS_DDR_WRITE_DATA_DELAY 3398 CONFIG_SYS_DDR_WRITE_DATA_DELAY
3404 CONFIG_SYS_DDR_WRLVL_CNTL 3399 CONFIG_SYS_DDR_WRLVL_CNTL
3405 CONFIG_SYS_DDR_WRLVL_CONTROL 3400 CONFIG_SYS_DDR_WRLVL_CONTROL
3406 CONFIG_SYS_DDR_WRLVL_CONTROL_1333 3401 CONFIG_SYS_DDR_WRLVL_CONTROL_1333
3407 CONFIG_SYS_DDR_WRLVL_CONTROL_667 3402 CONFIG_SYS_DDR_WRLVL_CONTROL_667
3408 CONFIG_SYS_DDR_WRLVL_CONTROL_800 3403 CONFIG_SYS_DDR_WRLVL_CONTROL_800
3409 CONFIG_SYS_DDR_ZQ_CNTL 3404 CONFIG_SYS_DDR_ZQ_CNTL
3410 CONFIG_SYS_DDR_ZQ_CONTROL 3405 CONFIG_SYS_DDR_ZQ_CONTROL
3411 CONFIG_SYS_DEBUG 3406 CONFIG_SYS_DEBUG
3412 CONFIG_SYS_DEBUG_SERVER_FW_ADDR 3407 CONFIG_SYS_DEBUG_SERVER_FW_ADDR
3413 CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR 3408 CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR
3414 CONFIG_SYS_DECREMENT_PATTERNS 3409 CONFIG_SYS_DECREMENT_PATTERNS
3415 CONFIG_SYS_DEFAULT_IMMR 3410 CONFIG_SYS_DEFAULT_IMMR
3416 CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS 3411 CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
3417 CONFIG_SYS_DEFAULT_MBAR 3412 CONFIG_SYS_DEFAULT_MBAR
3418 CONFIG_SYS_DEFAULT_VIDEO_MODE 3413 CONFIG_SYS_DEFAULT_VIDEO_MODE
3419 CONFIG_SYS_DEF_EEPROM_ADDR 3414 CONFIG_SYS_DEF_EEPROM_ADDR
3420 CONFIG_SYS_DELAYED_ICACHE 3415 CONFIG_SYS_DELAYED_ICACHE
3421 CONFIG_SYS_DER 3416 CONFIG_SYS_DER
3422 CONFIG_SYS_DEVICE_NULLDEV 3417 CONFIG_SYS_DEVICE_NULLDEV
3423 CONFIG_SYS_DFU_DATA_BUF_SIZE 3418 CONFIG_SYS_DFU_DATA_BUF_SIZE
3424 CONFIG_SYS_DFU_MAX_FILE_SIZE 3419 CONFIG_SYS_DFU_MAX_FILE_SIZE
3425 CONFIG_SYS_DIAG_ADDR 3420 CONFIG_SYS_DIAG_ADDR
3426 CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 3421 CONFIG_SYS_DIALOG_PMIC_I2C_ADDR
3427 CONFIG_SYS_DIMM_SLOTS_PER_CTLR 3422 CONFIG_SYS_DIMM_SLOTS_PER_CTLR
3428 CONFIG_SYS_DIRECT_FLASH_NFS 3423 CONFIG_SYS_DIRECT_FLASH_NFS
3429 CONFIG_SYS_DIRECT_FLASH_TFTP 3424 CONFIG_SYS_DIRECT_FLASH_TFTP
3430 CONFIG_SYS_DISCOVER_PHY 3425 CONFIG_SYS_DISCOVER_PHY
3431 CONFIG_SYS_DISP_CHR_RAM 3426 CONFIG_SYS_DISP_CHR_RAM
3432 CONFIG_SYS_DIU_ADDR 3427 CONFIG_SYS_DIU_ADDR
3433 CONFIG_SYS_DM36x_PINMUX0 3428 CONFIG_SYS_DM36x_PINMUX0
3434 CONFIG_SYS_DM36x_PINMUX1 3429 CONFIG_SYS_DM36x_PINMUX1
3435 CONFIG_SYS_DM36x_PINMUX2 3430 CONFIG_SYS_DM36x_PINMUX2
3436 CONFIG_SYS_DM36x_PINMUX3 3431 CONFIG_SYS_DM36x_PINMUX3
3437 CONFIG_SYS_DM36x_PINMUX4 3432 CONFIG_SYS_DM36x_PINMUX4
3438 CONFIG_SYS_DM36x_PLL1_PREDIV 3433 CONFIG_SYS_DM36x_PLL1_PREDIV
3439 CONFIG_SYS_DM36x_PLL2_PREDIV 3434 CONFIG_SYS_DM36x_PLL2_PREDIV
3440 CONFIG_SYS_DMA_USE_INTSRAM 3435 CONFIG_SYS_DMA_USE_INTSRAM
3441 CONFIG_SYS_DOC_SHORT_TIMEOUT 3436 CONFIG_SYS_DOC_SHORT_TIMEOUT
3442 CONFIG_SYS_DOC_SUPPORT_2000 3437 CONFIG_SYS_DOC_SUPPORT_2000
3443 CONFIG_SYS_DOC_SUPPORT_MILLENNIUM 3438 CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
3444 CONFIG_SYS_DP501_BASE 3439 CONFIG_SYS_DP501_BASE
3445 CONFIG_SYS_DP501_DIFFERENTIAL 3440 CONFIG_SYS_DP501_DIFFERENTIAL
3446 CONFIG_SYS_DP501_I2C 3441 CONFIG_SYS_DP501_I2C
3447 CONFIG_SYS_DP501_VCAPCTRL0 3442 CONFIG_SYS_DP501_VCAPCTRL0
3448 CONFIG_SYS_DPAA_DCE 3443 CONFIG_SYS_DPAA_DCE
3449 CONFIG_SYS_DPAA_FMAN 3444 CONFIG_SYS_DPAA_FMAN
3450 CONFIG_SYS_DPAA_PME 3445 CONFIG_SYS_DPAA_PME
3451 CONFIG_SYS_DPAA_QBMAN 3446 CONFIG_SYS_DPAA_QBMAN
3452 CONFIG_SYS_DPAA_RMAN 3447 CONFIG_SYS_DPAA_RMAN
3453 CONFIG_SYS_DP_DDR_BASE 3448 CONFIG_SYS_DP_DDR_BASE
3454 CONFIG_SYS_DP_DDR_BASE_PHY 3449 CONFIG_SYS_DP_DDR_BASE_PHY
3455 CONFIG_SYS_DRAMSZ 3450 CONFIG_SYS_DRAMSZ
3456 CONFIG_SYS_DRAMSZ1 3451 CONFIG_SYS_DRAMSZ1
3457 CONFIG_SYS_DRAM_BASE 3452 CONFIG_SYS_DRAM_BASE
3458 CONFIG_SYS_DRAM_SIZE 3453 CONFIG_SYS_DRAM_SIZE
3459 CONFIG_SYS_DRAM_TEST 3454 CONFIG_SYS_DRAM_TEST
3460 CONFIG_SYS_DS1339_TCR_VAL 3455 CONFIG_SYS_DS1339_TCR_VAL
3461 CONFIG_SYS_DS1388_TCR_VAL 3456 CONFIG_SYS_DS1388_TCR_VAL
3462 CONFIG_SYS_DSPIC_TEST_ADDR 3457 CONFIG_SYS_DSPIC_TEST_ADDR
3463 CONFIG_SYS_DSPIC_TEST_MASK 3458 CONFIG_SYS_DSPIC_TEST_MASK
3464 CONFIG_SYS_DSPI_CS0 3459 CONFIG_SYS_DSPI_CS0
3465 CONFIG_SYS_DSPI_CS2 3460 CONFIG_SYS_DSPI_CS2
3466 CONFIG_SYS_DSPI_CTAR0 3461 CONFIG_SYS_DSPI_CTAR0
3467 CONFIG_SYS_DSPI_CTAR1 3462 CONFIG_SYS_DSPI_CTAR1
3468 CONFIG_SYS_DSPI_CTAR2 3463 CONFIG_SYS_DSPI_CTAR2
3469 CONFIG_SYS_DSPI_CTAR3 3464 CONFIG_SYS_DSPI_CTAR3
3470 CONFIG_SYS_DSPI_CTAR4 3465 CONFIG_SYS_DSPI_CTAR4
3471 CONFIG_SYS_DSPI_CTAR5 3466 CONFIG_SYS_DSPI_CTAR5
3472 CONFIG_SYS_DSPI_CTAR6 3467 CONFIG_SYS_DSPI_CTAR6
3473 CONFIG_SYS_DSPI_CTAR7 3468 CONFIG_SYS_DSPI_CTAR7
3474 CONFIG_SYS_DTT_ADM1021 3469 CONFIG_SYS_DTT_ADM1021
3475 CONFIG_SYS_DTT_BUS_NUM 3470 CONFIG_SYS_DTT_BUS_NUM
3476 CONFIG_SYS_DTT_HYSTERESIS 3471 CONFIG_SYS_DTT_HYSTERESIS
3477 CONFIG_SYS_DTT_LOW_TEMP 3472 CONFIG_SYS_DTT_LOW_TEMP
3478 CONFIG_SYS_DTT_MAX_TEMP 3473 CONFIG_SYS_DTT_MAX_TEMP
3479 CONFIG_SYS_DTT_MIN_TEMP 3474 CONFIG_SYS_DTT_MIN_TEMP
3480 CONFIG_SYS_DUART_RST 3475 CONFIG_SYS_DUART_RST
3481 CONFIG_SYS_DV_CLKMODE 3476 CONFIG_SYS_DV_CLKMODE
3482 CONFIG_SYS_DV_NOR_BOOT_CFG 3477 CONFIG_SYS_DV_NOR_BOOT_CFG
3483 CONFIG_SYS_EBC_CFG 3478 CONFIG_SYS_EBC_CFG
3484 CONFIG_SYS_EBC_PB0AP 3479 CONFIG_SYS_EBC_PB0AP
3485 CONFIG_SYS_EBC_PB0CR 3480 CONFIG_SYS_EBC_PB0CR
3486 CONFIG_SYS_EBC_PB1AP 3481 CONFIG_SYS_EBC_PB1AP
3487 CONFIG_SYS_EBC_PB1CR 3482 CONFIG_SYS_EBC_PB1CR
3488 CONFIG_SYS_EBC_PB2AP 3483 CONFIG_SYS_EBC_PB2AP
3489 CONFIG_SYS_EBC_PB2CR 3484 CONFIG_SYS_EBC_PB2CR
3490 CONFIG_SYS_EBC_PB3AP 3485 CONFIG_SYS_EBC_PB3AP
3491 CONFIG_SYS_EBC_PB3CR 3486 CONFIG_SYS_EBC_PB3CR
3492 CONFIG_SYS_EBC_PB4AP 3487 CONFIG_SYS_EBC_PB4AP
3493 CONFIG_SYS_EBC_PB4CR 3488 CONFIG_SYS_EBC_PB4CR
3494 CONFIG_SYS_EBC_PB5AP 3489 CONFIG_SYS_EBC_PB5AP
3495 CONFIG_SYS_EBC_PB5CR 3490 CONFIG_SYS_EBC_PB5CR
3496 CONFIG_SYS_EBC_PB6AP 3491 CONFIG_SYS_EBC_PB6AP
3497 CONFIG_SYS_EBC_PB6CR 3492 CONFIG_SYS_EBC_PB6CR
3498 CONFIG_SYS_EBC_PB7AP 3493 CONFIG_SYS_EBC_PB7AP
3499 CONFIG_SYS_EBC_PB7CR 3494 CONFIG_SYS_EBC_PB7CR
3500 CONFIG_SYS_EBI_CFGR_VAL 3495 CONFIG_SYS_EBI_CFGR_VAL
3501 CONFIG_SYS_EBI_CSA_VAL 3496 CONFIG_SYS_EBI_CSA_VAL
3502 CONFIG_SYS_EEPROM_BASE 3497 CONFIG_SYS_EEPROM_BASE
3503 CONFIG_SYS_EEPROM_BUS_NUM 3498 CONFIG_SYS_EEPROM_BUS_NUM
3504 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3499 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS
3505 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 3500 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
3506 CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE 3501 CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
3507 CONFIG_SYS_EEPROM_SIZE 3502 CONFIG_SYS_EEPROM_SIZE
3508 CONFIG_SYS_EEPROM_WP 3503 CONFIG_SYS_EEPROM_WP
3509 CONFIG_SYS_EEPROM_WREN 3504 CONFIG_SYS_EEPROM_WREN
3510 CONFIG_SYS_EHCI_USB1_ADDR 3505 CONFIG_SYS_EHCI_USB1_ADDR
3511 CONFIG_SYS_ELBC_BASE 3506 CONFIG_SYS_ELBC_BASE
3512 CONFIG_SYS_ELBC_BASE_PHYS 3507 CONFIG_SYS_ELBC_BASE_PHYS
3513 CONFIG_SYS_ELO3_DMA3 3508 CONFIG_SYS_ELO3_DMA3
3514 CONFIG_SYS_ELPIDA_INIT_DEV_OP 3509 CONFIG_SYS_ELPIDA_INIT_DEV_OP
3515 CONFIG_SYS_ELPIDA_OCD_EXIT 3510 CONFIG_SYS_ELPIDA_OCD_EXIT
3516 CONFIG_SYS_ELPIDA_RES_DLL 3511 CONFIG_SYS_ELPIDA_RES_DLL
3517 CONFIG_SYS_EMAC_TI_CLKDIV 3512 CONFIG_SYS_EMAC_TI_CLKDIV
3518 CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS 3513 CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
3519 CONFIG_SYS_ENABLE_PADS_ALL 3514 CONFIG_SYS_ENABLE_PADS_ALL
3520 CONFIG_SYS_ENET_BD_BASE 3515 CONFIG_SYS_ENET_BD_BASE
3521 CONFIG_SYS_ENV_ADDR 3516 CONFIG_SYS_ENV_ADDR
3522 CONFIG_SYS_ENV_OFFSET 3517 CONFIG_SYS_ENV_OFFSET
3523 CONFIG_SYS_ENV_SECT_SIZE 3518 CONFIG_SYS_ENV_SECT_SIZE
3524 CONFIG_SYS_EPLD_BASE 3519 CONFIG_SYS_EPLD_BASE
3525 CONFIG_SYS_ETHOC_BASE 3520 CONFIG_SYS_ETHOC_BASE
3526 CONFIG_SYS_ETHOC_BUFFER_ADDR 3521 CONFIG_SYS_ETHOC_BUFFER_ADDR
3527 CONFIG_SYS_ETH_IOBASE 3522 CONFIG_SYS_ETH_IOBASE
3528 CONFIG_SYS_ETVPE_CLK 3523 CONFIG_SYS_ETVPE_CLK
3529 CONFIG_SYS_EXCEPTION_VECTORS_HIGH 3524 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
3530 CONFIG_SYS_EXTBDINFO 3525 CONFIG_SYS_EXTBDINFO
3531 CONFIG_SYS_EXTRA_ENV_RELOC 3526 CONFIG_SYS_EXTRA_ENV_RELOC
3532 CONFIG_SYS_EXT_SERIAL_CLOCK 3527 CONFIG_SYS_EXT_SERIAL_CLOCK
3533 CONFIG_SYS_FAST_CLK 3528 CONFIG_SYS_FAST_CLK
3534 CONFIG_SYS_FAULT_ECCONFIG_SYS_NO_FLASHHO_LINK_DOWN 3529 CONFIG_SYS_FAULT_ECCONFIG_SYS_NO_FLASHHO_LINK_DOWN
3535 CONFIG_SYS_FAULT_ECHO_LINK_DOWN 3530 CONFIG_SYS_FAULT_ECHO_LINK_DOWN
3536 CONFIG_SYS_FAULT_MII_ADDR 3531 CONFIG_SYS_FAULT_MII_ADDR
3537 CONFIG_SYS_FCC_PSMR 3532 CONFIG_SYS_FCC_PSMR
3538 CONFIG_SYS_FCPU133MHZ 3533 CONFIG_SYS_FCPU133MHZ
3539 CONFIG_SYS_FCPU266MHZ 3534 CONFIG_SYS_FCPU266MHZ
3540 CONFIG_SYS_FCPU333MHZ 3535 CONFIG_SYS_FCPU333MHZ
3541 CONFIG_SYS_FDC_DRIVE_NUMBER 3536 CONFIG_SYS_FDC_DRIVE_NUMBER
3542 CONFIG_SYS_FDC_HW_INIT 3537 CONFIG_SYS_FDC_HW_INIT
3543 CONFIG_SYS_FDT_ADDR 3538 CONFIG_SYS_FDT_ADDR
3544 CONFIG_SYS_FDT_BASE 3539 CONFIG_SYS_FDT_BASE
3545 CONFIG_SYS_FDT_LOAD_ADDR 3540 CONFIG_SYS_FDT_LOAD_ADDR
3546 CONFIG_SYS_FDT_PAD 3541 CONFIG_SYS_FDT_PAD
3547 CONFIG_SYS_FDT_SIZE 3542 CONFIG_SYS_FDT_SIZE
3548 CONFIG_SYS_FEC0_IOBASE 3543 CONFIG_SYS_FEC0_IOBASE
3549 CONFIG_SYS_FEC0_MIIBASE 3544 CONFIG_SYS_FEC0_MIIBASE
3550 CONFIG_SYS_FEC0_PHYADDR 3545 CONFIG_SYS_FEC0_PHYADDR
3551 CONFIG_SYS_FEC0_PINMUX 3546 CONFIG_SYS_FEC0_PINMUX
3552 CONFIG_SYS_FEC1_IOBASE 3547 CONFIG_SYS_FEC1_IOBASE
3553 CONFIG_SYS_FEC1_MIIBASE 3548 CONFIG_SYS_FEC1_MIIBASE
3554 CONFIG_SYS_FEC1_PHYADDR 3549 CONFIG_SYS_FEC1_PHYADDR
3555 CONFIG_SYS_FEC1_PINMUX 3550 CONFIG_SYS_FEC1_PINMUX
3556 CONFIG_SYS_FECI2C 3551 CONFIG_SYS_FECI2C
3557 CONFIG_SYS_FEC_BUF_USE_SRAM 3552 CONFIG_SYS_FEC_BUF_USE_SRAM
3558 CONFIG_SYS_FEC_FULL_MII 3553 CONFIG_SYS_FEC_FULL_MII
3559 CONFIG_SYS_FEC_NO_SHARED_PHY 3554 CONFIG_SYS_FEC_NO_SHARED_PHY
3560 CONFIG_SYS_FIFO_BASE 3555 CONFIG_SYS_FIFO_BASE
3561 CONFIG_SYS_FIXED_PHY_ADDR 3556 CONFIG_SYS_FIXED_PHY_ADDR
3562 CONFIG_SYS_FIXED_PHY_PORT 3557 CONFIG_SYS_FIXED_PHY_PORT
3563 CONFIG_SYS_FIXED_PHY_PORTS 3558 CONFIG_SYS_FIXED_PHY_PORTS
3564 CONFIG_SYS_FLASH 3559 CONFIG_SYS_FLASH
3565 CONFIG_SYS_FLASH0 3560 CONFIG_SYS_FLASH0
3566 CONFIG_SYS_FLASH0_BASE 3561 CONFIG_SYS_FLASH0_BASE
3567 CONFIG_SYS_FLASH1 3562 CONFIG_SYS_FLASH1
3568 CONFIG_SYS_FLASH1_BASE 3563 CONFIG_SYS_FLASH1_BASE
3569 CONFIG_SYS_FLASH1_BASE_PHYS 3564 CONFIG_SYS_FLASH1_BASE_PHYS
3570 CONFIG_SYS_FLASH1_BASE_PHYS_EARLY 3565 CONFIG_SYS_FLASH1_BASE_PHYS_EARLY
3571 CONFIG_SYS_FLASHBOOT 3566 CONFIG_SYS_FLASHBOOT
3572 CONFIG_SYS_FLASH_2ND_16BIT_DEV 3567 CONFIG_SYS_FLASH_2ND_16BIT_DEV
3573 CONFIG_SYS_FLASH_2ND_ADDR 3568 CONFIG_SYS_FLASH_2ND_ADDR
3574 CONFIG_SYS_FLASH_ADDR0 3569 CONFIG_SYS_FLASH_ADDR0
3575 CONFIG_SYS_FLASH_ADDR1 3570 CONFIG_SYS_FLASH_ADDR1
3576 CONFIG_SYS_FLASH_ADDR_BASE 3571 CONFIG_SYS_FLASH_ADDR_BASE
3577 CONFIG_SYS_FLASH_AMD_CHECK_DQ7 3572 CONFIG_SYS_FLASH_AMD_CHECK_DQ7
3578 CONFIG_SYS_FLASH_AUTOPROTECT_LIST 3573 CONFIG_SYS_FLASH_AUTOPROTECT_LIST
3579 CONFIG_SYS_FLASH_BANKS_LIST 3574 CONFIG_SYS_FLASH_BANKS_LIST
3580 CONFIG_SYS_FLASH_BANKS_SIZES 3575 CONFIG_SYS_FLASH_BANKS_SIZES
3581 CONFIG_SYS_FLASH_BANK_SIZE 3576 CONFIG_SYS_FLASH_BANK_SIZE
3582 CONFIG_SYS_FLASH_BASE 3577 CONFIG_SYS_FLASH_BASE
3583 CONFIG_SYS_FLASH_BASE0 3578 CONFIG_SYS_FLASH_BASE0
3584 CONFIG_SYS_FLASH_BASE1 3579 CONFIG_SYS_FLASH_BASE1
3585 CONFIG_SYS_FLASH_BASE2 3580 CONFIG_SYS_FLASH_BASE2
3586 CONFIG_SYS_FLASH_BASE_1 3581 CONFIG_SYS_FLASH_BASE_1
3587 CONFIG_SYS_FLASH_BASE_2 3582 CONFIG_SYS_FLASH_BASE_2
3588 CONFIG_SYS_FLASH_BASE_CS1 3583 CONFIG_SYS_FLASH_BASE_CS1
3589 CONFIG_SYS_FLASH_BASE_PHYS 3584 CONFIG_SYS_FLASH_BASE_PHYS
3590 CONFIG_SYS_FLASH_BASE_PHYS_EARLY 3585 CONFIG_SYS_FLASH_BASE_PHYS_EARLY
3591 CONFIG_SYS_FLASH_BASE_PHYS_H 3586 CONFIG_SYS_FLASH_BASE_PHYS_H
3592 CONFIG_SYS_FLASH_BASE_PHYS_L 3587 CONFIG_SYS_FLASH_BASE_PHYS_L
3593 CONFIG_SYS_FLASH_BASE_PHYS_LOW 3588 CONFIG_SYS_FLASH_BASE_PHYS_LOW
3594 CONFIG_SYS_FLASH_BR_PRELIM 3589 CONFIG_SYS_FLASH_BR_PRELIM
3595 CONFIG_SYS_FLASH_CFI 3590 CONFIG_SYS_FLASH_CFI
3596 CONFIG_SYS_FLASH_CFI_AMD_RESET 3591 CONFIG_SYS_FLASH_CFI_AMD_RESET
3597 CONFIG_SYS_FLASH_CFI_BROKEN_TABLE 3592 CONFIG_SYS_FLASH_CFI_BROKEN_TABLE
3598 CONFIG_SYS_FLASH_CFI_NONBLOCK 3593 CONFIG_SYS_FLASH_CFI_NONBLOCK
3599 CONFIG_SYS_FLASH_CFI_WIDTH 3594 CONFIG_SYS_FLASH_CFI_WIDTH
3600 CONFIG_SYS_FLASH_CHECKSUM 3595 CONFIG_SYS_FLASH_CHECKSUM
3601 CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE 3596 CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
3602 CONFIG_SYS_FLASH_EMPTY_INFO 3597 CONFIG_SYS_FLASH_EMPTY_INFO
3603 CONFIG_SYS_FLASH_ERASE_TOUT 3598 CONFIG_SYS_FLASH_ERASE_TOUT
3604 CONFIG_SYS_FLASH_LEGACY_256Kx8 3599 CONFIG_SYS_FLASH_LEGACY_256Kx8
3605 CONFIG_SYS_FLASH_LEGACY_512Kx16 3600 CONFIG_SYS_FLASH_LEGACY_512Kx16
3606 CONFIG_SYS_FLASH_LEGACY_512Kx8 3601 CONFIG_SYS_FLASH_LEGACY_512Kx8
3607 CONFIG_SYS_FLASH_LOCK_TOUT 3602 CONFIG_SYS_FLASH_LOCK_TOUT
3608 CONFIG_SYS_FLASH_OR_PRELIM 3603 CONFIG_SYS_FLASH_OR_PRELIM
3609 CONFIG_SYS_FLASH_PARMSECT_SZ 3604 CONFIG_SYS_FLASH_PARMSECT_SZ
3610 CONFIG_SYS_FLASH_PROTECTION 3605 CONFIG_SYS_FLASH_PROTECTION
3611 CONFIG_SYS_FLASH_QUIET_TEST 3606 CONFIG_SYS_FLASH_QUIET_TEST
3612 CONFIG_SYS_FLASH_READ0 3607 CONFIG_SYS_FLASH_READ0
3613 CONFIG_SYS_FLASH_READ1 3608 CONFIG_SYS_FLASH_READ1
3614 CONFIG_SYS_FLASH_READ2 3609 CONFIG_SYS_FLASH_READ2
3615 CONFIG_SYS_FLASH_SECT_SIZE 3610 CONFIG_SYS_FLASH_SECT_SIZE
3616 CONFIG_SYS_FLASH_SECT_SZ 3611 CONFIG_SYS_FLASH_SECT_SZ
3617 CONFIG_SYS_FLASH_SIZE 3612 CONFIG_SYS_FLASH_SIZE
3618 CONFIG_SYS_FLASH_SIZE_1 3613 CONFIG_SYS_FLASH_SIZE_1
3619 CONFIG_SYS_FLASH_SIZE_2 3614 CONFIG_SYS_FLASH_SIZE_2
3620 CONFIG_SYS_FLASH_UNLOCK_TOUT 3615 CONFIG_SYS_FLASH_UNLOCK_TOUT
3621 CONFIG_SYS_FLASH_USE_BUFFER_WRITE 3616 CONFIG_SYS_FLASH_USE_BUFFER_WRITE
3622 CONFIG_SYS_FLASH_VERIFY_AFTER_WRITE 3617 CONFIG_SYS_FLASH_VERIFY_AFTER_WRITE
3623 CONFIG_SYS_FLASH_WORD_SIZE 3618 CONFIG_SYS_FLASH_WORD_SIZE
3624 CONFIG_SYS_FLASH_WRITE_TOUT 3619 CONFIG_SYS_FLASH_WRITE_TOUT
3625 CONFIG_SYS_FLYCNFG_VAL 3620 CONFIG_SYS_FLYCNFG_VAL
3626 CONFIG_SYS_FM1_10GEC1_PHY_ADDR 3621 CONFIG_SYS_FM1_10GEC1_PHY_ADDR
3627 CONFIG_SYS_FM1_10GEC2_PHY_ADDR 3622 CONFIG_SYS_FM1_10GEC2_PHY_ADDR
3628 CONFIG_SYS_FM1_CLK 3623 CONFIG_SYS_FM1_CLK
3629 CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR 3624 CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR
3630 CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 3625 CONFIG_SYS_FM1_DTSEC1_PHY_ADDR
3631 CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR 3626 CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR
3632 CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 3627 CONFIG_SYS_FM1_DTSEC2_PHY_ADDR
3633 CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR 3628 CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR
3634 CONFIG_SYS_FM1_DTSEC3_PHY_ADDR 3629 CONFIG_SYS_FM1_DTSEC3_PHY_ADDR
3635 CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR 3630 CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR
3636 CONFIG_SYS_FM1_DTSEC4_PHY_ADDR 3631 CONFIG_SYS_FM1_DTSEC4_PHY_ADDR
3637 CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR 3632 CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR
3638 CONFIG_SYS_FM1_DTSEC5_PHY_ADDR 3633 CONFIG_SYS_FM1_DTSEC5_PHY_ADDR
3639 CONFIG_SYS_FM1_DTSEC_MDIO_ADDR 3634 CONFIG_SYS_FM1_DTSEC_MDIO_ADDR
3640 CONFIG_SYS_FM1_ONBOARD_PHY1_ADDR 3635 CONFIG_SYS_FM1_ONBOARD_PHY1_ADDR
3641 CONFIG_SYS_FM1_ONBOARD_PHY2_ADDR 3636 CONFIG_SYS_FM1_ONBOARD_PHY2_ADDR
3642 CONFIG_SYS_FM1_QSGMII11_PHY_ADDR 3637 CONFIG_SYS_FM1_QSGMII11_PHY_ADDR
3643 CONFIG_SYS_FM1_QSGMII21_PHY_ADDR 3638 CONFIG_SYS_FM1_QSGMII21_PHY_ADDR
3644 CONFIG_SYS_FM1_TGEC_MDIO_ADDR 3639 CONFIG_SYS_FM1_TGEC_MDIO_ADDR
3645 CONFIG_SYS_FM2_10GEC1_PHY_ADDR 3640 CONFIG_SYS_FM2_10GEC1_PHY_ADDR
3646 CONFIG_SYS_FM2_CLK 3641 CONFIG_SYS_FM2_CLK
3647 CONFIG_SYS_FM2_DTSEC1_PHY_ADDR 3642 CONFIG_SYS_FM2_DTSEC1_PHY_ADDR
3648 CONFIG_SYS_FM2_DTSEC2_PHY_ADDR 3643 CONFIG_SYS_FM2_DTSEC2_PHY_ADDR
3649 CONFIG_SYS_FM2_DTSEC3_PHY_ADDR 3644 CONFIG_SYS_FM2_DTSEC3_PHY_ADDR
3650 CONFIG_SYS_FM2_DTSEC4_PHY_ADDR 3645 CONFIG_SYS_FM2_DTSEC4_PHY_ADDR
3651 CONFIG_SYS_FM2_DTSEC_MDIO_ADDR 3646 CONFIG_SYS_FM2_DTSEC_MDIO_ADDR
3652 CONFIG_SYS_FM2_TGEC_MDIO_ADDR 3647 CONFIG_SYS_FM2_TGEC_MDIO_ADDR
3653 CONFIG_SYS_FMAN_FW_ADDR 3648 CONFIG_SYS_FMAN_FW_ADDR
3654 CONFIG_SYS_FMAN_V3 3649 CONFIG_SYS_FMAN_V3
3655 CONFIG_SYS_FM_MURAM_SIZE 3650 CONFIG_SYS_FM_MURAM_SIZE
3656 CONFIG_SYS_FORM_3U_CPCI 3651 CONFIG_SYS_FORM_3U_CPCI
3657 CONFIG_SYS_FORM_3U_VPX 3652 CONFIG_SYS_FORM_3U_VPX
3658 CONFIG_SYS_FORM_6U_CPCI 3653 CONFIG_SYS_FORM_6U_CPCI
3659 CONFIG_SYS_FORM_6U_VPX 3654 CONFIG_SYS_FORM_6U_VPX
3660 CONFIG_SYS_FORM_AMC 3655 CONFIG_SYS_FORM_AMC
3661 CONFIG_SYS_FORM_ATCA_AMC 3656 CONFIG_SYS_FORM_ATCA_AMC
3662 CONFIG_SYS_FORM_ATCA_PMC 3657 CONFIG_SYS_FORM_ATCA_PMC
3663 CONFIG_SYS_FORM_CUSTOM 3658 CONFIG_SYS_FORM_CUSTOM
3664 CONFIG_SYS_FORM_PCI 3659 CONFIG_SYS_FORM_PCI
3665 CONFIG_SYS_FORM_PCI_EXPRESS 3660 CONFIG_SYS_FORM_PCI_EXPRESS
3666 CONFIG_SYS_FORM_PMC 3661 CONFIG_SYS_FORM_PMC
3667 CONFIG_SYS_FORM_PMC_XMC 3662 CONFIG_SYS_FORM_PMC_XMC
3668 CONFIG_SYS_FORM_VME 3663 CONFIG_SYS_FORM_VME
3669 CONFIG_SYS_FORM_XMC 3664 CONFIG_SYS_FORM_XMC
3670 CONFIG_SYS_FPGA0_BASE 3665 CONFIG_SYS_FPGA0_BASE
3671 CONFIG_SYS_FPGA0_SIZE 3666 CONFIG_SYS_FPGA0_SIZE
3672 CONFIG_SYS_FPGA1_BASE 3667 CONFIG_SYS_FPGA1_BASE
3673 CONFIG_SYS_FPGA2_BASE 3668 CONFIG_SYS_FPGA2_BASE
3674 CONFIG_SYS_FPGA3_BASE 3669 CONFIG_SYS_FPGA3_BASE
3675 CONFIG_SYS_FPGAREG_DATE 3670 CONFIG_SYS_FPGAREG_DATE
3676 CONFIG_SYS_FPGAREG_DIPSW 3671 CONFIG_SYS_FPGAREG_DIPSW
3677 CONFIG_SYS_FPGAREG_FREQ 3672 CONFIG_SYS_FPGAREG_FREQ
3678 CONFIG_SYS_FPGAREG_RESET 3673 CONFIG_SYS_FPGAREG_RESET
3679 CONFIG_SYS_FPGAREG_RESET_CODE 3674 CONFIG_SYS_FPGAREG_RESET_CODE
3680 CONFIG_SYS_FPGA_AMASK 3675 CONFIG_SYS_FPGA_AMASK
3681 CONFIG_SYS_FPGA_BASE 3676 CONFIG_SYS_FPGA_BASE
3682 CONFIG_SYS_FPGA_BASE0 3677 CONFIG_SYS_FPGA_BASE0
3683 CONFIG_SYS_FPGA_BASE1 3678 CONFIG_SYS_FPGA_BASE1
3684 CONFIG_SYS_FPGA_BASE_0 3679 CONFIG_SYS_FPGA_BASE_0
3685 CONFIG_SYS_FPGA_BASE_1 3680 CONFIG_SYS_FPGA_BASE_1
3686 CONFIG_SYS_FPGA_BASE_ADDR 3681 CONFIG_SYS_FPGA_BASE_ADDR
3687 CONFIG_SYS_FPGA_BASE_PHYS 3682 CONFIG_SYS_FPGA_BASE_PHYS
3688 CONFIG_SYS_FPGA_CHECK_BUSY 3683 CONFIG_SYS_FPGA_CHECK_BUSY
3689 CONFIG_SYS_FPGA_CHECK_CTRLC 3684 CONFIG_SYS_FPGA_CHECK_CTRLC
3690 CONFIG_SYS_FPGA_CHECK_ERROR 3685 CONFIG_SYS_FPGA_CHECK_ERROR
3691 CONFIG_SYS_FPGA_CHIPSIDE_LOOPBACK 3686 CONFIG_SYS_FPGA_CHIPSIDE_LOOPBACK
3692 CONFIG_SYS_FPGA_CLK 3687 CONFIG_SYS_FPGA_CLK
3693 CONFIG_SYS_FPGA_COMMON 3688 CONFIG_SYS_FPGA_COMMON
3694 CONFIG_SYS_FPGA_COUNT 3689 CONFIG_SYS_FPGA_COUNT
3695 CONFIG_SYS_FPGA_CSOR 3690 CONFIG_SYS_FPGA_CSOR
3696 CONFIG_SYS_FPGA_CSPR 3691 CONFIG_SYS_FPGA_CSPR
3697 CONFIG_SYS_FPGA_CSPR_EXT 3692 CONFIG_SYS_FPGA_CSPR_EXT
3698 CONFIG_SYS_FPGA_CTRL 3693 CONFIG_SYS_FPGA_CTRL
3699 CONFIG_SYS_FPGA_CTRL_CF_RESET 3694 CONFIG_SYS_FPGA_CTRL_CF_RESET
3700 CONFIG_SYS_FPGA_CTRL_PS2_RESET 3695 CONFIG_SYS_FPGA_CTRL_PS2_RESET
3701 CONFIG_SYS_FPGA_CTRL_WDI 3696 CONFIG_SYS_FPGA_CTRL_WDI
3702 CONFIG_SYS_FPGA_DATA 3697 CONFIG_SYS_FPGA_DATA
3703 CONFIG_SYS_FPGA_DONE 3698 CONFIG_SYS_FPGA_DONE
3704 CONFIG_SYS_FPGA_DPRAM_RST 3699 CONFIG_SYS_FPGA_DPRAM_RST
3705 CONFIG_SYS_FPGA_DPRAM_RW_TYPE 3700 CONFIG_SYS_FPGA_DPRAM_RW_TYPE
3706 CONFIG_SYS_FPGA_DPRAM_R_INT_LINE 3701 CONFIG_SYS_FPGA_DPRAM_R_INT_LINE
3707 CONFIG_SYS_FPGA_DPRAM_W_INT_LINE 3702 CONFIG_SYS_FPGA_DPRAM_W_INT_LINE
3708 CONFIG_SYS_FPGA_FIFO_BASE 3703 CONFIG_SYS_FPGA_FIFO_BASE
3709 CONFIG_SYS_FPGA_FTIM0 3704 CONFIG_SYS_FPGA_FTIM0
3710 CONFIG_SYS_FPGA_FTIM1 3705 CONFIG_SYS_FPGA_FTIM1
3711 CONFIG_SYS_FPGA_FTIM2 3706 CONFIG_SYS_FPGA_FTIM2
3712 CONFIG_SYS_FPGA_FTIM3 3707 CONFIG_SYS_FPGA_FTIM3
3713 CONFIG_SYS_FPGA_INIT 3708 CONFIG_SYS_FPGA_INIT
3714 CONFIG_SYS_FPGA_IS_PROTO 3709 CONFIG_SYS_FPGA_IS_PROTO
3715 CONFIG_SYS_FPGA_LINESIDE_LOOPBACK 3710 CONFIG_SYS_FPGA_LINESIDE_LOOPBACK
3716 CONFIG_SYS_FPGA_MAGIC 3711 CONFIG_SYS_FPGA_MAGIC
3717 CONFIG_SYS_FPGA_MAGIC_MASK 3712 CONFIG_SYS_FPGA_MAGIC_MASK
3718 CONFIG_SYS_FPGA_MAX_SIZE 3713 CONFIG_SYS_FPGA_MAX_SIZE
3719 CONFIG_SYS_FPGA_MODE 3714 CONFIG_SYS_FPGA_MODE
3720 CONFIG_SYS_FPGA_MODE_CF_RESET 3715 CONFIG_SYS_FPGA_MODE_CF_RESET
3721 CONFIG_SYS_FPGA_MODE_DUART_RESET 3716 CONFIG_SYS_FPGA_MODE_DUART_RESET
3722 CONFIG_SYS_FPGA_MODE_ENABLE_OUTPUT 3717 CONFIG_SYS_FPGA_MODE_ENABLE_OUTPUT
3723 CONFIG_SYS_FPGA_MODE_TS_CLEAR 3718 CONFIG_SYS_FPGA_MODE_TS_CLEAR
3724 CONFIG_SYS_FPGA_MODE_TS_IRQ_CLEAR 3719 CONFIG_SYS_FPGA_MODE_TS_IRQ_CLEAR
3725 CONFIG_SYS_FPGA_MODE_TS_IRQ_ENABLE 3720 CONFIG_SYS_FPGA_MODE_TS_IRQ_ENABLE
3726 CONFIG_SYS_FPGA_NO_RFL_HI 3721 CONFIG_SYS_FPGA_NO_RFL_HI
3727 CONFIG_SYS_FPGA_PHY0_INT 3722 CONFIG_SYS_FPGA_PHY0_INT
3728 CONFIG_SYS_FPGA_PHY1_INT 3723 CONFIG_SYS_FPGA_PHY1_INT
3729 CONFIG_SYS_FPGA_PRG 3724 CONFIG_SYS_FPGA_PRG
3730 CONFIG_SYS_FPGA_PROG 3725 CONFIG_SYS_FPGA_PROG
3731 CONFIG_SYS_FPGA_PROG_FEEDBACK 3726 CONFIG_SYS_FPGA_PROG_FEEDBACK
3732 CONFIG_SYS_FPGA_PROG_TIME 3727 CONFIG_SYS_FPGA_PROG_TIME
3733 CONFIG_SYS_FPGA_PTR 3728 CONFIG_SYS_FPGA_PTR
3734 CONFIG_SYS_FPGA_REG_BASE 3729 CONFIG_SYS_FPGA_REG_BASE
3735 CONFIG_SYS_FPGA_REG_BASE_ADDR 3730 CONFIG_SYS_FPGA_REG_BASE_ADDR
3736 CONFIG_SYS_FPGA_SIZE 3731 CONFIG_SYS_FPGA_SIZE
3737 CONFIG_SYS_FPGA_SLIC0_CS 3732 CONFIG_SYS_FPGA_SLIC0_CS
3738 CONFIG_SYS_FPGA_SLIC0_ENABLE 3733 CONFIG_SYS_FPGA_SLIC0_ENABLE
3739 CONFIG_SYS_FPGA_SLIC0_INT 3734 CONFIG_SYS_FPGA_SLIC0_INT
3740 CONFIG_SYS_FPGA_SLIC0_R_DPRAM_INT 3735 CONFIG_SYS_FPGA_SLIC0_R_DPRAM_INT
3741 CONFIG_SYS_FPGA_SLIC0_W_DPRAM_INT 3736 CONFIG_SYS_FPGA_SLIC0_W_DPRAM_INT
3742 CONFIG_SYS_FPGA_SLIC1_CS 3737 CONFIG_SYS_FPGA_SLIC1_CS
3743 CONFIG_SYS_FPGA_SLIC1_ENABLE 3738 CONFIG_SYS_FPGA_SLIC1_ENABLE
3744 CONFIG_SYS_FPGA_SLIC1_INT 3739 CONFIG_SYS_FPGA_SLIC1_INT
3745 CONFIG_SYS_FPGA_SLIC1_R_DPRAM_INT 3740 CONFIG_SYS_FPGA_SLIC1_R_DPRAM_INT
3746 CONFIG_SYS_FPGA_SLIC1_W_DPRAM_INT 3741 CONFIG_SYS_FPGA_SLIC1_W_DPRAM_INT
3747 CONFIG_SYS_FPGA_SPARTAN2 3742 CONFIG_SYS_FPGA_SPARTAN2
3748 CONFIG_SYS_FPGA_STATUS 3743 CONFIG_SYS_FPGA_STATUS
3749 CONFIG_SYS_FPGA_STATUS_DIP0 3744 CONFIG_SYS_FPGA_STATUS_DIP0
3750 CONFIG_SYS_FPGA_STATUS_DIP1 3745 CONFIG_SYS_FPGA_STATUS_DIP1
3751 CONFIG_SYS_FPGA_STATUS_DIP2 3746 CONFIG_SYS_FPGA_STATUS_DIP2
3752 CONFIG_SYS_FPGA_STATUS_FLASH 3747 CONFIG_SYS_FPGA_STATUS_FLASH
3753 CONFIG_SYS_FPGA_STATUS_TS_IRQ 3748 CONFIG_SYS_FPGA_STATUS_TS_IRQ
3754 CONFIG_SYS_FPGA_TS 3749 CONFIG_SYS_FPGA_TS
3755 CONFIG_SYS_FPGA_TS_CAP0 3750 CONFIG_SYS_FPGA_TS_CAP0
3756 CONFIG_SYS_FPGA_TS_CAP0_LOW 3751 CONFIG_SYS_FPGA_TS_CAP0_LOW
3757 CONFIG_SYS_FPGA_TS_CAP1 3752 CONFIG_SYS_FPGA_TS_CAP1
3758 CONFIG_SYS_FPGA_TS_CAP1_LOW 3753 CONFIG_SYS_FPGA_TS_CAP1_LOW
3759 CONFIG_SYS_FPGA_TS_CAP2 3754 CONFIG_SYS_FPGA_TS_CAP2
3760 CONFIG_SYS_FPGA_TS_CAP2_LOW 3755 CONFIG_SYS_FPGA_TS_CAP2_LOW
3761 CONFIG_SYS_FPGA_TS_CAP3 3756 CONFIG_SYS_FPGA_TS_CAP3
3762 CONFIG_SYS_FPGA_TS_CAP3_LOW 3757 CONFIG_SYS_FPGA_TS_CAP3_LOW
3763 CONFIG_SYS_FPGA_TS_LOW 3758 CONFIG_SYS_FPGA_TS_LOW
3764 CONFIG_SYS_FPGA_UART0_FO 3759 CONFIG_SYS_FPGA_UART0_FO
3765 CONFIG_SYS_FPGA_UART1_FO 3760 CONFIG_SYS_FPGA_UART1_FO
3766 CONFIG_SYS_FPGA_USER_LED0 3761 CONFIG_SYS_FPGA_USER_LED0
3767 CONFIG_SYS_FPGA_USER_LED1 3762 CONFIG_SYS_FPGA_USER_LED1
3768 CONFIG_SYS_FPGA_VER_MASK 3763 CONFIG_SYS_FPGA_VER_MASK
3769 CONFIG_SYS_FPGA_WAIT 3764 CONFIG_SYS_FPGA_WAIT
3770 CONFIG_SYS_FPGA_WAIT_BUSY 3765 CONFIG_SYS_FPGA_WAIT_BUSY
3771 CONFIG_SYS_FPGA_WAIT_CONFIG 3766 CONFIG_SYS_FPGA_WAIT_CONFIG
3772 CONFIG_SYS_FPGA_WAIT_INIT 3767 CONFIG_SYS_FPGA_WAIT_INIT
3773 CONFIG_SYS_FPGA_xxx 3768 CONFIG_SYS_FPGA_xxx
3774 CONFIG_SYS_FSL_AIOP1_BASE 3769 CONFIG_SYS_FSL_AIOP1_BASE
3775 CONFIG_SYS_FSL_AIOP1_SIZE 3770 CONFIG_SYS_FSL_AIOP1_SIZE
3776 CONFIG_SYS_FSL_B4860QDS_XFI_ERR 3771 CONFIG_SYS_FSL_B4860QDS_XFI_ERR
3777 CONFIG_SYS_FSL_BMAN_ADDR 3772 CONFIG_SYS_FSL_BMAN_ADDR
3778 CONFIG_SYS_FSL_BMAN_OFFSET 3773 CONFIG_SYS_FSL_BMAN_OFFSET
3779 CONFIG_SYS_FSL_BOOTROM_BASE 3774 CONFIG_SYS_FSL_BOOTROM_BASE
3780 CONFIG_SYS_FSL_BOOTROM_SIZE 3775 CONFIG_SYS_FSL_BOOTROM_SIZE
3781 CONFIG_SYS_FSL_CCSR_BASE 3776 CONFIG_SYS_FSL_CCSR_BASE
3782 CONFIG_SYS_FSL_CCSR_GUR_BE 3777 CONFIG_SYS_FSL_CCSR_GUR_BE
3783 CONFIG_SYS_FSL_CCSR_GUR_LE 3778 CONFIG_SYS_FSL_CCSR_GUR_LE
3784 CONFIG_SYS_FSL_CCSR_SCFG_BE 3779 CONFIG_SYS_FSL_CCSR_SCFG_BE
3785 CONFIG_SYS_FSL_CCSR_SCFG_LE 3780 CONFIG_SYS_FSL_CCSR_SCFG_LE
3786 CONFIG_SYS_FSL_CCSR_SIZE 3781 CONFIG_SYS_FSL_CCSR_SIZE
3787 CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR 3782 CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR
3788 CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR 3783 CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR
3789 CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR 3784 CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR
3790 CONFIG_SYS_FSL_CLK_ADDR 3785 CONFIG_SYS_FSL_CLK_ADDR
3791 CONFIG_SYS_FSL_CLUSTER_1_L2 3786 CONFIG_SYS_FSL_CLUSTER_1_L2
3792 CONFIG_SYS_FSL_CLUSTER_1_L2_OFFSET 3787 CONFIG_SYS_FSL_CLUSTER_1_L2_OFFSET
3793 CONFIG_SYS_FSL_CLUSTER_CLOCKS 3788 CONFIG_SYS_FSL_CLUSTER_CLOCKS
3794 CONFIG_SYS_FSL_CORENET_CCM_ADDR 3789 CONFIG_SYS_FSL_CORENET_CCM_ADDR
3795 CONFIG_SYS_FSL_CORENET_CCM_OFFSET 3790 CONFIG_SYS_FSL_CORENET_CCM_OFFSET
3796 CONFIG_SYS_FSL_CORENET_CLK_ADDR 3791 CONFIG_SYS_FSL_CORENET_CLK_ADDR
3797 CONFIG_SYS_FSL_CORENET_CLK_OFFSET 3792 CONFIG_SYS_FSL_CORENET_CLK_OFFSET
3798 CONFIG_SYS_FSL_CORENET_PMAN 3793 CONFIG_SYS_FSL_CORENET_PMAN
3799 CONFIG_SYS_FSL_CORENET_PMAN1_OFFSET 3794 CONFIG_SYS_FSL_CORENET_PMAN1_OFFSET
3800 CONFIG_SYS_FSL_CORENET_PMAN2_OFFSET 3795 CONFIG_SYS_FSL_CORENET_PMAN2_OFFSET
3801 CONFIG_SYS_FSL_CORENET_PMAN3_OFFSET 3796 CONFIG_SYS_FSL_CORENET_PMAN3_OFFSET
3802 CONFIG_SYS_FSL_CORENET_PME_ADDR 3797 CONFIG_SYS_FSL_CORENET_PME_ADDR
3803 CONFIG_SYS_FSL_CORENET_PME_OFFSET 3798 CONFIG_SYS_FSL_CORENET_PME_OFFSET
3804 CONFIG_SYS_FSL_CORENET_RCPM_ADDR 3799 CONFIG_SYS_FSL_CORENET_RCPM_ADDR
3805 CONFIG_SYS_FSL_CORENET_RCPM_OFFSET 3800 CONFIG_SYS_FSL_CORENET_RCPM_OFFSET
3806 CONFIG_SYS_FSL_CORENET_RMAN_ADDR 3801 CONFIG_SYS_FSL_CORENET_RMAN_ADDR
3807 CONFIG_SYS_FSL_CORENET_RMAN_OFFSET 3802 CONFIG_SYS_FSL_CORENET_RMAN_OFFSET
3808 CONFIG_SYS_FSL_CORENET_SERDES2_ADDR 3803 CONFIG_SYS_FSL_CORENET_SERDES2_ADDR
3809 CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET 3804 CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET
3810 CONFIG_SYS_FSL_CORENET_SERDES3_ADDR 3805 CONFIG_SYS_FSL_CORENET_SERDES3_ADDR
3811 CONFIG_SYS_FSL_CORENET_SERDES3_OFFSET 3806 CONFIG_SYS_FSL_CORENET_SERDES3_OFFSET
3812 CONFIG_SYS_FSL_CORENET_SERDES4_ADDR 3807 CONFIG_SYS_FSL_CORENET_SERDES4_ADDR
3813 CONFIG_SYS_FSL_CORENET_SERDES4_OFFSET 3808 CONFIG_SYS_FSL_CORENET_SERDES4_OFFSET
3814 CONFIG_SYS_FSL_CORENET_SERDES_ADDR 3809 CONFIG_SYS_FSL_CORENET_SERDES_ADDR
3815 CONFIG_SYS_FSL_CORENET_SERDES_OFFSET 3810 CONFIG_SYS_FSL_CORENET_SERDES_OFFSET
3816 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 3811 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
3817 CONFIG_SYS_FSL_CORES_PER_CLUSTER 3812 CONFIG_SYS_FSL_CORES_PER_CLUSTER
3818 CONFIG_SYS_FSL_CPC 3813 CONFIG_SYS_FSL_CPC
3819 CONFIG_SYS_FSL_CPC_ADDR 3814 CONFIG_SYS_FSL_CPC_ADDR
3820 CONFIG_SYS_FSL_CPC_OFFSET 3815 CONFIG_SYS_FSL_CPC_OFFSET
3821 CONFIG_SYS_FSL_CSU_ADDR 3816 CONFIG_SYS_FSL_CSU_ADDR
3822 CONFIG_SYS_FSL_DCFG_ADDR 3817 CONFIG_SYS_FSL_DCFG_ADDR
3823 CONFIG_SYS_FSL_DCSR_BASE 3818 CONFIG_SYS_FSL_DCSR_BASE
3824 CONFIG_SYS_FSL_DCSR_DDR2_ADDR 3819 CONFIG_SYS_FSL_DCSR_DDR2_ADDR
3825 CONFIG_SYS_FSL_DCSR_DDR3_ADDR 3820 CONFIG_SYS_FSL_DCSR_DDR3_ADDR
3826 CONFIG_SYS_FSL_DCSR_DDR4_ADDR 3821 CONFIG_SYS_FSL_DCSR_DDR4_ADDR
3827 CONFIG_SYS_FSL_DCSR_DDR_ADDR 3822 CONFIG_SYS_FSL_DCSR_DDR_ADDR
3828 CONFIG_SYS_FSL_DCSR_SIZE 3823 CONFIG_SYS_FSL_DCSR_SIZE
3829 CONFIG_SYS_FSL_DCU_BE 3824 CONFIG_SYS_FSL_DCU_BE
3830 CONFIG_SYS_FSL_DCU_LE 3825 CONFIG_SYS_FSL_DCU_LE
3831 CONFIG_SYS_FSL_DDR2_ADDR 3826 CONFIG_SYS_FSL_DDR2_ADDR
3832 CONFIG_SYS_FSL_DDR3L 3827 CONFIG_SYS_FSL_DDR3L
3833 CONFIG_SYS_FSL_DDR3_ADDR 3828 CONFIG_SYS_FSL_DDR3_ADDR
3834 CONFIG_SYS_FSL_DDR_ADDR 3829 CONFIG_SYS_FSL_DDR_ADDR
3835 CONFIG_SYS_FSL_DDR_EMU 3830 CONFIG_SYS_FSL_DDR_EMU
3836 CONFIG_SYS_FSL_DDR_INTLV_256B 3831 CONFIG_SYS_FSL_DDR_INTLV_256B
3837 CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 3832 CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
3838 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 3833 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
3839 CONFIG_SYS_FSL_DRAM_BASE1 3834 CONFIG_SYS_FSL_DRAM_BASE1
3840 CONFIG_SYS_FSL_DRAM_BASE2 3835 CONFIG_SYS_FSL_DRAM_BASE2
3841 CONFIG_SYS_FSL_DRAM_BASE3 3836 CONFIG_SYS_FSL_DRAM_BASE3
3842 CONFIG_SYS_FSL_DRAM_SIZE1 3837 CONFIG_SYS_FSL_DRAM_SIZE1
3843 CONFIG_SYS_FSL_DRAM_SIZE2 3838 CONFIG_SYS_FSL_DRAM_SIZE2
3844 CONFIG_SYS_FSL_DRAM_SIZE3 3839 CONFIG_SYS_FSL_DRAM_SIZE3
3845 CONFIG_SYS_FSL_DSPI_BE 3840 CONFIG_SYS_FSL_DSPI_BE
3846 CONFIG_SYS_FSL_DSP_CCSRBAR 3841 CONFIG_SYS_FSL_DSP_CCSRBAR
3847 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT 3842 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
3848 CONFIG_SYS_FSL_DSP_CCSRBAR_PHYS 3843 CONFIG_SYS_FSL_DSP_CCSRBAR_PHYS
3849 CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR 3844 CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR
3850 CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET 3845 CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET
3851 CONFIG_SYS_FSL_DSP_DDR_ADDR 3846 CONFIG_SYS_FSL_DSP_DDR_ADDR
3852 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR 3847 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
3853 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR 3848 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
3854 CONFIG_SYS_FSL_ERRATUM_A008751 3849 CONFIG_SYS_FSL_ERRATUM_A008751
3855 CONFIG_SYS_FSL_ERRATUM_A_004934 3850 CONFIG_SYS_FSL_ERRATUM_A_004934
3856 CONFIG_SYS_FSL_ESDHC_ADDR 3851 CONFIG_SYS_FSL_ESDHC_ADDR
3857 CONFIG_SYS_FSL_ESDHC_BE 3852 CONFIG_SYS_FSL_ESDHC_BE
3858 CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT 3853 CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
3859 CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT 3854 CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT
3860 CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE 3855 CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
3861 CONFIG_SYS_FSL_ESDHC_LE 3856 CONFIG_SYS_FSL_ESDHC_LE
3862 CONFIG_SYS_FSL_ESDHC_NUM 3857 CONFIG_SYS_FSL_ESDHC_NUM
3863 CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK 3858 CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
3864 CONFIG_SYS_FSL_ESDHC_USE_PIO 3859 CONFIG_SYS_FSL_ESDHC_USE_PIO
3865 CONFIG_SYS_FSL_FM 3860 CONFIG_SYS_FSL_FM
3866 CONFIG_SYS_FSL_FM1_ADDR 3861 CONFIG_SYS_FSL_FM1_ADDR
3867 CONFIG_SYS_FSL_FM1_DTSEC1_ADDR 3862 CONFIG_SYS_FSL_FM1_DTSEC1_ADDR
3868 CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET 3863 CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET
3869 CONFIG_SYS_FSL_FM1_OFFSET 3864 CONFIG_SYS_FSL_FM1_OFFSET
3870 CONFIG_SYS_FSL_FM1_RX0_10G_OFFSET 3865 CONFIG_SYS_FSL_FM1_RX0_10G_OFFSET
3871 CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET 3866 CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET
3872 CONFIG_SYS_FSL_FM1_RX1_10G_OFFSET 3867 CONFIG_SYS_FSL_FM1_RX1_10G_OFFSET
3873 CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET 3868 CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET
3874 CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET 3869 CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET
3875 CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET 3870 CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET
3876 CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET 3871 CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET
3877 CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET 3872 CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET
3878 CONFIG_SYS_FSL_FM2_ADDR 3873 CONFIG_SYS_FSL_FM2_ADDR
3879 CONFIG_SYS_FSL_FM2_OFFSET 3874 CONFIG_SYS_FSL_FM2_OFFSET
3880 CONFIG_SYS_FSL_FM2_RX0_10G_OFFSET 3875 CONFIG_SYS_FSL_FM2_RX0_10G_OFFSET
3881 CONFIG_SYS_FSL_FM2_RX0_1G_OFFSET 3876 CONFIG_SYS_FSL_FM2_RX0_1G_OFFSET
3882 CONFIG_SYS_FSL_FM2_RX1_10G_OFFSET 3877 CONFIG_SYS_FSL_FM2_RX1_10G_OFFSET
3883 CONFIG_SYS_FSL_FM2_RX1_1G_OFFSET 3878 CONFIG_SYS_FSL_FM2_RX1_1G_OFFSET
3884 CONFIG_SYS_FSL_FM2_RX2_1G_OFFSET 3879 CONFIG_SYS_FSL_FM2_RX2_1G_OFFSET
3885 CONFIG_SYS_FSL_FM2_RX3_1G_OFFSET 3880 CONFIG_SYS_FSL_FM2_RX3_1G_OFFSET
3886 CONFIG_SYS_FSL_FM2_RX4_1G_OFFSET 3881 CONFIG_SYS_FSL_FM2_RX4_1G_OFFSET
3887 CONFIG_SYS_FSL_FM2_RX5_1G_OFFSET 3882 CONFIG_SYS_FSL_FM2_RX5_1G_OFFSET
3888 CONFIG_SYS_FSL_FMAN_ADDR 3883 CONFIG_SYS_FSL_FMAN_ADDR
3889 CONFIG_SYS_FSL_GUTS_ADDR 3884 CONFIG_SYS_FSL_GUTS_ADDR
3890 CONFIG_SYS_FSL_I2C 3885 CONFIG_SYS_FSL_I2C
3891 CONFIG_SYS_FSL_I2C2_OFFSET 3886 CONFIG_SYS_FSL_I2C2_OFFSET
3892 CONFIG_SYS_FSL_I2C2_SLAVE 3887 CONFIG_SYS_FSL_I2C2_SLAVE
3893 CONFIG_SYS_FSL_I2C2_SPEED 3888 CONFIG_SYS_FSL_I2C2_SPEED
3894 CONFIG_SYS_FSL_I2C3_OFFSET 3889 CONFIG_SYS_FSL_I2C3_OFFSET
3895 CONFIG_SYS_FSL_I2C3_SLAVE 3890 CONFIG_SYS_FSL_I2C3_SLAVE
3896 CONFIG_SYS_FSL_I2C3_SPEED 3891 CONFIG_SYS_FSL_I2C3_SPEED
3897 CONFIG_SYS_FSL_I2C4_OFFSET 3892 CONFIG_SYS_FSL_I2C4_OFFSET
3898 CONFIG_SYS_FSL_I2C4_SLAVE 3893 CONFIG_SYS_FSL_I2C4_SLAVE
3899 CONFIG_SYS_FSL_I2C4_SPEED 3894 CONFIG_SYS_FSL_I2C4_SPEED
3900 CONFIG_SYS_FSL_I2C_OFFSET 3895 CONFIG_SYS_FSL_I2C_OFFSET
3901 CONFIG_SYS_FSL_I2C_SLAVE 3896 CONFIG_SYS_FSL_I2C_SLAVE
3902 CONFIG_SYS_FSL_I2C_SPEED 3897 CONFIG_SYS_FSL_I2C_SPEED
3903 CONFIG_SYS_FSL_IFC_BASE 3898 CONFIG_SYS_FSL_IFC_BASE
3904 CONFIG_SYS_FSL_IFC_BASE1 3899 CONFIG_SYS_FSL_IFC_BASE1
3905 CONFIG_SYS_FSL_IFC_BASE2 3900 CONFIG_SYS_FSL_IFC_BASE2
3906 CONFIG_SYS_FSL_IFC_BE 3901 CONFIG_SYS_FSL_IFC_BE
3907 CONFIG_SYS_FSL_IFC_LE 3902 CONFIG_SYS_FSL_IFC_LE
3908 CONFIG_SYS_FSL_IFC_SIZE 3903 CONFIG_SYS_FSL_IFC_SIZE
3909 CONFIG_SYS_FSL_IFC_SIZE1 3904 CONFIG_SYS_FSL_IFC_SIZE1
3910 CONFIG_SYS_FSL_IFC_SIZE1_1 3905 CONFIG_SYS_FSL_IFC_SIZE1_1
3911 CONFIG_SYS_FSL_IFC_SIZE2 3906 CONFIG_SYS_FSL_IFC_SIZE2
3912 CONFIG_SYS_FSL_ISBC_VER 3907 CONFIG_SYS_FSL_ISBC_VER
3913 CONFIG_SYS_FSL_JR0_ADDR 3908 CONFIG_SYS_FSL_JR0_ADDR
3914 CONFIG_SYS_FSL_JR0_OFFSET 3909 CONFIG_SYS_FSL_JR0_OFFSET
3915 CONFIG_SYS_FSL_LS1_CLK_ADDR 3910 CONFIG_SYS_FSL_LS1_CLK_ADDR
3916 CONFIG_SYS_FSL_LSCH3_SERDES_ADDR 3911 CONFIG_SYS_FSL_LSCH3_SERDES_ADDR
3917 CONFIG_SYS_FSL_MAX_NUM_OF_SEC 3912 CONFIG_SYS_FSL_MAX_NUM_OF_SEC
3918 CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 3913 CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR
3919 CONFIG_SYS_FSL_MC_BASE 3914 CONFIG_SYS_FSL_MC_BASE
3920 CONFIG_SYS_FSL_MC_SIZE 3915 CONFIG_SYS_FSL_MC_SIZE
3921 CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 3916 CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
3922 CONFIG_SYS_FSL_NI_BASE 3917 CONFIG_SYS_FSL_NI_BASE
3923 CONFIG_SYS_FSL_NI_SIZE 3918 CONFIG_SYS_FSL_NI_SIZE
3924 CONFIG_SYS_FSL_NO_SERDES 3919 CONFIG_SYS_FSL_NO_SERDES
3925 CONFIG_SYS_FSL_NUM_CC_PLL 3920 CONFIG_SYS_FSL_NUM_CC_PLL
3926 CONFIG_SYS_FSL_NUM_CC_PLLS 3921 CONFIG_SYS_FSL_NUM_CC_PLLS
3927 CONFIG_SYS_FSL_OCRAM_BASE 3922 CONFIG_SYS_FSL_OCRAM_BASE
3928 CONFIG_SYS_FSL_OCRAM_SIZE 3923 CONFIG_SYS_FSL_OCRAM_SIZE
3929 CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS 3924 CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
3930 CONFIG_SYS_FSL_PAMU_OFFSET 3925 CONFIG_SYS_FSL_PAMU_OFFSET
3931 CONFIG_SYS_FSL_PBL_PBI 3926 CONFIG_SYS_FSL_PBL_PBI
3932 CONFIG_SYS_FSL_PBL_RCW 3927 CONFIG_SYS_FSL_PBL_RCW
3933 CONFIG_SYS_FSL_PCIE_COMPAT 3928 CONFIG_SYS_FSL_PCIE_COMPAT
3934 CONFIG_SYS_FSL_PCI_VER_3_X 3929 CONFIG_SYS_FSL_PCI_VER_3_X
3935 CONFIG_SYS_FSL_PEBUF_BASE 3930 CONFIG_SYS_FSL_PEBUF_BASE
3936 CONFIG_SYS_FSL_PEBUF_SIZE 3931 CONFIG_SYS_FSL_PEBUF_SIZE
3937 CONFIG_SYS_FSL_PEX_LUT_BE 3932 CONFIG_SYS_FSL_PEX_LUT_BE
3938 CONFIG_SYS_FSL_PEX_LUT_LE 3933 CONFIG_SYS_FSL_PEX_LUT_LE
3939 CONFIG_SYS_FSL_PMIC_I2C_ADDR 3934 CONFIG_SYS_FSL_PMIC_I2C_ADDR
3940 CONFIG_SYS_FSL_PMU_ADDR 3935 CONFIG_SYS_FSL_PMU_ADDR
3941 CONFIG_SYS_FSL_PMU_CLTBENR 3936 CONFIG_SYS_FSL_PMU_CLTBENR
3942 CONFIG_SYS_FSL_QBMAN_BASE 3937 CONFIG_SYS_FSL_QBMAN_BASE
3943 CONFIG_SYS_FSL_QBMAN_SIZE 3938 CONFIG_SYS_FSL_QBMAN_SIZE
3944 CONFIG_SYS_FSL_QBMAN_SIZE_1 3939 CONFIG_SYS_FSL_QBMAN_SIZE_1
3945 CONFIG_SYS_FSL_QMAN_ADDR 3940 CONFIG_SYS_FSL_QMAN_ADDR
3946 CONFIG_SYS_FSL_QMAN_OFFSET 3941 CONFIG_SYS_FSL_QMAN_OFFSET
3947 CONFIG_SYS_FSL_QMAN_V3 3942 CONFIG_SYS_FSL_QMAN_V3
3948 CONFIG_SYS_FSL_QSPI_AHB 3943 CONFIG_SYS_FSL_QSPI_AHB
3949 CONFIG_SYS_FSL_QSPI_BASE 3944 CONFIG_SYS_FSL_QSPI_BASE
3950 CONFIG_SYS_FSL_QSPI_BASE1 3945 CONFIG_SYS_FSL_QSPI_BASE1
3951 CONFIG_SYS_FSL_QSPI_BASE2 3946 CONFIG_SYS_FSL_QSPI_BASE2
3952 CONFIG_SYS_FSL_QSPI_BE 3947 CONFIG_SYS_FSL_QSPI_BE
3953 CONFIG_SYS_FSL_QSPI_LE 3948 CONFIG_SYS_FSL_QSPI_LE
3954 CONFIG_SYS_FSL_QSPI_SIZE 3949 CONFIG_SYS_FSL_QSPI_SIZE
3955 CONFIG_SYS_FSL_QSPI_SIZE1 3950 CONFIG_SYS_FSL_QSPI_SIZE1
3956 CONFIG_SYS_FSL_QSPI_SIZE2 3951 CONFIG_SYS_FSL_QSPI_SIZE2
3957 CONFIG_SYS_FSL_RAID_ENGINE 3952 CONFIG_SYS_FSL_RAID_ENGINE
3958 CONFIG_SYS_FSL_RAID_ENGINE_ADDR 3953 CONFIG_SYS_FSL_RAID_ENGINE_ADDR
3959 CONFIG_SYS_FSL_RAID_ENGINE_OFFSET 3954 CONFIG_SYS_FSL_RAID_ENGINE_OFFSET
3960 CONFIG_SYS_FSL_RCPM_ADDR 3955 CONFIG_SYS_FSL_RCPM_ADDR
3961 CONFIG_SYS_FSL_RMU 3956 CONFIG_SYS_FSL_RMU
3962 CONFIG_SYS_FSL_RST_ADDR 3957 CONFIG_SYS_FSL_RST_ADDR
3963 CONFIG_SYS_FSL_SCFG_ADDR 3958 CONFIG_SYS_FSL_SCFG_ADDR
3964 CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR 3959 CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR
3965 CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET 3960 CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET
3966 CONFIG_SYS_FSL_SCFG_OFFSET 3961 CONFIG_SYS_FSL_SCFG_OFFSET
3967 CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET 3962 CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET
3968 CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR 3963 CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR
3969 CONFIG_SYS_FSL_SEC_ADDR 3964 CONFIG_SYS_FSL_SEC_ADDR
3970 CONFIG_SYS_FSL_SEC_IDX_OFFSET 3965 CONFIG_SYS_FSL_SEC_IDX_OFFSET
3971 CONFIG_SYS_FSL_SEC_MON_BE 3966 CONFIG_SYS_FSL_SEC_MON_BE
3972 CONFIG_SYS_FSL_SEC_MON_LE 3967 CONFIG_SYS_FSL_SEC_MON_LE
3973 CONFIG_SYS_FSL_SEC_OFFSET 3968 CONFIG_SYS_FSL_SEC_OFFSET
3974 CONFIG_SYS_FSL_SERDES 3969 CONFIG_SYS_FSL_SERDES
3975 CONFIG_SYS_FSL_SERDES_ADDR 3970 CONFIG_SYS_FSL_SERDES_ADDR
3976 CONFIG_SYS_FSL_SFP_BE 3971 CONFIG_SYS_FSL_SFP_BE
3977 CONFIG_SYS_FSL_SFP_LE 3972 CONFIG_SYS_FSL_SFP_LE
3978 CONFIG_SYS_FSL_SFP_VER_3_0 3973 CONFIG_SYS_FSL_SFP_VER_3_0
3979 CONFIG_SYS_FSL_SFP_VER_3_2 3974 CONFIG_SYS_FSL_SFP_VER_3_2
3980 CONFIG_SYS_FSL_SFP_VER_3_4 3975 CONFIG_SYS_FSL_SFP_VER_3_4
3981 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK 3976 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
3982 CONFIG_SYS_FSL_SRDS_3 3977 CONFIG_SYS_FSL_SRDS_3
3983 CONFIG_SYS_FSL_SRDS_4 3978 CONFIG_SYS_FSL_SRDS_4
3984 CONFIG_SYS_FSL_SRDS_NUM_PLLS 3979 CONFIG_SYS_FSL_SRDS_NUM_PLLS
3985 CONFIG_SYS_FSL_SRIO_ADDR 3980 CONFIG_SYS_FSL_SRIO_ADDR
3986 CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 3981 CONFIG_SYS_FSL_SRIO_IB_WIN_NUM
3987 CONFIG_SYS_FSL_SRIO_LIODN 3982 CONFIG_SYS_FSL_SRIO_LIODN
3988 CONFIG_SYS_FSL_SRIO_MAX_PORTS 3983 CONFIG_SYS_FSL_SRIO_MAX_PORTS
3989 CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 3984 CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM
3990 CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 3985 CONFIG_SYS_FSL_SRIO_OB_WIN_NUM
3991 CONFIG_SYS_FSL_SRIO_OFFSET 3986 CONFIG_SYS_FSL_SRIO_OFFSET
3992 CONFIG_SYS_FSL_SRK_LE 3987 CONFIG_SYS_FSL_SRK_LE
3993 CONFIG_SYS_FSL_TBCLK_DIV 3988 CONFIG_SYS_FSL_TBCLK_DIV
3994 CONFIG_SYS_FSL_TIMER_ADDR 3989 CONFIG_SYS_FSL_TIMER_ADDR
3995 CONFIG_SYS_FSL_USB1_ADDR 3990 CONFIG_SYS_FSL_USB1_ADDR
3996 CONFIG_SYS_FSL_USB1_PHY_ENABLE 3991 CONFIG_SYS_FSL_USB1_PHY_ENABLE
3997 CONFIG_SYS_FSL_USB2_ADDR 3992 CONFIG_SYS_FSL_USB2_ADDR
3998 CONFIG_SYS_FSL_USB2_PHY_ENABLE 3993 CONFIG_SYS_FSL_USB2_PHY_ENABLE
3999 CONFIG_SYS_FSL_USB_CTRL_PHY_EN 3994 CONFIG_SYS_FSL_USB_CTRL_PHY_EN
4000 CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN 3995 CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN
4001 CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE 3996 CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
4002 CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE 3997 CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE
4003 CONFIG_SYS_FSL_USB_HS_DISCNCT_INC 3998 CONFIG_SYS_FSL_USB_HS_DISCNCT_INC
4004 CONFIG_SYS_FSL_USB_INTERNAL_SOC_CLK_EN 3999 CONFIG_SYS_FSL_USB_INTERNAL_SOC_CLK_EN
4005 CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY 4000 CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
4006 CONFIG_SYS_FSL_USB_PLLPRG1_PHY_DIV 4001 CONFIG_SYS_FSL_USB_PLLPRG1_PHY_DIV
4007 CONFIG_SYS_FSL_USB_PLLPRG2_FRAC_LPF_EN 4002 CONFIG_SYS_FSL_USB_PLLPRG2_FRAC_LPF_EN
4008 CONFIG_SYS_FSL_USB_PLLPRG2_MFI 4003 CONFIG_SYS_FSL_USB_PLLPRG2_MFI
4009 CONFIG_SYS_FSL_USB_PLLPRG2_MFI_INTERNAL_CLK 4004 CONFIG_SYS_FSL_USB_PLLPRG2_MFI_INTERNAL_CLK
4010 CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN 4005 CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN
4011 CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN 4006 CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN
4012 CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN 4007 CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN
4013 CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV 4008 CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV
4014 CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV_INTERNAL_CLK 4009 CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV_INTERNAL_CLK
4015 CONFIG_SYS_FSL_USB_PWRFLT_CR_EN 4010 CONFIG_SYS_FSL_USB_PWRFLT_CR_EN
4016 CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL 4011 CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL
4017 CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK 4012 CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK
4018 CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_0 4013 CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_0
4019 CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_3 4014 CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_3
4020 CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0 4015 CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0
4021 CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3 4016 CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3
4022 CONFIG_SYS_FSL_USB_SYS_CLK_VALID 4017 CONFIG_SYS_FSL_USB_SYS_CLK_VALID
4023 CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN 4018 CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN
4024 CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK 4019 CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK
4025 CONFIG_SYS_FSL_USDHC_NUM 4020 CONFIG_SYS_FSL_USDHC_NUM
4026 CONFIG_SYS_FSL_WDOG_BE 4021 CONFIG_SYS_FSL_WDOG_BE
4027 CONFIG_SYS_FSL_WRIOP1_ADDR 4022 CONFIG_SYS_FSL_WRIOP1_ADDR
4028 CONFIG_SYS_FSL_WRIOP1_BASE 4023 CONFIG_SYS_FSL_WRIOP1_BASE
4029 CONFIG_SYS_FSL_WRIOP1_MDIO1 4024 CONFIG_SYS_FSL_WRIOP1_MDIO1
4030 CONFIG_SYS_FSL_WRIOP1_MDIO2 4025 CONFIG_SYS_FSL_WRIOP1_MDIO2
4031 CONFIG_SYS_FSL_WRIOP1_SIZE 4026 CONFIG_SYS_FSL_WRIOP1_SIZE
4032 CONFIG_SYS_FSL_XHCI_USB1_ADDR 4027 CONFIG_SYS_FSL_XHCI_USB1_ADDR
4033 CONFIG_SYS_FSL_XHCI_USB2_ADDR 4028 CONFIG_SYS_FSL_XHCI_USB2_ADDR
4034 CONFIG_SYS_FSL_XHCI_USB3_ADDR 4029 CONFIG_SYS_FSL_XHCI_USB3_ADDR
4035 CONFIG_SYS_FSMC_BASE 4030 CONFIG_SYS_FSMC_BASE
4036 CONFIG_SYS_FSMC_NAND_16BIT 4031 CONFIG_SYS_FSMC_NAND_16BIT
4037 CONFIG_SYS_FSMC_NAND_8BIT 4032 CONFIG_SYS_FSMC_NAND_8BIT
4038 CONFIG_SYS_FSMC_NAND_SP 4033 CONFIG_SYS_FSMC_NAND_SP
4039 CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6 4034 CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6
4040 CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE 4035 CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE
4041 CONFIG_SYS_FTPMU010_PDLLCR0_HCLKOUTDIS 4036 CONFIG_SYS_FTPMU010_PDLLCR0_HCLKOUTDIS
4042 CONFIG_SYS_FTPMU010_SDRAMHTC 4037 CONFIG_SYS_FTPMU010_SDRAMHTC
4043 CONFIG_SYS_FTSDMC021_BANK0_BASE 4038 CONFIG_SYS_FTSDMC021_BANK0_BASE
4044 CONFIG_SYS_FTSDMC021_BANK0_BSR 4039 CONFIG_SYS_FTSDMC021_BANK0_BSR
4045 CONFIG_SYS_FTSDMC021_BANK1_BASE 4040 CONFIG_SYS_FTSDMC021_BANK1_BASE
4046 CONFIG_SYS_FTSDMC021_BANK1_BSR 4041 CONFIG_SYS_FTSDMC021_BANK1_BSR
4047 CONFIG_SYS_FTSDMC021_CR1 4042 CONFIG_SYS_FTSDMC021_CR1
4048 CONFIG_SYS_FTSDMC021_CR2 4043 CONFIG_SYS_FTSDMC021_CR2
4049 CONFIG_SYS_FTSDMC021_TP1 4044 CONFIG_SYS_FTSDMC021_TP1
4050 CONFIG_SYS_FTSDMC021_TP2 4045 CONFIG_SYS_FTSDMC021_TP2
4051 CONFIG_SYS_FTSMC020_CONFIGS 4046 CONFIG_SYS_FTSMC020_CONFIGS
4052 CONFIG_SYS_FULL_VA 4047 CONFIG_SYS_FULL_VA
4053 CONFIG_SYS_GAFR0_L_VAL 4048 CONFIG_SYS_GAFR0_L_VAL
4054 CONFIG_SYS_GAFR0_U_VAL 4049 CONFIG_SYS_GAFR0_U_VAL
4055 CONFIG_SYS_GAFR1_L_VAL 4050 CONFIG_SYS_GAFR1_L_VAL
4056 CONFIG_SYS_GAFR1_U_VAL 4051 CONFIG_SYS_GAFR1_U_VAL
4057 CONFIG_SYS_GAFR2_L_VAL 4052 CONFIG_SYS_GAFR2_L_VAL
4058 CONFIG_SYS_GAFR2_U_VAL 4053 CONFIG_SYS_GAFR2_U_VAL
4059 CONFIG_SYS_GAFR3_L_VAL 4054 CONFIG_SYS_GAFR3_L_VAL
4060 CONFIG_SYS_GAFR3_U_VAL 4055 CONFIG_SYS_GAFR3_U_VAL
4061 CONFIG_SYS_GBIT_MII1_BUSNAME 4056 CONFIG_SYS_GBIT_MII1_BUSNAME
4062 CONFIG_SYS_GBIT_MII_BUSNAME 4057 CONFIG_SYS_GBIT_MII_BUSNAME
4063 CONFIG_SYS_GBL_DATA_OFFSET 4058 CONFIG_SYS_GBL_DATA_OFFSET
4064 CONFIG_SYS_GBL_DATA_SIZE 4059 CONFIG_SYS_GBL_DATA_SIZE
4065 CONFIG_SYS_GENERIC_BOARD 4060 CONFIG_SYS_GENERIC_BOARD
4066 CONFIG_SYS_GENERIC_GLOBAL_DATA 4061 CONFIG_SYS_GENERIC_GLOBAL_DATA
4067 CONFIG_SYS_GIC400_ADDR 4062 CONFIG_SYS_GIC400_ADDR
4068 CONFIG_SYS_GLOBAL_SDRAM_LIMIT 4063 CONFIG_SYS_GLOBAL_SDRAM_LIMIT
4069 CONFIG_SYS_GP1DIR 4064 CONFIG_SYS_GP1DIR
4070 CONFIG_SYS_GP1ODR 4065 CONFIG_SYS_GP1ODR
4071 CONFIG_SYS_GP2DIR 4066 CONFIG_SYS_GP2DIR
4072 CONFIG_SYS_GP2ODR 4067 CONFIG_SYS_GP2ODR
4073 CONFIG_SYS_GPCR0_VAL 4068 CONFIG_SYS_GPCR0_VAL
4074 CONFIG_SYS_GPCR1_VAL 4069 CONFIG_SYS_GPCR1_VAL
4075 CONFIG_SYS_GPCR2_VAL 4070 CONFIG_SYS_GPCR2_VAL
4076 CONFIG_SYS_GPCR3_VAL 4071 CONFIG_SYS_GPCR3_VAL
4077 CONFIG_SYS_GPDR0_VAL 4072 CONFIG_SYS_GPDR0_VAL
4078 CONFIG_SYS_GPDR1_VAL 4073 CONFIG_SYS_GPDR1_VAL
4079 CONFIG_SYS_GPDR2_VAL 4074 CONFIG_SYS_GPDR2_VAL
4080 CONFIG_SYS_GPDR3_VAL 4075 CONFIG_SYS_GPDR3_VAL
4081 CONFIG_SYS_GPIO0_ISR1H 4076 CONFIG_SYS_GPIO0_ISR1H
4082 CONFIG_SYS_GPIO0_ISR1L 4077 CONFIG_SYS_GPIO0_ISR1L
4083 CONFIG_SYS_GPIO0_ISR2H 4078 CONFIG_SYS_GPIO0_ISR2H
4084 CONFIG_SYS_GPIO0_ISR2L 4079 CONFIG_SYS_GPIO0_ISR2L
4085 CONFIG_SYS_GPIO0_ODR 4080 CONFIG_SYS_GPIO0_ODR
4086 CONFIG_SYS_GPIO0_OR 4081 CONFIG_SYS_GPIO0_OR
4087 CONFIG_SYS_GPIO0_OSRH 4082 CONFIG_SYS_GPIO0_OSRH
4088 CONFIG_SYS_GPIO0_OSRL 4083 CONFIG_SYS_GPIO0_OSRL
4089 CONFIG_SYS_GPIO0_TCR 4084 CONFIG_SYS_GPIO0_TCR
4090 CONFIG_SYS_GPIO0_TSRH 4085 CONFIG_SYS_GPIO0_TSRH
4091 CONFIG_SYS_GPIO0_TSRL 4086 CONFIG_SYS_GPIO0_TSRL
4092 CONFIG_SYS_GPIO1_DAT 4087 CONFIG_SYS_GPIO1_DAT
4093 CONFIG_SYS_GPIO1_DIR 4088 CONFIG_SYS_GPIO1_DIR
4094 CONFIG_SYS_GPIO1_EN 4089 CONFIG_SYS_GPIO1_EN
4095 CONFIG_SYS_GPIO1_FUNC 4090 CONFIG_SYS_GPIO1_FUNC
4096 CONFIG_SYS_GPIO1_ISR1H 4091 CONFIG_SYS_GPIO1_ISR1H
4097 CONFIG_SYS_GPIO1_ISR1L 4092 CONFIG_SYS_GPIO1_ISR1L
4098 CONFIG_SYS_GPIO1_LED 4093 CONFIG_SYS_GPIO1_LED
4099 CONFIG_SYS_GPIO1_OSRH 4094 CONFIG_SYS_GPIO1_OSRH
4100 CONFIG_SYS_GPIO1_OSRL 4095 CONFIG_SYS_GPIO1_OSRL
4101 CONFIG_SYS_GPIO1_OUT 4096 CONFIG_SYS_GPIO1_OUT
4102 CONFIG_SYS_GPIO1_PRELIM 4097 CONFIG_SYS_GPIO1_PRELIM
4103 CONFIG_SYS_GPIO1_TCR 4098 CONFIG_SYS_GPIO1_TCR
4104 CONFIG_SYS_GPIO1_TSRH 4099 CONFIG_SYS_GPIO1_TSRH
4105 CONFIG_SYS_GPIO1_TSRL 4100 CONFIG_SYS_GPIO1_TSRL
4106 CONFIG_SYS_GPIO2_DAT 4101 CONFIG_SYS_GPIO2_DAT
4107 CONFIG_SYS_GPIO2_DIR 4102 CONFIG_SYS_GPIO2_DIR
4108 CONFIG_SYS_GPIO2_PRELIM 4103 CONFIG_SYS_GPIO2_PRELIM
4109 CONFIG_SYS_GPIO_0_ADDR 4104 CONFIG_SYS_GPIO_0_ADDR
4110 CONFIG_SYS_GPIO_BASE 4105 CONFIG_SYS_GPIO_BASE
4111 CONFIG_SYS_GPIO_BOARD_RESET 4106 CONFIG_SYS_GPIO_BOARD_RESET
4112 CONFIG_SYS_GPIO_CAN_ENABLE 4107 CONFIG_SYS_GPIO_CAN_ENABLE
4113 CONFIG_SYS_GPIO_CRAM_ADV 4108 CONFIG_SYS_GPIO_CRAM_ADV
4114 CONFIG_SYS_GPIO_CRAM_CLK 4109 CONFIG_SYS_GPIO_CRAM_CLK
4115 CONFIG_SYS_GPIO_CRAM_CRE 4110 CONFIG_SYS_GPIO_CRAM_CRE
4116 CONFIG_SYS_GPIO_CRAM_WAIT 4111 CONFIG_SYS_GPIO_CRAM_WAIT
4117 CONFIG_SYS_GPIO_DATADIR 4112 CONFIG_SYS_GPIO_DATADIR
4118 CONFIG_SYS_GPIO_DATAVALUE 4113 CONFIG_SYS_GPIO_DATAVALUE
4119 CONFIG_SYS_GPIO_DSPIC_READY 4114 CONFIG_SYS_GPIO_DSPIC_READY
4120 CONFIG_SYS_GPIO_EEPROM_EXT_WP 4115 CONFIG_SYS_GPIO_EEPROM_EXT_WP
4121 CONFIG_SYS_GPIO_EEPROM_INT_WP 4116 CONFIG_SYS_GPIO_EEPROM_INT_WP
4122 CONFIG_SYS_GPIO_EEPROM_WP 4117 CONFIG_SYS_GPIO_EEPROM_WP
4123 CONFIG_SYS_GPIO_EN 4118 CONFIG_SYS_GPIO_EN
4124 CONFIG_SYS_GPIO_ENABLE 4119 CONFIG_SYS_GPIO_ENABLE
4125 CONFIG_SYS_GPIO_EREADY 4120 CONFIG_SYS_GPIO_EREADY
4126 CONFIG_SYS_GPIO_FLASH_WP 4121 CONFIG_SYS_GPIO_FLASH_WP
4127 CONFIG_SYS_GPIO_FUNC 4122 CONFIG_SYS_GPIO_FUNC
4128 CONFIG_SYS_GPIO_HIGHSIDE 4123 CONFIG_SYS_GPIO_HIGHSIDE
4129 CONFIG_SYS_GPIO_HWREV_MASK 4124 CONFIG_SYS_GPIO_HWREV_MASK
4130 CONFIG_SYS_GPIO_HWREV_SHIFT 4125 CONFIG_SYS_GPIO_HWREV_SHIFT
4131 CONFIG_SYS_GPIO_I2C_SCL 4126 CONFIG_SYS_GPIO_I2C_SCL
4132 CONFIG_SYS_GPIO_I2C_SDA 4127 CONFIG_SYS_GPIO_I2C_SDA
4133 CONFIG_SYS_GPIO_LEDA_N 4128 CONFIG_SYS_GPIO_LEDA_N
4134 CONFIG_SYS_GPIO_LEDB_N 4129 CONFIG_SYS_GPIO_LEDB_N
4135 CONFIG_SYS_GPIO_LEDRUN_N 4130 CONFIG_SYS_GPIO_LEDRUN_N
4136 CONFIG_SYS_GPIO_LIME_RST 4131 CONFIG_SYS_GPIO_LIME_RST
4137 CONFIG_SYS_GPIO_LIME_S 4132 CONFIG_SYS_GPIO_LIME_S
4138 CONFIG_SYS_GPIO_LSB_ENABLE 4133 CONFIG_SYS_GPIO_LSB_ENABLE
4139 CONFIG_SYS_GPIO_M66EN 4134 CONFIG_SYS_GPIO_M66EN
4140 CONFIG_SYS_GPIO_MONARCH_N 4135 CONFIG_SYS_GPIO_MONARCH_N
4141 CONFIG_SYS_GPIO_ODR 4136 CONFIG_SYS_GPIO_ODR
4142 CONFIG_SYS_GPIO_OPENDRAIN 4137 CONFIG_SYS_GPIO_OPENDRAIN
4143 CONFIG_SYS_GPIO_OR 4138 CONFIG_SYS_GPIO_OR
4144 CONFIG_SYS_GPIO_OUT 4139 CONFIG_SYS_GPIO_OUT
4145 CONFIG_SYS_GPIO_PCIE_CLKREQ 4140 CONFIG_SYS_GPIO_PCIE_CLKREQ
4146 CONFIG_SYS_GPIO_PCIE_PRESENT0 4141 CONFIG_SYS_GPIO_PCIE_PRESENT0
4147 CONFIG_SYS_GPIO_PCIE_PRESENT1 4142 CONFIG_SYS_GPIO_PCIE_PRESENT1
4148 CONFIG_SYS_GPIO_PCIE_PRESENT2 4143 CONFIG_SYS_GPIO_PCIE_PRESENT2
4149 CONFIG_SYS_GPIO_PCIE_RST 4144 CONFIG_SYS_GPIO_PCIE_RST
4150 CONFIG_SYS_GPIO_PCIE_WAKE 4145 CONFIG_SYS_GPIO_PCIE_WAKE
4151 CONFIG_SYS_GPIO_PERM_VOLT_FEED 4146 CONFIG_SYS_GPIO_PERM_VOLT_FEED
4152 CONFIG_SYS_GPIO_PHY0_RST 4147 CONFIG_SYS_GPIO_PHY0_RST
4153 CONFIG_SYS_GPIO_PHY1_RST 4148 CONFIG_SYS_GPIO_PHY1_RST
4154 CONFIG_SYS_GPIO_PHY_RST 4149 CONFIG_SYS_GPIO_PHY_RST
4155 CONFIG_SYS_GPIO_RS232_FORCEOFF 4150 CONFIG_SYS_GPIO_RS232_FORCEOFF
4156 CONFIG_SYS_GPIO_SELFRST_N 4151 CONFIG_SYS_GPIO_SELFRST_N
4157 CONFIG_SYS_GPIO_STARTUP_FINISHED 4152 CONFIG_SYS_GPIO_STARTUP_FINISHED
4158 CONFIG_SYS_GPIO_STARTUP_FINISHED_N 4153 CONFIG_SYS_GPIO_STARTUP_FINISHED_N
4159 CONFIG_SYS_GPIO_SYSMON_STATUS 4154 CONFIG_SYS_GPIO_SYSMON_STATUS
4160 CONFIG_SYS_GPIO_TCR 4155 CONFIG_SYS_GPIO_TCR
4161 CONFIG_SYS_GPIO_WATCHDOG 4156 CONFIG_SYS_GPIO_WATCHDOG
4162 CONFIG_SYS_GPR1 4157 CONFIG_SYS_GPR1
4163 CONFIG_SYS_GPSR0_VAL 4158 CONFIG_SYS_GPSR0_VAL
4164 CONFIG_SYS_GPSR1_VAL 4159 CONFIG_SYS_GPSR1_VAL
4165 CONFIG_SYS_GPSR2_VAL 4160 CONFIG_SYS_GPSR2_VAL
4166 CONFIG_SYS_GPSR3_VAL 4161 CONFIG_SYS_GPSR3_VAL
4167 CONFIG_SYS_GPS_PORT_CONFIG 4162 CONFIG_SYS_GPS_PORT_CONFIG
4168 CONFIG_SYS_GPS_PORT_CONFIG_1 4163 CONFIG_SYS_GPS_PORT_CONFIG_1
4169 CONFIG_SYS_GPS_PORT_CONFIG_2 4164 CONFIG_SYS_GPS_PORT_CONFIG_2
4170 CONFIG_SYS_HALT_BEFOR_RAM_JUMP 4165 CONFIG_SYS_HALT_BEFOR_RAM_JUMP
4171 CONFIG_SYS_HELP_CMD_WIDTH 4166 CONFIG_SYS_HELP_CMD_WIDTH
4172 CONFIG_SYS_HID0_FINAL 4167 CONFIG_SYS_HID0_FINAL
4173 CONFIG_SYS_HID0_INIT 4168 CONFIG_SYS_HID0_INIT
4174 CONFIG_SYS_HID2 4169 CONFIG_SYS_HID2
4175 CONFIG_SYS_HIGH 4170 CONFIG_SYS_HIGH
4176 CONFIG_SYS_HMI_BASE 4171 CONFIG_SYS_HMI_BASE
4177 CONFIG_SYS_HOSTNAME 4172 CONFIG_SYS_HOSTNAME
4178 CONFIG_SYS_HRCW_HIGH 4173 CONFIG_SYS_HRCW_HIGH
4179 CONFIG_SYS_HRCW_HIGH_BASE 4174 CONFIG_SYS_HRCW_HIGH_BASE
4180 CONFIG_SYS_HRCW_LOW 4175 CONFIG_SYS_HRCW_LOW
4181 CONFIG_SYS_HRCW_MASTER 4176 CONFIG_SYS_HRCW_MASTER
4182 CONFIG_SYS_HRCW_SLAVE1 4177 CONFIG_SYS_HRCW_SLAVE1
4183 CONFIG_SYS_HRCW_SLAVE2 4178 CONFIG_SYS_HRCW_SLAVE2
4184 CONFIG_SYS_HRCW_SLAVE3 4179 CONFIG_SYS_HRCW_SLAVE3
4185 CONFIG_SYS_HRCW_SLAVE4 4180 CONFIG_SYS_HRCW_SLAVE4
4186 CONFIG_SYS_HRCW_SLAVE5 4181 CONFIG_SYS_HRCW_SLAVE5
4187 CONFIG_SYS_HRCW_SLAVE6 4182 CONFIG_SYS_HRCW_SLAVE6
4188 CONFIG_SYS_HRCW_SLAVE7 4183 CONFIG_SYS_HRCW_SLAVE7
4189 CONFIG_SYS_HSDRAMC 4184 CONFIG_SYS_HSDRAMC
4190 CONFIG_SYS_HWINFO_MAGIC 4185 CONFIG_SYS_HWINFO_MAGIC
4191 CONFIG_SYS_HWINFO_OFFSET 4186 CONFIG_SYS_HWINFO_OFFSET
4192 CONFIG_SYS_HWINFO_SIZE 4187 CONFIG_SYS_HWINFO_SIZE
4193 CONFIG_SYS_HZ_CLOCK 4188 CONFIG_SYS_HZ_CLOCK
4194 CONFIG_SYS_I2C 4189 CONFIG_SYS_I2C
4195 CONFIG_SYS_I2C2_FSL_OFFSET 4190 CONFIG_SYS_I2C2_FSL_OFFSET
4196 CONFIG_SYS_I2C2_OFFSET 4191 CONFIG_SYS_I2C2_OFFSET
4197 CONFIG_SYS_I2C2_PINMUX_CLR 4192 CONFIG_SYS_I2C2_PINMUX_CLR
4198 CONFIG_SYS_I2C2_PINMUX_REG 4193 CONFIG_SYS_I2C2_PINMUX_REG
4199 CONFIG_SYS_I2C2_PINMUX_SET 4194 CONFIG_SYS_I2C2_PINMUX_SET
4200 CONFIG_SYS_I2C_0 4195 CONFIG_SYS_I2C_0
4201 CONFIG_SYS_I2C_2 4196 CONFIG_SYS_I2C_2
4202 CONFIG_SYS_I2C_5 4197 CONFIG_SYS_I2C_5
4203 CONFIG_SYS_I2C_8574A_ADDR1 4198 CONFIG_SYS_I2C_8574A_ADDR1
4204 CONFIG_SYS_I2C_8574A_ADDR2 4199 CONFIG_SYS_I2C_8574A_ADDR2
4205 CONFIG_SYS_I2C_8574_ADDR1 4200 CONFIG_SYS_I2C_8574_ADDR1
4206 CONFIG_SYS_I2C_8574_ADDR2 4201 CONFIG_SYS_I2C_8574_ADDR2
4207 CONFIG_SYS_I2C_BASE 4202 CONFIG_SYS_I2C_BASE
4208 CONFIG_SYS_I2C_BASE0 4203 CONFIG_SYS_I2C_BASE0
4209 CONFIG_SYS_I2C_BASE1 4204 CONFIG_SYS_I2C_BASE1
4210 CONFIG_SYS_I2C_BASE2 4205 CONFIG_SYS_I2C_BASE2
4211 CONFIG_SYS_I2C_BASE3 4206 CONFIG_SYS_I2C_BASE3
4212 CONFIG_SYS_I2C_BASE4 4207 CONFIG_SYS_I2C_BASE4
4213 CONFIG_SYS_I2C_BASE5 4208 CONFIG_SYS_I2C_BASE5
4214 CONFIG_SYS_I2C_BOARD_LATE_INIT 4209 CONFIG_SYS_I2C_BOARD_LATE_INIT
4215 CONFIG_SYS_I2C_BOOT_EEPROM_ADDR 4210 CONFIG_SYS_I2C_BOOT_EEPROM_ADDR
4216 CONFIG_SYS_I2C_BUSES 4211 CONFIG_SYS_I2C_BUSES
4217 CONFIG_SYS_I2C_BUS_MAX 4212 CONFIG_SYS_I2C_BUS_MAX
4218 CONFIG_SYS_I2C_CLK_OFFSET 4213 CONFIG_SYS_I2C_CLK_OFFSET
4219 CONFIG_SYS_I2C_DAVINCI 4214 CONFIG_SYS_I2C_DAVINCI
4220 CONFIG_SYS_I2C_DIRECT_BUS 4215 CONFIG_SYS_I2C_DIRECT_BUS
4221 CONFIG_SYS_I2C_DPMEM_OFFSET 4216 CONFIG_SYS_I2C_DPMEM_OFFSET
4222 CONFIG_SYS_I2C_DS1621_ADDR 4217 CONFIG_SYS_I2C_DS1621_ADDR
4223 CONFIG_SYS_I2C_DS4510_ADDR 4218 CONFIG_SYS_I2C_DS4510_ADDR
4224 CONFIG_SYS_I2C_DSPIC_2_ADDR 4219 CONFIG_SYS_I2C_DSPIC_2_ADDR
4225 CONFIG_SYS_I2C_DSPIC_ADDR 4220 CONFIG_SYS_I2C_DSPIC_ADDR
4226 CONFIG_SYS_I2C_DSPIC_IO_ADDR 4221 CONFIG_SYS_I2C_DSPIC_IO_ADDR
4227 CONFIG_SYS_I2C_DSPIC_KEYB_ADDR 4222 CONFIG_SYS_I2C_DSPIC_KEYB_ADDR
4228 CONFIG_SYS_I2C_DTT_ADDR 4223 CONFIG_SYS_I2C_DTT_ADDR
4229 CONFIG_SYS_I2C_DVI_ADDR 4224 CONFIG_SYS_I2C_DVI_ADDR
4230 CONFIG_SYS_I2C_DVI_BUS_NUM 4225 CONFIG_SYS_I2C_DVI_BUS_NUM
4231 CONFIG_SYS_I2C_EARLY_INIT 4226 CONFIG_SYS_I2C_EARLY_INIT
4232 CONFIG_SYS_I2C_EEPROM 4227 CONFIG_SYS_I2C_EEPROM
4233 CONFIG_SYS_I2C_EEPROM_ADDR 4228 CONFIG_SYS_I2C_EEPROM_ADDR
4234 CONFIG_SYS_I2C_EEPROM_ADDR_LEN 4229 CONFIG_SYS_I2C_EEPROM_ADDR_LEN
4235 CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 4230 CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
4236 CONFIG_SYS_I2C_EEPROM_BUS 4231 CONFIG_SYS_I2C_EEPROM_BUS
4237 CONFIG_SYS_I2C_EEPROM_BUS_NUM 4232 CONFIG_SYS_I2C_EEPROM_BUS_NUM
4238 CONFIG_SYS_I2C_EEPROM_CCID 4233 CONFIG_SYS_I2C_EEPROM_CCID
4239 CONFIG_SYS_I2C_EEPROM_CPU_ADDR 4234 CONFIG_SYS_I2C_EEPROM_CPU_ADDR
4240 CONFIG_SYS_I2C_EEPROM_MAC_OFFSET 4235 CONFIG_SYS_I2C_EEPROM_MAC_OFFSET
4241 CONFIG_SYS_I2C_EEPROM_MB_ADDR 4236 CONFIG_SYS_I2C_EEPROM_MB_ADDR
4242 CONFIG_SYS_I2C_EEPROM_NXID 4237 CONFIG_SYS_I2C_EEPROM_NXID
4243 CONFIG_SYS_I2C_EEPROM_NXID_MAC 4238 CONFIG_SYS_I2C_EEPROM_NXID_MAC
4244 CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS 4239 CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS
4245 CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS 4240 CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS
4246 CONFIG_SYS_I2C_EXPANDER_ADDR 4241 CONFIG_SYS_I2C_EXPANDER_ADDR
4247 CONFIG_SYS_I2C_FACT_ADDR 4242 CONFIG_SYS_I2C_FACT_ADDR
4248 CONFIG_SYS_I2C_FPGA_ADDR 4243 CONFIG_SYS_I2C_FPGA_ADDR
4249 CONFIG_SYS_I2C_FRAM 4244 CONFIG_SYS_I2C_FRAM
4250 CONFIG_SYS_I2C_G762_ADDR 4245 CONFIG_SYS_I2C_G762_ADDR
4251 CONFIG_SYS_I2C_GENERIC_MAC 4246 CONFIG_SYS_I2C_GENERIC_MAC
4252 CONFIG_SYS_I2C_HWMON_ADDR 4247 CONFIG_SYS_I2C_HWMON_ADDR
4253 CONFIG_SYS_I2C_IDT6V49205B 4248 CONFIG_SYS_I2C_IDT6V49205B
4254 CONFIG_SYS_I2C_IFDR_DIV 4249 CONFIG_SYS_I2C_IFDR_DIV
4255 CONFIG_SYS_I2C_IHS 4250 CONFIG_SYS_I2C_IHS
4256 CONFIG_SYS_I2C_IHS_CH0 4251 CONFIG_SYS_I2C_IHS_CH0
4257 CONFIG_SYS_I2C_IHS_CH0_1 4252 CONFIG_SYS_I2C_IHS_CH0_1
4258 CONFIG_SYS_I2C_IHS_CH1 4253 CONFIG_SYS_I2C_IHS_CH1
4259 CONFIG_SYS_I2C_IHS_CH1_1 4254 CONFIG_SYS_I2C_IHS_CH1_1
4260 CONFIG_SYS_I2C_IHS_CH2 4255 CONFIG_SYS_I2C_IHS_CH2
4261 CONFIG_SYS_I2C_IHS_CH2_1 4256 CONFIG_SYS_I2C_IHS_CH2_1
4262 CONFIG_SYS_I2C_IHS_CH3 4257 CONFIG_SYS_I2C_IHS_CH3
4263 CONFIG_SYS_I2C_IHS_CH3_1 4258 CONFIG_SYS_I2C_IHS_CH3_1
4264 CONFIG_SYS_I2C_IHS_DUAL 4259 CONFIG_SYS_I2C_IHS_DUAL
4265 CONFIG_SYS_I2C_IHS_SLAVE_0 4260 CONFIG_SYS_I2C_IHS_SLAVE_0
4266 CONFIG_SYS_I2C_IHS_SLAVE_0_1 4261 CONFIG_SYS_I2C_IHS_SLAVE_0_1
4267 CONFIG_SYS_I2C_IHS_SLAVE_1 4262 CONFIG_SYS_I2C_IHS_SLAVE_1
4268 CONFIG_SYS_I2C_IHS_SLAVE_1_1 4263 CONFIG_SYS_I2C_IHS_SLAVE_1_1
4269 CONFIG_SYS_I2C_IHS_SLAVE_2 4264 CONFIG_SYS_I2C_IHS_SLAVE_2
4270 CONFIG_SYS_I2C_IHS_SLAVE_2_1 4265 CONFIG_SYS_I2C_IHS_SLAVE_2_1
4271 CONFIG_SYS_I2C_IHS_SLAVE_3 4266 CONFIG_SYS_I2C_IHS_SLAVE_3
4272 CONFIG_SYS_I2C_IHS_SLAVE_3_1 4267 CONFIG_SYS_I2C_IHS_SLAVE_3_1
4273 CONFIG_SYS_I2C_IHS_SPEED_0 4268 CONFIG_SYS_I2C_IHS_SPEED_0
4274 CONFIG_SYS_I2C_IHS_SPEED_0_1 4269 CONFIG_SYS_I2C_IHS_SPEED_0_1
4275 CONFIG_SYS_I2C_IHS_SPEED_1 4270 CONFIG_SYS_I2C_IHS_SPEED_1
4276 CONFIG_SYS_I2C_IHS_SPEED_1_1 4271 CONFIG_SYS_I2C_IHS_SPEED_1_1
4277 CONFIG_SYS_I2C_IHS_SPEED_2 4272 CONFIG_SYS_I2C_IHS_SPEED_2
4278 CONFIG_SYS_I2C_IHS_SPEED_2_1 4273 CONFIG_SYS_I2C_IHS_SPEED_2_1
4279 CONFIG_SYS_I2C_IHS_SPEED_3 4274 CONFIG_SYS_I2C_IHS_SPEED_3
4280 CONFIG_SYS_I2C_IHS_SPEED_3_1 4275 CONFIG_SYS_I2C_IHS_SPEED_3_1
4281 CONFIG_SYS_I2C_INIT_BOARD 4276 CONFIG_SYS_I2C_INIT_BOARD
4282 CONFIG_SYS_I2C_IO 4277 CONFIG_SYS_I2C_IO
4283 CONFIG_SYS_I2C_KEYBD_ADDR 4278 CONFIG_SYS_I2C_KEYBD_ADDR
4284 CONFIG_SYS_I2C_KONA 4279 CONFIG_SYS_I2C_KONA
4285 CONFIG_SYS_I2C_LDI_ADDR 4280 CONFIG_SYS_I2C_LDI_ADDR
4286 CONFIG_SYS_I2C_LM75_ADDR 4281 CONFIG_SYS_I2C_LM75_ADDR
4287 CONFIG_SYS_I2C_LM90_ADDR 4282 CONFIG_SYS_I2C_LM90_ADDR
4288 CONFIG_SYS_I2C_LPC32XX 4283 CONFIG_SYS_I2C_LPC32XX
4289 CONFIG_SYS_I2C_LPC32XX_SLAVE 4284 CONFIG_SYS_I2C_LPC32XX_SLAVE
4290 CONFIG_SYS_I2C_LPC32XX_SPEED 4285 CONFIG_SYS_I2C_LPC32XX_SPEED
4291 CONFIG_SYS_I2C_MAC1_BUS 4286 CONFIG_SYS_I2C_MAC1_BUS
4292 CONFIG_SYS_I2C_MAC1_CHIP_ADDR 4287 CONFIG_SYS_I2C_MAC1_CHIP_ADDR
4293 CONFIG_SYS_I2C_MAC1_DATA_ADDR 4288 CONFIG_SYS_I2C_MAC1_DATA_ADDR
4294 CONFIG_SYS_I2C_MAC2_BUS 4289 CONFIG_SYS_I2C_MAC2_BUS
4295 CONFIG_SYS_I2C_MAC2_CHIP_ADDR 4290 CONFIG_SYS_I2C_MAC2_CHIP_ADDR
4296 CONFIG_SYS_I2C_MAC2_DATA_ADDR 4291 CONFIG_SYS_I2C_MAC2_DATA_ADDR
4297 CONFIG_SYS_I2C_MAC_OFFSET 4292 CONFIG_SYS_I2C_MAC_OFFSET
4298 CONFIG_SYS_I2C_MAX1237_ADDR 4293 CONFIG_SYS_I2C_MAX1237_ADDR
4299 CONFIG_SYS_I2C_MAX_HOPS 4294 CONFIG_SYS_I2C_MAX_HOPS
4300 CONFIG_SYS_I2C_MODULE 4295 CONFIG_SYS_I2C_MODULE
4301 CONFIG_SYS_I2C_MXC_I2C1 4296 CONFIG_SYS_I2C_MXC_I2C1
4302 CONFIG_SYS_I2C_MXC_I2C2 4297 CONFIG_SYS_I2C_MXC_I2C2
4303 CONFIG_SYS_I2C_MXC_I2C3 4298 CONFIG_SYS_I2C_MXC_I2C3
4304 CONFIG_SYS_I2C_MXC_I2C4 4299 CONFIG_SYS_I2C_MXC_I2C4
4305 CONFIG_SYS_I2C_MXS 4300 CONFIG_SYS_I2C_MXS
4306 CONFIG_SYS_I2C_NCT72_ADDR 4301 CONFIG_SYS_I2C_NCT72_ADDR
4307 CONFIG_SYS_I2C_NOPROBES 4302 CONFIG_SYS_I2C_NOPROBES
4308 CONFIG_SYS_I2C_OFFSET 4303 CONFIG_SYS_I2C_OFFSET
4309 CONFIG_SYS_I2C_OMAP24XX 4304 CONFIG_SYS_I2C_OMAP24XX
4310 CONFIG_SYS_I2C_OMAP34XX 4305 CONFIG_SYS_I2C_OMAP34XX
4311 CONFIG_SYS_I2C_PCA953X_ADDR 4306 CONFIG_SYS_I2C_PCA953X_ADDR
4312 CONFIG_SYS_I2C_PCA953X_ADDR0 4307 CONFIG_SYS_I2C_PCA953X_ADDR0
4313 CONFIG_SYS_I2C_PCA953X_ADDR1 4308 CONFIG_SYS_I2C_PCA953X_ADDR1
4314 CONFIG_SYS_I2C_PCA953X_ADDR2 4309 CONFIG_SYS_I2C_PCA953X_ADDR2
4315 CONFIG_SYS_I2C_PCA953X_ADDR3 4310 CONFIG_SYS_I2C_PCA953X_ADDR3
4316 CONFIG_SYS_I2C_PCA953X_WIDTH 4311 CONFIG_SYS_I2C_PCA953X_WIDTH
4317 CONFIG_SYS_I2C_PCA9553_ADDR 4312 CONFIG_SYS_I2C_PCA9553_ADDR
4318 CONFIG_SYS_I2C_PCA9555_ADDR 4313 CONFIG_SYS_I2C_PCA9555_ADDR
4319 CONFIG_SYS_I2C_PCA9557_ADDR 4314 CONFIG_SYS_I2C_PCA9557_ADDR
4320 CONFIG_SYS_I2C_PCF8574A_ADDR 4315 CONFIG_SYS_I2C_PCF8574A_ADDR
4321 CONFIG_SYS_I2C_PEX8518_ADDR 4316 CONFIG_SYS_I2C_PEX8518_ADDR
4322 CONFIG_SYS_I2C_PINMUX_CLR 4317 CONFIG_SYS_I2C_PINMUX_CLR
4323 CONFIG_SYS_I2C_PINMUX_REG 4318 CONFIG_SYS_I2C_PINMUX_REG
4324 CONFIG_SYS_I2C_PINMUX_SET 4319 CONFIG_SYS_I2C_PINMUX_SET
4325 CONFIG_SYS_I2C_POWERIC_ADDR 4320 CONFIG_SYS_I2C_POWERIC_ADDR
4326 CONFIG_SYS_I2C_PPC4XX 4321 CONFIG_SYS_I2C_PPC4XX
4327 CONFIG_SYS_I2C_PPC4XX_CH0 4322 CONFIG_SYS_I2C_PPC4XX_CH0
4328 CONFIG_SYS_I2C_PPC4XX_CH1 4323 CONFIG_SYS_I2C_PPC4XX_CH1
4329 CONFIG_SYS_I2C_PPC4XX_SLAVE_0 4324 CONFIG_SYS_I2C_PPC4XX_SLAVE_0
4330 CONFIG_SYS_I2C_PPC4XX_SLAVE_1 4325 CONFIG_SYS_I2C_PPC4XX_SLAVE_1
4331 CONFIG_SYS_I2C_PPC4XX_SPEED_0 4326 CONFIG_SYS_I2C_PPC4XX_SPEED_0
4332 CONFIG_SYS_I2C_PPC4XX_SPEED_1 4327 CONFIG_SYS_I2C_PPC4XX_SPEED_1
4333 CONFIG_SYS_I2C_PXA 4328 CONFIG_SYS_I2C_PXA
4334 CONFIG_SYS_I2C_QIXIS_ADDR 4329 CONFIG_SYS_I2C_QIXIS_ADDR
4335 CONFIG_SYS_I2C_RCAR 4330 CONFIG_SYS_I2C_RCAR
4336 CONFIG_SYS_I2C_RTC_ADDR 4331 CONFIG_SYS_I2C_RTC_ADDR
4337 CONFIG_SYS_I2C_S3C24X0_SLAVE 4332 CONFIG_SYS_I2C_S3C24X0_SLAVE
4338 CONFIG_SYS_I2C_S3C24X0_SPEED 4333 CONFIG_SYS_I2C_S3C24X0_SPEED
4339 CONFIG_SYS_I2C_SH 4334 CONFIG_SYS_I2C_SH
4340 CONFIG_SYS_I2C_SH_BASE0 4335 CONFIG_SYS_I2C_SH_BASE0
4341 CONFIG_SYS_I2C_SH_BASE1 4336 CONFIG_SYS_I2C_SH_BASE1
4342 CONFIG_SYS_I2C_SH_BASE2 4337 CONFIG_SYS_I2C_SH_BASE2
4343 CONFIG_SYS_I2C_SH_BASE3 4338 CONFIG_SYS_I2C_SH_BASE3
4344 CONFIG_SYS_I2C_SH_BASE4 4339 CONFIG_SYS_I2C_SH_BASE4
4345 CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 4340 CONFIG_SYS_I2C_SH_NUM_CONTROLLERS
4346 CONFIG_SYS_I2C_SH_SPEED0 4341 CONFIG_SYS_I2C_SH_SPEED0
4347 CONFIG_SYS_I2C_SH_SPEED1 4342 CONFIG_SYS_I2C_SH_SPEED1
4348 CONFIG_SYS_I2C_SH_SPEED2 4343 CONFIG_SYS_I2C_SH_SPEED2
4349 CONFIG_SYS_I2C_SH_SPEED3 4344 CONFIG_SYS_I2C_SH_SPEED3
4350 CONFIG_SYS_I2C_SH_SPEED4 4345 CONFIG_SYS_I2C_SH_SPEED4
4351 CONFIG_SYS_I2C_SLAVE 4346 CONFIG_SYS_I2C_SLAVE
4352 CONFIG_SYS_I2C_SLAVE1 4347 CONFIG_SYS_I2C_SLAVE1
4353 CONFIG_SYS_I2C_SLAVE2 4348 CONFIG_SYS_I2C_SLAVE2
4354 CONFIG_SYS_I2C_SLAVE3 4349 CONFIG_SYS_I2C_SLAVE3
4355 CONFIG_SYS_I2C_SOFT 4350 CONFIG_SYS_I2C_SOFT
4356 CONFIG_SYS_I2C_SOFT_SLAVE 4351 CONFIG_SYS_I2C_SOFT_SLAVE
4357 CONFIG_SYS_I2C_SOFT_SLAVE_10 4352 CONFIG_SYS_I2C_SOFT_SLAVE_10
4358 CONFIG_SYS_I2C_SOFT_SLAVE_11 4353 CONFIG_SYS_I2C_SOFT_SLAVE_11
4359 CONFIG_SYS_I2C_SOFT_SLAVE_12 4354 CONFIG_SYS_I2C_SOFT_SLAVE_12
4360 CONFIG_SYS_I2C_SOFT_SLAVE_2 4355 CONFIG_SYS_I2C_SOFT_SLAVE_2
4361 CONFIG_SYS_I2C_SOFT_SLAVE_3 4356 CONFIG_SYS_I2C_SOFT_SLAVE_3
4362 CONFIG_SYS_I2C_SOFT_SLAVE_4 4357 CONFIG_SYS_I2C_SOFT_SLAVE_4
4363 CONFIG_SYS_I2C_SOFT_SLAVE_5 4358 CONFIG_SYS_I2C_SOFT_SLAVE_5
4364 CONFIG_SYS_I2C_SOFT_SLAVE_6 4359 CONFIG_SYS_I2C_SOFT_SLAVE_6
4365 CONFIG_SYS_I2C_SOFT_SLAVE_7 4360 CONFIG_SYS_I2C_SOFT_SLAVE_7
4366 CONFIG_SYS_I2C_SOFT_SLAVE_8 4361 CONFIG_SYS_I2C_SOFT_SLAVE_8
4367 CONFIG_SYS_I2C_SOFT_SLAVE_9 4362 CONFIG_SYS_I2C_SOFT_SLAVE_9
4368 CONFIG_SYS_I2C_SOFT_SPEED 4363 CONFIG_SYS_I2C_SOFT_SPEED
4369 CONFIG_SYS_I2C_SOFT_SPEED_10 4364 CONFIG_SYS_I2C_SOFT_SPEED_10
4370 CONFIG_SYS_I2C_SOFT_SPEED_11 4365 CONFIG_SYS_I2C_SOFT_SPEED_11
4371 CONFIG_SYS_I2C_SOFT_SPEED_12 4366 CONFIG_SYS_I2C_SOFT_SPEED_12
4372 CONFIG_SYS_I2C_SOFT_SPEED_2 4367 CONFIG_SYS_I2C_SOFT_SPEED_2
4373 CONFIG_SYS_I2C_SOFT_SPEED_3 4368 CONFIG_SYS_I2C_SOFT_SPEED_3
4374 CONFIG_SYS_I2C_SOFT_SPEED_4 4369 CONFIG_SYS_I2C_SOFT_SPEED_4
4375 CONFIG_SYS_I2C_SOFT_SPEED_5 4370 CONFIG_SYS_I2C_SOFT_SPEED_5
4376 CONFIG_SYS_I2C_SOFT_SPEED_6 4371 CONFIG_SYS_I2C_SOFT_SPEED_6
4377 CONFIG_SYS_I2C_SOFT_SPEED_7 4372 CONFIG_SYS_I2C_SOFT_SPEED_7
4378 CONFIG_SYS_I2C_SOFT_SPEED_8 4373 CONFIG_SYS_I2C_SOFT_SPEED_8
4379 CONFIG_SYS_I2C_SOFT_SPEED_9 4374 CONFIG_SYS_I2C_SOFT_SPEED_9
4380 CONFIG_SYS_I2C_SPEED 4375 CONFIG_SYS_I2C_SPEED
4381 CONFIG_SYS_I2C_SPEED1 4376 CONFIG_SYS_I2C_SPEED1
4382 CONFIG_SYS_I2C_SPEED2 4377 CONFIG_SYS_I2C_SPEED2
4383 CONFIG_SYS_I2C_SPEED3 4378 CONFIG_SYS_I2C_SPEED3
4384 CONFIG_SYS_I2C_TCA642X_ADDR 4379 CONFIG_SYS_I2C_TCA642X_ADDR
4385 CONFIG_SYS_I2C_TCA642X_BUS_NUM 4380 CONFIG_SYS_I2C_TCA642X_BUS_NUM
4386 CONFIG_SYS_I2C_TEGRA 4381 CONFIG_SYS_I2C_TEGRA
4387 CONFIG_SYS_I2C_UCODE_PATCH 4382 CONFIG_SYS_I2C_UCODE_PATCH
4388 CONFIG_SYS_I2C_W83782G_ADDR 4383 CONFIG_SYS_I2C_W83782G_ADDR
4389 CONFIG_SYS_I2C_ZYNQ 4384 CONFIG_SYS_I2C_ZYNQ
4390 CONFIG_SYS_I2C_ZYNQ_SLAVE 4385 CONFIG_SYS_I2C_ZYNQ_SLAVE
4391 CONFIG_SYS_I2C_ZYNQ_SPEED 4386 CONFIG_SYS_I2C_ZYNQ_SPEED
4392 CONFIG_SYS_I2ODMA_BASE 4387 CONFIG_SYS_I2ODMA_BASE
4393 CONFIG_SYS_I2ODMA_PHYS_ADDR 4388 CONFIG_SYS_I2ODMA_PHYS_ADDR
4394 CONFIG_SYS_I2c_INIT_MPC5XXX 4389 CONFIG_SYS_I2c_INIT_MPC5XXX
4395 CONFIG_SYS_IBAT 4390 CONFIG_SYS_IBAT
4396 CONFIG_SYS_IBAT0L 4391 CONFIG_SYS_IBAT0L
4397 CONFIG_SYS_IBAT0U 4392 CONFIG_SYS_IBAT0U
4398 CONFIG_SYS_IBAT1L 4393 CONFIG_SYS_IBAT1L
4399 CONFIG_SYS_IBAT1U 4394 CONFIG_SYS_IBAT1U
4400 CONFIG_SYS_IBAT2L 4395 CONFIG_SYS_IBAT2L
4401 CONFIG_SYS_IBAT2U 4396 CONFIG_SYS_IBAT2U
4402 CONFIG_SYS_IBAT3L 4397 CONFIG_SYS_IBAT3L
4403 CONFIG_SYS_IBAT3U 4398 CONFIG_SYS_IBAT3U
4404 CONFIG_SYS_IBAT4L 4399 CONFIG_SYS_IBAT4L
4405 CONFIG_SYS_IBAT4U 4400 CONFIG_SYS_IBAT4U
4406 CONFIG_SYS_IBAT5L 4401 CONFIG_SYS_IBAT5L
4407 CONFIG_SYS_IBAT5U 4402 CONFIG_SYS_IBAT5U
4408 CONFIG_SYS_IBAT6L 4403 CONFIG_SYS_IBAT6L
4409 CONFIG_SYS_IBAT6L_EARLY 4404 CONFIG_SYS_IBAT6L_EARLY
4410 CONFIG_SYS_IBAT6U 4405 CONFIG_SYS_IBAT6U
4411 CONFIG_SYS_IBAT6U_EARLY 4406 CONFIG_SYS_IBAT6U_EARLY
4412 CONFIG_SYS_IBAT7L 4407 CONFIG_SYS_IBAT7L
4413 CONFIG_SYS_IBAT7U 4408 CONFIG_SYS_IBAT7U
4414 CONFIG_SYS_ICACHE_INV 4409 CONFIG_SYS_ICACHE_INV
4415 CONFIG_SYS_ICACHE_LINESZ 4410 CONFIG_SYS_ICACHE_LINESZ
4416 CONFIG_SYS_ICACHE_SACR_VALUE 4411 CONFIG_SYS_ICACHE_SACR_VALUE
4417 CONFIG_SYS_ICS8N3QV01_I2C 4412 CONFIG_SYS_ICS8N3QV01_I2C
4418 CONFIG_SYS_ICTRL 4413 CONFIG_SYS_ICTRL
4419 CONFIG_SYS_IDE_MAXBUS 4414 CONFIG_SYS_IDE_MAXBUS
4420 CONFIG_SYS_IDE_MAXDEVICE 4415 CONFIG_SYS_IDE_MAXDEVICE
4421 CONFIG_SYS_ID_EEPROM 4416 CONFIG_SYS_ID_EEPROM
4422 CONFIG_SYS_IFC_ADDR 4417 CONFIG_SYS_IFC_ADDR
4423 CONFIG_SYS_IFC_CCR 4418 CONFIG_SYS_IFC_CCR
4424 CONFIG_SYS_IMMR 4419 CONFIG_SYS_IMMR
4425 CONFIG_SYS_INIT_DBCR 4420 CONFIG_SYS_INIT_DBCR
4426 CONFIG_SYS_INIT_DCACHE_CS 4421 CONFIG_SYS_INIT_DCACHE_CS
4427 CONFIG_SYS_INIT_DCACHE_PBxAR 4422 CONFIG_SYS_INIT_DCACHE_PBxAR
4428 CONFIG_SYS_INIT_DCACHE_PBxCR 4423 CONFIG_SYS_INIT_DCACHE_PBxCR
4429 CONFIG_SYS_INIT_EXTRA_SIZE 4424 CONFIG_SYS_INIT_EXTRA_SIZE
4430 CONFIG_SYS_INIT_L2CSR0 4425 CONFIG_SYS_INIT_L2CSR0
4431 CONFIG_SYS_INIT_L2_ADDR 4426 CONFIG_SYS_INIT_L2_ADDR
4432 CONFIG_SYS_INIT_L2_ADDR_PHYS 4427 CONFIG_SYS_INIT_L2_ADDR_PHYS
4433 CONFIG_SYS_INIT_L2_END 4428 CONFIG_SYS_INIT_L2_END
4434 CONFIG_SYS_INIT_L3_ADDR 4429 CONFIG_SYS_INIT_L3_ADDR
4435 CONFIG_SYS_INIT_L3_ADDR_PHYS 4430 CONFIG_SYS_INIT_L3_ADDR_PHYS
4436 CONFIG_SYS_INIT_L3_END 4431 CONFIG_SYS_INIT_L3_END
4437 CONFIG_SYS_INIT_L3_VADDR 4432 CONFIG_SYS_INIT_L3_VADDR
4438 CONFIG_SYS_INIT_RAM1_ADDR 4433 CONFIG_SYS_INIT_RAM1_ADDR
4439 CONFIG_SYS_INIT_RAM1_CTRL 4434 CONFIG_SYS_INIT_RAM1_CTRL
4440 CONFIG_SYS_INIT_RAM1_END 4435 CONFIG_SYS_INIT_RAM1_END
4441 CONFIG_SYS_INIT_RAM_ADDR 4436 CONFIG_SYS_INIT_RAM_ADDR
4442 CONFIG_SYS_INIT_RAM_ADDR_PHYS 4437 CONFIG_SYS_INIT_RAM_ADDR_PHYS
4443 CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 4438 CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH
4444 CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 4439 CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW
4445 CONFIG_SYS_INIT_RAM_CTRL 4440 CONFIG_SYS_INIT_RAM_CTRL
4446 CONFIG_SYS_INIT_RAM_DCACHE 4441 CONFIG_SYS_INIT_RAM_DCACHE
4447 CONFIG_SYS_INIT_RAM_LOCK 4442 CONFIG_SYS_INIT_RAM_LOCK
4448 CONFIG_SYS_INIT_RAM_PATTERN 4443 CONFIG_SYS_INIT_RAM_PATTERN
4449 CONFIG_SYS_INIT_RAM_SIZE 4444 CONFIG_SYS_INIT_RAM_SIZE
4450 CONFIG_SYS_INIT_SP_ADDR 4445 CONFIG_SYS_INIT_SP_ADDR
4451 CONFIG_SYS_INIT_SP_OFFSET 4446 CONFIG_SYS_INIT_SP_OFFSET
4452 CONFIG_SYS_INPUT_CLKSRC 4447 CONFIG_SYS_INPUT_CLKSRC
4453 CONFIG_SYS_INTA_FAKE 4448 CONFIG_SYS_INTA_FAKE
4454 CONFIG_SYS_INTEL_BOOT 4449 CONFIG_SYS_INTEL_BOOT
4455 CONFIG_SYS_INTERLAKEN 4450 CONFIG_SYS_INTERLAKEN
4456 CONFIG_SYS_INTRAM_BASE 4451 CONFIG_SYS_INTRAM_BASE
4457 CONFIG_SYS_INTRAM_SIZE 4452 CONFIG_SYS_INTRAM_SIZE
4458 CONFIG_SYS_INTR_BASE 4453 CONFIG_SYS_INTR_BASE
4459 CONFIG_SYS_INTSRAM 4454 CONFIG_SYS_INTSRAM
4460 CONFIG_SYS_INTSRAMSZ 4455 CONFIG_SYS_INTSRAMSZ
4461 CONFIG_SYS_INT_FLASH_BASE 4456 CONFIG_SYS_INT_FLASH_BASE
4462 CONFIG_SYS_INT_FLASH_ENABLE 4457 CONFIG_SYS_INT_FLASH_ENABLE
4463 CONFIG_SYS_IOCTRL_MUX_DDR 4458 CONFIG_SYS_IOCTRL_MUX_DDR
4464 CONFIG_SYS_IO_BASE 4459 CONFIG_SYS_IO_BASE
4465 CONFIG_SYS_IPBCLK_EQUALS_XLBCLK 4460 CONFIG_SYS_IPBCLK_EQUALS_XLBCLK
4466 CONFIG_SYS_IPBSPEED_133 4461 CONFIG_SYS_IPBSPEED_133
4467 CONFIG_SYS_IR_REG_BASE_ADDR 4462 CONFIG_SYS_IR_REG_BASE_ADDR
4468 CONFIG_SYS_ISA_BASE 4463 CONFIG_SYS_ISA_BASE
4469 CONFIG_SYS_ISA_IO 4464 CONFIG_SYS_ISA_IO
4470 CONFIG_SYS_ISA_IO_BASE_ADDRESS 4465 CONFIG_SYS_ISA_IO_BASE_ADDRESS
4471 CONFIG_SYS_ISA_IO_OFFSET 4466 CONFIG_SYS_ISA_IO_OFFSET
4472 CONFIG_SYS_ISA_IO_STRIDE 4467 CONFIG_SYS_ISA_IO_STRIDE
4473 CONFIG_SYS_ISA_MEM 4468 CONFIG_SYS_ISA_MEM
4474 CONFIG_SYS_ISB 4469 CONFIG_SYS_ISB
4475 CONFIG_SYS_ISRAM_BASE 4470 CONFIG_SYS_ISRAM_BASE
4476 CONFIG_SYS_IVM_EEPROM_ADR 4471 CONFIG_SYS_IVM_EEPROM_ADR
4477 CONFIG_SYS_IVM_EEPROM_MAX_LEN 4472 CONFIG_SYS_IVM_EEPROM_MAX_LEN
4478 CONFIG_SYS_IVM_EEPROM_PAGE_LEN 4473 CONFIG_SYS_IVM_EEPROM_PAGE_LEN
4479 CONFIG_SYS_JFFS2_FIRST_BANK 4474 CONFIG_SYS_JFFS2_FIRST_BANK
4480 CONFIG_SYS_JFFS2_FIRST_SECTOR 4475 CONFIG_SYS_JFFS2_FIRST_SECTOR
4481 CONFIG_SYS_JFFS2_MEM_NAND 4476 CONFIG_SYS_JFFS2_MEM_NAND
4482 CONFIG_SYS_JFFS2_NUM_BANKS 4477 CONFIG_SYS_JFFS2_NUM_BANKS
4483 CONFIG_SYS_JFFS2_SORT_FRAGMENTS 4478 CONFIG_SYS_JFFS2_SORT_FRAGMENTS
4484 CONFIG_SYS_KBYTES_SDRAM 4479 CONFIG_SYS_KBYTES_SDRAM
4485 CONFIG_SYS_KEY_REG_BASE_ADDR 4480 CONFIG_SYS_KEY_REG_BASE_ADDR
4486 CONFIG_SYS_KMBEC_FPGA_BASE 4481 CONFIG_SYS_KMBEC_FPGA_BASE
4487 CONFIG_SYS_KMBEC_FPGA_SIZE 4482 CONFIG_SYS_KMBEC_FPGA_SIZE
4488 CONFIG_SYS_KWD_CONFIG 4483 CONFIG_SYS_KWD_CONFIG
4489 CONFIG_SYS_KW_SPI_MPP 4484 CONFIG_SYS_KW_SPI_MPP
4490 CONFIG_SYS_L2 4485 CONFIG_SYS_L2
4491 CONFIG_SYS_L2_PL310 4486 CONFIG_SYS_L2_PL310
4492 CONFIG_SYS_L2_SIZE 4487 CONFIG_SYS_L2_SIZE
4493 CONFIG_SYS_L3_SIZE 4488 CONFIG_SYS_L3_SIZE
4494 CONFIG_SYS_LARGE_FLASH 4489 CONFIG_SYS_LARGE_FLASH
4495 CONFIG_SYS_LATCH0_BOOT 4490 CONFIG_SYS_LATCH0_BOOT
4496 CONFIG_SYS_LATCH0_RESET 4491 CONFIG_SYS_LATCH0_RESET
4497 CONFIG_SYS_LATCH1_BOOT 4492 CONFIG_SYS_LATCH1_BOOT
4498 CONFIG_SYS_LATCH1_RESET 4493 CONFIG_SYS_LATCH1_RESET
4499 CONFIG_SYS_LATCH_ADDR 4494 CONFIG_SYS_LATCH_ADDR
4500 CONFIG_SYS_LATCH_BASE 4495 CONFIG_SYS_LATCH_BASE
4501 CONFIG_SYS_LBAPP1_BASE 4496 CONFIG_SYS_LBAPP1_BASE
4502 CONFIG_SYS_LBAPP1_BASE_PHYS 4497 CONFIG_SYS_LBAPP1_BASE_PHYS
4503 CONFIG_SYS_LBAPP1_BR_PRELIM 4498 CONFIG_SYS_LBAPP1_BR_PRELIM
4504 CONFIG_SYS_LBAPP1_OR_PRELIM 4499 CONFIG_SYS_LBAPP1_OR_PRELIM
4505 CONFIG_SYS_LBAPP2_BASE 4500 CONFIG_SYS_LBAPP2_BASE
4506 CONFIG_SYS_LBAPP2_BASE_PHYS 4501 CONFIG_SYS_LBAPP2_BASE_PHYS
4507 CONFIG_SYS_LBAPP2_BR_PRELIM 4502 CONFIG_SYS_LBAPP2_BR_PRELIM
4508 CONFIG_SYS_LBAPP2_OR_PRELIM 4503 CONFIG_SYS_LBAPP2_OR_PRELIM
4509 CONFIG_SYS_LBC0_BASE 4504 CONFIG_SYS_LBC0_BASE
4510 CONFIG_SYS_LBC0_BASE_PHYS 4505 CONFIG_SYS_LBC0_BASE_PHYS
4511 CONFIG_SYS_LBC1_BASE 4506 CONFIG_SYS_LBC1_BASE
4512 CONFIG_SYS_LBC1_BASE_PHYS 4507 CONFIG_SYS_LBC1_BASE_PHYS
4513 CONFIG_SYS_LBCR_ADDR 4508 CONFIG_SYS_LBCR_ADDR
4514 CONFIG_SYS_LBC_ADDR 4509 CONFIG_SYS_LBC_ADDR
4515 CONFIG_SYS_LBC_BASE 4510 CONFIG_SYS_LBC_BASE
4516 CONFIG_SYS_LBC_BASE_PHYS_LOW 4511 CONFIG_SYS_LBC_BASE_PHYS_LOW
4517 CONFIG_SYS_LBC_CACHE_BASE 4512 CONFIG_SYS_LBC_CACHE_BASE
4518 CONFIG_SYS_LBC_FLASH_BASE 4513 CONFIG_SYS_LBC_FLASH_BASE
4519 CONFIG_SYS_LBC_LBCR 4514 CONFIG_SYS_LBC_LBCR
4520 CONFIG_SYS_LBC_LCRR 4515 CONFIG_SYS_LBC_LCRR
4521 CONFIG_SYS_LBC_LSDMR_1 4516 CONFIG_SYS_LBC_LSDMR_1
4522 CONFIG_SYS_LBC_LSDMR_2 4517 CONFIG_SYS_LBC_LSDMR_2
4523 CONFIG_SYS_LBC_LSDMR_3 4518 CONFIG_SYS_LBC_LSDMR_3
4524 CONFIG_SYS_LBC_LSDMR_4 4519 CONFIG_SYS_LBC_LSDMR_4
4525 CONFIG_SYS_LBC_LSDMR_5 4520 CONFIG_SYS_LBC_LSDMR_5
4526 CONFIG_SYS_LBC_LSDMR_ARFRSH 4521 CONFIG_SYS_LBC_LSDMR_ARFRSH
4527 CONFIG_SYS_LBC_LSDMR_COMMON 4522 CONFIG_SYS_LBC_LSDMR_COMMON
4528 CONFIG_SYS_LBC_LSDMR_MRW 4523 CONFIG_SYS_LBC_LSDMR_MRW
4529 CONFIG_SYS_LBC_LSDMR_PCHALL 4524 CONFIG_SYS_LBC_LSDMR_PCHALL
4530 CONFIG_SYS_LBC_LSDMR_RFEN 4525 CONFIG_SYS_LBC_LSDMR_RFEN
4531 CONFIG_SYS_LBC_LSRT 4526 CONFIG_SYS_LBC_LSRT
4532 CONFIG_SYS_LBC_MRTPR 4527 CONFIG_SYS_LBC_MRTPR
4533 CONFIG_SYS_LBC_NONCACHE_BASE 4528 CONFIG_SYS_LBC_NONCACHE_BASE
4534 CONFIG_SYS_LBC_SDRAM_BASE 4529 CONFIG_SYS_LBC_SDRAM_BASE
4535 CONFIG_SYS_LBC_SDRAM_BASE_PHYS 4530 CONFIG_SYS_LBC_SDRAM_BASE_PHYS
4536 CONFIG_SYS_LBC_SDRAM_SIZE 4531 CONFIG_SYS_LBC_SDRAM_SIZE
4537 CONFIG_SYS_LBLAWAR0_PRELIM 4532 CONFIG_SYS_LBLAWAR0_PRELIM
4538 CONFIG_SYS_LBLAWAR1_PRELIM 4533 CONFIG_SYS_LBLAWAR1_PRELIM
4539 CONFIG_SYS_LBLAWAR2_PRELIM 4534 CONFIG_SYS_LBLAWAR2_PRELIM
4540 CONFIG_SYS_LBLAWAR3_PRELIM 4535 CONFIG_SYS_LBLAWAR3_PRELIM
4541 CONFIG_SYS_LBLAWAR4_PRELIM 4536 CONFIG_SYS_LBLAWAR4_PRELIM
4542 CONFIG_SYS_LBLAWAR5_PRELIM 4537 CONFIG_SYS_LBLAWAR5_PRELIM
4543 CONFIG_SYS_LBLAWAR6_PRELIM 4538 CONFIG_SYS_LBLAWAR6_PRELIM
4544 CONFIG_SYS_LBLAWAR7_PRELIM 4539 CONFIG_SYS_LBLAWAR7_PRELIM
4545 CONFIG_SYS_LBLAWBAR0_PRELIM 4540 CONFIG_SYS_LBLAWBAR0_PRELIM
4546 CONFIG_SYS_LBLAWBAR1_PRELIM 4541 CONFIG_SYS_LBLAWBAR1_PRELIM
4547 CONFIG_SYS_LBLAWBAR2_PRELIM 4542 CONFIG_SYS_LBLAWBAR2_PRELIM
4548 CONFIG_SYS_LBLAWBAR3_PRELIM 4543 CONFIG_SYS_LBLAWBAR3_PRELIM
4549 CONFIG_SYS_LBLAWBAR4_PRELIM 4544 CONFIG_SYS_LBLAWBAR4_PRELIM
4550 CONFIG_SYS_LBLAWBAR5_PRELIM 4545 CONFIG_SYS_LBLAWBAR5_PRELIM
4551 CONFIG_SYS_LBLAWBAR6_PRELIM 4546 CONFIG_SYS_LBLAWBAR6_PRELIM
4552 CONFIG_SYS_LBLAWBAR7_PRELIM 4547 CONFIG_SYS_LBLAWBAR7_PRELIM
4553 CONFIG_SYS_LB_SDRAM 4548 CONFIG_SYS_LB_SDRAM
4554 CONFIG_SYS_LCD0_RST 4549 CONFIG_SYS_LCD0_RST
4555 CONFIG_SYS_LCD1_RST 4550 CONFIG_SYS_LCD1_RST
4556 CONFIG_SYS_LCD_BASE 4551 CONFIG_SYS_LCD_BASE
4557 CONFIG_SYS_LCD_ENDIAN 4552 CONFIG_SYS_LCD_ENDIAN
4558 CONFIG_SYS_LCRR_CLKDIV 4553 CONFIG_SYS_LCRR_CLKDIV
4559 CONFIG_SYS_LCRR_DBYP 4554 CONFIG_SYS_LCRR_DBYP
4560 CONFIG_SYS_LCRR_EADC 4555 CONFIG_SYS_LCRR_EADC
4561 CONFIG_SYS_LDB_CLOCK 4556 CONFIG_SYS_LDB_CLOCK
4562 CONFIG_SYS_LDSCRIPT 4557 CONFIG_SYS_LDSCRIPT
4563 CONFIG_SYS_LED_ADDR 4558 CONFIG_SYS_LED_ADDR
4564 CONFIG_SYS_LED_BASE 4559 CONFIG_SYS_LED_BASE
4565 CONFIG_SYS_LED_DISP_BASE 4560 CONFIG_SYS_LED_DISP_BASE
4566 CONFIG_SYS_LIME_BASE 4561 CONFIG_SYS_LIME_BASE
4567 CONFIG_SYS_LIME_BASE_0 4562 CONFIG_SYS_LIME_BASE_0
4568 CONFIG_SYS_LIME_BASE_1 4563 CONFIG_SYS_LIME_BASE_1
4569 CONFIG_SYS_LIME_BASE_2 4564 CONFIG_SYS_LIME_BASE_2
4570 CONFIG_SYS_LIME_BASE_3 4565 CONFIG_SYS_LIME_BASE_3
4571 CONFIG_SYS_LIME_CLOCK_100MHZ 4566 CONFIG_SYS_LIME_CLOCK_100MHZ
4572 CONFIG_SYS_LIME_CLOCK_133MHZ 4567 CONFIG_SYS_LIME_CLOCK_133MHZ
4573 CONFIG_SYS_LIME_MMR 4568 CONFIG_SYS_LIME_MMR
4574 CONFIG_SYS_LIME_SDRAM_CLOCK 4569 CONFIG_SYS_LIME_SDRAM_CLOCK
4575 CONFIG_SYS_LIME_SIZE 4570 CONFIG_SYS_LIME_SIZE
4576 CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE 4571 CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE
4577 CONFIG_SYS_LOADS_BAUD_CHANGE 4572 CONFIG_SYS_LOADS_BAUD_CHANGE
4578 CONFIG_SYS_LOAD_ADDR 4573 CONFIG_SYS_LOAD_ADDR
4579 CONFIG_SYS_LOAD_ADDR2 4574 CONFIG_SYS_LOAD_ADDR2
4580 CONFIG_SYS_LOCAL_CONF_REGS 4575 CONFIG_SYS_LOCAL_CONF_REGS
4581 CONFIG_SYS_LONGHELP 4576 CONFIG_SYS_LONGHELP
4582 CONFIG_SYS_LOW 4577 CONFIG_SYS_LOW
4583 CONFIG_SYS_LOWBOOT 4578 CONFIG_SYS_LOWBOOT
4584 CONFIG_SYS_LOWBOOT16 4579 CONFIG_SYS_LOWBOOT16
4585 CONFIG_SYS_LOWBOOT32 4580 CONFIG_SYS_LOWBOOT32
4586 CONFIG_SYS_LOWMEM_BASE 4581 CONFIG_SYS_LOWMEM_BASE
4587 CONFIG_SYS_LOW_RES_TIMER 4582 CONFIG_SYS_LOW_RES_TIMER
4588 CONFIG_SYS_LPAE_SDRAM_BASE 4583 CONFIG_SYS_LPAE_SDRAM_BASE
4589 CONFIG_SYS_LPC32XX_UART 4584 CONFIG_SYS_LPC32XX_UART
4590 CONFIG_SYS_LS1_DDR_BLOCK1_SIZE 4585 CONFIG_SYS_LS1_DDR_BLOCK1_SIZE
4591 CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH 4586 CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH
4592 CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 4587 CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS
4593 CONFIG_SYS_LS_MC_DPC_ADDR 4588 CONFIG_SYS_LS_MC_DPC_ADDR
4594 CONFIG_SYS_LS_MC_DPC_IN_DDR 4589 CONFIG_SYS_LS_MC_DPC_IN_DDR
4595 CONFIG_SYS_LS_MC_DPC_IN_NOR 4590 CONFIG_SYS_LS_MC_DPC_IN_NOR
4596 CONFIG_SYS_LS_MC_DPC_MAX_LENGTH 4591 CONFIG_SYS_LS_MC_DPC_MAX_LENGTH
4597 CONFIG_SYS_LS_MC_DPL_ADDR 4592 CONFIG_SYS_LS_MC_DPL_ADDR
4598 CONFIG_SYS_LS_MC_DPL_IN_DDR 4593 CONFIG_SYS_LS_MC_DPL_IN_DDR
4599 CONFIG_SYS_LS_MC_DPL_IN_NOR 4594 CONFIG_SYS_LS_MC_DPL_IN_NOR
4600 CONFIG_SYS_LS_MC_DPL_MAX_LENGTH 4595 CONFIG_SYS_LS_MC_DPL_MAX_LENGTH
4601 CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 4596 CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
4602 CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE 4597 CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE
4603 CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 4598 CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
4604 CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 4599 CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
4605 CONFIG_SYS_LS_MC_FW_IN_DDR 4600 CONFIG_SYS_LS_MC_FW_IN_DDR
4606 CONFIG_SYS_LS_PPA_FW_IN_xxx 4601 CONFIG_SYS_LS_PPA_FW_IN_xxx
4607 CONFIG_SYS_M41T11_BASE_YEAR 4602 CONFIG_SYS_M41T11_BASE_YEAR
4608 CONFIG_SYS_M41T11_EXT_CENTURY_DATA 4603 CONFIG_SYS_M41T11_EXT_CENTURY_DATA
4609 CONFIG_SYS_MACB0_BASE 4604 CONFIG_SYS_MACB0_BASE
4610 CONFIG_SYS_MACB1_BASE 4605 CONFIG_SYS_MACB1_BASE
4611 CONFIG_SYS_MACB2_BASE 4606 CONFIG_SYS_MACB2_BASE
4612 CONFIG_SYS_MACB3_BASE 4607 CONFIG_SYS_MACB3_BASE
4613 CONFIG_SYS_MAIN_PWR_ON 4608 CONFIG_SYS_MAIN_PWR_ON
4614 CONFIG_SYS_MALLOC_BASE 4609 CONFIG_SYS_MALLOC_BASE
4615 CONFIG_SYS_MALLOC_CLEAR_ON_INIT 4610 CONFIG_SYS_MALLOC_CLEAR_ON_INIT
4616 CONFIG_SYS_MALLOC_LEN 4611 CONFIG_SYS_MALLOC_LEN
4617 CONFIG_SYS_MALLOC_SIMPLE 4612 CONFIG_SYS_MALLOC_SIMPLE
4618 CONFIG_SYS_MAMR 4613 CONFIG_SYS_MAMR
4619 CONFIG_SYS_MAMR_10COL 4614 CONFIG_SYS_MAMR_10COL
4620 CONFIG_SYS_MAMR_8COL 4615 CONFIG_SYS_MAMR_8COL
4621 CONFIG_SYS_MAMR_9COL 4616 CONFIG_SYS_MAMR_9COL
4622 CONFIG_SYS_MAMR_PTA 4617 CONFIG_SYS_MAMR_PTA
4623 CONFIG_SYS_MAPLE 4618 CONFIG_SYS_MAPLE
4624 CONFIG_SYS_MAPLE_MEM_PHYS 4619 CONFIG_SYS_MAPLE_MEM_PHYS
4625 CONFIG_SYS_MAPPED_RAM_BASE 4620 CONFIG_SYS_MAPPED_RAM_BASE
4626 CONFIG_SYS_MARUBUN_IO 4621 CONFIG_SYS_MARUBUN_IO
4627 CONFIG_SYS_MARUBUN_MRSHPC 4622 CONFIG_SYS_MARUBUN_MRSHPC
4628 CONFIG_SYS_MARUBUN_MW1 4623 CONFIG_SYS_MARUBUN_MW1
4629 CONFIG_SYS_MARUBUN_MW2 4624 CONFIG_SYS_MARUBUN_MW2
4630 CONFIG_SYS_MASK 4625 CONFIG_SYS_MASK
4631 CONFIG_SYS_MASTER_CLOCK 4626 CONFIG_SYS_MASTER_CLOCK
4632 CONFIG_SYS_MATRIX_EBI0CSA_VAL 4627 CONFIG_SYS_MATRIX_EBI0CSA_VAL
4633 CONFIG_SYS_MATRIX_EBICSA_VAL 4628 CONFIG_SYS_MATRIX_EBICSA_VAL
4634 CONFIG_SYS_MATRIX_MCFG_REMAP 4629 CONFIG_SYS_MATRIX_MCFG_REMAP
4635 CONFIG_SYS_MAXARGS 4630 CONFIG_SYS_MAXARGS
4636 CONFIG_SYS_MAXIDLE 4631 CONFIG_SYS_MAXIDLE
4637 CONFIG_SYS_MAX_DATAFLASH_BANKS 4632 CONFIG_SYS_MAX_DATAFLASH_BANKS
4638 CONFIG_SYS_MAX_DDR_BAT_SIZE 4633 CONFIG_SYS_MAX_DDR_BAT_SIZE
4639 CONFIG_SYS_MAX_DOC_DEVICE 4634 CONFIG_SYS_MAX_DOC_DEVICE
4640 CONFIG_SYS_MAX_FLASH_BANKS 4635 CONFIG_SYS_MAX_FLASH_BANKS
4641 CONFIG_SYS_MAX_FLASH_BANKS_DETECT 4636 CONFIG_SYS_MAX_FLASH_BANKS_DETECT
4642 CONFIG_SYS_MAX_FLASH_SECT 4637 CONFIG_SYS_MAX_FLASH_SECT
4643 CONFIG_SYS_MAX_I2C_BUS 4638 CONFIG_SYS_MAX_I2C_BUS
4644 CONFIG_SYS_MAX_MTD_BANKS 4639 CONFIG_SYS_MAX_MTD_BANKS
4645 CONFIG_SYS_MAX_NAND_CHIPS 4640 CONFIG_SYS_MAX_NAND_CHIPS
4646 CONFIG_SYS_MAX_NAND_DEVICE 4641 CONFIG_SYS_MAX_NAND_DEVICE
4647 CONFIG_SYS_MAX_PCI_EPS 4642 CONFIG_SYS_MAX_PCI_EPS
4648 CONFIG_SYS_MAX_RAM_SIZE 4643 CONFIG_SYS_MAX_RAM_SIZE
4649 CONFIG_SYS_MB862xx_CCF 4644 CONFIG_SYS_MB862xx_CCF
4650 CONFIG_SYS_MB862xx_MMR 4645 CONFIG_SYS_MB862xx_MMR
4651 CONFIG_SYS_MBAR 4646 CONFIG_SYS_MBAR
4652 CONFIG_SYS_MBAR2 4647 CONFIG_SYS_MBAR2
4653 CONFIG_SYS_MBYTES_RAM 4648 CONFIG_SYS_MBYTES_RAM
4654 CONFIG_SYS_MBYTES_SDRAM 4649 CONFIG_SYS_MBYTES_SDRAM
4655 CONFIG_SYS_MCATT0_VAL 4650 CONFIG_SYS_MCATT0_VAL
4656 CONFIG_SYS_MCATT1_VAL 4651 CONFIG_SYS_MCATT1_VAL
4657 CONFIG_SYS_MCFRRTC_BASE 4652 CONFIG_SYS_MCFRRTC_BASE
4658 CONFIG_SYS_MCFRTC_BASE 4653 CONFIG_SYS_MCFRTC_BASE
4659 CONFIG_SYS_MCF_SYNCR 4654 CONFIG_SYS_MCF_SYNCR
4660 CONFIG_SYS_MCIO0_VAL 4655 CONFIG_SYS_MCIO0_VAL
4661 CONFIG_SYS_MCIO1_VAL 4656 CONFIG_SYS_MCIO1_VAL
4662 CONFIG_SYS_MCKR 4657 CONFIG_SYS_MCKR
4663 CONFIG_SYS_MCKR1_VAL 4658 CONFIG_SYS_MCKR1_VAL
4664 CONFIG_SYS_MCKR2_VAL 4659 CONFIG_SYS_MCKR2_VAL
4665 CONFIG_SYS_MCKR_CSS 4660 CONFIG_SYS_MCKR_CSS
4666 CONFIG_SYS_MCKR_VAL 4661 CONFIG_SYS_MCKR_VAL
4667 CONFIG_SYS_MCLINK_MAX 4662 CONFIG_SYS_MCLINK_MAX
4668 CONFIG_SYS_MCMEM0_VAL 4663 CONFIG_SYS_MCMEM0_VAL
4669 CONFIG_SYS_MCMEM1_VAL 4664 CONFIG_SYS_MCMEM1_VAL
4670 CONFIG_SYS_MDC1_PIN 4665 CONFIG_SYS_MDC1_PIN
4671 CONFIG_SYS_MDCNFG_VAL 4666 CONFIG_SYS_MDCNFG_VAL
4672 CONFIG_SYS_MDC_PIN 4667 CONFIG_SYS_MDC_PIN
4673 CONFIG_SYS_MDDRCGRP_HIPRIO_CFG 4668 CONFIG_SYS_MDDRCGRP_HIPRIO_CFG
4674 CONFIG_SYS_MDDRCGRP_LUT0_AL 4669 CONFIG_SYS_MDDRCGRP_LUT0_AL
4675 CONFIG_SYS_MDDRCGRP_LUT0_AU 4670 CONFIG_SYS_MDDRCGRP_LUT0_AU
4676 CONFIG_SYS_MDDRCGRP_LUT0_ML 4671 CONFIG_SYS_MDDRCGRP_LUT0_ML
4677 CONFIG_SYS_MDDRCGRP_LUT0_MU 4672 CONFIG_SYS_MDDRCGRP_LUT0_MU
4678 CONFIG_SYS_MDDRCGRP_LUT1_AL 4673 CONFIG_SYS_MDDRCGRP_LUT1_AL
4679 CONFIG_SYS_MDDRCGRP_LUT1_AU 4674 CONFIG_SYS_MDDRCGRP_LUT1_AU
4680 CONFIG_SYS_MDDRCGRP_LUT1_ML 4675 CONFIG_SYS_MDDRCGRP_LUT1_ML
4681 CONFIG_SYS_MDDRCGRP_LUT1_MU 4676 CONFIG_SYS_MDDRCGRP_LUT1_MU
4682 CONFIG_SYS_MDDRCGRP_LUT2_AL 4677 CONFIG_SYS_MDDRCGRP_LUT2_AL
4683 CONFIG_SYS_MDDRCGRP_LUT2_AU 4678 CONFIG_SYS_MDDRCGRP_LUT2_AU
4684 CONFIG_SYS_MDDRCGRP_LUT2_ML 4679 CONFIG_SYS_MDDRCGRP_LUT2_ML
4685 CONFIG_SYS_MDDRCGRP_LUT2_MU 4680 CONFIG_SYS_MDDRCGRP_LUT2_MU
4686 CONFIG_SYS_MDDRCGRP_LUT3_AL 4681 CONFIG_SYS_MDDRCGRP_LUT3_AL
4687 CONFIG_SYS_MDDRCGRP_LUT3_AU 4682 CONFIG_SYS_MDDRCGRP_LUT3_AU
4688 CONFIG_SYS_MDDRCGRP_LUT3_ML 4683 CONFIG_SYS_MDDRCGRP_LUT3_ML
4689 CONFIG_SYS_MDDRCGRP_LUT3_MU 4684 CONFIG_SYS_MDDRCGRP_LUT3_MU
4690 CONFIG_SYS_MDDRCGRP_LUT4_AL 4685 CONFIG_SYS_MDDRCGRP_LUT4_AL
4691 CONFIG_SYS_MDDRCGRP_LUT4_AU 4686 CONFIG_SYS_MDDRCGRP_LUT4_AU
4692 CONFIG_SYS_MDDRCGRP_LUT4_ML 4687 CONFIG_SYS_MDDRCGRP_LUT4_ML
4693 CONFIG_SYS_MDDRCGRP_LUT4_MU 4688 CONFIG_SYS_MDDRCGRP_LUT4_MU
4694 CONFIG_SYS_MDDRCGRP_PM_CFG1 4689 CONFIG_SYS_MDDRCGRP_PM_CFG1
4695 CONFIG_SYS_MDDRCGRP_PM_CFG2 4690 CONFIG_SYS_MDDRCGRP_PM_CFG2
4696 CONFIG_SYS_MDDRC_SYS_CFG 4691 CONFIG_SYS_MDDRC_SYS_CFG
4697 CONFIG_SYS_MDDRC_SYS_CFG_ALT1 4692 CONFIG_SYS_MDDRC_SYS_CFG_ALT1
4698 CONFIG_SYS_MDDRC_SYS_CFG_ELPIDA 4693 CONFIG_SYS_MDDRC_SYS_CFG_ELPIDA
4699 CONFIG_SYS_MDDRC_SYS_CFG_EN 4694 CONFIG_SYS_MDDRC_SYS_CFG_EN
4700 CONFIG_SYS_MDDRC_TIME_CFG0 4695 CONFIG_SYS_MDDRC_TIME_CFG0
4701 CONFIG_SYS_MDDRC_TIME_CFG0_ALT1 4696 CONFIG_SYS_MDDRC_TIME_CFG0_ALT1
4702 CONFIG_SYS_MDDRC_TIME_CFG1 4697 CONFIG_SYS_MDDRC_TIME_CFG1
4703 CONFIG_SYS_MDDRC_TIME_CFG1_ALT1 4698 CONFIG_SYS_MDDRC_TIME_CFG1_ALT1
4704 CONFIG_SYS_MDDRC_TIME_CFG1_ELPIDA 4699 CONFIG_SYS_MDDRC_TIME_CFG1_ELPIDA
4705 CONFIG_SYS_MDDRC_TIME_CFG2 4700 CONFIG_SYS_MDDRC_TIME_CFG2
4706 CONFIG_SYS_MDDRC_TIME_CFG2_ALT1 4701 CONFIG_SYS_MDDRC_TIME_CFG2_ALT1
4707 CONFIG_SYS_MDDRC_TIME_CFG2_ELPIDA 4702 CONFIG_SYS_MDDRC_TIME_CFG2_ELPIDA
4708 CONFIG_SYS_MDIO1_OFFSET 4703 CONFIG_SYS_MDIO1_OFFSET
4709 CONFIG_SYS_MDIO1_PIN 4704 CONFIG_SYS_MDIO1_PIN
4710 CONFIG_SYS_MDIO_BASE_ADDR 4705 CONFIG_SYS_MDIO_BASE_ADDR
4711 CONFIG_SYS_MDIO_PIN 4706 CONFIG_SYS_MDIO_PIN
4712 CONFIG_SYS_MDMRS_VAL 4707 CONFIG_SYS_MDMRS_VAL
4713 CONFIG_SYS_MDREFR_VAL 4708 CONFIG_SYS_MDREFR_VAL
4714 CONFIG_SYS_MEASURE_CPUCLK 4709 CONFIG_SYS_MEASURE_CPUCLK
4715 CONFIG_SYS_MECR_VAL 4710 CONFIG_SYS_MECR_VAL
4716 CONFIG_SYS_MEMAC_LITTLE_ENDIAN 4711 CONFIG_SYS_MEMAC_LITTLE_ENDIAN
4717 CONFIG_SYS_MEMORY_BASE 4712 CONFIG_SYS_MEMORY_BASE
4718 CONFIG_SYS_MEMORY_SIZE 4713 CONFIG_SYS_MEMORY_SIZE
4719 CONFIG_SYS_MEMORY_TOP 4714 CONFIG_SYS_MEMORY_TOP
4720 CONFIG_SYS_MEMTEST_END 4715 CONFIG_SYS_MEMTEST_END
4721 CONFIG_SYS_MEMTEST_SCRATCH 4716 CONFIG_SYS_MEMTEST_SCRATCH
4722 CONFIG_SYS_MEMTEST_START 4717 CONFIG_SYS_MEMTEST_START
4723 CONFIG_SYS_MEM_MAP 4718 CONFIG_SYS_MEM_MAP
4724 CONFIG_SYS_MEM_RESERVE_SECURE 4719 CONFIG_SYS_MEM_RESERVE_SECURE
4725 CONFIG_SYS_MEM_SIZE 4720 CONFIG_SYS_MEM_SIZE
4726 CONFIG_SYS_MEM_TOP_HIDE 4721 CONFIG_SYS_MEM_TOP_HIDE
4727 CONFIG_SYS_MFD 4722 CONFIG_SYS_MFD
4728 CONFIG_SYS_MHZ 4723 CONFIG_SYS_MHZ
4729 CONFIG_SYS_MICRON_BMODE 4724 CONFIG_SYS_MICRON_BMODE
4730 CONFIG_SYS_MICRON_BMODE_PARAM 4725 CONFIG_SYS_MICRON_BMODE_PARAM
4731 CONFIG_SYS_MICRON_BMODE_RSTDLL 4726 CONFIG_SYS_MICRON_BMODE_RSTDLL
4732 CONFIG_SYS_MICRON_EMODE 4727 CONFIG_SYS_MICRON_EMODE
4733 CONFIG_SYS_MICRON_EMODE2 4728 CONFIG_SYS_MICRON_EMODE2
4734 CONFIG_SYS_MICRON_EMODE3 4729 CONFIG_SYS_MICRON_EMODE3
4735 CONFIG_SYS_MICRON_EMODE_PARAM 4730 CONFIG_SYS_MICRON_EMODE_PARAM
4736 CONFIG_SYS_MICRON_EMR 4731 CONFIG_SYS_MICRON_EMR
4737 CONFIG_SYS_MICRON_EMR2 4732 CONFIG_SYS_MICRON_EMR2
4738 CONFIG_SYS_MICRON_EMR3 4733 CONFIG_SYS_MICRON_EMR3
4739 CONFIG_SYS_MICRON_EMR_OCD 4734 CONFIG_SYS_MICRON_EMR_OCD
4740 CONFIG_SYS_MICRON_INIT_DEV_OP 4735 CONFIG_SYS_MICRON_INIT_DEV_OP
4741 CONFIG_SYS_MII_MODE 4736 CONFIG_SYS_MII_MODE
4742 CONFIG_SYS_MIPS_CACHE_MODE 4737 CONFIG_SYS_MIPS_CACHE_MODE
4743 CONFIG_SYS_MIPS_TIMER_FREQ 4738 CONFIG_SYS_MIPS_TIMER_FREQ
4744 CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 4739 CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
4745 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 4740 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR
4746 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 4741 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
4747 CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 4742 CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
4748 CONFIG_SYS_MMC_BASE 4743 CONFIG_SYS_MMC_BASE
4749 CONFIG_SYS_MMC_CD_PIN 4744 CONFIG_SYS_MMC_CD_PIN
4750 CONFIG_SYS_MMC_CLK_OD 4745 CONFIG_SYS_MMC_CLK_OD
4751 CONFIG_SYS_MMC_ENV_DEV 4746 CONFIG_SYS_MMC_ENV_DEV
4752 CONFIG_SYS_MMC_ENV_PART 4747 CONFIG_SYS_MMC_ENV_PART
4753 CONFIG_SYS_MMC_IMG_LOAD_PART 4748 CONFIG_SYS_MMC_IMG_LOAD_PART
4754 CONFIG_SYS_MMC_MAX_BLK_COUNT 4749 CONFIG_SYS_MMC_MAX_BLK_COUNT
4755 CONFIG_SYS_MMC_MAX_DEVICE 4750 CONFIG_SYS_MMC_MAX_DEVICE
4756 CONFIG_SYS_MMC_U_BOOT_DST 4751 CONFIG_SYS_MMC_U_BOOT_DST
4757 CONFIG_SYS_MMC_U_BOOT_OFFS 4752 CONFIG_SYS_MMC_U_BOOT_OFFS
4758 CONFIG_SYS_MMC_U_BOOT_SIZE 4753 CONFIG_SYS_MMC_U_BOOT_SIZE
4759 CONFIG_SYS_MMC_U_BOOT_START 4754 CONFIG_SYS_MMC_U_BOOT_START
4760 CONFIG_SYS_MM_TOP_HIDE 4755 CONFIG_SYS_MM_TOP_HIDE
4761 CONFIG_SYS_MONITOR_ 4756 CONFIG_SYS_MONITOR_
4762 CONFIG_SYS_MONITOR_BASE 4757 CONFIG_SYS_MONITOR_BASE
4763 CONFIG_SYS_MONITOR_BASE_EARLY 4758 CONFIG_SYS_MONITOR_BASE_EARLY
4764 CONFIG_SYS_MONITOR_LEN 4759 CONFIG_SYS_MONITOR_LEN
4765 CONFIG_SYS_MONITOR_SEC 4760 CONFIG_SYS_MONITOR_SEC
4766 CONFIG_SYS_MOR_VAL 4761 CONFIG_SYS_MOR_VAL
4767 CONFIG_SYS_MPC512X_CLKIN 4762 CONFIG_SYS_MPC512X_CLKIN
4768 CONFIG_SYS_MPC512x_USB1_ADDR 4763 CONFIG_SYS_MPC512x_USB1_ADDR
4769 CONFIG_SYS_MPC512x_USB1_OFFSET 4764 CONFIG_SYS_MPC512x_USB1_OFFSET
4770 CONFIG_SYS_MPC5XXX_CLKIN 4765 CONFIG_SYS_MPC5XXX_CLKIN
4771 CONFIG_SYS_MPC83xx_DMA_ADDR 4766 CONFIG_SYS_MPC83xx_DMA_ADDR
4772 CONFIG_SYS_MPC83xx_DMA_OFFSET 4767 CONFIG_SYS_MPC83xx_DMA_OFFSET
4773 CONFIG_SYS_MPC83xx_ESDHC_ADDR 4768 CONFIG_SYS_MPC83xx_ESDHC_ADDR
4774 CONFIG_SYS_MPC83xx_ESDHC_OFFSET 4769 CONFIG_SYS_MPC83xx_ESDHC_OFFSET
4775 CONFIG_SYS_MPC83xx_USB1_ADDR 4770 CONFIG_SYS_MPC83xx_USB1_ADDR
4776 CONFIG_SYS_MPC83xx_USB1_OFFSET 4771 CONFIG_SYS_MPC83xx_USB1_OFFSET
4777 CONFIG_SYS_MPC83xx_USB2_ADDR 4772 CONFIG_SYS_MPC83xx_USB2_ADDR
4778 CONFIG_SYS_MPC83xx_USB2_OFFSET 4773 CONFIG_SYS_MPC83xx_USB2_OFFSET
4779 CONFIG_SYS_MPC85XX_NO_RESETVEC 4774 CONFIG_SYS_MPC85XX_NO_RESETVEC
4780 CONFIG_SYS_MPC85xx_CPM_ADDR 4775 CONFIG_SYS_MPC85xx_CPM_ADDR
4781 CONFIG_SYS_MPC85xx_CPM_OFFSET 4776 CONFIG_SYS_MPC85xx_CPM_OFFSET
4782 CONFIG_SYS_MPC85xx_DMA 4777 CONFIG_SYS_MPC85xx_DMA
4783 CONFIG_SYS_MPC85xx_DMA1_OFFSET 4778 CONFIG_SYS_MPC85xx_DMA1_OFFSET
4784 CONFIG_SYS_MPC85xx_DMA2_OFFSET 4779 CONFIG_SYS_MPC85xx_DMA2_OFFSET
4785 CONFIG_SYS_MPC85xx_DMA3_OFFSET 4780 CONFIG_SYS_MPC85xx_DMA3_OFFSET
4786 CONFIG_SYS_MPC85xx_DMA_ADDR 4781 CONFIG_SYS_MPC85xx_DMA_ADDR
4787 CONFIG_SYS_MPC85xx_DMA_OFFSET 4782 CONFIG_SYS_MPC85xx_DMA_OFFSET
4788 CONFIG_SYS_MPC85xx_ECM_ADDR 4783 CONFIG_SYS_MPC85xx_ECM_ADDR
4789 CONFIG_SYS_MPC85xx_ECM_OFFSET 4784 CONFIG_SYS_MPC85xx_ECM_OFFSET
4790 CONFIG_SYS_MPC85xx_ESDHC_ADDR 4785 CONFIG_SYS_MPC85xx_ESDHC_ADDR
4791 CONFIG_SYS_MPC85xx_ESDHC_OFFSET 4786 CONFIG_SYS_MPC85xx_ESDHC_OFFSET
4792 CONFIG_SYS_MPC85xx_ESPI_ADDR 4787 CONFIG_SYS_MPC85xx_ESPI_ADDR
4793 CONFIG_SYS_MPC85xx_ESPI_OFFSET 4788 CONFIG_SYS_MPC85xx_ESPI_OFFSET
4794 CONFIG_SYS_MPC85xx_GPIO3_ADDR 4789 CONFIG_SYS_MPC85xx_GPIO3_ADDR
4795 CONFIG_SYS_MPC85xx_GPIO_ADDR 4790 CONFIG_SYS_MPC85xx_GPIO_ADDR
4796 CONFIG_SYS_MPC85xx_GPIO_OFFSET 4791 CONFIG_SYS_MPC85xx_GPIO_OFFSET
4797 CONFIG_SYS_MPC85xx_GUTS_ADDR 4792 CONFIG_SYS_MPC85xx_GUTS_ADDR
4798 CONFIG_SYS_MPC85xx_GUTS_OFFSET 4793 CONFIG_SYS_MPC85xx_GUTS_OFFSET
4799 CONFIG_SYS_MPC85xx_IFC_OFFSET 4794 CONFIG_SYS_MPC85xx_IFC_OFFSET
4800 CONFIG_SYS_MPC85xx_L2_ADDR 4795 CONFIG_SYS_MPC85xx_L2_ADDR
4801 CONFIG_SYS_MPC85xx_L2_OFFSET 4796 CONFIG_SYS_MPC85xx_L2_OFFSET
4802 CONFIG_SYS_MPC85xx_LBC_OFFSET 4797 CONFIG_SYS_MPC85xx_LBC_OFFSET
4803 CONFIG_SYS_MPC85xx_PCI1_OFFSET 4798 CONFIG_SYS_MPC85xx_PCI1_OFFSET
4804 CONFIG_SYS_MPC85xx_PCI2_OFFSET 4799 CONFIG_SYS_MPC85xx_PCI2_OFFSET
4805 CONFIG_SYS_MPC85xx_PCIE 4800 CONFIG_SYS_MPC85xx_PCIE
4806 CONFIG_SYS_MPC85xx_PCIE1_OFFSET 4801 CONFIG_SYS_MPC85xx_PCIE1_OFFSET
4807 CONFIG_SYS_MPC85xx_PCIE2_OFFSET 4802 CONFIG_SYS_MPC85xx_PCIE2_OFFSET
4808 CONFIG_SYS_MPC85xx_PCIE3_OFFSET 4803 CONFIG_SYS_MPC85xx_PCIE3_OFFSET
4809 CONFIG_SYS_MPC85xx_PCIE4_OFFSET 4804 CONFIG_SYS_MPC85xx_PCIE4_OFFSET
4810 CONFIG_SYS_MPC85xx_PCIX2_ADDR 4805 CONFIG_SYS_MPC85xx_PCIX2_ADDR
4811 CONFIG_SYS_MPC85xx_PCIX2_OFFSET 4806 CONFIG_SYS_MPC85xx_PCIX2_OFFSET
4812 CONFIG_SYS_MPC85xx_PCIX_ADDR 4807 CONFIG_SYS_MPC85xx_PCIX_ADDR
4813 CONFIG_SYS_MPC85xx_PCIX_OFFSET 4808 CONFIG_SYS_MPC85xx_PCIX_OFFSET
4814 CONFIG_SYS_MPC85xx_PIC_OFFSET 4809 CONFIG_SYS_MPC85xx_PIC_OFFSET
4815 CONFIG_SYS_MPC85xx_QE_OFFSET 4810 CONFIG_SYS_MPC85xx_QE_OFFSET
4816 CONFIG_SYS_MPC85xx_SATA 4811 CONFIG_SYS_MPC85xx_SATA
4817 CONFIG_SYS_MPC85xx_SATA1_ADDR 4812 CONFIG_SYS_MPC85xx_SATA1_ADDR
4818 CONFIG_SYS_MPC85xx_SATA1_OFFSET 4813 CONFIG_SYS_MPC85xx_SATA1_OFFSET
4819 CONFIG_SYS_MPC85xx_SATA2_ADDR 4814 CONFIG_SYS_MPC85xx_SATA2_ADDR
4820 CONFIG_SYS_MPC85xx_SATA2_OFFSET 4815 CONFIG_SYS_MPC85xx_SATA2_OFFSET
4821 CONFIG_SYS_MPC85xx_SCFG 4816 CONFIG_SYS_MPC85xx_SCFG
4822 CONFIG_SYS_MPC85xx_SCFG_OFFSET 4817 CONFIG_SYS_MPC85xx_SCFG_OFFSET
4823 CONFIG_SYS_MPC85xx_SERDES1_ADDR 4818 CONFIG_SYS_MPC85xx_SERDES1_ADDR
4824 CONFIG_SYS_MPC85xx_SERDES1_OFFSET 4819 CONFIG_SYS_MPC85xx_SERDES1_OFFSET
4825 CONFIG_SYS_MPC85xx_SERDES2_ADDR 4820 CONFIG_SYS_MPC85xx_SERDES2_ADDR
4826 CONFIG_SYS_MPC85xx_SERDES2_OFFSET 4821 CONFIG_SYS_MPC85xx_SERDES2_OFFSET
4827 CONFIG_SYS_MPC85xx_TDM_OFFSET 4822 CONFIG_SYS_MPC85xx_TDM_OFFSET
4828 CONFIG_SYS_MPC85xx_USB 4823 CONFIG_SYS_MPC85xx_USB
4829 CONFIG_SYS_MPC85xx_USB1_ADDR 4824 CONFIG_SYS_MPC85xx_USB1_ADDR
4830 CONFIG_SYS_MPC85xx_USB1_OFFSET 4825 CONFIG_SYS_MPC85xx_USB1_OFFSET
4831 CONFIG_SYS_MPC85xx_USB1_PHY_ADDR 4826 CONFIG_SYS_MPC85xx_USB1_PHY_ADDR
4832 CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 4827 CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET
4833 CONFIG_SYS_MPC85xx_USB2_ADDR 4828 CONFIG_SYS_MPC85xx_USB2_ADDR
4834 CONFIG_SYS_MPC85xx_USB2_OFFSET 4829 CONFIG_SYS_MPC85xx_USB2_OFFSET
4835 CONFIG_SYS_MPC85xx_USB2_PHY_ADDR 4830 CONFIG_SYS_MPC85xx_USB2_PHY_ADDR
4836 CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 4831 CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET
4837 CONFIG_SYS_MPC86xx_DMA_ADDR 4832 CONFIG_SYS_MPC86xx_DMA_ADDR
4838 CONFIG_SYS_MPC86xx_DMA_OFFSET 4833 CONFIG_SYS_MPC86xx_DMA_OFFSET
4839 CONFIG_SYS_MPC86xx_PCI1_OFFSET 4834 CONFIG_SYS_MPC86xx_PCI1_OFFSET
4840 CONFIG_SYS_MPC86xx_PCI2_OFFSET 4835 CONFIG_SYS_MPC86xx_PCI2_OFFSET
4841 CONFIG_SYS_MPC86xx_PCIE1_OFFSET 4836 CONFIG_SYS_MPC86xx_PCIE1_OFFSET
4842 CONFIG_SYS_MPC86xx_PCIE2_OFFSET 4837 CONFIG_SYS_MPC86xx_PCIE2_OFFSET
4843 CONFIG_SYS_MPC86xx_PIC_OFFSET 4838 CONFIG_SYS_MPC86xx_PIC_OFFSET
4844 CONFIG_SYS_MPC8xxx_DDR2_OFFSET 4839 CONFIG_SYS_MPC8xxx_DDR2_OFFSET
4845 CONFIG_SYS_MPC8xxx_DDR3_OFFSET 4840 CONFIG_SYS_MPC8xxx_DDR3_OFFSET
4846 CONFIG_SYS_MPC8xxx_DDR_OFFSET 4841 CONFIG_SYS_MPC8xxx_DDR_OFFSET
4847 CONFIG_SYS_MPC8xxx_GUTS_ADDR 4842 CONFIG_SYS_MPC8xxx_GUTS_ADDR
4848 CONFIG_SYS_MPC8xxx_PIC_ADDR 4843 CONFIG_SYS_MPC8xxx_PIC_ADDR
4849 CONFIG_SYS_MPC92469AC 4844 CONFIG_SYS_MPC92469AC
4850 CONFIG_SYS_MPEG_BASE 4845 CONFIG_SYS_MPEG_BASE
4851 CONFIG_SYS_MPEG_SIZE 4846 CONFIG_SYS_MPEG_SIZE
4852 CONFIG_SYS_MPTPR 4847 CONFIG_SYS_MPTPR
4853 CONFIG_SYS_MPTPR_1BK_2K 4848 CONFIG_SYS_MPTPR_1BK_2K
4854 CONFIG_SYS_MPTPR_1BK_4K 4849 CONFIG_SYS_MPTPR_1BK_4K
4855 CONFIG_SYS_MPTPR_1BK_8K 4850 CONFIG_SYS_MPTPR_1BK_8K
4856 CONFIG_SYS_MPTPR_2BK_2K 4851 CONFIG_SYS_MPTPR_2BK_2K
4857 CONFIG_SYS_MPTPR_2BK_4K 4852 CONFIG_SYS_MPTPR_2BK_4K
4858 CONFIG_SYS_MPTPR_2BK_8K 4853 CONFIG_SYS_MPTPR_2BK_8K
4859 CONFIG_SYS_MRAM_BASE 4854 CONFIG_SYS_MRAM_BASE
4860 CONFIG_SYS_MRAM_SIZE 4855 CONFIG_SYS_MRAM_SIZE
4861 CONFIG_SYS_MRS_OFFS 4856 CONFIG_SYS_MRS_OFFS
4862 CONFIG_SYS_MSC0_VAL 4857 CONFIG_SYS_MSC0_VAL
4863 CONFIG_SYS_MSC1_VAL 4858 CONFIG_SYS_MSC1_VAL
4864 CONFIG_SYS_MSC2_VAL 4859 CONFIG_SYS_MSC2_VAL
4865 CONFIG_SYS_MTDPARTS_RUNTIME 4860 CONFIG_SYS_MTDPARTS_RUNTIME
4866 CONFIG_SYS_MVFS 4861 CONFIG_SYS_MVFS
4867 CONFIG_SYS_MX5_CLK32 4862 CONFIG_SYS_MX5_CLK32
4868 CONFIG_SYS_MX5_HCLK 4863 CONFIG_SYS_MX5_HCLK
4869 CONFIG_SYS_MX6_CLK32 4864 CONFIG_SYS_MX6_CLK32
4870 CONFIG_SYS_MX6_HCLK 4865 CONFIG_SYS_MX6_HCLK
4871 CONFIG_SYS_MX7_CLK32 4866 CONFIG_SYS_MX7_CLK32
4872 CONFIG_SYS_MX7_HCLK 4867 CONFIG_SYS_MX7_HCLK
4873 CONFIG_SYS_MXC_I2C1_SLAVE 4868 CONFIG_SYS_MXC_I2C1_SLAVE
4874 CONFIG_SYS_MXC_I2C1_SPEED 4869 CONFIG_SYS_MXC_I2C1_SPEED
4875 CONFIG_SYS_MXC_I2C2_SLAVE 4870 CONFIG_SYS_MXC_I2C2_SLAVE
4876 CONFIG_SYS_MXC_I2C2_SPEED 4871 CONFIG_SYS_MXC_I2C2_SPEED
4877 CONFIG_SYS_MXC_I2C3_SLAVE 4872 CONFIG_SYS_MXC_I2C3_SLAVE
4878 CONFIG_SYS_MXC_I2C3_SPEED 4873 CONFIG_SYS_MXC_I2C3_SPEED
4879 CONFIG_SYS_MXC_I2C4_SLAVE 4874 CONFIG_SYS_MXC_I2C4_SLAVE
4880 CONFIG_SYS_MXC_I2C4_SPEED 4875 CONFIG_SYS_MXC_I2C4_SPEED
4881 CONFIG_SYS_MXS_VDD5V_ONLY 4876 CONFIG_SYS_MXS_VDD5V_ONLY
4882 CONFIG_SYS_NAND2_ADDR 4877 CONFIG_SYS_NAND2_ADDR
4883 CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST 4878 CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
4884 CONFIG_SYS_NAND_4_ADDR_CYCLE 4879 CONFIG_SYS_NAND_4_ADDR_CYCLE
4885 CONFIG_SYS_NAND_5_ADDR_CYCLE 4880 CONFIG_SYS_NAND_5_ADDR_CYCLE
4886 CONFIG_SYS_NAND_ACTL_ALE 4881 CONFIG_SYS_NAND_ACTL_ALE
4887 CONFIG_SYS_NAND_ACTL_CLE 4882 CONFIG_SYS_NAND_ACTL_CLE
4888 CONFIG_SYS_NAND_ACTL_DELAY 4883 CONFIG_SYS_NAND_ACTL_DELAY
4889 CONFIG_SYS_NAND_ACTL_NCE 4884 CONFIG_SYS_NAND_ACTL_NCE
4890 CONFIG_SYS_NAND_ADDR 4885 CONFIG_SYS_NAND_ADDR
4891 CONFIG_SYS_NAND_ALE 4886 CONFIG_SYS_NAND_ALE
4892 CONFIG_SYS_NAND_AMASK 4887 CONFIG_SYS_NAND_AMASK
4893 CONFIG_SYS_NAND_BAD_BLOCK_POS 4888 CONFIG_SYS_NAND_BAD_BLOCK_POS
4894 CONFIG_SYS_NAND_BASE 4889 CONFIG_SYS_NAND_BASE
4895 CONFIG_SYS_NAND_BASE2 4890 CONFIG_SYS_NAND_BASE2
4896 CONFIG_SYS_NAND_BASE_LIST 4891 CONFIG_SYS_NAND_BASE_LIST
4897 CONFIG_SYS_NAND_BASE_PHYS 4892 CONFIG_SYS_NAND_BASE_PHYS
4898 CONFIG_SYS_NAND_BCR 4893 CONFIG_SYS_NAND_BCR
4899 CONFIG_SYS_NAND_BLOCK_SIZE 4894 CONFIG_SYS_NAND_BLOCK_SIZE
4900 CONFIG_SYS_NAND_BOOT 4895 CONFIG_SYS_NAND_BOOT
4901 CONFIG_SYS_NAND_BR_PRELIM 4896 CONFIG_SYS_NAND_BR_PRELIM
4902 CONFIG_SYS_NAND_BUSWIDTH_16 4897 CONFIG_SYS_NAND_BUSWIDTH_16
4903 CONFIG_SYS_NAND_CE 4898 CONFIG_SYS_NAND_CE
4904 CONFIG_SYS_NAND_CLE 4899 CONFIG_SYS_NAND_CLE
4905 CONFIG_SYS_NAND_CS 4900 CONFIG_SYS_NAND_CS
4906 CONFIG_SYS_NAND_CSOR 4901 CONFIG_SYS_NAND_CSOR
4907 CONFIG_SYS_NAND_CSPR 4902 CONFIG_SYS_NAND_CSPR
4908 CONFIG_SYS_NAND_CSPR_EXT 4903 CONFIG_SYS_NAND_CSPR_EXT
4909 CONFIG_SYS_NAND_DATA_BASE 4904 CONFIG_SYS_NAND_DATA_BASE
4910 CONFIG_SYS_NAND_DBW_16 4905 CONFIG_SYS_NAND_DBW_16
4911 CONFIG_SYS_NAND_DBW_8 4906 CONFIG_SYS_NAND_DBW_8
4912 CONFIG_SYS_NAND_DDR_LAW 4907 CONFIG_SYS_NAND_DDR_LAW
4913 CONFIG_SYS_NAND_ECCBYTES 4908 CONFIG_SYS_NAND_ECCBYTES
4914 CONFIG_SYS_NAND_ECCPOS 4909 CONFIG_SYS_NAND_ECCPOS
4915 CONFIG_SYS_NAND_ECCSIZE 4910 CONFIG_SYS_NAND_ECCSIZE
4916 CONFIG_SYS_NAND_ECCSTEPS 4911 CONFIG_SYS_NAND_ECCSTEPS
4917 CONFIG_SYS_NAND_ECCTOTAL 4912 CONFIG_SYS_NAND_ECCTOTAL
4918 CONFIG_SYS_NAND_ECC_BASE 4913 CONFIG_SYS_NAND_ECC_BASE
4919 CONFIG_SYS_NAND_ENABLE_PIN 4914 CONFIG_SYS_NAND_ENABLE_PIN
4920 CONFIG_SYS_NAND_ENABLE_PIN_SPL 4915 CONFIG_SYS_NAND_ENABLE_PIN_SPL
4921 CONFIG_SYS_NAND_FTIM0 4916 CONFIG_SYS_NAND_FTIM0
4922 CONFIG_SYS_NAND_FTIM1 4917 CONFIG_SYS_NAND_FTIM1
4923 CONFIG_SYS_NAND_FTIM2 4918 CONFIG_SYS_NAND_FTIM2
4924 CONFIG_SYS_NAND_FTIM3 4919 CONFIG_SYS_NAND_FTIM3
4925 CONFIG_SYS_NAND_HW_ECC 4920 CONFIG_SYS_NAND_HW_ECC
4926 CONFIG_SYS_NAND_HW_ECC_OOBFIRST 4921 CONFIG_SYS_NAND_HW_ECC_OOBFIRST
4927 CONFIG_SYS_NAND_LARGEPAGE 4922 CONFIG_SYS_NAND_LARGEPAGE
4928 CONFIG_SYS_NAND_LBLAWAR_PRELIM 4923 CONFIG_SYS_NAND_LBLAWAR_PRELIM
4929 CONFIG_SYS_NAND_LBLAWBAR_PRELIM 4924 CONFIG_SYS_NAND_LBLAWBAR_PRELIM
4930 CONFIG_SYS_NAND_MASK_ALE 4925 CONFIG_SYS_NAND_MASK_ALE
4931 CONFIG_SYS_NAND_MASK_CLE 4926 CONFIG_SYS_NAND_MASK_CLE
4932 CONFIG_SYS_NAND_MAX_CHIPS 4927 CONFIG_SYS_NAND_MAX_CHIPS
4933 CONFIG_SYS_NAND_MAX_ECCPOS 4928 CONFIG_SYS_NAND_MAX_ECCPOS
4934 CONFIG_SYS_NAND_MAX_OOBFREE 4929 CONFIG_SYS_NAND_MAX_OOBFREE
4935 CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES 4930 CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES
4936 CONFIG_SYS_NAND_NO_SUBPAGE 4931 CONFIG_SYS_NAND_NO_SUBPAGE
4937 CONFIG_SYS_NAND_NO_SUBPAGE_WRITE 4932 CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
4938 CONFIG_SYS_NAND_ONFI_DETECTION 4933 CONFIG_SYS_NAND_ONFI_DETECTION
4939 CONFIG_SYS_NAND_OOBSIZE 4934 CONFIG_SYS_NAND_OOBSIZE
4940 CONFIG_SYS_NAND_OR_PRELIM 4935 CONFIG_SYS_NAND_OR_PRELIM
4941 CONFIG_SYS_NAND_PAGE_2K 4936 CONFIG_SYS_NAND_PAGE_2K
4942 CONFIG_SYS_NAND_PAGE_4K 4937 CONFIG_SYS_NAND_PAGE_4K
4943 CONFIG_SYS_NAND_PAGE_COUNT 4938 CONFIG_SYS_NAND_PAGE_COUNT
4944 CONFIG_SYS_NAND_PAGE_SIZE 4939 CONFIG_SYS_NAND_PAGE_SIZE
4945 CONFIG_SYS_NAND_QUIET 4940 CONFIG_SYS_NAND_QUIET
4946 CONFIG_SYS_NAND_RDY 4941 CONFIG_SYS_NAND_RDY
4947 CONFIG_SYS_NAND_READY_PIN 4942 CONFIG_SYS_NAND_READY_PIN
4948 CONFIG_SYS_NAND_REGS_BASE 4943 CONFIG_SYS_NAND_REGS_BASE
4949 CONFIG_SYS_NAND_SELECT_DEVICE 4944 CONFIG_SYS_NAND_SELECT_DEVICE
4950 CONFIG_SYS_NAND_SIZE 4945 CONFIG_SYS_NAND_SIZE
4951 CONFIG_SYS_NAND_SKIP_BAD_DOT_I 4946 CONFIG_SYS_NAND_SKIP_BAD_DOT_I
4952 CONFIG_SYS_NAND_SPL_KERNEL_OFFS 4947 CONFIG_SYS_NAND_SPL_KERNEL_OFFS
4953 CONFIG_SYS_NAND_SPL_SIZE 4948 CONFIG_SYS_NAND_SPL_SIZE
4954 CONFIG_SYS_NAND_USE_FLASH_BBT 4949 CONFIG_SYS_NAND_USE_FLASH_BBT
4955 CONFIG_SYS_NAND_U_BOOT_DST 4950 CONFIG_SYS_NAND_U_BOOT_DST
4956 CONFIG_SYS_NAND_U_BOOT_RELOC 4951 CONFIG_SYS_NAND_U_BOOT_RELOC
4957 CONFIG_SYS_NAND_U_BOOT_RELOC_SP 4952 CONFIG_SYS_NAND_U_BOOT_RELOC_SP
4958 CONFIG_SYS_NAND_U_BOOT_SIZE 4953 CONFIG_SYS_NAND_U_BOOT_SIZE
4959 CONFIG_SYS_NAND_U_BOOT_START 4954 CONFIG_SYS_NAND_U_BOOT_START
4960 CONFIG_SYS_NAND_WINDOW_SIZE 4955 CONFIG_SYS_NAND_WINDOW_SIZE
4961 CONFIG_SYS_NDFC_EBC0_CFG 4956 CONFIG_SYS_NDFC_EBC0_CFG
4962 CONFIG_SYS_NETA_INTERFACE_TYPE 4957 CONFIG_SYS_NETA_INTERFACE_TYPE
4963 CONFIG_SYS_NONCACHED_MEMORY 4958 CONFIG_SYS_NONCACHED_MEMORY
4964 CONFIG_SYS_NOR0_CSPR 4959 CONFIG_SYS_NOR0_CSPR
4965 CONFIG_SYS_NOR0_CSPR_EARLY 4960 CONFIG_SYS_NOR0_CSPR_EARLY
4966 CONFIG_SYS_NOR0_CSPR_EXT 4961 CONFIG_SYS_NOR0_CSPR_EXT
4967 CONFIG_SYS_NOR1SZ 4962 CONFIG_SYS_NOR1SZ
4968 CONFIG_SYS_NOR1_CSPR 4963 CONFIG_SYS_NOR1_CSPR
4969 CONFIG_SYS_NOR1_CSPR_EARLY 4964 CONFIG_SYS_NOR1_CSPR_EARLY
4970 CONFIG_SYS_NOR1_CSPR_EXT 4965 CONFIG_SYS_NOR1_CSPR_EXT
4971 CONFIG_SYS_NOR_AMASK 4966 CONFIG_SYS_NOR_AMASK
4972 CONFIG_SYS_NOR_AMASK_EARLY 4967 CONFIG_SYS_NOR_AMASK_EARLY
4973 CONFIG_SYS_NOR_BR_PRELIM 4968 CONFIG_SYS_NOR_BR_PRELIM
4974 CONFIG_SYS_NOR_CS 4969 CONFIG_SYS_NOR_CS
4975 CONFIG_SYS_NOR_CSOR 4970 CONFIG_SYS_NOR_CSOR
4976 CONFIG_SYS_NOR_CSPR 4971 CONFIG_SYS_NOR_CSPR
4977 CONFIG_SYS_NOR_CSPR_EXT 4972 CONFIG_SYS_NOR_CSPR_EXT
4978 CONFIG_SYS_NOR_FTIM0 4973 CONFIG_SYS_NOR_FTIM0
4979 CONFIG_SYS_NOR_FTIM1 4974 CONFIG_SYS_NOR_FTIM1
4980 CONFIG_SYS_NOR_FTIM2 4975 CONFIG_SYS_NOR_FTIM2
4981 CONFIG_SYS_NOR_FTIM3 4976 CONFIG_SYS_NOR_FTIM3
4982 CONFIG_SYS_NOR_OR_PRELIM 4977 CONFIG_SYS_NOR_OR_PRELIM
4983 CONFIG_SYS_NO_DCACHE 4978 CONFIG_SYS_NO_DCACHE
4984 CONFIG_SYS_NR_PIOS 4979 CONFIG_SYS_NR_PIOS
4985 CONFIG_SYS_NR_VM_REGIONS 4980 CONFIG_SYS_NR_VM_REGIONS
4986 CONFIG_SYS_NS16550_CLK 4981 CONFIG_SYS_NS16550_CLK
4987 CONFIG_SYS_NS16550_CLK_DIV 4982 CONFIG_SYS_NS16550_CLK_DIV
4988 CONFIG_SYS_NS16550_COM1 4983 CONFIG_SYS_NS16550_COM1
4989 CONFIG_SYS_NS16550_COM2 4984 CONFIG_SYS_NS16550_COM2
4990 CONFIG_SYS_NS16550_COM3 4985 CONFIG_SYS_NS16550_COM3
4991 CONFIG_SYS_NS16550_COM4 4986 CONFIG_SYS_NS16550_COM4
4992 CONFIG_SYS_NS16550_COM5 4987 CONFIG_SYS_NS16550_COM5
4993 CONFIG_SYS_NS16550_COM6 4988 CONFIG_SYS_NS16550_COM6
4994 CONFIG_SYS_NS16550_IER 4989 CONFIG_SYS_NS16550_IER
4995 CONFIG_SYS_NS16550_MEM32 4990 CONFIG_SYS_NS16550_MEM32
4996 CONFIG_SYS_NS16550_PORT_MAPPED 4991 CONFIG_SYS_NS16550_PORT_MAPPED
4997 CONFIG_SYS_NS16550_REG_SIZE 4992 CONFIG_SYS_NS16550_REG_SIZE
4998 CONFIG_SYS_NS16550_SERIAL 4993 CONFIG_SYS_NS16550_SERIAL
4999 CONFIG_SYS_NS87308_CS0_BASE 4994 CONFIG_SYS_NS87308_CS0_BASE
5000 CONFIG_SYS_NS87308_CS0_CONF 4995 CONFIG_SYS_NS87308_CS0_CONF
5001 CONFIG_SYS_NS87308_CS1_BASE 4996 CONFIG_SYS_NS87308_CS1_BASE
5002 CONFIG_SYS_NS87308_CS1_CONF 4997 CONFIG_SYS_NS87308_CS1_CONF
5003 CONFIG_SYS_NS87308_CS2_BASE 4998 CONFIG_SYS_NS87308_CS2_BASE
5004 CONFIG_SYS_NS87308_CS2_CONF 4999 CONFIG_SYS_NS87308_CS2_CONF
5005 CONFIG_SYS_NS87308_FDC 5000 CONFIG_SYS_NS87308_FDC
5006 CONFIG_SYS_NS87308_FDC_BASE 5001 CONFIG_SYS_NS87308_FDC_BASE
5007 CONFIG_SYS_NS87308_GPIO 5002 CONFIG_SYS_NS87308_GPIO
5008 CONFIG_SYS_NS87308_GPIO_BASE 5003 CONFIG_SYS_NS87308_GPIO_BASE
5009 CONFIG_SYS_NS87308_KBC1 5004 CONFIG_SYS_NS87308_KBC1
5010 CONFIG_SYS_NS87308_KBC1_BASE 5005 CONFIG_SYS_NS87308_KBC1_BASE
5011 CONFIG_SYS_NS87308_KBC2 5006 CONFIG_SYS_NS87308_KBC2
5012 CONFIG_SYS_NS87308_LPT_BASE 5007 CONFIG_SYS_NS87308_LPT_BASE
5013 CONFIG_SYS_NS87308_MOUSE 5008 CONFIG_SYS_NS87308_MOUSE
5014 CONFIG_SYS_NS87308_PARP 5009 CONFIG_SYS_NS87308_PARP
5015 CONFIG_SYS_NS87308_PMC1 5010 CONFIG_SYS_NS87308_PMC1
5016 CONFIG_SYS_NS87308_PMC2 5011 CONFIG_SYS_NS87308_PMC2
5017 CONFIG_SYS_NS87308_PMC3 5012 CONFIG_SYS_NS87308_PMC3
5018 CONFIG_SYS_NS87308_POWRMAN 5013 CONFIG_SYS_NS87308_POWRMAN
5019 CONFIG_SYS_NS87308_PS2MOD 5014 CONFIG_SYS_NS87308_PS2MOD
5020 CONFIG_SYS_NS87308_PWMAN_BASE 5015 CONFIG_SYS_NS87308_PWMAN_BASE
5021 CONFIG_SYS_NS87308_RARP 5016 CONFIG_SYS_NS87308_RARP
5022 CONFIG_SYS_NS87308_RTC_APC 5017 CONFIG_SYS_NS87308_RTC_APC
5023 CONFIG_SYS_NS87308_RTC_BASE 5018 CONFIG_SYS_NS87308_RTC_BASE
5024 CONFIG_SYS_NS87308_UART1 5019 CONFIG_SYS_NS87308_UART1
5025 CONFIG_SYS_NS87308_UART1_BASE 5020 CONFIG_SYS_NS87308_UART1_BASE
5026 CONFIG_SYS_NS87308_UART2 5021 CONFIG_SYS_NS87308_UART2
5027 CONFIG_SYS_NS87308_UART2_BASE 5022 CONFIG_SYS_NS87308_UART2_BASE
5028 CONFIG_SYS_NUM_ADDR_MAP 5023 CONFIG_SYS_NUM_ADDR_MAP
5029 CONFIG_SYS_NUM_CPC 5024 CONFIG_SYS_NUM_CPC
5030 CONFIG_SYS_NUM_FM1_10GEC 5025 CONFIG_SYS_NUM_FM1_10GEC
5031 CONFIG_SYS_NUM_FM1_DTSEC 5026 CONFIG_SYS_NUM_FM1_DTSEC
5032 CONFIG_SYS_NUM_FM2_10GEC 5027 CONFIG_SYS_NUM_FM2_10GEC
5033 CONFIG_SYS_NUM_FM2_DTSEC 5028 CONFIG_SYS_NUM_FM2_DTSEC
5034 CONFIG_SYS_NUM_FMAN 5029 CONFIG_SYS_NUM_FMAN
5035 CONFIG_SYS_NUM_I2C_BUSES 5030 CONFIG_SYS_NUM_I2C_BUSES
5036 CONFIG_SYS_NUM_IRQS 5031 CONFIG_SYS_NUM_IRQS
5037 CONFIG_SYS_NVRAM_ACCESS_ROUTINE 5032 CONFIG_SYS_NVRAM_ACCESS_ROUTINE
5038 CONFIG_SYS_NVRAM_BASE 5033 CONFIG_SYS_NVRAM_BASE
5039 CONFIG_SYS_NVRAM_BASE_ADDR 5034 CONFIG_SYS_NVRAM_BASE_ADDR
5040 CONFIG_SYS_NVRAM_SIZE 5035 CONFIG_SYS_NVRAM_SIZE
5041 CONFIG_SYS_OBIR 5036 CONFIG_SYS_OBIR
5042 CONFIG_SYS_OCM_BASE 5037 CONFIG_SYS_OCM_BASE
5043 CONFIG_SYS_OCM_DATA_ADDR 5038 CONFIG_SYS_OCM_DATA_ADDR
5044 CONFIG_SYS_OCM_DATA_SIZE 5039 CONFIG_SYS_OCM_DATA_SIZE
5045 CONFIG_SYS_OCM_SIZE 5040 CONFIG_SYS_OCM_SIZE
5046 CONFIG_SYS_OCM_STATUS_ADDR 5041 CONFIG_SYS_OCM_STATUS_ADDR
5047 CONFIG_SYS_OCM_STATUS_FAIL 5042 CONFIG_SYS_OCM_STATUS_FAIL
5048 CONFIG_SYS_OCM_STATUS_MASK 5043 CONFIG_SYS_OCM_STATUS_MASK
5049 CONFIG_SYS_OCM_STATUS_OK 5044 CONFIG_SYS_OCM_STATUS_OK
5050 CONFIG_SYS_OHCI_BE_CONTROLLER 5045 CONFIG_SYS_OHCI_BE_CONTROLLER
5051 CONFIG_SYS_OHCI_SWAP_REG_ACCESS 5046 CONFIG_SYS_OHCI_SWAP_REG_ACCESS
5052 CONFIG_SYS_OHCI_USE_NPS 5047 CONFIG_SYS_OHCI_USE_NPS
5053 CONFIG_SYS_OMAP24_I2C_SLAVE 5048 CONFIG_SYS_OMAP24_I2C_SLAVE
5054 CONFIG_SYS_OMAP24_I2C_SLAVE1 5049 CONFIG_SYS_OMAP24_I2C_SLAVE1
5055 CONFIG_SYS_OMAP24_I2C_SLAVE2 5050 CONFIG_SYS_OMAP24_I2C_SLAVE2
5056 CONFIG_SYS_OMAP24_I2C_SLAVE3 5051 CONFIG_SYS_OMAP24_I2C_SLAVE3
5057 CONFIG_SYS_OMAP24_I2C_SLAVE4 5052 CONFIG_SYS_OMAP24_I2C_SLAVE4
5058 CONFIG_SYS_OMAP24_I2C_SPEED 5053 CONFIG_SYS_OMAP24_I2C_SPEED
5059 CONFIG_SYS_OMAP24_I2C_SPEED1 5054 CONFIG_SYS_OMAP24_I2C_SPEED1
5060 CONFIG_SYS_OMAP24_I2C_SPEED2 5055 CONFIG_SYS_OMAP24_I2C_SPEED2
5061 CONFIG_SYS_OMAP24_I2C_SPEED3 5056 CONFIG_SYS_OMAP24_I2C_SPEED3
5062 CONFIG_SYS_OMAP24_I2C_SPEED4 5057 CONFIG_SYS_OMAP24_I2C_SPEED4
5063 CONFIG_SYS_OMAP24_I2C_SPEED_PSOC 5058 CONFIG_SYS_OMAP24_I2C_SPEED_PSOC
5064 CONFIG_SYS_OMAP_ABE_SYSCK 5059 CONFIG_SYS_OMAP_ABE_SYSCK
5065 CONFIG_SYS_ONENAND_BASE 5060 CONFIG_SYS_ONENAND_BASE
5066 CONFIG_SYS_ONENAND_BLOCK_SIZE 5061 CONFIG_SYS_ONENAND_BLOCK_SIZE
5067 CONFIG_SYS_ONENAND_PAGE_SIZE 5062 CONFIG_SYS_ONENAND_PAGE_SIZE
5068 CONFIG_SYS_OPER_FLASH 5063 CONFIG_SYS_OPER_FLASH
5069 CONFIG_SYS_OR0_64M 5064 CONFIG_SYS_OR0_64M
5070 CONFIG_SYS_OR0_8M 5065 CONFIG_SYS_OR0_8M
5071 CONFIG_SYS_OR0_PRELIM 5066 CONFIG_SYS_OR0_PRELIM
5072 CONFIG_SYS_OR0_REMAP 5067 CONFIG_SYS_OR0_REMAP
5073 CONFIG_SYS_OR1 5068 CONFIG_SYS_OR1
5074 CONFIG_SYS_OR10_PRELIM 5069 CONFIG_SYS_OR10_PRELIM
5075 CONFIG_SYS_OR11_PRELIM 5070 CONFIG_SYS_OR11_PRELIM
5076 CONFIG_SYS_OR1_PRELIM 5071 CONFIG_SYS_OR1_PRELIM
5077 CONFIG_SYS_OR1_REMAP 5072 CONFIG_SYS_OR1_REMAP
5078 CONFIG_SYS_OR2_PRELIM 5073 CONFIG_SYS_OR2_PRELIM
5079 CONFIG_SYS_OR3_CAN 5074 CONFIG_SYS_OR3_CAN
5080 CONFIG_SYS_OR3_PRELIM 5075 CONFIG_SYS_OR3_PRELIM
5081 CONFIG_SYS_OR4_PRELIM 5076 CONFIG_SYS_OR4_PRELIM
5082 CONFIG_SYS_OR5_ISP1362 5077 CONFIG_SYS_OR5_ISP1362
5083 CONFIG_SYS_OR5_PRELIM 5078 CONFIG_SYS_OR5_PRELIM
5084 CONFIG_SYS_OR5_REMAP 5079 CONFIG_SYS_OR5_REMAP
5085 CONFIG_SYS_OR6_64M 5080 CONFIG_SYS_OR6_64M
5086 CONFIG_SYS_OR6_8M 5081 CONFIG_SYS_OR6_8M
5087 CONFIG_SYS_OR6_PRELIM 5082 CONFIG_SYS_OR6_PRELIM
5088 CONFIG_SYS_OR7_PRELIM 5083 CONFIG_SYS_OR7_PRELIM
5089 CONFIG_SYS_OR8_PRELIM 5084 CONFIG_SYS_OR8_PRELIM
5090 CONFIG_SYS_OR9_PRELIM 5085 CONFIG_SYS_OR9_PRELIM
5091 CONFIG_SYS_OR_TIMING_FLASH 5086 CONFIG_SYS_OR_TIMING_FLASH
5092 CONFIG_SYS_OR_TIMING_FLASH_AT_50MHZ 5087 CONFIG_SYS_OR_TIMING_FLASH_AT_50MHZ
5093 CONFIG_SYS_OR_TIMING_MRAM 5088 CONFIG_SYS_OR_TIMING_MRAM
5094 CONFIG_SYS_OR_TIMING_SDRAM 5089 CONFIG_SYS_OR_TIMING_SDRAM
5095 CONFIG_SYS_OSC0_HZ 5090 CONFIG_SYS_OSC0_HZ
5096 CONFIG_SYS_OSC1_HZ 5091 CONFIG_SYS_OSC1_HZ
5097 CONFIG_SYS_OSCIN_FREQ 5092 CONFIG_SYS_OSCIN_FREQ
5098 CONFIG_SYS_OSC_CLK 5093 CONFIG_SYS_OSC_CLK
5099 CONFIG_SYS_OSD_DH 5094 CONFIG_SYS_OSD_DH
5100 CONFIG_SYS_OSD_SCREENS 5095 CONFIG_SYS_OSD_SCREENS
5101 CONFIG_SYS_OSPR_OFFSET 5096 CONFIG_SYS_OSPR_OFFSET
5102 CONFIG_SYS_PACNT 5097 CONFIG_SYS_PACNT
5103 CONFIG_SYS_PADAT 5098 CONFIG_SYS_PADAT
5104 CONFIG_SYS_PADDR 5099 CONFIG_SYS_PADDR
5105 CONFIG_SYS_PAGE_SIZE 5100 CONFIG_SYS_PAGE_SIZE
5106 CONFIG_SYS_PAMU_ADDR 5101 CONFIG_SYS_PAMU_ADDR
5107 CONFIG_SYS_PASPAR 5102 CONFIG_SYS_PASPAR
5108 CONFIG_SYS_PAXE_BASE 5103 CONFIG_SYS_PAXE_BASE
5109 CONFIG_SYS_PAXE_SIZE 5104 CONFIG_SYS_PAXE_SIZE
5110 CONFIG_SYS_PBCNT 5105 CONFIG_SYS_PBCNT
5111 CONFIG_SYS_PBDAT 5106 CONFIG_SYS_PBDAT
5112 CONFIG_SYS_PBDDR 5107 CONFIG_SYS_PBDDR
5113 CONFIG_SYS_PBI_FLASH_BASE 5108 CONFIG_SYS_PBI_FLASH_BASE
5114 CONFIG_SYS_PBI_FLASH_WINDOW 5109 CONFIG_SYS_PBI_FLASH_WINDOW
5115 CONFIG_SYS_PBSIZE 5110 CONFIG_SYS_PBSIZE
5116 CONFIG_SYS_PB_LED 5111 CONFIG_SYS_PB_LED
5117 CONFIG_SYS_PCA953X_BRD_CFG0 5112 CONFIG_SYS_PCA953X_BRD_CFG0
5118 CONFIG_SYS_PCA953X_BRD_CFG1 5113 CONFIG_SYS_PCA953X_BRD_CFG1
5119 CONFIG_SYS_PCA953X_BRD_CFG2 5114 CONFIG_SYS_PCA953X_BRD_CFG2
5120 CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS 5115 CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS
5121 CONFIG_SYS_PCA953X_C0_SER0_EN 5116 CONFIG_SYS_PCA953X_C0_SER0_EN
5122 CONFIG_SYS_PCA953X_C0_SER0_MODE 5117 CONFIG_SYS_PCA953X_C0_SER0_MODE
5123 CONFIG_SYS_PCA953X_C0_SER1_EN 5118 CONFIG_SYS_PCA953X_C0_SER1_EN
5124 CONFIG_SYS_PCA953X_C0_SER1_MODE 5119 CONFIG_SYS_PCA953X_C0_SER1_MODE
5125 CONFIG_SYS_PCA953X_C0_VCORE_VID2 5120 CONFIG_SYS_PCA953X_C0_VCORE_VID2
5126 CONFIG_SYS_PCA953X_C0_VCORE_VID3 5121 CONFIG_SYS_PCA953X_C0_VCORE_VID3
5127 CONFIG_SYS_PCA953X_EREADY 5122 CONFIG_SYS_PCA953X_EREADY
5128 CONFIG_SYS_PCA953X_FLASH_PASS_CS 5123 CONFIG_SYS_PCA953X_FLASH_PASS_CS
5129 CONFIG_SYS_PCA953X_GPIO_VPX0 5124 CONFIG_SYS_PCA953X_GPIO_VPX0
5130 CONFIG_SYS_PCA953X_GPIO_VPX1 5125 CONFIG_SYS_PCA953X_GPIO_VPX1
5131 CONFIG_SYS_PCA953X_GPIO_VPX2 5126 CONFIG_SYS_PCA953X_GPIO_VPX2
5132 CONFIG_SYS_PCA953X_GPIO_VPX3 5127 CONFIG_SYS_PCA953X_GPIO_VPX3
5133 CONFIG_SYS_PCA953X_MC_GPIO0 5128 CONFIG_SYS_PCA953X_MC_GPIO0
5134 CONFIG_SYS_PCA953X_MC_GPIO1 5129 CONFIG_SYS_PCA953X_MC_GPIO1
5135 CONFIG_SYS_PCA953X_MC_GPIO2 5130 CONFIG_SYS_PCA953X_MC_GPIO2
5136 CONFIG_SYS_PCA953X_MC_GPIO3 5131 CONFIG_SYS_PCA953X_MC_GPIO3
5137 CONFIG_SYS_PCA953X_MC_GPIO4 5132 CONFIG_SYS_PCA953X_MC_GPIO4
5138 CONFIG_SYS_PCA953X_MC_GPIO5 5133 CONFIG_SYS_PCA953X_MC_GPIO5
5139 CONFIG_SYS_PCA953X_MC_GPIO6 5134 CONFIG_SYS_PCA953X_MC_GPIO6
5140 CONFIG_SYS_PCA953X_MC_GPIO7 5135 CONFIG_SYS_PCA953X_MC_GPIO7
5141 CONFIG_SYS_PCA953X_MONARCH 5136 CONFIG_SYS_PCA953X_MONARCH
5142 CONFIG_SYS_PCA953X_NVM_WP 5137 CONFIG_SYS_PCA953X_NVM_WP
5143 CONFIG_SYS_PCA953X_P0_GA0 5138 CONFIG_SYS_PCA953X_P0_GA0
5144 CONFIG_SYS_PCA953X_P0_GA1 5139 CONFIG_SYS_PCA953X_P0_GA1
5145 CONFIG_SYS_PCA953X_P0_GA2 5140 CONFIG_SYS_PCA953X_P0_GA2
5146 CONFIG_SYS_PCA953X_P0_GA3 5141 CONFIG_SYS_PCA953X_P0_GA3
5147 CONFIG_SYS_PCA953X_P0_GA4 5142 CONFIG_SYS_PCA953X_P0_GA4
5148 CONFIG_SYS_PCA953X_P0_GAP 5143 CONFIG_SYS_PCA953X_P0_GAP
5149 CONFIG_SYS_PCA953X_P14_IO0 5144 CONFIG_SYS_PCA953X_P14_IO0
5150 CONFIG_SYS_PCA953X_P14_IO1 5145 CONFIG_SYS_PCA953X_P14_IO1
5151 CONFIG_SYS_PCA953X_P14_IO2 5146 CONFIG_SYS_PCA953X_P14_IO2
5152 CONFIG_SYS_PCA953X_P14_IO3 5147 CONFIG_SYS_PCA953X_P14_IO3
5153 CONFIG_SYS_PCA953X_P14_IO4 5148 CONFIG_SYS_PCA953X_P14_IO4
5154 CONFIG_SYS_PCA953X_P14_IO5 5149 CONFIG_SYS_PCA953X_P14_IO5
5155 CONFIG_SYS_PCA953X_P14_IO6 5150 CONFIG_SYS_PCA953X_P14_IO6
5156 CONFIG_SYS_PCA953X_P14_IO7 5151 CONFIG_SYS_PCA953X_P14_IO7
5157 CONFIG_SYS_PCA953X_P1_SYSEN 5152 CONFIG_SYS_PCA953X_P1_SYSEN
5158 CONFIG_SYS_PCA953X_PLUG_GPIO0 5153 CONFIG_SYS_PCA953X_PLUG_GPIO0
5159 CONFIG_SYS_PCA953X_PMC0_EREADY 5154 CONFIG_SYS_PCA953X_PMC0_EREADY
5160 CONFIG_SYS_PCA953X_PMC0_MONARCH 5155 CONFIG_SYS_PCA953X_PMC0_MONARCH
5161 CONFIG_SYS_PCA953X_PMC_EREADY 5156 CONFIG_SYS_PCA953X_PMC_EREADY
5162 CONFIG_SYS_PCA953X_PMC_MONARCH 5157 CONFIG_SYS_PCA953X_PMC_MONARCH
5163 CONFIG_SYS_PCA953X_PMC_PRESENT 5158 CONFIG_SYS_PCA953X_PMC_PRESENT
5164 CONFIG_SYS_PCA953X_VPX_FRU_WRCTL 5159 CONFIG_SYS_PCA953X_VPX_FRU_WRCTL
5165 CONFIG_SYS_PCA953X_VPX_GPIO0 5160 CONFIG_SYS_PCA953X_VPX_GPIO0
5166 CONFIG_SYS_PCA953X_VPX_GPIO1 5161 CONFIG_SYS_PCA953X_VPX_GPIO1
5167 CONFIG_SYS_PCA953X_VPX_GPIO2 5162 CONFIG_SYS_PCA953X_VPX_GPIO2
5168 CONFIG_SYS_PCA953X_VPX_GPIO3 5163 CONFIG_SYS_PCA953X_VPX_GPIO3
5169 CONFIG_SYS_PCA953X_XMC0_BIST 5164 CONFIG_SYS_PCA953X_XMC0_BIST
5170 CONFIG_SYS_PCA953X_XMC0_MVMR0 5165 CONFIG_SYS_PCA953X_XMC0_MVMR0
5171 CONFIG_SYS_PCA953X_XMC0_ROOT0 5166 CONFIG_SYS_PCA953X_XMC0_ROOT0
5172 CONFIG_SYS_PCA953X_XMC0_WAKE 5167 CONFIG_SYS_PCA953X_XMC0_WAKE
5173 CONFIG_SYS_PCA953X_XMC_BIST 5168 CONFIG_SYS_PCA953X_XMC_BIST
5174 CONFIG_SYS_PCA953X_XMC_GA0 5169 CONFIG_SYS_PCA953X_XMC_GA0
5175 CONFIG_SYS_PCA953X_XMC_GA1 5170 CONFIG_SYS_PCA953X_XMC_GA1
5176 CONFIG_SYS_PCA953X_XMC_GA2 5171 CONFIG_SYS_PCA953X_XMC_GA2
5177 CONFIG_SYS_PCA953X_XMC_PRESENT 5172 CONFIG_SYS_PCA953X_XMC_PRESENT
5178 CONFIG_SYS_PCA953X_XMC_ROOT0 5173 CONFIG_SYS_PCA953X_XMC_ROOT0
5179 CONFIG_SYS_PCA953X_XMC_WAKE 5174 CONFIG_SYS_PCA953X_XMC_WAKE
5180 CONFIG_SYS_PCCNT 5175 CONFIG_SYS_PCCNT
5181 CONFIG_SYS_PCDAT 5176 CONFIG_SYS_PCDAT
5182 CONFIG_SYS_PCDDR 5177 CONFIG_SYS_PCDDR
5183 CONFIG_SYS_PCI 5178 CONFIG_SYS_PCI
5184 CONFIG_SYS_PCI0_IO_SPACE 5179 CONFIG_SYS_PCI0_IO_SPACE
5185 CONFIG_SYS_PCI1_ADDR 5180 CONFIG_SYS_PCI1_ADDR
5186 CONFIG_SYS_PCI1_IO_BASE 5181 CONFIG_SYS_PCI1_IO_BASE
5187 CONFIG_SYS_PCI1_IO_BUS 5182 CONFIG_SYS_PCI1_IO_BUS
5188 CONFIG_SYS_PCI1_IO_PHYS 5183 CONFIG_SYS_PCI1_IO_PHYS
5189 CONFIG_SYS_PCI1_IO_SIZE 5184 CONFIG_SYS_PCI1_IO_SIZE
5190 CONFIG_SYS_PCI1_IO_VIRT 5185 CONFIG_SYS_PCI1_IO_VIRT
5191 CONFIG_SYS_PCI1_MEM_BASE 5186 CONFIG_SYS_PCI1_MEM_BASE
5192 CONFIG_SYS_PCI1_MEM_BUS 5187 CONFIG_SYS_PCI1_MEM_BUS
5193 CONFIG_SYS_PCI1_MEM_PHYS 5188 CONFIG_SYS_PCI1_MEM_PHYS
5194 CONFIG_SYS_PCI1_MEM_SIZE 5189 CONFIG_SYS_PCI1_MEM_SIZE
5195 CONFIG_SYS_PCI1_MEM_VIRT 5190 CONFIG_SYS_PCI1_MEM_VIRT
5196 CONFIG_SYS_PCI1_MMIO_BASE 5191 CONFIG_SYS_PCI1_MMIO_BASE
5197 CONFIG_SYS_PCI1_MMIO_PHYS 5192 CONFIG_SYS_PCI1_MMIO_PHYS
5198 CONFIG_SYS_PCI1_MMIO_SIZE 5193 CONFIG_SYS_PCI1_MMIO_SIZE
5199 CONFIG_SYS_PCI2_ADDR 5194 CONFIG_SYS_PCI2_ADDR
5200 CONFIG_SYS_PCI2_IO_BASE 5195 CONFIG_SYS_PCI2_IO_BASE
5201 CONFIG_SYS_PCI2_IO_BUS 5196 CONFIG_SYS_PCI2_IO_BUS
5202 CONFIG_SYS_PCI2_IO_PHYS 5197 CONFIG_SYS_PCI2_IO_PHYS
5203 CONFIG_SYS_PCI2_IO_SIZE 5198 CONFIG_SYS_PCI2_IO_SIZE
5204 CONFIG_SYS_PCI2_IO_VIRT 5199 CONFIG_SYS_PCI2_IO_VIRT
5205 CONFIG_SYS_PCI2_MEM_BASE 5200 CONFIG_SYS_PCI2_MEM_BASE
5206 CONFIG_SYS_PCI2_MEM_BUS 5201 CONFIG_SYS_PCI2_MEM_BUS
5207 CONFIG_SYS_PCI2_MEM_PHYS 5202 CONFIG_SYS_PCI2_MEM_PHYS
5208 CONFIG_SYS_PCI2_MEM_SIZE 5203 CONFIG_SYS_PCI2_MEM_SIZE
5209 CONFIG_SYS_PCI2_MEM_VIRT 5204 CONFIG_SYS_PCI2_MEM_VIRT
5210 CONFIG_SYS_PCI2_MMIO_BASE 5205 CONFIG_SYS_PCI2_MMIO_BASE
5211 CONFIG_SYS_PCI2_MMIO_PHYS 5206 CONFIG_SYS_PCI2_MMIO_PHYS
5212 CONFIG_SYS_PCI2_MMIO_SIZE 5207 CONFIG_SYS_PCI2_MMIO_SIZE
5213 CONFIG_SYS_PCI64_MEMORY_BUS 5208 CONFIG_SYS_PCI64_MEMORY_BUS
5214 CONFIG_SYS_PCI9054_IOBASE 5209 CONFIG_SYS_PCI9054_IOBASE
5215 CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 5210 CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
5216 CONFIG_SYS_PCIE 5211 CONFIG_SYS_PCIE
5217 CONFIG_SYS_PCIE0_CFGBASE 5212 CONFIG_SYS_PCIE0_CFGBASE
5218 CONFIG_SYS_PCIE0_CFGMASK 5213 CONFIG_SYS_PCIE0_CFGMASK
5219 CONFIG_SYS_PCIE0_MEMBASE 5214 CONFIG_SYS_PCIE0_MEMBASE
5220 CONFIG_SYS_PCIE0_REGBASE 5215 CONFIG_SYS_PCIE0_REGBASE
5221 CONFIG_SYS_PCIE0_UTLBASE 5216 CONFIG_SYS_PCIE0_UTLBASE
5222 CONFIG_SYS_PCIE0_XCFGBASE 5217 CONFIG_SYS_PCIE0_XCFGBASE
5223 CONFIG_SYS_PCIE1_ADDR 5218 CONFIG_SYS_PCIE1_ADDR
5224 CONFIG_SYS_PCIE1_BASE 5219 CONFIG_SYS_PCIE1_BASE
5225 CONFIG_SYS_PCIE1_CFGBASE 5220 CONFIG_SYS_PCIE1_CFGBASE
5226 CONFIG_SYS_PCIE1_CFGMASK 5221 CONFIG_SYS_PCIE1_CFGMASK
5227 CONFIG_SYS_PCIE1_CFG_BASE 5222 CONFIG_SYS_PCIE1_CFG_BASE
5228 CONFIG_SYS_PCIE1_CFG_SIZE 5223 CONFIG_SYS_PCIE1_CFG_SIZE
5229 CONFIG_SYS_PCIE1_IO_BASE 5224 CONFIG_SYS_PCIE1_IO_BASE
5230 CONFIG_SYS_PCIE1_IO_BUS 5225 CONFIG_SYS_PCIE1_IO_BUS
5231 CONFIG_SYS_PCIE1_IO_PHYS 5226 CONFIG_SYS_PCIE1_IO_PHYS
5232 CONFIG_SYS_PCIE1_IO_PHYS_LOW 5227 CONFIG_SYS_PCIE1_IO_PHYS_LOW
5233 CONFIG_SYS_PCIE1_IO_SIZE 5228 CONFIG_SYS_PCIE1_IO_SIZE
5234 CONFIG_SYS_PCIE1_IO_VIRT 5229 CONFIG_SYS_PCIE1_IO_VIRT
5235 CONFIG_SYS_PCIE1_MEMBASE 5230 CONFIG_SYS_PCIE1_MEMBASE
5236 CONFIG_SYS_PCIE1_MEM_BASE 5231 CONFIG_SYS_PCIE1_MEM_BASE
5237 CONFIG_SYS_PCIE1_MEM_BUS 5232 CONFIG_SYS_PCIE1_MEM_BUS
5238 CONFIG_SYS_PCIE1_MEM_PHYS 5233 CONFIG_SYS_PCIE1_MEM_PHYS
5239 CONFIG_SYS_PCIE1_MEM_PHYS_HIGH 5234 CONFIG_SYS_PCIE1_MEM_PHYS_HIGH
5240 CONFIG_SYS_PCIE1_MEM_PHYS_LOW 5235 CONFIG_SYS_PCIE1_MEM_PHYS_LOW
5241 CONFIG_SYS_PCIE1_MEM_SIZE 5236 CONFIG_SYS_PCIE1_MEM_SIZE
5242 CONFIG_SYS_PCIE1_MEM_VIRT 5237 CONFIG_SYS_PCIE1_MEM_VIRT
5243 CONFIG_SYS_PCIE1_NAME 5238 CONFIG_SYS_PCIE1_NAME
5244 CONFIG_SYS_PCIE1_PHYS_ADDR 5239 CONFIG_SYS_PCIE1_PHYS_ADDR
5245 CONFIG_SYS_PCIE1_PHYS_BASE 5240 CONFIG_SYS_PCIE1_PHYS_BASE
5246 CONFIG_SYS_PCIE1_PHYS_SIZE 5241 CONFIG_SYS_PCIE1_PHYS_SIZE
5247 CONFIG_SYS_PCIE1_REGBASE 5242 CONFIG_SYS_PCIE1_REGBASE
5248 CONFIG_SYS_PCIE1_UTLBASE 5243 CONFIG_SYS_PCIE1_UTLBASE
5249 CONFIG_SYS_PCIE1_VIRT_ADDR 5244 CONFIG_SYS_PCIE1_VIRT_ADDR
5250 CONFIG_SYS_PCIE1_XCFGBASE 5245 CONFIG_SYS_PCIE1_XCFGBASE
5251 CONFIG_SYS_PCIE2_ADDR 5246 CONFIG_SYS_PCIE2_ADDR
5252 CONFIG_SYS_PCIE2_BASE 5247 CONFIG_SYS_PCIE2_BASE
5253 CONFIG_SYS_PCIE2_CFGBASE 5248 CONFIG_SYS_PCIE2_CFGBASE
5254 CONFIG_SYS_PCIE2_CFG_BASE 5249 CONFIG_SYS_PCIE2_CFG_BASE
5255 CONFIG_SYS_PCIE2_CFG_SIZE 5250 CONFIG_SYS_PCIE2_CFG_SIZE
5256 CONFIG_SYS_PCIE2_IO_BASE 5251 CONFIG_SYS_PCIE2_IO_BASE
5257 CONFIG_SYS_PCIE2_IO_BUS 5252 CONFIG_SYS_PCIE2_IO_BUS
5258 CONFIG_SYS_PCIE2_IO_PHYS 5253 CONFIG_SYS_PCIE2_IO_PHYS
5259 CONFIG_SYS_PCIE2_IO_PHYS_LOW 5254 CONFIG_SYS_PCIE2_IO_PHYS_LOW
5260 CONFIG_SYS_PCIE2_IO_SIZE 5255 CONFIG_SYS_PCIE2_IO_SIZE
5261 CONFIG_SYS_PCIE2_IO_VIRT 5256 CONFIG_SYS_PCIE2_IO_VIRT
5262 CONFIG_SYS_PCIE2_MEM_BASE 5257 CONFIG_SYS_PCIE2_MEM_BASE
5263 CONFIG_SYS_PCIE2_MEM_BUS 5258 CONFIG_SYS_PCIE2_MEM_BUS
5264 CONFIG_SYS_PCIE2_MEM_PHYS 5259 CONFIG_SYS_PCIE2_MEM_PHYS
5265 CONFIG_SYS_PCIE2_MEM_PHYS_HIGH 5260 CONFIG_SYS_PCIE2_MEM_PHYS_HIGH
5266 CONFIG_SYS_PCIE2_MEM_PHYS_LOW 5261 CONFIG_SYS_PCIE2_MEM_PHYS_LOW
5267 CONFIG_SYS_PCIE2_MEM_SIZE 5262 CONFIG_SYS_PCIE2_MEM_SIZE
5268 CONFIG_SYS_PCIE2_MEM_VIRT 5263 CONFIG_SYS_PCIE2_MEM_VIRT
5269 CONFIG_SYS_PCIE2_NAME 5264 CONFIG_SYS_PCIE2_NAME
5270 CONFIG_SYS_PCIE2_PHYS_ADDR 5265 CONFIG_SYS_PCIE2_PHYS_ADDR
5271 CONFIG_SYS_PCIE2_PHYS_BASE 5266 CONFIG_SYS_PCIE2_PHYS_BASE
5272 CONFIG_SYS_PCIE2_PHYS_SIZE 5267 CONFIG_SYS_PCIE2_PHYS_SIZE
5273 CONFIG_SYS_PCIE2_REGBASE 5268 CONFIG_SYS_PCIE2_REGBASE
5274 CONFIG_SYS_PCIE2_VIRT_ADDR 5269 CONFIG_SYS_PCIE2_VIRT_ADDR
5275 CONFIG_SYS_PCIE2_XCFGBASE 5270 CONFIG_SYS_PCIE2_XCFGBASE
5276 CONFIG_SYS_PCIE3_ADDR 5271 CONFIG_SYS_PCIE3_ADDR
5277 CONFIG_SYS_PCIE3_IO_BUS 5272 CONFIG_SYS_PCIE3_IO_BUS
5278 CONFIG_SYS_PCIE3_IO_PHYS 5273 CONFIG_SYS_PCIE3_IO_PHYS
5279 CONFIG_SYS_PCIE3_IO_SIZE 5274 CONFIG_SYS_PCIE3_IO_SIZE
5280 CONFIG_SYS_PCIE3_IO_VIRT 5275 CONFIG_SYS_PCIE3_IO_VIRT
5281 CONFIG_SYS_PCIE3_MEM_BUS 5276 CONFIG_SYS_PCIE3_MEM_BUS
5282 CONFIG_SYS_PCIE3_MEM_BUS2 5277 CONFIG_SYS_PCIE3_MEM_BUS2
5283 CONFIG_SYS_PCIE3_MEM_PHYS 5278 CONFIG_SYS_PCIE3_MEM_PHYS
5284 CONFIG_SYS_PCIE3_MEM_PHYS2 5279 CONFIG_SYS_PCIE3_MEM_PHYS2
5285 CONFIG_SYS_PCIE3_MEM_SIZE 5280 CONFIG_SYS_PCIE3_MEM_SIZE
5286 CONFIG_SYS_PCIE3_MEM_SIZE2 5281 CONFIG_SYS_PCIE3_MEM_SIZE2
5287 CONFIG_SYS_PCIE3_MEM_VIRT 5282 CONFIG_SYS_PCIE3_MEM_VIRT
5288 CONFIG_SYS_PCIE3_MEM_VIRT2 5283 CONFIG_SYS_PCIE3_MEM_VIRT2
5289 CONFIG_SYS_PCIE3_NAME 5284 CONFIG_SYS_PCIE3_NAME
5290 CONFIG_SYS_PCIE3_PHYS_ADDR 5285 CONFIG_SYS_PCIE3_PHYS_ADDR
5291 CONFIG_SYS_PCIE3_PHYS_SIZE 5286 CONFIG_SYS_PCIE3_PHYS_SIZE
5292 CONFIG_SYS_PCIE4_ADDR 5287 CONFIG_SYS_PCIE4_ADDR
5293 CONFIG_SYS_PCIE4_IO_BUS 5288 CONFIG_SYS_PCIE4_IO_BUS
5294 CONFIG_SYS_PCIE4_IO_PHYS 5289 CONFIG_SYS_PCIE4_IO_PHYS
5295 CONFIG_SYS_PCIE4_IO_SIZE 5290 CONFIG_SYS_PCIE4_IO_SIZE
5296 CONFIG_SYS_PCIE4_IO_VIRT 5291 CONFIG_SYS_PCIE4_IO_VIRT
5297 CONFIG_SYS_PCIE4_MEM_BUS 5292 CONFIG_SYS_PCIE4_MEM_BUS
5298 CONFIG_SYS_PCIE4_MEM_PHYS 5293 CONFIG_SYS_PCIE4_MEM_PHYS
5299 CONFIG_SYS_PCIE4_MEM_SIZE 5294 CONFIG_SYS_PCIE4_MEM_SIZE
5300 CONFIG_SYS_PCIE4_MEM_VIRT 5295 CONFIG_SYS_PCIE4_MEM_VIRT
5301 CONFIG_SYS_PCIE4_NAME 5296 CONFIG_SYS_PCIE4_NAME
5302 CONFIG_SYS_PCIE4_PHYS_ADDR 5297 CONFIG_SYS_PCIE4_PHYS_ADDR
5303 CONFIG_SYS_PCIE4_PHYS_SIZE 5298 CONFIG_SYS_PCIE4_PHYS_SIZE
5304 CONFIG_SYS_PCIE_ADDR_HIGH 5299 CONFIG_SYS_PCIE_ADDR_HIGH
5305 CONFIG_SYS_PCIE_BASE 5300 CONFIG_SYS_PCIE_BASE
5306 CONFIG_SYS_PCIE_INBOUND_BASE 5301 CONFIG_SYS_PCIE_INBOUND_BASE
5307 CONFIG_SYS_PCIE_MEMBASE 5302 CONFIG_SYS_PCIE_MEMBASE
5308 CONFIG_SYS_PCIE_MEMSIZE 5303 CONFIG_SYS_PCIE_MEMSIZE
5309 CONFIG_SYS_PCIE_MMAP_SIZE 5304 CONFIG_SYS_PCIE_MMAP_SIZE
5310 CONFIG_SYS_PCIE_NR_PORTS 5305 CONFIG_SYS_PCIE_NR_PORTS
5311 CONFIG_SYS_PCIE_PHYS 5306 CONFIG_SYS_PCIE_PHYS
5312 CONFIG_SYS_PCIE_VIRT 5307 CONFIG_SYS_PCIE_VIRT
5313 CONFIG_SYS_PCIMSK0_MASK 5308 CONFIG_SYS_PCIMSK0_MASK
5314 CONFIG_SYS_PCIMSK1_MASK 5309 CONFIG_SYS_PCIMSK1_MASK
5315 CONFIG_SYS_PCISPEED_66 5310 CONFIG_SYS_PCISPEED_66
5316 CONFIG_SYS_PCI_64BIT 5311 CONFIG_SYS_PCI_64BIT
5317 CONFIG_SYS_PCI_BAR0 5312 CONFIG_SYS_PCI_BAR0
5318 CONFIG_SYS_PCI_BAR1 5313 CONFIG_SYS_PCI_BAR1
5319 CONFIG_SYS_PCI_BAR2 5314 CONFIG_SYS_PCI_BAR2
5320 CONFIG_SYS_PCI_BAR3 5315 CONFIG_SYS_PCI_BAR3
5321 CONFIG_SYS_PCI_BAR4 5316 CONFIG_SYS_PCI_BAR4
5322 CONFIG_SYS_PCI_BAR5 5317 CONFIG_SYS_PCI_BAR5
5323 CONFIG_SYS_PCI_BASE 5318 CONFIG_SYS_PCI_BASE
5324 CONFIG_SYS_PCI_BOARD_FIXUP_IRQ 5319 CONFIG_SYS_PCI_BOARD_FIXUP_IRQ
5325 CONFIG_SYS_PCI_CACHE_LINE_SIZE 5320 CONFIG_SYS_PCI_CACHE_LINE_SIZE
5326 CONFIG_SYS_PCI_CFG_BASE 5321 CONFIG_SYS_PCI_CFG_BASE
5327 CONFIG_SYS_PCI_CFG_BUS 5322 CONFIG_SYS_PCI_CFG_BUS
5328 CONFIG_SYS_PCI_CFG_PHYS 5323 CONFIG_SYS_PCI_CFG_PHYS
5329 CONFIG_SYS_PCI_CFG_SIZE 5324 CONFIG_SYS_PCI_CFG_SIZE
5330 CONFIG_SYS_PCI_CLASSCODE 5325 CONFIG_SYS_PCI_CLASSCODE
5331 CONFIG_SYS_PCI_CLASSCODE_MONARCH 5326 CONFIG_SYS_PCI_CLASSCODE_MONARCH
5332 CONFIG_SYS_PCI_CLASSCODE_NONMONARCH 5327 CONFIG_SYS_PCI_CLASSCODE_NONMONARCH
5333 CONFIG_SYS_PCI_CON_DEVICE 5328 CONFIG_SYS_PCI_CON_DEVICE
5334 CONFIG_SYS_PCI_EP_MEMORY_BASE 5329 CONFIG_SYS_PCI_EP_MEMORY_BASE
5335 CONFIG_SYS_PCI_FORCE_PCI_CONV 5330 CONFIG_SYS_PCI_FORCE_PCI_CONV
5336 CONFIG_SYS_PCI_IO_BASE 5331 CONFIG_SYS_PCI_IO_BASE
5337 CONFIG_SYS_PCI_IO_BUS 5332 CONFIG_SYS_PCI_IO_BUS
5338 CONFIG_SYS_PCI_IO_PHYS 5333 CONFIG_SYS_PCI_IO_PHYS
5339 CONFIG_SYS_PCI_IO_SIZE 5334 CONFIG_SYS_PCI_IO_SIZE
5340 CONFIG_SYS_PCI_MAP_END 5335 CONFIG_SYS_PCI_MAP_END
5341 CONFIG_SYS_PCI_MAP_START 5336 CONFIG_SYS_PCI_MAP_START
5342 CONFIG_SYS_PCI_MASTER_INIT 5337 CONFIG_SYS_PCI_MASTER_INIT
5343 CONFIG_SYS_PCI_MEMBASE 5338 CONFIG_SYS_PCI_MEMBASE
5344 CONFIG_SYS_PCI_MEMBASE1 5339 CONFIG_SYS_PCI_MEMBASE1
5345 CONFIG_SYS_PCI_MEMBASE2 5340 CONFIG_SYS_PCI_MEMBASE2
5346 CONFIG_SYS_PCI_MEMBASE3 5341 CONFIG_SYS_PCI_MEMBASE3
5347 CONFIG_SYS_PCI_MEMORY_BUS 5342 CONFIG_SYS_PCI_MEMORY_BUS
5348 CONFIG_SYS_PCI_MEMORY_PHYS 5343 CONFIG_SYS_PCI_MEMORY_PHYS
5349 CONFIG_SYS_PCI_MEMORY_SIZE 5344 CONFIG_SYS_PCI_MEMORY_SIZE
5350 CONFIG_SYS_PCI_MEMSIZE 5345 CONFIG_SYS_PCI_MEMSIZE
5351 CONFIG_SYS_PCI_MEM_BASE 5346 CONFIG_SYS_PCI_MEM_BASE
5352 CONFIG_SYS_PCI_MEM_BUS 5347 CONFIG_SYS_PCI_MEM_BUS
5353 CONFIG_SYS_PCI_MEM_PHYS 5348 CONFIG_SYS_PCI_MEM_PHYS
5354 CONFIG_SYS_PCI_MEM_SIZE 5349 CONFIG_SYS_PCI_MEM_SIZE
5355 CONFIG_SYS_PCI_MMIO_BASE 5350 CONFIG_SYS_PCI_MMIO_BASE
5356 CONFIG_SYS_PCI_MMIO_PHYS 5351 CONFIG_SYS_PCI_MMIO_PHYS
5357 CONFIG_SYS_PCI_MMIO_SIZE 5352 CONFIG_SYS_PCI_MMIO_SIZE
5358 CONFIG_SYS_PCI_MSTR0_LOCAL 5353 CONFIG_SYS_PCI_MSTR0_LOCAL
5359 CONFIG_SYS_PCI_MSTR1_LOCAL 5354 CONFIG_SYS_PCI_MSTR1_LOCAL
5360 CONFIG_SYS_PCI_MSTR_IO_BUS 5355 CONFIG_SYS_PCI_MSTR_IO_BUS
5361 CONFIG_SYS_PCI_MSTR_IO_LOCAL 5356 CONFIG_SYS_PCI_MSTR_IO_LOCAL
5362 CONFIG_SYS_PCI_MSTR_IO_SIZE 5357 CONFIG_SYS_PCI_MSTR_IO_SIZE
5363 CONFIG_SYS_PCI_MSTR_MEMIO_BUS 5358 CONFIG_SYS_PCI_MSTR_MEMIO_BUS
5364 CONFIG_SYS_PCI_MSTR_MEMIO_LOCAL 5359 CONFIG_SYS_PCI_MSTR_MEMIO_LOCAL
5365 CONFIG_SYS_PCI_MSTR_MEMIO_SIZE 5360 CONFIG_SYS_PCI_MSTR_MEMIO_SIZE
5366 CONFIG_SYS_PCI_MSTR_MEM_BUS 5361 CONFIG_SYS_PCI_MSTR_MEM_BUS
5367 CONFIG_SYS_PCI_MSTR_MEM_LOCAL 5362 CONFIG_SYS_PCI_MSTR_MEM_LOCAL
5368 CONFIG_SYS_PCI_MSTR_MEM_SIZE 5363 CONFIG_SYS_PCI_MSTR_MEM_SIZE
5369 CONFIG_SYS_PCI_NR_INBOUND_WIN 5364 CONFIG_SYS_PCI_NR_INBOUND_WIN
5370 CONFIG_SYS_PCI_PHYS 5365 CONFIG_SYS_PCI_PHYS
5371 CONFIG_SYS_PCI_PTM1LA 5366 CONFIG_SYS_PCI_PTM1LA
5372 CONFIG_SYS_PCI_PTM1MS 5367 CONFIG_SYS_PCI_PTM1MS
5373 CONFIG_SYS_PCI_PTM1PCI 5368 CONFIG_SYS_PCI_PTM1PCI
5374 CONFIG_SYS_PCI_PTM2LA 5369 CONFIG_SYS_PCI_PTM2LA
5375 CONFIG_SYS_PCI_PTM2MS 5370 CONFIG_SYS_PCI_PTM2MS
5376 CONFIG_SYS_PCI_PTM2PCI 5371 CONFIG_SYS_PCI_PTM2PCI
5377 CONFIG_SYS_PCI_SLV_MEM_BUS 5372 CONFIG_SYS_PCI_SLV_MEM_BUS
5378 CONFIG_SYS_PCI_SLV_MEM_LOCAL 5373 CONFIG_SYS_PCI_SLV_MEM_LOCAL
5379 CONFIG_SYS_PCI_SLV_MEM_SIZE 5374 CONFIG_SYS_PCI_SLV_MEM_SIZE
5380 CONFIG_SYS_PCI_SUBSYS_DEVICEID 5375 CONFIG_SYS_PCI_SUBSYS_DEVICEID
5381 CONFIG_SYS_PCI_SUBSYS_DEVICEID2 5376 CONFIG_SYS_PCI_SUBSYS_DEVICEID2
5382 CONFIG_SYS_PCI_SUBSYS_ID 5377 CONFIG_SYS_PCI_SUBSYS_ID
5383 CONFIG_SYS_PCI_SUBSYS_ID_MONARCH 5378 CONFIG_SYS_PCI_SUBSYS_ID_MONARCH
5384 CONFIG_SYS_PCI_SUBSYS_ID_NONMONARCH 5379 CONFIG_SYS_PCI_SUBSYS_ID_NONMONARCH
5385 CONFIG_SYS_PCI_SUBSYS_VENDORID 5380 CONFIG_SYS_PCI_SUBSYS_VENDORID
5386 CONFIG_SYS_PCI_SYS_MEM_BUS 5381 CONFIG_SYS_PCI_SYS_MEM_BUS
5387 CONFIG_SYS_PCI_SYS_MEM_PHYS 5382 CONFIG_SYS_PCI_SYS_MEM_PHYS
5388 CONFIG_SYS_PCI_SYS_MEM_SIZE 5383 CONFIG_SYS_PCI_SYS_MEM_SIZE
5389 CONFIG_SYS_PCI_TARGBASE 5384 CONFIG_SYS_PCI_TARGBASE
5390 CONFIG_SYS_PCI_TARGET_INIT 5385 CONFIG_SYS_PCI_TARGET_INIT
5391 CONFIG_SYS_PCI_TBATR0 5386 CONFIG_SYS_PCI_TBATR0
5392 CONFIG_SYS_PCI_TBATR1 5387 CONFIG_SYS_PCI_TBATR1
5393 CONFIG_SYS_PCI_TBATR2 5388 CONFIG_SYS_PCI_TBATR2
5394 CONFIG_SYS_PCI_TBATR3 5389 CONFIG_SYS_PCI_TBATR3
5395 CONFIG_SYS_PCI_TBATR4 5390 CONFIG_SYS_PCI_TBATR4
5396 CONFIG_SYS_PCI_TBATR5 5391 CONFIG_SYS_PCI_TBATR5
5397 CONFIG_SYS_PCI_VIRT 5392 CONFIG_SYS_PCI_VIRT
5398 CONFIG_SYS_PCMCIA_ATTRB_ADDR 5393 CONFIG_SYS_PCMCIA_ATTRB_ADDR
5399 CONFIG_SYS_PCMCIA_ATTRB_SIZE 5394 CONFIG_SYS_PCMCIA_ATTRB_SIZE
5400 CONFIG_SYS_PCMCIA_ATTR_BASE 5395 CONFIG_SYS_PCMCIA_ATTR_BASE
5401 CONFIG_SYS_PCMCIA_CIS_WIN 5396 CONFIG_SYS_PCMCIA_CIS_WIN
5402 CONFIG_SYS_PCMCIA_CIS_WIN_SIZE 5397 CONFIG_SYS_PCMCIA_CIS_WIN_SIZE
5403 CONFIG_SYS_PCMCIA_DMA_ADDR 5398 CONFIG_SYS_PCMCIA_DMA_ADDR
5404 CONFIG_SYS_PCMCIA_DMA_SIZE 5399 CONFIG_SYS_PCMCIA_DMA_SIZE
5405 CONFIG_SYS_PCMCIA_IO_ADDR 5400 CONFIG_SYS_PCMCIA_IO_ADDR
5406 CONFIG_SYS_PCMCIA_IO_BASE 5401 CONFIG_SYS_PCMCIA_IO_BASE
5407 CONFIG_SYS_PCMCIA_IO_SIZE 5402 CONFIG_SYS_PCMCIA_IO_SIZE
5408 CONFIG_SYS_PCMCIA_IO_WIN 5403 CONFIG_SYS_PCMCIA_IO_WIN
5409 CONFIG_SYS_PCMCIA_IO_WIN_SIZE 5404 CONFIG_SYS_PCMCIA_IO_WIN_SIZE
5410 CONFIG_SYS_PCMCIA_MEM_ADDR 5405 CONFIG_SYS_PCMCIA_MEM_ADDR
5411 CONFIG_SYS_PCMCIA_MEM_SIZE 5406 CONFIG_SYS_PCMCIA_MEM_SIZE
5412 CONFIG_SYS_PCMCIA_PBR0 5407 CONFIG_SYS_PCMCIA_PBR0
5413 CONFIG_SYS_PCMCIA_PBR1 5408 CONFIG_SYS_PCMCIA_PBR1
5414 CONFIG_SYS_PCMCIA_PBR2 5409 CONFIG_SYS_PCMCIA_PBR2
5415 CONFIG_SYS_PCMCIA_PBR3 5410 CONFIG_SYS_PCMCIA_PBR3
5416 CONFIG_SYS_PCMCIA_PBR4 5411 CONFIG_SYS_PCMCIA_PBR4
5417 CONFIG_SYS_PCMCIA_PBR5 5412 CONFIG_SYS_PCMCIA_PBR5
5418 CONFIG_SYS_PCMCIA_PBR6 5413 CONFIG_SYS_PCMCIA_PBR6
5419 CONFIG_SYS_PCMCIA_PBR7 5414 CONFIG_SYS_PCMCIA_PBR7
5420 CONFIG_SYS_PCMCIA_POR0 5415 CONFIG_SYS_PCMCIA_POR0
5421 CONFIG_SYS_PCMCIA_POR1 5416 CONFIG_SYS_PCMCIA_POR1
5422 CONFIG_SYS_PCMCIA_POR2 5417 CONFIG_SYS_PCMCIA_POR2
5423 CONFIG_SYS_PCMCIA_POR3 5418 CONFIG_SYS_PCMCIA_POR3
5424 CONFIG_SYS_PCMCIA_POR4 5419 CONFIG_SYS_PCMCIA_POR4
5425 CONFIG_SYS_PCMCIA_POR5 5420 CONFIG_SYS_PCMCIA_POR5
5426 CONFIG_SYS_PCMCIA_POR6 5421 CONFIG_SYS_PCMCIA_POR6
5427 CONFIG_SYS_PCMCIA_POR7 5422 CONFIG_SYS_PCMCIA_POR7
5428 CONFIG_SYS_PCMCIA_TIMING 5423 CONFIG_SYS_PCMCIA_TIMING
5429 CONFIG_SYS_PDCNT 5424 CONFIG_SYS_PDCNT
5430 CONFIG_SYS_PDM360NG_COPROC_BAUDRATE 5425 CONFIG_SYS_PDM360NG_COPROC_BAUDRATE
5431 CONFIG_SYS_PDM360NG_COPROC_READ_DELAY 5426 CONFIG_SYS_PDM360NG_COPROC_READ_DELAY
5432 CONFIG_SYS_PEHLPAR 5427 CONFIG_SYS_PEHLPAR
5433 CONFIG_SYS_PEPAR 5428 CONFIG_SYS_PEPAR
5434 CONFIG_SYS_PERIPHERAL_BASE 5429 CONFIG_SYS_PERIPHERAL_BASE
5435 CONFIG_SYS_PFC0 5430 CONFIG_SYS_PFC0
5436 CONFIG_SYS_PFPAR 5431 CONFIG_SYS_PFPAR
5437 CONFIG_SYS_PHYS_ADDR_HIGH 5432 CONFIG_SYS_PHYS_ADDR_HIGH
5438 CONFIG_SYS_PHY_UBOOT_BASE 5433 CONFIG_SYS_PHY_UBOOT_BASE
5439 CONFIG_SYS_PIB_BASE 5434 CONFIG_SYS_PIB_BASE
5440 CONFIG_SYS_PIB_WINDOW_SIZE 5435 CONFIG_SYS_PIB_WINDOW_SIZE
5441 CONFIG_SYS_PICMR0_MASK_ATTRIB 5436 CONFIG_SYS_PICMR0_MASK_ATTRIB
5442 CONFIG_SYS_PIOC_ASR_VAL 5437 CONFIG_SYS_PIOC_ASR_VAL
5443 CONFIG_SYS_PIOC_BSR_VAL 5438 CONFIG_SYS_PIOC_BSR_VAL
5444 CONFIG_SYS_PIOC_PDR_VAL 5439 CONFIG_SYS_PIOC_PDR_VAL
5445 CONFIG_SYS_PIOC_PDR_VAL1 5440 CONFIG_SYS_PIOC_PDR_VAL1
5446 CONFIG_SYS_PIOC_PPUDR_VAL 5441 CONFIG_SYS_PIOC_PPUDR_VAL
5447 CONFIG_SYS_PIOD_PDR_VAL1 5442 CONFIG_SYS_PIOD_PDR_VAL1
5448 CONFIG_SYS_PIOD_PPUDR_VAL 5443 CONFIG_SYS_PIOD_PPUDR_VAL
5449 CONFIG_SYS_PIO_MODE 5444 CONFIG_SYS_PIO_MODE
5450 CONFIG_SYS_PISCR 5445 CONFIG_SYS_PISCR
5451 CONFIG_SYS_PIT_BASE 5446 CONFIG_SYS_PIT_BASE
5452 CONFIG_SYS_PIT_PRESCALE 5447 CONFIG_SYS_PIT_PRESCALE
5453 CONFIG_SYS_PIXIS_VBOOT_ENABLE 5448 CONFIG_SYS_PIXIS_VBOOT_ENABLE
5454 CONFIG_SYS_PIXIS_VBOOT_MASK 5449 CONFIG_SYS_PIXIS_VBOOT_MASK
5455 CONFIG_SYS_PIXIS_VCFGEN0_ENABLE 5450 CONFIG_SYS_PIXIS_VCFGEN0_ENABLE
5456 CONFIG_SYS_PJPAR 5451 CONFIG_SYS_PJPAR
5457 CONFIG_SYS_PL310_BASE 5452 CONFIG_SYS_PL310_BASE
5458 CONFIG_SYS_PLATFORM_SRAM_BASE 5453 CONFIG_SYS_PLATFORM_SRAM_BASE
5459 CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS 5454 CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS
5460 CONFIG_SYS_PLATFORM_SRAM_SIZE 5455 CONFIG_SYS_PLATFORM_SRAM_SIZE
5461 CONFIG_SYS_PLL0_DIV 5456 CONFIG_SYS_PLL0_DIV
5462 CONFIG_SYS_PLL0_MUL 5457 CONFIG_SYS_PLL0_MUL
5463 CONFIG_SYS_PLL0_OPT 5458 CONFIG_SYS_PLL0_OPT
5464 CONFIG_SYS_PLL0_SUPPRESS_CYCLES 5459 CONFIG_SYS_PLL0_SUPPRESS_CYCLES
5465 CONFIG_SYS_PLLAR_VAL 5460 CONFIG_SYS_PLLAR_VAL
5466 CONFIG_SYS_PLLBR_VAL 5461 CONFIG_SYS_PLLBR_VAL
5467 CONFIG_SYS_PLLCR 5462 CONFIG_SYS_PLLCR
5468 CONFIG_SYS_PLL_BYPASS 5463 CONFIG_SYS_PLL_BYPASS
5469 CONFIG_SYS_PLL_FDR 5464 CONFIG_SYS_PLL_FDR
5470 CONFIG_SYS_PLL_ODR 5465 CONFIG_SYS_PLL_ODR
5471 CONFIG_SYS_PLL_RECONFIG 5466 CONFIG_SYS_PLL_RECONFIG
5472 CONFIG_SYS_PLL_SETTLING_TIME 5467 CONFIG_SYS_PLL_SETTLING_TIME
5473 CONFIG_SYS_PLPRCR 5468 CONFIG_SYS_PLPRCR
5474 CONFIG_SYS_PLUG_BASE 5469 CONFIG_SYS_PLUG_BASE
5475 CONFIG_SYS_PMAN 5470 CONFIG_SYS_PMAN
5476 CONFIG_SYS_PMC_BASE 5471 CONFIG_SYS_PMC_BASE
5477 CONFIG_SYS_PMC_BASE_PHYS 5472 CONFIG_SYS_PMC_BASE_PHYS
5478 CONFIG_SYS_PME_CLK 5473 CONFIG_SYS_PME_CLK
5479 CONFIG_SYS_POCMR0_MASK_ATTRIB 5474 CONFIG_SYS_POCMR0_MASK_ATTRIB
5480 CONFIG_SYS_POCMR1_MASK_ATTRIB 5475 CONFIG_SYS_POCMR1_MASK_ATTRIB
5481 CONFIG_SYS_POCMR2_MASK_ATTRIB 5476 CONFIG_SYS_POCMR2_MASK_ATTRIB
5482 CONFIG_SYS_PORTTC 5477 CONFIG_SYS_PORTTC
5483 CONFIG_SYS_POST_BSPEC1 5478 CONFIG_SYS_POST_BSPEC1
5484 CONFIG_SYS_POST_BSPEC2 5479 CONFIG_SYS_POST_BSPEC2
5485 CONFIG_SYS_POST_BSPEC3 5480 CONFIG_SYS_POST_BSPEC3
5486 CONFIG_SYS_POST_BSPEC4 5481 CONFIG_SYS_POST_BSPEC4
5487 CONFIG_SYS_POST_BSPEC5 5482 CONFIG_SYS_POST_BSPEC5
5488 CONFIG_SYS_POST_CACHE 5483 CONFIG_SYS_POST_CACHE
5489 CONFIG_SYS_POST_CACHE_ADDR 5484 CONFIG_SYS_POST_CACHE_ADDR
5490 CONFIG_SYS_POST_CODEC 5485 CONFIG_SYS_POST_CODEC
5491 CONFIG_SYS_POST_COPROC 5486 CONFIG_SYS_POST_COPROC
5492 CONFIG_SYS_POST_CPU 5487 CONFIG_SYS_POST_CPU
5493 CONFIG_SYS_POST_DSP 5488 CONFIG_SYS_POST_DSP
5494 CONFIG_SYS_POST_ECC 5489 CONFIG_SYS_POST_ECC
5495 CONFIG_SYS_POST_ETHER 5490 CONFIG_SYS_POST_ETHER
5496 CONFIG_SYS_POST_ETHER_EXT_LOOPBACK 5491 CONFIG_SYS_POST_ETHER_EXT_LOOPBACK
5497 CONFIG_SYS_POST_ETH_LOOPS 5492 CONFIG_SYS_POST_ETH_LOOPS
5498 CONFIG_SYS_POST_FLASH 5493 CONFIG_SYS_POST_FLASH
5499 CONFIG_SYS_POST_FLASH_END 5494 CONFIG_SYS_POST_FLASH_END
5500 CONFIG_SYS_POST_FLASH_NUM 5495 CONFIG_SYS_POST_FLASH_NUM
5501 CONFIG_SYS_POST_FLASH_START 5496 CONFIG_SYS_POST_FLASH_START
5502 CONFIG_SYS_POST_FPU 5497 CONFIG_SYS_POST_FPU
5503 CONFIG_SYS_POST_FPU_ON 5498 CONFIG_SYS_POST_FPU_ON
5504 CONFIG_SYS_POST_HOTKEYS_GPIO 5499 CONFIG_SYS_POST_HOTKEYS_GPIO
5505 CONFIG_SYS_POST_I2C 5500 CONFIG_SYS_POST_I2C
5506 CONFIG_SYS_POST_I2C_ADDRS 5501 CONFIG_SYS_POST_I2C_ADDRS
5507 CONFIG_SYS_POST_I2C_IGNORES 5502 CONFIG_SYS_POST_I2C_IGNORES
5508 CONFIG_SYS_POST_MEMORY 5503 CONFIG_SYS_POST_MEMORY
5509 CONFIG_SYS_POST_MEMORY_ON 5504 CONFIG_SYS_POST_MEMORY_ON
5510 CONFIG_SYS_POST_MEM_REGIONS 5505 CONFIG_SYS_POST_MEM_REGIONS
5511 CONFIG_SYS_POST_OCM 5506 CONFIG_SYS_POST_OCM
5512 CONFIG_SYS_POST_PREREL 5507 CONFIG_SYS_POST_PREREL
5513 CONFIG_SYS_POST_RTC 5508 CONFIG_SYS_POST_RTC
5514 CONFIG_SYS_POST_SPI 5509 CONFIG_SYS_POST_SPI
5515 CONFIG_SYS_POST_SPR 5510 CONFIG_SYS_POST_SPR
5516 CONFIG_SYS_POST_SYSMON 5511 CONFIG_SYS_POST_SYSMON
5517 CONFIG_SYS_POST_UART 5512 CONFIG_SYS_POST_UART
5518 CONFIG_SYS_POST_UART_TABLE 5513 CONFIG_SYS_POST_UART_TABLE
5519 CONFIG_SYS_POST_USB 5514 CONFIG_SYS_POST_USB
5520 CONFIG_SYS_POST_WATCHDOG 5515 CONFIG_SYS_POST_WATCHDOG
5521 CONFIG_SYS_POST_WORD_ADDR 5516 CONFIG_SYS_POST_WORD_ADDR
5522 CONFIG_SYS_POWER_MANAGER 5517 CONFIG_SYS_POWER_MANAGER
5523 CONFIG_SYS_PPC4XX_USB_ADDR 5518 CONFIG_SYS_PPC4XX_USB_ADDR
5524 CONFIG_SYS_PPC_DDR_WIMGE 5519 CONFIG_SYS_PPC_DDR_WIMGE
5525 CONFIG_SYS_PQSPAR 5520 CONFIG_SYS_PQSPAR
5526 CONFIG_SYS_PRELIM_OR_AM 5521 CONFIG_SYS_PRELIM_OR_AM
5527 CONFIG_SYS_PROMPT_HUSH_PS2 5522 CONFIG_SYS_PROMPT_HUSH_PS2
5528 CONFIG_SYS_PSC1 5523 CONFIG_SYS_PSC1
5529 CONFIG_SYS_PSC3 5524 CONFIG_SYS_PSC3
5530 CONFIG_SYS_PSC4 5525 CONFIG_SYS_PSC4
5531 CONFIG_SYS_PSC6 5526 CONFIG_SYS_PSC6
5532 CONFIG_SYS_PSDMR 5527 CONFIG_SYS_PSDMR
5533 CONFIG_SYS_PSDPAR 5528 CONFIG_SYS_PSDPAR
5534 CONFIG_SYS_PSRT 5529 CONFIG_SYS_PSRT
5535 CONFIG_SYS_PSSR_VAL 5530 CONFIG_SYS_PSSR_VAL
5536 CONFIG_SYS_PTA_PER_CLK 5531 CONFIG_SYS_PTA_PER_CLK
5537 CONFIG_SYS_PTCPAR 5532 CONFIG_SYS_PTCPAR
5538 CONFIG_SYS_PTDPAR 5533 CONFIG_SYS_PTDPAR
5539 CONFIG_SYS_PTL2_BITS 5534 CONFIG_SYS_PTL2_BITS
5540 CONFIG_SYS_PTV 5535 CONFIG_SYS_PTV
5541 CONFIG_SYS_PUAPAR 5536 CONFIG_SYS_PUAPAR
5542 CONFIG_SYS_QE_FMAN_FW_IN_MMC 5537 CONFIG_SYS_QE_FMAN_FW_IN_MMC
5543 CONFIG_SYS_QE_FMAN_FW_IN_NAND 5538 CONFIG_SYS_QE_FMAN_FW_IN_NAND
5544 CONFIG_SYS_QE_FMAN_FW_IN_NOR 5539 CONFIG_SYS_QE_FMAN_FW_IN_NOR
5545 CONFIG_SYS_QE_FMAN_FW_IN_REMOTE 5540 CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
5546 CONFIG_SYS_QE_FMAN_FW_LENGTH 5541 CONFIG_SYS_QE_FMAN_FW_LENGTH
5547 CONFIG_SYS_QE_FW_ADDR 5542 CONFIG_SYS_QE_FW_ADDR
5548 CONFIG_SYS_QE_FW_IN_SPIFLASH 5543 CONFIG_SYS_QE_FW_IN_SPIFLASH
5549 CONFIG_SYS_QMAN_CENA_BASE 5544 CONFIG_SYS_QMAN_CENA_BASE
5550 CONFIG_SYS_QMAN_CENA_SIZE 5545 CONFIG_SYS_QMAN_CENA_SIZE
5551 CONFIG_SYS_QMAN_CINH_BASE 5546 CONFIG_SYS_QMAN_CINH_BASE
5552 CONFIG_SYS_QMAN_CINH_SIZE 5547 CONFIG_SYS_QMAN_CINH_SIZE
5553 CONFIG_SYS_QMAN_MEM_BASE 5548 CONFIG_SYS_QMAN_MEM_BASE
5554 CONFIG_SYS_QMAN_MEM_PHYS 5549 CONFIG_SYS_QMAN_MEM_PHYS
5555 CONFIG_SYS_QMAN_MEM_SIZE 5550 CONFIG_SYS_QMAN_MEM_SIZE
5556 CONFIG_SYS_QMAN_NUM_PORTALS 5551 CONFIG_SYS_QMAN_NUM_PORTALS
5557 CONFIG_SYS_QMAN_SP_CENA_SIZE 5552 CONFIG_SYS_QMAN_SP_CENA_SIZE
5558 CONFIG_SYS_QMAN_SP_CINH_SIZE 5553 CONFIG_SYS_QMAN_SP_CINH_SIZE
5559 CONFIG_SYS_QMAN_SWP_ISDR_REG 5554 CONFIG_SYS_QMAN_SWP_ISDR_REG
5560 CONFIG_SYS_QRIO_BASE 5555 CONFIG_SYS_QRIO_BASE
5561 CONFIG_SYS_QRIO_BASE_PHYS 5556 CONFIG_SYS_QRIO_BASE_PHYS
5562 CONFIG_SYS_QRIO_BR_PRELIM 5557 CONFIG_SYS_QRIO_BR_PRELIM
5563 CONFIG_SYS_QRIO_OR_PRELIM 5558 CONFIG_SYS_QRIO_OR_PRELIM
5564 CONFIG_SYS_R7780MP_OLD_FLASH 5559 CONFIG_SYS_R7780MP_OLD_FLASH
5565 CONFIG_SYS_RAMBOOT 5560 CONFIG_SYS_RAMBOOT
5566 CONFIG_SYS_RAM_BASE 5561 CONFIG_SYS_RAM_BASE
5567 CONFIG_SYS_RAM_CS 5562 CONFIG_SYS_RAM_CS
5568 CONFIG_SYS_RAM_FREQ_DIV 5563 CONFIG_SYS_RAM_FREQ_DIV
5569 CONFIG_SYS_RAM_SIZE 5564 CONFIG_SYS_RAM_SIZE
5570 CONFIG_SYS_RCAR_I2C0_BASE 5565 CONFIG_SYS_RCAR_I2C0_BASE
5571 CONFIG_SYS_RCAR_I2C0_SPEED 5566 CONFIG_SYS_RCAR_I2C0_SPEED
5572 CONFIG_SYS_RCAR_I2C1_BASE 5567 CONFIG_SYS_RCAR_I2C1_BASE
5573 CONFIG_SYS_RCAR_I2C1_SPEED 5568 CONFIG_SYS_RCAR_I2C1_SPEED
5574 CONFIG_SYS_RCAR_I2C2_BASE 5569 CONFIG_SYS_RCAR_I2C2_BASE
5575 CONFIG_SYS_RCAR_I2C2_SPEED 5570 CONFIG_SYS_RCAR_I2C2_SPEED
5576 CONFIG_SYS_RCAR_I2C3_BASE 5571 CONFIG_SYS_RCAR_I2C3_BASE
5577 CONFIG_SYS_RCAR_I2C3_SPEED 5572 CONFIG_SYS_RCAR_I2C3_SPEED
5578 CONFIG_SYS_RCCR 5573 CONFIG_SYS_RCCR
5579 CONFIG_SYS_RCWH_PCIHOST 5574 CONFIG_SYS_RCWH_PCIHOST
5580 CONFIG_SYS_READ_SPD 5575 CONFIG_SYS_READ_SPD
5581 CONFIG_SYS_REDUNDAND_ENVIRONMENT 5576 CONFIG_SYS_REDUNDAND_ENVIRONMENT
5582 CONFIG_SYS_REMAP_OR_AM 5577 CONFIG_SYS_REMAP_OR_AM
5583 CONFIG_SYS_RESET_ADDR 5578 CONFIG_SYS_RESET_ADDR
5584 CONFIG_SYS_RESET_ADDRESS 5579 CONFIG_SYS_RESET_ADDRESS
5585 CONFIG_SYS_RESET_BASE 5580 CONFIG_SYS_RESET_BASE
5586 CONFIG_SYS_RESET_SCTRL 5581 CONFIG_SYS_RESET_SCTRL
5587 CONFIG_SYS_RFD 5582 CONFIG_SYS_RFD
5588 CONFIG_SYS_RGMII1_PHY_ADDR 5583 CONFIG_SYS_RGMII1_PHY_ADDR
5589 CONFIG_SYS_RGMII2_PHY_ADDR 5584 CONFIG_SYS_RGMII2_PHY_ADDR
5590 CONFIG_SYS_RIO_MEM_BASE 5585 CONFIG_SYS_RIO_MEM_BASE
5591 CONFIG_SYS_RIO_MEM_BUS 5586 CONFIG_SYS_RIO_MEM_BUS
5592 CONFIG_SYS_RIO_MEM_PHYS 5587 CONFIG_SYS_RIO_MEM_PHYS
5593 CONFIG_SYS_RIO_MEM_SIZE 5588 CONFIG_SYS_RIO_MEM_SIZE
5594 CONFIG_SYS_RIO_MEM_VIRT 5589 CONFIG_SYS_RIO_MEM_VIRT
5595 CONFIG_SYS_RMDS 5590 CONFIG_SYS_RMDS
5596 CONFIG_SYS_RMR 5591 CONFIG_SYS_RMR
5597 CONFIG_SYS_ROM_BASE 5592 CONFIG_SYS_ROM_BASE
5598 CONFIG_SYS_ROOTPATH 5593 CONFIG_SYS_ROOTPATH
5599 CONFIG_SYS_RSTC_RMR_VAL 5594 CONFIG_SYS_RSTC_RMR_VAL
5600 CONFIG_SYS_RTCSC 5595 CONFIG_SYS_RTCSC
5601 CONFIG_SYS_RTC_BUS_NUM 5596 CONFIG_SYS_RTC_BUS_NUM
5602 CONFIG_SYS_RTC_CNT 5597 CONFIG_SYS_RTC_CNT
5603 CONFIG_SYS_RTC_DS1337 5598 CONFIG_SYS_RTC_DS1337
5604 CONFIG_SYS_RTC_DS1337_NOOSC 5599 CONFIG_SYS_RTC_DS1337_NOOSC
5605 CONFIG_SYS_RTC_DS1388 5600 CONFIG_SYS_RTC_DS1388
5606 CONFIG_SYS_RTC_OSCILLATOR 5601 CONFIG_SYS_RTC_OSCILLATOR
5607 CONFIG_SYS_RTC_PL031_BASE 5602 CONFIG_SYS_RTC_PL031_BASE
5608 CONFIG_SYS_RTC_REG_BASE_ADDR 5603 CONFIG_SYS_RTC_REG_BASE_ADDR
5609 CONFIG_SYS_RTC_SETUP 5604 CONFIG_SYS_RTC_SETUP
5610 CONFIG_SYS_RV3029_TCR 5605 CONFIG_SYS_RV3029_TCR
5611 CONFIG_SYS_RX_ETH_BUFFER 5606 CONFIG_SYS_RX_ETH_BUFFER
5612 CONFIG_SYS_SATA 5607 CONFIG_SYS_SATA
5613 CONFIG_SYS_SATA1 5608 CONFIG_SYS_SATA1
5614 CONFIG_SYS_SATA1_FLAGS 5609 CONFIG_SYS_SATA1_FLAGS
5615 CONFIG_SYS_SATA1_OFFSET 5610 CONFIG_SYS_SATA1_OFFSET
5616 CONFIG_SYS_SATA2 5611 CONFIG_SYS_SATA2
5617 CONFIG_SYS_SATA2_FLAGS 5612 CONFIG_SYS_SATA2_FLAGS
5618 CONFIG_SYS_SATA2_OFFSET 5613 CONFIG_SYS_SATA2_OFFSET
5619 CONFIG_SYS_SATA_ENV_DEV 5614 CONFIG_SYS_SATA_ENV_DEV
5620 CONFIG_SYS_SATA_FAT_BOOT_PARTITION 5615 CONFIG_SYS_SATA_FAT_BOOT_PARTITION
5621 CONFIG_SYS_SATA_MAX_DEVICE 5616 CONFIG_SYS_SATA_MAX_DEVICE
5622 CONFIG_SYS_SBFHDR_DATA_OFFSET 5617 CONFIG_SYS_SBFHDR_DATA_OFFSET
5623 CONFIG_SYS_SBFHDR_SIZE 5618 CONFIG_SYS_SBFHDR_SIZE
5624 CONFIG_SYS_SCCR 5619 CONFIG_SYS_SCCR
5625 CONFIG_SYS_SCCR_ENCCM 5620 CONFIG_SYS_SCCR_ENCCM
5626 CONFIG_SYS_SCCR_PCICM 5621 CONFIG_SYS_SCCR_PCICM
5627 CONFIG_SYS_SCCR_PCIEXP1CM 5622 CONFIG_SYS_SCCR_PCIEXP1CM
5628 CONFIG_SYS_SCCR_PCIEXP2CM 5623 CONFIG_SYS_SCCR_PCIEXP2CM
5629 CONFIG_SYS_SCCR_SATACM 5624 CONFIG_SYS_SCCR_SATACM
5630 CONFIG_SYS_SCCR_TSEC1CM 5625 CONFIG_SYS_SCCR_TSEC1CM
5631 CONFIG_SYS_SCCR_TSEC1ON 5626 CONFIG_SYS_SCCR_TSEC1ON
5632 CONFIG_SYS_SCCR_TSEC2CM 5627 CONFIG_SYS_SCCR_TSEC2CM
5633 CONFIG_SYS_SCCR_TSEC2ON 5628 CONFIG_SYS_SCCR_TSEC2ON
5634 CONFIG_SYS_SCCR_TSECCM 5629 CONFIG_SYS_SCCR_TSECCM
5635 CONFIG_SYS_SCCR_USBDRCM 5630 CONFIG_SYS_SCCR_USBDRCM
5636 CONFIG_SYS_SCCR_USBMPHCM 5631 CONFIG_SYS_SCCR_USBMPHCM
5637 CONFIG_SYS_SCC_TOUT_LOOP 5632 CONFIG_SYS_SCC_TOUT_LOOP
5638 CONFIG_SYS_SCR 5633 CONFIG_SYS_SCR
5639 CONFIG_SYS_SCRATCH_VA 5634 CONFIG_SYS_SCRATCH_VA
5640 CONFIG_SYS_SCSI_MAXDEVICE 5635 CONFIG_SYS_SCSI_MAXDEVICE
5641 CONFIG_SYS_SCSI_MAX_DEVICE 5636 CONFIG_SYS_SCSI_MAX_DEVICE
5642 CONFIG_SYS_SCSI_MAX_LUN 5637 CONFIG_SYS_SCSI_MAX_LUN
5643 CONFIG_SYS_SCSI_MAX_SCSI_ID 5638 CONFIG_SYS_SCSI_MAX_SCSI_ID
5644 CONFIG_SYS_SCSI_SPIN_UP_TIME 5639 CONFIG_SYS_SCSI_SPIN_UP_TIME
5645 CONFIG_SYS_SCSI_SYM53C8XX_CCF 5640 CONFIG_SYS_SCSI_SYM53C8XX_CCF
5646 CONFIG_SYS_SDHC_CLK 5641 CONFIG_SYS_SDHC_CLK
5647 CONFIG_SYS_SDHC_CLK_2_PLL 5642 CONFIG_SYS_SDHC_CLK_2_PLL
5648 CONFIG_SYS_SDIO0 5643 CONFIG_SYS_SDIO0
5649 CONFIG_SYS_SDIO0_MAX_CLK 5644 CONFIG_SYS_SDIO0_MAX_CLK
5650 CONFIG_SYS_SDIO1 5645 CONFIG_SYS_SDIO1
5651 CONFIG_SYS_SDIO1_MAX_CLK 5646 CONFIG_SYS_SDIO1_MAX_CLK
5652 CONFIG_SYS_SDIO2 5647 CONFIG_SYS_SDIO2
5653 CONFIG_SYS_SDIO2_MAX_CLK 5648 CONFIG_SYS_SDIO2_MAX_CLK
5654 CONFIG_SYS_SDIO3 5649 CONFIG_SYS_SDIO3
5655 CONFIG_SYS_SDIO3_MAX_CLK 5650 CONFIG_SYS_SDIO3_MAX_CLK
5656 CONFIG_SYS_SDIO_BASE0 5651 CONFIG_SYS_SDIO_BASE0
5657 CONFIG_SYS_SDIO_BASE1 5652 CONFIG_SYS_SDIO_BASE1
5658 CONFIG_SYS_SDIO_BASE2 5653 CONFIG_SYS_SDIO_BASE2
5659 CONFIG_SYS_SDIO_BASE3 5654 CONFIG_SYS_SDIO_BASE3
5660 CONFIG_SYS_SDMR 5655 CONFIG_SYS_SDMR
5661 CONFIG_SYS_SDRAM 5656 CONFIG_SYS_SDRAM
5662 CONFIG_SYS_SDRAM0_CFG0 5657 CONFIG_SYS_SDRAM0_CFG0
5663 CONFIG_SYS_SDRAM0_CLKTR 5658 CONFIG_SYS_SDRAM0_CLKTR
5664 CONFIG_SYS_SDRAM0_CODT 5659 CONFIG_SYS_SDRAM0_CODT
5665 CONFIG_SYS_SDRAM0_DLCR 5660 CONFIG_SYS_SDRAM0_DLCR
5666 CONFIG_SYS_SDRAM0_INITPLR0 5661 CONFIG_SYS_SDRAM0_INITPLR0
5667 CONFIG_SYS_SDRAM0_INITPLR1 5662 CONFIG_SYS_SDRAM0_INITPLR1
5668 CONFIG_SYS_SDRAM0_INITPLR10 5663 CONFIG_SYS_SDRAM0_INITPLR10
5669 CONFIG_SYS_SDRAM0_INITPLR11 5664 CONFIG_SYS_SDRAM0_INITPLR11
5670 CONFIG_SYS_SDRAM0_INITPLR12 5665 CONFIG_SYS_SDRAM0_INITPLR12
5671 CONFIG_SYS_SDRAM0_INITPLR13 5666 CONFIG_SYS_SDRAM0_INITPLR13
5672 CONFIG_SYS_SDRAM0_INITPLR14 5667 CONFIG_SYS_SDRAM0_INITPLR14
5673 CONFIG_SYS_SDRAM0_INITPLR15 5668 CONFIG_SYS_SDRAM0_INITPLR15
5674 CONFIG_SYS_SDRAM0_INITPLR2 5669 CONFIG_SYS_SDRAM0_INITPLR2
5675 CONFIG_SYS_SDRAM0_INITPLR3 5670 CONFIG_SYS_SDRAM0_INITPLR3
5676 CONFIG_SYS_SDRAM0_INITPLR4 5671 CONFIG_SYS_SDRAM0_INITPLR4
5677 CONFIG_SYS_SDRAM0_INITPLR5 5672 CONFIG_SYS_SDRAM0_INITPLR5
5678 CONFIG_SYS_SDRAM0_INITPLR6 5673 CONFIG_SYS_SDRAM0_INITPLR6
5679 CONFIG_SYS_SDRAM0_INITPLR7 5674 CONFIG_SYS_SDRAM0_INITPLR7
5680 CONFIG_SYS_SDRAM0_INITPLR8 5675 CONFIG_SYS_SDRAM0_INITPLR8
5681 CONFIG_SYS_SDRAM0_INITPLR9 5676 CONFIG_SYS_SDRAM0_INITPLR9
5682 CONFIG_SYS_SDRAM0_MB0CF 5677 CONFIG_SYS_SDRAM0_MB0CF
5683 CONFIG_SYS_SDRAM0_MB0CF_BASE 5678 CONFIG_SYS_SDRAM0_MB0CF_BASE
5684 CONFIG_SYS_SDRAM0_MB1CF 5679 CONFIG_SYS_SDRAM0_MB1CF
5685 CONFIG_SYS_SDRAM0_MB1CF_BASE 5680 CONFIG_SYS_SDRAM0_MB1CF_BASE
5686 CONFIG_SYS_SDRAM0_MB2CF 5681 CONFIG_SYS_SDRAM0_MB2CF
5687 CONFIG_SYS_SDRAM0_MB3CF 5682 CONFIG_SYS_SDRAM0_MB3CF
5688 CONFIG_SYS_SDRAM0_MCOPT1 5683 CONFIG_SYS_SDRAM0_MCOPT1
5689 CONFIG_SYS_SDRAM0_MCOPT2 5684 CONFIG_SYS_SDRAM0_MCOPT2
5690 CONFIG_SYS_SDRAM0_MEMODE 5685 CONFIG_SYS_SDRAM0_MEMODE
5691 CONFIG_SYS_SDRAM0_MMODE 5686 CONFIG_SYS_SDRAM0_MMODE
5692 CONFIG_SYS_SDRAM0_MODT0 5687 CONFIG_SYS_SDRAM0_MODT0
5693 CONFIG_SYS_SDRAM0_MODT1 5688 CONFIG_SYS_SDRAM0_MODT1
5694 CONFIG_SYS_SDRAM0_MODT2 5689 CONFIG_SYS_SDRAM0_MODT2
5695 CONFIG_SYS_SDRAM0_MODT3 5690 CONFIG_SYS_SDRAM0_MODT3
5696 CONFIG_SYS_SDRAM0_RDCC 5691 CONFIG_SYS_SDRAM0_RDCC
5697 CONFIG_SYS_SDRAM0_RFDC 5692 CONFIG_SYS_SDRAM0_RFDC
5698 CONFIG_SYS_SDRAM0_RQDC 5693 CONFIG_SYS_SDRAM0_RQDC
5699 CONFIG_SYS_SDRAM0_RTR 5694 CONFIG_SYS_SDRAM0_RTR
5700 CONFIG_SYS_SDRAM0_SDTR1 5695 CONFIG_SYS_SDRAM0_SDTR1
5701 CONFIG_SYS_SDRAM0_SDTR2 5696 CONFIG_SYS_SDRAM0_SDTR2
5702 CONFIG_SYS_SDRAM0_SDTR3 5697 CONFIG_SYS_SDRAM0_SDTR3
5703 CONFIG_SYS_SDRAM0_TR0 5698 CONFIG_SYS_SDRAM0_TR0
5704 CONFIG_SYS_SDRAM0_WDDCTR 5699 CONFIG_SYS_SDRAM0_WDDCTR
5705 CONFIG_SYS_SDRAM0_WRDTR 5700 CONFIG_SYS_SDRAM0_WRDTR
5706 CONFIG_SYS_SDRAM1 5701 CONFIG_SYS_SDRAM1
5707 CONFIG_SYS_SDRAM_BANKS 5702 CONFIG_SYS_SDRAM_BANKS
5708 CONFIG_SYS_SDRAM_BASE 5703 CONFIG_SYS_SDRAM_BASE
5709 CONFIG_SYS_SDRAM_BASE0 5704 CONFIG_SYS_SDRAM_BASE0
5710 CONFIG_SYS_SDRAM_BASE1 5705 CONFIG_SYS_SDRAM_BASE1
5711 CONFIG_SYS_SDRAM_BASE1xx 5706 CONFIG_SYS_SDRAM_BASE1xx
5712 CONFIG_SYS_SDRAM_BASE2 5707 CONFIG_SYS_SDRAM_BASE2
5713 CONFIG_SYS_SDRAM_CASL 5708 CONFIG_SYS_SDRAM_CASL
5714 CONFIG_SYS_SDRAM_CFG 5709 CONFIG_SYS_SDRAM_CFG
5715 CONFIG_SYS_SDRAM_CFG1 5710 CONFIG_SYS_SDRAM_CFG1
5716 CONFIG_SYS_SDRAM_CFG2 5711 CONFIG_SYS_SDRAM_CFG2
5717 CONFIG_SYS_SDRAM_CL 5712 CONFIG_SYS_SDRAM_CL
5718 CONFIG_SYS_SDRAM_CONF1HB 5713 CONFIG_SYS_SDRAM_CONF1HB
5719 CONFIG_SYS_SDRAM_CONF1LL 5714 CONFIG_SYS_SDRAM_CONF1LL
5720 CONFIG_SYS_SDRAM_CONFPATHB 5715 CONFIG_SYS_SDRAM_CONFPATHB
5721 CONFIG_SYS_SDRAM_CS1 5716 CONFIG_SYS_SDRAM_CS1
5722 CONFIG_SYS_SDRAM_CTP 5717 CONFIG_SYS_SDRAM_CTP
5723 CONFIG_SYS_SDRAM_CTRL 5718 CONFIG_SYS_SDRAM_CTRL
5724 CONFIG_SYS_SDRAM_DRVSTRENGTH 5719 CONFIG_SYS_SDRAM_DRVSTRENGTH
5725 CONFIG_SYS_SDRAM_DRV_STRENGTH 5720 CONFIG_SYS_SDRAM_DRV_STRENGTH
5726 CONFIG_SYS_SDRAM_EMOD 5721 CONFIG_SYS_SDRAM_EMOD
5727 CONFIG_SYS_SDRAM_LDF 5722 CONFIG_SYS_SDRAM_LDF
5728 CONFIG_SYS_SDRAM_LIST 5723 CONFIG_SYS_SDRAM_LIST
5729 CONFIG_SYS_SDRAM_LOWER 5724 CONFIG_SYS_SDRAM_LOWER
5730 CONFIG_SYS_SDRAM_MODE 5725 CONFIG_SYS_SDRAM_MODE
5731 CONFIG_SYS_SDRAM_PLBADDUHB 5726 CONFIG_SYS_SDRAM_PLBADDUHB
5732 CONFIG_SYS_SDRAM_PLBADDULL 5727 CONFIG_SYS_SDRAM_PLBADDULL
5733 CONFIG_SYS_SDRAM_PTA 5728 CONFIG_SYS_SDRAM_PTA
5734 CONFIG_SYS_SDRAM_R0BAS 5729 CONFIG_SYS_SDRAM_R0BAS
5735 CONFIG_SYS_SDRAM_R1BAS 5730 CONFIG_SYS_SDRAM_R1BAS
5736 CONFIG_SYS_SDRAM_R2BAS 5731 CONFIG_SYS_SDRAM_R2BAS
5737 CONFIG_SYS_SDRAM_R3BAS 5732 CONFIG_SYS_SDRAM_R3BAS
5738 CONFIG_SYS_SDRAM_RCD 5733 CONFIG_SYS_SDRAM_RCD
5739 CONFIG_SYS_SDRAM_RFTA 5734 CONFIG_SYS_SDRAM_RFTA
5740 CONFIG_SYS_SDRAM_SIZE 5735 CONFIG_SYS_SDRAM_SIZE
5741 CONFIG_SYS_SDRAM_SIZE0 5736 CONFIG_SYS_SDRAM_SIZE0
5742 CONFIG_SYS_SDRAM_SIZE1 5737 CONFIG_SYS_SDRAM_SIZE1
5743 CONFIG_SYS_SDRAM_SIZE_LAW 5738 CONFIG_SYS_SDRAM_SIZE_LAW
5744 CONFIG_SYS_SDRAM_SIZE_MB 5739 CONFIG_SYS_SDRAM_SIZE_MB
5745 CONFIG_SYS_SDRAM_TABLE 5740 CONFIG_SYS_SDRAM_TABLE
5746 CONFIG_SYS_SDRAM_UPPER 5741 CONFIG_SYS_SDRAM_UPPER
5747 CONFIG_SYS_SDRAM_VAL 5742 CONFIG_SYS_SDRAM_VAL
5748 CONFIG_SYS_SDRAM_VAL1 5743 CONFIG_SYS_SDRAM_VAL1
5749 CONFIG_SYS_SDRAM_VAL10 5744 CONFIG_SYS_SDRAM_VAL10
5750 CONFIG_SYS_SDRAM_VAL11 5745 CONFIG_SYS_SDRAM_VAL11
5751 CONFIG_SYS_SDRAM_VAL12 5746 CONFIG_SYS_SDRAM_VAL12
5752 CONFIG_SYS_SDRAM_VAL2 5747 CONFIG_SYS_SDRAM_VAL2
5753 CONFIG_SYS_SDRAM_VAL3 5748 CONFIG_SYS_SDRAM_VAL3
5754 CONFIG_SYS_SDRAM_VAL4 5749 CONFIG_SYS_SDRAM_VAL4
5755 CONFIG_SYS_SDRAM_VAL5 5750 CONFIG_SYS_SDRAM_VAL5
5756 CONFIG_SYS_SDRAM_VAL6 5751 CONFIG_SYS_SDRAM_VAL6
5757 CONFIG_SYS_SDRAM_VAL7 5752 CONFIG_SYS_SDRAM_VAL7
5758 CONFIG_SYS_SDRAM_VAL8 5753 CONFIG_SYS_SDRAM_VAL8
5759 CONFIG_SYS_SDRAM_VAL9 5754 CONFIG_SYS_SDRAM_VAL9
5760 CONFIG_SYS_SDRAM_tRC 5755 CONFIG_SYS_SDRAM_tRC
5761 CONFIG_SYS_SDRAM_tRCD 5756 CONFIG_SYS_SDRAM_tRCD
5762 CONFIG_SYS_SDRAM_tRFC 5757 CONFIG_SYS_SDRAM_tRFC
5763 CONFIG_SYS_SDRAM_tRP 5758 CONFIG_SYS_SDRAM_tRP
5764 CONFIG_SYS_SDRC_CR_VAL 5759 CONFIG_SYS_SDRC_CR_VAL
5765 CONFIG_SYS_SDRC_MDR_VAL 5760 CONFIG_SYS_SDRC_MDR_VAL
5766 CONFIG_SYS_SDRC_MR_VAL 5761 CONFIG_SYS_SDRC_MR_VAL
5767 CONFIG_SYS_SDRC_MR_VAL1 5762 CONFIG_SYS_SDRC_MR_VAL1
5768 CONFIG_SYS_SDRC_MR_VAL2 5763 CONFIG_SYS_SDRC_MR_VAL2
5769 CONFIG_SYS_SDRC_MR_VAL3 5764 CONFIG_SYS_SDRC_MR_VAL3
5770 CONFIG_SYS_SDRC_MR_VAL4 5765 CONFIG_SYS_SDRC_MR_VAL4
5771 CONFIG_SYS_SDRC_MR_VAL5 5766 CONFIG_SYS_SDRC_MR_VAL5
5772 CONFIG_SYS_SDRC_TR_VAL 5767 CONFIG_SYS_SDRC_TR_VAL
5773 CONFIG_SYS_SDRC_TR_VAL1 5768 CONFIG_SYS_SDRC_TR_VAL1
5774 CONFIG_SYS_SDRC_TR_VAL2 5769 CONFIG_SYS_SDRC_TR_VAL2
5775 CONFIG_SYS_SDSR 5770 CONFIG_SYS_SDSR
5776 CONFIG_SYS_SD_VOLTAGE 5771 CONFIG_SYS_SD_VOLTAGE
5777 CONFIG_SYS_SEC_MON_ADDR 5772 CONFIG_SYS_SEC_MON_ADDR
5778 CONFIG_SYS_SEC_MON_OFFSET 5773 CONFIG_SYS_SEC_MON_OFFSET
5779 CONFIG_SYS_SELF_RST 5774 CONFIG_SYS_SELF_RST
5780 CONFIG_SYS_SERIAL0 5775 CONFIG_SYS_SERIAL0
5781 CONFIG_SYS_SERIAL1 5776 CONFIG_SYS_SERIAL1
5782 CONFIG_SYS_SERIAL2 5777 CONFIG_SYS_SERIAL2
5783 CONFIG_SYS_SERIAL3 5778 CONFIG_SYS_SERIAL3
5784 CONFIG_SYS_SERIAL4 5779 CONFIG_SYS_SERIAL4
5785 CONFIG_SYS_SERIAL5 5780 CONFIG_SYS_SERIAL5
5786 CONFIG_SYS_SERIAL_BOOT 5781 CONFIG_SYS_SERIAL_BOOT
5787 CONFIG_SYS_SFP_ADDR 5782 CONFIG_SYS_SFP_ADDR
5788 CONFIG_SYS_SFP_OFFSET 5783 CONFIG_SYS_SFP_OFFSET
5789 CONFIG_SYS_SGMII1_PHY_ADDR 5784 CONFIG_SYS_SGMII1_PHY_ADDR
5790 CONFIG_SYS_SGMII2_PHY_ADDR 5785 CONFIG_SYS_SGMII2_PHY_ADDR
5791 CONFIG_SYS_SGMII3_PHY_ADDR 5786 CONFIG_SYS_SGMII3_PHY_ADDR
5792 CONFIG_SYS_SGMII_LINERATE_MHZ 5787 CONFIG_SYS_SGMII_LINERATE_MHZ
5793 CONFIG_SYS_SGMII_RATESCALE 5788 CONFIG_SYS_SGMII_RATESCALE
5794 CONFIG_SYS_SGMII_REFCLK_MHZ 5789 CONFIG_SYS_SGMII_REFCLK_MHZ
5795 CONFIG_SYS_SH_SDHI0_BASE 5790 CONFIG_SYS_SH_SDHI0_BASE
5796 CONFIG_SYS_SH_SDHI1_BASE 5791 CONFIG_SYS_SH_SDHI1_BASE
5797 CONFIG_SYS_SH_SDHI2_BASE 5792 CONFIG_SYS_SH_SDHI2_BASE
5798 CONFIG_SYS_SH_SDHI3_BASE 5793 CONFIG_SYS_SH_SDHI3_BASE
5799 CONFIG_SYS_SH_SDHI_NR_CHANNEL 5794 CONFIG_SYS_SH_SDHI_NR_CHANNEL
5800 CONFIG_SYS_SICRH 5795 CONFIG_SYS_SICRH
5801 CONFIG_SYS_SICRL 5796 CONFIG_SYS_SICRL
5802 CONFIG_SYS_SIL1178_I2C 5797 CONFIG_SYS_SIL1178_I2C
5803 CONFIG_SYS_SIMULATE_SPD_EEPROM 5798 CONFIG_SYS_SIMULATE_SPD_EEPROM
5804 CONFIG_SYS_SIUMCR 5799 CONFIG_SYS_SIUMCR
5805 CONFIG_SYS_SIUMCR_HIGH 5800 CONFIG_SYS_SIUMCR_HIGH
5806 CONFIG_SYS_SIUMCR_LOW 5801 CONFIG_SYS_SIUMCR_LOW
5807 CONFIG_SYS_SJA1000_BASE 5802 CONFIG_SYS_SJA1000_BASE
5808 CONFIG_SYS_SMALL_FLASH 5803 CONFIG_SYS_SMALL_FLASH
5809 CONFIG_SYS_SMC0_CYCLE0_VAL 5804 CONFIG_SYS_SMC0_CYCLE0_VAL
5810 CONFIG_SYS_SMC0_MODE0_VAL 5805 CONFIG_SYS_SMC0_MODE0_VAL
5811 CONFIG_SYS_SMC0_PULSE0_VAL 5806 CONFIG_SYS_SMC0_PULSE0_VAL
5812 CONFIG_SYS_SMC0_SETUP0_VAL 5807 CONFIG_SYS_SMC0_SETUP0_VAL
5813 CONFIG_SYS_SMC_CSR0_VAL 5808 CONFIG_SYS_SMC_CSR0_VAL
5814 CONFIG_SYS_SMC_DPMEM_OFFSET 5809 CONFIG_SYS_SMC_DPMEM_OFFSET
5815 CONFIG_SYS_SMC_RXBUFLEN 5810 CONFIG_SYS_SMC_RXBUFLEN
5816 CONFIG_SYS_SMC_UCODE_PATCH 5811 CONFIG_SYS_SMC_UCODE_PATCH
5817 CONFIG_SYS_SMI_BASE 5812 CONFIG_SYS_SMI_BASE
5818 CONFIG_SYS_SPANSION_BASE 5813 CONFIG_SYS_SPANSION_BASE
5819 CONFIG_SYS_SPANSION_BOOT 5814 CONFIG_SYS_SPANSION_BOOT
5820 CONFIG_SYS_SPC1920_PLD_BASE 5815 CONFIG_SYS_SPC1920_PLD_BASE
5821 CONFIG_SYS_SPC1920_SMC1_CLK4 5816 CONFIG_SYS_SPC1920_SMC1_CLK4
5822 CONFIG_SYS_SPCR_OPT 5817 CONFIG_SYS_SPCR_OPT
5823 CONFIG_SYS_SPCR_TSEC1EP 5818 CONFIG_SYS_SPCR_TSEC1EP
5824 CONFIG_SYS_SPCR_TSEC2EP 5819 CONFIG_SYS_SPCR_TSEC2EP
5825 CONFIG_SYS_SPCR_TSECEP 5820 CONFIG_SYS_SPCR_TSECEP
5826 CONFIG_SYS_SPD_BUS_NUM 5821 CONFIG_SYS_SPD_BUS_NUM
5827 CONFIG_SYS_SPD_MAX_DIMMS 5822 CONFIG_SYS_SPD_MAX_DIMMS
5828 CONFIG_SYS_SPI0 5823 CONFIG_SYS_SPI0
5829 CONFIG_SYS_SPI0_NUM_CS 5824 CONFIG_SYS_SPI0_NUM_CS
5830 CONFIG_SYS_SPI1 5825 CONFIG_SYS_SPI1
5831 CONFIG_SYS_SPI1_BASE 5826 CONFIG_SYS_SPI1_BASE
5832 CONFIG_SYS_SPI1_NUM_CS 5827 CONFIG_SYS_SPI1_NUM_CS
5833 CONFIG_SYS_SPI2 5828 CONFIG_SYS_SPI2
5834 CONFIG_SYS_SPI2_BASE 5829 CONFIG_SYS_SPI2_BASE
5835 CONFIG_SYS_SPI2_NUM_CS 5830 CONFIG_SYS_SPI2_NUM_CS
5836 CONFIG_SYS_SPI_ARGS_OFFS 5831 CONFIG_SYS_SPI_ARGS_OFFS
5837 CONFIG_SYS_SPI_ARGS_SIZE 5832 CONFIG_SYS_SPI_ARGS_SIZE
5838 CONFIG_SYS_SPI_BASE 5833 CONFIG_SYS_SPI_BASE
5839 CONFIG_SYS_SPI_CLK 5834 CONFIG_SYS_SPI_CLK
5840 CONFIG_SYS_SPI_CS_ACT 5835 CONFIG_SYS_SPI_CS_ACT
5841 CONFIG_SYS_SPI_CS_BASE 5836 CONFIG_SYS_SPI_CS_BASE
5842 CONFIG_SYS_SPI_CS_USED 5837 CONFIG_SYS_SPI_CS_USED
5843 CONFIG_SYS_SPI_DPMEM_OFFSET 5838 CONFIG_SYS_SPI_DPMEM_OFFSET
5844 CONFIG_SYS_SPI_FLASH_U_BOOT_DST 5839 CONFIG_SYS_SPI_FLASH_U_BOOT_DST
5845 CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS 5840 CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS
5846 CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE 5841 CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE
5847 CONFIG_SYS_SPI_FLASH_U_BOOT_START 5842 CONFIG_SYS_SPI_FLASH_U_BOOT_START
5848 CONFIG_SYS_SPI_INIT_OFFSET 5843 CONFIG_SYS_SPI_INIT_OFFSET
5849 CONFIG_SYS_SPI_KERNEL_OFFS 5844 CONFIG_SYS_SPI_KERNEL_OFFS
5850 CONFIG_SYS_SPI_MXC_WAIT 5845 CONFIG_SYS_SPI_MXC_WAIT
5851 CONFIG_SYS_SPI_RTC_DEVID 5846 CONFIG_SYS_SPI_RTC_DEVID
5852 CONFIG_SYS_SPI_ST_ENABLE_WP_PIN 5847 CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
5853 CONFIG_SYS_SPI_UCODE_PATCH 5848 CONFIG_SYS_SPI_UCODE_PATCH
5854 CONFIG_SYS_SPI_U_BOOT_OFFS 5849 CONFIG_SYS_SPI_U_BOOT_OFFS
5855 CONFIG_SYS_SPI_U_BOOT_SIZE 5850 CONFIG_SYS_SPI_U_BOOT_SIZE
5856 CONFIG_SYS_SPI_WRITE_TOUT 5851 CONFIG_SYS_SPI_WRITE_TOUT
5857 CONFIG_SYS_SPL_ARGS_ADDR 5852 CONFIG_SYS_SPL_ARGS_ADDR
5858 CONFIG_SYS_SPL_LEN 5853 CONFIG_SYS_SPL_LEN
5859 CONFIG_SYS_SPL_MALLOC_SIZE 5854 CONFIG_SYS_SPL_MALLOC_SIZE
5860 CONFIG_SYS_SPL_MALLOC_START 5855 CONFIG_SYS_SPL_MALLOC_START
5861 CONFIG_SYS_SPL_MAX_LEN 5856 CONFIG_SYS_SPL_MAX_LEN
5862 CONFIG_SYS_SPR 5857 CONFIG_SYS_SPR
5863 CONFIG_SYS_SRAM_BASE 5858 CONFIG_SYS_SRAM_BASE
5864 CONFIG_SYS_SRAM_SIZE 5859 CONFIG_SYS_SRAM_SIZE
5865 CONFIG_SYS_SRAM_START 5860 CONFIG_SYS_SRAM_START
5866 CONFIG_SYS_SRGPL0_CFG_BAR 5861 CONFIG_SYS_SRGPL0_CFG_BAR
5867 CONFIG_SYS_SRGPL0_MNT_BAR 5862 CONFIG_SYS_SRGPL0_MNT_BAR
5868 CONFIG_SYS_SRGPL0_MSG_BAR 5863 CONFIG_SYS_SRGPL0_MSG_BAR
5869 CONFIG_SYS_SRGPL0_REG_BAR 5864 CONFIG_SYS_SRGPL0_REG_BAR
5870 CONFIG_SYS_SRIO 5865 CONFIG_SYS_SRIO
5871 CONFIG_SYS_SRIO1_MEM_BASE 5866 CONFIG_SYS_SRIO1_MEM_BASE
5872 CONFIG_SYS_SRIO1_MEM_BUS 5867 CONFIG_SYS_SRIO1_MEM_BUS
5873 CONFIG_SYS_SRIO1_MEM_PHYS 5868 CONFIG_SYS_SRIO1_MEM_PHYS
5874 CONFIG_SYS_SRIO1_MEM_PHYS_HIGH 5869 CONFIG_SYS_SRIO1_MEM_PHYS_HIGH
5875 CONFIG_SYS_SRIO1_MEM_PHYS_LOW 5870 CONFIG_SYS_SRIO1_MEM_PHYS_LOW
5876 CONFIG_SYS_SRIO1_MEM_SIZE 5871 CONFIG_SYS_SRIO1_MEM_SIZE
5877 CONFIG_SYS_SRIO1_MEM_VIRT 5872 CONFIG_SYS_SRIO1_MEM_VIRT
5878 CONFIG_SYS_SRIO2_MEM_PHYS 5873 CONFIG_SYS_SRIO2_MEM_PHYS
5879 CONFIG_SYS_SRIO2_MEM_SIZE 5874 CONFIG_SYS_SRIO2_MEM_SIZE
5880 CONFIG_SYS_SRIO2_MEM_VIRT 5875 CONFIG_SYS_SRIO2_MEM_VIRT
5881 CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR 5876 CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR
5882 CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS 5877 CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS
5883 CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR 5878 CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR
5884 CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS 5879 CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS
5885 CONFIG_SYS_SSD_BASE 5880 CONFIG_SYS_SSD_BASE
5886 CONFIG_SYS_SSD_BASE_PHYS 5881 CONFIG_SYS_SSD_BASE_PHYS
5887 CONFIG_SYS_SST_SECT 5882 CONFIG_SYS_SST_SECT
5888 CONFIG_SYS_SST_SECTSZ 5883 CONFIG_SYS_SST_SECTSZ
5889 CONFIG_SYS_STACK_SIZE 5884 CONFIG_SYS_STACK_SIZE
5890 CONFIG_SYS_STATUS_C 5885 CONFIG_SYS_STATUS_C
5891 CONFIG_SYS_STATUS_OK 5886 CONFIG_SYS_STATUS_OK
5892 CONFIG_SYS_STMICRO_BOOT 5887 CONFIG_SYS_STMICRO_BOOT
5893 CONFIG_SYS_SUPPORT_64BIT_DATA 5888 CONFIG_SYS_SUPPORT_64BIT_DATA
5894 CONFIG_SYS_SXCNFG_VAL 5889 CONFIG_SYS_SXCNFG_VAL
5895 CONFIG_SYS_SYPCR 5890 CONFIG_SYS_SYPCR
5896 CONFIG_SYS_SYSTEMACE_BASE 5891 CONFIG_SYS_SYSTEMACE_BASE
5897 CONFIG_SYS_SYSTEMACE_WIDTH 5892 CONFIG_SYS_SYSTEMACE_WIDTH
5898 CONFIG_SYS_TBIPA_VALUE 5893 CONFIG_SYS_TBIPA_VALUE
5899 CONFIG_SYS_TBSCR 5894 CONFIG_SYS_TBSCR
5900 CONFIG_SYS_TCLK 5895 CONFIG_SYS_TCLK
5901 CONFIG_SYS_TEMP_STACK_OCM 5896 CONFIG_SYS_TEMP_STACK_OCM
5902 CONFIG_SYS_TEXT_ADDR 5897 CONFIG_SYS_TEXT_ADDR
5903 CONFIG_SYS_TEXT_BASE_NOR 5898 CONFIG_SYS_TEXT_BASE_NOR
5904 CONFIG_SYS_TEXT_BASE_SPL 5899 CONFIG_SYS_TEXT_BASE_SPL
5905 CONFIG_SYS_TFP410_ADDR 5900 CONFIG_SYS_TFP410_ADDR
5906 CONFIG_SYS_TFP410_BUS 5901 CONFIG_SYS_TFP410_BUS
5907 CONFIG_SYS_TIMERBASE 5902 CONFIG_SYS_TIMERBASE
5908 CONFIG_SYS_TIMER_BASE 5903 CONFIG_SYS_TIMER_BASE
5909 CONFIG_SYS_TIMER_COUNTER 5904 CONFIG_SYS_TIMER_COUNTER
5910 CONFIG_SYS_TIMER_COUNTS_DOWN 5905 CONFIG_SYS_TIMER_COUNTS_DOWN
5911 CONFIG_SYS_TIMER_PRESCALER 5906 CONFIG_SYS_TIMER_PRESCALER
5912 CONFIG_SYS_TIMER_RATE 5907 CONFIG_SYS_TIMER_RATE
5913 CONFIG_SYS_TLB_FOR_BOOT_FLASH 5908 CONFIG_SYS_TLB_FOR_BOOT_FLASH
5914 CONFIG_SYS_TMCNTSC 5909 CONFIG_SYS_TMCNTSC
5915 CONFIG_SYS_TMPVIRT 5910 CONFIG_SYS_TMPVIRT
5916 CONFIG_SYS_TMRINTR_MASK 5911 CONFIG_SYS_TMRINTR_MASK
5917 CONFIG_SYS_TMRINTR_NO 5912 CONFIG_SYS_TMRINTR_NO
5918 CONFIG_SYS_TMRINTR_PEND 5913 CONFIG_SYS_TMRINTR_PEND
5919 CONFIG_SYS_TMRINTR_PRI 5914 CONFIG_SYS_TMRINTR_PRI
5920 CONFIG_SYS_TMRPND_REG 5915 CONFIG_SYS_TMRPND_REG
5921 CONFIG_SYS_TMR_BASE 5916 CONFIG_SYS_TMR_BASE
5922 CONFIG_SYS_TMU_CLK_DIV 5917 CONFIG_SYS_TMU_CLK_DIV
5923 CONFIG_SYS_TSEC1 5918 CONFIG_SYS_TSEC1
5924 CONFIG_SYS_TSEC1_OFFSET 5919 CONFIG_SYS_TSEC1_OFFSET
5925 CONFIG_SYS_TSEC2 5920 CONFIG_SYS_TSEC2
5926 CONFIG_SYS_TSEC2_OFFSET 5921 CONFIG_SYS_TSEC2_OFFSET
5927 CONFIG_SYS_TSEC3_OFFSET 5922 CONFIG_SYS_TSEC3_OFFSET
5928 CONFIG_SYS_TX_ETH_BUFFER 5923 CONFIG_SYS_TX_ETH_BUFFER
5929 CONFIG_SYS_UART1_ALT1_GPIO 5924 CONFIG_SYS_UART1_ALT1_GPIO
5930 CONFIG_SYS_UART1_PRI_GPIO 5925 CONFIG_SYS_UART1_PRI_GPIO
5931 CONFIG_SYS_UART2_ALT1_GPIO 5926 CONFIG_SYS_UART2_ALT1_GPIO
5932 CONFIG_SYS_UART2_ALT3_GPIO 5927 CONFIG_SYS_UART2_ALT3_GPIO
5933 CONFIG_SYS_UART2_PRI_GPIO 5928 CONFIG_SYS_UART2_PRI_GPIO
5934 CONFIG_SYS_UART_BASE 5929 CONFIG_SYS_UART_BASE
5935 CONFIG_SYS_UART_PORT 5930 CONFIG_SYS_UART_PORT
5936 CONFIG_SYS_UBOOT_BASE 5931 CONFIG_SYS_UBOOT_BASE
5937 CONFIG_SYS_UBOOT_END 5932 CONFIG_SYS_UBOOT_END
5938 CONFIG_SYS_UBOOT_START 5933 CONFIG_SYS_UBOOT_START
5939 CONFIG_SYS_UCC_RGMII_MODE 5934 CONFIG_SYS_UCC_RGMII_MODE
5940 CONFIG_SYS_UCC_RMII_MODE 5935 CONFIG_SYS_UCC_RMII_MODE
5941 CONFIG_SYS_UDELAY_BASE 5936 CONFIG_SYS_UDELAY_BASE
5942 CONFIG_SYS_UEC 5937 CONFIG_SYS_UEC
5943 CONFIG_SYS_UEC1_ETH_TYPE 5938 CONFIG_SYS_UEC1_ETH_TYPE
5944 CONFIG_SYS_UEC1_INTERFACE_SPEED 5939 CONFIG_SYS_UEC1_INTERFACE_SPEED
5945 CONFIG_SYS_UEC1_INTERFACE_TYPE 5940 CONFIG_SYS_UEC1_INTERFACE_TYPE
5946 CONFIG_SYS_UEC1_PHY_ADDR 5941 CONFIG_SYS_UEC1_PHY_ADDR
5947 CONFIG_SYS_UEC1_RX_CLK 5942 CONFIG_SYS_UEC1_RX_CLK
5948 CONFIG_SYS_UEC1_TX_CLK 5943 CONFIG_SYS_UEC1_TX_CLK
5949 CONFIG_SYS_UEC1_UCC_NUM 5944 CONFIG_SYS_UEC1_UCC_NUM
5950 CONFIG_SYS_UEC2_ETH_TYPE 5945 CONFIG_SYS_UEC2_ETH_TYPE
5951 CONFIG_SYS_UEC2_INTERFACE_SPEED 5946 CONFIG_SYS_UEC2_INTERFACE_SPEED
5952 CONFIG_SYS_UEC2_INTERFACE_TYPE 5947 CONFIG_SYS_UEC2_INTERFACE_TYPE
5953 CONFIG_SYS_UEC2_PHY_ADDR 5948 CONFIG_SYS_UEC2_PHY_ADDR
5954 CONFIG_SYS_UEC2_RX_CLK 5949 CONFIG_SYS_UEC2_RX_CLK
5955 CONFIG_SYS_UEC2_TX_CLK 5950 CONFIG_SYS_UEC2_TX_CLK
5956 CONFIG_SYS_UEC2_UCC_NUM 5951 CONFIG_SYS_UEC2_UCC_NUM
5957 CONFIG_SYS_UEC3_ETH_TYPE 5952 CONFIG_SYS_UEC3_ETH_TYPE
5958 CONFIG_SYS_UEC3_INTERFACE_SPEED 5953 CONFIG_SYS_UEC3_INTERFACE_SPEED
5959 CONFIG_SYS_UEC3_INTERFACE_TYPE 5954 CONFIG_SYS_UEC3_INTERFACE_TYPE
5960 CONFIG_SYS_UEC3_PHY_ADDR 5955 CONFIG_SYS_UEC3_PHY_ADDR
5961 CONFIG_SYS_UEC3_RX_CLK 5956 CONFIG_SYS_UEC3_RX_CLK
5962 CONFIG_SYS_UEC3_TX_CLK 5957 CONFIG_SYS_UEC3_TX_CLK
5963 CONFIG_SYS_UEC3_UCC_NUM 5958 CONFIG_SYS_UEC3_UCC_NUM
5964 CONFIG_SYS_UEC4_ETH_TYPE 5959 CONFIG_SYS_UEC4_ETH_TYPE
5965 CONFIG_SYS_UEC4_INTERFACE_SPEED 5960 CONFIG_SYS_UEC4_INTERFACE_SPEED
5966 CONFIG_SYS_UEC4_INTERFACE_TYPE 5961 CONFIG_SYS_UEC4_INTERFACE_TYPE
5967 CONFIG_SYS_UEC4_PHY_ADDR 5962 CONFIG_SYS_UEC4_PHY_ADDR
5968 CONFIG_SYS_UEC4_RX_CLK 5963 CONFIG_SYS_UEC4_RX_CLK
5969 CONFIG_SYS_UEC4_TX_CLK 5964 CONFIG_SYS_UEC4_TX_CLK
5970 CONFIG_SYS_UEC4_UCC_NUM 5965 CONFIG_SYS_UEC4_UCC_NUM
5971 CONFIG_SYS_UEC5_ETH_TYPE 5966 CONFIG_SYS_UEC5_ETH_TYPE
5972 CONFIG_SYS_UEC5_INTERFACE_SPEED 5967 CONFIG_SYS_UEC5_INTERFACE_SPEED
5973 CONFIG_SYS_UEC5_INTERFACE_TYPE 5968 CONFIG_SYS_UEC5_INTERFACE_TYPE
5974 CONFIG_SYS_UEC5_PHY_ADDR 5969 CONFIG_SYS_UEC5_PHY_ADDR
5975 CONFIG_SYS_UEC5_RX_CLK 5970 CONFIG_SYS_UEC5_RX_CLK
5976 CONFIG_SYS_UEC5_TX_CLK 5971 CONFIG_SYS_UEC5_TX_CLK
5977 CONFIG_SYS_UEC5_UCC_NUM 5972 CONFIG_SYS_UEC5_UCC_NUM
5978 CONFIG_SYS_UEC6_ETH_TYPE 5973 CONFIG_SYS_UEC6_ETH_TYPE
5979 CONFIG_SYS_UEC6_INTERFACE_SPEED 5974 CONFIG_SYS_UEC6_INTERFACE_SPEED
5980 CONFIG_SYS_UEC6_INTERFACE_TYPE 5975 CONFIG_SYS_UEC6_INTERFACE_TYPE
5981 CONFIG_SYS_UEC6_PHY_ADDR 5976 CONFIG_SYS_UEC6_PHY_ADDR
5982 CONFIG_SYS_UEC6_RX_CLK 5977 CONFIG_SYS_UEC6_RX_CLK
5983 CONFIG_SYS_UEC6_TX_CLK 5978 CONFIG_SYS_UEC6_TX_CLK
5984 CONFIG_SYS_UEC6_UCC_NUM 5979 CONFIG_SYS_UEC6_UCC_NUM
5985 CONFIG_SYS_UEC8_ETH_TYPE 5980 CONFIG_SYS_UEC8_ETH_TYPE
5986 CONFIG_SYS_UEC8_INTERFACE_SPEED 5981 CONFIG_SYS_UEC8_INTERFACE_SPEED
5987 CONFIG_SYS_UEC8_INTERFACE_TYPE 5982 CONFIG_SYS_UEC8_INTERFACE_TYPE
5988 CONFIG_SYS_UEC8_PHY_ADDR 5983 CONFIG_SYS_UEC8_PHY_ADDR
5989 CONFIG_SYS_UEC8_RX_CLK 5984 CONFIG_SYS_UEC8_RX_CLK
5990 CONFIG_SYS_UEC8_TX_CLK 5985 CONFIG_SYS_UEC8_TX_CLK
5991 CONFIG_SYS_UEC8_UCC_NUM 5986 CONFIG_SYS_UEC8_UCC_NUM
5992 CONFIG_SYS_UECx_PHY_ADDR 5987 CONFIG_SYS_UECx_PHY_ADDR
5993 CONFIG_SYS_UHC0_EHCI_BASE 5988 CONFIG_SYS_UHC0_EHCI_BASE
5994 CONFIG_SYS_UHC1_EHCI_BASE 5989 CONFIG_SYS_UHC1_EHCI_BASE
5995 CONFIG_SYS_ULB_CLK 5990 CONFIG_SYS_ULB_CLK
5996 CONFIG_SYS_UMCR 5991 CONFIG_SYS_UMCR
5997 CONFIG_SYS_UNIFY_CACHE 5992 CONFIG_SYS_UNIFY_CACHE
5998 CONFIG_SYS_UNSPEC_PHYID 5993 CONFIG_SYS_UNSPEC_PHYID
5999 CONFIG_SYS_UNSPEC_STRID 5994 CONFIG_SYS_UNSPEC_STRID
6000 CONFIG_SYS_UPDATE_FLASH_SIZE 5995 CONFIG_SYS_UPDATE_FLASH_SIZE
6001 CONFIG_SYS_USB2D0_BASE 5996 CONFIG_SYS_USB2D0_BASE
6002 CONFIG_SYS_USBCTRL 5997 CONFIG_SYS_USBCTRL
6003 CONFIG_SYS_USBD_BASE 5998 CONFIG_SYS_USBD_BASE
6004 CONFIG_SYS_USB_BRGCLK 5999 CONFIG_SYS_USB_BRGCLK
6005 CONFIG_SYS_USB_DEVICE 6000 CONFIG_SYS_USB_DEVICE
6006 CONFIG_SYS_USB_EHCI_CPU_INIT 6001 CONFIG_SYS_USB_EHCI_CPU_INIT
6007 CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 6002 CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
6008 CONFIG_SYS_USB_EHCI_REGS_BASE 6003 CONFIG_SYS_USB_EHCI_REGS_BASE
6009 CONFIG_SYS_USB_EVENT_POLL 6004 CONFIG_SYS_USB_EVENT_POLL
6010 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 6005 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
6011 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE 6006 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
6012 CONFIG_SYS_USB_FAT_BOOT_PARTITION 6007 CONFIG_SYS_USB_FAT_BOOT_PARTITION
6013 CONFIG_SYS_USB_HOST 6008 CONFIG_SYS_USB_HOST
6014 CONFIG_SYS_USB_OHCI_BOARD_INIT 6009 CONFIG_SYS_USB_OHCI_BOARD_INIT
6015 CONFIG_SYS_USB_OHCI_CPU_INIT 6010 CONFIG_SYS_USB_OHCI_CPU_INIT
6016 CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 6011 CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
6017 CONFIG_SYS_USB_OHCI_REGS_BASE 6012 CONFIG_SYS_USB_OHCI_REGS_BASE
6018 CONFIG_SYS_USB_OHCI_SLOT_NAME 6013 CONFIG_SYS_USB_OHCI_SLOT_NAME
6019 CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 6014 CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS
6020 CONFIG_SYS_USER_SWITCHES_BASE 6015 CONFIG_SYS_USER_SWITCHES_BASE
6021 CONFIG_SYS_USE_BOOT_NORFLASH 6016 CONFIG_SYS_USE_BOOT_NORFLASH
6022 CONFIG_SYS_USE_DATAFLASH 6017 CONFIG_SYS_USE_DATAFLASH
6023 CONFIG_SYS_USE_DATAFLASH_CS0 6018 CONFIG_SYS_USE_DATAFLASH_CS0
6024 CONFIG_SYS_USE_DATAFLASH_CS1 6019 CONFIG_SYS_USE_DATAFLASH_CS1
6025 CONFIG_SYS_USE_DATAFLASH_CS3 6020 CONFIG_SYS_USE_DATAFLASH_CS3
6026 CONFIG_SYS_USE_DSPLINK 6021 CONFIG_SYS_USE_DSPLINK
6027 CONFIG_SYS_USE_FLASH 6022 CONFIG_SYS_USE_FLASH
6028 CONFIG_SYS_USE_MAIN_OSCILLATOR 6023 CONFIG_SYS_USE_MAIN_OSCILLATOR
6029 CONFIG_SYS_USE_MMC 6024 CONFIG_SYS_USE_MMC
6030 CONFIG_SYS_USE_MPC834XSYS_USB_PHY 6025 CONFIG_SYS_USE_MPC834XSYS_USB_PHY
6031 CONFIG_SYS_USE_NAND 6026 CONFIG_SYS_USE_NAND
6032 CONFIG_SYS_USE_NANDFLASH 6027 CONFIG_SYS_USE_NANDFLASH
6033 CONFIG_SYS_USE_NOR 6028 CONFIG_SYS_USE_NOR
6034 CONFIG_SYS_USE_NORFLASH 6029 CONFIG_SYS_USE_NORFLASH
6035 CONFIG_SYS_USE_PPCENV 6030 CONFIG_SYS_USE_PPCENV
6036 CONFIG_SYS_USE_SERIALFLASH 6031 CONFIG_SYS_USE_SERIALFLASH
6037 CONFIG_SYS_USE_SPIFLASH 6032 CONFIG_SYS_USE_SPIFLASH
6038 CONFIG_SYS_USE_UBI 6033 CONFIG_SYS_USE_UBI
6039 CONFIG_SYS_USR_EXCEP 6034 CONFIG_SYS_USR_EXCEP
6040 CONFIG_SYS_U_BOOT_OFFS 6035 CONFIG_SYS_U_BOOT_OFFS
6041 CONFIG_SYS_VA_BITS 6036 CONFIG_SYS_VA_BITS
6042 CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR 6037 CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR
6043 CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN 6038 CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN
6044 CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT 6039 CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT
6045 CONFIG_SYS_VCXK_AUTODETECT 6040 CONFIG_SYS_VCXK_AUTODETECT
6046 CONFIG_SYS_VCXK_BASE 6041 CONFIG_SYS_VCXK_BASE
6047 CONFIG_SYS_VCXK_DEFAULT_LINEALIGN 6042 CONFIG_SYS_VCXK_DEFAULT_LINEALIGN
6048 CONFIG_SYS_VCXK_DOUBLEBUFFERED 6043 CONFIG_SYS_VCXK_DOUBLEBUFFERED
6049 CONFIG_SYS_VCXK_ENABLE_DDR 6044 CONFIG_SYS_VCXK_ENABLE_DDR
6050 CONFIG_SYS_VCXK_ENABLE_PIN 6045 CONFIG_SYS_VCXK_ENABLE_PIN
6051 CONFIG_SYS_VCXK_ENABLE_PORT 6046 CONFIG_SYS_VCXK_ENABLE_PORT
6052 CONFIG_SYS_VCXK_INVERT_DDR 6047 CONFIG_SYS_VCXK_INVERT_DDR
6053 CONFIG_SYS_VCXK_INVERT_PIN 6048 CONFIG_SYS_VCXK_INVERT_PIN
6054 CONFIG_SYS_VCXK_INVERT_PORT 6049 CONFIG_SYS_VCXK_INVERT_PORT
6055 CONFIG_SYS_VCXK_REQUEST_DDR 6050 CONFIG_SYS_VCXK_REQUEST_DDR
6056 CONFIG_SYS_VCXK_REQUEST_PIN 6051 CONFIG_SYS_VCXK_REQUEST_PIN
6057 CONFIG_SYS_VCXK_REQUEST_PORT 6052 CONFIG_SYS_VCXK_REQUEST_PORT
6058 CONFIG_SYS_VCXK_RESET_DDR 6053 CONFIG_SYS_VCXK_RESET_DDR
6059 CONFIG_SYS_VCXK_RESET_PIN 6054 CONFIG_SYS_VCXK_RESET_PIN
6060 CONFIG_SYS_VCXK_RESET_PORT 6055 CONFIG_SYS_VCXK_RESET_PORT
6061 CONFIG_SYS_VGA_RAM_EN 6056 CONFIG_SYS_VGA_RAM_EN
6062 CONFIG_SYS_VIDEO 6057 CONFIG_SYS_VIDEO
6063 CONFIG_SYS_VIDEO_LOGO_MAX_SIZE 6058 CONFIG_SYS_VIDEO_LOGO_MAX_SIZE
6064 CONFIG_SYS_VPC3_BASE 6059 CONFIG_SYS_VPC3_BASE
6065 CONFIG_SYS_VPC3_SIZE 6060 CONFIG_SYS_VPC3_SIZE
6066 CONFIG_SYS_VSC7385_BASE 6061 CONFIG_SYS_VSC7385_BASE
6067 CONFIG_SYS_VSC7385_BASE_PHYS 6062 CONFIG_SYS_VSC7385_BASE_PHYS
6068 CONFIG_SYS_VSC7385_BR_PRELIM 6063 CONFIG_SYS_VSC7385_BR_PRELIM
6069 CONFIG_SYS_VSC7385_OR_PRELIM 6064 CONFIG_SYS_VSC7385_OR_PRELIM
6070 CONFIG_SYS_VSC7385_SIZE 6065 CONFIG_SYS_VSC7385_SIZE
6071 CONFIG_SYS_VXWORKS_MAC_PTR 6066 CONFIG_SYS_VXWORKS_MAC_PTR
6072 CONFIG_SYS_WATCHDOG_FLAGS_ADDR 6067 CONFIG_SYS_WATCHDOG_FLAGS_ADDR
6073 CONFIG_SYS_WATCHDOG_FREQ 6068 CONFIG_SYS_WATCHDOG_FREQ
6074 CONFIG_SYS_WATCHDOG_MAGIC 6069 CONFIG_SYS_WATCHDOG_MAGIC
6075 CONFIG_SYS_WATCHDOG_MAGIC_MASK 6070 CONFIG_SYS_WATCHDOG_MAGIC_MASK
6076 CONFIG_SYS_WATCHDOG_TIME_ADDR 6071 CONFIG_SYS_WATCHDOG_TIME_ADDR
6077 CONFIG_SYS_WATCHDOG_VALUE 6072 CONFIG_SYS_WATCHDOG_VALUE
6078 CONFIG_SYS_WDTC_WDMR_VAL 6073 CONFIG_SYS_WDTC_WDMR_VAL
6079 CONFIG_SYS_WDTTIMERBASE 6074 CONFIG_SYS_WDTTIMERBASE
6080 CONFIG_SYS_WDT_PERIOD_HIGH 6075 CONFIG_SYS_WDT_PERIOD_HIGH
6081 CONFIG_SYS_WDT_PERIOD_LOW 6076 CONFIG_SYS_WDT_PERIOD_LOW
6082 CONFIG_SYS_WINDOW1_BASE 6077 CONFIG_SYS_WINDOW1_BASE
6083 CONFIG_SYS_WRITE_SWAPPED_DATA 6078 CONFIG_SYS_WRITE_SWAPPED_DATA
6084 CONFIG_SYS_XHCI_USB1_ADDR 6079 CONFIG_SYS_XHCI_USB1_ADDR
6085 CONFIG_SYS_XHCI_USB2_ADDR 6080 CONFIG_SYS_XHCI_USB2_ADDR
6086 CONFIG_SYS_XHCI_USB3_ADDR 6081 CONFIG_SYS_XHCI_USB3_ADDR
6087 CONFIG_SYS_XILINX_SPI_LIST 6082 CONFIG_SYS_XILINX_SPI_LIST
6088 CONFIG_SYS_XIMG_LEN 6083 CONFIG_SYS_XIMG_LEN
6089 CONFIG_SYS_XLB_PIPELINING 6084 CONFIG_SYS_XLB_PIPELINING
6090 CONFIG_SYS_XSVF_DEFAULT_ADDR 6085 CONFIG_SYS_XSVF_DEFAULT_ADDR
6091 CONFIG_SYS_XWAY_EBU_BOOTCFG 6086 CONFIG_SYS_XWAY_EBU_BOOTCFG
6092 CONFIG_SYS_ZYNQ_QSPI_WAIT 6087 CONFIG_SYS_ZYNQ_QSPI_WAIT
6093 CONFIG_SYS_ZYNQ_SPI_WAIT 6088 CONFIG_SYS_ZYNQ_SPI_WAIT
6094 CONFIG_SYS_i2C_FSL 6089 CONFIG_SYS_i2C_FSL
6095 CONFIG_TAM3517_SETTINGS 6090 CONFIG_TAM3517_SETTINGS
6096 CONFIG_TAM3517_SW3_SETTINGS 6091 CONFIG_TAM3517_SW3_SETTINGS
6097 CONFIG_TCA642X 6092 CONFIG_TCA642X
6098 CONFIG_TEGRA_BOARD_STRING 6093 CONFIG_TEGRA_BOARD_STRING
6099 CONFIG_TEGRA_CLOCK_SCALING 6094 CONFIG_TEGRA_CLOCK_SCALING
6100 CONFIG_TEGRA_ENABLE_UARTA 6095 CONFIG_TEGRA_ENABLE_UARTA
6101 CONFIG_TEGRA_ENABLE_UARTB 6096 CONFIG_TEGRA_ENABLE_UARTB
6102 CONFIG_TEGRA_ENABLE_UARTC 6097 CONFIG_TEGRA_ENABLE_UARTC
6103 CONFIG_TEGRA_ENABLE_UARTD 6098 CONFIG_TEGRA_ENABLE_UARTD
6104 CONFIG_TEGRA_ENABLE_UARTE 6099 CONFIG_TEGRA_ENABLE_UARTE
6105 CONFIG_TEGRA_GPU 6100 CONFIG_TEGRA_GPU
6106 CONFIG_TEGRA_KEYBOARD 6101 CONFIG_TEGRA_KEYBOARD
6107 CONFIG_TEGRA_LP0 6102 CONFIG_TEGRA_LP0
6108 CONFIG_TEGRA_NAND 6103 CONFIG_TEGRA_NAND
6109 CONFIG_TEGRA_PMU 6104 CONFIG_TEGRA_PMU
6110 CONFIG_TEGRA_SLINK_CTRLS 6105 CONFIG_TEGRA_SLINK_CTRLS
6111 CONFIG_TEGRA_SPI 6106 CONFIG_TEGRA_SPI
6112 CONFIG_TEGRA_UARTA_GPU 6107 CONFIG_TEGRA_UARTA_GPU
6113 CONFIG_TEGRA_UARTA_SDIO1 6108 CONFIG_TEGRA_UARTA_SDIO1
6114 CONFIG_TEGRA_UARTA_UAA_UAB 6109 CONFIG_TEGRA_UARTA_UAA_UAB
6115 CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 6110 CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3
6116 CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 6111 CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1
6117 CONFIG_TESTPIN_MASK 6112 CONFIG_TESTPIN_MASK
6118 CONFIG_TESTPIN_REG 6113 CONFIG_TESTPIN_REG
6119 CONFIG_TEST_LIST_SORT 6114 CONFIG_TEST_LIST_SORT
6120 CONFIG_TFP410_I2C_ADDR 6115 CONFIG_TFP410_I2C_ADDR
6121 CONFIG_TFTP_BLOCKSIZE 6116 CONFIG_TFTP_BLOCKSIZE
6122 CONFIG_TFTP_FILE_NAME_MAX_LEN 6117 CONFIG_TFTP_FILE_NAME_MAX_LEN
6123 CONFIG_TFTP_PORT 6118 CONFIG_TFTP_PORT
6124 CONFIG_TFTP_TSIZE 6119 CONFIG_TFTP_TSIZE
6125 CONFIG_THOR_RESET_OFF 6120 CONFIG_THOR_RESET_OFF
6126 CONFIG_THUMB2_KERNEL 6121 CONFIG_THUMB2_KERNEL
6127 CONFIG_THUNDERX 6122 CONFIG_THUNDERX
6128 CONFIG_TI814X 6123 CONFIG_TI814X
6129 CONFIG_TI816X 6124 CONFIG_TI816X
6130 CONFIG_TI816X_DDR_PLL_796 6125 CONFIG_TI816X_DDR_PLL_796
6131 CONFIG_TI816X_EVM_DDR2 6126 CONFIG_TI816X_EVM_DDR2
6132 CONFIG_TI816X_EVM_DDR3 6127 CONFIG_TI816X_EVM_DDR3
6133 CONFIG_TI816X_USE_EMIF0 6128 CONFIG_TI816X_USE_EMIF0
6134 CONFIG_TI816X_USE_EMIF1 6129 CONFIG_TI816X_USE_EMIF1
6135 CONFIG_TI81XX 6130 CONFIG_TI81XX
6136 CONFIG_TIMESTAMP 6131 CONFIG_TIMESTAMP
6137 CONFIG_TIZEN 6132 CONFIG_TIZEN
6138 CONFIG_TI_KEYSTONE_SERDES 6133 CONFIG_TI_KEYSTONE_SERDES
6139 CONFIG_TI_KSNAV 6134 CONFIG_TI_KSNAV
6140 CONFIG_TI_SPI_MMAP 6135 CONFIG_TI_SPI_MMAP
6141 CONFIG_TMU_CMD_DTT 6136 CONFIG_TMU_CMD_DTT
6142 CONFIG_TMU_TIMER 6137 CONFIG_TMU_TIMER
6143 CONFIG_TOTAL5200 6138 CONFIG_TOTAL5200
6144 CONFIG_TPL_DRIVERS_MISC_SUPPORT 6139 CONFIG_TPL_DRIVERS_MISC_SUPPORT
6145 CONFIG_TPL_PAD_TO 6140 CONFIG_TPL_PAD_TO
6146 CONFIG_TPM_TIS_BASE_ADDRESS 6141 CONFIG_TPM_TIS_BASE_ADDRESS
6147 CONFIG_TPS6586X_POWER 6142 CONFIG_TPS6586X_POWER
6148 CONFIG_TQM5200 6143 CONFIG_TQM5200
6149 CONFIG_TQM5200S 6144 CONFIG_TQM5200S
6150 CONFIG_TQM5200_B 6145 CONFIG_TQM5200_B
6151 CONFIG_TQM5200_REV100 6146 CONFIG_TQM5200_REV100
6152 CONFIG_TQM823L 6147 CONFIG_TQM823L
6153 CONFIG_TQM823M 6148 CONFIG_TQM823M
6154 CONFIG_TQM834X 6149 CONFIG_TQM834X
6155 CONFIG_TQM850L 6150 CONFIG_TQM850L
6156 CONFIG_TQM850M 6151 CONFIG_TQM850M
6157 CONFIG_TQM855L 6152 CONFIG_TQM855L
6158 CONFIG_TQM855M 6153 CONFIG_TQM855M
6159 CONFIG_TQM860L 6154 CONFIG_TQM860L
6160 CONFIG_TQM860M 6155 CONFIG_TQM860M
6161 CONFIG_TQM862L 6156 CONFIG_TQM862L
6162 CONFIG_TQM862M 6157 CONFIG_TQM862M
6163 CONFIG_TQM866M 6158 CONFIG_TQM866M
6164 CONFIG_TQM885D 6159 CONFIG_TQM885D
6165 CONFIG_TQM8xxL 6160 CONFIG_TQM8xxL
6166 CONFIG_TQM8xxM 6161 CONFIG_TQM8xxM
6167 CONFIG_TRACE 6162 CONFIG_TRACE
6168 CONFIG_TRACE_BUFFER_SIZE 6163 CONFIG_TRACE_BUFFER_SIZE
6169 CONFIG_TRACE_EARLY 6164 CONFIG_TRACE_EARLY
6170 CONFIG_TRACE_EARLY_ADDR 6165 CONFIG_TRACE_EARLY_ADDR
6171 CONFIG_TRACE_EARLY_SIZE 6166 CONFIG_TRACE_EARLY_SIZE
6172 CONFIG_TRAILBLAZER 6167 CONFIG_TRAILBLAZER
6173 CONFIG_TRATS 6168 CONFIG_TRATS
6174 CONFIG_TSEC 6169 CONFIG_TSEC
6175 CONFIG_TSEC1 6170 CONFIG_TSEC1
6176 CONFIG_TSEC1_NAME 6171 CONFIG_TSEC1_NAME
6177 CONFIG_TSEC2 6172 CONFIG_TSEC2
6178 CONFIG_TSEC2_NAME 6173 CONFIG_TSEC2_NAME
6179 CONFIG_TSEC3 6174 CONFIG_TSEC3
6180 CONFIG_TSEC3_NAME 6175 CONFIG_TSEC3_NAME
6181 CONFIG_TSEC4 6176 CONFIG_TSEC4
6182 CONFIG_TSEC4_NAME 6177 CONFIG_TSEC4_NAME
6183 CONFIG_TSECV2 6178 CONFIG_TSECV2
6184 CONFIG_TSECV2_1 6179 CONFIG_TSECV2_1
6185 CONFIG_TSEC_ENET 6180 CONFIG_TSEC_ENET
6186 CONFIG_TSEC_TBI 6181 CONFIG_TSEC_TBI
6187 CONFIG_TSEC_TBICR_SETTINGS 6182 CONFIG_TSEC_TBICR_SETTINGS
6188 CONFIG_TSI108_ETH_NUM_PORTS 6183 CONFIG_TSI108_ETH_NUM_PORTS
6189 CONFIG_TUGE1 6184 CONFIG_TUGE1
6190 CONFIG_TULIP 6185 CONFIG_TULIP
6191 CONFIG_TULIP_FIX_DAVICOM 6186 CONFIG_TULIP_FIX_DAVICOM
6192 CONFIG_TULIP_SELECT_MEDIA 6187 CONFIG_TULIP_SELECT_MEDIA
6193 CONFIG_TULIP_USE_IO 6188 CONFIG_TULIP_USE_IO
6194 CONFIG_TUXX1 6189 CONFIG_TUXX1
6195 CONFIG_TWL4030_INPUT 6190 CONFIG_TWL4030_INPUT
6196 CONFIG_TWL4030_KEYPAD 6191 CONFIG_TWL4030_KEYPAD
6197 CONFIG_TWL4030_LED 6192 CONFIG_TWL4030_LED
6198 CONFIG_TWL4030_PWM 6193 CONFIG_TWL4030_PWM
6199 CONFIG_TWL4030_USB 6194 CONFIG_TWL4030_USB
6200 CONFIG_TWL6030_INPUT 6195 CONFIG_TWL6030_INPUT
6201 CONFIG_TWL6030_POWER 6196 CONFIG_TWL6030_POWER
6202 CONFIG_TWR 6197 CONFIG_TWR
6203 CONFIG_TWR_P1025 6198 CONFIG_TWR_P1025
6204 CONFIG_TX_DESCR_NUM 6199 CONFIG_TX_DESCR_NUM
6205 CONFIG_TZSW_RESERVED_DRAM_SIZE 6200 CONFIG_TZSW_RESERVED_DRAM_SIZE
6206 CONFIG_T_SH7706LSR 6201 CONFIG_T_SH7706LSR
6207 CONFIG_UART_BASE 6202 CONFIG_UART_BASE
6208 CONFIG_UART_BR_PRELIM 6203 CONFIG_UART_BR_PRELIM
6209 CONFIG_UART_OR_PRELIM 6204 CONFIG_UART_OR_PRELIM
6210 CONFIG_UBIBLOCK 6205 CONFIG_UBIBLOCK
6211 CONFIG_UBIFS_SILENCE_MSG 6206 CONFIG_UBIFS_SILENCE_MSG
6212 CONFIG_UBIFS_VOLUME 6207 CONFIG_UBIFS_VOLUME
6213 CONFIG_UBI_PART 6208 CONFIG_UBI_PART
6214 CONFIG_UBI_SILENCE_MSG 6209 CONFIG_UBI_SILENCE_MSG
6215 CONFIG_UBI_SIZE 6210 CONFIG_UBI_SIZE
6216 CONFIG_UBOOT1_ENV_ADDR 6211 CONFIG_UBOOT1_ENV_ADDR
6217 CONFIG_UBOOT2_ENV_ADDR 6212 CONFIG_UBOOT2_ENV_ADDR
6218 CONFIG_UBOOTPATH 6213 CONFIG_UBOOTPATH
6219 CONFIG_UBOOT_ENABLE_PADS_ALL 6214 CONFIG_UBOOT_ENABLE_PADS_ALL
6220 CONFIG_UBOOT_ENV_ADDR 6215 CONFIG_UBOOT_ENV_ADDR
6221 CONFIG_UBOOT_SECTOR_COUNT 6216 CONFIG_UBOOT_SECTOR_COUNT
6222 CONFIG_UBOOT_SECTOR_START 6217 CONFIG_UBOOT_SECTOR_START
6223 CONFIG_UCP1020 6218 CONFIG_UCP1020
6224 CONFIG_UCP1020_REV_1_3 6219 CONFIG_UCP1020_REV_1_3
6225 CONFIG_UDP_CHECKSUM 6220 CONFIG_UDP_CHECKSUM
6226 CONFIG_UEC_ETH 6221 CONFIG_UEC_ETH
6227 CONFIG_UEC_ETH1 6222 CONFIG_UEC_ETH1
6228 CONFIG_UEC_ETH2 6223 CONFIG_UEC_ETH2
6229 CONFIG_UEC_ETH3 6224 CONFIG_UEC_ETH3
6230 CONFIG_UEC_ETH4 6225 CONFIG_UEC_ETH4
6231 CONFIG_UEC_ETH5 6226 CONFIG_UEC_ETH5
6232 CONFIG_UEC_ETH6 6227 CONFIG_UEC_ETH6
6233 CONFIG_UEC_ETH7 6228 CONFIG_UEC_ETH7
6234 CONFIG_UEC_ETH8 6229 CONFIG_UEC_ETH8
6235 CONFIG_UID16 6230 CONFIG_UID16
6236 CONFIG_ULI526X 6231 CONFIG_ULI526X
6237 CONFIG_ULPI_REF_CLK 6232 CONFIG_ULPI_REF_CLK
6238 CONFIG_UMSDEVS 6233 CONFIG_UMSDEVS
6239 CONFIG_UNIPHIER_ETH 6234 CONFIG_UNIPHIER_ETH
6240 CONFIG_UPDATEB 6235 CONFIG_UPDATEB
6241 CONFIG_UPDATE_LOAD_ADDR 6236 CONFIG_UPDATE_LOAD_ADDR
6242 CONFIG_UPDATE_TFTP 6237 CONFIG_UPDATE_TFTP
6243 CONFIG_UPDATE_TFTP_CNT_MAX 6238 CONFIG_UPDATE_TFTP_CNT_MAX
6244 CONFIG_UPDATE_TFTP_MSEC_MAX 6239 CONFIG_UPDATE_TFTP_MSEC_MAX
6245 CONFIG_USART1 6240 CONFIG_USART1
6246 CONFIG_USART3 6241 CONFIG_USART3
6247 CONFIG_USART_BASE 6242 CONFIG_USART_BASE
6248 CONFIG_USART_ID 6243 CONFIG_USART_ID
6249 CONFIG_USBBOOTCOMMAND 6244 CONFIG_USBBOOTCOMMAND
6250 CONFIG_USBDEBUG 6245 CONFIG_USBDEBUG
6251 CONFIG_USBD_CONFIGURATION_STR 6246 CONFIG_USBD_CONFIGURATION_STR
6252 CONFIG_USBD_CTRL_INTERFACE_STR 6247 CONFIG_USBD_CTRL_INTERFACE_STR
6253 CONFIG_USBD_DATA_INTERFACE_STR 6248 CONFIG_USBD_DATA_INTERFACE_STR
6254 CONFIG_USBD_HS 6249 CONFIG_USBD_HS
6255 CONFIG_USBD_MANUFACTURER 6250 CONFIG_USBD_MANUFACTURER
6256 CONFIG_USBD_PRODUCTID 6251 CONFIG_USBD_PRODUCTID
6257 CONFIG_USBD_PRODUCTID_CDCACM 6252 CONFIG_USBD_PRODUCTID_CDCACM
6258 CONFIG_USBD_PRODUCTID_GSERIAL 6253 CONFIG_USBD_PRODUCTID_GSERIAL
6259 CONFIG_USBD_PRODUCT_NAME 6254 CONFIG_USBD_PRODUCT_NAME
6260 CONFIG_USBD_SERIAL_BULK_HS_PKTSIZE 6255 CONFIG_USBD_SERIAL_BULK_HS_PKTSIZE
6261 CONFIG_USBD_SERIAL_BULK_PKTSIZE 6256 CONFIG_USBD_SERIAL_BULK_PKTSIZE
6262 CONFIG_USBD_SERIAL_INT_ENDPOINT 6257 CONFIG_USBD_SERIAL_INT_ENDPOINT
6263 CONFIG_USBD_SERIAL_INT_PKTSIZE 6258 CONFIG_USBD_SERIAL_INT_PKTSIZE
6264 CONFIG_USBD_SERIAL_IN_ENDPOINT 6259 CONFIG_USBD_SERIAL_IN_ENDPOINT
6265 CONFIG_USBD_SERIAL_IN_PKTSIZE 6260 CONFIG_USBD_SERIAL_IN_PKTSIZE
6266 CONFIG_USBD_SERIAL_OUT_ENDPOINT 6261 CONFIG_USBD_SERIAL_OUT_ENDPOINT
6267 CONFIG_USBD_SERIAL_OUT_PKTSIZE 6262 CONFIG_USBD_SERIAL_OUT_PKTSIZE
6268 CONFIG_USBD_VENDORID 6263 CONFIG_USBD_VENDORID
6269 CONFIG_USBID_ADDR 6264 CONFIG_USBID_ADDR
6270 CONFIG_USBNET_DEV_ADDR 6265 CONFIG_USBNET_DEV_ADDR
6271 CONFIG_USBNET_HOST_ADDR 6266 CONFIG_USBNET_HOST_ADDR
6272 CONFIG_USBNET_MANUFACTURER 6267 CONFIG_USBNET_MANUFACTURER
6273 CONFIG_USBTTY 6268 CONFIG_USBTTY
6274 CONFIG_USB_AM35X 6269 CONFIG_USB_AM35X
6275 CONFIG_USB_ATMEL 6270 CONFIG_USB_ATMEL
6276 CONFIG_USB_ATMEL_CLK_SEL_PLLB 6271 CONFIG_USB_ATMEL_CLK_SEL_PLLB
6277 CONFIG_USB_ATMEL_CLK_SEL_UPLL 6272 CONFIG_USB_ATMEL_CLK_SEL_UPLL
6278 CONFIG_USB_BIN_FIXUP 6273 CONFIG_USB_BIN_FIXUP
6279 CONFIG_USB_BOOTING 6274 CONFIG_USB_BOOTING
6280 CONFIG_USB_CABLE_CHECK 6275 CONFIG_USB_CABLE_CHECK
6281 CONFIG_USB_CLOCK 6276 CONFIG_USB_CLOCK
6282 CONFIG_USB_CONFIG 6277 CONFIG_USB_CONFIG
6283 CONFIG_USB_DEVICE 6278 CONFIG_USB_DEVICE
6284 CONFIG_USB_DEV_BASE 6279 CONFIG_USB_DEV_BASE
6285 CONFIG_USB_DEV_PULLUP_GPIO 6280 CONFIG_USB_DEV_PULLUP_GPIO
6286 CONFIG_USB_DWC2 6281 CONFIG_USB_DWC2
6287 CONFIG_USB_DWC2_REG_ADDR 6282 CONFIG_USB_DWC2_REG_ADDR
6288 CONFIG_USB_EHCI_ARMADA100 6283 CONFIG_USB_EHCI_ARMADA100
6289 CONFIG_USB_EHCI_BASE 6284 CONFIG_USB_EHCI_BASE
6290 CONFIG_USB_EHCI_BASE_LIST 6285 CONFIG_USB_EHCI_BASE_LIST
6291 CONFIG_USB_EHCI_EXYNOS 6286 CONFIG_USB_EHCI_EXYNOS
6292 CONFIG_USB_EHCI_FARADAY 6287 CONFIG_USB_EHCI_FARADAY
6293 CONFIG_USB_EHCI_FSL 6288 CONFIG_USB_EHCI_FSL
6294 CONFIG_USB_EHCI_KIRKWOOD 6289 CONFIG_USB_EHCI_KIRKWOOD
6295 CONFIG_USB_EHCI_MX5 6290 CONFIG_USB_EHCI_MX5
6296 CONFIG_USB_EHCI_MXC 6291 CONFIG_USB_EHCI_MXC
6297 CONFIG_USB_EHCI_MXS 6292 CONFIG_USB_EHCI_MXS
6298 CONFIG_USB_EHCI_OMAP 6293 CONFIG_USB_EHCI_OMAP
6299 CONFIG_USB_EHCI_PCI 6294 CONFIG_USB_EHCI_PCI
6300 CONFIG_USB_EHCI_PPC4XX 6295 CONFIG_USB_EHCI_PPC4XX
6301 CONFIG_USB_EHCI_RMOBILE 6296 CONFIG_USB_EHCI_RMOBILE
6302 CONFIG_USB_EHCI_SPEAR 6297 CONFIG_USB_EHCI_SPEAR
6303 CONFIG_USB_EHCI_SUNXI 6298 CONFIG_USB_EHCI_SUNXI
6304 CONFIG_USB_EHCI_TEGRA 6299 CONFIG_USB_EHCI_TEGRA
6305 CONFIG_USB_EHCI_TXFIFO_THRESH 6300 CONFIG_USB_EHCI_TXFIFO_THRESH
6306 CONFIG_USB_EHCI_VCT 6301 CONFIG_USB_EHCI_VCT
6307 CONFIG_USB_EHCI_VF 6302 CONFIG_USB_EHCI_VF
6308 CONFIG_USB_ETHER 6303 CONFIG_USB_ETHER
6309 CONFIG_USB_ETHER_ASIX 6304 CONFIG_USB_ETHER_ASIX
6310 CONFIG_USB_ETHER_ASIX88179 6305 CONFIG_USB_ETHER_ASIX88179
6311 CONFIG_USB_ETHER_DM9601 6306 CONFIG_USB_ETHER_DM9601
6312 CONFIG_USB_ETHER_MCS7830 6307 CONFIG_USB_ETHER_MCS7830
6313 CONFIG_USB_ETHER_RNDIS 6308 CONFIG_USB_ETHER_RNDIS
6314 CONFIG_USB_ETHER_RTL8152 6309 CONFIG_USB_ETHER_RTL8152
6315 CONFIG_USB_ETHER_SMSC95XX 6310 CONFIG_USB_ETHER_SMSC95XX
6316 CONFIG_USB_ETHER_xxx 6311 CONFIG_USB_ETHER_xxx
6317 CONFIG_USB_ETH_CDC 6312 CONFIG_USB_ETH_CDC
6318 CONFIG_USB_ETH_QMULT 6313 CONFIG_USB_ETH_QMULT
6319 CONFIG_USB_ETH_RNDIS 6314 CONFIG_USB_ETH_RNDIS
6320 CONFIG_USB_ETH_SUBSET 6315 CONFIG_USB_ETH_SUBSET
6321 CONFIG_USB_EXT2_BOOT 6316 CONFIG_USB_EXT2_BOOT
6322 CONFIG_USB_FAT_BOOT 6317 CONFIG_USB_FAT_BOOT
6323 CONFIG_USB_FREQ 6318 CONFIG_USB_FREQ
6324 CONFIG_USB_FUNCTION_MASS_STORAGE 6319 CONFIG_USB_FUNCTION_MASS_STORAGE
6325 CONFIG_USB_FUNCTION_THOR 6320 CONFIG_USB_FUNCTION_THOR
6326 CONFIG_USB_GADGET_AMD5536UDC 6321 CONFIG_USB_GADGET_AMD5536UDC
6327 CONFIG_USB_GADGET_AT91 6322 CONFIG_USB_GADGET_AT91
6328 CONFIG_USB_GADGET_AU1X00 6323 CONFIG_USB_GADGET_AU1X00
6329 CONFIG_USB_GADGET_DUMMY_HCD 6324 CONFIG_USB_GADGET_DUMMY_HCD
6330 CONFIG_USB_GADGET_DWC2_OTG_PHY 6325 CONFIG_USB_GADGET_DWC2_OTG_PHY
6331 CONFIG_USB_GADGET_FOTG210 6326 CONFIG_USB_GADGET_FOTG210
6332 CONFIG_USB_GADGET_FSL_USB2 6327 CONFIG_USB_GADGET_FSL_USB2
6333 CONFIG_USB_GADGET_GOKU 6328 CONFIG_USB_GADGET_GOKU
6334 CONFIG_USB_GADGET_IMX 6329 CONFIG_USB_GADGET_IMX
6335 CONFIG_USB_GADGET_M66592 6330 CONFIG_USB_GADGET_M66592
6336 CONFIG_USB_GADGET_MASS_STORAGE 6331 CONFIG_USB_GADGET_MASS_STORAGE
6337 CONFIG_USB_GADGET_MPC8272 6332 CONFIG_USB_GADGET_MPC8272
6338 CONFIG_USB_GADGET_MQ11XX 6333 CONFIG_USB_GADGET_MQ11XX
6339 CONFIG_USB_GADGET_MUSBHSFC 6334 CONFIG_USB_GADGET_MUSBHSFC
6340 CONFIG_USB_GADGET_N9604 6335 CONFIG_USB_GADGET_N9604
6341 CONFIG_USB_GADGET_NET2280 6336 CONFIG_USB_GADGET_NET2280
6342 CONFIG_USB_GADGET_OMAP 6337 CONFIG_USB_GADGET_OMAP
6343 CONFIG_USB_GADGET_PXA27X 6338 CONFIG_USB_GADGET_PXA27X
6344 CONFIG_USB_GADGET_PXA2XX 6339 CONFIG_USB_GADGET_PXA2XX
6345 CONFIG_USB_GADGET_S3C2410 6340 CONFIG_USB_GADGET_S3C2410
6346 CONFIG_USB_GADGET_SA1100 6341 CONFIG_USB_GADGET_SA1100
6347 CONFIG_USB_GADGET_SUPERH 6342 CONFIG_USB_GADGET_SUPERH
6348 CONFIG_USB_GADGET_SX2 6343 CONFIG_USB_GADGET_SX2
6349 CONFIG_USB_HOST_ETHER 6344 CONFIG_USB_HOST_ETHER
6350 CONFIG_USB_HOST_XHCI_BASE 6345 CONFIG_USB_HOST_XHCI_BASE
6351 CONFIG_USB_INVENTRA_DMA 6346 CONFIG_USB_INVENTRA_DMA
6352 CONFIG_USB_ISP1301_I2C_ADDR 6347 CONFIG_USB_ISP1301_I2C_ADDR
6353 CONFIG_USB_MAX_CONTROLLER_COUNT 6348 CONFIG_USB_MAX_CONTROLLER_COUNT
6354 CONFIG_USB_MUSB_AM35X 6349 CONFIG_USB_MUSB_AM35X
6355 CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT 6350 CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT
6356 CONFIG_USB_MUSB_DSPS 6351 CONFIG_USB_MUSB_DSPS
6357 CONFIG_USB_MUSB_HCD 6352 CONFIG_USB_MUSB_HCD
6358 CONFIG_USB_MUSB_OMAP2PLUS 6353 CONFIG_USB_MUSB_OMAP2PLUS
6359 CONFIG_USB_MUSB_PIO_ONLY 6354 CONFIG_USB_MUSB_PIO_ONLY
6360 CONFIG_USB_MUSB_TIMEOUT 6355 CONFIG_USB_MUSB_TIMEOUT
6361 CONFIG_USB_MUSB_TUSB6010 6356 CONFIG_USB_MUSB_TUSB6010
6362 CONFIG_USB_MUSB_UDC 6357 CONFIG_USB_MUSB_UDC
6363 CONFIG_USB_MUSB_UDD 6358 CONFIG_USB_MUSB_UDD
6364 CONFIG_USB_OHCI 6359 CONFIG_USB_OHCI
6365 CONFIG_USB_OHCI_EP93XX 6360 CONFIG_USB_OHCI_EP93XX
6366 CONFIG_USB_OHCI_LPC32XX 6361 CONFIG_USB_OHCI_LPC32XX
6367 CONFIG_USB_OHCI_NEW 6362 CONFIG_USB_OHCI_NEW
6368 CONFIG_USB_OHCI_SUNXI 6363 CONFIG_USB_OHCI_SUNXI
6369 CONFIG_USB_OMAP3 6364 CONFIG_USB_OMAP3
6370 CONFIG_USB_OTG 6365 CONFIG_USB_OTG
6371 CONFIG_USB_OTG_BLACKLIST_HUB 6366 CONFIG_USB_OTG_BLACKLIST_HUB
6372 CONFIG_USB_PHY_CFG_BASE 6367 CONFIG_USB_PHY_CFG_BASE
6373 CONFIG_USB_PHY_TYPE 6368 CONFIG_USB_PHY_TYPE
6374 CONFIG_USB_PXA25X_SMALL 6369 CONFIG_USB_PXA25X_SMALL
6375 CONFIG_USB_R8A66597_HCD 6370 CONFIG_USB_R8A66597_HCD
6376 CONFIG_USB_SERIALNO 6371 CONFIG_USB_SERIALNO
6377 CONFIG_USB_SS_BASE 6372 CONFIG_USB_SS_BASE
6378 CONFIG_USB_TI_CPPI_DMA 6373 CONFIG_USB_TI_CPPI_DMA
6379 CONFIG_USB_TTY 6374 CONFIG_USB_TTY
6380 CONFIG_USB_TUSB_OMAP_DMA 6375 CONFIG_USB_TUSB_OMAP_DMA
6381 CONFIG_USB_UHCI 6376 CONFIG_USB_UHCI
6382 CONFIG_USB_ULPI_TIMEOUT 6377 CONFIG_USB_ULPI_TIMEOUT
6383 CONFIG_USB_XHCI_EXYNOS 6378 CONFIG_USB_XHCI_EXYNOS
6384 CONFIG_USB_XHCI_FSL 6379 CONFIG_USB_XHCI_FSL
6385 CONFIG_USB_XHCI_KEYSTONE 6380 CONFIG_USB_XHCI_KEYSTONE
6386 CONFIG_USB_XHCI_OMAP 6381 CONFIG_USB_XHCI_OMAP
6387 CONFIG_USB_XHCI_PCI 6382 CONFIG_USB_XHCI_PCI
6388 CONFIG_USER_LOWLEVEL_INIT 6383 CONFIG_USER_LOWLEVEL_INIT
6389 CONFIG_USE_FDT 6384 CONFIG_USE_FDT
6390 CONFIG_USE_INTERRUPT 6385 CONFIG_USE_INTERRUPT
6391 CONFIG_USE_NAND 6386 CONFIG_USE_NAND
6392 CONFIG_USE_NETDEV 6387 CONFIG_USE_NETDEV
6393 CONFIG_USE_NOR 6388 CONFIG_USE_NOR
6394 CONFIG_USE_ONENAND_BOARD_INIT 6389 CONFIG_USE_ONENAND_BOARD_INIT
6395 CONFIG_USE_SPIFLASH 6390 CONFIG_USE_SPIFLASH
6396 CONFIG_USE_STDINT 6391 CONFIG_USE_STDINT
6397 CONFIG_USE_TTY 6392 CONFIG_USE_TTY
6398 CONFIG_UTBIPAR_INIT_TBIPA 6393 CONFIG_UTBIPAR_INIT_TBIPA
6399 CONFIG_U_BOOT_HDR_ADDR 6394 CONFIG_U_BOOT_HDR_ADDR
6400 CONFIG_U_BOOT_HDR_SIZE 6395 CONFIG_U_BOOT_HDR_SIZE
6401 CONFIG_U_QE 6396 CONFIG_U_QE
6402 CONFIG_V38B 6397 CONFIG_V38B
6403 CONFIG_VAL 6398 CONFIG_VAL
6404 CONFIG_VAR_SIZE_SPL 6399 CONFIG_VAR_SIZE_SPL
6405 CONFIG_VCT_NOR 6400 CONFIG_VCT_NOR
6406 CONFIG_VE8313 6401 CONFIG_VE8313
6407 CONFIG_VERY_BIG_RAM 6402 CONFIG_VERY_BIG_RAM
6408 CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP 6403 CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP
6409 CONFIG_VEXPRESS_ORIGINAL_MEMORY_MAP 6404 CONFIG_VEXPRESS_ORIGINAL_MEMORY_MAP
6410 CONFIG_VID 6405 CONFIG_VID
6411 CONFIG_VIDEO_BCM2835 6406 CONFIG_VIDEO_BCM2835
6412 CONFIG_VIDEO_BMP_GZIP 6407 CONFIG_VIDEO_BMP_GZIP
6413 CONFIG_VIDEO_BMP_LOGO 6408 CONFIG_VIDEO_BMP_LOGO
6414 CONFIG_VIDEO_BMP_RLE8 6409 CONFIG_VIDEO_BMP_RLE8
6415 CONFIG_VIDEO_CORALP 6410 CONFIG_VIDEO_CORALP
6416 CONFIG_VIDEO_DA8XX 6411 CONFIG_VIDEO_DA8XX
6417 CONFIG_VIDEO_DT_SIMPLEFB 6412 CONFIG_VIDEO_DT_SIMPLEFB
6418 CONFIG_VIDEO_FONT_4X6 6413 CONFIG_VIDEO_FONT_4X6
6419 CONFIG_VIDEO_LCD_I2C_BUS 6414 CONFIG_VIDEO_LCD_I2C_BUS
6420 CONFIG_VIDEO_LOGO 6415 CONFIG_VIDEO_LOGO
6421 CONFIG_VIDEO_MB862xx 6416 CONFIG_VIDEO_MB862xx
6422 CONFIG_VIDEO_MB862xx_ACCEL 6417 CONFIG_VIDEO_MB862xx_ACCEL
6423 CONFIG_VIDEO_MX3 6418 CONFIG_VIDEO_MX3
6424 CONFIG_VIDEO_MXS 6419 CONFIG_VIDEO_MXS
6425 CONFIG_VIDEO_MXS_MODE_SYSTEM 6420 CONFIG_VIDEO_MXS_MODE_SYSTEM
6426 CONFIG_VIDEO_OMAP3 6421 CONFIG_VIDEO_OMAP3
6427 CONFIG_VIDEO_ONBOARD 6422 CONFIG_VIDEO_ONBOARD
6428 CONFIG_VIDEO_SM501 6423 CONFIG_VIDEO_SM501
6429 CONFIG_VIDEO_SM501_16BPP 6424 CONFIG_VIDEO_SM501_16BPP
6430 CONFIG_VIDEO_SM501_32BPP 6425 CONFIG_VIDEO_SM501_32BPP
6431 CONFIG_VIDEO_SM501_8BPP 6426 CONFIG_VIDEO_SM501_8BPP
6432 CONFIG_VIDEO_SM501_PCI 6427 CONFIG_VIDEO_SM501_PCI
6433 CONFIG_VIDEO_STD_TIMINGS 6428 CONFIG_VIDEO_STD_TIMINGS
6434 CONFIG_VIDEO_SUNXI 6429 CONFIG_VIDEO_SUNXI
6435 CONFIG_VIDEO_VCXK 6430 CONFIG_VIDEO_VCXK
6436 CONFIG_VID_FLS_ENV 6431 CONFIG_VID_FLS_ENV
6437 CONFIG_VM86 6432 CONFIG_VM86
6438 CONFIG_VME8349 6433 CONFIG_VME8349
6439 CONFIG_VOIPAC_LCD 6434 CONFIG_VOIPAC_LCD
6440 CONFIG_VOL_MONITOR_INA220 6435 CONFIG_VOL_MONITOR_INA220
6441 CONFIG_VOL_MONITOR_IR36021_READ 6436 CONFIG_VOL_MONITOR_IR36021_READ
6442 CONFIG_VOL_MONITOR_IR36021_SET 6437 CONFIG_VOL_MONITOR_IR36021_SET
6443 CONFIG_VOM405 6438 CONFIG_VOM405
6444 CONFIG_VSC7385_ENET 6439 CONFIG_VSC7385_ENET
6445 CONFIG_VSC7385_IMAGE 6440 CONFIG_VSC7385_IMAGE
6446 CONFIG_VSC7385_IMAGE_SIZE 6441 CONFIG_VSC7385_IMAGE_SIZE
6447 CONFIG_VSC9953 6442 CONFIG_VSC9953
6448 CONFIG_VSC_CROSSBAR 6443 CONFIG_VSC_CROSSBAR
6449 CONFIG_WALNUT 6444 CONFIG_WALNUT
6450 CONFIG_WATCHDOG 6445 CONFIG_WATCHDOG
6451 CONFIG_WATCHDOG_BASEADDR 6446 CONFIG_WATCHDOG_BASEADDR
6452 CONFIG_WATCHDOG_IRQ 6447 CONFIG_WATCHDOG_IRQ
6453 CONFIG_WATCHDOG_NOWAYOUT 6448 CONFIG_WATCHDOG_NOWAYOUT
6454 CONFIG_WATCHDOG_PRESC 6449 CONFIG_WATCHDOG_PRESC
6455 CONFIG_WATCHDOG_RC 6450 CONFIG_WATCHDOG_RC
6456 CONFIG_WATCHDOG_TIMEOUT 6451 CONFIG_WATCHDOG_TIMEOUT
6457 CONFIG_WATCHDOG_TIMEOUT_MSECS 6452 CONFIG_WATCHDOG_TIMEOUT_MSECS
6458 CONFIG_WDOG_GPIO_PIN 6453 CONFIG_WDOG_GPIO_PIN
6459 CONFIG_WD_MAX_RATE 6454 CONFIG_WD_MAX_RATE
6460 CONFIG_WD_PERIOD 6455 CONFIG_WD_PERIOD
6461 CONFIG_X600 6456 CONFIG_X600
6462 CONFIG_X86EMU_DEBUG 6457 CONFIG_X86EMU_DEBUG
6463 CONFIG_X86EMU_RAW_IO 6458 CONFIG_X86EMU_RAW_IO
6464 CONFIG_X86_MRC_ADDR 6459 CONFIG_X86_MRC_ADDR
6465 CONFIG_X86_REFCODE_ADDR 6460 CONFIG_X86_REFCODE_ADDR
6466 CONFIG_X86_REFCODE_RUN_ADDR 6461 CONFIG_X86_REFCODE_RUN_ADDR
6467 CONFIG_XGI_XG22_BASE 6462 CONFIG_XGI_XG22_BASE
6468 CONFIG_XILINX_405 6463 CONFIG_XILINX_405
6469 CONFIG_XILINX_440 6464 CONFIG_XILINX_440
6470 CONFIG_XILINX_GPIO 6465 CONFIG_XILINX_GPIO
6471 CONFIG_XILINX_LL_TEMAC 6466 CONFIG_XILINX_LL_TEMAC
6472 CONFIG_XILINX_LL_TEMAC_CLK 6467 CONFIG_XILINX_LL_TEMAC_CLK
6473 CONFIG_XILINX_PPC440_GENERIC 6468 CONFIG_XILINX_PPC440_GENERIC
6474 CONFIG_XILINX_SPI_IDLE_VAL 6469 CONFIG_XILINX_SPI_IDLE_VAL
6475 CONFIG_XILINX_TB_WATCHDOG 6470 CONFIG_XILINX_TB_WATCHDOG
6476 CONFIG_XPEDITE1000 6471 CONFIG_XPEDITE1000
6477 CONFIG_XPEDITE5140 6472 CONFIG_XPEDITE5140
6478 CONFIG_XPEDITE5200 6473 CONFIG_XPEDITE5200
6479 CONFIG_XPEDITE550X 6474 CONFIG_XPEDITE550X
6480 CONFIG_XR16L2751 6475 CONFIG_XR16L2751
6481 CONFIG_XSENGINE 6476 CONFIG_XSENGINE
6482 CONFIG_XTFPGA 6477 CONFIG_XTFPGA
6483 CONFIG_YAFFSFS_PROVIDE_VALUES 6478 CONFIG_YAFFSFS_PROVIDE_VALUES
6484 CONFIG_YAFFS_AUTO_UNICODE 6479 CONFIG_YAFFS_AUTO_UNICODE
6485 CONFIG_YAFFS_CASE_INSENSITIVE 6480 CONFIG_YAFFS_CASE_INSENSITIVE
6486 CONFIG_YAFFS_DEFINES_TYPES 6481 CONFIG_YAFFS_DEFINES_TYPES
6487 CONFIG_YAFFS_DIRECT 6482 CONFIG_YAFFS_DIRECT
6488 CONFIG_YAFFS_PROVIDE_DEFS 6483 CONFIG_YAFFS_PROVIDE_DEFS
6489 CONFIG_YAFFS_UNICODE 6484 CONFIG_YAFFS_UNICODE
6490 CONFIG_YAFFS_UTIL 6485 CONFIG_YAFFS_UTIL
6491 CONFIG_YAFFS_WINCE 6486 CONFIG_YAFFS_WINCE
6492 CONFIG_YELLOWSTONE 6487 CONFIG_YELLOWSTONE
6493 CONFIG_YELLOW_LED 6488 CONFIG_YELLOW_LED
6494 CONFIG_YOSEMITE 6489 CONFIG_YOSEMITE
6495 CONFIG_ZC770_XM010 6490 CONFIG_ZC770_XM010
6496 CONFIG_ZC770_XM011 6491 CONFIG_ZC770_XM011
6497 CONFIG_ZC770_XM012 6492 CONFIG_ZC770_XM012
6498 CONFIG_ZC770_XM013 6493 CONFIG_ZC770_XM013
6499 CONFIG_ZLIB 6494 CONFIG_ZLIB
6500 CONFIG_ZLT 6495 CONFIG_ZLT
6501 CONFIG_ZM7300 6496 CONFIG_ZM7300
6502 CONFIG_ZYNQMP_EEPROM 6497 CONFIG_ZYNQMP_EEPROM
6503 CONFIG_ZYNQMP_XHCI_LIST 6498 CONFIG_ZYNQMP_XHCI_LIST
6504 CONFIG_ZYNQ_EEPROM 6499 CONFIG_ZYNQ_EEPROM
6505 CONFIG_ZYNQ_EEPROM_BUS 6500 CONFIG_ZYNQ_EEPROM_BUS
6506 CONFIG_ZYNQ_GEM_EEPROM_ADDR 6501 CONFIG_ZYNQ_GEM_EEPROM_ADDR
6507 CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET 6502 CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET
6508 CONFIG_ZYNQ_HISPD_BROKEN 6503 CONFIG_ZYNQ_HISPD_BROKEN
6509 CONFIG_ZYNQ_I2C0 6504 CONFIG_ZYNQ_I2C0
6510 CONFIG_ZYNQ_I2C1 6505 CONFIG_ZYNQ_I2C1
6511 CONFIG_ZYNQ_SDHCI0 6506 CONFIG_ZYNQ_SDHCI0
6512 CONFIG_ZYNQ_SDHCI1 6507 CONFIG_ZYNQ_SDHCI1
6513 CONFIG_ZYNQ_SDHCI_MAX_FREQ 6508 CONFIG_ZYNQ_SDHCI_MAX_FREQ
6514 CONFIG_ZYNQ_SDHCI_MIN_FREQ 6509 CONFIG_ZYNQ_SDHCI_MIN_FREQ
6515 CONFIG_ZYNQ_SERIAL 6510 CONFIG_ZYNQ_SERIAL
6516 CONFIG_eTSEC_MDIO_BUS 6511 CONFIG_eTSEC_MDIO_BUS
6517 6512