Eric Lee / smarc-uboot

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Commit 6c6206ad1a5a3c70118a3ecf526b0ff00088adf7

Authored by Ye Li
1 parent 54a97f3180
Exists in smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga and in 5 other branches smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga

MLK-18243-17: arm: mach-imx: fix sd to mmc1 and emmc to mmc2 for i.MX8MM 

Since the SD is usdhc2 and eMMC is usdhc3, this cause mapping problem
for spl_boot_device. So far hard coded them to correct MMC index, so
that SD and eMMC boot can work.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 3e4123fb3d6945a466563f4505a56bb0ea6f4ca0)

Showing 1 changed file with 11 additions and 0 deletions Inline Diff

arch/arm/mach-imx/spl.c
Diff comments   View file @ 6c6206a
1 /* 1 /*
2 * Copyright (C) 2014 Gateworks Corporation 2 * Copyright (C) 2014 Gateworks Corporation
3 * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. 3 * Copyright (C) 2011-2012 Freescale Semiconductor, Inc.
4 * 4 *
5 * Author: Tim Harvey <tharvey@gateworks.com> 5 * Author: Tim Harvey <tharvey@gateworks.com>
6 * 6 *
7 * SPDX-License-Identifier: GPL-2.0+ 7 * SPDX-License-Identifier: GPL-2.0+
8 */ 8 */
9 9
10 #include <common.h> 10 #include <common.h>
11 #include <asm/io.h> 11 #include <asm/io.h>
12 #include <asm/arch/imx-regs.h> 12 #include <asm/arch/imx-regs.h>
13 #include <asm/arch/sys_proto.h> 13 #include <asm/arch/sys_proto.h>
14 #include <asm/spl.h> 14 #include <asm/spl.h>
15 #include <spl.h> 15 #include <spl.h>
16 #include <asm/mach-imx/hab.h> 16 #include <asm/mach-imx/hab.h>
17 #include <asm/mach-imx/boot_mode.h> 17 #include <asm/mach-imx/boot_mode.h>
18 #include <g_dnl.h> 18 #include <g_dnl.h>
19 19
20 DECLARE_GLOBAL_DATA_PTR; 20 DECLARE_GLOBAL_DATA_PTR;
21 21
22 #if defined(CONFIG_MX6) 22 #if defined(CONFIG_MX6)
23 /* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */ 23 /* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */
24 u32 spl_boot_device(void) 24 u32 spl_boot_device(void)
25 { 25 {
26 unsigned int bmode = readl(&src_base->sbmr2); 26 unsigned int bmode = readl(&src_base->sbmr2);
27 u32 reg = imx6_src_get_boot_mode(); 27 u32 reg = imx6_src_get_boot_mode();
28 28
29 /* 29 /*
30 * Check for BMODE if serial downloader is enabled 30 * Check for BMODE if serial downloader is enabled
31 * BOOT_MODE - see IMX6DQRM Table 8-1 31 * BOOT_MODE - see IMX6DQRM Table 8-1
32 */ 32 */
33 if (((bmode >> 24) & 0x03) == 0x01) /* Serial Downloader */ 33 if (((bmode >> 24) & 0x03) == 0x01) /* Serial Downloader */
34 return BOOT_DEVICE_BOARD; 34 return BOOT_DEVICE_BOARD;
35 35
36 /* 36 /*
37 * The above method does not detect that the boot ROM used 37 * The above method does not detect that the boot ROM used
38 * serial downloader in case the boot ROM decided to use the 38 * serial downloader in case the boot ROM decided to use the
39 * serial downloader as a fall back (primary boot source failed). 39 * serial downloader as a fall back (primary boot source failed).
40 * 40 *
41 * Infer that the boot ROM used the USB serial downloader by 41 * Infer that the boot ROM used the USB serial downloader by
42 * checking whether the USB PHY is currently active... This 42 * checking whether the USB PHY is currently active... This
43 * assumes that SPL did not (yet) initialize the USB PHY... 43 * assumes that SPL did not (yet) initialize the USB PHY...
44 */ 44 */
45 if (is_usbotg_phy_active()) 45 if (is_usbotg_phy_active())
46 return BOOT_DEVICE_BOARD; 46 return BOOT_DEVICE_BOARD;
47 47
48 /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */ 48 /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
49 switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) { 49 switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {
50 /* EIM: See 8.5.1, Table 8-9 */ 50 /* EIM: See 8.5.1, Table 8-9 */
51 case IMX6_BMODE_EMI: 51 case IMX6_BMODE_EMI:
52 /* BOOT_CFG1[3]: NOR/OneNAND Selection */ 52 /* BOOT_CFG1[3]: NOR/OneNAND Selection */
53 switch ((reg & IMX6_BMODE_EMI_MASK) >> IMX6_BMODE_EMI_SHIFT) { 53 switch ((reg & IMX6_BMODE_EMI_MASK) >> IMX6_BMODE_EMI_SHIFT) {
54 case IMX6_BMODE_ONENAND: 54 case IMX6_BMODE_ONENAND:
55 return BOOT_DEVICE_ONENAND; 55 return BOOT_DEVICE_ONENAND;
56 case IMX6_BMODE_NOR: 56 case IMX6_BMODE_NOR:
57 return BOOT_DEVICE_NOR; 57 return BOOT_DEVICE_NOR;
58 break; 58 break;
59 } 59 }
60 /* Reserved: Used to force Serial Downloader */ 60 /* Reserved: Used to force Serial Downloader */
61 case IMX6_BMODE_RESERVED: 61 case IMX6_BMODE_RESERVED:
62 return BOOT_DEVICE_BOARD; 62 return BOOT_DEVICE_BOARD;
63 /* SATA: See 8.5.4, Table 8-20 */ 63 /* SATA: See 8.5.4, Table 8-20 */
64 #if !defined(CONFIG_MX6UL) && !defined(CONFIG_MX6ULL) 64 #if !defined(CONFIG_MX6UL) && !defined(CONFIG_MX6ULL)
65 case IMX6_BMODE_SATA: 65 case IMX6_BMODE_SATA:
66 return BOOT_DEVICE_SATA; 66 return BOOT_DEVICE_SATA;
67 #endif 67 #endif
68 /* Serial ROM: See 8.5.5.1, Table 8-22 */ 68 /* Serial ROM: See 8.5.5.1, Table 8-22 */
69 case IMX6_BMODE_SERIAL_ROM: 69 case IMX6_BMODE_SERIAL_ROM:
70 /* BOOT_CFG4[2:0] */ 70 /* BOOT_CFG4[2:0] */
71 switch ((reg & IMX6_BMODE_SERIAL_ROM_MASK) >> 71 switch ((reg & IMX6_BMODE_SERIAL_ROM_MASK) >>
72 IMX6_BMODE_SERIAL_ROM_SHIFT) { 72 IMX6_BMODE_SERIAL_ROM_SHIFT) {
73 case IMX6_BMODE_ECSPI1: 73 case IMX6_BMODE_ECSPI1:
74 case IMX6_BMODE_ECSPI2: 74 case IMX6_BMODE_ECSPI2:
75 case IMX6_BMODE_ECSPI3: 75 case IMX6_BMODE_ECSPI3:
76 case IMX6_BMODE_ECSPI4: 76 case IMX6_BMODE_ECSPI4:
77 case IMX6_BMODE_ECSPI5: 77 case IMX6_BMODE_ECSPI5:
78 return BOOT_DEVICE_SPI; 78 return BOOT_DEVICE_SPI;
79 case IMX6_BMODE_I2C1: 79 case IMX6_BMODE_I2C1:
80 case IMX6_BMODE_I2C2: 80 case IMX6_BMODE_I2C2:
81 case IMX6_BMODE_I2C3: 81 case IMX6_BMODE_I2C3:
82 return BOOT_DEVICE_I2C; 82 return BOOT_DEVICE_I2C;
83 } 83 }
84 break; 84 break;
85 /* SD/eSD: 8.5.3, Table 8-15 */ 85 /* SD/eSD: 8.5.3, Table 8-15 */
86 case IMX6_BMODE_SD: 86 case IMX6_BMODE_SD:
87 case IMX6_BMODE_ESD: 87 case IMX6_BMODE_ESD:
88 return BOOT_DEVICE_MMC1; 88 return BOOT_DEVICE_MMC1;
89 /* MMC/eMMC: 8.5.3 */ 89 /* MMC/eMMC: 8.5.3 */
90 case IMX6_BMODE_MMC: 90 case IMX6_BMODE_MMC:
91 case IMX6_BMODE_EMMC: 91 case IMX6_BMODE_EMMC:
92 return BOOT_DEVICE_MMC1; 92 return BOOT_DEVICE_MMC1;
93 /* NAND Flash: 8.5.2, Table 8-10 */ 93 /* NAND Flash: 8.5.2, Table 8-10 */
94 case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX: 94 case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX:
95 return BOOT_DEVICE_NAND; 95 return BOOT_DEVICE_NAND;
96 } 96 }
97 return BOOT_DEVICE_NONE; 97 return BOOT_DEVICE_NONE;
98 } 98 }
99 99
100 #elif defined(CONFIG_MX7) || defined(CONFIG_IMX8M) 100 #elif defined(CONFIG_MX7) || defined(CONFIG_IMX8M)
101 /* Translate iMX7/iMX8M boot device to the SPL boot device enumeration */ 101 /* Translate iMX7/iMX8M boot device to the SPL boot device enumeration */
102 u32 spl_boot_device(void) 102 u32 spl_boot_device(void)
103 { 103 {
104 enum boot_device boot_device_spl = get_boot_device(); 104 enum boot_device boot_device_spl = get_boot_device();
105 105
106 switch (boot_device_spl) { 106 switch (boot_device_spl) {
107 #if defined(CONFIG_MX7) 107 #if defined(CONFIG_MX7)
108 case SD1_BOOT: 108 case SD1_BOOT:
109 case MMC1_BOOT: 109 case MMC1_BOOT:
110 case SD2_BOOT: 110 case SD2_BOOT:
111 case MMC2_BOOT: 111 case MMC2_BOOT:
112 case SD3_BOOT: 112 case SD3_BOOT:
113 case MMC3_BOOT: 113 case MMC3_BOOT:
114 return BOOT_DEVICE_MMC1; 114 return BOOT_DEVICE_MMC1;
115 #elif defined(CONFIG_IMX8M) 115 #elif defined(CONFIG_IMX8M)
116 case SD1_BOOT: 116 case SD1_BOOT:
117 case MMC1_BOOT: 117 case MMC1_BOOT:
118 return BOOT_DEVICE_MMC1; 118 return BOOT_DEVICE_MMC1;
119 #if defined(CONFIG_IMX8MM)
119 case SD2_BOOT: 120 case SD2_BOOT:
120 case MMC2_BOOT: 121 case MMC2_BOOT:
122 return BOOT_DEVICE_MMC1;
123 case SD3_BOOT:
124 case MMC3_BOOT:
121 return BOOT_DEVICE_MMC2; 125 return BOOT_DEVICE_MMC2;
126 #else
127 case SD2_BOOT:
128 case MMC2_BOOT:
129 return BOOT_DEVICE_MMC2;
122 #endif 130 #endif
131 #endif
123 case NAND_BOOT: 132 case NAND_BOOT:
124 return BOOT_DEVICE_NAND; 133 return BOOT_DEVICE_NAND;
125 case SPI_NOR_BOOT: 134 case SPI_NOR_BOOT:
126 return BOOT_DEVICE_SPI; 135 return BOOT_DEVICE_SPI;
127 case USB_BOOT: 136 case USB_BOOT:
128 return BOOT_DEVICE_USB; 137 return BOOT_DEVICE_USB;
129 default: 138 default:
130 return BOOT_DEVICE_NONE; 139 return BOOT_DEVICE_NONE;
131 } 140 }
132 } 141 }
133 #endif /* CONFIG_MX6 || CONFIG_MX7 || CONFIG_IMX8M */ 142 #endif /* CONFIG_MX6 || CONFIG_MX7 || CONFIG_IMX8M */
134 143
135 #ifdef CONFIG_SPL_USB_GADGET_SUPPORT 144 #ifdef CONFIG_SPL_USB_GADGET_SUPPORT
136 int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) 145 int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
137 { 146 {
138 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM + 0xfff, &dev->idProduct); 147 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM + 0xfff, &dev->idProduct);
139 148
140 return 0; 149 return 0;
141 } 150 }
142 #endif 151 #endif
143 152
144 #if defined(CONFIG_SPL_MMC_SUPPORT) 153 #if defined(CONFIG_SPL_MMC_SUPPORT)
145 /* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */ 154 /* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */
146 u32 spl_boot_mode(const u32 boot_device) 155 u32 spl_boot_mode(const u32 boot_device)
147 { 156 {
148 #if defined(CONFIG_MX7) || defined(CONFIG_IMX8M) 157 #if defined(CONFIG_MX7) || defined(CONFIG_IMX8M)
149 switch (get_boot_device()) { 158 switch (get_boot_device()) {
150 /* for MMC return either RAW or FAT mode */ 159 /* for MMC return either RAW or FAT mode */
151 case SD1_BOOT: 160 case SD1_BOOT:
152 case SD2_BOOT: 161 case SD2_BOOT:
162 case SD3_BOOT:
153 #if defined(CONFIG_SPL_FAT_SUPPORT) 163 #if defined(CONFIG_SPL_FAT_SUPPORT)
154 return MMCSD_MODE_FS; 164 return MMCSD_MODE_FS;
155 #else 165 #else
156 return MMCSD_MODE_RAW; 166 return MMCSD_MODE_RAW;
157 #endif 167 #endif
158 break; 168 break;
159 case MMC1_BOOT: 169 case MMC1_BOOT:
160 case MMC2_BOOT: 170 case MMC2_BOOT:
171 case MMC3_BOOT:
161 #if defined(CONFIG_SPL_FAT_SUPPORT) 172 #if defined(CONFIG_SPL_FAT_SUPPORT)
162 return MMCSD_MODE_FS; 173 return MMCSD_MODE_FS;
163 #elif defined(CONFIG_SUPPORT_EMMC_BOOT) 174 #elif defined(CONFIG_SUPPORT_EMMC_BOOT)
164 return MMCSD_MODE_EMMCBOOT; 175 return MMCSD_MODE_EMMCBOOT;
165 #else 176 #else
166 return MMCSD_MODE_RAW; 177 return MMCSD_MODE_RAW;
167 #endif 178 #endif
168 break; 179 break;
169 default: 180 default:
170 puts("spl: ERROR: unsupported device\n"); 181 puts("spl: ERROR: unsupported device\n");
171 hang(); 182 hang();
172 } 183 }
173 184
174 #else /* defined(CONFIG_MX7) || defined(CONFIG_IMX8M) */ 185 #else /* defined(CONFIG_MX7) || defined(CONFIG_IMX8M) */
175 switch (spl_boot_device()) { 186 switch (spl_boot_device()) {
176 /* for MMC return either RAW or FAT mode */ 187 /* for MMC return either RAW or FAT mode */
177 case BOOT_DEVICE_MMC1: 188 case BOOT_DEVICE_MMC1:
178 case BOOT_DEVICE_MMC2: 189 case BOOT_DEVICE_MMC2:
179 #if defined(CONFIG_SPL_FAT_SUPPORT) 190 #if defined(CONFIG_SPL_FAT_SUPPORT)
180 return MMCSD_MODE_FS; 191 return MMCSD_MODE_FS;
181 #elif defined(CONFIG_SUPPORT_EMMC_BOOT) 192 #elif defined(CONFIG_SUPPORT_EMMC_BOOT)
182 return MMCSD_MODE_EMMCBOOT; 193 return MMCSD_MODE_EMMCBOOT;
183 #else 194 #else
184 return MMCSD_MODE_RAW; 195 return MMCSD_MODE_RAW;
185 #endif 196 #endif
186 break; 197 break;
187 default: 198 default:
188 puts("spl: ERROR: unsupported device\n"); 199 puts("spl: ERROR: unsupported device\n");
189 hang(); 200 hang();
190 } 201 }
191 #endif 202 #endif
192 } 203 }
193 #endif 204 #endif
194 205
195 #if defined(CONFIG_SECURE_BOOT) 206 #if defined(CONFIG_SECURE_BOOT)
196 207
197 /* 208 /*
198 * +------------+ 0x0 (DDR_UIMAGE_START) - 209 * +------------+ 0x0 (DDR_UIMAGE_START) -
199 * | Header | | 210 * | Header | |
200 * +------------+ 0x40 | 211 * +------------+ 0x40 |
201 * | | | 212 * | | |
202 * | | | 213 * | | |
203 * | | | 214 * | | |
204 * | | | 215 * | | |
205 * | Image Data | | 216 * | Image Data | |
206 * . | | 217 * . | |
207 * . | > Stuff to be authenticated ----+ 218 * . | > Stuff to be authenticated ----+
208 * . | | | 219 * . | | |
209 * | | | | 220 * | | | |
210 * | | | | 221 * | | | |
211 * +------------+ | | 222 * +------------+ | |
212 * | | | | 223 * | | | |
213 * | Fill Data | | | 224 * | Fill Data | | |
214 * | | | | 225 * | | | |
215 * +------------+ Align to ALIGN_SIZE | | 226 * +------------+ Align to ALIGN_SIZE | |
216 * | IVT | | | 227 * | IVT | | |
217 * +------------+ + IVT_SIZE - | 228 * +------------+ + IVT_SIZE - |
218 * | | | 229 * | | |
219 * | CSF DATA | <---------------------------------------------------------+ 230 * | CSF DATA | <---------------------------------------------------------+
220 * | | 231 * | |
221 * +------------+ 232 * +------------+
222 * | | 233 * | |
223 * | Fill Data | 234 * | Fill Data |
224 * | | 235 * | |
225 * +------------+ + CSF_PAD_SIZE 236 * +------------+ + CSF_PAD_SIZE
226 */ 237 */
227 238
228 __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) 239 __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
229 { 240 {
230 typedef void __noreturn (*image_entry_noargs_t)(void); 241 typedef void __noreturn (*image_entry_noargs_t)(void);
231 uint32_t offset; 242 uint32_t offset;
232 243
233 image_entry_noargs_t image_entry = 244 image_entry_noargs_t image_entry =
234 (image_entry_noargs_t)(unsigned long)spl_image->entry_point; 245 (image_entry_noargs_t)(unsigned long)spl_image->entry_point;
235 246
236 debug("image entry point: 0x%lX\n", spl_image->entry_point); 247 debug("image entry point: 0x%lX\n", spl_image->entry_point);
237 248
238 if (spl_image->flags & SPL_FIT_FOUND) { 249 if (spl_image->flags & SPL_FIT_FOUND) {
239 image_entry(); 250 image_entry();
240 } else { 251 } else {
241 /* HAB looks for the CSF at the end of the authenticated data therefore, 252 /* HAB looks for the CSF at the end of the authenticated data therefore,
242 * we need to subtract the size of the CSF from the actual filesize */ 253 * we need to subtract the size of the CSF from the actual filesize */
243 offset = spl_image->size - CONFIG_CSF_SIZE; 254 offset = spl_image->size - CONFIG_CSF_SIZE;
244 if (!imx_hab_authenticate_image(spl_image->load_addr, 255 if (!imx_hab_authenticate_image(spl_image->load_addr,
245 offset + IVT_SIZE + CSF_PAD_SIZE, 256 offset + IVT_SIZE + CSF_PAD_SIZE,
246 offset)) { 257 offset)) {
247 image_entry(); 258 image_entry();
248 } else { 259 } else {
249 puts("spl: ERROR: image authentication unsuccessful\n"); 260 puts("spl: ERROR: image authentication unsuccessful\n");
250 hang(); 261 hang();
251 } 262 }
252 } 263 }
253 } 264 }
254 265
255 ulong board_spl_fit_size_align(ulong size) 266 ulong board_spl_fit_size_align(ulong size)
256 { 267 {
257 /* HAB authenticate_image requests the IVT offset is aligned to 0x1000 */ 268 /* HAB authenticate_image requests the IVT offset is aligned to 0x1000 */
258 #define ALIGN_SIZE 0x1000 269 #define ALIGN_SIZE 0x1000
259 270
260 size = ALIGN(size, ALIGN_SIZE); 271 size = ALIGN(size, ALIGN_SIZE);
261 size += CONFIG_CSF_SIZE; 272 size += CONFIG_CSF_SIZE;
262 273
263 return size; 274 return size;
264 } 275 }
265 276
266 void board_spl_fit_post_load(ulong load_addr, size_t length) 277 void board_spl_fit_post_load(ulong load_addr, size_t length)
267 { 278 {
268 uint32_t offset = length - CONFIG_CSF_SIZE; 279 uint32_t offset = length - CONFIG_CSF_SIZE;
269 if (imx_hab_authenticate_image(load_addr, 280 if (imx_hab_authenticate_image(load_addr,
270 offset + IVT_SIZE + CSF_PAD_SIZE, 281 offset + IVT_SIZE + CSF_PAD_SIZE,
271 offset)) { 282 offset)) {
272 puts("spl: ERROR: image authentication unsuccessful\n"); 283 puts("spl: ERROR: image authentication unsuccessful\n");
273 hang(); 284 hang();
274 } 285 }
275 } 286 }
276 #endif 287 #endif
277 288
278 #if defined(CONFIG_MX6) && defined(CONFIG_SPL_OS_BOOT) 289 #if defined(CONFIG_MX6) && defined(CONFIG_SPL_OS_BOOT)
279 int dram_init_banksize(void) 290 int dram_init_banksize(void)
280 { 291 {
281 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 292 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
282 gd->bd->bi_dram[0].size = imx_ddr_size(); 293 gd->bd->bi_dram[0].size = imx_ddr_size();
283 294
284 return 0; 295 return 0;
285 } 296 }
286 #endif 297 #endif
287 298