Eric Lee / smarc-uboot

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Commit 7004df470b907d5414fadf0aac70b6b65cdc68d8

Authored by Ye Li
1 parent ee67176677
Exists in smarc-rel_imx_4.1.15_2.0.0_ga

MLK-12775 mx6ullarm2: Add package size info to the build target and dtb file 

To align with i.MX6UL, add the chip package size info to the i.MX6ULL ARM2 board
build target and loading dtb file name. So that mfgtool and yocto can follow i.MX6UL
naming rule to process i.MX6ULL.

Signed-off-by: Ye Li <ye.li@nxp.com>

Showing 11 changed files with 26 additions and 26 deletions Inline Diff

configs/mx6ull_14x14_ddr3_arm2_defconfig
Diff comments   View file @ 7004df4
File was created 1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ull_ddr3_arm2/imximage.cfg"
2 CONFIG_ARM=y
3 CONFIG_ARCH_MX6=y
4 CONFIG_TARGET_MX6ULL_DDR3_ARM2=y
5 CONFIG_CMD_GPIO=y
configs/mx6ull_14x14_ddr3_arm2_emmc_defconfig
Diff comments   View file @ 7004df4
File was created 1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ull_ddr3_arm2/imximage.cfg,MX6ULL_DDR3_ARM2_EMMC_REWORK"
2 CONFIG_ARM=y
3 CONFIG_ARCH_MX6=y
4 CONFIG_TARGET_MX6ULL_DDR3_ARM2=y
5 CONFIG_CMD_GPIO=y
configs/mx6ull_14x14_ddr3_arm2_nand_defconfig
Diff comments   View file @ 7004df4
File was created 1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ull_ddr3_arm2/imximage.cfg,SYS_BOOT_NAND"
2 CONFIG_ARM=y
3 CONFIG_ARCH_MX6=y
4 CONFIG_TARGET_MX6ULL_DDR3_ARM2=y
5 CONFIG_CMD_GPIO=y
configs/mx6ull_14x14_ddr3_arm2_qspi1_defconfig
Diff comments   View file @ 7004df4
File was created 1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ull_ddr3_arm2/imximage.cfg,SYS_BOOT_QSPI"
2 CONFIG_ARM=y
3 CONFIG_ARCH_MX6=y
4 CONFIG_TARGET_MX6ULL_DDR3_ARM2=y
5 CONFIG_CMD_GPIO=y
configs/mx6ull_14x14_ddr3_arm2_spinor_defconfig
Diff comments   View file @ 7004df4
File was created 1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ull_ddr3_arm2/imximage.cfg,SYS_BOOT_SPINOR"
2 CONFIG_ARM=y
3 CONFIG_ARCH_MX6=y
4 CONFIG_TARGET_MX6ULL_DDR3_ARM2=y
5 CONFIG_CMD_GPIO=y
configs/mx6ull_ddr3_arm2_defconfig
View file @ 7004df4
1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ull_ddr3_arm2/imximage.cfg" File was deleted
2 CONFIG_ARM=y
3 CONFIG_ARCH_MX6=y
4 CONFIG_TARGET_MX6ULL_DDR3_ARM2=y
5 CONFIG_CMD_GPIO=y
configs/mx6ull_ddr3_arm2_emmc_defconfig
View file @ 7004df4
1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ull_ddr3_arm2/imximage.cfg,MX6ULL_DDR3_ARM2_EMMC_REWORK" File was deleted
2 CONFIG_ARM=y
3 CONFIG_ARCH_MX6=y
4 CONFIG_TARGET_MX6ULL_DDR3_ARM2=y
5 CONFIG_CMD_GPIO=y
configs/mx6ull_ddr3_arm2_nand_defconfig
View file @ 7004df4
1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ull_ddr3_arm2/imximage.cfg,SYS_BOOT_NAND" File was deleted
2 CONFIG_ARM=y
3 CONFIG_ARCH_MX6=y
4 CONFIG_TARGET_MX6ULL_DDR3_ARM2=y
5 CONFIG_CMD_GPIO=y
configs/mx6ull_ddr3_arm2_qspi1_defconfig
View file @ 7004df4
1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ull_ddr3_arm2/imximage.cfg,SYS_BOOT_QSPI" File was deleted
2 CONFIG_ARM=y
3 CONFIG_ARCH_MX6=y
4 CONFIG_TARGET_MX6ULL_DDR3_ARM2=y
5 CONFIG_CMD_GPIO=y
configs/mx6ull_ddr3_arm2_spinor_defconfig
View file @ 7004df4
1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ull_ddr3_arm2/imximage.cfg,SYS_BOOT_SPINOR" File was deleted
2 CONFIG_ARM=y
3 CONFIG_ARCH_MX6=y
4 CONFIG_TARGET_MX6ULL_DDR3_ARM2=y
5 CONFIG_CMD_GPIO=y
include/configs/mx6ull_ddr3_arm2.h
Diff comments   View file @ 7004df4
1 /* 1 /*
2 * Copyright (C) 2016 Freescale Semiconductor, Inc. 2 * Copyright (C) 2016 Freescale Semiconductor, Inc.
3 * 3 *
4 * Configuration settings for the Freescale i.MX6UL 14x14 DDR3 ARM2. 4 * Configuration settings for the Freescale i.MX6UL 14x14 DDR3 ARM2.
5 * 5 *
6 * SPDX-License-Identifier: GPL-2.0+ 6 * SPDX-License-Identifier: GPL-2.0+
7 */ 7 */
8 #ifndef __MX6ULL_DDR3_ARM2_CONFIG_H 8 #ifndef __MX6ULL_DDR3_ARM2_CONFIG_H
9 #define __MX6ULL_DDR3_ARM2_CONFIG_H 9 #define __MX6ULL_DDR3_ARM2_CONFIG_H
10 10
11 #define CONFIG_DEFAULT_FDT_FILE "imx6ull-ddr3-arm2.dtb" 11 #define CONFIG_DEFAULT_FDT_FILE "imx6ull-14x14-ddr3-arm2.dtb"
12 12
13 #ifdef CONFIG_SYS_BOOT_QSPI 13 #ifdef CONFIG_SYS_BOOT_QSPI
14 #define CONFIG_SYS_USE_QSPI 14 #define CONFIG_SYS_USE_QSPI
15 #define CONFIG_ENV_IS_IN_SPI_FLASH 15 #define CONFIG_ENV_IS_IN_SPI_FLASH
16 #elif defined CONFIG_SYS_BOOT_SPINOR 16 #elif defined CONFIG_SYS_BOOT_SPINOR
17 #define CONFIG_SYS_USE_SPINOR 17 #define CONFIG_SYS_USE_SPINOR
18 #define CONFIG_ENV_IS_IN_SPI_FLASH 18 #define CONFIG_ENV_IS_IN_SPI_FLASH
19 #elif defined CONFIG_SYS_BOOT_NAND 19 #elif defined CONFIG_SYS_BOOT_NAND
20 #define CONFIG_SYS_USE_NAND 20 #define CONFIG_SYS_USE_NAND
21 #define CONFIG_ENV_IS_IN_NAND 21 #define CONFIG_ENV_IS_IN_NAND
22 #else 22 #else
23 #ifndef CONFIG_MX6ULL_DDR3_ARM2_EMMC_REWORK 23 #ifndef CONFIG_MX6ULL_DDR3_ARM2_EMMC_REWORK
24 #define CONFIG_SYS_USE_QSPI 24 #define CONFIG_SYS_USE_QSPI
25 #endif 25 #endif
26 #define CONFIG_ENV_IS_IN_MMC 26 #define CONFIG_ENV_IS_IN_MMC
27 #endif 27 #endif
28 28
29 #define CONFIG_VIDEO 29 #define CONFIG_VIDEO
30 #define CONFIG_FSL_USDHC 30 #define CONFIG_FSL_USDHC
31 #define CONFIG_BOOTARGS_CMA_SIZE "" 31 #define CONFIG_BOOTARGS_CMA_SIZE ""
32 32
33 #include "mx6ul_arm2.h" 33 #include "mx6ul_arm2.h"
34 34
35 #define PHYS_SDRAM_SIZE SZ_1G 35 #define PHYS_SDRAM_SIZE SZ_1G
36 36
37 #ifdef CONFIG_SYS_USE_SPINOR 37 #ifdef CONFIG_SYS_USE_SPINOR
38 #define CONFIG_CMD_SF 38 #define CONFIG_CMD_SF
39 #define CONFIG_SPI_FLASH 39 #define CONFIG_SPI_FLASH
40 #define CONFIG_SPI_FLASH_STMICRO 40 #define CONFIG_SPI_FLASH_STMICRO
41 #define CONFIG_MXC_SPI 41 #define CONFIG_MXC_SPI
42 #define CONFIG_SF_DEFAULT_BUS 0 42 #define CONFIG_SF_DEFAULT_BUS 0
43 #define CONFIG_SF_DEFAULT_SPEED 20000000 43 #define CONFIG_SF_DEFAULT_SPEED 20000000
44 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 44 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
45 #define CONFIG_SF_DEFAULT_CS 0 45 #define CONFIG_SF_DEFAULT_CS 0
46 #endif 46 #endif
47 47
48 #ifdef CONFIG_CMD_NET 48 #ifdef CONFIG_CMD_NET
49 #define CONFIG_CMD_PING 49 #define CONFIG_CMD_PING
50 #define CONFIG_CMD_DHCP 50 #define CONFIG_CMD_DHCP
51 #define CONFIG_CMD_MII 51 #define CONFIG_CMD_MII
52 #define CONFIG_FEC_MXC 52 #define CONFIG_FEC_MXC
53 #define CONFIG_MII 53 #define CONFIG_MII
54 #define CONFIG_FEC_ENET_DEV 1 54 #define CONFIG_FEC_ENET_DEV 1
55 55
56 #if (CONFIG_FEC_ENET_DEV == 0) 56 #if (CONFIG_FEC_ENET_DEV == 0)
57 #define IMX_FEC_BASE ENET_BASE_ADDR 57 #define IMX_FEC_BASE ENET_BASE_ADDR
58 #define CONFIG_FEC_MXC_PHYADDR 0x1 58 #define CONFIG_FEC_MXC_PHYADDR 0x1
59 #define CONFIG_FEC_XCV_TYPE RMII 59 #define CONFIG_FEC_XCV_TYPE RMII
60 #elif (CONFIG_FEC_ENET_DEV == 1) 60 #elif (CONFIG_FEC_ENET_DEV == 1)
61 #define IMX_FEC_BASE ENET2_BASE_ADDR 61 #define IMX_FEC_BASE ENET2_BASE_ADDR
62 #define CONFIG_FEC_MXC_PHYADDR 0x2 62 #define CONFIG_FEC_MXC_PHYADDR 0x2
63 #define CONFIG_FEC_XCV_TYPE MII100 63 #define CONFIG_FEC_XCV_TYPE MII100
64 #endif 64 #endif
65 #define CONFIG_ETHPRIME "FEC" 65 #define CONFIG_ETHPRIME "FEC"
66 66
67 #define CONFIG_PHYLIB 67 #define CONFIG_PHYLIB
68 #define CONFIG_PHY_MICREL 68 #define CONFIG_PHY_MICREL
69 #define CONFIG_FEC_DMA_MINALIGN 64 69 #define CONFIG_FEC_DMA_MINALIGN 64
70 #endif 70 #endif
71 71
72 #endif 72 #endif
73 73