Eric Lee / smarc-uboot

Download as
Browse Code ยป

Commit 8fee226da36f799e69041b2ab381064693199c7f

Authored by Tom Rini
2 parents 282ce6454c 7e86242b2b
Exists in smarc_8mq_lf_v2020.04 and in 11 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging

Showing 11 changed files Inline Diff

Documentation/devicetree/bindings/misc/gdsys,io-endpoint.txt
Diff comments   View file @ 8fee226
File was created 1 gdsys IO endpoint of IHS FPGA devices
2
3 The IO endpoint of IHS FPGA devices is a packet-based transmission interface
4 that allows interconnected gdsys devices to send and receive data over the
5 FPGA's main ethernet connection.
6
7 Required properties:
8 - compatible: must be "gdsys,io-endpoint"
9 - reg: describes the address and length of the endpoint's register map (within
10 the FPGA's register space)
11
12 Example:
13
14 fpga0_ep0 {
15 compatible = "gdsys,io-endpoint";
16 reg = <0x020 0x10
17 0x320 0x10
18 0x340 0x10
19 0x360 0x10>;
20 };
21
arch/sandbox/dts/test.dts
Diff comments   View file @ 8fee226
1 /dts-v1/; 1 /dts-v1/;
2 2
3 / { 3 / {
4 model = "sandbox"; 4 model = "sandbox";
5 compatible = "sandbox"; 5 compatible = "sandbox";
6 #address-cells = <1>; 6 #address-cells = <1>;
7 #size-cells = <1>; 7 #size-cells = <1>;
8 8
9 aliases { 9 aliases {
10 console = &uart0; 10 console = &uart0;
11 eth0 = "/eth@10002000"; 11 eth0 = "/eth@10002000";
12 eth3 = &eth_3; 12 eth3 = &eth_3;
13 eth5 = &eth_5; 13 eth5 = &eth_5;
14 i2c0 = "/i2c@0"; 14 i2c0 = "/i2c@0";
15 mmc0 = "/mmc0"; 15 mmc0 = "/mmc0";
16 mmc1 = "/mmc1"; 16 mmc1 = "/mmc1";
17 pci0 = &pci0; 17 pci0 = &pci0;
18 pci1 = &pci1; 18 pci1 = &pci1;
19 pci2 = &pci2; 19 pci2 = &pci2;
20 remoteproc1 = &rproc_1; 20 remoteproc1 = &rproc_1;
21 remoteproc2 = &rproc_2; 21 remoteproc2 = &rproc_2;
22 rtc0 = &rtc_0; 22 rtc0 = &rtc_0;
23 rtc1 = &rtc_1; 23 rtc1 = &rtc_1;
24 spi0 = "/spi@0"; 24 spi0 = "/spi@0";
25 testfdt6 = "/e-test"; 25 testfdt6 = "/e-test";
26 testbus3 = "/some-bus"; 26 testbus3 = "/some-bus";
27 testfdt0 = "/some-bus/c-test@0"; 27 testfdt0 = "/some-bus/c-test@0";
28 testfdt1 = "/some-bus/c-test@1"; 28 testfdt1 = "/some-bus/c-test@1";
29 testfdt3 = "/b-test"; 29 testfdt3 = "/b-test";
30 testfdt5 = "/some-bus/c-test@5"; 30 testfdt5 = "/some-bus/c-test@5";
31 testfdt8 = "/a-test"; 31 testfdt8 = "/a-test";
32 fdt-dummy0 = "/translation-test@8000/dev@0,0"; 32 fdt-dummy0 = "/translation-test@8000/dev@0,0";
33 fdt-dummy1 = "/translation-test@8000/dev@1,100"; 33 fdt-dummy1 = "/translation-test@8000/dev@1,100";
34 fdt-dummy2 = "/translation-test@8000/dev@2,200"; 34 fdt-dummy2 = "/translation-test@8000/dev@2,200";
35 fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42"; 35 fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42";
36 usb0 = &usb_0; 36 usb0 = &usb_0;
37 usb1 = &usb_1; 37 usb1 = &usb_1;
38 usb2 = &usb_2; 38 usb2 = &usb_2;
39 axi0 = &axi; 39 axi0 = &axi;
40 }; 40 };
41 41
42 a-test { 42 a-test {
43 reg = <0 1>; 43 reg = <0 1>;
44 compatible = "denx,u-boot-fdt-test"; 44 compatible = "denx,u-boot-fdt-test";
45 ping-expect = <0>; 45 ping-expect = <0>;
46 ping-add = <0>; 46 ping-add = <0>;
47 u-boot,dm-pre-reloc; 47 u-boot,dm-pre-reloc;
48 test-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 5 0 3 2 1>, 48 test-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 5 0 3 2 1>,
49 <0>, <&gpio_a 12>; 49 <0>, <&gpio_a 12>;
50 test2-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 6 1 3 2 1>, 50 test2-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 6 1 3 2 1>,
51 <&gpio_b 7 2 3 2 1>, <&gpio_b 8 4 3 2 1>, 51 <&gpio_b 7 2 3 2 1>, <&gpio_b 8 4 3 2 1>,
52 <&gpio_b 9 0xc 3 2 1>; 52 <&gpio_b 9 0xc 3 2 1>;
53 }; 53 };
54 54
55 junk { 55 junk {
56 reg = <1 1>; 56 reg = <1 1>;
57 compatible = "not,compatible"; 57 compatible = "not,compatible";
58 }; 58 };
59 59
60 no-compatible { 60 no-compatible {
61 reg = <2 1>; 61 reg = <2 1>;
62 }; 62 };
63 63
64 b-test { 64 b-test {
65 reg = <3 1>; 65 reg = <3 1>;
66 compatible = "denx,u-boot-fdt-test"; 66 compatible = "denx,u-boot-fdt-test";
67 ping-expect = <3>; 67 ping-expect = <3>;
68 ping-add = <3>; 68 ping-add = <3>;
69 }; 69 };
70 70
71 phy_provider0: gen_phy@0 { 71 phy_provider0: gen_phy@0 {
72 compatible = "sandbox,phy"; 72 compatible = "sandbox,phy";
73 #phy-cells = <1>; 73 #phy-cells = <1>;
74 }; 74 };
75 75
76 phy_provider1: gen_phy@1 { 76 phy_provider1: gen_phy@1 {
77 compatible = "sandbox,phy"; 77 compatible = "sandbox,phy";
78 #phy-cells = <0>; 78 #phy-cells = <0>;
79 broken; 79 broken;
80 }; 80 };
81 81
82 gen_phy_user: gen_phy_user { 82 gen_phy_user: gen_phy_user {
83 compatible = "simple-bus"; 83 compatible = "simple-bus";
84 phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>; 84 phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
85 phy-names = "phy1", "phy2", "phy3"; 85 phy-names = "phy1", "phy2", "phy3";
86 }; 86 };
87 87
88 some-bus { 88 some-bus {
89 #address-cells = <1>; 89 #address-cells = <1>;
90 #size-cells = <0>; 90 #size-cells = <0>;
91 compatible = "denx,u-boot-test-bus"; 91 compatible = "denx,u-boot-test-bus";
92 reg = <3 1>; 92 reg = <3 1>;
93 ping-expect = <4>; 93 ping-expect = <4>;
94 ping-add = <4>; 94 ping-add = <4>;
95 c-test@5 { 95 c-test@5 {
96 compatible = "denx,u-boot-fdt-test"; 96 compatible = "denx,u-boot-fdt-test";
97 reg = <5>; 97 reg = <5>;
98 ping-expect = <5>; 98 ping-expect = <5>;
99 ping-add = <5>; 99 ping-add = <5>;
100 }; 100 };
101 c-test@0 { 101 c-test@0 {
102 compatible = "denx,u-boot-fdt-test"; 102 compatible = "denx,u-boot-fdt-test";
103 reg = <0>; 103 reg = <0>;
104 ping-expect = <6>; 104 ping-expect = <6>;
105 ping-add = <6>; 105 ping-add = <6>;
106 }; 106 };
107 c-test@1 { 107 c-test@1 {
108 compatible = "denx,u-boot-fdt-test"; 108 compatible = "denx,u-boot-fdt-test";
109 reg = <1>; 109 reg = <1>;
110 ping-expect = <7>; 110 ping-expect = <7>;
111 ping-add = <7>; 111 ping-add = <7>;
112 }; 112 };
113 }; 113 };
114 114
115 d-test { 115 d-test {
116 reg = <3 1>; 116 reg = <3 1>;
117 ping-expect = <6>; 117 ping-expect = <6>;
118 ping-add = <6>; 118 ping-add = <6>;
119 compatible = "google,another-fdt-test"; 119 compatible = "google,another-fdt-test";
120 }; 120 };
121 121
122 e-test { 122 e-test {
123 reg = <3 1>; 123 reg = <3 1>;
124 ping-expect = <6>; 124 ping-expect = <6>;
125 ping-add = <6>; 125 ping-add = <6>;
126 compatible = "google,another-fdt-test"; 126 compatible = "google,another-fdt-test";
127 }; 127 };
128 128
129 f-test { 129 f-test {
130 compatible = "denx,u-boot-fdt-test"; 130 compatible = "denx,u-boot-fdt-test";
131 }; 131 };
132 132
133 g-test { 133 g-test {
134 compatible = "denx,u-boot-fdt-test"; 134 compatible = "denx,u-boot-fdt-test";
135 }; 135 };
136 136
137 clocks { 137 clocks {
138 clk_fixed: clk-fixed { 138 clk_fixed: clk-fixed {
139 compatible = "fixed-clock"; 139 compatible = "fixed-clock";
140 #clock-cells = <0>; 140 #clock-cells = <0>;
141 clock-frequency = <1234>; 141 clock-frequency = <1234>;
142 }; 142 };
143 }; 143 };
144 144
145 clk_sandbox: clk-sbox { 145 clk_sandbox: clk-sbox {
146 compatible = "sandbox,clk"; 146 compatible = "sandbox,clk";
147 #clock-cells = <1>; 147 #clock-cells = <1>;
148 }; 148 };
149 149
150 clk-test { 150 clk-test {
151 compatible = "sandbox,clk-test"; 151 compatible = "sandbox,clk-test";
152 clocks = <&clk_fixed>, 152 clocks = <&clk_fixed>,
153 <&clk_sandbox 1>, 153 <&clk_sandbox 1>,
154 <&clk_sandbox 0>; 154 <&clk_sandbox 0>;
155 clock-names = "fixed", "i2c", "spi"; 155 clock-names = "fixed", "i2c", "spi";
156 }; 156 };
157 157
158 eth@10002000 { 158 eth@10002000 {
159 compatible = "sandbox,eth"; 159 compatible = "sandbox,eth";
160 reg = <0x10002000 0x1000>; 160 reg = <0x10002000 0x1000>;
161 fake-host-hwaddr = [00 00 66 44 22 00]; 161 fake-host-hwaddr = [00 00 66 44 22 00];
162 }; 162 };
163 163
164 eth_5: eth@10003000 { 164 eth_5: eth@10003000 {
165 compatible = "sandbox,eth"; 165 compatible = "sandbox,eth";
166 reg = <0x10003000 0x1000>; 166 reg = <0x10003000 0x1000>;
167 fake-host-hwaddr = [00 00 66 44 22 11]; 167 fake-host-hwaddr = [00 00 66 44 22 11];
168 }; 168 };
169 169
170 eth_3: sbe5 { 170 eth_3: sbe5 {
171 compatible = "sandbox,eth"; 171 compatible = "sandbox,eth";
172 reg = <0x10005000 0x1000>; 172 reg = <0x10005000 0x1000>;
173 fake-host-hwaddr = [00 00 66 44 22 33]; 173 fake-host-hwaddr = [00 00 66 44 22 33];
174 }; 174 };
175 175
176 eth@10004000 { 176 eth@10004000 {
177 compatible = "sandbox,eth"; 177 compatible = "sandbox,eth";
178 reg = <0x10004000 0x1000>; 178 reg = <0x10004000 0x1000>;
179 fake-host-hwaddr = [00 00 66 44 22 22]; 179 fake-host-hwaddr = [00 00 66 44 22 22];
180 }; 180 };
181 181
182 gpio_a: base-gpios { 182 gpio_a: base-gpios {
183 compatible = "sandbox,gpio"; 183 compatible = "sandbox,gpio";
184 gpio-controller; 184 gpio-controller;
185 #gpio-cells = <1>; 185 #gpio-cells = <1>;
186 gpio-bank-name = "a"; 186 gpio-bank-name = "a";
187 sandbox,gpio-count = <20>; 187 sandbox,gpio-count = <20>;
188 }; 188 };
189 189
190 gpio_b: extra-gpios { 190 gpio_b: extra-gpios {
191 compatible = "sandbox,gpio"; 191 compatible = "sandbox,gpio";
192 gpio-controller; 192 gpio-controller;
193 #gpio-cells = <5>; 193 #gpio-cells = <5>;
194 gpio-bank-name = "b"; 194 gpio-bank-name = "b";
195 sandbox,gpio-count = <10>; 195 sandbox,gpio-count = <10>;
196 }; 196 };
197 197
198 i2c@0 { 198 i2c@0 {
199 #address-cells = <1>; 199 #address-cells = <1>;
200 #size-cells = <0>; 200 #size-cells = <0>;
201 reg = <0 1>; 201 reg = <0 1>;
202 compatible = "sandbox,i2c"; 202 compatible = "sandbox,i2c";
203 clock-frequency = <100000>; 203 clock-frequency = <100000>;
204 eeprom@2c { 204 eeprom@2c {
205 reg = <0x2c>; 205 reg = <0x2c>;
206 compatible = "i2c-eeprom"; 206 compatible = "i2c-eeprom";
207 emul { 207 emul {
208 compatible = "sandbox,i2c-eeprom"; 208 compatible = "sandbox,i2c-eeprom";
209 sandbox,filename = "i2c.bin"; 209 sandbox,filename = "i2c.bin";
210 sandbox,size = <256>; 210 sandbox,size = <256>;
211 }; 211 };
212 }; 212 };
213 213
214 rtc_0: rtc@43 { 214 rtc_0: rtc@43 {
215 reg = <0x43>; 215 reg = <0x43>;
216 compatible = "sandbox-rtc"; 216 compatible = "sandbox-rtc";
217 emul { 217 emul {
218 compatible = "sandbox,i2c-rtc"; 218 compatible = "sandbox,i2c-rtc";
219 }; 219 };
220 }; 220 };
221 221
222 rtc_1: rtc@61 { 222 rtc_1: rtc@61 {
223 reg = <0x61>; 223 reg = <0x61>;
224 compatible = "sandbox-rtc"; 224 compatible = "sandbox-rtc";
225 emul { 225 emul {
226 compatible = "sandbox,i2c-rtc"; 226 compatible = "sandbox,i2c-rtc";
227 }; 227 };
228 }; 228 };
229 229
230 sandbox_pmic: sandbox_pmic { 230 sandbox_pmic: sandbox_pmic {
231 reg = <0x40>; 231 reg = <0x40>;
232 }; 232 };
233 233
234 mc34708: pmic@41 { 234 mc34708: pmic@41 {
235 reg = <0x41>; 235 reg = <0x41>;
236 }; 236 };
237 }; 237 };
238 238
239 adc@0 { 239 adc@0 {
240 compatible = "sandbox,adc"; 240 compatible = "sandbox,adc";
241 vdd-supply = <&buck2>; 241 vdd-supply = <&buck2>;
242 vss-microvolts = <0>; 242 vss-microvolts = <0>;
243 }; 243 };
244 244
245 lcd { 245 lcd {
246 u-boot,dm-pre-reloc; 246 u-boot,dm-pre-reloc;
247 compatible = "sandbox,lcd-sdl"; 247 compatible = "sandbox,lcd-sdl";
248 xres = <1366>; 248 xres = <1366>;
249 yres = <768>; 249 yres = <768>;
250 }; 250 };
251 251
252 leds { 252 leds {
253 compatible = "gpio-leds"; 253 compatible = "gpio-leds";
254 254
255 iracibble { 255 iracibble {
256 gpios = <&gpio_a 1 0>; 256 gpios = <&gpio_a 1 0>;
257 label = "sandbox:red"; 257 label = "sandbox:red";
258 }; 258 };
259 259
260 martinet { 260 martinet {
261 gpios = <&gpio_a 2 0>; 261 gpios = <&gpio_a 2 0>;
262 label = "sandbox:green"; 262 label = "sandbox:green";
263 }; 263 };
264 264
265 default_on { 265 default_on {
266 gpios = <&gpio_a 5 0>; 266 gpios = <&gpio_a 5 0>;
267 label = "sandbox:default_on"; 267 label = "sandbox:default_on";
268 default-state = "on"; 268 default-state = "on";
269 }; 269 };
270 270
271 default_off { 271 default_off {
272 gpios = <&gpio_a 6 0>; 272 gpios = <&gpio_a 6 0>;
273 label = "sandbox:default_off"; 273 label = "sandbox:default_off";
274 default-state = "off"; 274 default-state = "off";
275 }; 275 };
276 }; 276 };
277 277
278 mbox: mbox { 278 mbox: mbox {
279 compatible = "sandbox,mbox"; 279 compatible = "sandbox,mbox";
280 #mbox-cells = <1>; 280 #mbox-cells = <1>;
281 }; 281 };
282 282
283 mbox-test { 283 mbox-test {
284 compatible = "sandbox,mbox-test"; 284 compatible = "sandbox,mbox-test";
285 mboxes = <&mbox 100>, <&mbox 1>; 285 mboxes = <&mbox 100>, <&mbox 1>;
286 mbox-names = "other", "test"; 286 mbox-names = "other", "test";
287 }; 287 };
288 288
289 misc-test {
290 compatible = "sandbox,misc_sandbox";
291 };
292
289 mmc2 { 293 mmc2 {
290 compatible = "sandbox,mmc"; 294 compatible = "sandbox,mmc";
291 }; 295 };
292 296
293 mmc1 { 297 mmc1 {
294 compatible = "sandbox,mmc"; 298 compatible = "sandbox,mmc";
295 }; 299 };
296 300
297 mmc0 { 301 mmc0 {
298 compatible = "sandbox,mmc"; 302 compatible = "sandbox,mmc";
299 }; 303 };
300 304
301 pci0: pci-controller0 { 305 pci0: pci-controller0 {
302 compatible = "sandbox,pci"; 306 compatible = "sandbox,pci";
303 device_type = "pci"; 307 device_type = "pci";
304 #address-cells = <3>; 308 #address-cells = <3>;
305 #size-cells = <2>; 309 #size-cells = <2>;
306 ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000 310 ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000
307 0x01000000 0 0x20000000 0x20000000 0 0x2000>; 311 0x01000000 0 0x20000000 0x20000000 0 0x2000>;
308 pci@0,0 { 312 pci@0,0 {
309 compatible = "pci-generic"; 313 compatible = "pci-generic";
310 reg = <0x0000 0 0 0 0>; 314 reg = <0x0000 0 0 0 0>;
311 emul@0,0 { 315 emul@0,0 {
312 compatible = "sandbox,swap-case"; 316 compatible = "sandbox,swap-case";
313 }; 317 };
314 }; 318 };
315 pci@1f,0 { 319 pci@1f,0 {
316 compatible = "pci-generic"; 320 compatible = "pci-generic";
317 reg = <0xf800 0 0 0 0>; 321 reg = <0xf800 0 0 0 0>;
318 emul@1f,0 { 322 emul@1f,0 {
319 compatible = "sandbox,swap-case"; 323 compatible = "sandbox,swap-case";
320 }; 324 };
321 }; 325 };
322 }; 326 };
323 327
324 pci1: pci-controller1 { 328 pci1: pci-controller1 {
325 compatible = "sandbox,pci"; 329 compatible = "sandbox,pci";
326 device_type = "pci"; 330 device_type = "pci";
327 #address-cells = <3>; 331 #address-cells = <3>;
328 #size-cells = <2>; 332 #size-cells = <2>;
329 ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 333 ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000
330 0x01000000 0 0x40000000 0x40000000 0 0x2000>; 334 0x01000000 0 0x40000000 0x40000000 0 0x2000>;
331 sandbox,dev-info = <0x08 0x00 0x1234 0x5678 335 sandbox,dev-info = <0x08 0x00 0x1234 0x5678
332 0x0c 0x00 0x1234 0x5678>; 336 0x0c 0x00 0x1234 0x5678>;
333 }; 337 };
334 338
335 pci2: pci-controller2 { 339 pci2: pci-controller2 {
336 compatible = "sandbox,pci"; 340 compatible = "sandbox,pci";
337 device_type = "pci"; 341 device_type = "pci";
338 #address-cells = <3>; 342 #address-cells = <3>;
339 #size-cells = <2>; 343 #size-cells = <2>;
340 ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000 344 ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000
341 0x01000000 0 0x60000000 0x60000000 0 0x2000>; 345 0x01000000 0 0x60000000 0x60000000 0 0x2000>;
342 sandbox,dev-info = <0x08 0x00 0x1234 0x5678>; 346 sandbox,dev-info = <0x08 0x00 0x1234 0x5678>;
343 pci@1f,0 { 347 pci@1f,0 {
344 compatible = "pci-generic"; 348 compatible = "pci-generic";
345 reg = <0xf800 0 0 0 0>; 349 reg = <0xf800 0 0 0 0>;
346 emul@1f,0 { 350 emul@1f,0 {
347 compatible = "sandbox,swap-case"; 351 compatible = "sandbox,swap-case";
348 }; 352 };
349 }; 353 };
350 }; 354 };
351 355
352 probing { 356 probing {
353 compatible = "simple-bus"; 357 compatible = "simple-bus";
354 test1 { 358 test1 {
355 compatible = "denx,u-boot-probe-test"; 359 compatible = "denx,u-boot-probe-test";
356 }; 360 };
357 361
358 test2 { 362 test2 {
359 compatible = "denx,u-boot-probe-test"; 363 compatible = "denx,u-boot-probe-test";
360 }; 364 };
361 365
362 test3 { 366 test3 {
363 compatible = "denx,u-boot-probe-test"; 367 compatible = "denx,u-boot-probe-test";
364 }; 368 };
365 369
366 test4 { 370 test4 {
367 compatible = "denx,u-boot-probe-test"; 371 compatible = "denx,u-boot-probe-test";
368 }; 372 };
369 }; 373 };
370 374
371 pwrdom: power-domain { 375 pwrdom: power-domain {
372 compatible = "sandbox,power-domain"; 376 compatible = "sandbox,power-domain";
373 #power-domain-cells = <1>; 377 #power-domain-cells = <1>;
374 }; 378 };
375 379
376 power-domain-test { 380 power-domain-test {
377 compatible = "sandbox,power-domain-test"; 381 compatible = "sandbox,power-domain-test";
378 power-domains = <&pwrdom 2>; 382 power-domains = <&pwrdom 2>;
379 }; 383 };
380 384
381 pwm { 385 pwm {
382 compatible = "sandbox,pwm"; 386 compatible = "sandbox,pwm";
383 }; 387 };
384 388
385 pwm2 { 389 pwm2 {
386 compatible = "sandbox,pwm"; 390 compatible = "sandbox,pwm";
387 }; 391 };
388 392
389 ram { 393 ram {
390 compatible = "sandbox,ram"; 394 compatible = "sandbox,ram";
391 }; 395 };
392 396
393 reset@0 { 397 reset@0 {
394 compatible = "sandbox,warm-reset"; 398 compatible = "sandbox,warm-reset";
395 }; 399 };
396 400
397 reset@1 { 401 reset@1 {
398 compatible = "sandbox,reset"; 402 compatible = "sandbox,reset";
399 }; 403 };
400 404
401 resetc: reset-ctl { 405 resetc: reset-ctl {
402 compatible = "sandbox,reset-ctl"; 406 compatible = "sandbox,reset-ctl";
403 #reset-cells = <1>; 407 #reset-cells = <1>;
404 }; 408 };
405 409
406 reset-ctl-test { 410 reset-ctl-test {
407 compatible = "sandbox,reset-ctl-test"; 411 compatible = "sandbox,reset-ctl-test";
408 resets = <&resetc 100>, <&resetc 2>; 412 resets = <&resetc 100>, <&resetc 2>;
409 reset-names = "other", "test"; 413 reset-names = "other", "test";
410 }; 414 };
411 415
412 rproc_1: rproc@1 { 416 rproc_1: rproc@1 {
413 compatible = "sandbox,test-processor"; 417 compatible = "sandbox,test-processor";
414 remoteproc-name = "remoteproc-test-dev1"; 418 remoteproc-name = "remoteproc-test-dev1";
415 }; 419 };
416 420
417 rproc_2: rproc@2 { 421 rproc_2: rproc@2 {
418 compatible = "sandbox,test-processor"; 422 compatible = "sandbox,test-processor";
419 internal-memory-mapped; 423 internal-memory-mapped;
420 remoteproc-name = "remoteproc-test-dev2"; 424 remoteproc-name = "remoteproc-test-dev2";
421 }; 425 };
422 426
423 smem@0 { 427 smem@0 {
424 compatible = "sandbox,smem"; 428 compatible = "sandbox,smem";
425 }; 429 };
426 430
427 spi@0 { 431 spi@0 {
428 #address-cells = <1>; 432 #address-cells = <1>;
429 #size-cells = <0>; 433 #size-cells = <0>;
430 reg = <0 1>; 434 reg = <0 1>;
431 compatible = "sandbox,spi"; 435 compatible = "sandbox,spi";
432 cs-gpios = <0>, <&gpio_a 0>; 436 cs-gpios = <0>, <&gpio_a 0>;
433 spi.bin@0 { 437 spi.bin@0 {
434 reg = <0>; 438 reg = <0>;
435 compatible = "spansion,m25p16", "spi-flash"; 439 compatible = "spansion,m25p16", "spi-flash";
436 spi-max-frequency = <40000000>; 440 spi-max-frequency = <40000000>;
437 sandbox,filename = "spi.bin"; 441 sandbox,filename = "spi.bin";
438 }; 442 };
439 }; 443 };
440 444
441 syscon@0 { 445 syscon@0 {
442 compatible = "sandbox,syscon0"; 446 compatible = "sandbox,syscon0";
443 reg = <0x10 4>; 447 reg = <0x10 4>;
444 }; 448 };
445 449
446 syscon@1 { 450 syscon@1 {
447 compatible = "sandbox,syscon1"; 451 compatible = "sandbox,syscon1";
448 reg = <0x20 5 452 reg = <0x20 5
449 0x28 6 453 0x28 6
450 0x30 7 454 0x30 7
451 0x38 8>; 455 0x38 8>;
452 }; 456 };
453 457
454 syscon@2 { 458 syscon@2 {
455 compatible = "simple-mfd", "syscon"; 459 compatible = "simple-mfd", "syscon";
456 reg = <0x40 5 460 reg = <0x40 5
457 0x48 6 461 0x48 6
458 0x50 7 462 0x50 7
459 0x58 8>; 463 0x58 8>;
460 }; 464 };
461 465
462 timer { 466 timer {
463 compatible = "sandbox,timer"; 467 compatible = "sandbox,timer";
464 clock-frequency = <1000000>; 468 clock-frequency = <1000000>;
465 }; 469 };
466 470
467 tpm2 { 471 tpm2 {
468 compatible = "sandbox,tpm2"; 472 compatible = "sandbox,tpm2";
469 }; 473 };
470 474
471 uart0: serial { 475 uart0: serial {
472 compatible = "sandbox,serial"; 476 compatible = "sandbox,serial";
473 u-boot,dm-pre-reloc; 477 u-boot,dm-pre-reloc;
474 }; 478 };
475 479
476 usb_0: usb@0 { 480 usb_0: usb@0 {
477 compatible = "sandbox,usb"; 481 compatible = "sandbox,usb";
478 status = "disabled"; 482 status = "disabled";
479 hub { 483 hub {
480 compatible = "sandbox,usb-hub"; 484 compatible = "sandbox,usb-hub";
481 #address-cells = <1>; 485 #address-cells = <1>;
482 #size-cells = <0>; 486 #size-cells = <0>;
483 flash-stick { 487 flash-stick {
484 reg = <0>; 488 reg = <0>;
485 compatible = "sandbox,usb-flash"; 489 compatible = "sandbox,usb-flash";
486 }; 490 };
487 }; 491 };
488 }; 492 };
489 493
490 usb_1: usb@1 { 494 usb_1: usb@1 {
491 compatible = "sandbox,usb"; 495 compatible = "sandbox,usb";
492 hub { 496 hub {
493 compatible = "usb-hub"; 497 compatible = "usb-hub";
494 usb,device-class = <9>; 498 usb,device-class = <9>;
495 hub-emul { 499 hub-emul {
496 compatible = "sandbox,usb-hub"; 500 compatible = "sandbox,usb-hub";
497 #address-cells = <1>; 501 #address-cells = <1>;
498 #size-cells = <0>; 502 #size-cells = <0>;
499 flash-stick@0 { 503 flash-stick@0 {
500 reg = <0>; 504 reg = <0>;
501 compatible = "sandbox,usb-flash"; 505 compatible = "sandbox,usb-flash";
502 sandbox,filepath = "testflash.bin"; 506 sandbox,filepath = "testflash.bin";
503 }; 507 };
504 508
505 flash-stick@1 { 509 flash-stick@1 {
506 reg = <1>; 510 reg = <1>;
507 compatible = "sandbox,usb-flash"; 511 compatible = "sandbox,usb-flash";
508 sandbox,filepath = "testflash1.bin"; 512 sandbox,filepath = "testflash1.bin";
509 }; 513 };
510 514
511 flash-stick@2 { 515 flash-stick@2 {
512 reg = <2>; 516 reg = <2>;
513 compatible = "sandbox,usb-flash"; 517 compatible = "sandbox,usb-flash";
514 sandbox,filepath = "testflash2.bin"; 518 sandbox,filepath = "testflash2.bin";
515 }; 519 };
516 520
517 keyb@3 { 521 keyb@3 {
518 reg = <3>; 522 reg = <3>;
519 compatible = "sandbox,usb-keyb"; 523 compatible = "sandbox,usb-keyb";
520 }; 524 };
521 525
522 }; 526 };
523 }; 527 };
524 }; 528 };
525 529
526 usb_2: usb@2 { 530 usb_2: usb@2 {
527 compatible = "sandbox,usb"; 531 compatible = "sandbox,usb";
528 status = "disabled"; 532 status = "disabled";
529 }; 533 };
530 534
531 spmi: spmi@0 { 535 spmi: spmi@0 {
532 compatible = "sandbox,spmi"; 536 compatible = "sandbox,spmi";
533 #address-cells = <0x1>; 537 #address-cells = <0x1>;
534 #size-cells = <0x1>; 538 #size-cells = <0x1>;
535 pm8916@0 { 539 pm8916@0 {
536 compatible = "qcom,spmi-pmic"; 540 compatible = "qcom,spmi-pmic";
537 reg = <0x0 0x1>; 541 reg = <0x0 0x1>;
538 #address-cells = <0x1>; 542 #address-cells = <0x1>;
539 #size-cells = <0x1>; 543 #size-cells = <0x1>;
540 544
541 spmi_gpios: gpios@c000 { 545 spmi_gpios: gpios@c000 {
542 compatible = "qcom,pm8916-gpio"; 546 compatible = "qcom,pm8916-gpio";
543 reg = <0xc000 0x400>; 547 reg = <0xc000 0x400>;
544 gpio-controller; 548 gpio-controller;
545 gpio-count = <4>; 549 gpio-count = <4>;
546 #gpio-cells = <2>; 550 #gpio-cells = <2>;
547 gpio-bank-name="spmi"; 551 gpio-bank-name="spmi";
548 }; 552 };
549 }; 553 };
550 }; 554 };
551 555
552 wdt0: wdt@0 { 556 wdt0: wdt@0 {
553 compatible = "sandbox,wdt"; 557 compatible = "sandbox,wdt";
554 }; 558 };
555 559
556 axi: axi@0 { 560 axi: axi@0 {
557 compatible = "sandbox,axi"; 561 compatible = "sandbox,axi";
558 #address-cells = <0x1>; 562 #address-cells = <0x1>;
559 #size-cells = <0x1>; 563 #size-cells = <0x1>;
560 store@0 { 564 store@0 {
561 compatible = "sandbox,sandbox_store"; 565 compatible = "sandbox,sandbox_store";
562 reg = <0x0 0x400>; 566 reg = <0x0 0x400>;
563 }; 567 };
564 }; 568 };
565 569
566 chosen { 570 chosen {
567 #address-cells = <1>; 571 #address-cells = <1>;
568 #size-cells = <1>; 572 #size-cells = <1>;
569 chosen-test { 573 chosen-test {
570 compatible = "denx,u-boot-fdt-test"; 574 compatible = "denx,u-boot-fdt-test";
571 reg = <9 1>; 575 reg = <9 1>;
572 }; 576 };
573 }; 577 };
574 578
575 translation-test@8000 { 579 translation-test@8000 {
576 compatible = "simple-bus"; 580 compatible = "simple-bus";
577 reg = <0x8000 0x4000>; 581 reg = <0x8000 0x4000>;
578 582
579 #address-cells = <0x2>; 583 #address-cells = <0x2>;
580 #size-cells = <0x1>; 584 #size-cells = <0x1>;
581 585
582 ranges = <0 0x0 0x8000 0x1000 586 ranges = <0 0x0 0x8000 0x1000
583 1 0x100 0x9000 0x1000 587 1 0x100 0x9000 0x1000
584 2 0x200 0xA000 0x1000 588 2 0x200 0xA000 0x1000
585 3 0x300 0xB000 0x1000 589 3 0x300 0xB000 0x1000
586 >; 590 >;
587 591
588 dev@0,0 { 592 dev@0,0 {
589 compatible = "denx,u-boot-fdt-dummy"; 593 compatible = "denx,u-boot-fdt-dummy";
590 reg = <0 0x0 0x1000>; 594 reg = <0 0x0 0x1000>;
591 }; 595 };
592 596
593 dev@1,100 { 597 dev@1,100 {
594 compatible = "denx,u-boot-fdt-dummy"; 598 compatible = "denx,u-boot-fdt-dummy";
595 reg = <1 0x100 0x1000>; 599 reg = <1 0x100 0x1000>;
596 600
597 }; 601 };
598 602
599 dev@2,200 { 603 dev@2,200 {
600 compatible = "denx,u-boot-fdt-dummy"; 604 compatible = "denx,u-boot-fdt-dummy";
601 reg = <2 0x200 0x1000>; 605 reg = <2 0x200 0x1000>;
602 }; 606 };
603 607
604 608
605 noxlatebus@3,300 { 609 noxlatebus@3,300 {
606 compatible = "simple-bus"; 610 compatible = "simple-bus";
607 reg = <3 0x300 0x1000>; 611 reg = <3 0x300 0x1000>;
608 612
609 #address-cells = <0x1>; 613 #address-cells = <0x1>;
610 #size-cells = <0x0>; 614 #size-cells = <0x0>;
611 615
612 dev@42 { 616 dev@42 {
613 compatible = "denx,u-boot-fdt-dummy"; 617 compatible = "denx,u-boot-fdt-dummy";
614 reg = <0x42>; 618 reg = <0x42>;
615 }; 619 };
616 }; 620 };
617 }; 621 };
618 }; 622 };
619 623
620 #include "sandbox_pmic.dtsi" 624 #include "sandbox_pmic.dtsi"
621 625
drivers/misc/Kconfig
Diff comments   View file @ 8fee226
1 # 1 #
2 # Multifunction miscellaneous devices 2 # Multifunction miscellaneous devices
3 # 3 #
4 4
5 menu "Multifunction device drivers" 5 menu "Multifunction device drivers"
6 6
7 config MISC 7 config MISC
8 bool "Enable Driver Model for Misc drivers" 8 bool "Enable Driver Model for Misc drivers"
9 depends on DM 9 depends on DM
10 help 10 help
11 Enable driver model for miscellaneous devices. This class is 11 Enable driver model for miscellaneous devices. This class is
12 used only for those do not fit other more general classes. A 12 used only for those do not fit other more general classes. A
13 set of generic read, write and ioctl methods may be used to 13 set of generic read, write and ioctl methods may be used to
14 access the device. 14 access the device.
15 15
16 config ALTERA_SYSID 16 config ALTERA_SYSID
17 bool "Altera Sysid support" 17 bool "Altera Sysid support"
18 depends on MISC 18 depends on MISC
19 help 19 help
20 Select this to enable a sysid for Altera devices. Please find 20 Select this to enable a sysid for Altera devices. Please find
21 details on the "Embedded Peripherals IP User Guide" of Altera. 21 details on the "Embedded Peripherals IP User Guide" of Altera.
22 22
23 config ATSHA204A 23 config ATSHA204A
24 bool "Support for Atmel ATSHA204A module" 24 bool "Support for Atmel ATSHA204A module"
25 depends on MISC 25 depends on MISC
26 help 26 help
27 Enable support for I2C connected Atmel's ATSHA204A 27 Enable support for I2C connected Atmel's ATSHA204A
28 CryptoAuthentication module found for example on the Turris Omnia 28 CryptoAuthentication module found for example on the Turris Omnia
29 board. 29 board.
30 30
31 config ROCKCHIP_EFUSE 31 config ROCKCHIP_EFUSE
32 bool "Rockchip e-fuse support" 32 bool "Rockchip e-fuse support"
33 depends on MISC 33 depends on MISC
34 help 34 help
35 Enable (read-only) access for the e-fuse block found in Rockchip 35 Enable (read-only) access for the e-fuse block found in Rockchip
36 SoCs: accesses can either be made using byte addressing and a length 36 SoCs: accesses can either be made using byte addressing and a length
37 or through child-nodes that are generated based on the e-fuse map 37 or through child-nodes that are generated based on the e-fuse map
38 retrieved from the DTS. 38 retrieved from the DTS.
39 39
40 This driver currently supports the RK3399 only, but can easily be 40 This driver currently supports the RK3399 only, but can easily be
41 extended (by porting the read function from the Linux kernel sources) 41 extended (by porting the read function from the Linux kernel sources)
42 to support other recent Rockchip devices. 42 to support other recent Rockchip devices.
43 43
44 config CMD_CROS_EC 44 config CMD_CROS_EC
45 bool "Enable crosec command" 45 bool "Enable crosec command"
46 depends on CROS_EC 46 depends on CROS_EC
47 help 47 help
48 Enable command-line access to the Chrome OS EC (Embedded 48 Enable command-line access to the Chrome OS EC (Embedded
49 Controller). This provides the 'crosec' command which has 49 Controller). This provides the 'crosec' command which has
50 a number of sub-commands for performing EC tasks such as 50 a number of sub-commands for performing EC tasks such as
51 updating its flash, accessing a small saved context area 51 updating its flash, accessing a small saved context area
52 and talking to the I2C bus behind the EC (if there is one). 52 and talking to the I2C bus behind the EC (if there is one).
53 53
54 config CROS_EC 54 config CROS_EC
55 bool "Enable Chrome OS EC" 55 bool "Enable Chrome OS EC"
56 help 56 help
57 Enable access to the Chrome OS EC. This is a separate 57 Enable access to the Chrome OS EC. This is a separate
58 microcontroller typically available on a SPI bus on Chromebooks. It 58 microcontroller typically available on a SPI bus on Chromebooks. It
59 provides access to the keyboard, some internal storage and may 59 provides access to the keyboard, some internal storage and may
60 control access to the battery and main PMIC depending on the 60 control access to the battery and main PMIC depending on the
61 device. You can use the 'crosec' command to access it. 61 device. You can use the 'crosec' command to access it.
62 62
63 config CROS_EC_I2C 63 config CROS_EC_I2C
64 bool "Enable Chrome OS EC I2C driver" 64 bool "Enable Chrome OS EC I2C driver"
65 depends on CROS_EC 65 depends on CROS_EC
66 help 66 help
67 Enable I2C access to the Chrome OS EC. This is used on older 67 Enable I2C access to the Chrome OS EC. This is used on older
68 ARM Chromebooks such as snow and spring before the standard bus 68 ARM Chromebooks such as snow and spring before the standard bus
69 changed to SPI. The EC will accept commands across the I2C using 69 changed to SPI. The EC will accept commands across the I2C using
70 a special message protocol, and provide responses. 70 a special message protocol, and provide responses.
71 71
72 config CROS_EC_LPC 72 config CROS_EC_LPC
73 bool "Enable Chrome OS EC LPC driver" 73 bool "Enable Chrome OS EC LPC driver"
74 depends on CROS_EC 74 depends on CROS_EC
75 help 75 help
76 Enable I2C access to the Chrome OS EC. This is used on x86 76 Enable I2C access to the Chrome OS EC. This is used on x86
77 Chromebooks such as link and falco. The keyboard is provided 77 Chromebooks such as link and falco. The keyboard is provided
78 through a legacy port interface, so on x86 machines the main 78 through a legacy port interface, so on x86 machines the main
79 function of the EC is power and thermal management. 79 function of the EC is power and thermal management.
80 80
81 config CROS_EC_SANDBOX 81 config CROS_EC_SANDBOX
82 bool "Enable Chrome OS EC sandbox driver" 82 bool "Enable Chrome OS EC sandbox driver"
83 depends on CROS_EC && SANDBOX 83 depends on CROS_EC && SANDBOX
84 help 84 help
85 Enable a sandbox emulation of the Chrome OS EC. This supports 85 Enable a sandbox emulation of the Chrome OS EC. This supports
86 keyboard (use the -l flag to enable the LCD), verified boot context, 86 keyboard (use the -l flag to enable the LCD), verified boot context,
87 EC flash read/write/erase support and a few other things. It is 87 EC flash read/write/erase support and a few other things. It is
88 enough to perform a Chrome OS verified boot on sandbox. 88 enough to perform a Chrome OS verified boot on sandbox.
89 89
90 config CROS_EC_SPI 90 config CROS_EC_SPI
91 bool "Enable Chrome OS EC SPI driver" 91 bool "Enable Chrome OS EC SPI driver"
92 depends on CROS_EC 92 depends on CROS_EC
93 help 93 help
94 Enable SPI access to the Chrome OS EC. This is used on newer 94 Enable SPI access to the Chrome OS EC. This is used on newer
95 ARM Chromebooks such as pit, pi and nyan-big. The SPI interface 95 ARM Chromebooks such as pit, pi and nyan-big. The SPI interface
96 provides a faster and more robust interface than I2C but the bugs 96 provides a faster and more robust interface than I2C but the bugs
97 are less interesting. 97 are less interesting.
98 98
99 config DS4510 99 config DS4510
100 bool "Enable support for DS4510 CPU supervisor" 100 bool "Enable support for DS4510 CPU supervisor"
101 help 101 help
102 Enable support for the Maxim DS4510 CPU supervisor. It has an 102 Enable support for the Maxim DS4510 CPU supervisor. It has an
103 integrated 64-byte EEPROM, four programmable non-volatile I/O pins 103 integrated 64-byte EEPROM, four programmable non-volatile I/O pins
104 and a configurable timer for the supervisor function. The device is 104 and a configurable timer for the supervisor function. The device is
105 connected over I2C. 105 connected over I2C.
106 106
107 config FSL_SEC_MON 107 config FSL_SEC_MON
108 bool "Enable FSL SEC_MON Driver" 108 bool "Enable FSL SEC_MON Driver"
109 help 109 help
110 Freescale Security Monitor block is responsible for monitoring 110 Freescale Security Monitor block is responsible for monitoring
111 system states. 111 system states.
112 Security Monitor can be transitioned on any security failures, 112 Security Monitor can be transitioned on any security failures,
113 like software violations or hardware security violations. 113 like software violations or hardware security violations.
114 114
115 config MXC_OCOTP 115 config MXC_OCOTP
116 bool "Enable MXC OCOTP Driver" 116 bool "Enable MXC OCOTP Driver"
117 help 117 help
118 If you say Y here, you will get support for the One Time 118 If you say Y here, you will get support for the One Time
119 Programmable memory pages that are stored on the some 119 Programmable memory pages that are stored on the some
120 Freescale i.MX processors. 120 Freescale i.MX processors.
121 121
122 config NUVOTON_NCT6102D 122 config NUVOTON_NCT6102D
123 bool "Enable Nuvoton NCT6102D Super I/O driver" 123 bool "Enable Nuvoton NCT6102D Super I/O driver"
124 help 124 help
125 If you say Y here, you will get support for the Nuvoton 125 If you say Y here, you will get support for the Nuvoton
126 NCT6102D Super I/O driver. This can be used to enable or 126 NCT6102D Super I/O driver. This can be used to enable or
127 disable the legacy UART, the watchdog or other devices 127 disable the legacy UART, the watchdog or other devices
128 in the Nuvoton Super IO chips on X86 platforms. 128 in the Nuvoton Super IO chips on X86 platforms.
129 129
130 config PWRSEQ 130 config PWRSEQ
131 bool "Enable power-sequencing drivers" 131 bool "Enable power-sequencing drivers"
132 depends on DM 132 depends on DM
133 help 133 help
134 Power-sequencing drivers provide support for controlling power for 134 Power-sequencing drivers provide support for controlling power for
135 devices. They are typically referenced by a phandle from another 135 devices. They are typically referenced by a phandle from another
136 device. When the device is started up, its power sequence can be 136 device. When the device is started up, its power sequence can be
137 initiated. 137 initiated.
138 138
139 config SPL_PWRSEQ 139 config SPL_PWRSEQ
140 bool "Enable power-sequencing drivers for SPL" 140 bool "Enable power-sequencing drivers for SPL"
141 depends on PWRSEQ 141 depends on PWRSEQ
142 help 142 help
143 Power-sequencing drivers provide support for controlling power for 143 Power-sequencing drivers provide support for controlling power for
144 devices. They are typically referenced by a phandle from another 144 devices. They are typically referenced by a phandle from another
145 device. When the device is started up, its power sequence can be 145 device. When the device is started up, its power sequence can be
146 initiated. 146 initiated.
147 147
148 config PCA9551_LED 148 config PCA9551_LED
149 bool "Enable PCA9551 LED driver" 149 bool "Enable PCA9551 LED driver"
150 help 150 help
151 Enable driver for PCA9551 LED controller. This controller 151 Enable driver for PCA9551 LED controller. This controller
152 is connected via I2C. So I2C needs to be enabled. 152 is connected via I2C. So I2C needs to be enabled.
153 153
154 config PCA9551_I2C_ADDR 154 config PCA9551_I2C_ADDR
155 hex "I2C address of PCA9551 LED controller" 155 hex "I2C address of PCA9551 LED controller"
156 depends on PCA9551_LED 156 depends on PCA9551_LED
157 default 0x60 157 default 0x60
158 help 158 help
159 The I2C address of the PCA9551 LED controller. 159 The I2C address of the PCA9551 LED controller.
160 160
161 config STM32MP_FUSE 161 config STM32MP_FUSE
162 bool "Enable STM32MP fuse wrapper providing the fuse API" 162 bool "Enable STM32MP fuse wrapper providing the fuse API"
163 depends on ARCH_STM32MP && MISC 163 depends on ARCH_STM32MP && MISC
164 default y if CMD_FUSE 164 default y if CMD_FUSE
165 help 165 help
166 If you say Y here, you will get support for the fuse API (OTP) 166 If you say Y here, you will get support for the fuse API (OTP)
167 for STM32MP architecture. 167 for STM32MP architecture.
168 This API is needed for CMD_FUSE. 168 This API is needed for CMD_FUSE.
169 169
170 config STM32_RCC 170 config STM32_RCC
171 bool "Enable RCC driver for the STM32 SoC's family" 171 bool "Enable RCC driver for the STM32 SoC's family"
172 depends on (STM32 || ARCH_STM32MP) && MISC 172 depends on (STM32 || ARCH_STM32MP) && MISC
173 help 173 help
174 Enable the STM32 RCC driver. The RCC block (Reset and Clock Control 174 Enable the STM32 RCC driver. The RCC block (Reset and Clock Control
175 block) is responsible of the management of the clock and reset 175 block) is responsible of the management of the clock and reset
176 generation. 176 generation.
177 This driver is similar to an MFD driver in the Linux kernel. 177 This driver is similar to an MFD driver in the Linux kernel.
178 178
179 config TEGRA_CAR 179 config TEGRA_CAR
180 bool "Enable support for the Tegra CAR driver" 180 bool "Enable support for the Tegra CAR driver"
181 depends on TEGRA_NO_BPMP 181 depends on TEGRA_NO_BPMP
182 help 182 help
183 The Tegra CAR (Clock and Reset Controller) is a HW module that 183 The Tegra CAR (Clock and Reset Controller) is a HW module that
184 controls almost all clocks and resets in a Tegra SoC. 184 controls almost all clocks and resets in a Tegra SoC.
185 185
186 config TEGRA186_BPMP 186 config TEGRA186_BPMP
187 bool "Enable support for the Tegra186 BPMP driver" 187 bool "Enable support for the Tegra186 BPMP driver"
188 depends on TEGRA186 188 depends on TEGRA186
189 help 189 help
190 The Tegra BPMP (Boot and Power Management Processor) is a separate 190 The Tegra BPMP (Boot and Power Management Processor) is a separate
191 auxiliary CPU embedded into Tegra to perform power management work, 191 auxiliary CPU embedded into Tegra to perform power management work,
192 and controls related features such as clocks, resets, power domains, 192 and controls related features such as clocks, resets, power domains,
193 PMIC I2C bus, etc. This driver provides the core low-level 193 PMIC I2C bus, etc. This driver provides the core low-level
194 communication path by which feature-specific drivers (such as clock) 194 communication path by which feature-specific drivers (such as clock)
195 can make requests to the BPMP. This driver is similar to an MFD 195 can make requests to the BPMP. This driver is similar to an MFD
196 driver in the Linux kernel. 196 driver in the Linux kernel.
197 197
198 config WINBOND_W83627 198 config WINBOND_W83627
199 bool "Enable Winbond Super I/O driver" 199 bool "Enable Winbond Super I/O driver"
200 help 200 help
201 If you say Y here, you will get support for the Winbond 201 If you say Y here, you will get support for the Winbond
202 W83627 Super I/O driver. This can be used to enable the 202 W83627 Super I/O driver. This can be used to enable the
203 legacy UART or other devices in the Winbond Super IO chips 203 legacy UART or other devices in the Winbond Super IO chips
204 on X86 platforms. 204 on X86 platforms.
205 205
206 config QFW 206 config QFW
207 bool 207 bool
208 help 208 help
209 Hidden option to enable QEMU fw_cfg interface. This will be selected by 209 Hidden option to enable QEMU fw_cfg interface. This will be selected by
210 either CONFIG_CMD_QFW or CONFIG_GENERATE_ACPI_TABLE. 210 either CONFIG_CMD_QFW or CONFIG_GENERATE_ACPI_TABLE.
211 211
212 config I2C_EEPROM 212 config I2C_EEPROM
213 bool "Enable driver for generic I2C-attached EEPROMs" 213 bool "Enable driver for generic I2C-attached EEPROMs"
214 depends on MISC 214 depends on MISC
215 help 215 help
216 Enable a generic driver for EEPROMs attached via I2C. 216 Enable a generic driver for EEPROMs attached via I2C.
217 217
218 218
219 config SPL_I2C_EEPROM 219 config SPL_I2C_EEPROM
220 bool "Enable driver for generic I2C-attached EEPROMs for SPL" 220 bool "Enable driver for generic I2C-attached EEPROMs for SPL"
221 depends on MISC && SPL && SPL_DM 221 depends on MISC && SPL && SPL_DM
222 help 222 help
223 This option is an SPL-variant of the I2C_EEPROM option. 223 This option is an SPL-variant of the I2C_EEPROM option.
224 See the help of I2C_EEPROM for details. 224 See the help of I2C_EEPROM for details.
225 225
226 config ZYNQ_GEM_I2C_MAC_OFFSET 226 config ZYNQ_GEM_I2C_MAC_OFFSET
227 hex "Set the I2C MAC offset" 227 hex "Set the I2C MAC offset"
228 default 0x0 228 default 0x0
229 help 229 help
230 Set the MAC offset for i2C. 230 Set the MAC offset for i2C.
231 231
232 if I2C_EEPROM 232 if I2C_EEPROM
233 233
234 config SYS_I2C_EEPROM_ADDR 234 config SYS_I2C_EEPROM_ADDR
235 hex "Chip address of the EEPROM device" 235 hex "Chip address of the EEPROM device"
236 default 0 236 default 0
237 237
238 config SYS_I2C_EEPROM_BUS 238 config SYS_I2C_EEPROM_BUS
239 int "I2C bus of the EEPROM device." 239 int "I2C bus of the EEPROM device."
240 default 0 240 default 0
241 241
242 config SYS_EEPROM_SIZE 242 config SYS_EEPROM_SIZE
243 int "Size in bytes of the EEPROM device" 243 int "Size in bytes of the EEPROM device"
244 default 256 244 default 256
245 245
246 config SYS_EEPROM_PAGE_WRITE_BITS 246 config SYS_EEPROM_PAGE_WRITE_BITS
247 int "Number of bits used to address bytes in a single page" 247 int "Number of bits used to address bytes in a single page"
248 default 0 248 default 0
249 help 249 help
250 The EEPROM page size is 2^SYS_EEPROM_PAGE_WRITE_BITS. 250 The EEPROM page size is 2^SYS_EEPROM_PAGE_WRITE_BITS.
251 A 64 byte page, for example would require six bits. 251 A 64 byte page, for example would require six bits.
252 252
253 config SYS_EEPROM_PAGE_WRITE_DELAY_MS 253 config SYS_EEPROM_PAGE_WRITE_DELAY_MS
254 int "Number of milliseconds to delay between page writes" 254 int "Number of milliseconds to delay between page writes"
255 default 0 255 default 0
256 256
257 config SYS_I2C_EEPROM_ADDR_LEN 257 config SYS_I2C_EEPROM_ADDR_LEN
258 int "Length in bytes of the EEPROM memory array address" 258 int "Length in bytes of the EEPROM memory array address"
259 default 1 259 default 1
260 help 260 help
261 Note: This is NOT the chip address length! 261 Note: This is NOT the chip address length!
262 262
263 config SYS_I2C_EEPROM_ADDR_OVERFLOW 263 config SYS_I2C_EEPROM_ADDR_OVERFLOW
264 hex "EEPROM Address Overflow" 264 hex "EEPROM Address Overflow"
265 default 0 265 default 0
266 help 266 help
267 EEPROM chips that implement "address overflow" are ones 267 EEPROM chips that implement "address overflow" are ones
268 like Catalyst 24WC04/08/16 which has 9/10/11 bits of 268 like Catalyst 24WC04/08/16 which has 9/10/11 bits of
269 address and the extra bits end up in the "chip address" bit 269 address and the extra bits end up in the "chip address" bit
270 slots. This makes a 24WC08 (1Kbyte) chip look like four 256 270 slots. This makes a 24WC08 (1Kbyte) chip look like four 256
271 byte chips. 271 byte chips.
272 272
273 endif 273 endif
274 274
275 config GDSYS_RXAUI_CTRL 275 config GDSYS_RXAUI_CTRL
276 bool "Enable gdsys RXAUI control driver" 276 bool "Enable gdsys RXAUI control driver"
277 depends on MISC 277 depends on MISC
278 help 278 help
279 Support gdsys FPGA's RXAUI control. 279 Support gdsys FPGA's RXAUI control.
280
281 config GDSYS_IOEP
282 bool "Enable gdsys IOEP driver"
283 depends on MISC
284 help
285 Support gdsys FPGA's IO endpoint driver.
280 endmenu 286 endmenu
281 287
drivers/misc/Makefile
Diff comments   View file @ 8fee226
1 # SPDX-License-Identifier: GPL-2.0+ 1 # SPDX-License-Identifier: GPL-2.0+
2 # 2 #
3 # (C) Copyright 2000-2007 3 # (C) Copyright 2000-2007
4 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 5
6 obj-$(CONFIG_MISC) += misc-uclass.o 6 obj-$(CONFIG_MISC) += misc-uclass.o
7 obj-$(CONFIG_ALI152X) += ali512x.o 7 obj-$(CONFIG_ALI152X) += ali512x.o
8 obj-$(CONFIG_ALTERA_SYSID) += altera_sysid.o 8 obj-$(CONFIG_ALTERA_SYSID) += altera_sysid.o
9 obj-$(CONFIG_ATSHA204A) += atsha204a-i2c.o 9 obj-$(CONFIG_ATSHA204A) += atsha204a-i2c.o
10 obj-$(CONFIG_DS4510) += ds4510.o 10 obj-$(CONFIG_DS4510) += ds4510.o
11 obj-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o 11 obj-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
12 ifndef CONFIG_SPL_BUILD 12 ifndef CONFIG_SPL_BUILD
13 obj-$(CONFIG_CROS_EC) += cros_ec.o 13 obj-$(CONFIG_CROS_EC) += cros_ec.o
14 obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o 14 obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o
15 obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o 15 obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
16 obj-$(CONFIG_CROS_EC_SANDBOX) += cros_ec_sandbox.o 16 obj-$(CONFIG_CROS_EC_SANDBOX) += cros_ec_sandbox.o
17 obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o 17 obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
18 endif 18 endif
19 obj-$(CONFIG_FSL_IIM) += fsl_iim.o 19 obj-$(CONFIG_FSL_IIM) += fsl_iim.o
20 obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o 20 obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
21 obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o 21 obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
22 obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o 22 obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
23 obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o 23 obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o
24 obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o 24 obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o
25 obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o 25 obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o
26 obj-$(CONFIG_NS87308) += ns87308.o 26 obj-$(CONFIG_NS87308) += ns87308.o
27 obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o 27 obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o
28 ifdef CONFIG_DM_I2C 28 ifdef CONFIG_DM_I2C
29 ifndef CONFIG_SPL_BUILD 29 ifndef CONFIG_SPL_BUILD
30 obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o 30 obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o
31 endif 31 endif
32 endif 32 endif
33 obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o 33 obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o
34 obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o 34 obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o
35 obj-$(CONFIG_LED_STATUS) += status_led.o 35 obj-$(CONFIG_LED_STATUS) += status_led.o
36 obj-$(CONFIG_SANDBOX) += swap_case.o 36 obj-$(CONFIG_SANDBOX) += swap_case.o
37 ifdef CONFIG_SPL_OF_PLATDATA 37 ifdef CONFIG_SPL_OF_PLATDATA
38 ifdef CONFIG_SPL_BUILD 38 ifdef CONFIG_SPL_BUILD
39 obj-$(CONFIG_SANDBOX) += spltest_sandbox.o 39 obj-$(CONFIG_SANDBOX) += spltest_sandbox.o
40 endif 40 endif
41 endif 41 endif
42 obj-$(CONFIG_SANDBOX) += syscon_sandbox.o 42 obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o
43 obj-$(CONFIG_TEGRA_CAR) += tegra_car.o 43 obj-$(CONFIG_TEGRA_CAR) += tegra_car.o
44 obj-$(CONFIG_TEGRA186_BPMP) += tegra186_bpmp.o 44 obj-$(CONFIG_TEGRA186_BPMP) += tegra186_bpmp.o
45 obj-$(CONFIG_TWL4030_LED) += twl4030_led.o 45 obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
46 obj-$(CONFIG_FSL_IFC) += fsl_ifc.o 46 obj-$(CONFIG_FSL_IFC) += fsl_ifc.o
47 obj-$(CONFIG_FSL_SEC_MON) += fsl_sec_mon.o 47 obj-$(CONFIG_FSL_SEC_MON) += fsl_sec_mon.o
48 obj-$(CONFIG_PCA9551_LED) += pca9551_led.o 48 obj-$(CONFIG_PCA9551_LED) += pca9551_led.o
49 obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o 49 obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o
50 obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o 50 obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
51 obj-$(CONFIG_QFW) += qfw.o 51 obj-$(CONFIG_QFW) += qfw.o
52 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o 52 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
53 obj-$(CONFIG_STM32_RCC) += stm32_rcc.o 53 obj-$(CONFIG_STM32_RCC) += stm32_rcc.o
54 obj-$(CONFIG_STM32MP_FUSE) += stm32mp_fuse.o 54 obj-$(CONFIG_STM32MP_FUSE) += stm32mp_fuse.o
55 obj-$(CONFIG_SYS_DPAA_QBMAN) += fsl_portals.o 55 obj-$(CONFIG_SYS_DPAA_QBMAN) += fsl_portals.o
56 obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o
56 obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o 57 obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
57 58
drivers/misc/gdsys_ioep.c
Diff comments   View file @ 8fee226
File was created 1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2017
4 * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
5 *
6 * based on the cmd_ioloop driver/command, which is
7 *
8 * (C) Copyright 2014
9 * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
10 *
11 * SPDX-License-Identifier: GPL-2.0+
12 */
13
14 #include <common.h>
15 #include <dm.h>
16 #include <misc.h>
17 #include <regmap.h>
18
19 #include "gdsys_ioep.h"
20
21 /**
22 * struct gdsys_ioep_priv - Private data structure for IOEP devices
23 * @map: Register map to be used for the device
24 * @state: Flag to keep the current status of the RX control (enabled/disabled)
25 */
26 struct gdsys_ioep_priv {
27 struct regmap *map;
28 bool state;
29 };
30
31 /**
32 * enum last_spec - Convenience enum for read data sanity check
33 * @READ_DATA_IS_LAST: The data to be read should be the final data of the
34 * current packet
35 * @READ_DATA_IS_NOT_LAST: The data to be read should not be the final data of
36 * the current packet
37 */
38 enum last_spec {
39 READ_DATA_IS_LAST,
40 READ_DATA_IS_NOT_LAST,
41 };
42
43 static int gdsys_ioep_set_receive(struct udevice *dev, bool val)
44 {
45 struct gdsys_ioep_priv *priv = dev_get_priv(dev);
46 u16 state;
47
48 priv->state = !priv->state;
49
50 if (val)
51 state = CTRL_PROC_RECEIVE_ENABLE;
52 else
53 state = ~CTRL_PROC_RECEIVE_ENABLE;
54
55 gdsys_ioep_set(priv->map, tx_control, state);
56
57 if (val) {
58 /* Set device address to dummy 1 */
59 gdsys_ioep_set(priv->map, device_address, 1);
60 }
61
62 return !priv->state;
63 }
64
65 static int gdsys_ioep_send(struct udevice *dev, int offset,
66 const void *buf, int size)
67 {
68 struct gdsys_ioep_priv *priv = dev_get_priv(dev);
69 int k;
70 u16 *p = (u16 *)buf;
71
72 for (k = 0; k < size; ++k)
73 gdsys_ioep_set(priv->map, transmit_data, *(p++));
74
75 gdsys_ioep_set(priv->map, tx_control, CTRL_PROC_RECEIVE_ENABLE |
76 CTRL_FLUSH_TRANSMIT_BUFFER);
77
78 return 0;
79 }
80
81 /**
82 * receive_byte_buffer() - Read data from a IOEP device
83 * @dev: The IOEP device to read data from
84 * @len: The length of the data to read
85 * @buffer: The buffer to read the data into
86 * @last_spec: Flag to indicate if the data to be read in this call should be
87 * the final data of the current packet (i.e. it should be empty
88 * after this read)
89 *
90 * Return: 0 if OK, -ve on error
91 */
92 static int receive_byte_buffer(struct udevice *dev, uint len,
93 u16 *buffer, enum last_spec last_spec)
94 {
95 struct gdsys_ioep_priv *priv = dev_get_priv(dev);
96 int k;
97 int ret = -EIO;
98
99 for (k = 0; k < len; ++k) {
100 u16 rx_tx_status;
101
102 gdsys_ioep_get(priv->map, receive_data, buffer++);
103
104 gdsys_ioep_get(priv->map, rx_tx_status, &rx_tx_status);
105 /*
106 * Sanity check: If the data read should have been the last,
107 * but wasn't, something is wrong
108 */
109 if (k == (len - 1) && (last_spec == READ_DATA_IS_NOT_LAST ||
110 rx_tx_status & STATE_RX_DATA_LAST))
111 ret = 0;
112 }
113
114 if (ret)
115 debug("%s: Error while receiving bufer (err = %d)\n",
116 dev->name, ret);
117
118 return ret;
119 }
120
121 static int gdsys_ioep_receive(struct udevice *dev, int offset, void *buf,
122 int size)
123 {
124 int ret;
125 struct io_generic_packet header;
126 u16 *p = (u16 *)buf;
127 const int header_words = sizeof(struct io_generic_packet) / sizeof(u16);
128 uint len;
129
130 /* Read the packet header */
131 ret = receive_byte_buffer(dev, header_words, p, READ_DATA_IS_NOT_LAST);
132 if (ret) {
133 debug("%s: Failed to read header data (err = %d)\n",
134 dev->name, ret);
135 return ret;
136 }
137
138 memcpy(&header, p, header_words * sizeof(u16));
139 p += header_words;
140
141 /* Get payload data length */
142 len = (header.packet_length + 1) / sizeof(u16);
143
144 /* Read the packet payload */
145 ret = receive_byte_buffer(dev, len, p, READ_DATA_IS_LAST);
146 if (ret) {
147 debug("%s: Failed to read payload data (err = %d)\n",
148 dev->name, ret);
149 return ret;
150 }
151
152 return 0;
153 }
154
155 static int gdsys_ioep_get_and_reset_status(struct udevice *dev, int msgid,
156 void *tx_msg, int tx_size,
157 void *rx_msg, int rx_size)
158 {
159 struct gdsys_ioep_priv *priv = dev_get_priv(dev);
160 const u16 mask = STATE_RX_DIST_ERR | STATE_RX_LENGTH_ERR |
161 STATE_RX_FRAME_CTR_ERR | STATE_RX_FCS_ERR |
162 STATE_RX_PACKET_DROPPED | STATE_TX_ERR;
163 u16 *status = rx_msg;
164
165 gdsys_ioep_get(priv->map, rx_tx_status, status);
166
167 gdsys_ioep_set(priv->map, rx_tx_status, *status);
168
169 return (*status & mask) ? 1 : 0;
170 }
171
172 static const struct misc_ops gdsys_ioep_ops = {
173 .set_enabled = gdsys_ioep_set_receive,
174 .write = gdsys_ioep_send,
175 .read = gdsys_ioep_receive,
176 .call = gdsys_ioep_get_and_reset_status,
177 };
178
179 static int gdsys_ioep_probe(struct udevice *dev)
180 {
181 struct gdsys_ioep_priv *priv = dev_get_priv(dev);
182 int ret;
183
184 ret = regmap_init_mem(dev_ofnode(dev), &priv->map);
185 if (ret) {
186 debug("%s: Could not initialize regmap (err = %d)",
187 dev->name, ret);
188 return ret;
189 }
190
191 priv->state = false;
192
193 return 0;
194 }
195
196 static const struct udevice_id gdsys_ioep_ids[] = {
197 { .compatible = "gdsys,io-endpoint" },
198 { }
199 };
200
201 U_BOOT_DRIVER(gdsys_ioep) = {
202 .name = "gdsys_ioep",
203 .id = UCLASS_MISC,
204 .ops = &gdsys_ioep_ops,
205 .flags = DM_UC_FLAG_SEQ_ALIAS,
206 .of_match = gdsys_ioep_ids,
207 .probe = gdsys_ioep_probe,
208 .priv_auto_alloc_size = sizeof(struct gdsys_ioep_priv),
209 };
210
drivers/misc/gdsys_ioep.h
Diff comments   View file @ 8fee226
File was created 1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * (C) Copyright 2018
4 * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
5 */
6
7 #ifndef __GDSYS_IOEP_H_
8 #define __GDSYS_IOEP_H_
9
10 /**
11 * struct io_generic_packet - header structure for GDSYS IOEP packets
12 * @target_address: Target protocol address of the packet.
13 * @source_address: Source protocol address of the packet.
14 * @packet_type: Packet type.
15 * @bc: Block counter (filled in by FPGA).
16 * @packet_length: Length of the packet's payload bytes.
17 */
18 struct io_generic_packet {
19 u16 target_address;
20 u16 source_address;
21 u8 packet_type;
22 u8 bc;
23 u16 packet_length;
24 } __attribute__((__packed__));
25
26 /**
27 * struct gdsys_ioep_regs - Registers of a IOEP device
28 * @transmit_data: Register that receives data to be sent
29 * @tx_control: TX control register
30 * @receive_data: Register filled with the received data
31 * @rx_tx_status: RX/TX status register
32 * @device_address: Register for setting/reading the device's address
33 * @target_address: Register for setting/reading the remote endpoint's address
34 * @int_enable: Interrupt/Interrupt enable register
35 */
36 struct gdsys_ioep_regs {
37 u16 transmit_data;
38 u16 tx_control;
39 u16 receive_data;
40 u16 rx_tx_status;
41 u16 device_address;
42 u16 target_address;
43 u16 int_enable;
44 };
45
46 /**
47 * gdsys_ioep_set() - Convenience macro to write registers of a IOEP device
48 * @map: Register map to write the value in
49 * @member: Name of the member in the gdsys_ioep_regs structure to write
50 * @val: Value to write to the register
51 */
52 #define gdsys_ioep_set(map, member, val) \
53 regmap_set(map, struct gdsys_ioep_regs, member, val)
54
55 /**
56 * gdsys_ioep_get() - Convenience macro to read registers of a IOEP device
57 * @map: Register map to read the value from
58 * @member: Name of the member in the gdsys_ioep_regs structure to read
59 * @valp: Pointer to buffer to read the register value into
60 */
61 #define gdsys_ioep_get(map, member, valp) \
62 regmap_get(map, struct gdsys_ioep_regs, member, valp)
63
64 /**
65 * enum rx_tx_status_values - Enum to describe the fields of the rx_tx_status
66 * register
67 * @STATE_TX_PACKET_BUILDING: The device is currently building a packet
68 * (and accepting data for it)
69 * @STATE_TX_TRANSMITTING: A packet is currenly being transmitted
70 * @STATE_TX_BUFFER_FULL: The TX buffer is full
71 * @STATE_TX_ERR: A TX error occurred
72 * @STATE_RECEIVE_TIMEOUT: A receive timeout occurred
73 * @STATE_PROC_RX_STORE_TIMEOUT: A RX store timeout for a processor packet
74 * occurred
75 * @STATE_PROC_RX_RECEIVE_TIMEOUT: A RX receive timeout for a processor packet
76 * occurred
77 * @STATE_RX_DIST_ERR: A error occurred in the distribution block
78 * @STATE_RX_LENGTH_ERR: A length invalid error occurred
79 * @STATE_RX_FRAME_CTR_ERR: A frame count error occurred (two
80 * non-increasing frame count numbers
81 * encountered)
82 * @STATE_RX_FCS_ERR: A CRC error occurred
83 * @STATE_RX_PACKET_DROPPED: A RX packet has been dropped
84 * @STATE_RX_DATA_LAST: The data to be read is the final data of the
85 * current packet
86 * @STATE_RX_DATA_FIRST: The data to be read is the first data of the
87 * current packet
88 * @STATE_RX_DATA_AVAILABLE: RX data is available to be read
89 */
90 enum rx_tx_status_values {
91 STATE_TX_PACKET_BUILDING = BIT(0),
92 STATE_TX_TRANSMITTING = BIT(1),
93 STATE_TX_BUFFER_FULL = BIT(2),
94 STATE_TX_ERR = BIT(3),
95 STATE_RECEIVE_TIMEOUT = BIT(4),
96 STATE_PROC_RX_STORE_TIMEOUT = BIT(5),
97 STATE_PROC_RX_RECEIVE_TIMEOUT = BIT(6),
98 STATE_RX_DIST_ERR = BIT(7),
99 STATE_RX_LENGTH_ERR = BIT(8),
100 STATE_RX_FRAME_CTR_ERR = BIT(9),
101 STATE_RX_FCS_ERR = BIT(10),
102 STATE_RX_PACKET_DROPPED = BIT(11),
103 STATE_RX_DATA_LAST = BIT(12),
104 STATE_RX_DATA_FIRST = BIT(13),
105 STATE_RX_DATA_AVAILABLE = BIT(15),
106 };
107
108 /**
109 * enum tx_control_values - Enum to describe the fields of the tx_control
110 * register
111 * @CTRL_PROC_RECEIVE_ENABLE: Enable packet reception for the processor
112 * @CTRL_FLUSH_TRANSMIT_BUFFER: Flush the transmit buffer (and send packet data)
113 */
114 enum tx_control_values {
115 CTRL_PROC_RECEIVE_ENABLE = BIT(12),
116 CTRL_FLUSH_TRANSMIT_BUFFER = BIT(15),
117 };
118
119 /**
120 * enum int_enable_values - Enum to describe the fields of the int_enable
121 * register
122 * @IRQ_CPU_TRANSMITBUFFER_FREE_STATUS: The transmit buffer is free (packet
123 * data can be transmitted to the
124 * device)
125 * @IRQ_CPU_PACKET_TRANSMITTED_EVENT: A packet has been transmitted
126 * @IRQ_NEW_CPU_PACKET_RECEIVED_EVENT: A new packet has been received
127 * @IRQ_CPU_RECEIVE_DATA_AVAILABLE_STATUS: RX packet data are available to be
128 * read
129 */
130 enum int_enable_values {
131 IRQ_CPU_TRANSMITBUFFER_FREE_STATUS = BIT(5),
132 IRQ_CPU_PACKET_TRANSMITTED_EVENT = BIT(6),
133 IRQ_NEW_CPU_PACKET_RECEIVED_EVENT = BIT(7),
134 IRQ_CPU_RECEIVE_DATA_AVAILABLE_STATUS = BIT(8),
135 };
136
137 #endif /* __GDSYS_IOEP_H_ */
138
drivers/misc/misc-uclass.c
Diff comments   View file @ 8fee226
1 // SPDX-License-Identifier: GPL-2.0+ 1 // SPDX-License-Identifier: GPL-2.0+
2 /* 2 /*
3 * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw> 3 * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
4 */ 4 */
5 5
6 #include <common.h> 6 #include <common.h>
7 #include <dm.h> 7 #include <dm.h>
8 #include <errno.h> 8 #include <errno.h>
9 #include <misc.h> 9 #include <misc.h>
10 10
11 /* 11 /*
12 * Implement a miscellaneous uclass for those do not fit other more 12 * Implement a miscellaneous uclass for those do not fit other more
13 * general classes. A set of generic read, write and ioctl methods may 13 * general classes. A set of generic read, write and ioctl methods may
14 * be used to access the device. 14 * be used to access the device.
15 */ 15 */
16 16
17 int misc_read(struct udevice *dev, int offset, void *buf, int size) 17 int misc_read(struct udevice *dev, int offset, void *buf, int size)
18 { 18 {
19 const struct misc_ops *ops = device_get_ops(dev); 19 const struct misc_ops *ops = device_get_ops(dev);
20 20
21 if (!ops->read) 21 if (!ops->read)
22 return -ENOSYS; 22 return -ENOSYS;
23 23
24 return ops->read(dev, offset, buf, size); 24 return ops->read(dev, offset, buf, size);
25 } 25 }
26 26
27 int misc_write(struct udevice *dev, int offset, void *buf, int size) 27 int misc_write(struct udevice *dev, int offset, void *buf, int size)
28 { 28 {
29 const struct misc_ops *ops = device_get_ops(dev); 29 const struct misc_ops *ops = device_get_ops(dev);
30 30
31 if (!ops->write) 31 if (!ops->write)
32 return -ENOSYS; 32 return -ENOSYS;
33 33
34 return ops->write(dev, offset, buf, size); 34 return ops->write(dev, offset, buf, size);
35 } 35 }
36 36
37 int misc_ioctl(struct udevice *dev, unsigned long request, void *buf) 37 int misc_ioctl(struct udevice *dev, unsigned long request, void *buf)
38 { 38 {
39 const struct misc_ops *ops = device_get_ops(dev); 39 const struct misc_ops *ops = device_get_ops(dev);
40 40
41 if (!ops->ioctl) 41 if (!ops->ioctl)
42 return -ENOSYS; 42 return -ENOSYS;
43 43
44 return ops->ioctl(dev, request, buf); 44 return ops->ioctl(dev, request, buf);
45 } 45 }
46 46
47 int misc_call(struct udevice *dev, int msgid, void *tx_msg, int tx_size, 47 int misc_call(struct udevice *dev, int msgid, void *tx_msg, int tx_size,
48 void *rx_msg, int rx_size) 48 void *rx_msg, int rx_size)
49 { 49 {
50 const struct misc_ops *ops = device_get_ops(dev); 50 const struct misc_ops *ops = device_get_ops(dev);
51 51
52 if (!ops->call) 52 if (!ops->call)
53 return -ENOSYS; 53 return -ENOSYS;
54 54
55 return ops->call(dev, msgid, tx_msg, tx_size, rx_msg, rx_size); 55 return ops->call(dev, msgid, tx_msg, tx_size, rx_msg, rx_size);
56 } 56 }
57 57
58 int misc_set_enabled(struct udevice *dev, bool val)
59 {
60 const struct misc_ops *ops = device_get_ops(dev);
61
62 if (!ops->set_enabled)
63 return -ENOSYS;
64
65 return ops->set_enabled(dev, val);
66 }
67
58 UCLASS_DRIVER(misc) = { 68 UCLASS_DRIVER(misc) = {
59 .id = UCLASS_MISC, 69 .id = UCLASS_MISC,
60 .name = "misc", 70 .name = "misc",
61 }; 71 };
62 72
drivers/misc/misc_sandbox.c
Diff comments   View file @ 8fee226
File was created 1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2018
4 * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
5 */
6
7 #include <common.h>
8 #include <dm.h>
9 #include <misc.h>
10
11 struct misc_sandbox_priv {
12 u8 mem[128];
13 ulong last_ioctl;
14 bool enabled;
15 };
16
17 int misc_sandbox_read(struct udevice *dev, int offset, void *buf, int size)
18 {
19 struct misc_sandbox_priv *priv = dev_get_priv(dev);
20
21 memcpy(buf, priv->mem + offset, size);
22
23 return 0;
24 }
25
26 int misc_sandbox_write(struct udevice *dev, int offset, const void *buf,
27 int size)
28 {
29 struct misc_sandbox_priv *priv = dev_get_priv(dev);
30
31 memcpy(priv->mem + offset, buf, size);
32
33 return 0;
34 }
35
36 int misc_sandbox_ioctl(struct udevice *dev, unsigned long request, void *buf)
37 {
38 struct misc_sandbox_priv *priv = dev_get_priv(dev);
39
40 priv->last_ioctl = request;
41
42 return 0;
43 }
44
45 int misc_sandbox_call(struct udevice *dev, int msgid, void *tx_msg,
46 int tx_size, void *rx_msg, int rx_size)
47 {
48 struct misc_sandbox_priv *priv = dev_get_priv(dev);
49
50 if (msgid == 0) {
51 int num = *(int *)tx_msg;
52
53 switch (num) {
54 case 0:
55 strncpy(rx_msg, "Zero", rx_size);
56 break;
57 case 1:
58 strncpy(rx_msg, "One", rx_size);
59 break;
60 case 2:
61 strncpy(rx_msg, "Two", rx_size);
62 break;
63 default:
64 return -EINVAL;
65 }
66 }
67
68 if (msgid == 1) {
69 int num = *(int *)tx_msg;
70
71 switch (num) {
72 case 0:
73 strncpy(rx_msg, "Forty", rx_size);
74 break;
75 case 1:
76 strncpy(rx_msg, "Forty-one", rx_size);
77 break;
78 case 2:
79 strncpy(rx_msg, "Forty-two", rx_size);
80 break;
81 default:
82 return -EINVAL;
83 }
84 }
85
86 if (msgid == 2)
87 memcpy(rx_msg, &priv->last_ioctl, sizeof(priv->last_ioctl));
88
89 if (msgid == 3)
90 memcpy(rx_msg, &priv->enabled, sizeof(priv->enabled));
91
92 return 0;
93 }
94
95 int misc_sandbox_set_enabled(struct udevice *dev, bool val)
96 {
97 struct misc_sandbox_priv *priv = dev_get_priv(dev);
98
99 priv->enabled = !priv->enabled;
100
101 return 0;
102 }
103
104 static const struct misc_ops misc_sandbox_ops = {
105 .read = misc_sandbox_read,
106 .write = misc_sandbox_write,
107 .ioctl = misc_sandbox_ioctl,
108 .call = misc_sandbox_call,
109 .set_enabled = misc_sandbox_set_enabled,
110 };
111
112 int misc_sandbox_probe(struct udevice *dev)
113 {
114 struct misc_sandbox_priv *priv = dev_get_priv(dev);
115
116 priv->enabled = true;
117
118 return 0;
119 }
120
121 static const struct udevice_id misc_sandbox_ids[] = {
122 { .compatible = "sandbox,misc_sandbox" },
123 { }
124 };
125
126 U_BOOT_DRIVER(misc_sandbox) = {
127 .name = "misc_sandbox",
128 .id = UCLASS_MISC,
129 .ops = &misc_sandbox_ops,
130 .of_match = misc_sandbox_ids,
131 .probe = misc_sandbox_probe,
132 .priv_auto_alloc_size = sizeof(struct misc_sandbox_priv),
133 };
134
1 /* SPDX-License-Identifier: GPL-2.0+ */ 1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /* 2 /*
3 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw> 3 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
4 */ 4 */
5 5
6 #ifndef _MISC_H_ 6 #ifndef _MISC_H_
7 #define _MISC_H_ 7 #define _MISC_H_
8 8
9 /* 9 /**
10 * Read the device to buffer, optional. 10 * misc_read() - Read the device to buffer, optional.
11 *
12 * @dev: the device 11 * @dev: the device
13 * @offset: offset to read the device 12 * @offset: offset to read the device
14 * @buf: pointer to data buffer 13 * @buf: pointer to data buffer
15 * @size: data size in bytes to read the device 14 * @size: data size in bytes to read the device
16 * @return: 0 if OK, -ve on error 15 *
16 * Return: 0 if OK, -ve on error
17 */ 17 */
18 int misc_read(struct udevice *dev, int offset, void *buf, int size); 18 int misc_read(struct udevice *dev, int offset, void *buf, int size);
19 /* 19
20 * Write buffer to the device, optional. 20 /**
21 * 21 * misc_write() - Write buffer to the device, optional.
22 * @dev: the device 22 * @dev: the device
23 * @offset: offset to write the device 23 * @offset: offset to write the device
24 * @buf: pointer to data buffer 24 * @buf: pointer to data buffer
25 * @size: data size in bytes to write the device 25 * @size: data size in bytes to write the device
26 * @return: 0 if OK, -ve on error 26 *
27 * Return: 0 if OK, -ve on error
27 */ 28 */
28 int misc_write(struct udevice *dev, int offset, void *buf, int size); 29 int misc_write(struct udevice *dev, int offset, void *buf, int size);
29 /* 30
30 * Assert command to the device, optional. 31 /**
31 * 32 * misc_ioctl() - Assert command to the device, optional.
32 * @dev: the device 33 * @dev: the device
33 * @request: command to be sent to the device 34 * @request: command to be sent to the device
34 * @buf: pointer to buffer related to the request 35 * @buf: pointer to buffer related to the request
35 * @return: 0 if OK, -ve on error 36 *
37 * Return: 0 if OK, -ve on error
36 */ 38 */
37 int misc_ioctl(struct udevice *dev, unsigned long request, void *buf); 39 int misc_ioctl(struct udevice *dev, unsigned long request, void *buf);
38 40
39 /* 41 /**
40 * Send a message to the device and wait for a response. 42 * misc_call() - Send a message to the device and wait for a response.
43 * @dev: the device.
44 * @msgid: the message ID/number to send.
45 * @tx_msg: the request/transmit message payload.
46 * @tx_size: the size of the buffer pointed at by tx_msg.
47 * @rx_msg: the buffer to receive the response message payload. May be NULL if
48 * the caller only cares about the error code.
49 * @rx_size: the size of the buffer pointed at by rx_msg.
41 * 50 *
42 * The caller provides the message type/ID and payload to be sent. 51 * The caller provides the message type/ID and payload to be sent.
43 * The callee constructs any message header required, transmits it to the 52 * The callee constructs any message header required, transmits it to the
44 * target, waits for a response, checks any error code in the response, 53 * target, waits for a response, checks any error code in the response,
45 * strips any message header from the response, and returns the error code 54 * strips any message header from the response, and returns the error code
46 * (or a parsed version of it) and the response message payload. 55 * (or a parsed version of it) and the response message payload.
47 * 56 *
48 * @dev: the device. 57 * Return: the response message size if OK, -ve on error
49 * @msgid: the message ID/number to send.
50 * tx_msg: the request/transmit message payload.
51 * tx_size: the size of the buffer pointed at by tx_msg.
52 * rx_msg: the buffer to receive the response message payload. May be NULL if
53 * the caller only cares about the error code.
54 * rx_size: the size of the buffer pointed at by rx_msg.
55 * @return the response message size if OK, -ve on error
56 */ 58 */
57 int misc_call(struct udevice *dev, int msgid, void *tx_msg, int tx_size, 59 int misc_call(struct udevice *dev, int msgid, void *tx_msg, int tx_size,
58 void *rx_msg, int rx_size); 60 void *rx_msg, int rx_size);
59 61
62 /**
63 * misc_set_enabled() - Enable or disable a device.
64 * @dev: the device to enable or disable.
65 * @val: the flag that tells the driver to either enable or disable the device.
66 *
67 * The semantics of "disable" and "enable" should be understood here as
68 * activating or deactivating the device's primary function, hence a "disabled"
69 * device should be dormant, but still answer to commands and queries.
70 *
71 * A probed device may start in a disabled or enabled state, depending on the
72 * driver and hardware.
73 *
74 * Return: -ve on error, 0 if the previous state was "disabled", 1 if the
75 * previous state was "enabled"
76 */
77 int misc_set_enabled(struct udevice *dev, bool val);
78
60 /* 79 /*
61 * struct misc_ops - Driver model Misc operations 80 * struct misc_ops - Driver model Misc operations
62 * 81 *
63 * The uclass interface is implemented by all miscellaneous devices which 82 * The uclass interface is implemented by all miscellaneous devices which
64 * use driver model. 83 * use driver model.
65 */ 84 */
66 struct misc_ops { 85 struct misc_ops {
67 /* 86 /**
68 * Read the device to buffer, optional. 87 * Read the device to buffer, optional.
69 *
70 * @dev: the device 88 * @dev: the device
71 * @offset: offset to read the device 89 * @offset: offset to read the device
72 * @buf: pointer to data buffer 90 * @buf: pointer to data buffer
73 * @size: data size in bytes to read the device 91 * @size: data size in bytes to read the device
74 * @return: 0 if OK, -ve on error 92 *
93 * Return: 0 if OK, -ve on error
75 */ 94 */
76 int (*read)(struct udevice *dev, int offset, void *buf, int size); 95 int (*read)(struct udevice *dev, int offset, void *buf, int size);
77 /* 96
97 /**
78 * Write buffer to the device, optional. 98 * Write buffer to the device, optional.
79 *
80 * @dev: the device 99 * @dev: the device
81 * @offset: offset to write the device 100 * @offset: offset to write the device
82 * @buf: pointer to data buffer 101 * @buf: pointer to data buffer
83 * @size: data size in bytes to write the device 102 * @size: data size in bytes to write the device
84 * @return: 0 if OK, -ve on error 103 *
104 * Return: 0 if OK, -ve on error
85 */ 105 */
86 int (*write)(struct udevice *dev, int offset, const void *buf, 106 int (*write)(struct udevice *dev, int offset, const void *buf,
87 int size); 107 int size);
88 /* 108 /**
89 * Assert command to the device, optional. 109 * Assert command to the device, optional.
90 *
91 * @dev: the device 110 * @dev: the device
92 * @request: command to be sent to the device 111 * @request: command to be sent to the device
93 * @buf: pointer to buffer related to the request 112 * @buf: pointer to buffer related to the request
94 * @return: 0 if OK, -ve on error 113 *
114 * Return: 0 if OK, -ve on error
95 */ 115 */
96 int (*ioctl)(struct udevice *dev, unsigned long request, void *buf); 116 int (*ioctl)(struct udevice *dev, unsigned long request, void *buf);
97 /* 117
118 /**
98 * Send a message to the device and wait for a response. 119 * Send a message to the device and wait for a response.
99 *
100 * @dev: the device 120 * @dev: the device
101 * @msgid: the message ID/number to send 121 * @msgid: the message ID/number to send
102 * tx_msg: the request/transmit message payload 122 * @tx_msg: the request/transmit message payload
103 * tx_size: the size of the buffer pointed at by tx_msg 123 * @tx_size: the size of the buffer pointed at by tx_msg
104 * rx_msg: the buffer to receive the response message payload. May be 124 * @rx_msg: the buffer to receive the response message payload. May be
105 * NULL if the caller only cares about the error code. 125 * NULL if the caller only cares about the error code.
106 * rx_size: the size of the buffer pointed at by rx_msg 126 * @rx_size: the size of the buffer pointed at by rx_msg
107 * @return the response message size if OK, -ve on error 127 *
128 * Return: the response message size if OK, -ve on error
108 */ 129 */
109 int (*call)(struct udevice *dev, int msgid, void *tx_msg, int tx_size, 130 int (*call)(struct udevice *dev, int msgid, void *tx_msg, int tx_size,
110 void *rx_msg, int rx_size); 131 void *rx_msg, int rx_size);
132 /**
133 * Enable or disable a device, optional.
1 # SPDX-License-Identifier: GPL-2.0+ 1 # SPDX-License-Identifier: GPL-2.0+
2 # 2 #
3 # Copyright (c) 2013 Google, Inc 3 # Copyright (c) 2013 Google, Inc
4 4
5 obj-$(CONFIG_CMD_DM) += cmd_dm.o 5 obj-$(CONFIG_CMD_DM) += cmd_dm.o
6 obj-$(CONFIG_UT_DM) += bus.o 6 obj-$(CONFIG_UT_DM) += bus.o
7 obj-$(CONFIG_UT_DM) += test-driver.o 7 obj-$(CONFIG_UT_DM) += test-driver.o
8 obj-$(CONFIG_UT_DM) += test-fdt.o 8 obj-$(CONFIG_UT_DM) += test-fdt.o
9 obj-$(CONFIG_UT_DM) += test-main.o 9 obj-$(CONFIG_UT_DM) += test-main.o
10 obj-$(CONFIG_UT_DM) += test-uclass.o 10 obj-$(CONFIG_UT_DM) += test-uclass.o
11 11
12 # Tests for particular subsystems - when enabling driver model for a new 12 # Tests for particular subsystems - when enabling driver model for a new
13 # subsystem you must add sandbox tests here. 13 # subsystem you must add sandbox tests here.
14 obj-$(CONFIG_UT_DM) += core.o 14 obj-$(CONFIG_UT_DM) += core.o
15 ifneq ($(CONFIG_SANDBOX),) 15 ifneq ($(CONFIG_SANDBOX),)
16 obj-$(CONFIG_BLK) += blk.o 16 obj-$(CONFIG_BLK) += blk.o
17 obj-$(CONFIG_CLK) += clk.o 17 obj-$(CONFIG_CLK) += clk.o
18 obj-$(CONFIG_DM_ETH) += eth.o 18 obj-$(CONFIG_DM_ETH) += eth.o
19 obj-$(CONFIG_DM_GPIO) += gpio.o 19 obj-$(CONFIG_DM_GPIO) += gpio.o
20 obj-$(CONFIG_DM_I2C) += i2c.o 20 obj-$(CONFIG_DM_I2C) += i2c.o
21 obj-$(CONFIG_LED) += led.o 21 obj-$(CONFIG_LED) += led.o
22 obj-$(CONFIG_DM_MAILBOX) += mailbox.o 22 obj-$(CONFIG_DM_MAILBOX) += mailbox.o
23 obj-$(CONFIG_DM_MMC) += mmc.o 23 obj-$(CONFIG_DM_MMC) += mmc.o
24 obj-y += ofnode.o 24 obj-y += ofnode.o
25 obj-$(CONFIG_DM_PCI) += pci.o 25 obj-$(CONFIG_DM_PCI) += pci.o
26 obj-$(CONFIG_PHY) += phy.o 26 obj-$(CONFIG_PHY) += phy.o
27 obj-$(CONFIG_POWER_DOMAIN) += power-domain.o 27 obj-$(CONFIG_POWER_DOMAIN) += power-domain.o
28 obj-$(CONFIG_DM_PWM) += pwm.o 28 obj-$(CONFIG_DM_PWM) += pwm.o
29 obj-$(CONFIG_RAM) += ram.o 29 obj-$(CONFIG_RAM) += ram.o
30 obj-y += regmap.o 30 obj-y += regmap.o
31 obj-$(CONFIG_REMOTEPROC) += remoteproc.o 31 obj-$(CONFIG_REMOTEPROC) += remoteproc.o
32 obj-$(CONFIG_DM_RESET) += reset.o 32 obj-$(CONFIG_DM_RESET) += reset.o
33 obj-$(CONFIG_SYSRESET) += sysreset.o 33 obj-$(CONFIG_SYSRESET) += sysreset.o
34 obj-$(CONFIG_DM_RTC) += rtc.o 34 obj-$(CONFIG_DM_RTC) += rtc.o
35 obj-$(CONFIG_DM_SPI_FLASH) += sf.o 35 obj-$(CONFIG_DM_SPI_FLASH) += sf.o
36 obj-$(CONFIG_SMEM) += smem.o 36 obj-$(CONFIG_SMEM) += smem.o
37 obj-$(CONFIG_DM_SPI) += spi.o 37 obj-$(CONFIG_DM_SPI) += spi.o
38 obj-y += syscon.o 38 obj-y += syscon.o
39 obj-$(CONFIG_DM_USB) += usb.o 39 obj-$(CONFIG_DM_USB) += usb.o
40 obj-$(CONFIG_DM_PMIC) += pmic.o 40 obj-$(CONFIG_DM_PMIC) += pmic.o
41 obj-$(CONFIG_DM_REGULATOR) += regulator.o 41 obj-$(CONFIG_DM_REGULATOR) += regulator.o
42 obj-$(CONFIG_TIMER) += timer.o 42 obj-$(CONFIG_TIMER) += timer.o
43 obj-$(CONFIG_DM_VIDEO) += video.o 43 obj-$(CONFIG_DM_VIDEO) += video.o
44 obj-$(CONFIG_ADC) += adc.o 44 obj-$(CONFIG_ADC) += adc.o
45 obj-$(CONFIG_SPMI) += spmi.o 45 obj-$(CONFIG_SPMI) += spmi.o
46 obj-$(CONFIG_WDT) += wdt.o 46 obj-$(CONFIG_WDT) += wdt.o
47 obj-$(CONFIG_AXI) += axi.o 47 obj-$(CONFIG_AXI) += axi.o
48 obj-$(CONFIG_MISC) += misc.o
48 endif 49 endif
49 50
File was created 1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2018
4 * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
5 */
6
7 #include <common.h>
8 #include <dm.h>
9 #include <dm/test.h>
10 #include <misc.h>
11 #include <test/ut.h>
12
13 static int dm_test_misc(struct unit_test_state *uts)
14 {
15 struct udevice *dev;
16 u8 buf[16];
17 int id;
18 ulong last_ioctl;
19 bool enabled;
20
21 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "misc-test", &dev));
22
23 /* Read / write tests */
24 ut_assertok(misc_write(dev, 0, "TEST", 4));
25 ut_assertok(misc_write(dev, 4, "WRITE", 5));
26 ut_assertok(misc_read(dev, 0, buf, 9));
27
28 ut_assertok(memcmp(buf, "TESTWRITE", 9));
29
30 /* Call tests */
31
32 id = 0;
33 ut_assertok(misc_call(dev, 0, &id, 4, buf, 16));
34 ut_assertok(memcmp(buf, "Zero", 4));
35
36 id = 2;
37 ut_assertok(misc_call(dev, 0, &id, 4, buf, 16));
38 ut_assertok(memcmp(buf, "Two", 3));
39
40 ut_assertok(misc_call(dev, 1, &id, 4, buf, 16));
41 ut_assertok(memcmp(buf, "Forty-two", 9));
42
43 id = 1;
44 ut_assertok(misc_call(dev, 1, &id, 4, buf, 16));
45 ut_assertok(memcmp(buf, "Forty-one", 9));
46
47 /* IOCTL tests */
48
49 ut_assertok(misc_ioctl(dev, 6, NULL));
50 /* Read back last issued ioctl */
51 ut_assertok(misc_call(dev, 2, NULL, 0, &last_ioctl,
52 sizeof(last_ioctl)));
53 ut_asserteq(6, last_ioctl)
54
55 ut_assertok(misc_ioctl(dev, 23, NULL));
56 /* Read back last issued ioctl */
57 ut_assertok(misc_call(dev, 2, NULL, 0, &last_ioctl,
58 sizeof(last_ioctl)));
59 ut_asserteq(23, last_ioctl)
60
61 /* Enable / disable tests */
62
63 /* Read back enable/disable status */
64 ut_assertok(misc_call(dev, 3, NULL, 0, &enabled,
65 sizeof(enabled)));
66 ut_asserteq(true, enabled);
67
68 ut_assertok(misc_set_enabled(dev, false));
69 /* Read back enable/disable status */
70 ut_assertok(misc_call(dev, 3, NULL, 0, &enabled,
71 sizeof(enabled)));
72 ut_asserteq(false, enabled);
73
74 ut_assertok(misc_set_enabled(dev, true));
75 /* Read back enable/disable status */
76 ut_assertok(misc_call(dev, 3, NULL, 0, &enabled,
77 sizeof(enabled)));
78 ut_asserteq(true, enabled);
79
80 return 0;
81 }
82
83 DM_TEST(dm_test_misc, DM_TESTF_SCAN_FDT);
84