Commit a4dae631bfa848d8a0d1933583ed7e2f6a96cab3
Committed by
Marek Vasut
Marek Vasut
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86d74d0339
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CONFIG: EXYNOS5: USB: Enable USB 2.0 on smdk5250
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Showing 1 changed file with 6 additions and 0 deletions Inline Diff
include/configs/smdk5250.h
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2011 Samsung Electronics | 2 | * Copyright (C) 2011 Samsung Electronics |
| 3 | * | 3 | * |
| 4 | * Configuration settings for the SAMSUNG SMDK5250 (EXYNOS5250) board. | 4 | * Configuration settings for the SAMSUNG SMDK5250 (EXYNOS5250) board. |
| 5 | * | 5 | * |
| 6 | * See file CREDITS for list of people who contributed to this | 6 | * See file CREDITS for list of people who contributed to this |
| 7 | * project. | 7 | * project. |
| 8 | * | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or | 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as | 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of | 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. | 12 | * the License, or (at your option) any later version. |
| 13 | * | 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, | 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. | 17 | * GNU General Public License for more details. |
| 18 | * | 18 | * |
| 19 | * You should have received a copy of the GNU General Public License | 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software | 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 22 | * MA 02111-1307 USA | 22 | * MA 02111-1307 USA |
| 23 | */ | 23 | */ |
| 24 | 24 | ||
| 25 | #ifndef __CONFIG_H | 25 | #ifndef __CONFIG_H |
| 26 | #define __CONFIG_H | 26 | #define __CONFIG_H |
| 27 | 27 | ||
| 28 | /* High Level Configuration Options */ | 28 | /* High Level Configuration Options */ |
| 29 | #define CONFIG_SAMSUNG /* in a SAMSUNG core */ | 29 | #define CONFIG_SAMSUNG /* in a SAMSUNG core */ |
| 30 | #define CONFIG_S5P /* S5P Family */ | 30 | #define CONFIG_S5P /* S5P Family */ |
| 31 | #define CONFIG_EXYNOS5 /* which is in a Exynos5 Family */ | 31 | #define CONFIG_EXYNOS5 /* which is in a Exynos5 Family */ |
| 32 | #define CONFIG_SMDK5250 /* which is in a SMDK5250 */ | 32 | #define CONFIG_SMDK5250 /* which is in a SMDK5250 */ |
| 33 | 33 | ||
| 34 | #include <asm/arch/cpu.h> /* get chip and board defs */ | 34 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
| 35 | 35 | ||
| 36 | #define CONFIG_ARCH_CPU_INIT | 36 | #define CONFIG_ARCH_CPU_INIT |
| 37 | #define CONFIG_DISPLAY_CPUINFO | 37 | #define CONFIG_DISPLAY_CPUINFO |
| 38 | #define CONFIG_DISPLAY_BOARDINFO | 38 | #define CONFIG_DISPLAY_BOARDINFO |
| 39 | 39 | ||
| 40 | /* Keep L2 Cache Disabled */ | 40 | /* Keep L2 Cache Disabled */ |
| 41 | #define CONFIG_SYS_DCACHE_OFF | 41 | #define CONFIG_SYS_DCACHE_OFF |
| 42 | 42 | ||
| 43 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 | 43 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
| 44 | #define CONFIG_SYS_TEXT_BASE 0x43E00000 | 44 | #define CONFIG_SYS_TEXT_BASE 0x43E00000 |
| 45 | 45 | ||
| 46 | /* input clock of PLL: SMDK5250 has 24MHz input clock */ | 46 | /* input clock of PLL: SMDK5250 has 24MHz input clock */ |
| 47 | #define CONFIG_SYS_CLK_FREQ 24000000 | 47 | #define CONFIG_SYS_CLK_FREQ 24000000 |
| 48 | 48 | ||
| 49 | #define CONFIG_SETUP_MEMORY_TAGS | 49 | #define CONFIG_SETUP_MEMORY_TAGS |
| 50 | #define CONFIG_CMDLINE_TAG | 50 | #define CONFIG_CMDLINE_TAG |
| 51 | #define CONFIG_INITRD_TAG | 51 | #define CONFIG_INITRD_TAG |
| 52 | #define CONFIG_CMDLINE_EDITING | 52 | #define CONFIG_CMDLINE_EDITING |
| 53 | 53 | ||
| 54 | /* MACH_TYPE_SMDK5250 macro will be removed once added to mach-types */ | 54 | /* MACH_TYPE_SMDK5250 macro will be removed once added to mach-types */ |
| 55 | #define MACH_TYPE_SMDK5250 3774 | 55 | #define MACH_TYPE_SMDK5250 3774 |
| 56 | #define CONFIG_MACH_TYPE MACH_TYPE_SMDK5250 | 56 | #define CONFIG_MACH_TYPE MACH_TYPE_SMDK5250 |
| 57 | 57 | ||
| 58 | /* Power Down Modes */ | 58 | /* Power Down Modes */ |
| 59 | #define S5P_CHECK_SLEEP 0x00000BAD | 59 | #define S5P_CHECK_SLEEP 0x00000BAD |
| 60 | #define S5P_CHECK_DIDLE 0xBAD00000 | 60 | #define S5P_CHECK_DIDLE 0xBAD00000 |
| 61 | #define S5P_CHECK_LPA 0xABAD0000 | 61 | #define S5P_CHECK_LPA 0xABAD0000 |
| 62 | 62 | ||
| 63 | /* Offset for inform registers */ | 63 | /* Offset for inform registers */ |
| 64 | #define INFORM0_OFFSET 0x800 | 64 | #define INFORM0_OFFSET 0x800 |
| 65 | #define INFORM1_OFFSET 0x804 | 65 | #define INFORM1_OFFSET 0x804 |
| 66 | 66 | ||
| 67 | /* Size of malloc() pool */ | 67 | /* Size of malloc() pool */ |
| 68 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) | 68 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) |
| 69 | 69 | ||
| 70 | /* select serial console configuration */ | 70 | /* select serial console configuration */ |
| 71 | #define CONFIG_SERIAL_MULTI | 71 | #define CONFIG_SERIAL_MULTI |
| 72 | #define CONFIG_SERIAL1 /* use SERIAL 1 */ | 72 | #define CONFIG_SERIAL1 /* use SERIAL 1 */ |
| 73 | #define CONFIG_BAUDRATE 115200 | 73 | #define CONFIG_BAUDRATE 115200 |
| 74 | #define EXYNOS5_DEFAULT_UART_OFFSET 0x010000 | 74 | #define EXYNOS5_DEFAULT_UART_OFFSET 0x010000 |
| 75 | 75 | ||
| 76 | #define TZPC_BASE_OFFSET 0x10000 | 76 | #define TZPC_BASE_OFFSET 0x10000 |
| 77 | 77 | ||
| 78 | /* SD/MMC configuration */ | 78 | /* SD/MMC configuration */ |
| 79 | #define CONFIG_GENERIC_MMC | 79 | #define CONFIG_GENERIC_MMC |
| 80 | #define CONFIG_MMC | 80 | #define CONFIG_MMC |
| 81 | #define CONFIG_SDHCI | 81 | #define CONFIG_SDHCI |
| 82 | #define CONFIG_S5P_SDHCI | 82 | #define CONFIG_S5P_SDHCI |
| 83 | 83 | ||
| 84 | #define CONFIG_BOARD_EARLY_INIT_F | 84 | #define CONFIG_BOARD_EARLY_INIT_F |
| 85 | 85 | ||
| 86 | /* PWM */ | 86 | /* PWM */ |
| 87 | #define CONFIG_PWM | 87 | #define CONFIG_PWM |
| 88 | 88 | ||
| 89 | /* allow to overwrite serial and ethaddr */ | 89 | /* allow to overwrite serial and ethaddr */ |
| 90 | #define CONFIG_ENV_OVERWRITE | 90 | #define CONFIG_ENV_OVERWRITE |
| 91 | 91 | ||
| 92 | /* Command definition*/ | 92 | /* Command definition*/ |
| 93 | #include <config_cmd_default.h> | 93 | #include <config_cmd_default.h> |
| 94 | 94 | ||
| 95 | #define CONFIG_CMD_PING | 95 | #define CONFIG_CMD_PING |
| 96 | #define CONFIG_CMD_ELF | 96 | #define CONFIG_CMD_ELF |
| 97 | #define CONFIG_CMD_MMC | 97 | #define CONFIG_CMD_MMC |
| 98 | #define CONFIG_CMD_EXT2 | 98 | #define CONFIG_CMD_EXT2 |
| 99 | #define CONFIG_CMD_FAT | 99 | #define CONFIG_CMD_FAT |
| 100 | #define CONFIG_CMD_NET | 100 | #define CONFIG_CMD_NET |
| 101 | 101 | ||
| 102 | #define CONFIG_BOOTDELAY 3 | 102 | #define CONFIG_BOOTDELAY 3 |
| 103 | #define CONFIG_ZERO_BOOTDELAY_CHECK | 103 | #define CONFIG_ZERO_BOOTDELAY_CHECK |
| 104 | 104 | ||
| 105 | /* USB */ | ||
| 106 | #define CONFIG_CMD_USB | ||
| 107 | #define CONFIG_USB_EHCI | ||
| 108 | #define CONFIG_USB_EHCI_EXYNOS | ||
| 109 | #define CONFIG_USB_STORAGE | ||
| 110 | |||
| 105 | /* MMC SPL */ | 111 | /* MMC SPL */ |
| 106 | #define CONFIG_SPL | 112 | #define CONFIG_SPL |
| 107 | #define COPY_BL2_FNPTR_ADDR 0x02020030 | 113 | #define COPY_BL2_FNPTR_ADDR 0x02020030 |
| 108 | 114 | ||
| 109 | #define CONFIG_BOOTCOMMAND "mmc read 40007000 451 2000; bootm 40007000" | 115 | #define CONFIG_BOOTCOMMAND "mmc read 40007000 451 2000; bootm 40007000" |
| 110 | 116 | ||
| 111 | /* Miscellaneous configurable options */ | 117 | /* Miscellaneous configurable options */ |
| 112 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | 118 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 113 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ | 119 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ |
| 114 | #define CONFIG_SYS_PROMPT "SMDK5250 # " | 120 | #define CONFIG_SYS_PROMPT "SMDK5250 # " |
| 115 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ | 121 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| 116 | #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ | 122 | #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ |
| 117 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | 123 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 118 | #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" | 124 | #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" |
| 119 | /* Boot Argument Buffer Size */ | 125 | /* Boot Argument Buffer Size */ |
| 120 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | 126 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| 121 | /* memtest works on */ | 127 | /* memtest works on */ |
| 122 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | 128 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 123 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000) | 129 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000) |
| 124 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) | 130 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) |
| 125 | 131 | ||
| 126 | #define CONFIG_SYS_HZ 1000 | 132 | #define CONFIG_SYS_HZ 1000 |
| 127 | 133 | ||
| 128 | #define CONFIG_RD_LVL | 134 | #define CONFIG_RD_LVL |
| 129 | 135 | ||
| 130 | /* Stack sizes */ | 136 | /* Stack sizes */ |
| 131 | #define CONFIG_STACKSIZE (256 << 10) /* 256KB */ | 137 | #define CONFIG_STACKSIZE (256 << 10) /* 256KB */ |
| 132 | 138 | ||
| 133 | #define CONFIG_NR_DRAM_BANKS 8 | 139 | #define CONFIG_NR_DRAM_BANKS 8 |
| 134 | #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ | 140 | #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ |
| 135 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE | 141 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE |
| 136 | #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE | 142 | #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE |
| 137 | #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) | 143 | #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) |
| 138 | #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE | 144 | #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE |
| 139 | #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) | 145 | #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) |
| 140 | #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE | 146 | #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE |
| 141 | #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) | 147 | #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) |
| 142 | #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE | 148 | #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE |
| 143 | #define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE)) | 149 | #define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE)) |
| 144 | #define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE | 150 | #define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE |
| 145 | #define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE)) | 151 | #define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE)) |
| 146 | #define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE | 152 | #define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE |
| 147 | #define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE)) | 153 | #define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE)) |
| 148 | #define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE | 154 | #define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE |
| 149 | #define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) | 155 | #define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) |
| 150 | #define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE | 156 | #define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE |
| 151 | 157 | ||
| 152 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 | 158 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 |
| 153 | 159 | ||
| 154 | /* FLASH and environment organization */ | 160 | /* FLASH and environment organization */ |
| 155 | #define CONFIG_SYS_NO_FLASH | 161 | #define CONFIG_SYS_NO_FLASH |
| 156 | #undef CONFIG_CMD_IMLS | 162 | #undef CONFIG_CMD_IMLS |
| 157 | #define CONFIG_IDENT_STRING " for SMDK5250" | 163 | #define CONFIG_IDENT_STRING " for SMDK5250" |
| 158 | 164 | ||
| 159 | #define CONFIG_ENV_IS_IN_MMC | 165 | #define CONFIG_ENV_IS_IN_MMC |
| 160 | #define CONFIG_SYS_MMC_ENV_DEV 0 | 166 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
| 161 | 167 | ||
| 162 | #define CONFIG_SECURE_BL1_ONLY | 168 | #define CONFIG_SECURE_BL1_ONLY |
| 163 | 169 | ||
| 164 | /* Secure FW size configuration */ | 170 | /* Secure FW size configuration */ |
| 165 | #ifdef CONFIG_SECURE_BL1_ONLY | 171 | #ifdef CONFIG_SECURE_BL1_ONLY |
| 166 | #define CONFIG_SEC_FW_SIZE (8 << 10) /* 8KB */ | 172 | #define CONFIG_SEC_FW_SIZE (8 << 10) /* 8KB */ |
| 167 | #else | 173 | #else |
| 168 | #define CONFIG_SEC_FW_SIZE 0 | 174 | #define CONFIG_SEC_FW_SIZE 0 |
| 169 | #endif | 175 | #endif |
| 170 | 176 | ||
| 171 | /* Configuration of BL1, BL2, ENV Blocks on mmc */ | 177 | /* Configuration of BL1, BL2, ENV Blocks on mmc */ |
| 172 | #define CONFIG_RES_BLOCK_SIZE (512) | 178 | #define CONFIG_RES_BLOCK_SIZE (512) |
| 173 | #define CONFIG_BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ | 179 | #define CONFIG_BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ |
| 174 | #define CONFIG_BL2_SIZE (512UL << 10UL) /* 512 KB */ | 180 | #define CONFIG_BL2_SIZE (512UL << 10UL) /* 512 KB */ |
| 175 | #define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */ | 181 | #define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */ |
| 176 | 182 | ||
| 177 | #define CONFIG_BL1_OFFSET (CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE) | 183 | #define CONFIG_BL1_OFFSET (CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE) |
| 178 | #define CONFIG_BL2_OFFSET (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE) | 184 | #define CONFIG_BL2_OFFSET (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE) |
| 179 | #define CONFIG_ENV_OFFSET (CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE) | 185 | #define CONFIG_ENV_OFFSET (CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE) |
| 180 | 186 | ||
| 181 | /* U-boot copy size from boot Media to DRAM.*/ | 187 | /* U-boot copy size from boot Media to DRAM.*/ |
| 182 | #define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512) | 188 | #define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512) |
| 183 | #define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512) | 189 | #define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512) |
| 184 | #define CONFIG_DOS_PARTITION | 190 | #define CONFIG_DOS_PARTITION |
| 185 | 191 | ||
| 186 | #define CONFIG_IRAM_STACK 0x02050000 | 192 | #define CONFIG_IRAM_STACK 0x02050000 |
| 187 | 193 | ||
| 188 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) | 194 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) |
| 189 | 195 | ||
| 190 | /* Ethernet Controllor Driver */ | 196 | /* Ethernet Controllor Driver */ |
| 191 | #ifdef CONFIG_CMD_NET | 197 | #ifdef CONFIG_CMD_NET |
| 192 | #define CONFIG_SMC911X | 198 | #define CONFIG_SMC911X |
| 193 | #define CONFIG_SMC911X_BASE 0x5000000 | 199 | #define CONFIG_SMC911X_BASE 0x5000000 |
| 194 | #define CONFIG_SMC911X_16_BIT | 200 | #define CONFIG_SMC911X_16_BIT |
| 195 | #define CONFIG_ENV_SROM_BANK 1 | 201 | #define CONFIG_ENV_SROM_BANK 1 |
| 196 | #endif /*CONFIG_CMD_NET*/ | 202 | #endif /*CONFIG_CMD_NET*/ |
| 197 | 203 | ||
| 198 | /* Enable devicetree support */ | 204 | /* Enable devicetree support */ |
| 199 | #define CONFIG_OF_LIBFDT | 205 | #define CONFIG_OF_LIBFDT |
| 200 | 206 | ||
| 201 | #endif /* __CONFIG_H */ | 207 | #endif /* __CONFIG_H */ |
| 202 | 208 |