Eric Lee / smarc-uboot

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Commit b22b70ff0b5bbacea7383bde9e8893bb504199c3

Authored by Peng Fan
1 parent 77ee38dd28
Exists in smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga and in 4 other branches smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga

MLK-21291 imx8mm: evk: not restrict uart4 when enabling jailhouse 

When booting dual linux with jailhouse, inmate linux will use
the 2nd uart, so not restrict access the uart for jailhouse case.

The best solution would be using SIP call to ATF, for simplicity,
directly modify the RDC register.

Signed-off-by: Peng Fan <peng.fan@nxp.com>

Showing 1 changed file with 2 additions and 2 deletions Inline Diff

include/configs/imx8mm_evk.h
Diff comments   View file @ b22b70f
1 /* 1 /*
2 * Copyright 2018 NXP 2 * Copyright 2018 NXP
3 * 3 *
4 * SPDX-License-Identifier: GPL-2.0+ 4 * SPDX-License-Identifier: GPL-2.0+
5 */ 5 */
6 6
7 #ifndef __IMX8MM_EVK_H 7 #ifndef __IMX8MM_EVK_H
8 #define __IMX8MM_EVK_H 8 #define __IMX8MM_EVK_H
9 9
10 #include <linux/sizes.h> 10 #include <linux/sizes.h>
11 #include <asm/arch/imx-regs.h> 11 #include <asm/arch/imx-regs.h>
12 12
13 #include "imx_env.h" 13 #include "imx_env.h"
14 14
15 #ifdef CONFIG_SECURE_BOOT 15 #ifdef CONFIG_SECURE_BOOT
16 #define CONFIG_CSF_SIZE 0x2000 /* 8K region */ 16 #define CONFIG_CSF_SIZE 0x2000 /* 8K region */
17 #endif 17 #endif
18 18
19 #define CONFIG_SPL_MAX_SIZE (148 * 1024) 19 #define CONFIG_SPL_MAX_SIZE (148 * 1024)
20 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 20 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
21 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR 21 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
22 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 22 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
23 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 23 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
24 #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) 24 #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
25 25
26 #ifdef CONFIG_SPL_BUILD 26 #ifdef CONFIG_SPL_BUILD
27 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ 27 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
28 #define CONFIG_SPL_WATCHDOG_SUPPORT 28 #define CONFIG_SPL_WATCHDOG_SUPPORT
29 #define CONFIG_SPL_POWER_SUPPORT 29 #define CONFIG_SPL_POWER_SUPPORT
30 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT 30 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
31 #define CONFIG_SPL_I2C_SUPPORT 31 #define CONFIG_SPL_I2C_SUPPORT
32 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" 32 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
33 #define CONFIG_SPL_STACK 0x91fff0 33 #define CONFIG_SPL_STACK 0x91fff0
34 #define CONFIG_SPL_LIBCOMMON_SUPPORT 34 #define CONFIG_SPL_LIBCOMMON_SUPPORT
35 #define CONFIG_SPL_LIBGENERIC_SUPPORT 35 #define CONFIG_SPL_LIBGENERIC_SUPPORT
36 #define CONFIG_SPL_SERIAL_SUPPORT 36 #define CONFIG_SPL_SERIAL_SUPPORT
37 #define CONFIG_SPL_GPIO_SUPPORT 37 #define CONFIG_SPL_GPIO_SUPPORT
38 #define CONFIG_SPL_BSS_START_ADDR 0x00910000 38 #define CONFIG_SPL_BSS_START_ADDR 0x00910000
39 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ 39 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
40 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 40 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
41 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ 41 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
42 #define CONFIG_SYS_ICACHE_OFF 42 #define CONFIG_SYS_ICACHE_OFF
43 #define CONFIG_SYS_DCACHE_OFF 43 #define CONFIG_SYS_DCACHE_OFF
44 44
45 #define CONFIG_MALLOC_F_ADDR 0x912000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ 45 #define CONFIG_MALLOC_F_ADDR 0x912000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
46 46
47 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ 47 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
48 48
49 #undef CONFIG_DM_MMC 49 #undef CONFIG_DM_MMC
50 #undef CONFIG_DM_PMIC 50 #undef CONFIG_DM_PMIC
51 #undef CONFIG_DM_PMIC_PFUZE100 51 #undef CONFIG_DM_PMIC_PFUZE100
52 52
53 #define CONFIG_POWER 53 #define CONFIG_POWER
54 #define CONFIG_POWER_I2C 54 #define CONFIG_POWER_I2C
55 #define CONFIG_POWER_BD71837 55 #define CONFIG_POWER_BD71837
56 56
57 #define CONFIG_SYS_I2C 57 #define CONFIG_SYS_I2C
58 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 58 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
59 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 59 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
60 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 60 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
61 61
62 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 62 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
63 63
64 #if defined(CONFIG_NAND_BOOT) 64 #if defined(CONFIG_NAND_BOOT)
65 #define CONFIG_SPL_NAND_SUPPORT 65 #define CONFIG_SPL_NAND_SUPPORT
66 #define CONFIG_SPL_DMA_SUPPORT 66 #define CONFIG_SPL_DMA_SUPPORT
67 #define CONFIG_SPL_NAND_MXS 67 #define CONFIG_SPL_NAND_MXS
68 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4000000 /* Put the FIT out of first 64MB boot area */ 68 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4000000 /* Put the FIT out of first 64MB boot area */
69 69
70 /* Set a redundant offset in nand FIT mtdpart. The new uuu will burn full boot image (not only FIT part) to the mtdpart, so we check both two offsets */ 70 /* Set a redundant offset in nand FIT mtdpart. The new uuu will burn full boot image (not only FIT part) to the mtdpart, so we check both two offsets */
71 #define CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND \ 71 #define CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND \
72 (CONFIG_SYS_NAND_U_BOOT_OFFS + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8400) 72 (CONFIG_SYS_NAND_U_BOOT_OFFS + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8400)
73 #endif 73 #endif
74 74
75 #endif 75 #endif
76 76
77 #define CONFIG_CMD_READ 77 #define CONFIG_CMD_READ
78 #define CONFIG_SERIAL_TAG 78 #define CONFIG_SERIAL_TAG
79 #define CONFIG_FASTBOOT_USB_DEV 0 79 #define CONFIG_FASTBOOT_USB_DEV 0
80 80
81 #define CONFIG_REMAKE_ELF 81 #define CONFIG_REMAKE_ELF
82 82
83 #define CONFIG_BOARD_EARLY_INIT_F 83 #define CONFIG_BOARD_EARLY_INIT_F
84 #define CONFIG_BOARD_POSTCLK_INIT 84 #define CONFIG_BOARD_POSTCLK_INIT
85 #define CONFIG_BOARD_LATE_INIT 85 #define CONFIG_BOARD_LATE_INIT
86 86
87 /* Flat Device Tree Definitions */ 87 /* Flat Device Tree Definitions */
88 #define CONFIG_OF_BOARD_SETUP 88 #define CONFIG_OF_BOARD_SETUP
89 89
90 #undef CONFIG_CMD_EXPORTENV 90 #undef CONFIG_CMD_EXPORTENV
91 #undef CONFIG_CMD_IMPORTENV 91 #undef CONFIG_CMD_IMPORTENV
92 #undef CONFIG_CMD_IMLS 92 #undef CONFIG_CMD_IMLS
93 93
94 #undef CONFIG_CMD_CRC32 94 #undef CONFIG_CMD_CRC32
95 #undef CONFIG_BOOTM_NETBSD 95 #undef CONFIG_BOOTM_NETBSD
96 96
97 /* ENET Config */ 97 /* ENET Config */
98 /* ENET1 */ 98 /* ENET1 */
99 #if defined(CONFIG_CMD_NET) 99 #if defined(CONFIG_CMD_NET)
100 #define CONFIG_CMD_PING 100 #define CONFIG_CMD_PING
101 #define CONFIG_CMD_DHCP 101 #define CONFIG_CMD_DHCP
102 #define CONFIG_CMD_MII 102 #define CONFIG_CMD_MII
103 #define CONFIG_MII 103 #define CONFIG_MII
104 #define CONFIG_ETHPRIME "FEC" 104 #define CONFIG_ETHPRIME "FEC"
105 105
106 #define CONFIG_FEC_MXC 106 #define CONFIG_FEC_MXC
107 #define CONFIG_FEC_XCV_TYPE RGMII 107 #define CONFIG_FEC_XCV_TYPE RGMII
108 #define CONFIG_FEC_MXC_PHYADDR 0 108 #define CONFIG_FEC_MXC_PHYADDR 0
109 #define FEC_QUIRK_ENET_MAC 109 #define FEC_QUIRK_ENET_MAC
110 110
111 #define CONFIG_PHY_GIGE 111 #define CONFIG_PHY_GIGE
112 #define IMX_FEC_BASE 0x30BE0000 112 #define IMX_FEC_BASE 0x30BE0000
113 113
114 #define CONFIG_PHYLIB 114 #define CONFIG_PHYLIB
115 #define CONFIG_PHY_ATHEROS 115 #define CONFIG_PHY_ATHEROS
116 #endif 116 #endif
117 117
118 /* 118 /*
119 * Another approach is add the clocks for inmates into clks_init_on 119 * Another approach is add the clocks for inmates into clks_init_on
120 * in clk-imx8mm.c, then clk_ingore_unused could be removed. 120 * in clk-imx8mm.c, then clk_ingore_unused could be removed.
121 */ 121 */
122 #define JAILHOUSE_ENV \ 122 #define JAILHOUSE_ENV \
123 "jh_clk= \0 " \ 123 "jh_clk= \0 " \
124 "jh_mmcboot=setenv fdt_file fsl-imx8mm-evk-root.dtb;" \ 124 "jh_mmcboot=mw 0x303d0518 0xff; setenv fdt_file fsl-imx8mm-evk-root.dtb;" \
125 "setenv jh_clk clk_ignore_unused; " \ 125 "setenv jh_clk clk_ignore_unused; " \
126 "if run loadimage; then " \ 126 "if run loadimage; then " \
127 "run mmcboot; " \ 127 "run mmcboot; " \
128 "else run jh_netboot; fi; \0" \ 128 "else run jh_netboot; fi; \0" \
129 "jh_netboot=setenv fdt_file fsl-imx8mm-evk-root.dtb; setenv jh_clk clk_ignore_unused; run netboot; \0 " 129 "jh_netboot=mw 0x303d0518 0xff; setenv fdt_file fsl-imx8mm-evk-root.dtb; setenv jh_clk clk_ignore_unused; run netboot; \0 "
130 130
131 #ifdef CONFIG_NAND_BOOT 131 #ifdef CONFIG_NAND_BOOT
132 #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(nandboot),16m(nandfit),32m(nandkernel),16m(nanddtb),8m(nandtee),-(nandrootfs) " 132 #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(nandboot),16m(nandfit),32m(nandkernel),16m(nanddtb),8m(nandtee),-(nandrootfs) "
133 #endif 133 #endif
134 134
135 #define CONFIG_MFG_ENV_SETTINGS \ 135 #define CONFIG_MFG_ENV_SETTINGS \
136 CONFIG_MFG_ENV_SETTINGS_DEFAULT \ 136 CONFIG_MFG_ENV_SETTINGS_DEFAULT \
137 "initrd_addr=0x43800000\0" \ 137 "initrd_addr=0x43800000\0" \
138 "initrd_high=0xffffffffffffffff\0" \ 138 "initrd_high=0xffffffffffffffff\0" \
139 "emmc_dev=1\0"\ 139 "emmc_dev=1\0"\
140 "sd_dev=0\0" \ 140 "sd_dev=0\0" \
141 141
142 /* Initial environment variables */ 142 /* Initial environment variables */
143 #if defined(CONFIG_NAND_BOOT) 143 #if defined(CONFIG_NAND_BOOT)
144 #define CONFIG_EXTRA_ENV_SETTINGS \ 144 #define CONFIG_EXTRA_ENV_SETTINGS \
145 CONFIG_MFG_ENV_SETTINGS \ 145 CONFIG_MFG_ENV_SETTINGS \
146 "fdt_addr=0x43000000\0" \ 146 "fdt_addr=0x43000000\0" \
147 "fdt_high=0xffffffffffffffff\0" \ 147 "fdt_high=0xffffffffffffffff\0" \
148 "mtdparts=" MFG_NAND_PARTITION "\0" \ 148 "mtdparts=" MFG_NAND_PARTITION "\0" \
149 "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \ 149 "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
150 "bootargs=console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200 ubi.mtd=5 " \ 150 "bootargs=console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200 ubi.mtd=5 " \
151 "root=ubi0:nandrootfs rootfstype=ubifs " \ 151 "root=ubi0:nandrootfs rootfstype=ubifs " \
152 MFG_NAND_PARTITION \ 152 MFG_NAND_PARTITION \
153 "\0" \ 153 "\0" \
154 "bootcmd=nand read ${loadaddr} 0x5000000 0x2000000;"\ 154 "bootcmd=nand read ${loadaddr} 0x5000000 0x2000000;"\
155 "nand read ${fdt_addr} 0x7000000 0x100000;"\ 155 "nand read ${fdt_addr} 0x7000000 0x100000;"\
156 "booti ${loadaddr} - ${fdt_addr}" 156 "booti ${loadaddr} - ${fdt_addr}"
157 157
158 #else 158 #else
159 #define CONFIG_EXTRA_ENV_SETTINGS \ 159 #define CONFIG_EXTRA_ENV_SETTINGS \
160 CONFIG_MFG_ENV_SETTINGS \ 160 CONFIG_MFG_ENV_SETTINGS \
161 JAILHOUSE_ENV \ 161 JAILHOUSE_ENV \
162 "script=boot.scr\0" \ 162 "script=boot.scr\0" \
163 "image=Image\0" \ 163 "image=Image\0" \
164 "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \ 164 "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
165 "fdt_addr=0x43000000\0" \ 165 "fdt_addr=0x43000000\0" \
166 "fdt_high=0xffffffffffffffff\0" \ 166 "fdt_high=0xffffffffffffffff\0" \
167 "boot_fdt=try\0" \ 167 "boot_fdt=try\0" \
168 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ 168 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
169 "initrd_addr=0x43800000\0" \ 169 "initrd_addr=0x43800000\0" \
170 "initrd_high=0xffffffffffffffff\0" \ 170 "initrd_high=0xffffffffffffffff\0" \
171 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 171 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
172 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 172 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
173 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 173 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
174 "mmcautodetect=yes\0" \ 174 "mmcautodetect=yes\0" \
175 "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \ 175 "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
176 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 176 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
177 "bootscript=echo Running bootscript from mmc ...; " \ 177 "bootscript=echo Running bootscript from mmc ...; " \
178 "source\0" \ 178 "source\0" \
179 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 179 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
180 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 180 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
181 "mmcboot=echo Booting from mmc ...; " \ 181 "mmcboot=echo Booting from mmc ...; " \
182 "run mmcargs; " \ 182 "run mmcargs; " \
183 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 183 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
184 "if run loadfdt; then " \ 184 "if run loadfdt; then " \
185 "booti ${loadaddr} - ${fdt_addr}; " \ 185 "booti ${loadaddr} - ${fdt_addr}; " \
186 "else " \ 186 "else " \
187 "echo WARN: Cannot load the DT; " \ 187 "echo WARN: Cannot load the DT; " \
188 "fi; " \ 188 "fi; " \
189 "else " \ 189 "else " \
190 "echo wait for boot; " \ 190 "echo wait for boot; " \
191 "fi;\0" \ 191 "fi;\0" \
192 "netargs=setenv bootargs ${jh_clk} console=${console} " \ 192 "netargs=setenv bootargs ${jh_clk} console=${console} " \
193 "root=/dev/nfs " \ 193 "root=/dev/nfs " \
194 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 194 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
195 "netboot=echo Booting from net ...; " \ 195 "netboot=echo Booting from net ...; " \
196 "run netargs; " \ 196 "run netargs; " \
197 "if test ${ip_dyn} = yes; then " \ 197 "if test ${ip_dyn} = yes; then " \
198 "setenv get_cmd dhcp; " \ 198 "setenv get_cmd dhcp; " \
199 "else " \ 199 "else " \
200 "setenv get_cmd tftp; " \ 200 "setenv get_cmd tftp; " \
201 "fi; " \ 201 "fi; " \
202 "${get_cmd} ${loadaddr} ${image}; " \ 202 "${get_cmd} ${loadaddr} ${image}; " \
203 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 203 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
204 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 204 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
205 "booti ${loadaddr} - ${fdt_addr}; " \ 205 "booti ${loadaddr} - ${fdt_addr}; " \
206 "else " \ 206 "else " \
207 "echo WARN: Cannot load the DT; " \ 207 "echo WARN: Cannot load the DT; " \
208 "fi; " \ 208 "fi; " \
209 "else " \ 209 "else " \
210 "booti; " \ 210 "booti; " \
211 "fi;\0" 211 "fi;\0"
212 212
213 #define CONFIG_BOOTCOMMAND \ 213 #define CONFIG_BOOTCOMMAND \
214 "mmc dev ${mmcdev}; if mmc rescan; then " \ 214 "mmc dev ${mmcdev}; if mmc rescan; then " \
215 "if run loadbootscript; then " \ 215 "if run loadbootscript; then " \
216 "run bootscript; " \ 216 "run bootscript; " \
217 "else " \ 217 "else " \
218 "if run loadimage; then " \ 218 "if run loadimage; then " \
219 "run mmcboot; " \ 219 "run mmcboot; " \
220 "else run netboot; " \ 220 "else run netboot; " \
221 "fi; " \ 221 "fi; " \
222 "fi; " \ 222 "fi; " \
223 "else booti ${loadaddr} - ${fdt_addr}; fi" 223 "else booti ${loadaddr} - ${fdt_addr}; fi"
224 #endif 224 #endif
225 225
226 /* Link Definitions */ 226 /* Link Definitions */
227 #define CONFIG_LOADADDR 0x40480000 227 #define CONFIG_LOADADDR 0x40480000
228 228
229 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 229 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
230 230
231 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 231 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
232 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 232 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
233 #define CONFIG_SYS_INIT_SP_OFFSET \ 233 #define CONFIG_SYS_INIT_SP_OFFSET \
234 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 234 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
235 #define CONFIG_SYS_INIT_SP_ADDR \ 235 #define CONFIG_SYS_INIT_SP_ADDR \
236 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 236 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
237 237
238 #define CONFIG_ENV_OVERWRITE 238 #define CONFIG_ENV_OVERWRITE
239 #if defined(CONFIG_ENV_IS_IN_MMC) 239 #if defined(CONFIG_ENV_IS_IN_MMC)
240 #define CONFIG_ENV_OFFSET (64 * SZ_64K) 240 #define CONFIG_ENV_OFFSET (64 * SZ_64K)
241 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) 241 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
242 #define CONFIG_ENV_OFFSET (4 * 1024 * 1024) 242 #define CONFIG_ENV_OFFSET (4 * 1024 * 1024)
243 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 243 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
244 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 244 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
245 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 245 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
246 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 246 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
247 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 247 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
248 #elif defined(CONFIG_ENV_IS_IN_NAND) 248 #elif defined(CONFIG_ENV_IS_IN_NAND)
249 #define CONFIG_ENV_OFFSET (60 << 20) 249 #define CONFIG_ENV_OFFSET (60 << 20)
250 #endif 250 #endif
251 #define CONFIG_ENV_SIZE 0x1000 251 #define CONFIG_ENV_SIZE 0x1000
252 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */ 252 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */
253 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ 253 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
254 254
255 /* Size of malloc() pool */ 255 /* Size of malloc() pool */
256 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024) 256 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024)
257 257
258 #define CONFIG_SYS_SDRAM_BASE 0x40000000 258 #define CONFIG_SYS_SDRAM_BASE 0x40000000
259 #define PHYS_SDRAM 0x40000000 259 #define PHYS_SDRAM 0x40000000
260 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ 260 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
261 #define CONFIG_NR_DRAM_BANKS 1 261 #define CONFIG_NR_DRAM_BANKS 1
262 262
263 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 263 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
264 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) 264 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
265 265
266 #define CONFIG_BAUDRATE 115200 266 #define CONFIG_BAUDRATE 115200
267 267
268 #define CONFIG_MXC_UART 268 #define CONFIG_MXC_UART
269 #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR 269 #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
270 270
271 /* Monitor Command Prompt */ 271 /* Monitor Command Prompt */
272 #undef CONFIG_SYS_PROMPT 272 #undef CONFIG_SYS_PROMPT
273 #define CONFIG_SYS_PROMPT "u-boot=> " 273 #define CONFIG_SYS_PROMPT "u-boot=> "
274 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 274 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
275 #define CONFIG_SYS_CBSIZE 2048 275 #define CONFIG_SYS_CBSIZE 2048
276 #define CONFIG_SYS_MAXARGS 64 276 #define CONFIG_SYS_MAXARGS 64
277 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 277 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
278 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 278 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
279 sizeof(CONFIG_SYS_PROMPT) + 16) 279 sizeof(CONFIG_SYS_PROMPT) + 16)
280 280
281 #define CONFIG_IMX_BOOTAUX 281 #define CONFIG_IMX_BOOTAUX
282 282
283 /* USDHC */ 283 /* USDHC */
284 #define CONFIG_CMD_MMC 284 #define CONFIG_CMD_MMC
285 #define CONFIG_FSL_ESDHC 285 #define CONFIG_FSL_ESDHC
286 #define CONFIG_FSL_USDHC 286 #define CONFIG_FSL_USDHC
287 287
288 #ifdef CONFIG_TARGET_IMX8MM_DDR4_EVK 288 #ifdef CONFIG_TARGET_IMX8MM_DDR4_EVK
289 #define CONFIG_SYS_FSL_USDHC_NUM 1 289 #define CONFIG_SYS_FSL_USDHC_NUM 1
290 #else 290 #else
291 #define CONFIG_SYS_FSL_USDHC_NUM 2 291 #define CONFIG_SYS_FSL_USDHC_NUM 2
292 #endif 292 #endif
293 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 293 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
294 294
295 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 295 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
296 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 296 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
297 297
298 #ifdef CONFIG_FSL_FSPI 298 #ifdef CONFIG_FSL_FSPI
299 #define CONFIG_SF_DEFAULT_BUS 0 299 #define CONFIG_SF_DEFAULT_BUS 0
300 #define CONFIG_SF_DEFAULT_CS 0 300 #define CONFIG_SF_DEFAULT_CS 0
301 #define CONFIG_SF_DEFAULT_SPEED 40000000 301 #define CONFIG_SF_DEFAULT_SPEED 40000000
302 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 302 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
303 #define FSL_FSPI_FLASH_SIZE SZ_32M 303 #define FSL_FSPI_FLASH_SIZE SZ_32M
304 #define FSL_FSPI_FLASH_NUM 1 304 #define FSL_FSPI_FLASH_NUM 1
305 #define FSPI0_BASE_ADDR 0x30bb0000 305 #define FSPI0_BASE_ADDR 0x30bb0000
306 #define FSPI0_AMBA_BASE 0x0 306 #define FSPI0_AMBA_BASE 0x0
307 #define CONFIG_SPI_FLASH_BAR 307 #define CONFIG_SPI_FLASH_BAR
308 #define CONFIG_FSPI_QUAD_SUPPORT 308 #define CONFIG_FSPI_QUAD_SUPPORT
309 309
310 #define CONFIG_SYS_FSL_FSPI_AHB 310 #define CONFIG_SYS_FSL_FSPI_AHB
311 #endif 311 #endif
312 312
313 /* Enable SPI */ 313 /* Enable SPI */
314 #ifndef CONFIG_NAND_MXS 314 #ifndef CONFIG_NAND_MXS
315 #ifndef CONFIG_FSL_FSPI 315 #ifndef CONFIG_FSL_FSPI
316 #ifdef CONFIG_CMD_SF 316 #ifdef CONFIG_CMD_SF
317 #define CONFIG_SPI_FLASH 317 #define CONFIG_SPI_FLASH
318 #define CONFIG_SPI_FLASH_STMICRO 318 #define CONFIG_SPI_FLASH_STMICRO
319 #define CONFIG_MXC_SPI 319 #define CONFIG_MXC_SPI
320 #define CONFIG_SF_DEFAULT_BUS 0 320 #define CONFIG_SF_DEFAULT_BUS 0
321 #define CONFIG_SF_DEFAULT_SPEED 20000000 321 #define CONFIG_SF_DEFAULT_SPEED 20000000
322 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 322 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
323 #endif 323 #endif
324 #endif 324 #endif
325 #endif 325 #endif
326 326
327 #ifdef CONFIG_CMD_NAND 327 #ifdef CONFIG_CMD_NAND
328 #define CONFIG_NAND_MXS 328 #define CONFIG_NAND_MXS
329 #define CONFIG_CMD_NAND_TRIMFFS 329 #define CONFIG_CMD_NAND_TRIMFFS
330 330
331 /* NAND stuff */ 331 /* NAND stuff */
332 #define CONFIG_SYS_MAX_NAND_DEVICE 1 332 #define CONFIG_SYS_MAX_NAND_DEVICE 1
333 #define CONFIG_SYS_NAND_BASE 0x20000000 333 #define CONFIG_SYS_NAND_BASE 0x20000000
334 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 334 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
335 #define CONFIG_SYS_NAND_ONFI_DETECTION 335 #define CONFIG_SYS_NAND_ONFI_DETECTION
336 336
337 /* DMA stuff, needed for GPMI/MXS NAND support */ 337 /* DMA stuff, needed for GPMI/MXS NAND support */
338 #define CONFIG_APBH_DMA 338 #define CONFIG_APBH_DMA
339 #define CONFIG_APBH_DMA_BURST 339 #define CONFIG_APBH_DMA_BURST
340 #define CONFIG_APBH_DMA_BURST8 340 #define CONFIG_APBH_DMA_BURST8
341 341
342 #ifdef CONFIG_CMD_UBI 342 #ifdef CONFIG_CMD_UBI
343 #define CONFIG_MTD_PARTITIONS 343 #define CONFIG_MTD_PARTITIONS
344 #define CONFIG_MTD_DEVICE 344 #define CONFIG_MTD_DEVICE
345 #endif 345 #endif
346 #endif /* CONFIG_CMD_NAND */ 346 #endif /* CONFIG_CMD_NAND */
347 347
348 348
349 #define CONFIG_MXC_GPIO 349 #define CONFIG_MXC_GPIO
350 350
351 #define CONFIG_MXC_OCOTP 351 #define CONFIG_MXC_OCOTP
352 #define CONFIG_CMD_FUSE 352 #define CONFIG_CMD_FUSE
353 353
354 #ifndef CONFIG_DM_I2C 354 #ifndef CONFIG_DM_I2C
355 #define CONFIG_SYS_I2C 355 #define CONFIG_SYS_I2C
356 #endif 356 #endif
357 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 357 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
358 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 358 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
359 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 359 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
360 #define CONFIG_SYS_I2C_SPEED 100000 360 #define CONFIG_SYS_I2C_SPEED 100000
361 361
362 /* USB configs */ 362 /* USB configs */
363 #ifndef CONFIG_SPL_BUILD 363 #ifndef CONFIG_SPL_BUILD
364 #define CONFIG_CMD_USB 364 #define CONFIG_CMD_USB
365 #define CONFIG_USB_STORAGE 365 #define CONFIG_USB_STORAGE
366 #define CONFIG_USBD_HS 366 #define CONFIG_USBD_HS
367 367
368 #define CONFIG_CMD_USB_MASS_STORAGE 368 #define CONFIG_CMD_USB_MASS_STORAGE
369 #define CONFIG_USB_GADGET_MASS_STORAGE 369 #define CONFIG_USB_GADGET_MASS_STORAGE
370 #define CONFIG_USB_FUNCTION_MASS_STORAGE 370 #define CONFIG_USB_FUNCTION_MASS_STORAGE
371 371
372 #endif 372 #endif
373 373
374 #define CONFIG_USB_GADGET_DUALSPEED 374 #define CONFIG_USB_GADGET_DUALSPEED
375 #define CONFIG_USB_GADGET_VBUS_DRAW 2 375 #define CONFIG_USB_GADGET_VBUS_DRAW 2
376 376
377 #define CONFIG_CI_UDC 377 #define CONFIG_CI_UDC
378 378
379 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 379 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
380 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 380 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
381 381
382 #ifdef CONFIG_VIDEO 382 #ifdef CONFIG_VIDEO
383 #define CONFIG_VIDEO_MXS 383 #define CONFIG_VIDEO_MXS
384 #define CONFIG_VIDEO_LOGO 384 #define CONFIG_VIDEO_LOGO
385 #define CONFIG_SPLASH_SCREEN 385 #define CONFIG_SPLASH_SCREEN
386 #define CONFIG_SPLASH_SCREEN_ALIGN 386 #define CONFIG_SPLASH_SCREEN_ALIGN
387 #define CONFIG_CMD_BMP 387 #define CONFIG_CMD_BMP
388 #define CONFIG_BMP_16BPP 388 #define CONFIG_BMP_16BPP
389 #define CONFIG_VIDEO_BMP_RLE8 389 #define CONFIG_VIDEO_BMP_RLE8
390 #define CONFIG_VIDEO_BMP_LOGO 390 #define CONFIG_VIDEO_BMP_LOGO
391 #define CONFIG_IMX_VIDEO_SKIP 391 #define CONFIG_IMX_VIDEO_SKIP
392 #define CONFIG_RM67191 392 #define CONFIG_RM67191
393 #endif 393 #endif
394 394
395 #define CONFIG_OF_SYSTEM_SETUP 395 #define CONFIG_OF_SYSTEM_SETUP
396 396
397 #if defined(CONFIG_ANDROID_SUPPORT) 397 #if defined(CONFIG_ANDROID_SUPPORT)
398 #include "imx8mm_evk_android.h" 398 #include "imx8mm_evk_android.h"
399 #endif 399 #endif
400 #endif 400 #endif
401 401