Eric Lee / smarc-uboot

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Commit b9116f903678cf411c7c58099efcb3565cd667d0

Authored by Ye Li
1 parent 26aab18d03
Exists in smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga and in 5 other branches smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga

MLK-18901-3 imx8mm: Enable mtest command for validation and EVK boards 

Enable the mtest command and add relevant configurations for tested memory
range to all validation boards and EVK board.

Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit d92447e705ff6f077c602d340c01535ccee0ea66)

Showing 6 changed files with 10 additions and 0 deletions Inline Diff

configs/imx8mm_ddr4_val_defconfig
Diff comments   View file @ b9116f9
1 CONFIG_ARM=y 1 CONFIG_ARM=y
2 CONFIG_ARCH_IMX8M=y 2 CONFIG_ARCH_IMX8M=y
3 CONFIG_SYS_TEXT_BASE=0x40200000 3 CONFIG_SYS_TEXT_BASE=0x40200000
4 CONFIG_SYS_MALLOC_F_LEN=0x2000 4 CONFIG_SYS_MALLOC_F_LEN=0x2000
5 CONFIG_USB_TCPC=y 5 CONFIG_USB_TCPC=y
6 CONFIG_TARGET_IMX8MM_DDR4_VAL=y 6 CONFIG_TARGET_IMX8MM_DDR4_VAL=y
7 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL_TEXT_BASE=0x7E1000" 7 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL_TEXT_BASE=0x7E1000"
8 CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8mm-ddr4-val" 8 CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8mm-ddr4-val"
9 CONFIG_DEFAULT_FDT_FILE="fsl-imx8mm-ddr4-val.dtb" 9 CONFIG_DEFAULT_FDT_FILE="fsl-imx8mm-ddr4-val.dtb"
10 CONFIG_FIT=y 10 CONFIG_FIT=y
11 CONFIG_SPL_LOAD_FIT=y 11 CONFIG_SPL_LOAD_FIT=y
12 CONFIG_ARCH_MISC_INIT=y 12 CONFIG_ARCH_MISC_INIT=y
13 CONFIG_SPL=y 13 CONFIG_SPL=y
14 CONFIG_SPL_BOARD_INIT=y 14 CONFIG_SPL_BOARD_INIT=y
15 CONFIG_SPL_MMC_SUPPORT=y 15 CONFIG_SPL_MMC_SUPPORT=y
16 CONFIG_HUSH_PARSER=y 16 CONFIG_HUSH_PARSER=y
17 CONFIG_OF_LIBFDT=y 17 CONFIG_OF_LIBFDT=y
18 CONFIG_FS_FAT=y 18 CONFIG_FS_FAT=y
19 CONFIG_CMD_EXT2=y 19 CONFIG_CMD_EXT2=y
20 CONFIG_CMD_EXT4=y 20 CONFIG_CMD_EXT4=y
21 CONFIG_CMD_EXT4_WRITE=y 21 CONFIG_CMD_EXT4_WRITE=y
22 CONFIG_CMD_FAT=y 22 CONFIG_CMD_FAT=y
23 CONFIG_ENV_IS_IN_MMC=y 23 CONFIG_ENV_IS_IN_MMC=y
24 CONFIG_CMD_SF=y 24 CONFIG_CMD_SF=y
25 CONFIG_CMD_I2C=y 25 CONFIG_CMD_I2C=y
26 CONFIG_CMD_GPIO=y 26 CONFIG_CMD_GPIO=y
27 CONFIG_CMD_CACHE=y 27 CONFIG_CMD_CACHE=y
28 CONFIG_CMD_REGULATOR=y 28 CONFIG_CMD_REGULATOR=y
29 CONFIG_CMD_MEMTEST=y
29 CONFIG_OF_CONTROL=y 30 CONFIG_OF_CONTROL=y
30 CONFIG_DM_GPIO=y 31 CONFIG_DM_GPIO=y
31 CONFIG_DM_I2C=y 32 CONFIG_DM_I2C=y
32 CONFIG_SYS_I2C_MXC=y 33 CONFIG_SYS_I2C_MXC=y
33 CONFIG_DM_MMC=y 34 CONFIG_DM_MMC=y
34 # CONFIG_DM_PMIC=y 35 # CONFIG_DM_PMIC=y
35 CONFIG_DM_SPI_FLASH=y 36 CONFIG_DM_SPI_FLASH=y
36 CONFIG_SPI_FLASH=y 37 CONFIG_SPI_FLASH=y
37 CONFIG_SPI_FLASH_STMICRO=y 38 CONFIG_SPI_FLASH_STMICRO=y
38 CONFIG_DM_ETH=y 39 CONFIG_DM_ETH=y
39 CONFIG_PINCTRL=y 40 CONFIG_PINCTRL=y
40 CONFIG_PINCTRL_IMX8M=y 41 CONFIG_PINCTRL_IMX8M=y
41 CONFIG_DM_REGULATOR=y 42 CONFIG_DM_REGULATOR=y
42 CONFIG_DM_REGULATOR_FIXED=y 43 CONFIG_DM_REGULATOR_FIXED=y
43 CONFIG_DM_REGULATOR_GPIO=y 44 CONFIG_DM_REGULATOR_GPIO=y
44 CONFIG_DM_SPI=y 45 CONFIG_DM_SPI=y
45 CONFIG_FSL_FSPI=y 46 CONFIG_FSL_FSPI=y
46 CONFIG_NXP_TMU=y 47 CONFIG_NXP_TMU=y
47 CONFIG_DM_THERMAL=y 48 CONFIG_DM_THERMAL=y
48 CONFIG_USB=y 49 CONFIG_USB=y
49 CONFIG_DM_USB=y 50 CONFIG_DM_USB=y
50 CONFIG_USB_EHCI_HCD=y 51 CONFIG_USB_EHCI_HCD=y
51 52
52 CONFIG_USB_GADGET=y 53 CONFIG_USB_GADGET=y
53 CONFIG_SPL_USB_HOST_SUPPORT=y 54 CONFIG_SPL_USB_HOST_SUPPORT=y
54 CONFIG_SPL_USB_GADGET_SUPPORT=y 55 CONFIG_SPL_USB_GADGET_SUPPORT=y
55 CONFIG_SPL_USB_SDP_SUPPORT=y 56 CONFIG_SPL_USB_SDP_SUPPORT=y
56 CONFIG_SDP_LOADADDR=0x40400000 57 CONFIG_SDP_LOADADDR=0x40400000
57 CONFIG_USB_GADGET_MANUFACTURER="FSL" 58 CONFIG_USB_GADGET_MANUFACTURER="FSL"
58 CONFIG_USB_GADGET_VENDOR_NUM=0x0525 59 CONFIG_USB_GADGET_VENDOR_NUM=0x0525
59 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 60 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
60 61
configs/imx8mm_evk_android_defconfig
Diff comments   View file @ b9116f9
1 CONFIG_ARM=y 1 CONFIG_ARM=y
2 CONFIG_ARCH_IMX8M=y 2 CONFIG_ARCH_IMX8M=y
3 CONFIG_SYS_TEXT_BASE=0x40200000 3 CONFIG_SYS_TEXT_BASE=0x40200000
4 CONFIG_SYS_MALLOC_F_LEN=0x2000 4 CONFIG_SYS_MALLOC_F_LEN=0x2000
5 CONFIG_USB_TCPC=y 5 CONFIG_USB_TCPC=y
6 CONFIG_TARGET_IMX8MM_EVK=y 6 CONFIG_TARGET_IMX8MM_EVK=y
7 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL_TEXT_BASE=0x7E1000,ANDROID_SUPPORT" 7 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL_TEXT_BASE=0x7E1000,ANDROID_SUPPORT"
8 CONFIG_FIT=y 8 CONFIG_FIT=y
9 CONFIG_SPL_LOAD_FIT=y 9 CONFIG_SPL_LOAD_FIT=y
10 CONFIG_EFI_PARTITION=y 10 CONFIG_EFI_PARTITION=y
11 CONFIG_ARCH_MISC_INIT=y 11 CONFIG_ARCH_MISC_INIT=y
12 CONFIG_SPL=y 12 CONFIG_SPL=y
13 CONFIG_SPL_BOARD_INIT=y 13 CONFIG_SPL_BOARD_INIT=y
14 CONFIG_SPL_MMC_SUPPORT=y 14 CONFIG_SPL_MMC_SUPPORT=y
15 CONFIG_HUSH_PARSER=y 15 CONFIG_HUSH_PARSER=y
16 CONFIG_OF_LIBFDT=y 16 CONFIG_OF_LIBFDT=y
17 CONFIG_FS_FAT=y 17 CONFIG_FS_FAT=y
18 CONFIG_CMD_EXT2=y 18 CONFIG_CMD_EXT2=y
19 CONFIG_CMD_EXT4=y 19 CONFIG_CMD_EXT4=y
20 CONFIG_CMD_EXT4_WRITE=y 20 CONFIG_CMD_EXT4_WRITE=y
21 CONFIG_CMD_FAT=y 21 CONFIG_CMD_FAT=y
22 CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8mm-evk" 22 CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8mm-evk"
23 CONFIG_ENV_IS_IN_MMC=y 23 CONFIG_ENV_IS_IN_MMC=y
24 CONFIG_CMD_SF=y 24 CONFIG_CMD_SF=y
25 CONFIG_CMD_I2C=y 25 CONFIG_CMD_I2C=y
26 CONFIG_CMD_GPIO=y 26 CONFIG_CMD_GPIO=y
27 CONFIG_CMD_CACHE=y 27 CONFIG_CMD_CACHE=y
28 CONFIG_CMD_REGULATOR=y 28 CONFIG_CMD_REGULATOR=y
29 CONFIG_CMD_MEMTEST=y
29 CONFIG_OF_CONTROL=y 30 CONFIG_OF_CONTROL=y
30 CONFIG_DM_GPIO=y 31 CONFIG_DM_GPIO=y
31 CONFIG_DM_I2C=y 32 CONFIG_DM_I2C=y
32 CONFIG_SYS_I2C_MXC=y 33 CONFIG_SYS_I2C_MXC=y
33 CONFIG_DM_MMC=y 34 CONFIG_DM_MMC=y
34 # CONFIG_DM_PMIC=y 35 # CONFIG_DM_PMIC=y
35 CONFIG_DM_SPI_FLASH=y 36 CONFIG_DM_SPI_FLASH=y
36 CONFIG_SPI_FLASH=y 37 CONFIG_SPI_FLASH=y
37 CONFIG_SPI_FLASH_STMICRO=y 38 CONFIG_SPI_FLASH_STMICRO=y
38 CONFIG_DM_ETH=y 39 CONFIG_DM_ETH=y
39 CONFIG_PINCTRL=y 40 CONFIG_PINCTRL=y
40 CONFIG_PINCTRL_IMX8M=y 41 CONFIG_PINCTRL_IMX8M=y
41 CONFIG_DM_REGULATOR=y 42 CONFIG_DM_REGULATOR=y
42 CONFIG_DM_REGULATOR_FIXED=y 43 CONFIG_DM_REGULATOR_FIXED=y
43 CONFIG_DM_REGULATOR_GPIO=y 44 CONFIG_DM_REGULATOR_GPIO=y
44 CONFIG_DM_SPI=y 45 CONFIG_DM_SPI=y
45 CONFIG_FSL_FSPI=y 46 CONFIG_FSL_FSPI=y
46 CONFIG_NXP_TMU=y 47 CONFIG_NXP_TMU=y
47 CONFIG_DM_THERMAL=y 48 CONFIG_DM_THERMAL=y
48 CONFIG_USB=y 49 CONFIG_USB=y
49 CONFIG_DM_USB=y 50 CONFIG_DM_USB=y
50 CONFIG_USB_EHCI_HCD=y 51 CONFIG_USB_EHCI_HCD=y
51 CONFIG_LZ4=y 52 CONFIG_LZ4=y
52 CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y 53 CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y
53 CONFIG_USB_GADGET=y 54 CONFIG_USB_GADGET=y
54 CONFIG_USB_GADGET_DOWNLOAD=y 55 CONFIG_USB_GADGET_DOWNLOAD=y
55 CONFIG_SDP_LOADADDR=0x40400000 56 CONFIG_SDP_LOADADDR=0x40400000
56 CONFIG_USB_GADGET_MANUFACTURER="FSL" 57 CONFIG_USB_GADGET_MANUFACTURER="FSL"
57 CONFIG_USB_GADGET_VENDOR_NUM=0x0525 58 CONFIG_USB_GADGET_VENDOR_NUM=0x0525
58 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 59 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
59 CONFIG_SPL_USB_HOST_SUPPORT=y 60 CONFIG_SPL_USB_HOST_SUPPORT=y
60 CONFIG_SPL_USB_GADGET_SUPPORT=y 61 CONFIG_SPL_USB_GADGET_SUPPORT=y
61 CONFIG_SPL_USB_SDP_SUPPORT=y 62 CONFIG_SPL_USB_SDP_SUPPORT=y
62 63
configs/imx8mm_evk_defconfig
Diff comments   View file @ b9116f9
1 CONFIG_ARM=y 1 CONFIG_ARM=y
2 CONFIG_ARCH_IMX8M=y 2 CONFIG_ARCH_IMX8M=y
3 CONFIG_SYS_TEXT_BASE=0x40200000 3 CONFIG_SYS_TEXT_BASE=0x40200000
4 CONFIG_SYS_MALLOC_F_LEN=0x2000 4 CONFIG_SYS_MALLOC_F_LEN=0x2000
5 CONFIG_USB_TCPC=y 5 CONFIG_USB_TCPC=y
6 CONFIG_TARGET_IMX8MM_EVK=y 6 CONFIG_TARGET_IMX8MM_EVK=y
7 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL_TEXT_BASE=0x7E1000" 7 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL_TEXT_BASE=0x7E1000"
8 CONFIG_FIT=y 8 CONFIG_FIT=y
9 CONFIG_SPL_LOAD_FIT=y 9 CONFIG_SPL_LOAD_FIT=y
10 CONFIG_ARCH_MISC_INIT=y 10 CONFIG_ARCH_MISC_INIT=y
11 CONFIG_SPL=y 11 CONFIG_SPL=y
12 CONFIG_SPL_BOARD_INIT=y 12 CONFIG_SPL_BOARD_INIT=y
13 CONFIG_SPL_MMC_SUPPORT=y 13 CONFIG_SPL_MMC_SUPPORT=y
14 CONFIG_HUSH_PARSER=y 14 CONFIG_HUSH_PARSER=y
15 CONFIG_OF_LIBFDT=y 15 CONFIG_OF_LIBFDT=y
16 CONFIG_FS_FAT=y 16 CONFIG_FS_FAT=y
17 CONFIG_CMD_EXT2=y 17 CONFIG_CMD_EXT2=y
18 CONFIG_CMD_EXT4=y 18 CONFIG_CMD_EXT4=y
19 CONFIG_CMD_EXT4_WRITE=y 19 CONFIG_CMD_EXT4_WRITE=y
20 CONFIG_CMD_FAT=y 20 CONFIG_CMD_FAT=y
21 CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8mm-evk" 21 CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8mm-evk"
22 CONFIG_ENV_IS_IN_MMC=y 22 CONFIG_ENV_IS_IN_MMC=y
23 CONFIG_CMD_SF=y 23 CONFIG_CMD_SF=y
24 CONFIG_CMD_I2C=y 24 CONFIG_CMD_I2C=y
25 CONFIG_CMD_GPIO=y 25 CONFIG_CMD_GPIO=y
26 CONFIG_CMD_CACHE=y 26 CONFIG_CMD_CACHE=y
27 CONFIG_CMD_REGULATOR=y 27 CONFIG_CMD_REGULATOR=y
28 CONFIG_CMD_MEMTEST=y
28 CONFIG_OF_CONTROL=y 29 CONFIG_OF_CONTROL=y
29 CONFIG_FASTBOOT=y 30 CONFIG_FASTBOOT=y
30 CONFIG_USB_FUNCTION_FASTBOOT=y 31 CONFIG_USB_FUNCTION_FASTBOOT=y
31 CONFIG_CMD_FASTBOOT=y 32 CONFIG_CMD_FASTBOOT=y
32 CONFIG_ANDROID_BOOT_IMAGE=y 33 CONFIG_ANDROID_BOOT_IMAGE=y
33 CONFIG_FSL_FASTBOOT=y 34 CONFIG_FSL_FASTBOOT=y
34 CONFIG_FASTBOOT_BUF_ADDR=0x42800000 35 CONFIG_FASTBOOT_BUF_ADDR=0x42800000
35 CONFIG_FASTBOOT_BUF_SIZE=0x40000000 36 CONFIG_FASTBOOT_BUF_SIZE=0x40000000
36 CONFIG_FASTBOOT_FLASH=y 37 CONFIG_FASTBOOT_FLASH=y
37 CONFIG_FASTBOOT_FLASH_MMC_DEV=0 38 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
38 39
39 CONFIG_DM_GPIO=y 40 CONFIG_DM_GPIO=y
40 CONFIG_DM_I2C=y 41 CONFIG_DM_I2C=y
41 CONFIG_SYS_I2C_MXC=y 42 CONFIG_SYS_I2C_MXC=y
42 CONFIG_DM_MMC=y 43 CONFIG_DM_MMC=y
43 # CONFIG_DM_PMIC=y 44 # CONFIG_DM_PMIC=y
44 CONFIG_EFI_PARTITION=y 45 CONFIG_EFI_PARTITION=y
45 CONFIG_DM_SPI_FLASH=y 46 CONFIG_DM_SPI_FLASH=y
46 CONFIG_SPI_FLASH=y 47 CONFIG_SPI_FLASH=y
47 CONFIG_SPI_FLASH_STMICRO=y 48 CONFIG_SPI_FLASH_STMICRO=y
48 CONFIG_DM_ETH=y 49 CONFIG_DM_ETH=y
49 CONFIG_PINCTRL=y 50 CONFIG_PINCTRL=y
50 CONFIG_PINCTRL_IMX8M=y 51 CONFIG_PINCTRL_IMX8M=y
51 CONFIG_DM_REGULATOR=y 52 CONFIG_DM_REGULATOR=y
52 CONFIG_DM_REGULATOR_FIXED=y 53 CONFIG_DM_REGULATOR_FIXED=y
53 CONFIG_DM_REGULATOR_GPIO=y 54 CONFIG_DM_REGULATOR_GPIO=y
54 CONFIG_DM_SPI=y 55 CONFIG_DM_SPI=y
55 CONFIG_FSL_FSPI=y 56 CONFIG_FSL_FSPI=y
56 CONFIG_NXP_TMU=y 57 CONFIG_NXP_TMU=y
57 CONFIG_DM_THERMAL=y 58 CONFIG_DM_THERMAL=y
58 CONFIG_USB=y 59 CONFIG_USB=y
59 CONFIG_USB_GADGET=y 60 CONFIG_USB_GADGET=y
60 CONFIG_DM_USB=y 61 CONFIG_DM_USB=y
61 CONFIG_USB_EHCI_HCD=y 62 CONFIG_USB_EHCI_HCD=y
62 63
63 CONFIG_SPL_USB_HOST_SUPPORT=y 64 CONFIG_SPL_USB_HOST_SUPPORT=y
64 CONFIG_SPL_USB_GADGET_SUPPORT=y 65 CONFIG_SPL_USB_GADGET_SUPPORT=y
65 CONFIG_SPL_USB_SDP_SUPPORT=y 66 CONFIG_SPL_USB_SDP_SUPPORT=y
66 CONFIG_SDP_LOADADDR=0x40400000 67 CONFIG_SDP_LOADADDR=0x40400000
67 CONFIG_USB_GADGET_MANUFACTURER="FSL" 68 CONFIG_USB_GADGET_MANUFACTURER="FSL"
68 CONFIG_USB_GADGET_VENDOR_NUM=0x0525 69 CONFIG_USB_GADGET_VENDOR_NUM=0x0525
69 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 70 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
70 71
71 CONFIG_VIDEO=y 72 CONFIG_VIDEO=y
72 CONFIG_IMX_SEC_MIPI_DSI=y 73 CONFIG_IMX_SEC_MIPI_DSI=y
73 74
configs/imx8mm_evk_fspi_defconfig
Diff comments   View file @ b9116f9
1 CONFIG_ARM=y 1 CONFIG_ARM=y
2 CONFIG_ARCH_IMX8M=y 2 CONFIG_ARCH_IMX8M=y
3 CONFIG_SYS_TEXT_BASE=0x40200000 3 CONFIG_SYS_TEXT_BASE=0x40200000
4 CONFIG_SYS_MALLOC_F_LEN=0x2000 4 CONFIG_SYS_MALLOC_F_LEN=0x2000
5 CONFIG_USB_TCPC=y 5 CONFIG_USB_TCPC=y
6 CONFIG_TARGET_IMX8MM_EVK=y 6 CONFIG_TARGET_IMX8MM_EVK=y
7 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_qspi.cfg,SPL_TEXT_BASE=0x7E2000" 7 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_qspi.cfg,SPL_TEXT_BASE=0x7E2000"
8 CONFIG_FIT=y 8 CONFIG_FIT=y
9 CONFIG_SPL_LOAD_FIT=y 9 CONFIG_SPL_LOAD_FIT=y
10 CONFIG_ARCH_MISC_INIT=y 10 CONFIG_ARCH_MISC_INIT=y
11 CONFIG_SPL=y 11 CONFIG_SPL=y
12 CONFIG_SPL_BOARD_INIT=y 12 CONFIG_SPL_BOARD_INIT=y
13 CONFIG_SPL_NOR_SUPPORT=y 13 CONFIG_SPL_NOR_SUPPORT=y
14 CONFIG_HUSH_PARSER=y 14 CONFIG_HUSH_PARSER=y
15 CONFIG_OF_LIBFDT=y 15 CONFIG_OF_LIBFDT=y
16 CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8mm-evk" 16 CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8mm-evk"
17 CONFIG_ENV_IS_IN_SPI_FLASH=y 17 CONFIG_ENV_IS_IN_SPI_FLASH=y
18 CONFIG_CMD_SF=y 18 CONFIG_CMD_SF=y
19 CONFIG_CMD_I2C=y 19 CONFIG_CMD_I2C=y
20 CONFIG_CMD_GPIO=y 20 CONFIG_CMD_GPIO=y
21 CONFIG_CMD_CACHE=y 21 CONFIG_CMD_CACHE=y
22 CONFIG_CMD_REGULATOR=y 22 CONFIG_CMD_REGULATOR=y
23 CONFIG_CMD_MEMTEST=y
23 CONFIG_OF_CONTROL=y 24 CONFIG_OF_CONTROL=y
24 CONFIG_FASTBOOT=y 25 CONFIG_FASTBOOT=y
25 CONFIG_USB_FUNCTION_FASTBOOT=y 26 CONFIG_USB_FUNCTION_FASTBOOT=y
26 CONFIG_CMD_FASTBOOT=y 27 CONFIG_CMD_FASTBOOT=y
27 CONFIG_ANDROID_BOOT_IMAGE=y 28 CONFIG_ANDROID_BOOT_IMAGE=y
28 CONFIG_FSL_FASTBOOT=y 29 CONFIG_FSL_FASTBOOT=y
29 CONFIG_FASTBOOT_BUF_ADDR=0x42800000 30 CONFIG_FASTBOOT_BUF_ADDR=0x42800000
30 CONFIG_FASTBOOT_BUF_SIZE=0x40000000 31 CONFIG_FASTBOOT_BUF_SIZE=0x40000000
31 CONFIG_FASTBOOT_FLASH=y 32 CONFIG_FASTBOOT_FLASH=y
32 CONFIG_FASTBOOT_FLASH_MMC_DEV=0 33 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
33 34
34 CONFIG_DM_GPIO=y 35 CONFIG_DM_GPIO=y
35 CONFIG_DM_I2C=y 36 CONFIG_DM_I2C=y
36 CONFIG_SYS_I2C_MXC=y 37 CONFIG_SYS_I2C_MXC=y
37 CONFIG_DM_MMC=y 38 CONFIG_DM_MMC=y
38 # CONFIG_DM_PMIC=y 39 # CONFIG_DM_PMIC=y
39 CONFIG_EFI_PARTITION=y 40 CONFIG_EFI_PARTITION=y
40 CONFIG_DM_SPI_FLASH=y 41 CONFIG_DM_SPI_FLASH=y
41 CONFIG_SPI_FLASH=y 42 CONFIG_SPI_FLASH=y
42 CONFIG_SPI_FLASH_STMICRO=y 43 CONFIG_SPI_FLASH_STMICRO=y
43 CONFIG_DM_ETH=y 44 CONFIG_DM_ETH=y
44 CONFIG_PINCTRL=y 45 CONFIG_PINCTRL=y
45 CONFIG_PINCTRL_IMX8M=y 46 CONFIG_PINCTRL_IMX8M=y
46 CONFIG_DM_REGULATOR=y 47 CONFIG_DM_REGULATOR=y
47 CONFIG_DM_REGULATOR_FIXED=y 48 CONFIG_DM_REGULATOR_FIXED=y
48 CONFIG_DM_REGULATOR_GPIO=y 49 CONFIG_DM_REGULATOR_GPIO=y
49 CONFIG_DM_SPI=y 50 CONFIG_DM_SPI=y
50 CONFIG_FSL_FSPI=y 51 CONFIG_FSL_FSPI=y
51 CONFIG_NXP_TMU=y 52 CONFIG_NXP_TMU=y
52 CONFIG_DM_THERMAL=y 53 CONFIG_DM_THERMAL=y
53 CONFIG_USB=y 54 CONFIG_USB=y
54 CONFIG_USB_GADGET=y 55 CONFIG_USB_GADGET=y
55 CONFIG_DM_USB=y 56 CONFIG_DM_USB=y
56 CONFIG_USB_EHCI_HCD=y 57 CONFIG_USB_EHCI_HCD=y
57 58
58 CONFIG_SPL_USB_HOST_SUPPORT=y 59 CONFIG_SPL_USB_HOST_SUPPORT=y
59 CONFIG_SPL_USB_GADGET_SUPPORT=y 60 CONFIG_SPL_USB_GADGET_SUPPORT=y
60 CONFIG_SPL_USB_SDP_SUPPORT=y 61 CONFIG_SPL_USB_SDP_SUPPORT=y
61 CONFIG_SDP_LOADADDR=0x40400000 62 CONFIG_SDP_LOADADDR=0x40400000
62 CONFIG_USB_GADGET_MANUFACTURER="FSL" 63 CONFIG_USB_GADGET_MANUFACTURER="FSL"
63 CONFIG_USB_GADGET_VENDOR_NUM=0x0525 64 CONFIG_USB_GADGET_VENDOR_NUM=0x0525
64 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 65 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
65 66
include/configs/imx8mm_evk.h
Diff comments   View file @ b9116f9
1 /* 1 /*
2 * Copyright 2018 NXP 2 * Copyright 2018 NXP
3 * 3 *
4 * SPDX-License-Identifier: GPL-2.0+ 4 * SPDX-License-Identifier: GPL-2.0+
5 */ 5 */
6 6
7 #ifndef __IMX8MM_EVK_H 7 #ifndef __IMX8MM_EVK_H
8 #define __IMX8MM_EVK_H 8 #define __IMX8MM_EVK_H
9 9
10 #include <linux/sizes.h> 10 #include <linux/sizes.h>
11 #include <asm/arch/imx-regs.h> 11 #include <asm/arch/imx-regs.h>
12 12
13 #include "imx_env.h" 13 #include "imx_env.h"
14 14
15 #ifdef CONFIG_SECURE_BOOT 15 #ifdef CONFIG_SECURE_BOOT
16 #define CONFIG_CSF_SIZE 0x2000 /* 8K region */ 16 #define CONFIG_CSF_SIZE 0x2000 /* 8K region */
17 #endif 17 #endif
18 18
19 #define CONFIG_SPL_MAX_SIZE (124 * 1024) 19 #define CONFIG_SPL_MAX_SIZE (124 * 1024)
20 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 20 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
21 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR 21 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
22 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 22 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
23 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 23 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
24 #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) 24 #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
25 25
26 #ifdef CONFIG_SPL_BUILD 26 #ifdef CONFIG_SPL_BUILD
27 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ 27 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
28 #define CONFIG_SPL_WATCHDOG_SUPPORT 28 #define CONFIG_SPL_WATCHDOG_SUPPORT
29 #define CONFIG_SPL_POWER_SUPPORT 29 #define CONFIG_SPL_POWER_SUPPORT
30 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT 30 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
31 #define CONFIG_SPL_I2C_SUPPORT 31 #define CONFIG_SPL_I2C_SUPPORT
32 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" 32 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
33 #define CONFIG_SPL_STACK 0x91fff0 33 #define CONFIG_SPL_STACK 0x91fff0
34 #define CONFIG_SPL_LIBCOMMON_SUPPORT 34 #define CONFIG_SPL_LIBCOMMON_SUPPORT
35 #define CONFIG_SPL_LIBGENERIC_SUPPORT 35 #define CONFIG_SPL_LIBGENERIC_SUPPORT
36 #define CONFIG_SPL_SERIAL_SUPPORT 36 #define CONFIG_SPL_SERIAL_SUPPORT
37 #define CONFIG_SPL_GPIO_SUPPORT 37 #define CONFIG_SPL_GPIO_SUPPORT
38 #define CONFIG_SPL_BSS_START_ADDR 0x00910000 38 #define CONFIG_SPL_BSS_START_ADDR 0x00910000
39 #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ 39 #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
40 #define CONFIG_SYS_SPL_MALLOC_START 0x00911000 40 #define CONFIG_SYS_SPL_MALLOC_START 0x00911000
41 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ 41 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */
42 #define CONFIG_SYS_ICACHE_OFF 42 #define CONFIG_SYS_ICACHE_OFF
43 #define CONFIG_SYS_DCACHE_OFF 43 #define CONFIG_SYS_DCACHE_OFF
44 44
45 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ 45 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
46 46
47 #undef CONFIG_DM_MMC 47 #undef CONFIG_DM_MMC
48 #undef CONFIG_DM_PMIC 48 #undef CONFIG_DM_PMIC
49 #undef CONFIG_DM_PMIC_PFUZE100 49 #undef CONFIG_DM_PMIC_PFUZE100
50 50
51 #define CONFIG_POWER 51 #define CONFIG_POWER
52 #define CONFIG_POWER_I2C 52 #define CONFIG_POWER_I2C
53 #define CONFIG_POWER_BD71837 53 #define CONFIG_POWER_BD71837
54 54
55 #define CONFIG_SYS_I2C 55 #define CONFIG_SYS_I2C
56 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 56 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
57 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 57 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
58 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 58 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
59 59
60 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 60 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
61 #endif 61 #endif
62 62
63 #define CONFIG_CMD_READ 63 #define CONFIG_CMD_READ
64 #define CONFIG_SERIAL_TAG 64 #define CONFIG_SERIAL_TAG
65 #define CONFIG_FASTBOOT_USB_DEV 0 65 #define CONFIG_FASTBOOT_USB_DEV 0
66 66
67 #define CONFIG_REMAKE_ELF 67 #define CONFIG_REMAKE_ELF
68 68
69 #define CONFIG_BOARD_EARLY_INIT_F 69 #define CONFIG_BOARD_EARLY_INIT_F
70 #define CONFIG_BOARD_POSTCLK_INIT 70 #define CONFIG_BOARD_POSTCLK_INIT
71 #define CONFIG_BOARD_LATE_INIT 71 #define CONFIG_BOARD_LATE_INIT
72 72
73 /* Flat Device Tree Definitions */ 73 /* Flat Device Tree Definitions */
74 #define CONFIG_OF_BOARD_SETUP 74 #define CONFIG_OF_BOARD_SETUP
75 75
76 #undef CONFIG_CMD_EXPORTENV 76 #undef CONFIG_CMD_EXPORTENV
77 #undef CONFIG_CMD_IMPORTENV 77 #undef CONFIG_CMD_IMPORTENV
78 #undef CONFIG_CMD_IMLS 78 #undef CONFIG_CMD_IMLS
79 79
80 #undef CONFIG_CMD_CRC32 80 #undef CONFIG_CMD_CRC32
81 #undef CONFIG_BOOTM_NETBSD 81 #undef CONFIG_BOOTM_NETBSD
82 82
83 /* ENET Config */ 83 /* ENET Config */
84 /* ENET1 */ 84 /* ENET1 */
85 #if defined(CONFIG_CMD_NET) 85 #if defined(CONFIG_CMD_NET)
86 #define CONFIG_CMD_PING 86 #define CONFIG_CMD_PING
87 #define CONFIG_CMD_DHCP 87 #define CONFIG_CMD_DHCP
88 #define CONFIG_CMD_MII 88 #define CONFIG_CMD_MII
89 #define CONFIG_MII 89 #define CONFIG_MII
90 #define CONFIG_ETHPRIME "FEC" 90 #define CONFIG_ETHPRIME "FEC"
91 91
92 #define CONFIG_FEC_MXC 92 #define CONFIG_FEC_MXC
93 #define CONFIG_FEC_XCV_TYPE RGMII 93 #define CONFIG_FEC_XCV_TYPE RGMII
94 #define CONFIG_FEC_MXC_PHYADDR 0 94 #define CONFIG_FEC_MXC_PHYADDR 0
95 #define FEC_QUIRK_ENET_MAC 95 #define FEC_QUIRK_ENET_MAC
96 96
97 #define CONFIG_PHY_GIGE 97 #define CONFIG_PHY_GIGE
98 #define IMX_FEC_BASE 0x30BE0000 98 #define IMX_FEC_BASE 0x30BE0000
99 99
100 #define CONFIG_PHYLIB 100 #define CONFIG_PHYLIB
101 #define CONFIG_PHY_ATHEROS 101 #define CONFIG_PHY_ATHEROS
102 #endif 102 #endif
103 103
104 /* 104 /*
105 * Another approach is add the clocks for inmates into clks_init_on 105 * Another approach is add the clocks for inmates into clks_init_on
106 * in clk-imx8mm.c, then clk_ingore_unused could be removed. 106 * in clk-imx8mm.c, then clk_ingore_unused could be removed.
107 */ 107 */
108 #define JAILHOUSE_ENV \ 108 #define JAILHOUSE_ENV \
109 "jh_clk= \0 " \ 109 "jh_clk= \0 " \
110 "jh_mmcboot=setenv fdt_file fsl-imx8mm-evk-root.dtb; setenv jh_clk clk_ignore_unused; run mmcboot\0 " \ 110 "jh_mmcboot=setenv fdt_file fsl-imx8mm-evk-root.dtb; setenv jh_clk clk_ignore_unused; run mmcboot\0 " \
111 "jh_netboot=setenv fdt_file fsl-imx8mm-evk-root.dtb; setenv jh_clk clk_ignore_unused; run netboot\0 " 111 "jh_netboot=setenv fdt_file fsl-imx8mm-evk-root.dtb; setenv jh_clk clk_ignore_unused; run netboot\0 "
112 112
113 #define CONFIG_MFG_ENV_SETTINGS \ 113 #define CONFIG_MFG_ENV_SETTINGS \
114 CONFIG_MFG_ENV_SETTINGS_DEFAULT \ 114 CONFIG_MFG_ENV_SETTINGS_DEFAULT \
115 "initrd_addr=0x43800000\0" \ 115 "initrd_addr=0x43800000\0" \
116 "initrd_high=0xffffffff\0" \ 116 "initrd_high=0xffffffff\0" \
117 "emmc_dev=1\0"\ 117 "emmc_dev=1\0"\
118 "sd_dev=0\0" \ 118 "sd_dev=0\0" \
119 119
120 /* Initial environment variables */ 120 /* Initial environment variables */
121 #define CONFIG_EXTRA_ENV_SETTINGS \ 121 #define CONFIG_EXTRA_ENV_SETTINGS \
122 CONFIG_MFG_ENV_SETTINGS \ 122 CONFIG_MFG_ENV_SETTINGS \
123 JAILHOUSE_ENV \ 123 JAILHOUSE_ENV \
124 "script=boot.scr\0" \ 124 "script=boot.scr\0" \
125 "image=Image\0" \ 125 "image=Image\0" \
126 "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \ 126 "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
127 "fdt_addr=0x43000000\0" \ 127 "fdt_addr=0x43000000\0" \
128 "fdt_high=0xffffffffffffffff\0" \ 128 "fdt_high=0xffffffffffffffff\0" \
129 "boot_fdt=try\0" \ 129 "boot_fdt=try\0" \
130 "fdt_file=fsl-imx8mm-evk.dtb\0" \ 130 "fdt_file=fsl-imx8mm-evk.dtb\0" \
131 "initrd_addr=0x43800000\0" \ 131 "initrd_addr=0x43800000\0" \
132 "initrd_high=0xffffffffffffffff\0" \ 132 "initrd_high=0xffffffffffffffff\0" \
133 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 133 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
134 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 134 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
135 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 135 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
136 "mmcautodetect=yes\0" \ 136 "mmcautodetect=yes\0" \
137 "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \ 137 "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
138 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 138 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
139 "bootscript=echo Running bootscript from mmc ...; " \ 139 "bootscript=echo Running bootscript from mmc ...; " \
140 "source\0" \ 140 "source\0" \
141 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 141 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
142 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 142 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
143 "mmcboot=echo Booting from mmc ...; " \ 143 "mmcboot=echo Booting from mmc ...; " \
144 "run mmcargs; " \ 144 "run mmcargs; " \
145 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 145 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
146 "if run loadfdt; then " \ 146 "if run loadfdt; then " \
147 "booti ${loadaddr} - ${fdt_addr}; " \ 147 "booti ${loadaddr} - ${fdt_addr}; " \
148 "else " \ 148 "else " \
149 "echo WARN: Cannot load the DT; " \ 149 "echo WARN: Cannot load the DT; " \
150 "fi; " \ 150 "fi; " \
151 "else " \ 151 "else " \
152 "echo wait for boot; " \ 152 "echo wait for boot; " \
153 "fi;\0" \ 153 "fi;\0" \
154 "netargs=setenv bootargs ${jh_clk} console=${console} " \ 154 "netargs=setenv bootargs ${jh_clk} console=${console} " \
155 "root=/dev/nfs " \ 155 "root=/dev/nfs " \
156 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 156 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
157 "netboot=echo Booting from net ...; " \ 157 "netboot=echo Booting from net ...; " \
158 "run netargs; " \ 158 "run netargs; " \
159 "if test ${ip_dyn} = yes; then " \ 159 "if test ${ip_dyn} = yes; then " \
160 "setenv get_cmd dhcp; " \ 160 "setenv get_cmd dhcp; " \
161 "else " \ 161 "else " \
162 "setenv get_cmd tftp; " \ 162 "setenv get_cmd tftp; " \
163 "fi; " \ 163 "fi; " \
164 "${get_cmd} ${loadaddr} ${image}; " \ 164 "${get_cmd} ${loadaddr} ${image}; " \
165 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 165 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
166 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 166 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
167 "booti ${loadaddr} - ${fdt_addr}; " \ 167 "booti ${loadaddr} - ${fdt_addr}; " \
168 "else " \ 168 "else " \
169 "echo WARN: Cannot load the DT; " \ 169 "echo WARN: Cannot load the DT; " \
170 "fi; " \ 170 "fi; " \
171 "else " \ 171 "else " \
172 "booti; " \ 172 "booti; " \
173 "fi;\0" 173 "fi;\0"
174 174
175 #define CONFIG_BOOTCOMMAND \ 175 #define CONFIG_BOOTCOMMAND \
176 "mmc dev ${mmcdev}; if mmc rescan; then " \ 176 "mmc dev ${mmcdev}; if mmc rescan; then " \
177 "if run loadbootscript; then " \ 177 "if run loadbootscript; then " \
178 "run bootscript; " \ 178 "run bootscript; " \
179 "else " \ 179 "else " \
180 "if run loadimage; then " \ 180 "if run loadimage; then " \
181 "run mmcboot; " \ 181 "run mmcboot; " \
182 "else run netboot; " \ 182 "else run netboot; " \
183 "fi; " \ 183 "fi; " \
184 "fi; " \ 184 "fi; " \
185 "else booti ${loadaddr} - ${fdt_addr}; fi" 185 "else booti ${loadaddr} - ${fdt_addr}; fi"
186 186
187 /* Link Definitions */ 187 /* Link Definitions */
188 #define CONFIG_LOADADDR 0x40480000 188 #define CONFIG_LOADADDR 0x40480000
189 189
190 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 190 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
191 191
192 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 192 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
193 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 193 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
194 #define CONFIG_SYS_INIT_SP_OFFSET \ 194 #define CONFIG_SYS_INIT_SP_OFFSET \
195 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 195 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
196 #define CONFIG_SYS_INIT_SP_ADDR \ 196 #define CONFIG_SYS_INIT_SP_ADDR \
197 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 197 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
198 198
199 #define CONFIG_ENV_OVERWRITE 199 #define CONFIG_ENV_OVERWRITE
200 #if defined(CONFIG_ENV_IS_IN_MMC) 200 #if defined(CONFIG_ENV_IS_IN_MMC)
201 #define CONFIG_ENV_OFFSET (64 * SZ_64K) 201 #define CONFIG_ENV_OFFSET (64 * SZ_64K)
202 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) 202 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
203 #define CONFIG_ENV_OFFSET (4 * 1024 * 1024) 203 #define CONFIG_ENV_OFFSET (4 * 1024 * 1024)
204 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 204 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
205 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 205 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
206 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 206 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
207 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 207 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
208 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 208 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
209 #endif 209 #endif
210 #define CONFIG_ENV_SIZE 0x1000 210 #define CONFIG_ENV_SIZE 0x1000
211 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */ 211 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */
212 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ 212 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
213 213
214 /* Size of malloc() pool */ 214 /* Size of malloc() pool */
215 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024) 215 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024)
216 216
217 #define CONFIG_SYS_SDRAM_BASE 0x40000000 217 #define CONFIG_SYS_SDRAM_BASE 0x40000000
218 #define PHYS_SDRAM 0x40000000 218 #define PHYS_SDRAM 0x40000000
219 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ 219 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
220 #define CONFIG_NR_DRAM_BANKS 1 220 #define CONFIG_NR_DRAM_BANKS 1
221 221
222 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
223 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
224
222 #define CONFIG_BAUDRATE 115200 225 #define CONFIG_BAUDRATE 115200
223 226
224 #define CONFIG_MXC_UART 227 #define CONFIG_MXC_UART
225 #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR 228 #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
226 229
227 /* Monitor Command Prompt */ 230 /* Monitor Command Prompt */
228 #undef CONFIG_SYS_PROMPT 231 #undef CONFIG_SYS_PROMPT
229 #define CONFIG_SYS_PROMPT "u-boot=> " 232 #define CONFIG_SYS_PROMPT "u-boot=> "
230 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 233 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
231 #define CONFIG_SYS_CBSIZE 2048 234 #define CONFIG_SYS_CBSIZE 2048
232 #define CONFIG_SYS_MAXARGS 64 235 #define CONFIG_SYS_MAXARGS 64
233 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 236 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
234 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 237 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
235 sizeof(CONFIG_SYS_PROMPT) + 16) 238 sizeof(CONFIG_SYS_PROMPT) + 16)
236 239
237 #define CONFIG_IMX_BOOTAUX 240 #define CONFIG_IMX_BOOTAUX
238 241
239 /* USDHC */ 242 /* USDHC */
240 #define CONFIG_CMD_MMC 243 #define CONFIG_CMD_MMC
241 #define CONFIG_FSL_ESDHC 244 #define CONFIG_FSL_ESDHC
242 #define CONFIG_FSL_USDHC 245 #define CONFIG_FSL_USDHC
243 246
244 #define CONFIG_SYS_FSL_USDHC_NUM 2 247 #define CONFIG_SYS_FSL_USDHC_NUM 2
245 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 248 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
246 249
247 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 250 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
248 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 251 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
249 252
250 #ifdef CONFIG_FSL_FSPI 253 #ifdef CONFIG_FSL_FSPI
251 #define CONFIG_SF_DEFAULT_BUS 0 254 #define CONFIG_SF_DEFAULT_BUS 0
252 #define CONFIG_SF_DEFAULT_CS 0 255 #define CONFIG_SF_DEFAULT_CS 0
253 #define CONFIG_SF_DEFAULT_SPEED 40000000 256 #define CONFIG_SF_DEFAULT_SPEED 40000000
254 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 257 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
255 #define FSL_FSPI_FLASH_SIZE SZ_32M 258 #define FSL_FSPI_FLASH_SIZE SZ_32M
256 #define FSL_FSPI_FLASH_NUM 1 259 #define FSL_FSPI_FLASH_NUM 1
257 #define FSPI0_BASE_ADDR 0x30bb0000 260 #define FSPI0_BASE_ADDR 0x30bb0000
258 #define FSPI0_AMBA_BASE 0x0 261 #define FSPI0_AMBA_BASE 0x0
259 #define CONFIG_SPI_FLASH_BAR 262 #define CONFIG_SPI_FLASH_BAR
260 #define CONFIG_FSPI_QUAD_SUPPORT 263 #define CONFIG_FSPI_QUAD_SUPPORT
261 264
262 #define CONFIG_SYS_FSL_FSPI_AHB 265 #define CONFIG_SYS_FSL_FSPI_AHB
263 #endif 266 #endif
264 267
265 /* Enable SPI */ 268 /* Enable SPI */
266 #ifndef CONFIG_NAND_MXS 269 #ifndef CONFIG_NAND_MXS
267 #ifndef CONFIG_FSL_FSPI 270 #ifndef CONFIG_FSL_FSPI
268 #ifdef CONFIG_CMD_SF 271 #ifdef CONFIG_CMD_SF
269 #define CONFIG_SPI_FLASH 272 #define CONFIG_SPI_FLASH
270 #define CONFIG_SPI_FLASH_STMICRO 273 #define CONFIG_SPI_FLASH_STMICRO
271 #define CONFIG_MXC_SPI 274 #define CONFIG_MXC_SPI
272 #define CONFIG_SF_DEFAULT_BUS 0 275 #define CONFIG_SF_DEFAULT_BUS 0
273 #define CONFIG_SF_DEFAULT_SPEED 20000000 276 #define CONFIG_SF_DEFAULT_SPEED 20000000
274 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 277 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
275 #endif 278 #endif
276 #endif 279 #endif
277 #endif 280 #endif
278 281
279 #ifdef CONFIG_NAND_MXS 282 #ifdef CONFIG_NAND_MXS
280 #define CONFIG_CMD_NAND_TRIMFFS 283 #define CONFIG_CMD_NAND_TRIMFFS
281 284
282 /* NAND stuff */ 285 /* NAND stuff */
283 #define CONFIG_SYS_MAX_NAND_DEVICE 1 286 #define CONFIG_SYS_MAX_NAND_DEVICE 1
284 #define CONFIG_SYS_NAND_BASE 0x20000000 287 #define CONFIG_SYS_NAND_BASE 0x20000000
285 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 288 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
286 #define CONFIG_SYS_NAND_ONFI_DETECTION 289 #define CONFIG_SYS_NAND_ONFI_DETECTION
287 290
288 /* DMA stuff, needed for GPMI/MXS NAND support */ 291 /* DMA stuff, needed for GPMI/MXS NAND support */
289 #define CONFIG_APBH_DMA 292 #define CONFIG_APBH_DMA
290 #define CONFIG_APBH_DMA_BURST 293 #define CONFIG_APBH_DMA_BURST
291 #define CONFIG_APBH_DMA_BURST8 294 #define CONFIG_APBH_DMA_BURST8
292 #endif 295 #endif
293 296
294 #define CONFIG_MXC_GPIO 297 #define CONFIG_MXC_GPIO
295 298
296 #define CONFIG_MXC_OCOTP 299 #define CONFIG_MXC_OCOTP
297 #define CONFIG_CMD_FUSE 300 #define CONFIG_CMD_FUSE
298 301
299 #ifndef CONFIG_DM_I2C 302 #ifndef CONFIG_DM_I2C
300 #define CONFIG_SYS_I2C 303 #define CONFIG_SYS_I2C
301 #endif 304 #endif
302 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 305 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
303 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 306 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
304 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 307 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
305 #define CONFIG_SYS_I2C_SPEED 100000 308 #define CONFIG_SYS_I2C_SPEED 100000
306 309
307 /* USB configs */ 310 /* USB configs */
308 #ifndef CONFIG_SPL_BUILD 311 #ifndef CONFIG_SPL_BUILD
309 #define CONFIG_CMD_USB 312 #define CONFIG_CMD_USB
310 #define CONFIG_USB_STORAGE 313 #define CONFIG_USB_STORAGE
311 #define CONFIG_USBD_HS 314 #define CONFIG_USBD_HS
312 315
313 #define CONFIG_CMD_USB_MASS_STORAGE 316 #define CONFIG_CMD_USB_MASS_STORAGE
314 #define CONFIG_USB_GADGET_MASS_STORAGE 317 #define CONFIG_USB_GADGET_MASS_STORAGE
315 #define CONFIG_USB_FUNCTION_MASS_STORAGE 318 #define CONFIG_USB_FUNCTION_MASS_STORAGE
316 319
317 #endif 320 #endif
318 321
319 #define CONFIG_USB_GADGET_DUALSPEED 322 #define CONFIG_USB_GADGET_DUALSPEED
320 #define CONFIG_USB_GADGET_VBUS_DRAW 2 323 #define CONFIG_USB_GADGET_VBUS_DRAW 2
321 324
322 #define CONFIG_CI_UDC 325 #define CONFIG_CI_UDC
323 326
324 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 327 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
325 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 328 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
326 329
327 #ifdef CONFIG_VIDEO 330 #ifdef CONFIG_VIDEO
328 #define CONFIG_VIDEO_MXS 331 #define CONFIG_VIDEO_MXS
329 #define CONFIG_VIDEO_LOGO 332 #define CONFIG_VIDEO_LOGO
330 #define CONFIG_SPLASH_SCREEN 333 #define CONFIG_SPLASH_SCREEN
331 #define CONFIG_SPLASH_SCREEN_ALIGN 334 #define CONFIG_SPLASH_SCREEN_ALIGN
332 #define CONFIG_CMD_BMP 335 #define CONFIG_CMD_BMP
333 #define CONFIG_BMP_16BPP 336 #define CONFIG_BMP_16BPP
334 #define CONFIG_VIDEO_BMP_RLE8 337 #define CONFIG_VIDEO_BMP_RLE8
335 #define CONFIG_VIDEO_BMP_LOGO 338 #define CONFIG_VIDEO_BMP_LOGO
336 #define CONFIG_IMX_VIDEO_SKIP 339 #define CONFIG_IMX_VIDEO_SKIP
337 #define CONFIG_RM67191 340 #define CONFIG_RM67191
338 #endif 341 #endif
339 342
340 #define CONFIG_OF_SYSTEM_SETUP 343 #define CONFIG_OF_SYSTEM_SETUP
341 344
342 #if defined(CONFIG_ANDROID_SUPPORT) 345 #if defined(CONFIG_ANDROID_SUPPORT)
343 #include "imx8mm_evk_android.h" 346 #include "imx8mm_evk_android.h"
344 #endif 347 #endif
345 #endif 348 #endif
346 349
include/configs/imx8mm_val.h
Diff comments   View file @ b9116f9
1 /* 1 /*
2 * Copyright 2018 NXP 2 * Copyright 2018 NXP
3 * 3 *
4 * SPDX-License-Identifier: GPL-2.0+ 4 * SPDX-License-Identifier: GPL-2.0+
5 */ 5 */
6 6
7 #ifndef __IMX8MM_VAL_H 7 #ifndef __IMX8MM_VAL_H
8 #define __IMX8MM_VAL_H 8 #define __IMX8MM_VAL_H
9 9
10 #include <linux/sizes.h> 10 #include <linux/sizes.h>
11 #include <asm/arch/imx-regs.h> 11 #include <asm/arch/imx-regs.h>
12 12
13 #ifdef CONFIG_SECURE_BOOT 13 #ifdef CONFIG_SECURE_BOOT
14 #define CONFIG_CSF_SIZE 0x2000 /* 8K region */ 14 #define CONFIG_CSF_SIZE 0x2000 /* 8K region */
15 #endif 15 #endif
16 16
17 #define CONFIG_SPL_MAX_SIZE (124 * 1024) 17 #define CONFIG_SPL_MAX_SIZE (124 * 1024)
18 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 18 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
19 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR 19 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
20 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 20 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
21 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 21 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
22 #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) 22 #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
23 23
24 #ifdef CONFIG_SPL_BUILD 24 #ifdef CONFIG_SPL_BUILD
25 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ 25 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
26 #define CONFIG_SPL_WATCHDOG_SUPPORT 26 #define CONFIG_SPL_WATCHDOG_SUPPORT
27 #define CONFIG_SPL_POWER_SUPPORT 27 #define CONFIG_SPL_POWER_SUPPORT
28 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT 28 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
29 #define CONFIG_SPL_I2C_SUPPORT 29 #define CONFIG_SPL_I2C_SUPPORT
30 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" 30 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
31 #define CONFIG_SPL_STACK 0x91FFF0 31 #define CONFIG_SPL_STACK 0x91FFF0
32 #define CONFIG_SPL_LIBCOMMON_SUPPORT 32 #define CONFIG_SPL_LIBCOMMON_SUPPORT
33 #define CONFIG_SPL_LIBGENERIC_SUPPORT 33 #define CONFIG_SPL_LIBGENERIC_SUPPORT
34 #define CONFIG_SPL_SERIAL_SUPPORT 34 #define CONFIG_SPL_SERIAL_SUPPORT
35 #define CONFIG_SPL_GPIO_SUPPORT 35 #define CONFIG_SPL_GPIO_SUPPORT
36 #define CONFIG_SPL_BSS_START_ADDR 0x00910000 36 #define CONFIG_SPL_BSS_START_ADDR 0x00910000
37 #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ 37 #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
38 #define CONFIG_SYS_SPL_MALLOC_START 0x00911000 38 #define CONFIG_SYS_SPL_MALLOC_START 0x00911000
39 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ 39 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */
40 #define CONFIG_SYS_ICACHE_OFF 40 #define CONFIG_SYS_ICACHE_OFF
41 #define CONFIG_SYS_DCACHE_OFF 41 #define CONFIG_SYS_DCACHE_OFF
42 42
43 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ 43 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
44 44
45 #undef CONFIG_DM_MMC 45 #undef CONFIG_DM_MMC
46 #undef CONFIG_DM_PMIC 46 #undef CONFIG_DM_PMIC
47 #undef CONFIG_DM_PMIC_PFUZE100 47 #undef CONFIG_DM_PMIC_PFUZE100
48 48
49 #define CONFIG_POWER 49 #define CONFIG_POWER
50 #define CONFIG_POWER_I2C 50 #define CONFIG_POWER_I2C
51 #define CONFIG_POWER_BD71837 51 #define CONFIG_POWER_BD71837
52 52
53 #define CONFIG_SYS_I2C 53 #define CONFIG_SYS_I2C
54 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 54 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
55 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 55 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
56 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 56 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
57 57
58 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 58 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
59 #endif 59 #endif
60 60
61 #define CONFIG_REMAKE_ELF 61 #define CONFIG_REMAKE_ELF
62 62
63 #define CONFIG_BOARD_EARLY_INIT_F 63 #define CONFIG_BOARD_EARLY_INIT_F
64 #define CONFIG_BOARD_POSTCLK_INIT 64 #define CONFIG_BOARD_POSTCLK_INIT
65 #define CONFIG_BOARD_LATE_INIT 65 #define CONFIG_BOARD_LATE_INIT
66 66
67 /* Flat Device Tree Definitions */ 67 /* Flat Device Tree Definitions */
68 #define CONFIG_OF_BOARD_SETUP 68 #define CONFIG_OF_BOARD_SETUP
69 69
70 #undef CONFIG_CMD_EXPORTENV 70 #undef CONFIG_CMD_EXPORTENV
71 #undef CONFIG_CMD_IMPORTENV 71 #undef CONFIG_CMD_IMPORTENV
72 #undef CONFIG_CMD_IMLS 72 #undef CONFIG_CMD_IMLS
73 73
74 #undef CONFIG_CMD_CRC32 74 #undef CONFIG_CMD_CRC32
75 #undef CONFIG_BOOTM_NETBSD 75 #undef CONFIG_BOOTM_NETBSD
76 76
77 /* ENET Config */ 77 /* ENET Config */
78 /* ENET1 */ 78 /* ENET1 */
79 #if defined(CONFIG_CMD_NET) 79 #if defined(CONFIG_CMD_NET)
80 #define CONFIG_CMD_PING 80 #define CONFIG_CMD_PING
81 #define CONFIG_CMD_DHCP 81 #define CONFIG_CMD_DHCP
82 #define CONFIG_CMD_MII 82 #define CONFIG_CMD_MII
83 #define CONFIG_MII 83 #define CONFIG_MII
84 #define CONFIG_ETHPRIME "FEC" 84 #define CONFIG_ETHPRIME "FEC"
85 85
86 #define CONFIG_FEC_MXC 86 #define CONFIG_FEC_MXC
87 #define CONFIG_FEC_XCV_TYPE RGMII 87 #define CONFIG_FEC_XCV_TYPE RGMII
88 #define CONFIG_FEC_MXC_PHYADDR 0 88 #define CONFIG_FEC_MXC_PHYADDR 0
89 #define FEC_QUIRK_ENET_MAC 89 #define FEC_QUIRK_ENET_MAC
90 90
91 #define CONFIG_PHY_GIGE 91 #define CONFIG_PHY_GIGE
92 #define IMX_FEC_BASE 0x30BE0000 92 #define IMX_FEC_BASE 0x30BE0000
93 93
94 #define CONFIG_PHYLIB 94 #define CONFIG_PHYLIB
95 #define CONFIG_PHY_ATHEROS 95 #define CONFIG_PHY_ATHEROS
96 #endif 96 #endif
97 97
98 #define CONFIG_MFG_ENV_SETTINGS \ 98 #define CONFIG_MFG_ENV_SETTINGS \
99 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ 99 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
100 "rdinit=/linuxrc " \ 100 "rdinit=/linuxrc " \
101 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ 101 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
102 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ 102 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
103 "g_mass_storage.iSerialNumber=\"\" "\ 103 "g_mass_storage.iSerialNumber=\"\" "\
104 "clk_ignore_unused "\ 104 "clk_ignore_unused "\
105 "\0" \ 105 "\0" \
106 "initrd_addr=0x43800000\0" \ 106 "initrd_addr=0x43800000\0" \
107 "initrd_high=0xffffffff\0" \ 107 "initrd_high=0xffffffff\0" \
108 "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ 108 "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
109 /* Initial environment variables */ 109 /* Initial environment variables */
110 #define CONFIG_EXTRA_ENV_SETTINGS \ 110 #define CONFIG_EXTRA_ENV_SETTINGS \
111 CONFIG_MFG_ENV_SETTINGS \ 111 CONFIG_MFG_ENV_SETTINGS \
112 "script=boot.scr\0" \ 112 "script=boot.scr\0" \
113 "image=Image\0" \ 113 "image=Image\0" \
114 "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \ 114 "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
115 "fdt_addr=0x43000000\0" \ 115 "fdt_addr=0x43000000\0" \
116 "fdt_high=0xffffffffffffffff\0" \ 116 "fdt_high=0xffffffffffffffff\0" \
117 "boot_fdt=try\0" \ 117 "boot_fdt=try\0" \
118 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ 118 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
119 "initrd_addr=0x43800000\0" \ 119 "initrd_addr=0x43800000\0" \
120 "initrd_high=0xffffffffffffffff\0" \ 120 "initrd_high=0xffffffffffffffff\0" \
121 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 121 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
122 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 122 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
123 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 123 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
124 "mmcautodetect=yes\0" \ 124 "mmcautodetect=yes\0" \
125 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ 125 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
126 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 126 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
127 "bootscript=echo Running bootscript from mmc ...; " \ 127 "bootscript=echo Running bootscript from mmc ...; " \
128 "source\0" \ 128 "source\0" \
129 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 129 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
130 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 130 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
131 "mmcboot=echo Booting from mmc ...; " \ 131 "mmcboot=echo Booting from mmc ...; " \
132 "run mmcargs; " \ 132 "run mmcargs; " \
133 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 133 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
134 "if run loadfdt; then " \ 134 "if run loadfdt; then " \
135 "booti ${loadaddr} - ${fdt_addr}; " \ 135 "booti ${loadaddr} - ${fdt_addr}; " \
136 "else " \ 136 "else " \
137 "echo WARN: Cannot load the DT; " \ 137 "echo WARN: Cannot load the DT; " \
138 "fi; " \ 138 "fi; " \
139 "else " \ 139 "else " \
140 "echo wait for boot; " \ 140 "echo wait for boot; " \
141 "fi;\0" \ 141 "fi;\0" \
142 "netargs=setenv bootargs console=${console} " \ 142 "netargs=setenv bootargs console=${console} " \
143 "root=/dev/nfs " \ 143 "root=/dev/nfs " \
144 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 144 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
145 "netboot=echo Booting from net ...; " \ 145 "netboot=echo Booting from net ...; " \
146 "run netargs; " \ 146 "run netargs; " \
147 "if test ${ip_dyn} = yes; then " \ 147 "if test ${ip_dyn} = yes; then " \
148 "setenv get_cmd dhcp; " \ 148 "setenv get_cmd dhcp; " \
149 "else " \ 149 "else " \
150 "setenv get_cmd tftp; " \ 150 "setenv get_cmd tftp; " \
151 "fi; " \ 151 "fi; " \
152 "${get_cmd} ${loadaddr} ${image}; " \ 152 "${get_cmd} ${loadaddr} ${image}; " \
153 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 153 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
154 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 154 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
155 "booti ${loadaddr} - ${fdt_addr}; " \ 155 "booti ${loadaddr} - ${fdt_addr}; " \
156 "else " \ 156 "else " \
157 "echo WARN: Cannot load the DT; " \ 157 "echo WARN: Cannot load the DT; " \
158 "fi; " \ 158 "fi; " \
159 "else " \ 159 "else " \
160 "booti; " \ 160 "booti; " \
161 "fi;\0" 161 "fi;\0"
162 162
163 #define CONFIG_BOOTCOMMAND \ 163 #define CONFIG_BOOTCOMMAND \
164 "mmc dev ${mmcdev}; if mmc rescan; then " \ 164 "mmc dev ${mmcdev}; if mmc rescan; then " \
165 "if run loadbootscript; then " \ 165 "if run loadbootscript; then " \
166 "run bootscript; " \ 166 "run bootscript; " \
167 "else " \ 167 "else " \
168 "if run loadimage; then " \ 168 "if run loadimage; then " \
169 "run mmcboot; " \ 169 "run mmcboot; " \
170 "else run netboot; " \ 170 "else run netboot; " \
171 "fi; " \ 171 "fi; " \
172 "fi; " \ 172 "fi; " \
173 "else booti ${loadaddr} - ${fdt_addr}; fi" 173 "else booti ${loadaddr} - ${fdt_addr}; fi"
174 174
175 /* Link Definitions */ 175 /* Link Definitions */
176 #define CONFIG_LOADADDR 0x40480000 176 #define CONFIG_LOADADDR 0x40480000
177 177
178 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 178 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
179 179
180 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 180 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
181 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 181 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
182 #define CONFIG_SYS_INIT_SP_OFFSET \ 182 #define CONFIG_SYS_INIT_SP_OFFSET \
183 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 183 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
184 #define CONFIG_SYS_INIT_SP_ADDR \ 184 #define CONFIG_SYS_INIT_SP_ADDR \
185 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 185 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
186 186
187 #define CONFIG_ENV_OVERWRITE 187 #define CONFIG_ENV_OVERWRITE
188 #if defined(CONFIG_ENV_IS_IN_MMC) 188 #if defined(CONFIG_ENV_IS_IN_MMC)
189 #define CONFIG_ENV_OFFSET (64 * SZ_64K) 189 #define CONFIG_ENV_OFFSET (64 * SZ_64K)
190 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) 190 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
191 #define CONFIG_ENV_OFFSET (4 * 1024 * 1024) 191 #define CONFIG_ENV_OFFSET (4 * 1024 * 1024)
192 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 192 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
193 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 193 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
194 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 194 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
195 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 195 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
196 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 196 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
197 #endif 197 #endif
198 #define CONFIG_ENV_SIZE 0x1000 198 #define CONFIG_ENV_SIZE 0x1000
199 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */ 199 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */
200 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ 200 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
201 201
202 /* Size of malloc() pool */ 202 /* Size of malloc() pool */
203 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024) 203 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024)
204 204
205 #define CONFIG_SYS_SDRAM_BASE 0x40000000 205 #define CONFIG_SYS_SDRAM_BASE 0x40000000
206 #define PHYS_SDRAM 0x40000000 206 #define PHYS_SDRAM 0x40000000
207 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ 207 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
208 #define CONFIG_NR_DRAM_BANKS 1 208 #define CONFIG_NR_DRAM_BANKS 1
209 209
210 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
211 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
212
210 #define CONFIG_BAUDRATE 115200 213 #define CONFIG_BAUDRATE 115200
211 214
212 #define CONFIG_MXC_UART 215 #define CONFIG_MXC_UART
213 #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR 216 #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
214 217
215 /* Monitor Command Prompt */ 218 /* Monitor Command Prompt */
216 #undef CONFIG_SYS_PROMPT 219 #undef CONFIG_SYS_PROMPT
217 #define CONFIG_SYS_PROMPT "u-boot=> " 220 #define CONFIG_SYS_PROMPT "u-boot=> "
218 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 221 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
219 #define CONFIG_SYS_CBSIZE 2048 222 #define CONFIG_SYS_CBSIZE 2048
220 #define CONFIG_SYS_MAXARGS 64 223 #define CONFIG_SYS_MAXARGS 64
221 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 224 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
222 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 225 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
223 sizeof(CONFIG_SYS_PROMPT) + 16) 226 sizeof(CONFIG_SYS_PROMPT) + 16)
224 227
225 #define CONFIG_IMX_BOOTAUX 228 #define CONFIG_IMX_BOOTAUX
226 229
227 /* USDHC */ 230 /* USDHC */
228 #define CONFIG_CMD_MMC 231 #define CONFIG_CMD_MMC
229 #define CONFIG_FSL_ESDHC 232 #define CONFIG_FSL_ESDHC
230 #define CONFIG_FSL_USDHC 233 #define CONFIG_FSL_USDHC
231 234
232 #define CONFIG_SYS_FSL_USDHC_NUM 2 235 #define CONFIG_SYS_FSL_USDHC_NUM 2
233 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 236 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
234 237
235 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 238 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
236 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 239 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
237 240
238 #ifdef CONFIG_FSL_FSPI 241 #ifdef CONFIG_FSL_FSPI
239 #define CONFIG_SF_DEFAULT_BUS 0 242 #define CONFIG_SF_DEFAULT_BUS 0
240 #define CONFIG_SF_DEFAULT_CS 0 243 #define CONFIG_SF_DEFAULT_CS 0
241 #define CONFIG_SF_DEFAULT_SPEED 40000000 244 #define CONFIG_SF_DEFAULT_SPEED 40000000
242 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 245 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
243 #define FSL_FSPI_FLASH_SIZE SZ_32M 246 #define FSL_FSPI_FLASH_SIZE SZ_32M
244 #define FSL_FSPI_FLASH_NUM 1 247 #define FSL_FSPI_FLASH_NUM 1
245 #define FSPI0_BASE_ADDR 0x30bb0000 248 #define FSPI0_BASE_ADDR 0x30bb0000
246 #define FSPI0_AMBA_BASE 0x0 249 #define FSPI0_AMBA_BASE 0x0
247 #define CONFIG_SPI_FLASH_BAR 250 #define CONFIG_SPI_FLASH_BAR
248 #define CONFIG_FSPI_QUAD_SUPPORT 251 #define CONFIG_FSPI_QUAD_SUPPORT
249 252
250 #define CONFIG_SYS_FSL_FSPI_AHB 253 #define CONFIG_SYS_FSL_FSPI_AHB
251 #endif 254 #endif
252 255
253 /* Enable SPI */ 256 /* Enable SPI */
254 #ifndef CONFIG_NAND_MXS 257 #ifndef CONFIG_NAND_MXS
255 #ifndef CONFIG_FSL_FSPI 258 #ifndef CONFIG_FSL_FSPI
256 #ifdef CONFIG_CMD_SF 259 #ifdef CONFIG_CMD_SF
257 #define CONFIG_SPI_FLASH 260 #define CONFIG_SPI_FLASH
258 #define CONFIG_SPI_FLASH_STMICRO 261 #define CONFIG_SPI_FLASH_STMICRO
259 #define CONFIG_MXC_SPI 262 #define CONFIG_MXC_SPI
260 #define CONFIG_SF_DEFAULT_BUS 0 263 #define CONFIG_SF_DEFAULT_BUS 0
261 #define CONFIG_SF_DEFAULT_SPEED 20000000 264 #define CONFIG_SF_DEFAULT_SPEED 20000000
262 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 265 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
263 #endif 266 #endif
264 #endif 267 #endif
265 #endif 268 #endif
266 269
267 #ifdef CONFIG_NAND_MXS 270 #ifdef CONFIG_NAND_MXS
268 #define CONFIG_CMD_NAND_TRIMFFS 271 #define CONFIG_CMD_NAND_TRIMFFS
269 272
270 /* NAND stuff */ 273 /* NAND stuff */
271 #define CONFIG_SYS_MAX_NAND_DEVICE 1 274 #define CONFIG_SYS_MAX_NAND_DEVICE 1
272 #define CONFIG_SYS_NAND_BASE 0x20000000 275 #define CONFIG_SYS_NAND_BASE 0x20000000
273 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 276 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
274 #define CONFIG_SYS_NAND_ONFI_DETECTION 277 #define CONFIG_SYS_NAND_ONFI_DETECTION
275 278
276 /* DMA stuff, needed for GPMI/MXS NAND support */ 279 /* DMA stuff, needed for GPMI/MXS NAND support */
277 #define CONFIG_APBH_DMA 280 #define CONFIG_APBH_DMA
278 #define CONFIG_APBH_DMA_BURST 281 #define CONFIG_APBH_DMA_BURST
279 #define CONFIG_APBH_DMA_BURST8 282 #define CONFIG_APBH_DMA_BURST8
280 #endif 283 #endif
281 284
282 #define CONFIG_MXC_GPIO 285 #define CONFIG_MXC_GPIO
283 286
284 #define CONFIG_MXC_OCOTP 287 #define CONFIG_MXC_OCOTP
285 #define CONFIG_CMD_FUSE 288 #define CONFIG_CMD_FUSE
286 289
287 #ifndef CONFIG_DM_I2C 290 #ifndef CONFIG_DM_I2C
288 #define CONFIG_SYS_I2C 291 #define CONFIG_SYS_I2C
289 #endif 292 #endif
290 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 293 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
291 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 294 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
292 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 295 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
293 #define CONFIG_SYS_I2C_SPEED 100000 296 #define CONFIG_SYS_I2C_SPEED 100000
294 297
295 /* USB configs */ 298 /* USB configs */
296 #ifndef CONFIG_SPL_BUILD 299 #ifndef CONFIG_SPL_BUILD
297 #define CONFIG_CMD_USB 300 #define CONFIG_CMD_USB
298 #define CONFIG_USB_STORAGE 301 #define CONFIG_USB_STORAGE
299 #define CONFIG_USBD_HS 302 #define CONFIG_USBD_HS
300 303
301 #define CONFIG_CMD_USB_MASS_STORAGE 304 #define CONFIG_CMD_USB_MASS_STORAGE
302 #define CONFIG_USB_GADGET_MASS_STORAGE 305 #define CONFIG_USB_GADGET_MASS_STORAGE
303 #define CONFIG_USB_GADGET_DOWNLOAD 306 #define CONFIG_USB_GADGET_DOWNLOAD
304 #define CONFIG_USB_FUNCTION_MASS_STORAGE 307 #define CONFIG_USB_FUNCTION_MASS_STORAGE
305 308
306 #endif 309 #endif
307 310
308 #define CONFIG_USB_GADGET_DUALSPEED 311 #define CONFIG_USB_GADGET_DUALSPEED
309 #define CONFIG_USB_GADGET_VBUS_DRAW 2 312 #define CONFIG_USB_GADGET_VBUS_DRAW 2
310 313
311 #define CONFIG_CI_UDC 314 #define CONFIG_CI_UDC
312 315
313 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 316 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
314 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 317 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
315 318
316 319
317 #define CONFIG_OF_SYSTEM_SETUP 320 #define CONFIG_OF_SYSTEM_SETUP
318 321
319 #endif 322 #endif
320 323