Eric Lee / smarc-uboot

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/*

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/*

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* drivers/mtd/nand.c

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* drivers/mtd/nand.c

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*

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*

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* Overview:

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* Overview:

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* This is the generic MTD driver for NAND flash devices. It should be

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* This is the generic MTD driver for NAND flash devices. It should be

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* capable of working with almost all NAND chips currently available.

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* capable of working with almost all NAND chips currently available.

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*

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*

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* Additional technical information is available on

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* Additional technical information is available on

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* http://www.linux-mtd.infradead.org/doc/nand.html

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* http://www.linux-mtd.infradead.org/doc/nand.html

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*

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*

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* 2002-2006 Thomas Gleixner (tglx@linutronix.de)

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* 2002-2006 Thomas Gleixner (tglx@linutronix.de)

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*

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*

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* Credits:

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* Credits:

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* David Woodhouse for adding multichip support

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* David Woodhouse for adding multichip support

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*

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*

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* Aleph One Ltd. and Toby Churchill Ltd. for supporting the

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* Aleph One Ltd. and Toby Churchill Ltd. for supporting the

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* rework for 2K page size chips

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* rework for 2K page size chips

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*

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*

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* TODO:

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* TODO:

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* Enable cached programming for 2k page size chips

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* Enable cached programming for 2k page size chips

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* Check, if mtd->ecctype should be set to MTD_ECC_HW

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* Check, if mtd->ecctype should be set to MTD_ECC_HW

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* if we have HW ECC support.

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* if we have HW ECC support.

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* BBT table is not serialized, has to be fixed

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* BBT table is not serialized, has to be fixed

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*

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*

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* This program is free software; you can redistribute it and/or modify

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* This program is free software; you can redistribute it and/or modify

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* it under the terms of the GNU General Public License version 2 as

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* it under the terms of the GNU General Public License version 2 as

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* published by the Free Software Foundation.

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* published by the Free Software Foundation.

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*

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*

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*/

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*/

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#ifndef __UBOOT__

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#ifndef __UBOOT__

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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

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#include <linux/module.h>

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#include <linux/module.h>

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#include <linux/delay.h>

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#include <linux/delay.h>

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#include <linux/errno.h>

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#include <linux/errno.h>

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#include <linux/err.h>

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#include <linux/err.h>

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#include <linux/sched.h>

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#include <linux/sched.h>

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#include <linux/slab.h>

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#include <linux/slab.h>

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#include <linux/types.h>

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#include <linux/types.h>

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#include <linux/mtd/mtd.h>

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#include <linux/mtd/mtd.h>

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#include <linux/mtd/nand.h>

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#include <linux/mtd/nand.h>

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#include <linux/mtd/nand_ecc.h>

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#include <linux/mtd/nand_ecc.h>

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#include <linux/mtd/nand_bch.h>

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#include <linux/mtd/nand_bch.h>

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#include <linux/interrupt.h>

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#include <linux/interrupt.h>

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#include <linux/bitops.h>

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#include <linux/bitops.h>

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#include <linux/leds.h>

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#include <linux/leds.h>

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#include <linux/io.h>

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#include <linux/io.h>

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#include <linux/mtd/partitions.h>

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#include <linux/mtd/partitions.h>

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#else

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#else

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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

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#include <common.h>

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#include <common.h>

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#include <malloc.h>

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#include <malloc.h>

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#include <watchdog.h>

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#include <watchdog.h>

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#include <linux/err.h>

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#include <linux/err.h>

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#include <linux/compat.h>

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#include <linux/compat.h>

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#include <linux/mtd/mtd.h>

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#include <linux/mtd/mtd.h>

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#include <linux/mtd/nand.h>

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#include <linux/mtd/nand.h>

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#include <linux/mtd/nand_ecc.h>

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#include <linux/mtd/nand_ecc.h>

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#include <linux/mtd/nand_bch.h>

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#include <linux/mtd/nand_bch.h>

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#ifdef CONFIG_MTD_PARTITIONS

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#ifdef CONFIG_MTD_PARTITIONS

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#include <linux/mtd/partitions.h>

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#include <linux/mtd/partitions.h>

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#endif

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#endif

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#include <asm/io.h>

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#include <asm/io.h>

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#include <asm/errno.h>

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#include <asm/errno.h>

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/*

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/*

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* CONFIG_SYS_NAND_RESET_CNT is used as a timeout mechanism when resetting

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* CONFIG_SYS_NAND_RESET_CNT is used as a timeout mechanism when resetting

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* a flash. NAND flash is initialized prior to interrupts so standard timers

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* a flash. NAND flash is initialized prior to interrupts so standard timers

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* can't be used. CONFIG_SYS_NAND_RESET_CNT should be set to a value

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* can't be used. CONFIG_SYS_NAND_RESET_CNT should be set to a value

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* which is greater than (max NAND reset time / NAND status read time).

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* which is greater than (max NAND reset time / NAND status read time).

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* A conservative default of 200000 (500 us / 25 ns) is used as a default.

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* A conservative default of 200000 (500 us / 25 ns) is used as a default.

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*/

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*/

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#ifndef CONFIG_SYS_NAND_RESET_CNT

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#ifndef CONFIG_SYS_NAND_RESET_CNT

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#define CONFIG_SYS_NAND_RESET_CNT 200000

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#define CONFIG_SYS_NAND_RESET_CNT 200000

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#endif

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#endif

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static bool is_module_text_address(unsigned long addr) {return 0;}

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static bool is_module_text_address(unsigned long addr) {return 0;}

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#endif

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#endif

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/* Define default oob placement schemes for large and small page devices */

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/* Define default oob placement schemes for large and small page devices */

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static struct nand_ecclayout nand_oob_8 = {

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static struct nand_ecclayout nand_oob_8 = {

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.eccbytes = 3,

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.eccbytes = 3,

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.eccpos = {0, 1, 2},

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.eccpos = {0, 1, 2},

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.oobfree = {

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.oobfree = {

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{.offset = 3,

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{.offset = 3,

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.length = 2},

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.length = 2},

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{.offset = 6,

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{.offset = 6,

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.length = 2} }

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.length = 2} }

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};

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};

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static struct nand_ecclayout nand_oob_16 = {

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static struct nand_ecclayout nand_oob_16 = {

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.eccbytes = 6,

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.eccbytes = 6,

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.eccpos = {0, 1, 2, 3, 6, 7},

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.eccpos = {0, 1, 2, 3, 6, 7},

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.oobfree = {

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.oobfree = {

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{.offset = 8,

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{.offset = 8,

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. length = 8} }

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. length = 8} }

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};

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};

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static struct nand_ecclayout nand_oob_64 = {

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static struct nand_ecclayout nand_oob_64 = {

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.eccbytes = 24,

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.eccbytes = 24,

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.eccpos = {

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.eccpos = {

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40, 41, 42, 43, 44, 45, 46, 47,

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40, 41, 42, 43, 44, 45, 46, 47,

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48, 49, 50, 51, 52, 53, 54, 55,

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48, 49, 50, 51, 52, 53, 54, 55,

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56, 57, 58, 59, 60, 61, 62, 63},

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56, 57, 58, 59, 60, 61, 62, 63},

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.oobfree = {

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.oobfree = {

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{.offset = 2,

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{.offset = 2,

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.length = 38} }

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.length = 38} }

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};

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};

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static struct nand_ecclayout nand_oob_128 = {

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static struct nand_ecclayout nand_oob_128 = {

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.eccbytes = 48,

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.eccbytes = 48,

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.eccpos = {

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.eccpos = {

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80, 81, 82, 83, 84, 85, 86, 87,

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80, 81, 82, 83, 84, 85, 86, 87,

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88, 89, 90, 91, 92, 93, 94, 95,

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88, 89, 90, 91, 92, 93, 94, 95,

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96, 97, 98, 99, 100, 101, 102, 103,

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96, 97, 98, 99, 100, 101, 102, 103,

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104, 105, 106, 107, 108, 109, 110, 111,

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104, 105, 106, 107, 108, 109, 110, 111,

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112, 113, 114, 115, 116, 117, 118, 119,

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112, 113, 114, 115, 116, 117, 118, 119,

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120, 121, 122, 123, 124, 125, 126, 127},

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120, 121, 122, 123, 124, 125, 126, 127},

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.oobfree = {

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.oobfree = {

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{.offset = 2,

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{.offset = 2,

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.length = 78} }

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.length = 78} }

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};

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};

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static int nand_get_device(struct mtd_info *mtd, int new_state);

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static int nand_get_device(struct mtd_info *mtd, int new_state);

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static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,

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static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,

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struct mtd_oob_ops *ops);

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struct mtd_oob_ops *ops);

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/*

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/*

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* For devices which display every fart in the system on a separate LED. Is

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* For devices which display every fart in the system on a separate LED. Is

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* compiled away when LED support is disabled.

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* compiled away when LED support is disabled.

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*/

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*/

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DEFINE_LED_TRIGGER(nand_led_trigger);

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DEFINE_LED_TRIGGER(nand_led_trigger);

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static int check_offs_len(struct mtd_info *mtd,

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static int check_offs_len(struct mtd_info *mtd,

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loff_t ofs, uint64_t len)

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loff_t ofs, uint64_t len)

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{

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{

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struct nand_chip *chip = mtd->priv;

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struct nand_chip *chip = mtd->priv;

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int ret = 0;

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int ret = 0;

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/* Start address must align on block boundary */

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/* Start address must align on block boundary */

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if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) {

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if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) {

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pr_debug("%s: unaligned address\n", __func__);

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pr_debug("%s: unaligned address\n", __func__);

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ret = -EINVAL;

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ret = -EINVAL;

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}

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}

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/* Length must align on block boundary */

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/* Length must align on block boundary */

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if (len & ((1ULL << chip->phys_erase_shift) - 1)) {

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if (len & ((1ULL << chip->phys_erase_shift) - 1)) {

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pr_debug("%s: length not block aligned\n", __func__);

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pr_debug("%s: length not block aligned\n", __func__);

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ret = -EINVAL;

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ret = -EINVAL;

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}

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}

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return ret;

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return ret;

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}

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}

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/**

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/**

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* nand_release_device - [GENERIC] release chip

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* nand_release_device - [GENERIC] release chip

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* @mtd: MTD device structure

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* @mtd: MTD device structure

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*

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*

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* Release chip lock and wake up anyone waiting on the device.

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* Release chip lock and wake up anyone waiting on the device.

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*/

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*/

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static void nand_release_device(struct mtd_info *mtd)

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static void nand_release_device(struct mtd_info *mtd)

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{

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{

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struct nand_chip *chip = mtd->priv;

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struct nand_chip *chip = mtd->priv;

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#ifndef __UBOOT__

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#ifndef __UBOOT__

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/* Release the controller and the chip */

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/* Release the controller and the chip */

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spin_lock(&chip->controller->lock);

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spin_lock(&chip->controller->lock);

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chip->controller->active = NULL;

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chip->controller->active = NULL;

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chip->state = FL_READY;

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chip->state = FL_READY;

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wake_up(&chip->controller->wq);

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wake_up(&chip->controller->wq);

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spin_unlock(&chip->controller->lock);

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spin_unlock(&chip->controller->lock);

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#else

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#else

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/* De-select the NAND device */

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/* De-select the NAND device */

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chip->select_chip(mtd, -1);

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chip->select_chip(mtd, -1);

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#endif

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#endif

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}

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}

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/**

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/**

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* nand_read_byte - [DEFAULT] read one byte from the chip

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* nand_read_byte - [DEFAULT] read one byte from the chip

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* @mtd: MTD device structure

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* @mtd: MTD device structure

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*

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*

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* Default read function for 8bit buswidth

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* Default read function for 8bit buswidth

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*/

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*/

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#ifndef __UBOOT__

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#ifndef __UBOOT__

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static uint8_t nand_read_byte(struct mtd_info *mtd)

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static uint8_t nand_read_byte(struct mtd_info *mtd)

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#else

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#else

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uint8_t nand_read_byte(struct mtd_info *mtd)

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uint8_t nand_read_byte(struct mtd_info *mtd)

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#endif

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#endif

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{

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{

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struct nand_chip *chip = mtd->priv;

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struct nand_chip *chip = mtd->priv;

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return readb(chip->IO_ADDR_R);

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return readb(chip->IO_ADDR_R);

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}

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}

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/**

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/**

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* nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip

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* nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip

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* nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip

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* nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip

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* @mtd: MTD device structure

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* @mtd: MTD device structure

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*

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*

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* Default read function for 16bit buswidth with endianness conversion.

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* Default read function for 16bit buswidth with endianness conversion.

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*

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*

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*/

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*/

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static uint8_t nand_read_byte16(struct mtd_info *mtd)

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static uint8_t nand_read_byte16(struct mtd_info *mtd)

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{

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{

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struct nand_chip *chip = mtd->priv;

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struct nand_chip *chip = mtd->priv;

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return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R));

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return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R));

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}

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}

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/**

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/**

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* nand_read_word - [DEFAULT] read one word from the chip

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* nand_read_word - [DEFAULT] read one word from the chip

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* @mtd: MTD device structure

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* @mtd: MTD device structure

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*

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*

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* Default read function for 16bit buswidth without endianness conversion.

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* Default read function for 16bit buswidth without endianness conversion.

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*/

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*/

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static u16 nand_read_word(struct mtd_info *mtd)

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static u16 nand_read_word(struct mtd_info *mtd)

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{

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{

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struct nand_chip *chip = mtd->priv;

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struct nand_chip *chip = mtd->priv;

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return readw(chip->IO_ADDR_R);

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return readw(chip->IO_ADDR_R);

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}

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}

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/**

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/**

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* nand_select_chip - [DEFAULT] control CE line

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* nand_select_chip - [DEFAULT] control CE line

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* @mtd: MTD device structure

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* @mtd: MTD device structure

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* @chipnr: chipnumber to select, -1 for deselect

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* @chipnr: chipnumber to select, -1 for deselect

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*

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*

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* Default select function for 1 chip devices.

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* Default select function for 1 chip devices.

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*/

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*/

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static void nand_select_chip(struct mtd_info *mtd, int chipnr)

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static void nand_select_chip(struct mtd_info *mtd, int chipnr)

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{

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{

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struct nand_chip *chip = mtd->priv;

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struct nand_chip *chip = mtd->priv;

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switch (chipnr) {

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switch (chipnr) {

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case -1:

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case -1:

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chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);

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chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);

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break;

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break;

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case 0:

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case 0:

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break;

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break;

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default:

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default:

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BUG();

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BUG();

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}

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}

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}

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}

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/**

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/**

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* nand_write_byte - [DEFAULT] write single byte to chip

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* nand_write_byte - [DEFAULT] write single byte to chip

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* @mtd: MTD device structure

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* @mtd: MTD device structure

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* @byte: value to write

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* @byte: value to write

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*

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*

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* Default function to write a byte to I/O[7:0]

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* Default function to write a byte to I/O[7:0]

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*/

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*/

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static void nand_write_byte(struct mtd_info *mtd, uint8_t byte)

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static void nand_write_byte(struct mtd_info *mtd, uint8_t byte)

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{

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{

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struct nand_chip *chip = mtd->priv;

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struct nand_chip *chip = mtd->priv;

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chip->write_buf(mtd, &byte, 1);

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chip->write_buf(mtd, &byte, 1);

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}

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}

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/**

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/**

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* nand_write_byte16 - [DEFAULT] write single byte to a chip with width 16

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* nand_write_byte16 - [DEFAULT] write single byte to a chip with width 16

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* @mtd: MTD device structure

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* @mtd: MTD device structure

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* @byte: value to write

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* @byte: value to write

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*

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*

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* Default function to write a byte to I/O[7:0] on a 16-bit wide chip.

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* Default function to write a byte to I/O[7:0] on a 16-bit wide chip.

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*/

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*/

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static void nand_write_byte16(struct mtd_info *mtd, uint8_t byte)

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static void nand_write_byte16(struct mtd_info *mtd, uint8_t byte)

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{

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{

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struct nand_chip *chip = mtd->priv;

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struct nand_chip *chip = mtd->priv;

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uint16_t word = byte;

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uint16_t word = byte;

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272

/*

272

/*

273

* It's not entirely clear what should happen to I/O[15:8] when writing

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* It's not entirely clear what should happen to I/O[15:8] when writing

274

* a byte. The ONFi spec (Revision 3.1; 2012-09-19, Section 2.16) reads:

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* a byte. The ONFi spec (Revision 3.1; 2012-09-19, Section 2.16) reads:

275

*

275

*

276

* When the host supports a 16-bit bus width, only data is

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* When the host supports a 16-bit bus width, only data is

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* transferred at the 16-bit width. All address and command line

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* transferred at the 16-bit width. All address and command line

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* transfers shall use only the lower 8-bits of the data bus. During

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* transfers shall use only the lower 8-bits of the data bus. During

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* command transfers, the host may place any value on the upper

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* command transfers, the host may place any value on the upper

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* 8-bits of the data bus. During address transfers, the host shall

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* 8-bits of the data bus. During address transfers, the host shall

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* set the upper 8-bits of the data bus to 00h.

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* set the upper 8-bits of the data bus to 00h.

282

*

282

*

283

* One user of the write_byte callback is nand_onfi_set_features. The

283

* One user of the write_byte callback is nand_onfi_set_features. The

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* four parameters are specified to be written to I/O[7:0], but this is

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* four parameters are specified to be written to I/O[7:0], but this is

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* neither an address nor a command transfer. Let's assume a 0 on the

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* neither an address nor a command transfer. Let's assume a 0 on the

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* upper I/O lines is OK.

286

* upper I/O lines is OK.

287

*/

287

*/

288

chip->write_buf(mtd, (uint8_t *)&word, 2);

288

chip->write_buf(mtd, (uint8_t *)&word, 2);

289

}

289

}

290

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#if defined(__UBOOT__) && !defined(CONFIG_BLACKFIN)

291

#if defined(__UBOOT__) && !defined(CONFIG_BLACKFIN)

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static void iowrite8_rep(void *addr, const uint8_t *buf, int len)

292

static void iowrite8_rep(void *addr, const uint8_t *buf, int len)

293

{

293

{

294

int i;

294

int i;

295

296

for (i = 0; i < len; i++)

296

for (i = 0; i < len; i++)

297

writeb(buf[i], addr);

297

writeb(buf[i], addr);

298

}

298

}

299

static void ioread8_rep(void *addr, uint8_t *buf, int len)

299

static void ioread8_rep(void *addr, uint8_t *buf, int len)

300

{

300

{

301

int i;

301

int i;

302

303

for (i = 0; i < len; i++)

303

for (i = 0; i < len; i++)

304

buf[i] = readb(addr);

304

buf[i] = readb(addr);

305

}

305

}

306

307

static void ioread16_rep(void *addr, void *buf, int len)

307

static void ioread16_rep(void *addr, void *buf, int len)

308

{

308

{

309

int i;

309

int i;

310

u16 *p = (u16 *) buf;

310

u16 *p = (u16 *) buf;

311

len >>= 1;

311

312

313

for (i = 0; i < len; i++)

312

for (i = 0; i < len; i++)

314

p[i] = readw(addr);

313

p[i] = readw(addr);

315

}

314

}

316

315

317

static void iowrite16_rep(void *addr, void *buf, int len)

316

static void iowrite16_rep(void *addr, void *buf, int len)

318

{

317

{

319

int i;

318

int i;

320

u16 *p = (u16 *) buf;

319

u16 *p = (u16 *) buf;

321

len >>= 1;

322

320

323

for (i = 0; i < len; i++)

321

for (i = 0; i < len; i++)

324

writew(p[i], addr);

322

writew(p[i], addr);

325

}

323

}

326

#endif

324

#endif

327

325

328

/**

326

/**

329

* nand_write_buf - [DEFAULT] write buffer to chip

327

* nand_write_buf - [DEFAULT] write buffer to chip

330

* @mtd: MTD device structure

328

* @mtd: MTD device structure

331

* @buf: data buffer

329

* @buf: data buffer

332

* @len: number of bytes to write

330

* @len: number of bytes to write

333

*

331

*

334

* Default write function for 8bit buswidth.

332

* Default write function for 8bit buswidth.

335

*/

333

*/

336

#ifndef __UBOOT__

334

#ifndef __UBOOT__

337

static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)

335

static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)

338

#else

336

#else

339

void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)

337

void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)

340

#endif

338

#endif

341

{

339

{

342

struct nand_chip *chip = mtd->priv;

340

struct nand_chip *chip = mtd->priv;

343

341

344

iowrite8_rep(chip->IO_ADDR_W, buf, len);

342

iowrite8_rep(chip->IO_ADDR_W, buf, len);

345

}

343

}

346

344

347

/**

345

/**

348

* nand_read_buf - [DEFAULT] read chip data into buffer

346

* nand_read_buf - [DEFAULT] read chip data into buffer

349

* @mtd: MTD device structure

347

* @mtd: MTD device structure

350

* @buf: buffer to store date

348

* @buf: buffer to store date

351

* @len: number of bytes to read

349

* @len: number of bytes to read

352

*

350

*

353

* Default read function for 8bit buswidth.

351

* Default read function for 8bit buswidth.

354

*/

352

*/

355

#ifndef __UBOOT__

353

#ifndef __UBOOT__

356

static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)

354

static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)

357

#else

355

#else

358

void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)

356

void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)

359

#endif

357

#endif

360

{

358

{

361

struct nand_chip *chip = mtd->priv;

359

struct nand_chip *chip = mtd->priv;

362

360

363

ioread8_rep(chip->IO_ADDR_R, buf, len);

361

ioread8_rep(chip->IO_ADDR_R, buf, len);

364

}

362

}

365

363

366

#ifdef __UBOOT__

364

#ifdef __UBOOT__

367

#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)

365

#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)

368

/**

366

/**

369

* nand_verify_buf - [DEFAULT] Verify chip data against buffer

367

* nand_verify_buf - [DEFAULT] Verify chip data against buffer

370

* @mtd: MTD device structure

368

* @mtd: MTD device structure

371

* @buf: buffer containing the data to compare

369

* @buf: buffer containing the data to compare

372

* @len: number of bytes to compare

370

* @len: number of bytes to compare

373

*

371

*

374

* Default verify function for 8bit buswidth.

372

* Default verify function for 8bit buswidth.

375

*/

373

*/

376

static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)

374

static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)

377

{

375

{

378

int i;

376

int i;

379

struct nand_chip *chip = mtd->priv;

377

struct nand_chip *chip = mtd->priv;

380

378

381

for (i = 0; i < len; i++)

379

for (i = 0; i < len; i++)

382

if (buf[i] != readb(chip->IO_ADDR_R))

380

if (buf[i] != readb(chip->IO_ADDR_R))

383

return -EFAULT;

381

return -EFAULT;

384

return 0;

382

return 0;

385

}

383

}

386

384

387

/**

385

/**

388

* nand_verify_buf16 - [DEFAULT] Verify chip data against buffer

386

* nand_verify_buf16 - [DEFAULT] Verify chip data against buffer

389

* @mtd: MTD device structure

387

* @mtd: MTD device structure

390

* @buf: buffer containing the data to compare

388

* @buf: buffer containing the data to compare

391

* @len: number of bytes to compare

389

* @len: number of bytes to compare

392

*

390

*

393

* Default verify function for 16bit buswidth.

391

* Default verify function for 16bit buswidth.

394

*/

392

*/

395

static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)

393

static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)

396

{

394

{

397

int i;

395

int i;

398

struct nand_chip *chip = mtd->priv;

396

struct nand_chip *chip = mtd->priv;

399

u16 *p = (u16 *) buf;

397

u16 *p = (u16 *) buf;

400

len >>= 1;

398

len >>= 1;

401

399

402

for (i = 0; i < len; i++)

400

for (i = 0; i < len; i++)

403

if (p[i] != readw(chip->IO_ADDR_R))

401

if (p[i] != readw(chip->IO_ADDR_R))

404

return -EFAULT;

402

return -EFAULT;

405

403

406

return 0;

404

return 0;

407

}

405

}

408

#endif

406

#endif

409

#endif

407

#endif

410

408

411

/**

409

/**

412

* nand_write_buf16 - [DEFAULT] write buffer to chip

410

* nand_write_buf16 - [DEFAULT] write buffer to chip

413

* @mtd: MTD device structure

411

* @mtd: MTD device structure

414

* @buf: data buffer

412

* @buf: data buffer

415

* @len: number of bytes to write

413

* @len: number of bytes to write

416

*

414

*

417

* Default write function for 16bit buswidth.

415

* Default write function for 16bit buswidth.

418

*/

416

*/

419

#ifndef __UBOOT__

417

#ifndef __UBOOT__

420

static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)

418

static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)

421

#else

419

#else

422

void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)

420

void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)

423

#endif

421

#endif

424

{

422

{

425

struct nand_chip *chip = mtd->priv;

423

struct nand_chip *chip = mtd->priv;

426

u16 *p = (u16 *) buf;

424

u16 *p = (u16 *) buf;

427

425

428

iowrite16_rep(chip->IO_ADDR_W, p, len >> 1);

426

iowrite16_rep(chip->IO_ADDR_W, p, len >> 1);

429

}

427

}

430

428

431

/**

429

/**

432

* nand_read_buf16 - [DEFAULT] read chip data into buffer

430

* nand_read_buf16 - [DEFAULT] read chip data into buffer

433

* @mtd: MTD device structure

431

* @mtd: MTD device structure

434

* @buf: buffer to store date

432

* @buf: buffer to store date

435

* @len: number of bytes to read

433

* @len: number of bytes to read

436

*

434

*

437

* Default read function for 16bit buswidth.

435

* Default read function for 16bit buswidth.

438

*/

436

*/

439

#ifndef __UBOOT__

437

#ifndef __UBOOT__

440

static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)

438

static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)

441

#else

439

#else

442

void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)

440

void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)

443

#endif

441

#endif

444

{

442

{

445

struct nand_chip *chip = mtd->priv;

443

struct nand_chip *chip = mtd->priv;

446

u16 *p = (u16 *) buf;

444

u16 *p = (u16 *) buf;

447

445

448

ioread16_rep(chip->IO_ADDR_R, p, len >> 1);

446

ioread16_rep(chip->IO_ADDR_R, p, len >> 1);

449

}

447

}

450

448

451

/**

449

/**

452

* nand_block_bad - [DEFAULT] Read bad block marker from the chip

450

* nand_block_bad - [DEFAULT] Read bad block marker from the chip

453

* @mtd: MTD device structure

451

* @mtd: MTD device structure

454

* @ofs: offset from device start

452

* @ofs: offset from device start

455

* @getchip: 0, if the chip is already selected

453

* @getchip: 0, if the chip is already selected

456

*

454

*

457

* Check, if the block is bad.

455

* Check, if the block is bad.

458

*/

456

*/

459

static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)

457

static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)

460

{

458

{

461

int page, chipnr, res = 0, i = 0;

459

int page, chipnr, res = 0, i = 0;

462

struct nand_chip *chip = mtd->priv;

460

struct nand_chip *chip = mtd->priv;

463

u16 bad;

461

u16 bad;

464

462

465

if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)

463

if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)

466

ofs += mtd->erasesize - mtd->writesize;

464

ofs += mtd->erasesize - mtd->writesize;

467

465

468

page = (int)(ofs >> chip->page_shift) & chip->pagemask;

466

page = (int)(ofs >> chip->page_shift) & chip->pagemask;

469

467

470

if (getchip) {

468

if (getchip) {

471

chipnr = (int)(ofs >> chip->chip_shift);

469

chipnr = (int)(ofs >> chip->chip_shift);

472

470

473

nand_get_device(mtd, FL_READING);

471

nand_get_device(mtd, FL_READING);

474

472

475

/* Select the NAND device */

473

/* Select the NAND device */

476

chip->select_chip(mtd, chipnr);

474

chip->select_chip(mtd, chipnr);

477

}

475

}

478

476

479

do {

477

do {

480

if (chip->options & NAND_BUSWIDTH_16) {

478

if (chip->options & NAND_BUSWIDTH_16) {

481

chip->cmdfunc(mtd, NAND_CMD_READOOB,

479

chip->cmdfunc(mtd, NAND_CMD_READOOB,

482

chip->badblockpos & 0xFE, page);

480

chip->badblockpos & 0xFE, page);

483

bad = cpu_to_le16(chip->read_word(mtd));

481

bad = cpu_to_le16(chip->read_word(mtd));

484

if (chip->badblockpos & 0x1)

482

if (chip->badblockpos & 0x1)

485

bad >>= 8;

483

bad >>= 8;

486

else

484

else

487

bad &= 0xFF;

485

bad &= 0xFF;

488

} else {

486

} else {

489

chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos,

487

chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos,

490

page);

488

page);

491

bad = chip->read_byte(mtd);

489

bad = chip->read_byte(mtd);

492

}

490

}

493

491

494

if (likely(chip->badblockbits == 8))

492

if (likely(chip->badblockbits == 8))

495

res = bad != 0xFF;

493

res = bad != 0xFF;

496

else

494

else

497

res = hweight8(bad) < chip->badblockbits;

495

res = hweight8(bad) < chip->badblockbits;

498

ofs += mtd->writesize;

496

ofs += mtd->writesize;

499

page = (int)(ofs >> chip->page_shift) & chip->pagemask;

497

page = (int)(ofs >> chip->page_shift) & chip->pagemask;

500

i++;

498

i++;

501

} while (!res && i < 2 && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE));

499

} while (!res && i < 2 && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE));

502

500

503

if (getchip) {

501

if (getchip) {

504

chip->select_chip(mtd, -1);

502

chip->select_chip(mtd, -1);

505

nand_release_device(mtd);

503

nand_release_device(mtd);

506

}

504

}

507

505

508

return res;

506

return res;

509

}

507

}

510

508

511

/**

509

/**

512

* nand_default_block_markbad - [DEFAULT] mark a block bad via bad block marker

510

* nand_default_block_markbad - [DEFAULT] mark a block bad via bad block marker

513

* @mtd: MTD device structure

511

* @mtd: MTD device structure

514

* @ofs: offset from device start

512

* @ofs: offset from device start

515

*

513

*

516

* This is the default implementation, which can be overridden by a hardware

514

* This is the default implementation, which can be overridden by a hardware

517

* specific driver. It provides the details for writing a bad block marker to a

515

* specific driver. It provides the details for writing a bad block marker to a

518

* block.

516

* block.

519

*/

517

*/

520

static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)

518

static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)

521

{

519

{

522

struct nand_chip *chip = mtd->priv;

520

struct nand_chip *chip = mtd->priv;

523

struct mtd_oob_ops ops;

521

struct mtd_oob_ops ops;

524

uint8_t buf[2] = { 0, 0 };

522

uint8_t buf[2] = { 0, 0 };

525

int ret = 0, res, i = 0;

523

int ret = 0, res, i = 0;

526

524

527

ops.datbuf = NULL;

525

ops.datbuf = NULL;

528

ops.oobbuf = buf;

526

ops.oobbuf = buf;

529

ops.ooboffs = chip->badblockpos;

527

ops.ooboffs = chip->badblockpos;

530

if (chip->options & NAND_BUSWIDTH_16) {

528

if (chip->options & NAND_BUSWIDTH_16) {

531

ops.ooboffs &= ~0x01;

529

ops.ooboffs &= ~0x01;

532

ops.len = ops.ooblen = 2;

530

ops.len = ops.ooblen = 2;

533

} else {

531

} else {

534

ops.len = ops.ooblen = 1;

532

ops.len = ops.ooblen = 1;

535

}

533

}

536

ops.mode = MTD_OPS_PLACE_OOB;

534

ops.mode = MTD_OPS_PLACE_OOB;

537

535

538

/* Write to first/last page(s) if necessary */

536

/* Write to first/last page(s) if necessary */

539

if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)

537

if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)

540

ofs += mtd->erasesize - mtd->writesize;

538

ofs += mtd->erasesize - mtd->writesize;

541

do {

539

do {

542

res = nand_do_write_oob(mtd, ofs, &ops);

540

res = nand_do_write_oob(mtd, ofs, &ops);

543

if (!ret)

541

if (!ret)

544

ret = res;

542

ret = res;

545

543

546

i++;

544

i++;

547

ofs += mtd->writesize;

545

ofs += mtd->writesize;

548

} while ((chip->bbt_options & NAND_BBT_SCAN2NDPAGE) && i < 2);

546

} while ((chip->bbt_options & NAND_BBT_SCAN2NDPAGE) && i < 2);

549

547

550

return ret;

548

return ret;

551

}

549

}

552

550

553

/**

551

/**

554

* nand_block_markbad_lowlevel - mark a block bad

552

* nand_block_markbad_lowlevel - mark a block bad

555

* @mtd: MTD device structure

553

* @mtd: MTD device structure

556

* @ofs: offset from device start

554

* @ofs: offset from device start

557

*

555

*

558

* This function performs the generic NAND bad block marking steps (i.e., bad

556

* This function performs the generic NAND bad block marking steps (i.e., bad

559

* block table(s) and/or marker(s)). We only allow the hardware driver to

557

* block table(s) and/or marker(s)). We only allow the hardware driver to

560

* specify how to write bad block markers to OOB (chip->block_markbad).

558

* specify how to write bad block markers to OOB (chip->block_markbad).

561

*

559

*

562

* We try operations in the following order:

560

* We try operations in the following order:

563

* (1) erase the affected block, to allow OOB marker to be written cleanly

561

* (1) erase the affected block, to allow OOB marker to be written cleanly

564

* (2) write bad block marker to OOB area of affected block (unless flag

562

* (2) write bad block marker to OOB area of affected block (unless flag

565

* NAND_BBT_NO_OOB_BBM is present)

563

* NAND_BBT_NO_OOB_BBM is present)

566

* (3) update the BBT

564

* (3) update the BBT

567

* Note that we retain the first error encountered in (2) or (3), finish the

565

* Note that we retain the first error encountered in (2) or (3), finish the

568

* procedures, and dump the error in the end.

566

* procedures, and dump the error in the end.

569

*/

567

*/

570

static int nand_block_markbad_lowlevel(struct mtd_info *mtd, loff_t ofs)

568

static int nand_block_markbad_lowlevel(struct mtd_info *mtd, loff_t ofs)

571

{

569

{

572

struct nand_chip *chip = mtd->priv;

570

struct nand_chip *chip = mtd->priv;

573

int res, ret = 0;

571

int res, ret = 0;

574

572

575

if (!(chip->bbt_options & NAND_BBT_NO_OOB_BBM)) {

573

if (!(chip->bbt_options & NAND_BBT_NO_OOB_BBM)) {

576

struct erase_info einfo;

574

struct erase_info einfo;

577

575

578

/* Attempt erase before marking OOB */

576

/* Attempt erase before marking OOB */

579

memset(&einfo, 0, sizeof(einfo));

577

memset(&einfo, 0, sizeof(einfo));

580

einfo.mtd = mtd;

578

einfo.mtd = mtd;

581

einfo.addr = ofs;

579

einfo.addr = ofs;

582

einfo.len = 1ULL << chip->phys_erase_shift;

580

einfo.len = 1ULL << chip->phys_erase_shift;

583

nand_erase_nand(mtd, &einfo, 0);

581

nand_erase_nand(mtd, &einfo, 0);

584

582

585

/* Write bad block marker to OOB */

583

/* Write bad block marker to OOB */

586

nand_get_device(mtd, FL_WRITING);

584

nand_get_device(mtd, FL_WRITING);

587

ret = chip->block_markbad(mtd, ofs);

585

ret = chip->block_markbad(mtd, ofs);

588

nand_release_device(mtd);

586

nand_release_device(mtd);

589

}

587

}

590

588

591

/* Mark block bad in BBT */

589

/* Mark block bad in BBT */

592

if (chip->bbt) {

590

if (chip->bbt) {

593

res = nand_markbad_bbt(mtd, ofs);

591

res = nand_markbad_bbt(mtd, ofs);

594

if (!ret)

592

if (!ret)

595

ret = res;

593

ret = res;

596

}

594

}

597

595

598

if (!ret)

596

if (!ret)

599

mtd->ecc_stats.badblocks++;

597

mtd->ecc_stats.badblocks++;

600

598

601

return ret;

599

return ret;

602

}

600

}

603

601

604

/**

602

/**

605

* nand_check_wp - [GENERIC] check if the chip is write protected

603

* nand_check_wp - [GENERIC] check if the chip is write protected

606

* @mtd: MTD device structure

604

* @mtd: MTD device structure

607

*

605

*

608

* Check, if the device is write protected. The function expects, that the

606

* Check, if the device is write protected. The function expects, that the

609

* device is already selected.

607

* device is already selected.

610

*/

608

*/

611

static int nand_check_wp(struct mtd_info *mtd)

609

static int nand_check_wp(struct mtd_info *mtd)

612

{

610

{

613

struct nand_chip *chip = mtd->priv;

611

struct nand_chip *chip = mtd->priv;

614

612

615

/* Broken xD cards report WP despite being writable */

613

/* Broken xD cards report WP despite being writable */

616

if (chip->options & NAND_BROKEN_XD)

614

if (chip->options & NAND_BROKEN_XD)

617

return 0;

615

return 0;

618

616

619

/* Check the WP bit */

617

/* Check the WP bit */

620

chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);

618

chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);

621

return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;

619

return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;

622

}

620

}

623

621

624

/**

622

/**

625

* nand_block_checkbad - [GENERIC] Check if a block is marked bad

623

* nand_block_checkbad - [GENERIC] Check if a block is marked bad

626

* @mtd: MTD device structure

624

* @mtd: MTD device structure

627

* @ofs: offset from device start

625

* @ofs: offset from device start

628

* @getchip: 0, if the chip is already selected

626

* @getchip: 0, if the chip is already selected

629

* @allowbbt: 1, if its allowed to access the bbt area

627

* @allowbbt: 1, if its allowed to access the bbt area

630

*

628

*

631

* Check, if the block is bad. Either by reading the bad block table or

629

* Check, if the block is bad. Either by reading the bad block table or

632

* calling of the scan function.

630

* calling of the scan function.

633

*/

631

*/

634

static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip,

632

static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip,

635

int allowbbt)

633

int allowbbt)

636

{

634

{

637

struct nand_chip *chip = mtd->priv;

635

struct nand_chip *chip = mtd->priv;

638

636

639

if (!chip->bbt)

637

if (!chip->bbt)

640

return chip->block_bad(mtd, ofs, getchip);

638

return chip->block_bad(mtd, ofs, getchip);

641

639

642

/* Return info from the table */

640

/* Return info from the table */

643

return nand_isbad_bbt(mtd, ofs, allowbbt);

641

return nand_isbad_bbt(mtd, ofs, allowbbt);

644

}

642

}

645

643

646

#ifndef __UBOOT__

644

#ifndef __UBOOT__

647

/**

645

/**

648

* panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands.

646

* panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands.

649

* @mtd: MTD device structure

647

* @mtd: MTD device structure

650

* @timeo: Timeout

648

* @timeo: Timeout

651

*

649

*

652

* Helper function for nand_wait_ready used when needing to wait in interrupt

650

* Helper function for nand_wait_ready used when needing to wait in interrupt

653

* context.

651

* context.

654

*/

652

*/

655

static void panic_nand_wait_ready(struct mtd_info *mtd, unsigned long timeo)

653

static void panic_nand_wait_ready(struct mtd_info *mtd, unsigned long timeo)

656

{

654

{

657

struct nand_chip *chip = mtd->priv;

655

struct nand_chip *chip = mtd->priv;

658

int i;

656

int i;

659

657

660

/* Wait for the device to get ready */

658

/* Wait for the device to get ready */

661

for (i = 0; i < timeo; i++) {

659

for (i = 0; i < timeo; i++) {

662

if (chip->dev_ready(mtd))

660

if (chip->dev_ready(mtd))

663

break;

661

break;

664

touch_softlockup_watchdog();

662

touch_softlockup_watchdog();

665

mdelay(1);

663

mdelay(1);

666

}

664

}

667

}

665

}

668

#endif

666

#endif

669

667

670

/* Wait for the ready pin, after a command. The timeout is caught later. */

668

/* Wait for the ready pin, after a command. The timeout is caught later. */

671

void nand_wait_ready(struct mtd_info *mtd)

669

void nand_wait_ready(struct mtd_info *mtd)

672

{

670

{

673

struct nand_chip *chip = mtd->priv;

671

struct nand_chip *chip = mtd->priv;

674

#ifndef __UBOOT__

672

#ifndef __UBOOT__

675

unsigned long timeo = jiffies + msecs_to_jiffies(20);

673

unsigned long timeo = jiffies + msecs_to_jiffies(20);

676

674

677

/* 400ms timeout */

675

/* 400ms timeout */

678

if (in_interrupt() || oops_in_progress)

676

if (in_interrupt() || oops_in_progress)

679

return panic_nand_wait_ready(mtd, 400);

677

return panic_nand_wait_ready(mtd, 400);

680

678

681

led_trigger_event(nand_led_trigger, LED_FULL);

679

led_trigger_event(nand_led_trigger, LED_FULL);

682

/* Wait until command is processed or timeout occurs */

680

/* Wait until command is processed or timeout occurs */

683

do {

681

do {

684

if (chip->dev_ready(mtd))

682

if (chip->dev_ready(mtd))

685

break;

683

break;

686

touch_softlockup_watchdog();

684

touch_softlockup_watchdog();

687

} while (time_before(jiffies, timeo));

685

} while (time_before(jiffies, timeo));

688

led_trigger_event(nand_led_trigger, LED_OFF);

686

led_trigger_event(nand_led_trigger, LED_OFF);

689

#else

687

#else

690

u32 timeo = (CONFIG_SYS_HZ * 20) / 1000;

688

u32 timeo = (CONFIG_SYS_HZ * 20) / 1000;

691

u32 time_start;

689

u32 time_start;

692

690

693

time_start = get_timer(0);

691

time_start = get_timer(0);

694

/* Wait until command is processed or timeout occurs */

692

/* Wait until command is processed or timeout occurs */

695

while (get_timer(time_start) < timeo) {

693

while (get_timer(time_start) < timeo) {

696

if (chip->dev_ready)

694

if (chip->dev_ready)

697

if (chip->dev_ready(mtd))

695

if (chip->dev_ready(mtd))

698

break;

696

break;

699

}

697

}

700

#endif

698

#endif

701

}

699

}

702

EXPORT_SYMBOL_GPL(nand_wait_ready);

700

EXPORT_SYMBOL_GPL(nand_wait_ready);

703

701

704

/**

702

/**

705

* nand_command - [DEFAULT] Send command to NAND device

703

* nand_command - [DEFAULT] Send command to NAND device

706

* @mtd: MTD device structure

704

* @mtd: MTD device structure

707

* @command: the command to be sent

705

* @command: the command to be sent

708

* @column: the column address for this command, -1 if none

706

* @column: the column address for this command, -1 if none

709

* @page_addr: the page address for this command, -1 if none

707

* @page_addr: the page address for this command, -1 if none

710

*

708

*

711

* Send command to NAND device. This function is used for small page devices

709

* Send command to NAND device. This function is used for small page devices

712

* (512 Bytes per page).

710

* (512 Bytes per page).

713

*/

711

*/

714

static void nand_command(struct mtd_info *mtd, unsigned int command,

712

static void nand_command(struct mtd_info *mtd, unsigned int command,

715

int column, int page_addr)

713

int column, int page_addr)

716

{

714

{

717

register struct nand_chip *chip = mtd->priv;

715

register struct nand_chip *chip = mtd->priv;

718

int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;

716

int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;

719

uint32_t rst_sts_cnt = CONFIG_SYS_NAND_RESET_CNT;

717

uint32_t rst_sts_cnt = CONFIG_SYS_NAND_RESET_CNT;

720

718

721

/* Write out the command to the device */

719

/* Write out the command to the device */

722

if (command == NAND_CMD_SEQIN) {

720

if (command == NAND_CMD_SEQIN) {

723

int readcmd;

721

int readcmd;

724

722

725

if (column >= mtd->writesize) {

723

if (column >= mtd->writesize) {

726

/* OOB area */

724

/* OOB area */

727

column -= mtd->writesize;

725

column -= mtd->writesize;

728

readcmd = NAND_CMD_READOOB;

726

readcmd = NAND_CMD_READOOB;

729

} else if (column < 256) {

727

} else if (column < 256) {

730

/* First 256 bytes --> READ0 */

728

/* First 256 bytes --> READ0 */

731

readcmd = NAND_CMD_READ0;

729

readcmd = NAND_CMD_READ0;

732

} else {

730

} else {

733

column -= 256;

731

column -= 256;

734

readcmd = NAND_CMD_READ1;

732

readcmd = NAND_CMD_READ1;

735

}

733

}

736

chip->cmd_ctrl(mtd, readcmd, ctrl);

734

chip->cmd_ctrl(mtd, readcmd, ctrl);

737

ctrl &= ~NAND_CTRL_CHANGE;

735

ctrl &= ~NAND_CTRL_CHANGE;

738

}

736

}

739

chip->cmd_ctrl(mtd, command, ctrl);

737

chip->cmd_ctrl(mtd, command, ctrl);

740

738

741

/* Address cycle, when necessary */

739

/* Address cycle, when necessary */

742

ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE;

740

ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE;

743

/* Serially input address */

741

/* Serially input address */

744

if (column != -1) {

742

if (column != -1) {

745

/* Adjust columns for 16 bit buswidth */

743

/* Adjust columns for 16 bit buswidth */

746

if (chip->options & NAND_BUSWIDTH_16 &&

744

if (chip->options & NAND_BUSWIDTH_16 &&

747

!nand_opcode_8bits(command))

745

!nand_opcode_8bits(command))

748

column >>= 1;

746

column >>= 1;

749

chip->cmd_ctrl(mtd, column, ctrl);

747

chip->cmd_ctrl(mtd, column, ctrl);

750

ctrl &= ~NAND_CTRL_CHANGE;

748

ctrl &= ~NAND_CTRL_CHANGE;

751

}

749

}

752

if (page_addr != -1) {

750

if (page_addr != -1) {

753

chip->cmd_ctrl(mtd, page_addr, ctrl);

751

chip->cmd_ctrl(mtd, page_addr, ctrl);

754

ctrl &= ~NAND_CTRL_CHANGE;

752

ctrl &= ~NAND_CTRL_CHANGE;

755

chip->cmd_ctrl(mtd, page_addr >> 8, ctrl);

753

chip->cmd_ctrl(mtd, page_addr >> 8, ctrl);

756

/* One more address cycle for devices > 32MiB */

754

/* One more address cycle for devices > 32MiB */

757

if (chip->chipsize > (32 << 20))

755

if (chip->chipsize > (32 << 20))

758

chip->cmd_ctrl(mtd, page_addr >> 16, ctrl);

756

chip->cmd_ctrl(mtd, page_addr >> 16, ctrl);

759

}

757

}

760

chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);

758

chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);

761

759

762

/*

760

/*

763

* Program and erase have their own busy handlers status and sequential

761

* Program and erase have their own busy handlers status and sequential

764

* in needs no delay

762

* in needs no delay

765

*/

763

*/

766

switch (command) {

764

switch (command) {

767

765

768

case NAND_CMD_PAGEPROG:

766

case NAND_CMD_PAGEPROG:

769

case NAND_CMD_ERASE1:

767

case NAND_CMD_ERASE1:

770

case NAND_CMD_ERASE2:

768

case NAND_CMD_ERASE2:

771

case NAND_CMD_SEQIN:

769

case NAND_CMD_SEQIN:

772

case NAND_CMD_STATUS:

770

case NAND_CMD_STATUS:

773

return;

771

return;

774

772

775

case NAND_CMD_RESET:

773

case NAND_CMD_RESET:

776

if (chip->dev_ready)

774

if (chip->dev_ready)

777

break;

775

break;

778

udelay(chip->chip_delay);

776

udelay(chip->chip_delay);

779

chip->cmd_ctrl(mtd, NAND_CMD_STATUS,

777

chip->cmd_ctrl(mtd, NAND_CMD_STATUS,

780

NAND_CTRL_CLE | NAND_CTRL_CHANGE);

778

NAND_CTRL_CLE | NAND_CTRL_CHANGE);

781

chip->cmd_ctrl(mtd,

779

chip->cmd_ctrl(mtd,

782

NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);

780

NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);

783

while (!(chip->read_byte(mtd) & NAND_STATUS_READY) &&

781

while (!(chip->read_byte(mtd) & NAND_STATUS_READY) &&

784

(rst_sts_cnt--));

782

(rst_sts_cnt--));

785

return;

783

return;

786

784

787

/* This applies to read commands */

785

/* This applies to read commands */

788

default:

786

default:

789

/*

787

/*

790

* If we don't have access to the busy pin, we apply the given

788

* If we don't have access to the busy pin, we apply the given

791

* command delay

789

* command delay

792

*/

790

*/

793

if (!chip->dev_ready) {

791

if (!chip->dev_ready) {

794

udelay(chip->chip_delay);

792

udelay(chip->chip_delay);

795

return;

793

return;

796

}

794

}

797

}

795

}

798

/*

796

/*

799

* Apply this short delay always to ensure that we do wait tWB in

797

* Apply this short delay always to ensure that we do wait tWB in

800

* any case on any machine.

798

* any case on any machine.

801

*/

799

*/

802

ndelay(100);

800

ndelay(100);

803

801

804

nand_wait_ready(mtd);

802

nand_wait_ready(mtd);

805

}

803

}

806

804

807

/**

805

/**

808

* nand_command_lp - [DEFAULT] Send command to NAND large page device

806

* nand_command_lp - [DEFAULT] Send command to NAND large page device

809

* @mtd: MTD device structure

807

* @mtd: MTD device structure

810

* @command: the command to be sent

808

* @command: the command to be sent

811

* @column: the column address for this command, -1 if none

809

* @column: the column address for this command, -1 if none

812

* @page_addr: the page address for this command, -1 if none

810

* @page_addr: the page address for this command, -1 if none

813

*

811

*

814

* Send command to NAND device. This is the version for the new large page

812

* Send command to NAND device. This is the version for the new large page

815

* devices. We don't have the separate regions as we have in the small page

813

* devices. We don't have the separate regions as we have in the small page

816

* devices. We must emulate NAND_CMD_READOOB to keep the code compatible.

814

* devices. We must emulate NAND_CMD_READOOB to keep the code compatible.

817

*/

815

*/

818

static void nand_command_lp(struct mtd_info *mtd, unsigned int command,

816

static void nand_command_lp(struct mtd_info *mtd, unsigned int command,

819

int column, int page_addr)

817

int column, int page_addr)

820

{

818

{

821

register struct nand_chip *chip = mtd->priv;

819

register struct nand_chip *chip = mtd->priv;

822

uint32_t rst_sts_cnt = CONFIG_SYS_NAND_RESET_CNT;

820

uint32_t rst_sts_cnt = CONFIG_SYS_NAND_RESET_CNT;

823

821

824

/* Emulate NAND_CMD_READOOB */

822

/* Emulate NAND_CMD_READOOB */

825

if (command == NAND_CMD_READOOB) {

823

if (command == NAND_CMD_READOOB) {

826

column += mtd->writesize;

824

column += mtd->writesize;

827

command = NAND_CMD_READ0;

825

command = NAND_CMD_READ0;

828

}

826

}

829

827

830

/* Command latch cycle */

828

/* Command latch cycle */

831

chip->cmd_ctrl(mtd, command, NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);

829

chip->cmd_ctrl(mtd, command, NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);

832

830

833

if (column != -1 || page_addr != -1) {

831

if (column != -1 || page_addr != -1) {

834

int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE;

832

int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE;

835

833

836

/* Serially input address */

834

/* Serially input address */

837

if (column != -1) {

835

if (column != -1) {

838

/* Adjust columns for 16 bit buswidth */

836

/* Adjust columns for 16 bit buswidth */

839

if (chip->options & NAND_BUSWIDTH_16 &&

837

if (chip->options & NAND_BUSWIDTH_16 &&

840

!nand_opcode_8bits(command))

838

!nand_opcode_8bits(command))

841

column >>= 1;

839

column >>= 1;

842

chip->cmd_ctrl(mtd, column, ctrl);

840

chip->cmd_ctrl(mtd, column, ctrl);

843

ctrl &= ~NAND_CTRL_CHANGE;

841

ctrl &= ~NAND_CTRL_CHANGE;

844

chip->cmd_ctrl(mtd, column >> 8, ctrl);

842

chip->cmd_ctrl(mtd, column >> 8, ctrl);

845

}

843

}

846

if (page_addr != -1) {

844

if (page_addr != -1) {

847

chip->cmd_ctrl(mtd, page_addr, ctrl);

845

chip->cmd_ctrl(mtd, page_addr, ctrl);

848

chip->cmd_ctrl(mtd, page_addr >> 8,

846

chip->cmd_ctrl(mtd, page_addr >> 8,

849

NAND_NCE | NAND_ALE);

847

NAND_NCE | NAND_ALE);

850

/* One more address cycle for devices > 128MiB */

848

/* One more address cycle for devices > 128MiB */

851

if (chip->chipsize > (128 << 20))

849

if (chip->chipsize > (128 << 20))

852

chip->cmd_ctrl(mtd, page_addr >> 16,

850

chip->cmd_ctrl(mtd, page_addr >> 16,

853

NAND_NCE | NAND_ALE);

851

NAND_NCE | NAND_ALE);

854

}

852

}

855

}

853

}

856

chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);

854

chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);

857

855

858

/*

856

/*

859

* Program and erase have their own busy handlers status, sequential

857

* Program and erase have their own busy handlers status, sequential

860

* in, and deplete1 need no delay.

858

* in, and deplete1 need no delay.

861

*/

859

*/

862

switch (command) {

860

switch (command) {

863

861

864

case NAND_CMD_CACHEDPROG:

862

case NAND_CMD_CACHEDPROG:

865

case NAND_CMD_PAGEPROG:

863

case NAND_CMD_PAGEPROG:

866

case NAND_CMD_ERASE1:

864

case NAND_CMD_ERASE1:

867

case NAND_CMD_ERASE2:

865

case NAND_CMD_ERASE2:

868

case NAND_CMD_SEQIN:

866

case NAND_CMD_SEQIN:

869

case NAND_CMD_RNDIN:

867

case NAND_CMD_RNDIN:

870

case NAND_CMD_STATUS:

868

case NAND_CMD_STATUS:

871

return;

869

return;

872

870

873

case NAND_CMD_RESET:

871

case NAND_CMD_RESET:

874

if (chip->dev_ready)

872

if (chip->dev_ready)

875

break;

873

break;

876

udelay(chip->chip_delay);

874

udelay(chip->chip_delay);

877

chip->cmd_ctrl(mtd, NAND_CMD_STATUS,

875

chip->cmd_ctrl(mtd, NAND_CMD_STATUS,

878

NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);

876

NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);

879

chip->cmd_ctrl(mtd, NAND_CMD_NONE,

877

chip->cmd_ctrl(mtd, NAND_CMD_NONE,

880

NAND_NCE | NAND_CTRL_CHANGE);

878

NAND_NCE | NAND_CTRL_CHANGE);

881

while (!(chip->read_byte(mtd) & NAND_STATUS_READY) &&

879

while (!(chip->read_byte(mtd) & NAND_STATUS_READY) &&

882

(rst_sts_cnt--));

880

(rst_sts_cnt--));

883

return;

881

return;

884

882

885

case NAND_CMD_RNDOUT:

883

case NAND_CMD_RNDOUT:

886

/* No ready / busy check necessary */

884

/* No ready / busy check necessary */

887

chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,

885

chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,

888

NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);

886

NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);

889

chip->cmd_ctrl(mtd, NAND_CMD_NONE,

887

chip->cmd_ctrl(mtd, NAND_CMD_NONE,

890

NAND_NCE | NAND_CTRL_CHANGE);

888

NAND_NCE | NAND_CTRL_CHANGE);

891

return;

889

return;

892

890

893

case NAND_CMD_READ0:

891

case NAND_CMD_READ0:

894

chip->cmd_ctrl(mtd, NAND_CMD_READSTART,

892

chip->cmd_ctrl(mtd, NAND_CMD_READSTART,

895

NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);

893

NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);

896

chip->cmd_ctrl(mtd, NAND_CMD_NONE,

894

chip->cmd_ctrl(mtd, NAND_CMD_NONE,

897

NAND_NCE | NAND_CTRL_CHANGE);

895

NAND_NCE | NAND_CTRL_CHANGE);

898

896

899

/* This applies to read commands */

897

/* This applies to read commands */

900

default:

898

default:

901

/*

899

/*

902

* If we don't have access to the busy pin, we apply the given

900

* If we don't have access to the busy pin, we apply the given

903

* command delay.

901

* command delay.

904

*/

902

*/

905

if (!chip->dev_ready) {

903

if (!chip->dev_ready) {

906

udelay(chip->chip_delay);

904

udelay(chip->chip_delay);

907

return;

905

return;

908

}

906

}

909

}

907

}

910

908

911

/*

909

/*

912

* Apply this short delay always to ensure that we do wait tWB in

910

* Apply this short delay always to ensure that we do wait tWB in

913

* any case on any machine.

911

* any case on any machine.

914

*/

912

*/

915

ndelay(100);

913

ndelay(100);

916

914

917

nand_wait_ready(mtd);

915

nand_wait_ready(mtd);

918

}

916

}

919

917

920

/**

918

/**

921

* panic_nand_get_device - [GENERIC] Get chip for selected access

919

* panic_nand_get_device - [GENERIC] Get chip for selected access

922

* @chip: the nand chip descriptor

920

* @chip: the nand chip descriptor

923

* @mtd: MTD device structure

921

* @mtd: MTD device structure

924

* @new_state: the state which is requested

922

* @new_state: the state which is requested

925

*

923

*

926

* Used when in panic, no locks are taken.

924

* Used when in panic, no locks are taken.

927

*/

925

*/

928

static void panic_nand_get_device(struct nand_chip *chip,

926

static void panic_nand_get_device(struct nand_chip *chip,

929

struct mtd_info *mtd, int new_state)

927

struct mtd_info *mtd, int new_state)

930

{

928

{

931

/* Hardware controller shared among independent devices */

929

/* Hardware controller shared among independent devices */

932

chip->controller->active = chip;

930

chip->controller->active = chip;

933

chip->state = new_state;

931

chip->state = new_state;

934

}

932

}

935

933

936

/**

934

/**

937

* nand_get_device - [GENERIC] Get chip for selected access

935

* nand_get_device - [GENERIC] Get chip for selected access

938

* @mtd: MTD device structure

936

* @mtd: MTD device structure

939

* @new_state: the state which is requested

937

* @new_state: the state which is requested

940

*

938

*

941

* Get the device and lock it for exclusive access

939

* Get the device and lock it for exclusive access

942

*/

940

*/

943

static int

941

static int

944

nand_get_device(struct mtd_info *mtd, int new_state)

942

nand_get_device(struct mtd_info *mtd, int new_state)

945

{

943

{

946

struct nand_chip *chip = mtd->priv;

944

struct nand_chip *chip = mtd->priv;

947

#ifndef __UBOOT__

945

#ifndef __UBOOT__

948

spinlock_t *lock = &chip->controller->lock;

946

spinlock_t *lock = &chip->controller->lock;

949

wait_queue_head_t *wq = &chip->controller->wq;

947

wait_queue_head_t *wq = &chip->controller->wq;

950

DECLARE_WAITQUEUE(wait, current);

948

DECLARE_WAITQUEUE(wait, current);

951

retry:

949

retry:

952

spin_lock(lock);

950

spin_lock(lock);

953

951

954

/* Hardware controller shared among independent devices */

952

/* Hardware controller shared among independent devices */

955

if (!chip->controller->active)

953

if (!chip->controller->active)

956

chip->controller->active = chip;

954

chip->controller->active = chip;

957

955

958

if (chip->controller->active == chip && chip->state == FL_READY) {

956

if (chip->controller->active == chip && chip->state == FL_READY) {

959

chip->state = new_state;

957

chip->state = new_state;

960

spin_unlock(lock);

958

spin_unlock(lock);

961

return 0;

959

return 0;

962

}

960

}

963

if (new_state == FL_PM_SUSPENDED) {

961

if (new_state == FL_PM_SUSPENDED) {

964

if (chip->controller->active->state == FL_PM_SUSPENDED) {

962

if (chip->controller->active->state == FL_PM_SUSPENDED) {

965

chip->state = FL_PM_SUSPENDED;

963

chip->state = FL_PM_SUSPENDED;

966

spin_unlock(lock);

964

spin_unlock(lock);

967

return 0;

965

return 0;

968

}

966

}

969

}

967

}

970

set_current_state(TASK_UNINTERRUPTIBLE);

968

set_current_state(TASK_UNINTERRUPTIBLE);

971

add_wait_queue(wq, &wait);

969

add_wait_queue(wq, &wait);

972

spin_unlock(lock);

970

spin_unlock(lock);

973

schedule();

971

schedule();

974

remove_wait_queue(wq, &wait);

972

remove_wait_queue(wq, &wait);

975

goto retry;

973

goto retry;

976

#else

974

#else

977

chip->state = new_state;

975

chip->state = new_state;

978

return 0;

976

return 0;

979

#endif

977

#endif

980

}

978

}

981

979

982

/**

980

/**

983

* panic_nand_wait - [GENERIC] wait until the command is done

981

* panic_nand_wait - [GENERIC] wait until the command is done

984

* @mtd: MTD device structure

982

* @mtd: MTD device structure

985

* @chip: NAND chip structure

983

* @chip: NAND chip structure

986

* @timeo: timeout

984

* @timeo: timeout

987

*

985

*

988

* Wait for command done. This is a helper function for nand_wait used when

986

* Wait for command done. This is a helper function for nand_wait used when

989

* we are in interrupt context. May happen when in panic and trying to write

987

* we are in interrupt context. May happen when in panic and trying to write

990

* an oops through mtdoops.

988

* an oops through mtdoops.

991

*/

989

*/

992

static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip,

990

static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip,

993

unsigned long timeo)

991

unsigned long timeo)

994

{

992

{

995

int i;

993

int i;

996

for (i = 0; i < timeo; i++) {

994

for (i = 0; i < timeo; i++) {

997

if (chip->dev_ready) {

995

if (chip->dev_ready) {

998

if (chip->dev_ready(mtd))

996

if (chip->dev_ready(mtd))

999

break;

997

break;

1000

} else {

998

} else {

1001

if (chip->read_byte(mtd) & NAND_STATUS_READY)

999

if (chip->read_byte(mtd) & NAND_STATUS_READY)

1002

break;

1000

break;

1003

}

1001

}

1004

mdelay(1);

1002

mdelay(1);

1005

}

1003

}

1006

}

1004

}

1007

1005

1008

/**

1006

/**

1009

* nand_wait - [DEFAULT] wait until the command is done

1007

* nand_wait - [DEFAULT] wait until the command is done

1010

* @mtd: MTD device structure

1008

* @mtd: MTD device structure

1011

* @chip: NAND chip structure

1009

* @chip: NAND chip structure

1012

*

1010

*

1013

* Wait for command done. This applies to erase and program only. Erase can

1011

* Wait for command done. This applies to erase and program only. Erase can

1014

* take up to 400ms and program up to 20ms according to general NAND and

1012

* take up to 400ms and program up to 20ms according to general NAND and

1015

* SmartMedia specs.

1013

* SmartMedia specs.

1016

*/

1014

*/

1017

static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)

1015

static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)

1018

{

1016

{

1019

1017

1020

int status, state = chip->state;

1018

int status, state = chip->state;

1021

unsigned long timeo = (state == FL_ERASING ? 400 : 20);

1019

unsigned long timeo = (state == FL_ERASING ? 400 : 20);

1022

1020

1023

led_trigger_event(nand_led_trigger, LED_FULL);

1021

led_trigger_event(nand_led_trigger, LED_FULL);

1024

1022

1025

/*

1023

/*

1026

* Apply this short delay always to ensure that we do wait tWB in any

1024

* Apply this short delay always to ensure that we do wait tWB in any

1027

* case on any machine.

1025

* case on any machine.

1028

*/

1026

*/

1029

ndelay(100);

1027

ndelay(100);

1030

1028

1031

chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);

1029

chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);

1032

1030

1033

#ifndef __UBOOT__

1031

#ifndef __UBOOT__

1034

if (in_interrupt() || oops_in_progress)

1032

if (in_interrupt() || oops_in_progress)

1035

panic_nand_wait(mtd, chip, timeo);

1033

panic_nand_wait(mtd, chip, timeo);

1036

else {

1034

else {

1037

timeo = jiffies + msecs_to_jiffies(timeo);

1035

timeo = jiffies + msecs_to_jiffies(timeo);

1038

while (time_before(jiffies, timeo)) {

1036

while (time_before(jiffies, timeo)) {

1039

if (chip->dev_ready) {

1037

if (chip->dev_ready) {

1040

if (chip->dev_ready(mtd))

1038

if (chip->dev_ready(mtd))

1041

break;

1039

break;

1042

} else {

1040

} else {

1043

if (chip->read_byte(mtd) & NAND_STATUS_READY)

1041

if (chip->read_byte(mtd) & NAND_STATUS_READY)

1044

break;

1042

break;

1045

}

1043

}

1046

cond_resched();

1044

cond_resched();

1047

}

1045

}

1048

}

1046

}

1049

#else

1047

#else

1050

u32 timer = (CONFIG_SYS_HZ * timeo) / 1000;

1048

u32 timer = (CONFIG_SYS_HZ * timeo) / 1000;

1051

u32 time_start;

1049

u32 time_start;

1052

1050

1053

time_start = get_timer(0);

1051

time_start = get_timer(0);

1054

while (get_timer(time_start) < timer) {

1052

while (get_timer(time_start) < timer) {

1055

if (chip->dev_ready) {

1053

if (chip->dev_ready) {

1056

if (chip->dev_ready(mtd))

1054

if (chip->dev_ready(mtd))

1057

break;

1055

break;

1058

} else {

1056

} else {

1059

if (chip->read_byte(mtd) & NAND_STATUS_READY)

1057

if (chip->read_byte(mtd) & NAND_STATUS_READY)

1060

break;

1058

break;

1061

}

1059

}

1062

}

1060

}

1063

#endif

1061

#endif

1064

#ifdef PPCHAMELON_NAND_TIMER_HACK

1062

#ifdef PPCHAMELON_NAND_TIMER_HACK

1065

time_start = get_timer(0);

1063

time_start = get_timer(0);

1066

while (get_timer(time_start) < 10)

1064

while (get_timer(time_start) < 10)

1067

;

1065

;

1068

#endif /* PPCHAMELON_NAND_TIMER_HACK */

1066

#endif /* PPCHAMELON_NAND_TIMER_HACK */

1069

led_trigger_event(nand_led_trigger, LED_OFF);

1067

led_trigger_event(nand_led_trigger, LED_OFF);

1070

1068

1071

status = (int)chip->read_byte(mtd);

1069

status = (int)chip->read_byte(mtd);

1072

/* This can happen if in case of timeout or buggy dev_ready */

1070

/* This can happen if in case of timeout or buggy dev_ready */

1073

WARN_ON(!(status & NAND_STATUS_READY));

1071

WARN_ON(!(status & NAND_STATUS_READY));

1074

return status;

1072

return status;

1075

}

1073

}

1076

1074

1077

#ifndef __UBOOT__

1075

#ifndef __UBOOT__

1078

/**

1076

/**

1079

* __nand_unlock - [REPLACEABLE] unlocks specified locked blocks

1077

* __nand_unlock - [REPLACEABLE] unlocks specified locked blocks

1080

* @mtd: mtd info

1078

* @mtd: mtd info

1081

* @ofs: offset to start unlock from

1079

* @ofs: offset to start unlock from

1082

* @len: length to unlock

1080

* @len: length to unlock

1083

* @invert: when = 0, unlock the range of blocks within the lower and

1081

* @invert: when = 0, unlock the range of blocks within the lower and

1084

* upper boundary address

1082

* upper boundary address

1085

* when = 1, unlock the range of blocks outside the boundaries

1083

* when = 1, unlock the range of blocks outside the boundaries

1086

* of the lower and upper boundary address

1084

* of the lower and upper boundary address

1087

*

1085

*

1088

* Returs unlock status.

1086

* Returs unlock status.

1089

*/

1087

*/

1090

static int __nand_unlock(struct mtd_info *mtd, loff_t ofs,

1088

static int __nand_unlock(struct mtd_info *mtd, loff_t ofs,

1091

uint64_t len, int invert)

1089

uint64_t len, int invert)

1092

{

1090

{

1093

int ret = 0;

1091

int ret = 0;

1094

int status, page;

1092

int status, page;

1095

struct nand_chip *chip = mtd->priv;

1093

struct nand_chip *chip = mtd->priv;

1096

1094

1097

/* Submit address of first page to unlock */

1095

/* Submit address of first page to unlock */

1098

page = ofs >> chip->page_shift;

1096

page = ofs >> chip->page_shift;

1099

chip->cmdfunc(mtd, NAND_CMD_UNLOCK1, -1, page & chip->pagemask);

1097

chip->cmdfunc(mtd, NAND_CMD_UNLOCK1, -1, page & chip->pagemask);

1100

1098

1101

/* Submit address of last page to unlock */

1099

/* Submit address of last page to unlock */

1102

page = (ofs + len) >> chip->page_shift;

1100

page = (ofs + len) >> chip->page_shift;

1103

chip->cmdfunc(mtd, NAND_CMD_UNLOCK2, -1,

1101

chip->cmdfunc(mtd, NAND_CMD_UNLOCK2, -1,

1104

(page | invert) & chip->pagemask);

1102

(page | invert) & chip->pagemask);

1105

1103

1106

/* Call wait ready function */

1104

/* Call wait ready function */

1107

status = chip->waitfunc(mtd, chip);

1105

status = chip->waitfunc(mtd, chip);

1108

/* See if device thinks it succeeded */

1106

/* See if device thinks it succeeded */

1109

if (status & NAND_STATUS_FAIL) {

1107

if (status & NAND_STATUS_FAIL) {

1110

pr_debug("%s: error status = 0x%08x\n",

1108

pr_debug("%s: error status = 0x%08x\n",

1111

__func__, status);

1109

__func__, status);

1112

ret = -EIO;

1110

ret = -EIO;

1113

}

1111

}

1114

1112

1115

return ret;

1113

return ret;

1116

}

1114

}

1117

1115

1118

/**

1116

/**

1119

* nand_unlock - [REPLACEABLE] unlocks specified locked blocks

1117

* nand_unlock - [REPLACEABLE] unlocks specified locked blocks

1120

* @mtd: mtd info

1118

* @mtd: mtd info

1121

* @ofs: offset to start unlock from

1119

* @ofs: offset to start unlock from

1122

* @len: length to unlock

1120

* @len: length to unlock

1123

*

1121

*

1124

* Returns unlock status.

1122

* Returns unlock status.

1125

*/

1123

*/

1126

int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)

1124

int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)

1127

{

1125

{

1128

int ret = 0;

1126

int ret = 0;

1129

int chipnr;

1127

int chipnr;

1130

struct nand_chip *chip = mtd->priv;

1128

struct nand_chip *chip = mtd->priv;

1131

1129

1132

pr_debug("%s: start = 0x%012llx, len = %llu\n",

1130

pr_debug("%s: start = 0x%012llx, len = %llu\n",

1133

__func__, (unsigned long long)ofs, len);

1131

__func__, (unsigned long long)ofs, len);

1134

1132

1135

if (check_offs_len(mtd, ofs, len))

1133

if (check_offs_len(mtd, ofs, len))

1136

ret = -EINVAL;

1134

ret = -EINVAL;

1137

1135

1138

/* Align to last block address if size addresses end of the device */

1136

/* Align to last block address if size addresses end of the device */

1139

if (ofs + len == mtd->size)

1137

if (ofs + len == mtd->size)

1140

len -= mtd->erasesize;

1138

len -= mtd->erasesize;

1141

1139

1142

nand_get_device(mtd, FL_UNLOCKING);

1140

nand_get_device(mtd, FL_UNLOCKING);

1143

1141

1144

/* Shift to get chip number */

1142

/* Shift to get chip number */

1145

chipnr = ofs >> chip->chip_shift;

1143

chipnr = ofs >> chip->chip_shift;

1146

1144

1147

chip->select_chip(mtd, chipnr);

1145

chip->select_chip(mtd, chipnr);

1148

1146

1149

/* Check, if it is write protected */

1147

/* Check, if it is write protected */

1150

if (nand_check_wp(mtd)) {

1148

if (nand_check_wp(mtd)) {

1151

pr_debug("%s: device is write protected!\n",

1149

pr_debug("%s: device is write protected!\n",

1152

__func__);

1150

__func__);

1153

ret = -EIO;

1151

ret = -EIO;

1154

goto out;

1152

goto out;

1155

}

1153

}

1156

1154

1157

ret = __nand_unlock(mtd, ofs, len, 0);

1155

ret = __nand_unlock(mtd, ofs, len, 0);

1158

1156

1159

out:

1157

out:

1160

chip->select_chip(mtd, -1);

1158

chip->select_chip(mtd, -1);

1161

nand_release_device(mtd);

1159

nand_release_device(mtd);

1162

1160

1163

return ret;

1161

return ret;

1164

}

1162

}

1165

EXPORT_SYMBOL(nand_unlock);

1163

EXPORT_SYMBOL(nand_unlock);

1166

1164

1167

/**

1165

/**

1168

* nand_lock - [REPLACEABLE] locks all blocks present in the device

1166

* nand_lock - [REPLACEABLE] locks all blocks present in the device

1169

* @mtd: mtd info

1167

* @mtd: mtd info

1170

* @ofs: offset to start unlock from

1168

* @ofs: offset to start unlock from

1171

* @len: length to unlock

1169

* @len: length to unlock

1172

*

1170

*

1173

* This feature is not supported in many NAND parts. 'Micron' NAND parts do

1171

* This feature is not supported in many NAND parts. 'Micron' NAND parts do

1174

* have this feature, but it allows only to lock all blocks, not for specified

1172

* have this feature, but it allows only to lock all blocks, not for specified

1175

* range for block. Implementing 'lock' feature by making use of 'unlock', for

1173

* range for block. Implementing 'lock' feature by making use of 'unlock', for

1176

* now.

1174

* now.

1177

*

1175

*

1178

* Returns lock status.

1176

* Returns lock status.

1179

*/

1177

*/

1180

int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)

1178

int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)

1181

{

1179

{

1182

int ret = 0;

1180

int ret = 0;

1183

int chipnr, status, page;

1181

int chipnr, status, page;

1184

struct nand_chip *chip = mtd->priv;

1182

struct nand_chip *chip = mtd->priv;

1185

1183

1186

pr_debug("%s: start = 0x%012llx, len = %llu\n",

1184

pr_debug("%s: start = 0x%012llx, len = %llu\n",

1187

__func__, (unsigned long long)ofs, len);

1185

__func__, (unsigned long long)ofs, len);

1188

1186

1189

if (check_offs_len(mtd, ofs, len))

1187

if (check_offs_len(mtd, ofs, len))

1190

ret = -EINVAL;

1188

ret = -EINVAL;

1191

1189

1192

nand_get_device(mtd, FL_LOCKING);

1190

nand_get_device(mtd, FL_LOCKING);

1193

1191

1194

/* Shift to get chip number */

1192

/* Shift to get chip number */

1195

chipnr = ofs >> chip->chip_shift;

1193

chipnr = ofs >> chip->chip_shift;

1196

1194

1197

chip->select_chip(mtd, chipnr);

1195

chip->select_chip(mtd, chipnr);

1198

1196

1199

/* Check, if it is write protected */

1197

/* Check, if it is write protected */

1200

if (nand_check_wp(mtd)) {

1198

if (nand_check_wp(mtd)) {

1201

pr_debug("%s: device is write protected!\n",

1199

pr_debug("%s: device is write protected!\n",

1202

__func__);

1200

__func__);

1203

status = MTD_ERASE_FAILED;

1201

status = MTD_ERASE_FAILED;

1204

ret = -EIO;

1202

ret = -EIO;

1205

goto out;

1203

goto out;

1206

}

1204

}

1207

1205

1208

/* Submit address of first page to lock */

1206

/* Submit address of first page to lock */

1209

page = ofs >> chip->page_shift;

1207

page = ofs >> chip->page_shift;

1210

chip->cmdfunc(mtd, NAND_CMD_LOCK, -1, page & chip->pagemask);

1208

chip->cmdfunc(mtd, NAND_CMD_LOCK, -1, page & chip->pagemask);

1211

1209

1212

/* Call wait ready function */

1210

/* Call wait ready function */

1213

status = chip->waitfunc(mtd, chip);

1211

status = chip->waitfunc(mtd, chip);

1214

/* See if device thinks it succeeded */

1212

/* See if device thinks it succeeded */

1215

if (status & NAND_STATUS_FAIL) {

1213

if (status & NAND_STATUS_FAIL) {

1216

pr_debug("%s: error status = 0x%08x\n",

1214

pr_debug("%s: error status = 0x%08x\n",

1217

__func__, status);

1215

__func__, status);

1218

ret = -EIO;

1216

ret = -EIO;

1219

goto out;

1217

goto out;

1220

}

1218

}

1221

1219

1222

ret = __nand_unlock(mtd, ofs, len, 0x1);

1220

ret = __nand_unlock(mtd, ofs, len, 0x1);

1223

1221

1224

out:

1222

out:

1225

chip->select_chip(mtd, -1);

1223

chip->select_chip(mtd, -1);

1226

nand_release_device(mtd);

1224

nand_release_device(mtd);

1227

1225

1228

return ret;

1226

return ret;

1229

}

1227

}

1230

EXPORT_SYMBOL(nand_lock);

1228

EXPORT_SYMBOL(nand_lock);

1231

#endif

1229

#endif

1232

1230

1233

/**

1231

/**

1234

* nand_read_page_raw - [INTERN] read raw page data without ecc

1232

* nand_read_page_raw - [INTERN] read raw page data without ecc

1235

* @mtd: mtd info structure

1233

* @mtd: mtd info structure

1236

* @chip: nand chip info structure

1234

* @chip: nand chip info structure

1237

* @buf: buffer to store read data

1235

* @buf: buffer to store read data

1238

* @oob_required: caller requires OOB data read to chip->oob_poi

1236

* @oob_required: caller requires OOB data read to chip->oob_poi

1239

* @page: page number to read

1237

* @page: page number to read

1240

*

1238

*

1241

* Not for syndrome calculating ECC controllers, which use a special oob layout.

1239

* Not for syndrome calculating ECC controllers, which use a special oob layout.

1242

*/

1240

*/

1243

static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,

1241

static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,

1244

uint8_t *buf, int oob_required, int page)

1242

uint8_t *buf, int oob_required, int page)

1245

{

1243

{

1246

chip->read_buf(mtd, buf, mtd->writesize);

1244

chip->read_buf(mtd, buf, mtd->writesize);

1247

if (oob_required)

1245

if (oob_required)

1248

chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);

1246

chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);

1249

return 0;

1247

return 0;

1250

}

1248

}

1251

1249

1252

/**

1250

/**

1253

* nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc

1251

* nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc

1254

* @mtd: mtd info structure

1252

* @mtd: mtd info structure

1255

* @chip: nand chip info structure

1253

* @chip: nand chip info structure

1256

* @buf: buffer to store read data

1254

* @buf: buffer to store read data

1257

* @oob_required: caller requires OOB data read to chip->oob_poi

1255

* @oob_required: caller requires OOB data read to chip->oob_poi

1258

* @page: page number to read

1256

* @page: page number to read

1259

*

1257

*

1260

* We need a special oob layout and handling even when OOB isn't used.

1258

* We need a special oob layout and handling even when OOB isn't used.

1261

*/

1259

*/

1262

static int nand_read_page_raw_syndrome(struct mtd_info *mtd,

1260

static int nand_read_page_raw_syndrome(struct mtd_info *mtd,

1263

struct nand_chip *chip, uint8_t *buf,

1261

struct nand_chip *chip, uint8_t *buf,

1264

int oob_required, int page)

1262

int oob_required, int page)

1265

{

1263

{

1266

int eccsize = chip->ecc.size;

1264

int eccsize = chip->ecc.size;

1267

int eccbytes = chip->ecc.bytes;

1265

int eccbytes = chip->ecc.bytes;

1268

uint8_t *oob = chip->oob_poi;

1266

uint8_t *oob = chip->oob_poi;

1269

int steps, size;

1267

int steps, size;

1270

1268

1271

for (steps = chip->ecc.steps; steps > 0; steps--) {

1269

for (steps = chip->ecc.steps; steps > 0; steps--) {

1272

chip->read_buf(mtd, buf, eccsize);

1270

chip->read_buf(mtd, buf, eccsize);

1273

buf += eccsize;

1271

buf += eccsize;

1274

1272

1275

if (chip->ecc.prepad) {

1273

if (chip->ecc.prepad) {

1276

chip->read_buf(mtd, oob, chip->ecc.prepad);

1274

chip->read_buf(mtd, oob, chip->ecc.prepad);

1277

oob += chip->ecc.prepad;

1275

oob += chip->ecc.prepad;

1278

}

1276

}

1279

1277

1280

chip->read_buf(mtd, oob, eccbytes);

1278

chip->read_buf(mtd, oob, eccbytes);

1281

oob += eccbytes;

1279

oob += eccbytes;

1282

1280

1283

if (chip->ecc.postpad) {

1281

if (chip->ecc.postpad) {

1284

chip->read_buf(mtd, oob, chip->ecc.postpad);

1282

chip->read_buf(mtd, oob, chip->ecc.postpad);

1285

oob += chip->ecc.postpad;

1283

oob += chip->ecc.postpad;

1286

}

1284

}

1287

}

1285

}

1288

1286

1289

size = mtd->oobsize - (oob - chip->oob_poi);

1287

size = mtd->oobsize - (oob - chip->oob_poi);

1290

if (size)

1288

if (size)

1291

chip->read_buf(mtd, oob, size);

1289

chip->read_buf(mtd, oob, size);

1292

1290

1293

return 0;

1291

return 0;

1294

}

1292

}

1295

1293

1296

/**

1294

/**

1297

* nand_read_page_swecc - [REPLACEABLE] software ECC based page read function

1295

* nand_read_page_swecc - [REPLACEABLE] software ECC based page read function

1298

* @mtd: mtd info structure

1296

* @mtd: mtd info structure

1299

* @chip: nand chip info structure

1297

* @chip: nand chip info structure

1300

* @buf: buffer to store read data

1298

* @buf: buffer to store read data

1301

* @oob_required: caller requires OOB data read to chip->oob_poi

1299

* @oob_required: caller requires OOB data read to chip->oob_poi

1302

* @page: page number to read

1300

* @page: page number to read

1303

*/

1301

*/

1304

static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,

1302

static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,

1305

uint8_t *buf, int oob_required, int page)

1303

uint8_t *buf, int oob_required, int page)

1306

{

1304

{

1307

int i, eccsize = chip->ecc.size;

1305

int i, eccsize = chip->ecc.size;

1308

int eccbytes = chip->ecc.bytes;

1306

int eccbytes = chip->ecc.bytes;

1309

int eccsteps = chip->ecc.steps;

1307

int eccsteps = chip->ecc.steps;

1310

uint8_t *p = buf;

1308

uint8_t *p = buf;

1311

uint8_t *ecc_calc = chip->buffers->ecccalc;

1309

uint8_t *ecc_calc = chip->buffers->ecccalc;

1312

uint8_t *ecc_code = chip->buffers->ecccode;

1310

uint8_t *ecc_code = chip->buffers->ecccode;

1313

uint32_t *eccpos = chip->ecc.layout->eccpos;

1311

uint32_t *eccpos = chip->ecc.layout->eccpos;

1314

unsigned int max_bitflips = 0;

1312

unsigned int max_bitflips = 0;

1315

1313

1316

chip->ecc.read_page_raw(mtd, chip, buf, 1, page);

1314

chip->ecc.read_page_raw(mtd, chip, buf, 1, page);

1317

1315

1318

for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)

1316

for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)

1319

chip->ecc.calculate(mtd, p, &ecc_calc[i]);

1317

chip->ecc.calculate(mtd, p, &ecc_calc[i]);

1320

1318

1321

for (i = 0; i < chip->ecc.total; i++)

1319

for (i = 0; i < chip->ecc.total; i++)

1322

ecc_code[i] = chip->oob_poi[eccpos[i]];

1320

ecc_code[i] = chip->oob_poi[eccpos[i]];

1323

1321

1324

eccsteps = chip->ecc.steps;

1322

eccsteps = chip->ecc.steps;

1325

p = buf;

1323

p = buf;

1326

1324

1327

for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {

1325

for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {

1328

int stat;

1326

int stat;

1329

1327

1330

stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);

1328

stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);

1331

if (stat < 0) {

1329

if (stat < 0) {

1332

mtd->ecc_stats.failed++;

1330

mtd->ecc_stats.failed++;

1333

} else {

1331

} else {

1334

mtd->ecc_stats.corrected += stat;

1332

mtd->ecc_stats.corrected += stat;

1335

max_bitflips = max_t(unsigned int, max_bitflips, stat);

1333

max_bitflips = max_t(unsigned int, max_bitflips, stat);

1336

}

1334

}

1337

}

1335

}

1338

return max_bitflips;

1336

return max_bitflips;

1339

}

1337

}

1340

1338

1341

/**

1339

/**

1342

* nand_read_subpage - [REPLACEABLE] ECC based sub-page read function

1340

* nand_read_subpage - [REPLACEABLE] ECC based sub-page read function

1343

* @mtd: mtd info structure

1341

* @mtd: mtd info structure

1344

* @chip: nand chip info structure

1342

* @chip: nand chip info structure

1345

* @data_offs: offset of requested data within the page

1343

* @data_offs: offset of requested data within the page

1346

* @readlen: data length

1344

* @readlen: data length

1347

* @bufpoi: buffer to store read data

1345

* @bufpoi: buffer to store read data

1348

* @page: page number to read

1346

* @page: page number to read

1349

*/

1347

*/

1350

static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,

1348

static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,

1351

uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi,

1349

uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi,

1352

int page)

1350

int page)

1353

{

1351

{

1354

int start_step, end_step, num_steps;

1352

int start_step, end_step, num_steps;

1355

uint32_t *eccpos = chip->ecc.layout->eccpos;

1353

uint32_t *eccpos = chip->ecc.layout->eccpos;

1356

uint8_t *p;

1354

uint8_t *p;

1357

int data_col_addr, i, gaps = 0;

1355

int data_col_addr, i, gaps = 0;

1358

int datafrag_len, eccfrag_len, aligned_len, aligned_pos;

1356

int datafrag_len, eccfrag_len, aligned_len, aligned_pos;

1359

int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;

1357

int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;

1360

int index;

1358

int index;

1361

unsigned int max_bitflips = 0;

1359

unsigned int max_bitflips = 0;

1362

1360

1363

/* Column address within the page aligned to ECC size (256bytes) */

1361

/* Column address within the page aligned to ECC size (256bytes) */

1364

start_step = data_offs / chip->ecc.size;

1362

start_step = data_offs / chip->ecc.size;

1365

end_step = (data_offs + readlen - 1) / chip->ecc.size;

1363

end_step = (data_offs + readlen - 1) / chip->ecc.size;

1366

num_steps = end_step - start_step + 1;

1364

num_steps = end_step - start_step + 1;

1367

index = start_step * chip->ecc.bytes;

1365

index = start_step * chip->ecc.bytes;

1368

1366

1369

/* Data size aligned to ECC ecc.size */

1367

/* Data size aligned to ECC ecc.size */

1370

datafrag_len = num_steps * chip->ecc.size;

1368

datafrag_len = num_steps * chip->ecc.size;

1371

eccfrag_len = num_steps * chip->ecc.bytes;

1369

eccfrag_len = num_steps * chip->ecc.bytes;

1372

1370

1373

data_col_addr = start_step * chip->ecc.size;

1371

data_col_addr = start_step * chip->ecc.size;

1374

/* If we read not a page aligned data */

1372

/* If we read not a page aligned data */

1375

if (data_col_addr != 0)

1373

if (data_col_addr != 0)

1376

chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);

1374

chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);

1377

1375

1378

p = bufpoi + data_col_addr;

1376

p = bufpoi + data_col_addr;

1379

chip->read_buf(mtd, p, datafrag_len);

1377

chip->read_buf(mtd, p, datafrag_len);

1380

1378

1381

/* Calculate ECC */

1379

/* Calculate ECC */

1382

for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)

1380

for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)

1383

chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]);

1381

chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]);

1384

1382

1385

/*

1383

/*

1386

* The performance is faster if we position offsets according to

1384

* The performance is faster if we position offsets according to

1387

* ecc.pos. Let's make sure that there are no gaps in ECC positions.

1385

* ecc.pos. Let's make sure that there are no gaps in ECC positions.

1388

*/

1386

*/

1389

for (i = 0; i < eccfrag_len - 1; i++) {

1387

for (i = 0; i < eccfrag_len - 1; i++) {

1390

if (eccpos[i + start_step * chip->ecc.bytes] + 1 !=

1388

if (eccpos[i + start_step * chip->ecc.bytes] + 1 !=

1391

eccpos[i + start_step * chip->ecc.bytes + 1]) {

1389

eccpos[i + start_step * chip->ecc.bytes + 1]) {

1392

gaps = 1;

1390

gaps = 1;

1393

break;

1391

break;

1394

}

1392

}

1395

}

1393

}

1396

if (gaps) {

1394

if (gaps) {

1397

chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);

1395

chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);

1398

chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);

1396

chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);

1399

} else {

1397

} else {

1400

/*

1398

/*

1401

* Send the command to read the particular ECC bytes take care

1399

* Send the command to read the particular ECC bytes take care

1402

* about buswidth alignment in read_buf.

1400

* about buswidth alignment in read_buf.

1403

*/

1401

*/

1404

aligned_pos = eccpos[index] & ~(busw - 1);

1402

aligned_pos = eccpos[index] & ~(busw - 1);

1405

aligned_len = eccfrag_len;

1403

aligned_len = eccfrag_len;

1406

if (eccpos[index] & (busw - 1))

1404

if (eccpos[index] & (busw - 1))

1407

aligned_len++;

1405

aligned_len++;

1408

if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1))

1406

if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1))

1409

aligned_len++;

1407

aligned_len++;

1410

1408

1411

chip->cmdfunc(mtd, NAND_CMD_RNDOUT,

1409

chip->cmdfunc(mtd, NAND_CMD_RNDOUT,

1412

mtd->writesize + aligned_pos, -1);

1410

mtd->writesize + aligned_pos, -1);

1413

chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len);

1411

chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len);

1414

}

1412

}

1415

1413

1416

for (i = 0; i < eccfrag_len; i++)

1414

for (i = 0; i < eccfrag_len; i++)

1417

chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + index]];

1415

chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + index]];

1418

1416

1419

p = bufpoi + data_col_addr;

1417

p = bufpoi + data_col_addr;

1420

for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) {

1418

for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) {

1421

int stat;

1419

int stat;

1422

1420

1423

stat = chip->ecc.correct(mtd, p,

1421

stat = chip->ecc.correct(mtd, p,

1424

&chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]);

1422

&chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]);

1425

if (stat < 0) {

1423

if (stat < 0) {

1426

mtd->ecc_stats.failed++;

1424

mtd->ecc_stats.failed++;

1427

} else {

1425

} else {

1428

mtd->ecc_stats.corrected += stat;

1426

mtd->ecc_stats.corrected += stat;

1429

max_bitflips = max_t(unsigned int, max_bitflips, stat);

1427

max_bitflips = max_t(unsigned int, max_bitflips, stat);

1430

}

1428

}

1431

}

1429

}

1432

return max_bitflips;

1430

return max_bitflips;

1433

}

1431

}

1434

1432

1435

/**

1433

/**

1436

* nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function

1434

* nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function

1437

* @mtd: mtd info structure

1435

* @mtd: mtd info structure

1438

* @chip: nand chip info structure

1436

* @chip: nand chip info structure

1439

* @buf: buffer to store read data

1437

* @buf: buffer to store read data

1440

* @oob_required: caller requires OOB data read to chip->oob_poi

1438

* @oob_required: caller requires OOB data read to chip->oob_poi

1441

* @page: page number to read

1439

* @page: page number to read

1442

*

1440

*

1443

* Not for syndrome calculating ECC controllers which need a special oob layout.

1441

* Not for syndrome calculating ECC controllers which need a special oob layout.

1444

*/

1442

*/

1445

static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,

1443

static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,

1446

uint8_t *buf, int oob_required, int page)

1444

uint8_t *buf, int oob_required, int page)

1447

{

1445

{

1448

int i, eccsize = chip->ecc.size;

1446

int i, eccsize = chip->ecc.size;

1449

int eccbytes = chip->ecc.bytes;

1447

int eccbytes = chip->ecc.bytes;

1450

int eccsteps = chip->ecc.steps;

1448

int eccsteps = chip->ecc.steps;

1451

uint8_t *p = buf;

1449

uint8_t *p = buf;

1452

uint8_t *ecc_calc = chip->buffers->ecccalc;

1450

uint8_t *ecc_calc = chip->buffers->ecccalc;

1453

uint8_t *ecc_code = chip->buffers->ecccode;

1451

uint8_t *ecc_code = chip->buffers->ecccode;

1454

uint32_t *eccpos = chip->ecc.layout->eccpos;

1452

uint32_t *eccpos = chip->ecc.layout->eccpos;

1455

unsigned int max_bitflips = 0;

1453

unsigned int max_bitflips = 0;

1456

1454

1457

for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {

1455

for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {

1458

chip->ecc.hwctl(mtd, NAND_ECC_READ);

1456

chip->ecc.hwctl(mtd, NAND_ECC_READ);

1459

chip->read_buf(mtd, p, eccsize);

1457

chip->read_buf(mtd, p, eccsize);

1460

chip->ecc.calculate(mtd, p, &ecc_calc[i]);

1458

chip->ecc.calculate(mtd, p, &ecc_calc[i]);

1461

}

1459

}

1462

chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);

1460

chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);

1463

1461

1464

for (i = 0; i < chip->ecc.total; i++)

1462

for (i = 0; i < chip->ecc.total; i++)

1465

ecc_code[i] = chip->oob_poi[eccpos[i]];

1463

ecc_code[i] = chip->oob_poi[eccpos[i]];

1466

1464

1467

eccsteps = chip->ecc.steps;

1465

eccsteps = chip->ecc.steps;

1468

p = buf;

1466

p = buf;

1469

1467

1470

for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {

1468

for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {

1471

int stat;

1469

int stat;

1472

1470

1473

stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);

1471

stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);

1474

if (stat < 0) {

1472

if (stat < 0) {

1475

mtd->ecc_stats.failed++;

1473

mtd->ecc_stats.failed++;

1476

} else {

1474

} else {

1477

mtd->ecc_stats.corrected += stat;

1475

mtd->ecc_stats.corrected += stat;

1478

max_bitflips = max_t(unsigned int, max_bitflips, stat);

1476

max_bitflips = max_t(unsigned int, max_bitflips, stat);

1479

}

1477

}

1480

}

1478

}

1481

return max_bitflips;

1479

return max_bitflips;

1482

}

1480

}

1483

1481

1484

/**

1482

/**

1485

* nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first

1483

* nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first

1486

* @mtd: mtd info structure

1484

* @mtd: mtd info structure

1487

* @chip: nand chip info structure

1485

* @chip: nand chip info structure

1488

* @buf: buffer to store read data

1486

* @buf: buffer to store read data

1489

* @oob_required: caller requires OOB data read to chip->oob_poi

1487

* @oob_required: caller requires OOB data read to chip->oob_poi

1490

* @page: page number to read

1488

* @page: page number to read

1491

*

1489

*

1492

* Hardware ECC for large page chips, require OOB to be read first. For this

1490

* Hardware ECC for large page chips, require OOB to be read first. For this

1493

* ECC mode, the write_page method is re-used from ECC_HW. These methods

1491

* ECC mode, the write_page method is re-used from ECC_HW. These methods

1494

* read/write ECC from the OOB area, unlike the ECC_HW_SYNDROME support with

1492

* read/write ECC from the OOB area, unlike the ECC_HW_SYNDROME support with

1495

* multiple ECC steps, follows the "infix ECC" scheme and reads/writes ECC from

1493

* multiple ECC steps, follows the "infix ECC" scheme and reads/writes ECC from

1496

* the data area, by overwriting the NAND manufacturer bad block markings.

1494

* the data area, by overwriting the NAND manufacturer bad block markings.

1497

*/

1495

*/

1498

static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,

1496

static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,

1499

struct nand_chip *chip, uint8_t *buf, int oob_required, int page)

1497

struct nand_chip *chip, uint8_t *buf, int oob_required, int page)

1500

{

1498

{

1501

int i, eccsize = chip->ecc.size;

1499

int i, eccsize = chip->ecc.size;

1502

int eccbytes = chip->ecc.bytes;

1500

int eccbytes = chip->ecc.bytes;

1503

int eccsteps = chip->ecc.steps;

1501

int eccsteps = chip->ecc.steps;

1504

uint8_t *p = buf;

1502

uint8_t *p = buf;

1505

uint8_t *ecc_code = chip->buffers->ecccode;

1503

uint8_t *ecc_code = chip->buffers->ecccode;

1506

uint32_t *eccpos = chip->ecc.layout->eccpos;

1504

uint32_t *eccpos = chip->ecc.layout->eccpos;

1507

uint8_t *ecc_calc = chip->buffers->ecccalc;

1505

uint8_t *ecc_calc = chip->buffers->ecccalc;

1508

unsigned int max_bitflips = 0;

1506

unsigned int max_bitflips = 0;

1509

1507

1510

/* Read the OOB area first */

1508

/* Read the OOB area first */

1511

chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);

1509

chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);

1512

chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);

1510

chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);

1513

chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);

1511

chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);

1514

1512

1515

for (i = 0; i < chip->ecc.total; i++)

1513

for (i = 0; i < chip->ecc.total; i++)

1516

ecc_code[i] = chip->oob_poi[eccpos[i]];

1514

ecc_code[i] = chip->oob_poi[eccpos[i]];

1517

1515

1518

for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {

1516

for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {

1519

int stat;

1517

int stat;

1520

1518

1521

chip->ecc.hwctl(mtd, NAND_ECC_READ);

1519

chip->ecc.hwctl(mtd, NAND_ECC_READ);

1522

chip->read_buf(mtd, p, eccsize);

1520

chip->read_buf(mtd, p, eccsize);

1523

chip->ecc.calculate(mtd, p, &ecc_calc[i]);

1521

chip->ecc.calculate(mtd, p, &ecc_calc[i]);

1524

1522

1525

stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);

1523

stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);

1526

if (stat < 0) {

1524

if (stat < 0) {

1527

mtd->ecc_stats.failed++;

1525

mtd->ecc_stats.failed++;

1528

} else {

1526

} else {

1529

mtd->ecc_stats.corrected += stat;

1527

mtd->ecc_stats.corrected += stat;

1530

max_bitflips = max_t(unsigned int, max_bitflips, stat);

1528

max_bitflips = max_t(unsigned int, max_bitflips, stat);

1531

}

1529

}

1532

}

1530

}

1533

return max_bitflips;

1531

return max_bitflips;

1534

}

1532

}

1535

1533

1536

/**

1534

/**

1537

* nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read

1535

* nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read

1538

* @mtd: mtd info structure

1536

* @mtd: mtd info structure

1539

* @chip: nand chip info structure

1537

* @chip: nand chip info structure

1540

* @buf: buffer to store read data

1538

* @buf: buffer to store read data

1541

* @oob_required: caller requires OOB data read to chip->oob_poi

1539

* @oob_required: caller requires OOB data read to chip->oob_poi

1542

* @page: page number to read

1540

* @page: page number to read

1543

*

1541

*

1544

* The hw generator calculates the error syndrome automatically. Therefore we

1542

* The hw generator calculates the error syndrome automatically. Therefore we

1545

* need a special oob layout and handling.

1543

* need a special oob layout and handling.

1546

*/

1544

*/

1547

static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,

1545

static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,

1548

uint8_t *buf, int oob_required, int page)

1546

uint8_t *buf, int oob_required, int page)

1549

{

1547

{

1550

int i, eccsize = chip->ecc.size;

1548

int i, eccsize = chip->ecc.size;

1551

int eccbytes = chip->ecc.bytes;

1549

int eccbytes = chip->ecc.bytes;

1552

int eccsteps = chip->ecc.steps;

1550

int eccsteps = chip->ecc.steps;

1553

uint8_t *p = buf;

1551

uint8_t *p = buf;

1554

uint8_t *oob = chip->oob_poi;

1552

uint8_t *oob = chip->oob_poi;

1555

unsigned int max_bitflips = 0;

1553

unsigned int max_bitflips = 0;

1556

1554

1557

for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {

1555

for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {

1558

int stat;

1556

int stat;

1559

1557

1560

chip->ecc.hwctl(mtd, NAND_ECC_READ);

1558

chip->ecc.hwctl(mtd, NAND_ECC_READ);

1561

chip->read_buf(mtd, p, eccsize);

1559

chip->read_buf(mtd, p, eccsize);

1562

1560

1563

if (chip->ecc.prepad) {

1561

if (chip->ecc.prepad) {

1564

chip->read_buf(mtd, oob, chip->ecc.prepad);

1562

chip->read_buf(mtd, oob, chip->ecc.prepad);

1565

oob += chip->ecc.prepad;

1563

oob += chip->ecc.prepad;

1566

}

1564

}

1567

1565

1568

chip->ecc.hwctl(mtd, NAND_ECC_READSYN);

1566

chip->ecc.hwctl(mtd, NAND_ECC_READSYN);

1569

chip->read_buf(mtd, oob, eccbytes);

1567

chip->read_buf(mtd, oob, eccbytes);

1570

stat = chip->ecc.correct(mtd, p, oob, NULL);

1568

stat = chip->ecc.correct(mtd, p, oob, NULL);

1571

1569

1572

if (stat < 0) {

1570

if (stat < 0) {

1573

mtd->ecc_stats.failed++;

1571

mtd->ecc_stats.failed++;

1574

} else {

1572

} else {

1575

mtd->ecc_stats.corrected += stat;

1573

mtd->ecc_stats.corrected += stat;

1576

max_bitflips = max_t(unsigned int, max_bitflips, stat);

1574

max_bitflips = max_t(unsigned int, max_bitflips, stat);

1577

}

1575

}

1578

1576

1579

oob += eccbytes;

1577

oob += eccbytes;

1580

1578

1581

if (chip->ecc.postpad) {

1579

if (chip->ecc.postpad) {

1582

chip->read_buf(mtd, oob, chip->ecc.postpad);

1580

chip->read_buf(mtd, oob, chip->ecc.postpad);

1583

oob += chip->ecc.postpad;

1581

oob += chip->ecc.postpad;

1584

}

1582

}

1585

}

1583

}

1586

1584

1587

/* Calculate remaining oob bytes */

1585

/* Calculate remaining oob bytes */

1588

i = mtd->oobsize - (oob - chip->oob_poi);

1586

i = mtd->oobsize - (oob - chip->oob_poi);

1589

if (i)

1587

if (i)

1590

chip->read_buf(mtd, oob, i);

1588

chip->read_buf(mtd, oob, i);

1591

1589

1592

return max_bitflips;

1590

return max_bitflips;

1593

}

1591

}

1594

1592

1595

/**

1593

/**

1596

* nand_transfer_oob - [INTERN] Transfer oob to client buffer

1594

* nand_transfer_oob - [INTERN] Transfer oob to client buffer

1597

* @chip: nand chip structure

1595

* @chip: nand chip structure

1598

* @oob: oob destination address

1596

* @oob: oob destination address

1599

* @ops: oob ops structure

1597

* @ops: oob ops structure

1600

* @len: size of oob to transfer

1598

* @len: size of oob to transfer

1601

*/

1599

*/

1602

static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,

1600

static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,

1603

struct mtd_oob_ops *ops, size_t len)

1601

struct mtd_oob_ops *ops, size_t len)

1604

{

1602

{

1605

switch (ops->mode) {

1603

switch (ops->mode) {

1606

1604

1607

case MTD_OPS_PLACE_OOB:

1605

case MTD_OPS_PLACE_OOB:

1608

case MTD_OPS_RAW:

1606

case MTD_OPS_RAW:

1609

memcpy(oob, chip->oob_poi + ops->ooboffs, len);

1607

memcpy(oob, chip->oob_poi + ops->ooboffs, len);

1610

return oob + len;

1608

return oob + len;

1611

1609

1612

case MTD_OPS_AUTO_OOB: {

1610

case MTD_OPS_AUTO_OOB: {

1613

struct nand_oobfree *free = chip->ecc.layout->oobfree;

1611

struct nand_oobfree *free = chip->ecc.layout->oobfree;

1614

uint32_t boffs = 0, roffs = ops->ooboffs;

1612

uint32_t boffs = 0, roffs = ops->ooboffs;

1615

size_t bytes = 0;

1613

size_t bytes = 0;

1616

1614

1617

for (; free->length && len; free++, len -= bytes) {

1615

for (; free->length && len; free++, len -= bytes) {

1618

/* Read request not from offset 0? */

1616

/* Read request not from offset 0? */

1619

if (unlikely(roffs)) {

1617

if (unlikely(roffs)) {

1620

if (roffs >= free->length) {

1618

if (roffs >= free->length) {

1621

roffs -= free->length;

1619

roffs -= free->length;

1622

continue;

1620

continue;

1623

}

1621

}

1624

boffs = free->offset + roffs;

1622

boffs = free->offset + roffs;

1625

bytes = min_t(size_t, len,

1623

bytes = min_t(size_t, len,

1626

(free->length - roffs));

1624

(free->length - roffs));

1627

roffs = 0;

1625

roffs = 0;

1628

} else {

1626

} else {

1629

bytes = min_t(size_t, len, free->length);

1627

bytes = min_t(size_t, len, free->length);

1630

boffs = free->offset;

1628

boffs = free->offset;

1631

}

1629

}

1632

memcpy(oob, chip->oob_poi + boffs, bytes);

1630

memcpy(oob, chip->oob_poi + boffs, bytes);

1633

oob += bytes;

1631

oob += bytes;

1634

}

1632

}

1635

return oob;

1633

return oob;

1636

}

1634

}

1637

default:

1635

default:

1638

BUG();

1636

BUG();

1639

}

1637

}

1640

return NULL;

1638

return NULL;

1641

}

1639

}

1642

1640

1643

/**

1641

/**

1644

* nand_setup_read_retry - [INTERN] Set the READ RETRY mode

1642

* nand_setup_read_retry - [INTERN] Set the READ RETRY mode

1645

* @mtd: MTD device structure

1643

* @mtd: MTD device structure

1646

* @retry_mode: the retry mode to use

1644

* @retry_mode: the retry mode to use

1647

*

1645

*

1648

* Some vendors supply a special command to shift the Vt threshold, to be used

1646

* Some vendors supply a special command to shift the Vt threshold, to be used

1649

* when there are too many bitflips in a page (i.e., ECC error). After setting

1647

* when there are too many bitflips in a page (i.e., ECC error). After setting

1650

* a new threshold, the host should retry reading the page.

1648

* a new threshold, the host should retry reading the page.

1651

*/

1649

*/

1652

static int nand_setup_read_retry(struct mtd_info *mtd, int retry_mode)

1650

static int nand_setup_read_retry(struct mtd_info *mtd, int retry_mode)

1653

{

1651

{

1654

struct nand_chip *chip = mtd->priv;

1652

struct nand_chip *chip = mtd->priv;

1655

1653

1656

pr_debug("setting READ RETRY mode %d\n", retry_mode);

1654

pr_debug("setting READ RETRY mode %d\n", retry_mode);

1657

1655

1658

if (retry_mode >= chip->read_retries)

1656

if (retry_mode >= chip->read_retries)

1659

return -EINVAL;

1657

return -EINVAL;

1660

1658

1661

if (!chip->setup_read_retry)

1659

if (!chip->setup_read_retry)

1662

return -EOPNOTSUPP;

1660

return -EOPNOTSUPP;

1663

1661

1664

return chip->setup_read_retry(mtd, retry_mode);

1662

return chip->setup_read_retry(mtd, retry_mode);

1665

}

1663

}

1666

1664

1667

/**

1665

/**

1668

* nand_do_read_ops - [INTERN] Read data with ECC

1666

* nand_do_read_ops - [INTERN] Read data with ECC

1669

* @mtd: MTD device structure

1667

* @mtd: MTD device structure

1670

* @from: offset to read from

1668

* @from: offset to read from

1671

* @ops: oob ops structure

1669

* @ops: oob ops structure

1672

*

1670

*

1673

* Internal function. Called with chip held.

1671

* Internal function. Called with chip held.

1674

*/

1672

*/

1675

static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,

1673

static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,

1676

struct mtd_oob_ops *ops)

1674

struct mtd_oob_ops *ops)

1677

{

1675

{

1678

int chipnr, page, realpage, col, bytes, aligned, oob_required;

1676

int chipnr, page, realpage, col, bytes, aligned, oob_required;

1679

struct nand_chip *chip = mtd->priv;

1677

struct nand_chip *chip = mtd->priv;

1680

int ret = 0;

1678

int ret = 0;

1681

uint32_t readlen = ops->len;

1679

uint32_t readlen = ops->len;

1682

uint32_t oobreadlen = ops->ooblen;

1680

uint32_t oobreadlen = ops->ooblen;

1683

uint32_t max_oobsize = ops->mode == MTD_OPS_AUTO_OOB ?

1681

uint32_t max_oobsize = ops->mode == MTD_OPS_AUTO_OOB ?

1684

mtd->oobavail : mtd->oobsize;

1682

mtd->oobavail : mtd->oobsize;

1685

1683

1686

uint8_t *bufpoi, *oob, *buf;

1684

uint8_t *bufpoi, *oob, *buf;

1687

unsigned int max_bitflips = 0;

1685

unsigned int max_bitflips = 0;

1688

int retry_mode = 0;

1686

int retry_mode = 0;

1689

bool ecc_fail = false;

1687

bool ecc_fail = false;

1690

1688

1691

chipnr = (int)(from >> chip->chip_shift);

1689

chipnr = (int)(from >> chip->chip_shift);

1692

chip->select_chip(mtd, chipnr);

1690

chip->select_chip(mtd, chipnr);

1693

1691

1694

realpage = (int)(from >> chip->page_shift);

1692

realpage = (int)(from >> chip->page_shift);

1695

page = realpage & chip->pagemask;

1693

page = realpage & chip->pagemask;

1696

1694

1697

col = (int)(from & (mtd->writesize - 1));

1695

col = (int)(from & (mtd->writesize - 1));

1698

1696

1699

buf = ops->datbuf;

1697

buf = ops->datbuf;

1700

oob = ops->oobbuf;

1698

oob = ops->oobbuf;

1701

oob_required = oob ? 1 : 0;

1699

oob_required = oob ? 1 : 0;

1702

1700

1703

while (1) {

1701

while (1) {

1704

unsigned int ecc_failures = mtd->ecc_stats.failed;

1702

unsigned int ecc_failures = mtd->ecc_stats.failed;

1705

1703

1706

WATCHDOG_RESET();

1704

WATCHDOG_RESET();

1707

bytes = min(mtd->writesize - col, readlen);

1705

bytes = min(mtd->writesize - col, readlen);

1708

aligned = (bytes == mtd->writesize);

1706

aligned = (bytes == mtd->writesize);

1709

1707

1710

/* Is the current page in the buffer? */

1708

/* Is the current page in the buffer? */

1711

if (realpage != chip->pagebuf || oob) {

1709

if (realpage != chip->pagebuf || oob) {

1712

bufpoi = aligned ? buf : chip->buffers->databuf;

1710

bufpoi = aligned ? buf : chip->buffers->databuf;

1713

1711

1714

read_retry:

1712

read_retry:

1715

chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);

1713

chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);

1716

1714

1717

/*

1715

/*

1718

* Now read the page into the buffer. Absent an error,

1716

* Now read the page into the buffer. Absent an error,

1719

* the read methods return max bitflips per ecc step.

1717

* the read methods return max bitflips per ecc step.

1720

*/

1718

*/

1721

if (unlikely(ops->mode == MTD_OPS_RAW))

1719

if (unlikely(ops->mode == MTD_OPS_RAW))

1722

ret = chip->ecc.read_page_raw(mtd, chip, bufpoi,

1720

ret = chip->ecc.read_page_raw(mtd, chip, bufpoi,

1723

oob_required,

1721

oob_required,

1724

page);

1722

page);

1725

else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) &&

1723

else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) &&

1726

!oob)

1724

!oob)

1727

ret = chip->ecc.read_subpage(mtd, chip,

1725

ret = chip->ecc.read_subpage(mtd, chip,

1728

col, bytes, bufpoi,

1726

col, bytes, bufpoi,

1729

page);

1727

page);

1730

else

1728

else

1731

ret = chip->ecc.read_page(mtd, chip, bufpoi,

1729

ret = chip->ecc.read_page(mtd, chip, bufpoi,

1732

oob_required, page);

1730

oob_required, page);

1733

if (ret < 0) {

1731

if (ret < 0) {

1734

if (!aligned)

1732

if (!aligned)

1735

/* Invalidate page cache */

1733

/* Invalidate page cache */

1736

chip->pagebuf = -1;

1734

chip->pagebuf = -1;

1737

break;

1735

break;

1738

}

1736

}

1739

1737

1740

max_bitflips = max_t(unsigned int, max_bitflips, ret);

1738

max_bitflips = max_t(unsigned int, max_bitflips, ret);

1741

1739

1742

/* Transfer not aligned data */

1740

/* Transfer not aligned data */

1743

if (!aligned) {

1741

if (!aligned) {

1744

if (!NAND_HAS_SUBPAGE_READ(chip) && !oob &&

1742

if (!NAND_HAS_SUBPAGE_READ(chip) && !oob &&

1745

!(mtd->ecc_stats.failed - ecc_failures) &&

1743

!(mtd->ecc_stats.failed - ecc_failures) &&

1746

(ops->mode != MTD_OPS_RAW)) {

1744

(ops->mode != MTD_OPS_RAW)) {

1747

chip->pagebuf = realpage;

1745

chip->pagebuf = realpage;

1748

chip->pagebuf_bitflips = ret;

1746

chip->pagebuf_bitflips = ret;

1749

} else {

1747

} else {

1750

/* Invalidate page cache */

1748

/* Invalidate page cache */

1751

chip->pagebuf = -1;

1749

chip->pagebuf = -1;

1752

}

1750

}

1753

memcpy(buf, chip->buffers->databuf + col, bytes);

1751

memcpy(buf, chip->buffers->databuf + col, bytes);

1754

}

1752

}

1755

1753

1756

if (unlikely(oob)) {

1754

if (unlikely(oob)) {

1757

int toread = min(oobreadlen, max_oobsize);

1755

int toread = min(oobreadlen, max_oobsize);

1758

1756

1759

if (toread) {

1757

if (toread) {

1760

oob = nand_transfer_oob(chip,

1758

oob = nand_transfer_oob(chip,

1761

oob, ops, toread);

1759

oob, ops, toread);

1762

oobreadlen -= toread;

1760

oobreadlen -= toread;

1763

}

1761

}

1764

}

1762

}

1765

1763

1766

if (chip->options & NAND_NEED_READRDY) {

1764

if (chip->options & NAND_NEED_READRDY) {

1767

/* Apply delay or wait for ready/busy pin */

1765

/* Apply delay or wait for ready/busy pin */

1768

if (!chip->dev_ready)

1766

if (!chip->dev_ready)

1769

udelay(chip->chip_delay);

1767

udelay(chip->chip_delay);

1770

else

1768

else

1771

nand_wait_ready(mtd);

1769

nand_wait_ready(mtd);

1772

}

1770

}

1773

1771

1774

if (mtd->ecc_stats.failed - ecc_failures) {

1772

if (mtd->ecc_stats.failed - ecc_failures) {

1775

if (retry_mode + 1 < chip->read_retries) {

1773

if (retry_mode + 1 < chip->read_retries) {

1776

retry_mode++;

1774

retry_mode++;

1777

ret = nand_setup_read_retry(mtd,

1775

ret = nand_setup_read_retry(mtd,

1778

retry_mode);

1776

retry_mode);

1779

if (ret < 0)

1777

if (ret < 0)

1780

break;

1778

break;

1781

1779

1782

/* Reset failures; retry */

1780

/* Reset failures; retry */

1783

mtd->ecc_stats.failed = ecc_failures;

1781

mtd->ecc_stats.failed = ecc_failures;

1784

goto read_retry;

1782

goto read_retry;

1785

} else {

1783

} else {

1786

/* No more retry modes; real failure */

1784

/* No more retry modes; real failure */

1787

ecc_fail = true;

1785

ecc_fail = true;

1788

}

1786

}

1789

}

1787

}

1790

1788

1791

buf += bytes;

1789

buf += bytes;

1792

} else {

1790

} else {

1793

memcpy(buf, chip->buffers->databuf + col, bytes);

1791

memcpy(buf, chip->buffers->databuf + col, bytes);

1794

buf += bytes;

1792

buf += bytes;

1795

max_bitflips = max_t(unsigned int, max_bitflips,

1793

max_bitflips = max_t(unsigned int, max_bitflips,

1796

chip->pagebuf_bitflips);

1794

chip->pagebuf_bitflips);

1797

}

1795

}

1798

1796

1799

readlen -= bytes;

1797

readlen -= bytes;

1800

1798

1801

/* Reset to retry mode 0 */

1799

/* Reset to retry mode 0 */

1802

if (retry_mode) {

1800

if (retry_mode) {

1803

ret = nand_setup_read_retry(mtd, 0);

1801

ret = nand_setup_read_retry(mtd, 0);

1804

if (ret < 0)

1802

if (ret < 0)

1805

break;

1803

break;

1806

retry_mode = 0;

1804

retry_mode = 0;

1807

}

1805

}

1808

1806

1809

if (!readlen)

1807

if (!readlen)

1810

break;

1808

break;

1811

1809

1812

/* For subsequent reads align to page boundary */

1810

/* For subsequent reads align to page boundary */

1813

col = 0;

1811

col = 0;

1814

/* Increment page address */

1812

/* Increment page address */

1815

realpage++;

1813

realpage++;

1816

1814

1817

page = realpage & chip->pagemask;

1815

page = realpage & chip->pagemask;

1818

/* Check, if we cross a chip boundary */

1816

/* Check, if we cross a chip boundary */

1819

if (!page) {

1817

if (!page) {

1820

chipnr++;

1818

chipnr++;

1821

chip->select_chip(mtd, -1);

1819

chip->select_chip(mtd, -1);

1822

chip->select_chip(mtd, chipnr);

1820

chip->select_chip(mtd, chipnr);

1823

}

1821

}

1824

}

1822

}

1825

chip->select_chip(mtd, -1);

1823

chip->select_chip(mtd, -1);

1826

1824

1827

ops->retlen = ops->len - (size_t) readlen;

1825

ops->retlen = ops->len - (size_t) readlen;

1828

if (oob)

1826

if (oob)

1829

ops->oobretlen = ops->ooblen - oobreadlen;

1827

ops->oobretlen = ops->ooblen - oobreadlen;

1830

1828

1831

if (ret < 0)

1829

if (ret < 0)

1832

return ret;

1830

return ret;

1833

1831

1834

if (ecc_fail)

1832

if (ecc_fail)

1835

return -EBADMSG;

1833

return -EBADMSG;

1836

1834

1837

return max_bitflips;

1835

return max_bitflips;

1838

}

1836

}

1839

1837

1840

/**

1838

/**

1841

* nand_read - [MTD Interface] MTD compatibility function for nand_do_read_ecc

1839

* nand_read - [MTD Interface] MTD compatibility function for nand_do_read_ecc

1842

* @mtd: MTD device structure

1840

* @mtd: MTD device structure

1843

* @from: offset to read from

1841

* @from: offset to read from

1844

* @len: number of bytes to read

1842

* @len: number of bytes to read

1845

* @retlen: pointer to variable to store the number of read bytes

1843

* @retlen: pointer to variable to store the number of read bytes

1846

* @buf: the databuffer to put data

1844

* @buf: the databuffer to put data

1847

*

1845

*

1848

* Get hold of the chip and call nand_do_read.

1846

* Get hold of the chip and call nand_do_read.

1849

*/

1847

*/

1850

static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,

1848

static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,

1851

size_t *retlen, uint8_t *buf)

1849

size_t *retlen, uint8_t *buf)

1852

{

1850

{

1853

struct mtd_oob_ops ops;

1851

struct mtd_oob_ops ops;

1854

int ret;

1852

int ret;

1855

1853

1856

nand_get_device(mtd, FL_READING);

1854

nand_get_device(mtd, FL_READING);

1857

ops.len = len;

1855

ops.len = len;

1858

ops.datbuf = buf;

1856

ops.datbuf = buf;

1859

ops.oobbuf = NULL;

1857

ops.oobbuf = NULL;

1860

ops.mode = MTD_OPS_PLACE_OOB;

1858

ops.mode = MTD_OPS_PLACE_OOB;

1861

ret = nand_do_read_ops(mtd, from, &ops);

1859

ret = nand_do_read_ops(mtd, from, &ops);

1862

*retlen = ops.retlen;

1860

*retlen = ops.retlen;

1863

nand_release_device(mtd);

1861

nand_release_device(mtd);

1864

return ret;

1862

return ret;

1865

}

1863

}

1866

1864

1867

/**

1865

/**

1868

* nand_read_oob_std - [REPLACEABLE] the most common OOB data read function

1866

* nand_read_oob_std - [REPLACEABLE] the most common OOB data read function

1869

* @mtd: mtd info structure

1867

* @mtd: mtd info structure

1870

* @chip: nand chip info structure

1868

* @chip: nand chip info structure

1871

* @page: page number to read

1869

* @page: page number to read

1872

*/

1870

*/

1873

static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,

1871

static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,

1874

int page)

1872

int page)

1875

{

1873

{

1876

chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);

1874

chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);

1877

chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);

1875

chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);

1878

return 0;

1876

return 0;

1879

}

1877

}

1880

1878

1881

/**

1879

/**

1882

* nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC

1880

* nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC

1883

* with syndromes

1881

* with syndromes

1884

* @mtd: mtd info structure

1882

* @mtd: mtd info structure

1885

* @chip: nand chip info structure

1883

* @chip: nand chip info structure

1886

* @page: page number to read

1884

* @page: page number to read

1887

*/

1885

*/

1888

static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,

1886

static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,

1889

int page)

1887

int page)

1890

{

1888

{

1891

uint8_t *buf = chip->oob_poi;

1889

uint8_t *buf = chip->oob_poi;

1892

int length = mtd->oobsize;

1890

int length = mtd->oobsize;

1893

int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;

1891

int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;

1894

int eccsize = chip->ecc.size;

1892

int eccsize = chip->ecc.size;

1895

uint8_t *bufpoi = buf;

1893

uint8_t *bufpoi = buf;

1896

int i, toread, sndrnd = 0, pos;

1894

int i, toread, sndrnd = 0, pos;

1897

1895

1898

chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page);

1896

chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page);

1899

for (i = 0; i < chip->ecc.steps; i++) {

1897

for (i = 0; i < chip->ecc.steps; i++) {

1900

if (sndrnd) {

1898

if (sndrnd) {

1901

pos = eccsize + i * (eccsize + chunk);

1899

pos = eccsize + i * (eccsize + chunk);

1902

if (mtd->writesize > 512)

1900

if (mtd->writesize > 512)

1903

chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1);

1901

chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1);

1904

else

1902

else

1905

chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page);

1903

chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page);

1906

} else

1904

} else

1907

sndrnd = 1;

1905

sndrnd = 1;

1908

toread = min_t(int, length, chunk);

1906

toread = min_t(int, length, chunk);

1909

chip->read_buf(mtd, bufpoi, toread);

1907

chip->read_buf(mtd, bufpoi, toread);

1910

bufpoi += toread;

1908

bufpoi += toread;

1911

length -= toread;

1909

length -= toread;

1912

}

1910

}

1913

if (length > 0)

1911

if (length > 0)

1914

chip->read_buf(mtd, bufpoi, length);

1912

chip->read_buf(mtd, bufpoi, length);

1915

1913

1916

return 0;

1914

return 0;

1917

}

1915

}

1918

1916

1919

/**

1917

/**

1920

* nand_write_oob_std - [REPLACEABLE] the most common OOB data write function

1918

* nand_write_oob_std - [REPLACEABLE] the most common OOB data write function

1921

* @mtd: mtd info structure

1919

* @mtd: mtd info structure

1922

* @chip: nand chip info structure

1920

* @chip: nand chip info structure

1923

* @page: page number to write

1921

* @page: page number to write

1924

*/

1922

*/

1925

static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,

1923

static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,

1926

int page)

1924

int page)

1927

{

1925

{

1928

int status = 0;

1926

int status = 0;

1929

const uint8_t *buf = chip->oob_poi;

1927

const uint8_t *buf = chip->oob_poi;

1930

int length = mtd->oobsize;

1928

int length = mtd->oobsize;

1931

1929

1932

chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page);

1930

chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page);

1933

chip->write_buf(mtd, buf, length);

1931

chip->write_buf(mtd, buf, length);

1934

/* Send command to program the OOB data */

1932

/* Send command to program the OOB data */

1935

chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);

1933

chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);

1936

1934

1937

status = chip->waitfunc(mtd, chip);

1935

status = chip->waitfunc(mtd, chip);

1938

1936

1939

return status & NAND_STATUS_FAIL ? -EIO : 0;

1937

return status & NAND_STATUS_FAIL ? -EIO : 0;

1940

}

1938

}

1941

1939

1942

/**

1940

/**

1943

* nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC

1941

* nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC

1944

* with syndrome - only for large page flash

1942

* with syndrome - only for large page flash

1945

* @mtd: mtd info structure

1943

* @mtd: mtd info structure

1946

* @chip: nand chip info structure

1944

* @chip: nand chip info structure

1947

* @page: page number to write

1945

* @page: page number to write

1948

*/

1946

*/

1949

static int nand_write_oob_syndrome(struct mtd_info *mtd,

1947

static int nand_write_oob_syndrome(struct mtd_info *mtd,

1950

struct nand_chip *chip, int page)

1948

struct nand_chip *chip, int page)

1951

{

1949

{

1952

int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;

1950

int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;

1953

int eccsize = chip->ecc.size, length = mtd->oobsize;

1951

int eccsize = chip->ecc.size, length = mtd->oobsize;

1954

int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps;

1952

int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps;

1955

const uint8_t *bufpoi = chip->oob_poi;

1953

const uint8_t *bufpoi = chip->oob_poi;

1956

1954

1957

/*

1955

/*

1958

* data-ecc-data-ecc ... ecc-oob

1956

* data-ecc-data-ecc ... ecc-oob

1959

* or

1957

* or

1960

* data-pad-ecc-pad-data-pad .... ecc-pad-oob

1958

* data-pad-ecc-pad-data-pad .... ecc-pad-oob

1961

*/

1959

*/

1962

if (!chip->ecc.prepad && !chip->ecc.postpad) {

1960

if (!chip->ecc.prepad && !chip->ecc.postpad) {

1963

pos = steps * (eccsize + chunk);

1961

pos = steps * (eccsize + chunk);

1964

steps = 0;

1962

steps = 0;

1965

} else

1963

} else

1966

pos = eccsize;

1964

pos = eccsize;

1967

1965

1968

chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);

1966

chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);

1969

for (i = 0; i < steps; i++) {

1967

for (i = 0; i < steps; i++) {

1970

if (sndcmd) {

1968

if (sndcmd) {

1971

if (mtd->writesize <= 512) {

1969

if (mtd->writesize <= 512) {

1972

uint32_t fill = 0xFFFFFFFF;

1970

uint32_t fill = 0xFFFFFFFF;

1973

1971

1974

len = eccsize;

1972

len = eccsize;

1975

while (len > 0) {

1973

while (len > 0) {

1976

int num = min_t(int, len, 4);

1974

int num = min_t(int, len, 4);

1977

chip->write_buf(mtd, (uint8_t *)&fill,

1975

chip->write_buf(mtd, (uint8_t *)&fill,

1978

num);

1976

num);

1979

len -= num;

1977

len -= num;

1980

}

1978

}

1981

} else {

1979

} else {

1982

pos = eccsize + i * (eccsize + chunk);

1980

pos = eccsize + i * (eccsize + chunk);

1983

chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1);

1981

chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1);

1984

}

1982

}

1985

} else

1983

} else

1986

sndcmd = 1;

1984

sndcmd = 1;

1987

len = min_t(int, length, chunk);

1985

len = min_t(int, length, chunk);

1988

chip->write_buf(mtd, bufpoi, len);

1986

chip->write_buf(mtd, bufpoi, len);

1989

bufpoi += len;

1987

bufpoi += len;

1990

length -= len;

1988

length -= len;

1991

}

1989

}

1992

if (length > 0)

1990

if (length > 0)

1993

chip->write_buf(mtd, bufpoi, length);

1991

chip->write_buf(mtd, bufpoi, length);

1994

1992

1995

chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);

1993

chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);

1996

status = chip->waitfunc(mtd, chip);

1994

status = chip->waitfunc(mtd, chip);

1997

1995

1998

return status & NAND_STATUS_FAIL ? -EIO : 0;

1996

return status & NAND_STATUS_FAIL ? -EIO : 0;

1999

}

1997

}

2000

1998

2001

/**

1999

/**

2002

* nand_do_read_oob - [INTERN] NAND read out-of-band

2000

* nand_do_read_oob - [INTERN] NAND read out-of-band

2003

* @mtd: MTD device structure

2001

* @mtd: MTD device structure

2004

* @from: offset to read from

2002

* @from: offset to read from

2005

* @ops: oob operations description structure

2003

* @ops: oob operations description structure

2006

*

2004

*

2007

* NAND read out-of-band data from the spare area.

2005

* NAND read out-of-band data from the spare area.

2008

*/

2006

*/

2009

static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,

2007

static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,

2010

struct mtd_oob_ops *ops)

2008

struct mtd_oob_ops *ops)

2011

{

2009

{

2012

int page, realpage, chipnr;

2010

int page, realpage, chipnr;

2013

struct nand_chip *chip = mtd->priv;

2011

struct nand_chip *chip = mtd->priv;

2014

struct mtd_ecc_stats stats;

2012

struct mtd_ecc_stats stats;

2015

int readlen = ops->ooblen;

2013

int readlen = ops->ooblen;

2016

int len;

2014

int len;

2017

uint8_t *buf = ops->oobbuf;

2015

uint8_t *buf = ops->oobbuf;

2018

int ret = 0;

2016

int ret = 0;

2019

2017

2020

pr_debug("%s: from = 0x%08Lx, len = %i\n",

2018

pr_debug("%s: from = 0x%08Lx, len = %i\n",

2021

__func__, (unsigned long long)from, readlen);

2019

__func__, (unsigned long long)from, readlen);

2022

2020

2023

stats = mtd->ecc_stats;

2021

stats = mtd->ecc_stats;

2024

2022

2025

if (ops->mode == MTD_OPS_AUTO_OOB)

2023

if (ops->mode == MTD_OPS_AUTO_OOB)

2026

len = chip->ecc.layout->oobavail;

2024

len = chip->ecc.layout->oobavail;

2027

else

2025

else

2028

len = mtd->oobsize;

2026

len = mtd->oobsize;

2029

2027

2030

if (unlikely(ops->ooboffs >= len)) {

2028

if (unlikely(ops->ooboffs >= len)) {

2031

pr_debug("%s: attempt to start read outside oob\n",

2029

pr_debug("%s: attempt to start read outside oob\n",

2032

__func__);

2030

__func__);

2033

return -EINVAL;

2031

return -EINVAL;

2034

}

2032

}

2035

2033

2036

/* Do not allow reads past end of device */

2034

/* Do not allow reads past end of device */

2037

if (unlikely(from >= mtd->size ||

2035

if (unlikely(from >= mtd->size ||

2038

ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) -

2036

ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) -

2039

(from >> chip->page_shift)) * len)) {

2037

(from >> chip->page_shift)) * len)) {

2040

pr_debug("%s: attempt to read beyond end of device\n",

2038

pr_debug("%s: attempt to read beyond end of device\n",

2041

__func__);

2039

__func__);

2042

return -EINVAL;

2040

return -EINVAL;

2043

}

2041

}

2044

2042

2045

chipnr = (int)(from >> chip->chip_shift);

2043

chipnr = (int)(from >> chip->chip_shift);

2046

chip->select_chip(mtd, chipnr);

2044

chip->select_chip(mtd, chipnr);

2047

2045

2048

/* Shift to get page */

2046

/* Shift to get page */

2049

realpage = (int)(from >> chip->page_shift);

2047

realpage = (int)(from >> chip->page_shift);

2050

page = realpage & chip->pagemask;

2048

page = realpage & chip->pagemask;

2051

2049

2052

while (1) {

2050

while (1) {

2053

WATCHDOG_RESET();

2051

WATCHDOG_RESET();

2054

2052

2055

if (ops->mode == MTD_OPS_RAW)

2053

if (ops->mode == MTD_OPS_RAW)

2056

ret = chip->ecc.read_oob_raw(mtd, chip, page);

2054

ret = chip->ecc.read_oob_raw(mtd, chip, page);

2057

else

2055

else

2058

ret = chip->ecc.read_oob(mtd, chip, page);

2056

ret = chip->ecc.read_oob(mtd, chip, page);

2059

2057

2060

if (ret < 0)

2058

if (ret < 0)

2061

break;

2059

break;

2062

2060

2063

len = min(len, readlen);

2061

len = min(len, readlen);

2064

buf = nand_transfer_oob(chip, buf, ops, len);

2062

buf = nand_transfer_oob(chip, buf, ops, len);

2065

2063

2066

if (chip->options & NAND_NEED_READRDY) {

2064

if (chip->options & NAND_NEED_READRDY) {

2067

/* Apply delay or wait for ready/busy pin */

2065

/* Apply delay or wait for ready/busy pin */

2068

if (!chip->dev_ready)

2066

if (!chip->dev_ready)

2069

udelay(chip->chip_delay);

2067

udelay(chip->chip_delay);

2070

else

2068

else

2071

nand_wait_ready(mtd);

2069

nand_wait_ready(mtd);

2072

}

2070

}

2073

2071

2074

readlen -= len;

2072

readlen -= len;

2075

if (!readlen)

2073

if (!readlen)

2076

break;

2074

break;

2077

2075

2078

/* Increment page address */

2076

/* Increment page address */

2079

realpage++;

2077

realpage++;

2080

2078

2081

page = realpage & chip->pagemask;

2079

page = realpage & chip->pagemask;

2082

/* Check, if we cross a chip boundary */

2080

/* Check, if we cross a chip boundary */

2083

if (!page) {

2081

if (!page) {

2084

chipnr++;

2082

chipnr++;

2085

chip->select_chip(mtd, -1);

2083

chip->select_chip(mtd, -1);

2086

chip->select_chip(mtd, chipnr);

2084

chip->select_chip(mtd, chipnr);

2087

}

2085

}

2088

}

2086

}

2089

chip->select_chip(mtd, -1);

2087

chip->select_chip(mtd, -1);

2090

2088

2091

ops->oobretlen = ops->ooblen - readlen;

2089

ops->oobretlen = ops->ooblen - readlen;

2092

2090

2093

if (ret < 0)

2091

if (ret < 0)

2094

return ret;

2092

return ret;

2095

2093

2096

if (mtd->ecc_stats.failed - stats.failed)

2094

if (mtd->ecc_stats.failed - stats.failed)

2097

return -EBADMSG;

2095

return -EBADMSG;

2098

2096

2099

return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;

2097

return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;

2100

}

2098

}

2101

2099

2102

/**

2100

/**

2103

* nand_read_oob - [MTD Interface] NAND read data and/or out-of-band

2101

* nand_read_oob - [MTD Interface] NAND read data and/or out-of-band

2104

* @mtd: MTD device structure

2102

* @mtd: MTD device structure

2105

* @from: offset to read from

2103

* @from: offset to read from

2106

* @ops: oob operation description structure

2104

* @ops: oob operation description structure

2107

*

2105

*

2108

* NAND read data and/or out-of-band data.

2106

* NAND read data and/or out-of-band data.

2109

*/

2107

*/

2110

static int nand_read_oob(struct mtd_info *mtd, loff_t from,

2108

static int nand_read_oob(struct mtd_info *mtd, loff_t from,

2111

struct mtd_oob_ops *ops)

2109

struct mtd_oob_ops *ops)

2112

{

2110

{

2113

int ret = -ENOTSUPP;

2111

int ret = -ENOTSUPP;

2114

2112

2115

ops->retlen = 0;

2113

ops->retlen = 0;

2116

2114

2117

/* Do not allow reads past end of device */

2115

/* Do not allow reads past end of device */

2118

if (ops->datbuf && (from + ops->len) > mtd->size) {

2116

if (ops->datbuf && (from + ops->len) > mtd->size) {

2119

pr_debug("%s: attempt to read beyond end of device\n",

2117

pr_debug("%s: attempt to read beyond end of device\n",

2120

__func__);

2118

__func__);

2121

return -EINVAL;

2119

return -EINVAL;

2122

}

2120

}

2123

2121

2124

nand_get_device(mtd, FL_READING);

2122

nand_get_device(mtd, FL_READING);

2125

2123

2126

switch (ops->mode) {

2124

switch (ops->mode) {

2127

case MTD_OPS_PLACE_OOB:

2125

case MTD_OPS_PLACE_OOB:

2128

case MTD_OPS_AUTO_OOB:

2126

case MTD_OPS_AUTO_OOB:

2129

case MTD_OPS_RAW:

2127

case MTD_OPS_RAW:

2130

break;

2128

break;

2131

2129

2132

default:

2130

default:

2133

goto out;

2131

goto out;

2134

}

2132

}

2135

2133

2136

if (!ops->datbuf)

2134

if (!ops->datbuf)

2137

ret = nand_do_read_oob(mtd, from, ops);

2135

ret = nand_do_read_oob(mtd, from, ops);

2138

else

2136

else

2139

ret = nand_do_read_ops(mtd, from, ops);

2137

ret = nand_do_read_ops(mtd, from, ops);

2140

2138

2141

out:

2139

out:

2142

nand_release_device(mtd);

2140

nand_release_device(mtd);

2143

return ret;

2141

return ret;

2144

}

2142

}

2145

2143

2146

2144

2147

/**

2145

/**

2148

* nand_write_page_raw - [INTERN] raw page write function

2146

* nand_write_page_raw - [INTERN] raw page write function

2149

* @mtd: mtd info structure

2147

* @mtd: mtd info structure

2150

* @chip: nand chip info structure

2148

* @chip: nand chip info structure

2151

* @buf: data buffer

2149

* @buf: data buffer

2152

* @oob_required: must write chip->oob_poi to OOB

2150

* @oob_required: must write chip->oob_poi to OOB

2153

*

2151

*

2154

* Not for syndrome calculating ECC controllers, which use a special oob layout.

2152

* Not for syndrome calculating ECC controllers, which use a special oob layout.

2155

*/

2153

*/

2156

static int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,

2154

static int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,

2157

const uint8_t *buf, int oob_required)

2155

const uint8_t *buf, int oob_required)

2158

{

2156

{

2159

chip->write_buf(mtd, buf, mtd->writesize);

2157

chip->write_buf(mtd, buf, mtd->writesize);

2160

if (oob_required)

2158

if (oob_required)

2161

chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);

2159

chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);

2162

2160

2163

return 0;

2161

return 0;

2164

}

2162

}

2165

2163

2166

/**

2164

/**

2167

* nand_write_page_raw_syndrome - [INTERN] raw page write function

2165

* nand_write_page_raw_syndrome - [INTERN] raw page write function

2168

* @mtd: mtd info structure

2166

* @mtd: mtd info structure

2169

* @chip: nand chip info structure

2167

* @chip: nand chip info structure

2170

* @buf: data buffer

2168

* @buf: data buffer

2171

* @oob_required: must write chip->oob_poi to OOB

2169

* @oob_required: must write chip->oob_poi to OOB

2172

*

2170

*

2173

* We need a special oob layout and handling even when ECC isn't checked.

2171

* We need a special oob layout and handling even when ECC isn't checked.

2174

*/

2172

*/

2175

static int nand_write_page_raw_syndrome(struct mtd_info *mtd,

2173

static int nand_write_page_raw_syndrome(struct mtd_info *mtd,

2176

struct nand_chip *chip,

2174

struct nand_chip *chip,

2177

const uint8_t *buf, int oob_required)

2175

const uint8_t *buf, int oob_required)

2178

{

2176

{

2179

int eccsize = chip->ecc.size;

2177

int eccsize = chip->ecc.size;

2180

int eccbytes = chip->ecc.bytes;

2178

int eccbytes = chip->ecc.bytes;

2181

uint8_t *oob = chip->oob_poi;

2179

uint8_t *oob = chip->oob_poi;

2182

int steps, size;

2180

int steps, size;

2183

2181

2184

for (steps = chip->ecc.steps; steps > 0; steps--) {

2182

for (steps = chip->ecc.steps; steps > 0; steps--) {

2185

chip->write_buf(mtd, buf, eccsize);

2183

chip->write_buf(mtd, buf, eccsize);

2186

buf += eccsize;

2184

buf += eccsize;

2187

2185

2188

if (chip->ecc.prepad) {

2186

if (chip->ecc.prepad) {

2189

chip->write_buf(mtd, oob, chip->ecc.prepad);

2187

chip->write_buf(mtd, oob, chip->ecc.prepad);

2190

oob += chip->ecc.prepad;

2188

oob += chip->ecc.prepad;

2191

}

2189

}

2192

2190

2193

chip->write_buf(mtd, oob, eccbytes);

2191

chip->write_buf(mtd, oob, eccbytes);

2194

oob += eccbytes;

2192

oob += eccbytes;

2195

2193

2196

if (chip->ecc.postpad) {

2194

if (chip->ecc.postpad) {

2197

chip->write_buf(mtd, oob, chip->ecc.postpad);

2195

chip->write_buf(mtd, oob, chip->ecc.postpad);

2198

oob += chip->ecc.postpad;

2196

oob += chip->ecc.postpad;

2199

}

2197

}

2200

}

2198

}

2201

2199

2202

size = mtd->oobsize - (oob - chip->oob_poi);

2200

size = mtd->oobsize - (oob - chip->oob_poi);

2203

if (size)

2201

if (size)

2204

chip->write_buf(mtd, oob, size);

2202

chip->write_buf(mtd, oob, size);

2205

2203

2206

return 0;

2204

return 0;

2207

}

2205

}

2208

/**

2206

/**

2209

* nand_write_page_swecc - [REPLACEABLE] software ECC based page write function

2207

* nand_write_page_swecc - [REPLACEABLE] software ECC based page write function

2210

* @mtd: mtd info structure

2208

* @mtd: mtd info structure

2211

* @chip: nand chip info structure

2209

* @chip: nand chip info structure

2212

* @buf: data buffer

2210

* @buf: data buffer

2213

* @oob_required: must write chip->oob_poi to OOB

2211

* @oob_required: must write chip->oob_poi to OOB

2214

*/

2212

*/

2215

static int nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,

2213

static int nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,

2216

const uint8_t *buf, int oob_required)

2214

const uint8_t *buf, int oob_required)

2217

{

2215

{

2218

int i, eccsize = chip->ecc.size;

2216

int i, eccsize = chip->ecc.size;

2219

int eccbytes = chip->ecc.bytes;

2217

int eccbytes = chip->ecc.bytes;

2220

int eccsteps = chip->ecc.steps;

2218

int eccsteps = chip->ecc.steps;

2221

uint8_t *ecc_calc = chip->buffers->ecccalc;

2219

uint8_t *ecc_calc = chip->buffers->ecccalc;

2222

const uint8_t *p = buf;

2220

const uint8_t *p = buf;

2223

uint32_t *eccpos = chip->ecc.layout->eccpos;

2221

uint32_t *eccpos = chip->ecc.layout->eccpos;

2224

2222

2225

/* Software ECC calculation */

2223

/* Software ECC calculation */

2226

for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)

2224

for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)

2227

chip->ecc.calculate(mtd, p, &ecc_calc[i]);

2225

chip->ecc.calculate(mtd, p, &ecc_calc[i]);

2228

2226

2229

for (i = 0; i < chip->ecc.total; i++)

2227

for (i = 0; i < chip->ecc.total; i++)

2230

chip->oob_poi[eccpos[i]] = ecc_calc[i];

2228

chip->oob_poi[eccpos[i]] = ecc_calc[i];

2231

2229

2232

return chip->ecc.write_page_raw(mtd, chip, buf, 1);

2230

return chip->ecc.write_page_raw(mtd, chip, buf, 1);

2233

}

2231

}

2234

2232

2235

/**

2233

/**

2236

* nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function

2234

* nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function

2237

* @mtd: mtd info structure

2235

* @mtd: mtd info structure

2238

* @chip: nand chip info structure

2236

* @chip: nand chip info structure

2239

* @buf: data buffer

2237

* @buf: data buffer

2240

* @oob_required: must write chip->oob_poi to OOB

2238

* @oob_required: must write chip->oob_poi to OOB

2241

*/

2239

*/

2242

static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,

2240

static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,

2243

const uint8_t *buf, int oob_required)

2241

const uint8_t *buf, int oob_required)

2244

{

2242

{

2245

int i, eccsize = chip->ecc.size;

2243

int i, eccsize = chip->ecc.size;

2246

int eccbytes = chip->ecc.bytes;

2244

int eccbytes = chip->ecc.bytes;

2247

int eccsteps = chip->ecc.steps;

2245

int eccsteps = chip->ecc.steps;

2248

uint8_t *ecc_calc = chip->buffers->ecccalc;

2246

uint8_t *ecc_calc = chip->buffers->ecccalc;

2249

const uint8_t *p = buf;

2247

const uint8_t *p = buf;

2250

uint32_t *eccpos = chip->ecc.layout->eccpos;

2248

uint32_t *eccpos = chip->ecc.layout->eccpos;

2251

2249

2252

for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {

2250

for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {

2253

chip->ecc.hwctl(mtd, NAND_ECC_WRITE);

2251

chip->ecc.hwctl(mtd, NAND_ECC_WRITE);

2254

chip->write_buf(mtd, p, eccsize);

2252

chip->write_buf(mtd, p, eccsize);

2255

chip->ecc.calculate(mtd, p, &ecc_calc[i]);

2253

chip->ecc.calculate(mtd, p, &ecc_calc[i]);

2256

}

2254

}

2257

2255

2258

for (i = 0; i < chip->ecc.total; i++)

2256

for (i = 0; i < chip->ecc.total; i++)

2259

chip->oob_poi[eccpos[i]] = ecc_calc[i];

2257

chip->oob_poi[eccpos[i]] = ecc_calc[i];

2260

2258

2261

chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);

2259

chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);

2262

2260

2263

return 0;

2261

return 0;

2264

}

2262

}

2265

2263

2266

2264

2267

/**

2265

/**

2268

* nand_write_subpage_hwecc - [REPLACABLE] hardware ECC based subpage write

2266

* nand_write_subpage_hwecc - [REPLACABLE] hardware ECC based subpage write

2269

* @mtd: mtd info structure

2267

* @mtd: mtd info structure

2270

* @chip: nand chip info structure

2268

* @chip: nand chip info structure

2271

* @offset: column address of subpage within the page

2269

* @offset: column address of subpage within the page

2272

* @data_len: data length

2270

* @data_len: data length

2273

* @buf: data buffer

2271

* @buf: data buffer

2274

* @oob_required: must write chip->oob_poi to OOB

2272

* @oob_required: must write chip->oob_poi to OOB

2275

*/

2273

*/

2276

static int nand_write_subpage_hwecc(struct mtd_info *mtd,

2274

static int nand_write_subpage_hwecc(struct mtd_info *mtd,

2277

struct nand_chip *chip, uint32_t offset,

2275

struct nand_chip *chip, uint32_t offset,

2278

uint32_t data_len, const uint8_t *buf,

2276

uint32_t data_len, const uint8_t *buf,

2279

int oob_required)

2277

int oob_required)

2280

{

2278

{

2281

uint8_t *oob_buf = chip->oob_poi;

2279

uint8_t *oob_buf = chip->oob_poi;

2282

uint8_t *ecc_calc = chip->buffers->ecccalc;

2280

uint8_t *ecc_calc = chip->buffers->ecccalc;

2283

int ecc_size = chip->ecc.size;

2281

int ecc_size = chip->ecc.size;

2284

int ecc_bytes = chip->ecc.bytes;

2282

int ecc_bytes = chip->ecc.bytes;

2285

int ecc_steps = chip->ecc.steps;

2283

int ecc_steps = chip->ecc.steps;

2286

uint32_t *eccpos = chip->ecc.layout->eccpos;

2284

uint32_t *eccpos = chip->ecc.layout->eccpos;

2287

uint32_t start_step = offset / ecc_size;

2285

uint32_t start_step = offset / ecc_size;

2288

uint32_t end_step = (offset + data_len - 1) / ecc_size;

2286

uint32_t end_step = (offset + data_len - 1) / ecc_size;

2289

int oob_bytes = mtd->oobsize / ecc_steps;

2287

int oob_bytes = mtd->oobsize / ecc_steps;

2290

int step, i;

2288

int step, i;

2291

2289

2292

for (step = 0; step < ecc_steps; step++) {

2290

for (step = 0; step < ecc_steps; step++) {

2293

/* configure controller for WRITE access */

2291

/* configure controller for WRITE access */

2294

chip->ecc.hwctl(mtd, NAND_ECC_WRITE);

2292

chip->ecc.hwctl(mtd, NAND_ECC_WRITE);

2295

2293

2296

/* write data (untouched subpages already masked by 0xFF) */

2294

/* write data (untouched subpages already masked by 0xFF) */

2297

chip->write_buf(mtd, buf, ecc_size);

2295

chip->write_buf(mtd, buf, ecc_size);

2298

2296

2299

/* mask ECC of un-touched subpages by padding 0xFF */

2297

/* mask ECC of un-touched subpages by padding 0xFF */

2300

if ((step < start_step) || (step > end_step))

2298

if ((step < start_step) || (step > end_step))

2301

memset(ecc_calc, 0xff, ecc_bytes);

2299

memset(ecc_calc, 0xff, ecc_bytes);

2302

else

2300

else

2303

chip->ecc.calculate(mtd, buf, ecc_calc);

2301

chip->ecc.calculate(mtd, buf, ecc_calc);

2304

2302

2305

/* mask OOB of un-touched subpages by padding 0xFF */

2303

/* mask OOB of un-touched subpages by padding 0xFF */

2306

/* if oob_required, preserve OOB metadata of written subpage */

2304

/* if oob_required, preserve OOB metadata of written subpage */

2307

if (!oob_required || (step < start_step) || (step > end_step))

2305

if (!oob_required || (step < start_step) || (step > end_step))

2308

memset(oob_buf, 0xff, oob_bytes);

2306

memset(oob_buf, 0xff, oob_bytes);

2309

2307

2310

buf += ecc_size;

2308

buf += ecc_size;

2311

ecc_calc += ecc_bytes;

2309

ecc_calc += ecc_bytes;

2312

oob_buf += oob_bytes;

2310

oob_buf += oob_bytes;

2313

}

2311

}

2314

2312

2315

/* copy calculated ECC for whole page to chip->buffer->oob */

2313

/* copy calculated ECC for whole page to chip->buffer->oob */

2316

/* this include masked-value(0xFF) for unwritten subpages */

2314

/* this include masked-value(0xFF) for unwritten subpages */

2317

ecc_calc = chip->buffers->ecccalc;

2315

ecc_calc = chip->buffers->ecccalc;

2318

for (i = 0; i < chip->ecc.total; i++)

2316

for (i = 0; i < chip->ecc.total; i++)

2319

chip->oob_poi[eccpos[i]] = ecc_calc[i];

2317

chip->oob_poi[eccpos[i]] = ecc_calc[i];

2320

2318

2321

/* write OOB buffer to NAND device */

2319

/* write OOB buffer to NAND device */

2322

chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);

2320

chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);

2323

2321

2324

return 0;

2322

return 0;

2325

}

2323

}

2326

2324

2327

2325

2328

/**

2326

/**

2329

* nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write

2327

* nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write

2330

* @mtd: mtd info structure

2328

* @mtd: mtd info structure

2331

* @chip: nand chip info structure

2329

* @chip: nand chip info structure

2332

* @buf: data buffer

2330

* @buf: data buffer

2333

* @oob_required: must write chip->oob_poi to OOB

2331

* @oob_required: must write chip->oob_poi to OOB

2334

*

2332

*

2335

* The hw generator calculates the error syndrome automatically. Therefore we

2333

* The hw generator calculates the error syndrome automatically. Therefore we

2336

* need a special oob layout and handling.

2334

* need a special oob layout and handling.

2337

*/

2335

*/

2338

static int nand_write_page_syndrome(struct mtd_info *mtd,

2336

static int nand_write_page_syndrome(struct mtd_info *mtd,

2339

struct nand_chip *chip,

2337

struct nand_chip *chip,

2340

const uint8_t *buf, int oob_required)

2338

const uint8_t *buf, int oob_required)

2341

{

2339

{

2342

int i, eccsize = chip->ecc.size;

2340

int i, eccsize = chip->ecc.size;

2343

int eccbytes = chip->ecc.bytes;

2341

int eccbytes = chip->ecc.bytes;

2344

int eccsteps = chip->ecc.steps;

2342

int eccsteps = chip->ecc.steps;

2345

const uint8_t *p = buf;

2343

const uint8_t *p = buf;

2346

uint8_t *oob = chip->oob_poi;

2344

uint8_t *oob = chip->oob_poi;

2347

2345

2348

for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {

2346

for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {

2349

2347

2350

chip->ecc.hwctl(mtd, NAND_ECC_WRITE);

2348

chip->ecc.hwctl(mtd, NAND_ECC_WRITE);

2351

chip->write_buf(mtd, p, eccsize);

2349

chip->write_buf(mtd, p, eccsize);

2352

2350

2353

if (chip->ecc.prepad) {

2351

if (chip->ecc.prepad) {

2354

chip->write_buf(mtd, oob, chip->ecc.prepad);

2352

chip->write_buf(mtd, oob, chip->ecc.prepad);

2355

oob += chip->ecc.prepad;

2353

oob += chip->ecc.prepad;

2356

}

2354

}

2357

2355

2358

chip->ecc.calculate(mtd, p, oob);

2356

chip->ecc.calculate(mtd, p, oob);

2359

chip->write_buf(mtd, oob, eccbytes);

2357

chip->write_buf(mtd, oob, eccbytes);

2360

oob += eccbytes;

2358

oob += eccbytes;

2361

2359

2362

if (chip->ecc.postpad) {

2360

if (chip->ecc.postpad) {

2363

chip->write_buf(mtd, oob, chip->ecc.postpad);

2361

chip->write_buf(mtd, oob, chip->ecc.postpad);

2364

oob += chip->ecc.postpad;

2362

oob += chip->ecc.postpad;

2365

}

2363

}

2366

}

2364

}

2367

2365

2368

/* Calculate remaining oob bytes */

2366

/* Calculate remaining oob bytes */

2369

i = mtd->oobsize - (oob - chip->oob_poi);

2367

i = mtd->oobsize - (oob - chip->oob_poi);

2370

if (i)

2368

if (i)

2371

chip->write_buf(mtd, oob, i);

2369

chip->write_buf(mtd, oob, i);

2372

2370

2373

return 0;

2371

return 0;

2374

}

2372

}

2375

2373

2376

/**

2374

/**

2377

* nand_write_page - [REPLACEABLE] write one page

2375

* nand_write_page - [REPLACEABLE] write one page

2378

* @mtd: MTD device structure

2376

* @mtd: MTD device structure

2379

* @chip: NAND chip descriptor

2377

* @chip: NAND chip descriptor

2380

* @offset: address offset within the page

2378

* @offset: address offset within the page

2381

* @data_len: length of actual data to be written

2379

* @data_len: length of actual data to be written

2382

* @buf: the data to write

2380

* @buf: the data to write

2383

* @oob_required: must write chip->oob_poi to OOB

2381

* @oob_required: must write chip->oob_poi to OOB

2384

* @page: page number to write

2382

* @page: page number to write

2385

* @cached: cached programming

2383

* @cached: cached programming

2386

* @raw: use _raw version of write_page

2384

* @raw: use _raw version of write_page

2387

*/

2385

*/

2388

static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,

2386

static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,

2389

uint32_t offset, int data_len, const uint8_t *buf,

2387

uint32_t offset, int data_len, const uint8_t *buf,

2390

int oob_required, int page, int cached, int raw)

2388

int oob_required, int page, int cached, int raw)

2391

{

2389

{

2392

int status, subpage;

2390

int status, subpage;

2393

2391

2394

if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&

2392

if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&

2395

chip->ecc.write_subpage)

2393

chip->ecc.write_subpage)

2396

subpage = offset || (data_len < mtd->writesize);

2394

subpage = offset || (data_len < mtd->writesize);

2397

else

2395

else

2398

subpage = 0;

2396

subpage = 0;

2399

2397

2400

chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);

2398

chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);

2401

2399

2402

if (unlikely(raw))

2400

if (unlikely(raw))

2403

status = chip->ecc.write_page_raw(mtd, chip, buf,

2401

status = chip->ecc.write_page_raw(mtd, chip, buf,

2404

oob_required);

2402

oob_required);

2405

else if (subpage)

2403

else if (subpage)

2406

status = chip->ecc.write_subpage(mtd, chip, offset, data_len,

2404

status = chip->ecc.write_subpage(mtd, chip, offset, data_len,

2407

buf, oob_required);

2405

buf, oob_required);

2408

else

2406

else

2409

status = chip->ecc.write_page(mtd, chip, buf, oob_required);

2407

status = chip->ecc.write_page(mtd, chip, buf, oob_required);

2410

2408

2411

if (status < 0)

2409

if (status < 0)

2412

return status;

2410

return status;

2413

2411

2414

/*

2412

/*

2415

* Cached progamming disabled for now. Not sure if it's worth the

2413

* Cached progamming disabled for now. Not sure if it's worth the

2416

* trouble. The speed gain is not very impressive. (2.3->2.6Mib/s).

2414

* trouble. The speed gain is not very impressive. (2.3->2.6Mib/s).

2417

*/

2415

*/

2418

cached = 0;

2416

cached = 0;

2419

2417

2420

if (!cached || !NAND_HAS_CACHEPROG(chip)) {

2418

if (!cached || !NAND_HAS_CACHEPROG(chip)) {

2421

2419

2422

chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);

2420

chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);

2423

status = chip->waitfunc(mtd, chip);

2421

status = chip->waitfunc(mtd, chip);

2424

/*

2422

/*

2425

* See if operation failed and additional status checks are

2423

* See if operation failed and additional status checks are

2426

* available.

2424

* available.

2427

*/

2425

*/

2428

if ((status & NAND_STATUS_FAIL) && (chip->errstat))

2426

if ((status & NAND_STATUS_FAIL) && (chip->errstat))

2429

status = chip->errstat(mtd, chip, FL_WRITING, status,

2427

status = chip->errstat(mtd, chip, FL_WRITING, status,

2430

page);

2428

page);

2431

2429

2432

if (status & NAND_STATUS_FAIL)

2430

if (status & NAND_STATUS_FAIL)

2433

return -EIO;

2431

return -EIO;

2434

} else {

2432

} else {

2435

chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1);

2433

chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1);

2436

status = chip->waitfunc(mtd, chip);

2434

status = chip->waitfunc(mtd, chip);

2437

}

2435

}

2438

2436

2439

2437

2440

#ifdef __UBOOT__

2438

#ifdef __UBOOT__

2441

#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)

2439

#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)

2442

/* Send command to read back the data */

2440

/* Send command to read back the data */

2443

chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);

2441

chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);

2444

2442

2445

if (chip->verify_buf(mtd, buf, mtd->writesize))

2443

if (chip->verify_buf(mtd, buf, mtd->writesize))

2446

return -EIO;

2444

return -EIO;

2447

2445

2448

/* Make sure the next page prog is preceded by a status read */

2446

/* Make sure the next page prog is preceded by a status read */

2449

chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);

2447

chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);

2450

#endif

2448

#endif

2451

#endif

2449

#endif

2452

2450

2453

return 0;

2451

return 0;

2454

}

2452

}

2455

2453

2456

/**

2454

/**

2457

* nand_fill_oob - [INTERN] Transfer client buffer to oob

2455

* nand_fill_oob - [INTERN] Transfer client buffer to oob

2458

* @mtd: MTD device structure

2456

* @mtd: MTD device structure

2459

* @oob: oob data buffer

2457

* @oob: oob data buffer

2460

* @len: oob data write length

2458

* @len: oob data write length

2461

* @ops: oob ops structure

2459

* @ops: oob ops structure

2462

*/

2460

*/

2463

static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len,

2461

static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len,

2464

struct mtd_oob_ops *ops)

2462

struct mtd_oob_ops *ops)

2465

{

2463

{

2466

struct nand_chip *chip = mtd->priv;

2464

struct nand_chip *chip = mtd->priv;

2467

2465

2468

/*

2466

/*

2469

* Initialise to all 0xFF, to avoid the possibility of left over OOB

2467

* Initialise to all 0xFF, to avoid the possibility of left over OOB

2470

* data from a previous OOB read.

2468

* data from a previous OOB read.

2471

*/

2469

*/

2472

memset(chip->oob_poi, 0xff, mtd->oobsize);

2470

memset(chip->oob_poi, 0xff, mtd->oobsize);

2473

2471

2474

switch (ops->mode) {

2472

switch (ops->mode) {

2475

2473

2476

case MTD_OPS_PLACE_OOB:

2474

case MTD_OPS_PLACE_OOB:

2477

case MTD_OPS_RAW:

2475

case MTD_OPS_RAW:

2478

memcpy(chip->oob_poi + ops->ooboffs, oob, len);

2476

memcpy(chip->oob_poi + ops->ooboffs, oob, len);

2479

return oob + len;

2477

return oob + len;

2480

2478

2481

case MTD_OPS_AUTO_OOB: {

2479

case MTD_OPS_AUTO_OOB: {

2482

struct nand_oobfree *free = chip->ecc.layout->oobfree;

2480

struct nand_oobfree *free = chip->ecc.layout->oobfree;

2483

uint32_t boffs = 0, woffs = ops->ooboffs;

2481

uint32_t boffs = 0, woffs = ops->ooboffs;

2484

size_t bytes = 0;

2482

size_t bytes = 0;

2485

2483

2486

for (; free->length && len; free++, len -= bytes) {

2484

for (; free->length && len; free++, len -= bytes) {

2487

/* Write request not from offset 0? */

2485

/* Write request not from offset 0? */

2488

if (unlikely(woffs)) {

2486

if (unlikely(woffs)) {

2489

if (woffs >= free->length) {

2487

if (woffs >= free->length) {

2490

woffs -= free->length;

2488

woffs -= free->length;

2491

continue;

2489

continue;

2492

}

2490

}

2493

boffs = free->offset + woffs;

2491

boffs = free->offset + woffs;

2494

bytes = min_t(size_t, len,

2492

bytes = min_t(size_t, len,

2495

(free->length - woffs));

2493

(free->length - woffs));

2496

woffs = 0;

2494

woffs = 0;

2497

} else {

2495

} else {

2498

bytes = min_t(size_t, len, free->length);

2496

bytes = min_t(size_t, len, free->length);

2499

boffs = free->offset;

2497

boffs = free->offset;

2500

}

2498

}

2501

memcpy(chip->oob_poi + boffs, oob, bytes);

2499

memcpy(chip->oob_poi + boffs, oob, bytes);

2502

oob += bytes;

2500

oob += bytes;

2503

}

2501

}

2504

return oob;

2502

return oob;

2505

}

2503

}

2506

default:

2504

default:

2507

BUG();

2505

BUG();

2508

}

2506

}

2509

return NULL;

2507

return NULL;

2510

}

2508

}

2511

2509

2512

#define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0)

2510

#define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0)

2513

2511

2514

/**

2512

/**

2515

* nand_do_write_ops - [INTERN] NAND write with ECC

2513

* nand_do_write_ops - [INTERN] NAND write with ECC

2516

* @mtd: MTD device structure

2514

* @mtd: MTD device structure

2517

* @to: offset to write to

2515

* @to: offset to write to

2518

* @ops: oob operations description structure

2516

* @ops: oob operations description structure

2519

*

2517

*

2520

* NAND write with ECC.

2518

* NAND write with ECC.

2521

*/

2519

*/

2522

static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,

2520

static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,

2523

struct mtd_oob_ops *ops)

2521

struct mtd_oob_ops *ops)

2524

{

2522

{

2525

int chipnr, realpage, page, blockmask, column;

2523

int chipnr, realpage, page, blockmask, column;

2526

struct nand_chip *chip = mtd->priv;

2524

struct nand_chip *chip = mtd->priv;

2527

uint32_t writelen = ops->len;

2525

uint32_t writelen = ops->len;

2528

2526

2529

uint32_t oobwritelen = ops->ooblen;

2527

uint32_t oobwritelen = ops->ooblen;

2530

uint32_t oobmaxlen = ops->mode == MTD_OPS_AUTO_OOB ?

2528

uint32_t oobmaxlen = ops->mode == MTD_OPS_AUTO_OOB ?

2531

mtd->oobavail : mtd->oobsize;

2529

mtd->oobavail : mtd->oobsize;

2532

2530

2533

uint8_t *oob = ops->oobbuf;

2531

uint8_t *oob = ops->oobbuf;

2534

uint8_t *buf = ops->datbuf;

2532

uint8_t *buf = ops->datbuf;

2535

int ret;

2533

int ret;

2536

int oob_required = oob ? 1 : 0;

2534

int oob_required = oob ? 1 : 0;

2537

2535

2538

ops->retlen = 0;

2536

ops->retlen = 0;

2539

if (!writelen)

2537

if (!writelen)

2540

return 0;

2538

return 0;

2541

2539

2542

#ifndef __UBOOT__

2540

#ifndef __UBOOT__

2543

/* Reject writes, which are not page aligned */

2541

/* Reject writes, which are not page aligned */

2544

if (NOTALIGNED(to) || NOTALIGNED(ops->len)) {

2542

if (NOTALIGNED(to) || NOTALIGNED(ops->len)) {

2545

#else

2543

#else

2546

/* Reject writes, which are not page aligned */

2544

/* Reject writes, which are not page aligned */

2547

if (NOTALIGNED(to)) {

2545

if (NOTALIGNED(to)) {

2548

#endif

2546

#endif

2549

pr_notice("%s: attempt to write non page aligned data\n",

2547

pr_notice("%s: attempt to write non page aligned data\n",

2550

__func__);

2548

__func__);

2551

return -EINVAL;

2549

return -EINVAL;

2552

}

2550

}

2553

2551

2554

column = to & (mtd->writesize - 1);

2552

column = to & (mtd->writesize - 1);

2555

2553

2556

chipnr = (int)(to >> chip->chip_shift);

2554

chipnr = (int)(to >> chip->chip_shift);

2557

chip->select_chip(mtd, chipnr);

2555

chip->select_chip(mtd, chipnr);

2558

2556

2559

/* Check, if it is write protected */

2557

/* Check, if it is write protected */

2560

if (nand_check_wp(mtd)) {

2558

if (nand_check_wp(mtd)) {

2561

ret = -EIO;

2559

ret = -EIO;

2562

goto err_out;

2560

goto err_out;

2563

}

2561

}

2564

2562

2565

realpage = (int)(to >> chip->page_shift);

2563

realpage = (int)(to >> chip->page_shift);

2566

page = realpage & chip->pagemask;

2564

page = realpage & chip->pagemask;

2567

blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;

2565

blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;

2568

2566

2569

/* Invalidate the page cache, when we write to the cached page */

2567

/* Invalidate the page cache, when we write to the cached page */

2570

if (to <= (chip->pagebuf << chip->page_shift) &&

2568

if (to <= (chip->pagebuf << chip->page_shift) &&

2571

(chip->pagebuf << chip->page_shift) < (to + ops->len))

2569

(chip->pagebuf << chip->page_shift) < (to + ops->len))

2572

chip->pagebuf = -1;

2570

chip->pagebuf = -1;

2573

2571

2574

/* Don't allow multipage oob writes with offset */

2572

/* Don't allow multipage oob writes with offset */

2575

if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) {

2573

if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) {

2576

ret = -EINVAL;

2574

ret = -EINVAL;

2577

goto err_out;

2575

goto err_out;

2578

}

2576

}

2579

2577

2580

while (1) {

2578

while (1) {

2581

int bytes = mtd->writesize;

2579

int bytes = mtd->writesize;

2582

int cached = writelen > bytes && page != blockmask;

2580

int cached = writelen > bytes && page != blockmask;

2583

uint8_t *wbuf = buf;

2581

uint8_t *wbuf = buf;

2584

2582

2585

WATCHDOG_RESET();

2583

WATCHDOG_RESET();

2586

/* Partial page write? */

2584

/* Partial page write? */

2587

if (unlikely(column || writelen < (mtd->writesize - 1))) {

2585

if (unlikely(column || writelen < (mtd->writesize - 1))) {

2588

cached = 0;

2586

cached = 0;

2589

bytes = min_t(int, bytes - column, (int) writelen);

2587

bytes = min_t(int, bytes - column, (int) writelen);

2590

chip->pagebuf = -1;

2588

chip->pagebuf = -1;

2591

memset(chip->buffers->databuf, 0xff, mtd->writesize);

2589

memset(chip->buffers->databuf, 0xff, mtd->writesize);

2592

memcpy(&chip->buffers->databuf[column], buf, bytes);

2590

memcpy(&chip->buffers->databuf[column], buf, bytes);

2593

wbuf = chip->buffers->databuf;

2591

wbuf = chip->buffers->databuf;

2594

}

2592

}

2595

2593

2596

if (unlikely(oob)) {

2594

if (unlikely(oob)) {

2597

size_t len = min(oobwritelen, oobmaxlen);

2595

size_t len = min(oobwritelen, oobmaxlen);

2598

oob = nand_fill_oob(mtd, oob, len, ops);

2596

oob = nand_fill_oob(mtd, oob, len, ops);

2599

oobwritelen -= len;

2597

oobwritelen -= len;

2600

} else {

2598

} else {

2601

/* We still need to erase leftover OOB data */

2599

/* We still need to erase leftover OOB data */

2602

memset(chip->oob_poi, 0xff, mtd->oobsize);

2600

memset(chip->oob_poi, 0xff, mtd->oobsize);

2603

}

2601

}

2604

ret = chip->write_page(mtd, chip, column, bytes, wbuf,

2602

ret = chip->write_page(mtd, chip, column, bytes, wbuf,

2605

oob_required, page, cached,

2603

oob_required, page, cached,

2606

(ops->mode == MTD_OPS_RAW));

2604

(ops->mode == MTD_OPS_RAW));

2607

if (ret)

2605

if (ret)

2608

break;

2606

break;

2609

2607

2610

writelen -= bytes;

2608

writelen -= bytes;

2611

if (!writelen)

2609

if (!writelen)

2612

break;

2610

break;

2613

2611

2614

column = 0;

2612

column = 0;

2615

buf += bytes;

2613

buf += bytes;

2616

realpage++;

2614

realpage++;

2617

2615

2618

page = realpage & chip->pagemask;

2616

page = realpage & chip->pagemask;

2619

/* Check, if we cross a chip boundary */

2617

/* Check, if we cross a chip boundary */

2620

if (!page) {

2618

if (!page) {

2621

chipnr++;

2619

chipnr++;

2622

chip->select_chip(mtd, -1);

2620

chip->select_chip(mtd, -1);

2623

chip->select_chip(mtd, chipnr);

2621

chip->select_chip(mtd, chipnr);

2624

}

2622

}

2625

}

2623

}

2626

2624

2627

ops->retlen = ops->len - writelen;

2625

ops->retlen = ops->len - writelen;

2628

if (unlikely(oob))

2626

if (unlikely(oob))

2629

ops->oobretlen = ops->ooblen;

2627

ops->oobretlen = ops->ooblen;

2630

2628

2631

err_out:

2629

err_out:

2632

chip->select_chip(mtd, -1);

2630

chip->select_chip(mtd, -1);

2633

return ret;

2631

return ret;

2634

}

2632

}

2635

2633

2636

/**

2634

/**

2637

* panic_nand_write - [MTD Interface] NAND write with ECC

2635

* panic_nand_write - [MTD Interface] NAND write with ECC

2638

* @mtd: MTD device structure

2636

* @mtd: MTD device structure

2639

* @to: offset to write to

2637

* @to: offset to write to

2640

* @len: number of bytes to write

2638

* @len: number of bytes to write

2641

* @retlen: pointer to variable to store the number of written bytes

2639

* @retlen: pointer to variable to store the number of written bytes

2642

* @buf: the data to write

2640

* @buf: the data to write

2643

*

2641

*

2644

* NAND write with ECC. Used when performing writes in interrupt context, this

2642

* NAND write with ECC. Used when performing writes in interrupt context, this

2645

* may for example be called by mtdoops when writing an oops while in panic.

2643

* may for example be called by mtdoops when writing an oops while in panic.

2646

*/

2644

*/

2647

static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len,

2645

static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len,

2648

size_t *retlen, const uint8_t *buf)

2646

size_t *retlen, const uint8_t *buf)

2649

{

2647

{

2650

struct nand_chip *chip = mtd->priv;

2648

struct nand_chip *chip = mtd->priv;

2651

struct mtd_oob_ops ops;

2649

struct mtd_oob_ops ops;

2652

int ret;

2650

int ret;

2653

2651

2654

/* Wait for the device to get ready */

2652

/* Wait for the device to get ready */

2655

panic_nand_wait(mtd, chip, 400);

2653

panic_nand_wait(mtd, chip, 400);

2656

2654

2657

/* Grab the device */

2655

/* Grab the device */

2658

panic_nand_get_device(chip, mtd, FL_WRITING);

2656

panic_nand_get_device(chip, mtd, FL_WRITING);

2659

2657

2660

ops.len = len;

2658

ops.len = len;

2661

ops.datbuf = (uint8_t *)buf;

2659

ops.datbuf = (uint8_t *)buf;

2662

ops.oobbuf = NULL;

2660

ops.oobbuf = NULL;

2663

ops.mode = MTD_OPS_PLACE_OOB;

2661

ops.mode = MTD_OPS_PLACE_OOB;

2664

2662

2665

ret = nand_do_write_ops(mtd, to, &ops);

2663

ret = nand_do_write_ops(mtd, to, &ops);

2666

2664

2667

*retlen = ops.retlen;

2665

*retlen = ops.retlen;

2668

return ret;

2666

return ret;

2669

}

2667

}

2670

2668

2671

/**

2669

/**

2672

* nand_write - [MTD Interface] NAND write with ECC

2670

* nand_write - [MTD Interface] NAND write with ECC

2673

* @mtd: MTD device structure

2671

* @mtd: MTD device structure

2674

* @to: offset to write to

2672

* @to: offset to write to

2675

* @len: number of bytes to write

2673

* @len: number of bytes to write

2676

* @retlen: pointer to variable to store the number of written bytes

2674

* @retlen: pointer to variable to store the number of written bytes

2677

* @buf: the data to write

2675

* @buf: the data to write

2678

*

2676

*

2679

* NAND write with ECC.

2677

* NAND write with ECC.

2680

*/

2678

*/

2681

static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,

2679

static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,

2682

size_t *retlen, const uint8_t *buf)

2680

size_t *retlen, const uint8_t *buf)

2683

{

2681

{

2684

struct mtd_oob_ops ops;

2682

struct mtd_oob_ops ops;

2685

int ret;

2683

int ret;

2686

2684

2687

nand_get_device(mtd, FL_WRITING);

2685

nand_get_device(mtd, FL_WRITING);

2688

ops.len = len;

2686

ops.len = len;

2689

ops.datbuf = (uint8_t *)buf;

2687

ops.datbuf = (uint8_t *)buf;

2690

ops.oobbuf = NULL;

2688

ops.oobbuf = NULL;

2691

ops.mode = MTD_OPS_PLACE_OOB;

2689

ops.mode = MTD_OPS_PLACE_OOB;

2692

ret = nand_do_write_ops(mtd, to, &ops);

2690

ret = nand_do_write_ops(mtd, to, &ops);

2693

*retlen = ops.retlen;

2691

*retlen = ops.retlen;

2694

nand_release_device(mtd);

2692

nand_release_device(mtd);

2695

return ret;

2693

return ret;

2696

}

2694

}

2697

2695

2698

/**

2696

/**

2699

* nand_do_write_oob - [MTD Interface] NAND write out-of-band

2697

* nand_do_write_oob - [MTD Interface] NAND write out-of-band

2700

* @mtd: MTD device structure

2698

* @mtd: MTD device structure

2701

* @to: offset to write to

2699

* @to: offset to write to

2702

* @ops: oob operation description structure

2700

* @ops: oob operation description structure

2703

*

2701

*

2704

* NAND write out-of-band.

2702

* NAND write out-of-band.

2705

*/

2703

*/

2706

static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,

2704

static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,

2707

struct mtd_oob_ops *ops)

2705

struct mtd_oob_ops *ops)

2708

{

2706

{

2709

int chipnr, page, status, len;

2707

int chipnr, page, status, len;

2710

struct nand_chip *chip = mtd->priv;

2708

struct nand_chip *chip = mtd->priv;

2711

2709

2712

pr_debug("%s: to = 0x%08x, len = %i\n",

2710

pr_debug("%s: to = 0x%08x, len = %i\n",

2713

__func__, (unsigned int)to, (int)ops->ooblen);

2711

__func__, (unsigned int)to, (int)ops->ooblen);

2714

2712

2715

if (ops->mode == MTD_OPS_AUTO_OOB)

2713

if (ops->mode == MTD_OPS_AUTO_OOB)

2716

len = chip->ecc.layout->oobavail;

2714

len = chip->ecc.layout->oobavail;

2717

else

2715

else

2718

len = mtd->oobsize;

2716

len = mtd->oobsize;

2719

2717

2720

/* Do not allow write past end of page */

2718

/* Do not allow write past end of page */

2721

if ((ops->ooboffs + ops->ooblen) > len) {

2719

if ((ops->ooboffs + ops->ooblen) > len) {

2722

pr_debug("%s: attempt to write past end of page\n",

2720

pr_debug("%s: attempt to write past end of page\n",

2723

__func__);

2721

__func__);

2724

return -EINVAL;

2722

return -EINVAL;

2725

}

2723

}

2726

2724

2727

if (unlikely(ops->ooboffs >= len)) {

2725

if (unlikely(ops->ooboffs >= len)) {

2728

pr_debug("%s: attempt to start write outside oob\n",

2726

pr_debug("%s: attempt to start write outside oob\n",

2729

__func__);

2727

__func__);

2730

return -EINVAL;

2728

return -EINVAL;

2731

}

2729

}

2732

2730

2733

/* Do not allow write past end of device */

2731

/* Do not allow write past end of device */

2734

if (unlikely(to >= mtd->size ||

2732

if (unlikely(to >= mtd->size ||

2735

ops->ooboffs + ops->ooblen >

2733

ops->ooboffs + ops->ooblen >

2736

((mtd->size >> chip->page_shift) -

2734

((mtd->size >> chip->page_shift) -

2737

(to >> chip->page_shift)) * len)) {

2735

(to >> chip->page_shift)) * len)) {

2738

pr_debug("%s: attempt to write beyond end of device\n",

2736

pr_debug("%s: attempt to write beyond end of device\n",

2739

__func__);

2737

__func__);

2740

return -EINVAL;

2738

return -EINVAL;

2741

}

2739

}

2742

2740

2743

chipnr = (int)(to >> chip->chip_shift);

2741

chipnr = (int)(to >> chip->chip_shift);

2744

chip->select_chip(mtd, chipnr);

2742

chip->select_chip(mtd, chipnr);

2745

2743

2746

/* Shift to get page */

2744

/* Shift to get page */

2747

page = (int)(to >> chip->page_shift);

2745

page = (int)(to >> chip->page_shift);

2748

2746

2749

/*

2747

/*

2750

* Reset the chip. Some chips (like the Toshiba TC5832DC found in one

2748

* Reset the chip. Some chips (like the Toshiba TC5832DC found in one

2751

* of my DiskOnChip 2000 test units) will clear the whole data page too

2749

* of my DiskOnChip 2000 test units) will clear the whole data page too

2752

* if we don't do this. I have no clue why, but I seem to have 'fixed'

2750

* if we don't do this. I have no clue why, but I seem to have 'fixed'

2753

* it in the doc2000 driver in August 1999. dwmw2.

2751

* it in the doc2000 driver in August 1999. dwmw2.

2754

*/

2752

*/

2755

chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);

2753

chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);

2756

2754

2757

/* Check, if it is write protected */

2755

/* Check, if it is write protected */

2758

if (nand_check_wp(mtd)) {

2756

if (nand_check_wp(mtd)) {

2759

chip->select_chip(mtd, -1);

2757

chip->select_chip(mtd, -1);

2760

return -EROFS;

2758

return -EROFS;

2761

}

2759

}

2762

2760

2763

/* Invalidate the page cache, if we write to the cached page */

2761

/* Invalidate the page cache, if we write to the cached page */

2764

if (page == chip->pagebuf)

2762

if (page == chip->pagebuf)

2765

chip->pagebuf = -1;

2763

chip->pagebuf = -1;

2766

2764

2767

nand_fill_oob(mtd, ops->oobbuf, ops->ooblen, ops);

2765

nand_fill_oob(mtd, ops->oobbuf, ops->ooblen, ops);

2768

2766

2769

if (ops->mode == MTD_OPS_RAW)

2767

if (ops->mode == MTD_OPS_RAW)

2770

status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask);

2768

status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask);

2771

else

2769

else

2772

status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask);

2770

status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask);

2773

2771

2774

chip->select_chip(mtd, -1);

2772

chip->select_chip(mtd, -1);

2775

2773

2776

if (status)

2774

if (status)

2777

return status;

2775

return status;

2778

2776

2779

ops->oobretlen = ops->ooblen;

2777

ops->oobretlen = ops->ooblen;

2780

2778

2781

return 0;

2779

return 0;

2782

}

2780

}

2783

2781

2784

/**

2782

/**

2785

* nand_write_oob - [MTD Interface] NAND write data and/or out-of-band

2783

* nand_write_oob - [MTD Interface] NAND write data and/or out-of-band

2786

* @mtd: MTD device structure

2784

* @mtd: MTD device structure

2787

* @to: offset to write to

2785

* @to: offset to write to

2788

* @ops: oob operation description structure

2786

* @ops: oob operation description structure

2789

*/

2787

*/

2790

static int nand_write_oob(struct mtd_info *mtd, loff_t to,

2788

static int nand_write_oob(struct mtd_info *mtd, loff_t to,

2791

struct mtd_oob_ops *ops)

2789

struct mtd_oob_ops *ops)

2792

{

2790

{

2793

int ret = -ENOTSUPP;

2791

int ret = -ENOTSUPP;

2794

2792

2795

ops->retlen = 0;

2793

ops->retlen = 0;

2796

2794

2797

/* Do not allow writes past end of device */

2795

/* Do not allow writes past end of device */

2798

if (ops->datbuf && (to + ops->len) > mtd->size) {

2796

if (ops->datbuf && (to + ops->len) > mtd->size) {

2799

pr_debug("%s: attempt to write beyond end of device\n",

2797

pr_debug("%s: attempt to write beyond end of device\n",

2800

__func__);

2798

__func__);

2801

return -EINVAL;

2799

return -EINVAL;

2802

}

2800

}

2803

2801

2804

nand_get_device(mtd, FL_WRITING);

2802

nand_get_device(mtd, FL_WRITING);

2805

2803

2806

switch (ops->mode) {

2804

switch (ops->mode) {

2807

case MTD_OPS_PLACE_OOB:

2805

case MTD_OPS_PLACE_OOB:

2808

case MTD_OPS_AUTO_OOB:

2806

case MTD_OPS_AUTO_OOB:

2809

case MTD_OPS_RAW:

2807

case MTD_OPS_RAW:

2810

break;

2808

break;

2811

2809

2812

default:

2810

default:

2813

goto out;

2811

goto out;

2814

}

2812

}

2815

2813

2816

if (!ops->datbuf)

2814

if (!ops->datbuf)

2817

ret = nand_do_write_oob(mtd, to, ops);

2815

ret = nand_do_write_oob(mtd, to, ops);

2818

else

2816

else

2819

ret = nand_do_write_ops(mtd, to, ops);

2817

ret = nand_do_write_ops(mtd, to, ops);

2820

2818

2821

out:

2819

out:

2822

nand_release_device(mtd);

2820

nand_release_device(mtd);

2823

return ret;

2821

return ret;

2824

}

2822

}

2825

2823

2826

/**

2824

/**

2827

* single_erase_cmd - [GENERIC] NAND standard block erase command function

2825

* single_erase_cmd - [GENERIC] NAND standard block erase command function

2828

* @mtd: MTD device structure

2826

* @mtd: MTD device structure

2829

* @page: the page address of the block which will be erased

2827

* @page: the page address of the block which will be erased

2830

*

2828

*

2831

* Standard erase command for NAND chips.

2829

* Standard erase command for NAND chips.

2832

*/

2830

*/

2833

static void single_erase_cmd(struct mtd_info *mtd, int page)

2831

static void single_erase_cmd(struct mtd_info *mtd, int page)

2834

{

2832

{

2835

struct nand_chip *chip = mtd->priv;

2833

struct nand_chip *chip = mtd->priv;

2836

/* Send commands to erase a block */

2834

/* Send commands to erase a block */

2837

chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);

2835

chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);

2838

chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);

2836

chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);

2839

}

2837

}

2840

2838

2841

/**

2839

/**

2842

* nand_erase - [MTD Interface] erase block(s)

2840

* nand_erase - [MTD Interface] erase block(s)

2843

* @mtd: MTD device structure

2841

* @mtd: MTD device structure

2844

* @instr: erase instruction

2842

* @instr: erase instruction

2845

*

2843

*

2846

* Erase one ore more blocks.

2844

* Erase one ore more blocks.

2847

*/

2845

*/

2848

static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)

2846

static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)

2849

{

2847

{

2850

return nand_erase_nand(mtd, instr, 0);

2848

return nand_erase_nand(mtd, instr, 0);

2851

}

2849

}

2852

2850

2853

/**

2851

/**

2854

* nand_erase_nand - [INTERN] erase block(s)

2852

* nand_erase_nand - [INTERN] erase block(s)

2855

* @mtd: MTD device structure

2853

* @mtd: MTD device structure

2856

* @instr: erase instruction

2854

* @instr: erase instruction

2857

* @allowbbt: allow erasing the bbt area

2855

* @allowbbt: allow erasing the bbt area

2858

*

2856

*

2859

* Erase one ore more blocks.

2857

* Erase one ore more blocks.

2860

*/

2858

*/

2861

int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,

2859

int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,

2862

int allowbbt)

2860

int allowbbt)

2863

{

2861

{

2864

int page, status, pages_per_block, ret, chipnr;

2862

int page, status, pages_per_block, ret, chipnr;

2865

struct nand_chip *chip = mtd->priv;

2863

struct nand_chip *chip = mtd->priv;

2866

loff_t len;

2864

loff_t len;

2867

2865

2868

pr_debug("%s: start = 0x%012llx, len = %llu\n",

2866

pr_debug("%s: start = 0x%012llx, len = %llu\n",

2869

__func__, (unsigned long long)instr->addr,

2867

__func__, (unsigned long long)instr->addr,

2870

(unsigned long long)instr->len);

2868

(unsigned long long)instr->len);

2871

2869

2872

if (check_offs_len(mtd, instr->addr, instr->len))

2870

if (check_offs_len(mtd, instr->addr, instr->len))

2873

return -EINVAL;

2871

return -EINVAL;

2874

2872

2875

/* Grab the lock and see if the device is available */

2873

/* Grab the lock and see if the device is available */

2876

nand_get_device(mtd, FL_ERASING);

2874

nand_get_device(mtd, FL_ERASING);

2877

2875

2878

/* Shift to get first page */

2876

/* Shift to get first page */

2879

page = (int)(instr->addr >> chip->page_shift);

2877

page = (int)(instr->addr >> chip->page_shift);

2880

chipnr = (int)(instr->addr >> chip->chip_shift);

2878

chipnr = (int)(instr->addr >> chip->chip_shift);

2881

2879

2882

/* Calculate pages in each block */

2880

/* Calculate pages in each block */

2883

pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);

2881

pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);

2884

2882

2885

/* Select the NAND device */

2883

/* Select the NAND device */

2886

chip->select_chip(mtd, chipnr);

2884

chip->select_chip(mtd, chipnr);

2887

2885

2888

/* Check, if it is write protected */

2886

/* Check, if it is write protected */

2889

if (nand_check_wp(mtd)) {

2887

if (nand_check_wp(mtd)) {

2890

pr_debug("%s: device is write protected!\n",

2888

pr_debug("%s: device is write protected!\n",

2891

__func__);

2889

__func__);

2892

instr->state = MTD_ERASE_FAILED;

2890

instr->state = MTD_ERASE_FAILED;

2893

goto erase_exit;

2891

goto erase_exit;

2894

}

2892

}

2895

2893

2896

/* Loop through the pages */

2894

/* Loop through the pages */

2897

len = instr->len;

2895

len = instr->len;

2898

2896

2899

instr->state = MTD_ERASING;

2897

instr->state = MTD_ERASING;

2900

2898

2901

while (len) {

2899

while (len) {

2902

WATCHDOG_RESET();

2900

WATCHDOG_RESET();

2903

2901

2904

/* Check if we have a bad block, we do not erase bad blocks! */

2902

/* Check if we have a bad block, we do not erase bad blocks! */

2905

if (nand_block_checkbad(mtd, ((loff_t) page) <<

2903

if (nand_block_checkbad(mtd, ((loff_t) page) <<

2906

chip->page_shift, 0, allowbbt)) {

2904

chip->page_shift, 0, allowbbt)) {

2907

pr_warn("%s: attempt to erase a bad block at page 0x%08x\n",

2905

pr_warn("%s: attempt to erase a bad block at page 0x%08x\n",

2908

__func__, page);

2906

__func__, page);

2909

instr->state = MTD_ERASE_FAILED;

2907

instr->state = MTD_ERASE_FAILED;

2910

goto erase_exit;

2908

goto erase_exit;

2911

}

2909

}

2912

2910

2913

/*

2911

/*

2914

* Invalidate the page cache, if we erase the block which

2912

* Invalidate the page cache, if we erase the block which

2915

* contains the current cached page.

2913

* contains the current cached page.

2916

*/

2914

*/

2917

if (page <= chip->pagebuf && chip->pagebuf <

2915

if (page <= chip->pagebuf && chip->pagebuf <

2918

(page + pages_per_block))

2916

(page + pages_per_block))

2919

chip->pagebuf = -1;

2917

chip->pagebuf = -1;

2920

2918

2921

chip->erase_cmd(mtd, page & chip->pagemask);

2919

chip->erase_cmd(mtd, page & chip->pagemask);

2922

2920

2923

status = chip->waitfunc(mtd, chip);

2921

status = chip->waitfunc(mtd, chip);

2924

2922

2925

/*

2923

/*

2926

* See if operation failed and additional status checks are

2924

* See if operation failed and additional status checks are

2927

* available

2925

* available

2928

*/

2926

*/

2929

if ((status & NAND_STATUS_FAIL) && (chip->errstat))

2927

if ((status & NAND_STATUS_FAIL) && (chip->errstat))

2930

status = chip->errstat(mtd, chip, FL_ERASING,

2928

status = chip->errstat(mtd, chip, FL_ERASING,

2931

status, page);

2929

status, page);

2932

2930

2933

/* See if block erase succeeded */

2931

/* See if block erase succeeded */

2934

if (status & NAND_STATUS_FAIL) {

2932

if (status & NAND_STATUS_FAIL) {

2935

pr_debug("%s: failed erase, page 0x%08x\n",

2933

pr_debug("%s: failed erase, page 0x%08x\n",

2936

__func__, page);

2934

__func__, page);

2937

instr->state = MTD_ERASE_FAILED;

2935

instr->state = MTD_ERASE_FAILED;

2938

instr->fail_addr =

2936

instr->fail_addr =

2939

((loff_t)page << chip->page_shift);

2937

((loff_t)page << chip->page_shift);

2940

goto erase_exit;

2938

goto erase_exit;

2941

}

2939

}

2942

2940

2943

/* Increment page address and decrement length */

2941

/* Increment page address and decrement length */

2944

len -= (1ULL << chip->phys_erase_shift);

2942

len -= (1ULL << chip->phys_erase_shift);

2945

page += pages_per_block;

2943

page += pages_per_block;

2946

2944

2947

/* Check, if we cross a chip boundary */

2945

/* Check, if we cross a chip boundary */

2948

if (len && !(page & chip->pagemask)) {

2946

if (len && !(page & chip->pagemask)) {

2949

chipnr++;

2947

chipnr++;

2950

chip->select_chip(mtd, -1);

2948

chip->select_chip(mtd, -1);

2951

chip->select_chip(mtd, chipnr);

2949

chip->select_chip(mtd, chipnr);

2952

}

2950

}

2953

}

2951

}

2954

instr->state = MTD_ERASE_DONE;

2952

instr->state = MTD_ERASE_DONE;

2955

2953

2956

erase_exit:

2954

erase_exit:

2957

2955

2958

ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;

2956

ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;

2959

2957

2960

/* Deselect and wake up anyone waiting on the device */

2958

/* Deselect and wake up anyone waiting on the device */

2961

chip->select_chip(mtd, -1);

2959

chip->select_chip(mtd, -1);

2962

nand_release_device(mtd);

2960

nand_release_device(mtd);

2963

2961

2964

/* Do call back function */

2962

/* Do call back function */

2965

if (!ret)

2963

if (!ret)

2966

mtd_erase_callback(instr);

2964

mtd_erase_callback(instr);

2967

2965

2968

/* Return more or less happy */

2966

/* Return more or less happy */

2969

return ret;

2967

return ret;

2970

}

2968

}

2971

2969

2972

/**

2970

/**

2973

* nand_sync - [MTD Interface] sync

2971

* nand_sync - [MTD Interface] sync

2974

* @mtd: MTD device structure

2972

* @mtd: MTD device structure

2975

*

2973

*

2976

* Sync is actually a wait for chip ready function.

2974

* Sync is actually a wait for chip ready function.

2977

*/

2975

*/

2978

static void nand_sync(struct mtd_info *mtd)

2976

static void nand_sync(struct mtd_info *mtd)

2979

{

2977

{

2980

pr_debug("%s: called\n", __func__);

2978

pr_debug("%s: called\n", __func__);

2981

2979

2982

/* Grab the lock and see if the device is available */

2980

/* Grab the lock and see if the device is available */

2983

nand_get_device(mtd, FL_SYNCING);

2981

nand_get_device(mtd, FL_SYNCING);

2984

/* Release it and go back */

2982

/* Release it and go back */

2985

nand_release_device(mtd);

2983

nand_release_device(mtd);

2986

}

2984

}

2987

2985

2988

/**

2986

/**

2989

* nand_block_isbad - [MTD Interface] Check if block at offset is bad

2987

* nand_block_isbad - [MTD Interface] Check if block at offset is bad

2990

* @mtd: MTD device structure

2988

* @mtd: MTD device structure

2991

* @offs: offset relative to mtd start

2989

* @offs: offset relative to mtd start

2992

*/

2990

*/

2993

static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)

2991

static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)

2994

{

2992

{

2995

return nand_block_checkbad(mtd, offs, 1, 0);

2993

return nand_block_checkbad(mtd, offs, 1, 0);

2996

}

2994

}

2997

2995

2998

/**

2996

/**

2999

* nand_block_markbad - [MTD Interface] Mark block at the given offset as bad

2997

* nand_block_markbad - [MTD Interface] Mark block at the given offset as bad

3000

* @mtd: MTD device structure

2998

* @mtd: MTD device structure

3001

* @ofs: offset relative to mtd start

2999

* @ofs: offset relative to mtd start

3002

*/

3000

*/

3003

static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)

3001

static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)

3004

{

3002

{

3005

int ret;

3003

int ret;

3006

3004

3007

ret = nand_block_isbad(mtd, ofs);

3005

ret = nand_block_isbad(mtd, ofs);

3008

if (ret) {

3006

if (ret) {

3009

/* If it was bad already, return success and do nothing */

3007

/* If it was bad already, return success and do nothing */

3010

if (ret > 0)

3008

if (ret > 0)

3011

return 0;

3009

return 0;

3012

return ret;

3010

return ret;

3013

}

3011

}

3014

3012

3015

return nand_block_markbad_lowlevel(mtd, ofs);

3013

return nand_block_markbad_lowlevel(mtd, ofs);

3016

}

3014

}

3017

3015

3018

/**

3016

/**

3019

* nand_onfi_set_features- [REPLACEABLE] set features for ONFI nand

3017

* nand_onfi_set_features- [REPLACEABLE] set features for ONFI nand

3020

* @mtd: MTD device structure

3018

* @mtd: MTD device structure

3021

* @chip: nand chip info structure

3019

* @chip: nand chip info structure

3022

* @addr: feature address.

3020

* @addr: feature address.

3023

* @subfeature_param: the subfeature parameters, a four bytes array.

3021

* @subfeature_param: the subfeature parameters, a four bytes array.

3024

*/

3022

*/

3025

static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip,

3023

static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip,

3026

int addr, uint8_t *subfeature_param)

3024

int addr, uint8_t *subfeature_param)

3027

{

3025

{

3028

int status;

3026

int status;

3029

int i;

3027

int i;

3030

3028

3031

#ifdef CONFIG_SYS_NAND_ONFI_DETECTION

3029

#ifdef CONFIG_SYS_NAND_ONFI_DETECTION

3032

if (!chip->onfi_version ||

3030

if (!chip->onfi_version ||

3033

!(le16_to_cpu(chip->onfi_params.opt_cmd)

3031

!(le16_to_cpu(chip->onfi_params.opt_cmd)

3034

& ONFI_OPT_CMD_SET_GET_FEATURES))

3032

& ONFI_OPT_CMD_SET_GET_FEATURES))

3035

return -EINVAL;

3033

return -EINVAL;

3036

#endif

3034

#endif

3037

3035

3038

chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, addr, -1);

3036

chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, addr, -1);

3039

for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)

3037

for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)

3040

chip->write_byte(mtd, subfeature_param[i]);

3038

chip->write_byte(mtd, subfeature_param[i]);

3041

3039

3042

status = chip->waitfunc(mtd, chip);

3040

status = chip->waitfunc(mtd, chip);

3043

if (status & NAND_STATUS_FAIL)

3041

if (status & NAND_STATUS_FAIL)

3044

return -EIO;

3042

return -EIO;

3045

return 0;

3043

return 0;

3046

}

3044

}

3047

3045

3048

/**

3046

/**

3049

* nand_onfi_get_features- [REPLACEABLE] get features for ONFI nand

3047

* nand_onfi_get_features- [REPLACEABLE] get features for ONFI nand

3050

* @mtd: MTD device structure

3048

* @mtd: MTD device structure

3051

* @chip: nand chip info structure

3049

* @chip: nand chip info structure

3052

* @addr: feature address.

3050

* @addr: feature address.

3053

* @subfeature_param: the subfeature parameters, a four bytes array.

3051

* @subfeature_param: the subfeature parameters, a four bytes array.

3054

*/

3052

*/

3055

static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip,

3053

static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip,

3056

int addr, uint8_t *subfeature_param)

3054

int addr, uint8_t *subfeature_param)

3057

{

3055

{

3058

int i;

3056

int i;

3059

3057

3060

#ifdef CONFIG_SYS_NAND_ONFI_DETECTION

3058

#ifdef CONFIG_SYS_NAND_ONFI_DETECTION

3061

if (!chip->onfi_version ||

3059

if (!chip->onfi_version ||

3062

!(le16_to_cpu(chip->onfi_params.opt_cmd)

3060

!(le16_to_cpu(chip->onfi_params.opt_cmd)

3063

& ONFI_OPT_CMD_SET_GET_FEATURES))

3061

& ONFI_OPT_CMD_SET_GET_FEATURES))

3064

return -EINVAL;

3062

return -EINVAL;

3065

#endif

3063

#endif

3066

3064

3067

/* clear the sub feature parameters */

3065

/* clear the sub feature parameters */

3068

memset(subfeature_param, 0, ONFI_SUBFEATURE_PARAM_LEN);

3066

memset(subfeature_param, 0, ONFI_SUBFEATURE_PARAM_LEN);

3069

3067

3070

chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, addr, -1);

3068

chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, addr, -1);

3071

for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)

3069

for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)

3072

*subfeature_param++ = chip->read_byte(mtd);

3070

*subfeature_param++ = chip->read_byte(mtd);

3073

return 0;

3071

return 0;

3074

}

3072

}

3075

3073

3076

#ifndef __UBOOT__

3074

#ifndef __UBOOT__

3077

/**

3075

/**

3078

* nand_suspend - [MTD Interface] Suspend the NAND flash

3076

* nand_suspend - [MTD Interface] Suspend the NAND flash

3079

* @mtd: MTD device structure

3077

* @mtd: MTD device structure

3080

*/

3078

*/

3081

static int nand_suspend(struct mtd_info *mtd)

3079

static int nand_suspend(struct mtd_info *mtd)

3082

{

3080

{

3083

return nand_get_device(mtd, FL_PM_SUSPENDED);

3081

return nand_get_device(mtd, FL_PM_SUSPENDED);

3084

}

3082

}

3085

3083

3086

/**

3084

/**

3087

* nand_resume - [MTD Interface] Resume the NAND flash

3085

* nand_resume - [MTD Interface] Resume the NAND flash

3088

* @mtd: MTD device structure

3086

* @mtd: MTD device structure

3089

*/

3087

*/

3090

static void nand_resume(struct mtd_info *mtd)

3088

static void nand_resume(struct mtd_info *mtd)

3091

{

3089

{

3092

struct nand_chip *chip = mtd->priv;

3090

struct nand_chip *chip = mtd->priv;

3093

3091

3094

if (chip->state == FL_PM_SUSPENDED)

3092

if (chip->state == FL_PM_SUSPENDED)

3095

nand_release_device(mtd);

3093

nand_release_device(mtd);

3096

else

3094

else

3097

pr_err("%s called for a chip which is not in suspended state\n",

3095

pr_err("%s called for a chip which is not in suspended state\n",

3098

__func__);

3096

__func__);

3099

}

3097

}

3100

#endif

3098

#endif

3101

3099

3102

/* Set default functions */

3100

/* Set default functions */

3103

static void nand_set_defaults(struct nand_chip *chip, int busw)

3101

static void nand_set_defaults(struct nand_chip *chip, int busw)

3104

{

3102

{

3105

/* check for proper chip_delay setup, set 20us if not */

3103

/* check for proper chip_delay setup, set 20us if not */

3106

if (!chip->chip_delay)

3104

if (!chip->chip_delay)

3107

chip->chip_delay = 20;

3105

chip->chip_delay = 20;

3108

3106

3109

/* check, if a user supplied command function given */

3107

/* check, if a user supplied command function given */

3110

if (chip->cmdfunc == NULL)

3108

if (chip->cmdfunc == NULL)

3111

chip->cmdfunc = nand_command;

3109

chip->cmdfunc = nand_command;

3112

3110

3113

/* check, if a user supplied wait function given */

3111

/* check, if a user supplied wait function given */

3114

if (chip->waitfunc == NULL)

3112

if (chip->waitfunc == NULL)

3115

chip->waitfunc = nand_wait;

3113

chip->waitfunc = nand_wait;

3116

3114

3117

if (!chip->select_chip)

3115

if (!chip->select_chip)

3118

chip->select_chip = nand_select_chip;

3116

chip->select_chip = nand_select_chip;

3119

3117

3120

/* set for ONFI nand */

3118

/* set for ONFI nand */

3121

if (!chip->onfi_set_features)

3119

if (!chip->onfi_set_features)

3122

chip->onfi_set_features = nand_onfi_set_features;

3120

chip->onfi_set_features = nand_onfi_set_features;

3123

if (!chip->onfi_get_features)

3121

if (!chip->onfi_get_features)

3124

chip->onfi_get_features = nand_onfi_get_features;

3122

chip->onfi_get_features = nand_onfi_get_features;

3125

3123

3126

/* If called twice, pointers that depend on busw may need to be reset */

3124

/* If called twice, pointers that depend on busw may need to be reset */

3127

if (!chip->read_byte || chip->read_byte == nand_read_byte)

3125

if (!chip->read_byte || chip->read_byte == nand_read_byte)

3128

chip->read_byte = busw ? nand_read_byte16 : nand_read_byte;

3126

chip->read_byte = busw ? nand_read_byte16 : nand_read_byte;

3129

if (!chip->read_word)

3127

if (!chip->read_word)

3130

chip->read_word = nand_read_word;

3128

chip->read_word = nand_read_word;

3131

if (!chip->block_bad)

3129

if (!chip->block_bad)

3132

chip->block_bad = nand_block_bad;

3130

chip->block_bad = nand_block_bad;

3133

if (!chip->block_markbad)

3131

if (!chip->block_markbad)

3134

chip->block_markbad = nand_default_block_markbad;

3132

chip->block_markbad = nand_default_block_markbad;

3135

if (!chip->write_buf || chip->write_buf == nand_write_buf)

3133

if (!chip->write_buf || chip->write_buf == nand_write_buf)

3136

chip->write_buf = busw ? nand_write_buf16 : nand_write_buf;

3134

chip->write_buf = busw ? nand_write_buf16 : nand_write_buf;

3137

if (!chip->write_byte || chip->write_byte == nand_write_byte)

3135

if (!chip->write_byte || chip->write_byte == nand_write_byte)

3138

chip->write_byte = busw ? nand_write_byte16 : nand_write_byte;

3136

chip->write_byte = busw ? nand_write_byte16 : nand_write_byte;

3139

if (!chip->read_buf || chip->read_buf == nand_read_buf)

3137

if (!chip->read_buf || chip->read_buf == nand_read_buf)

3140

chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;

3138

chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;

3141

if (!chip->scan_bbt)

3139

if (!chip->scan_bbt)

3142

chip->scan_bbt = nand_default_bbt;

3140

chip->scan_bbt = nand_default_bbt;

3143

#ifdef __UBOOT__

3141

#ifdef __UBOOT__

3144

#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)

3142

#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)

3145

if (!chip->verify_buf)

3143

if (!chip->verify_buf)

3146

chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf;

3144

chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf;

3147

#endif

3145

#endif

3148

#endif

3146

#endif

3149

3147

3150

if (!chip->controller) {

3148

if (!chip->controller) {

3151

chip->controller = &chip->hwcontrol;

3149

chip->controller = &chip->hwcontrol;

3152

spin_lock_init(&chip->controller->lock);

3150

spin_lock_init(&chip->controller->lock);

3153

init_waitqueue_head(&chip->controller->wq);

3151

init_waitqueue_head(&chip->controller->wq);

3154

}

3152

}

3155

3153

3156

}

3154

}

3157

3155

3158

/* Sanitize ONFI strings so we can safely print them */

3156

/* Sanitize ONFI strings so we can safely print them */

3159

#ifndef __UBOOT__

3157

#ifndef __UBOOT__

3160

static void sanitize_string(uint8_t *s, size_t len)

3158

static void sanitize_string(uint8_t *s, size_t len)

3161

#else

3159

#else

3162

static void sanitize_string(char *s, size_t len)

3160

static void sanitize_string(char *s, size_t len)

3163

#endif

3161

#endif

3164

{

3162

{

3165

ssize_t i;

3163

ssize_t i;

3166

3164

3167

/* Null terminate */

3165

/* Null terminate */

3168

s[len - 1] = 0;

3166

s[len - 1] = 0;

3169

3167

3170

/* Remove non printable chars */

3168

/* Remove non printable chars */

3171

for (i = 0; i < len - 1; i++) {

3169

for (i = 0; i < len - 1; i++) {

3172

if (s[i] < ' ' || s[i] > 127)

3170

if (s[i] < ' ' || s[i] > 127)

3173

s[i] = '?';

3171

s[i] = '?';

3174

}

3172

}

3175

3173

3176

/* Remove trailing spaces */

3174

/* Remove trailing spaces */

3177

strim(s);

3175

strim(s);

3178

}

3176

}

3179

3177

3180

static u16 onfi_crc16(u16 crc, u8 const *p, size_t len)

3178

static u16 onfi_crc16(u16 crc, u8 const *p, size_t len)

3181

{

3179

{

3182

int i;

3180

int i;

3183

while (len--) {

3181

while (len--) {

3184

crc ^= *p++ << 8;

3182

crc ^= *p++ << 8;

3185

for (i = 0; i < 8; i++)

3183

for (i = 0; i < 8; i++)

3186

crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0);

3184

crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0);

3187

}

3185

}

3188

3186

3189

return crc;

3187

return crc;

3190

}

3188

}

3191

3189

3192

#ifdef CONFIG_SYS_NAND_ONFI_DETECTION

3190

#ifdef CONFIG_SYS_NAND_ONFI_DETECTION

3193

/* Parse the Extended Parameter Page. */

3191

/* Parse the Extended Parameter Page. */

3194

static int nand_flash_detect_ext_param_page(struct mtd_info *mtd,

3192

static int nand_flash_detect_ext_param_page(struct mtd_info *mtd,

3195

struct nand_chip *chip, struct nand_onfi_params *p)

3193

struct nand_chip *chip, struct nand_onfi_params *p)

3196

{

3194

{

3197

struct onfi_ext_param_page *ep;

3195

struct onfi_ext_param_page *ep;

3198

struct onfi_ext_section *s;

3196

struct onfi_ext_section *s;

3199

struct onfi_ext_ecc_info *ecc;

3197

struct onfi_ext_ecc_info *ecc;

3200

uint8_t *cursor;

3198

uint8_t *cursor;

3201

int ret = -EINVAL;

3199

int ret = -EINVAL;

3202

int len;

3200

int len;

3203

int i;

3201

int i;

3204

3202

3205

len = le16_to_cpu(p->ext_param_page_length) * 16;

3203

len = le16_to_cpu(p->ext_param_page_length) * 16;

3206

ep = kmalloc(len, GFP_KERNEL);

3204

ep = kmalloc(len, GFP_KERNEL);

3207

if (!ep)

3205

if (!ep)

3208

return -ENOMEM;

3206

return -ENOMEM;

3209

3207

3210

/* Send our own NAND_CMD_PARAM. */

3208

/* Send our own NAND_CMD_PARAM. */

3211

chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);

3209

chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);

3212

3210

3213

/* Use the Change Read Column command to skip the ONFI param pages. */

3211

/* Use the Change Read Column command to skip the ONFI param pages. */

3214

chip->cmdfunc(mtd, NAND_CMD_RNDOUT,

3212

chip->cmdfunc(mtd, NAND_CMD_RNDOUT,

3215

sizeof(*p) * p->num_of_param_pages , -1);

3213

sizeof(*p) * p->num_of_param_pages , -1);

3216

3214

3217

/* Read out the Extended Parameter Page. */

3215

/* Read out the Extended Parameter Page. */

3218

chip->read_buf(mtd, (uint8_t *)ep, len);

3216

chip->read_buf(mtd, (uint8_t *)ep, len);

3219

if ((onfi_crc16(ONFI_CRC_BASE, ((uint8_t *)ep) + 2, len - 2)

3217

if ((onfi_crc16(ONFI_CRC_BASE, ((uint8_t *)ep) + 2, len - 2)

3220

!= le16_to_cpu(ep->crc))) {

3218

!= le16_to_cpu(ep->crc))) {

3221

pr_debug("fail in the CRC.\n");

3219

pr_debug("fail in the CRC.\n");

3222

goto ext_out;

3220

goto ext_out;

3223

}

3221

}

3224

3222

3225

/*

3223

/*

3226

* Check the signature.

3224

* Check the signature.

3227

* Do not strictly follow the ONFI spec, maybe changed in future.

3225

* Do not strictly follow the ONFI spec, maybe changed in future.

3228

*/

3226

*/

3229

#ifndef __UBOOT__

3227

#ifndef __UBOOT__

3230

if (strncmp(ep->sig, "EPPS", 4)) {

3228

if (strncmp(ep->sig, "EPPS", 4)) {

3231

#else

3229

#else

3232

if (strncmp((char *)ep->sig, "EPPS", 4)) {

3230

if (strncmp((char *)ep->sig, "EPPS", 4)) {

3233

#endif

3231

#endif

3234

pr_debug("The signature is invalid.\n");

3232

pr_debug("The signature is invalid.\n");

3235

goto ext_out;

3233

goto ext_out;

3236

}

3234

}

3237

3235

3238

/* find the ECC section. */

3236

/* find the ECC section. */

3239

cursor = (uint8_t *)(ep + 1);

3237

cursor = (uint8_t *)(ep + 1);

3240

for (i = 0; i < ONFI_EXT_SECTION_MAX; i++) {

3238

for (i = 0; i < ONFI_EXT_SECTION_MAX; i++) {

3241

s = ep->sections + i;

3239

s = ep->sections + i;

3242

if (s->type == ONFI_SECTION_TYPE_2)

3240

if (s->type == ONFI_SECTION_TYPE_2)

3243

break;

3241

break;

3244

cursor += s->length * 16;

3242

cursor += s->length * 16;

3245

}

3243

}

3246

if (i == ONFI_EXT_SECTION_MAX) {

3244

if (i == ONFI_EXT_SECTION_MAX) {

3247

pr_debug("We can not find the ECC section.\n");

3245

pr_debug("We can not find the ECC section.\n");

3248

goto ext_out;

3246

goto ext_out;

3249

}

3247

}

3250

3248

3251

/* get the info we want. */

3249

/* get the info we want. */

3252

ecc = (struct onfi_ext_ecc_info *)cursor;

3250

ecc = (struct onfi_ext_ecc_info *)cursor;

3253

3251

3254

if (!ecc->codeword_size) {

3252

if (!ecc->codeword_size) {

3255

pr_debug("Invalid codeword size\n");

3253

pr_debug("Invalid codeword size\n");

3256

goto ext_out;

3254

goto ext_out;

3257

}

3255

}

3258

3256

3259

chip->ecc_strength_ds = ecc->ecc_bits;

3257

chip->ecc_strength_ds = ecc->ecc_bits;

3260

chip->ecc_step_ds = 1 << ecc->codeword_size;

3258

chip->ecc_step_ds = 1 << ecc->codeword_size;

3261

ret = 0;

3259

ret = 0;

3262

3260

3263

ext_out:

3261

ext_out:

3264

kfree(ep);

3262

kfree(ep);

3265

return ret;

3263

return ret;

3266

}

3264

}

3267

3265

3268

static int nand_setup_read_retry_micron(struct mtd_info *mtd, int retry_mode)

3266

static int nand_setup_read_retry_micron(struct mtd_info *mtd, int retry_mode)

3269

{

3267

{

3270

struct nand_chip *chip = mtd->priv;

3268

struct nand_chip *chip = mtd->priv;

3271

uint8_t feature[ONFI_SUBFEATURE_PARAM_LEN] = {retry_mode};

3269

uint8_t feature[ONFI_SUBFEATURE_PARAM_LEN] = {retry_mode};

3272

3270

3273

return chip->onfi_set_features(mtd, chip, ONFI_FEATURE_ADDR_READ_RETRY,

3271

return chip->onfi_set_features(mtd, chip, ONFI_FEATURE_ADDR_READ_RETRY,

3274

feature);

3272

feature);

3275

}

3273

}

3276

3274

3277

/*

3275

/*

3278

* Configure chip properties from Micron vendor-specific ONFI table

3276

* Configure chip properties from Micron vendor-specific ONFI table

3279

*/

3277

*/

3280

static void nand_onfi_detect_micron(struct nand_chip *chip,

3278

static void nand_onfi_detect_micron(struct nand_chip *chip,

3281

struct nand_onfi_params *p)

3279

struct nand_onfi_params *p)

3282

{

3280

{

3283

struct nand_onfi_vendor_micron *micron = (void *)p->vendor;

3281

struct nand_onfi_vendor_micron *micron = (void *)p->vendor;

3284

3282

3285

if (le16_to_cpu(p->vendor_revision) < 1)

3283

if (le16_to_cpu(p->vendor_revision) < 1)

3286

return;

3284

return;

3287

3285

3288

chip->read_retries = micron->read_retry_options;

3286

chip->read_retries = micron->read_retry_options;

3289

chip->setup_read_retry = nand_setup_read_retry_micron;

3287

chip->setup_read_retry = nand_setup_read_retry_micron;

3290

}

3288

}

3291

3289

3292

/*

3290

/*

3293

* Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise.

3291

* Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise.

3294

*/

3292

*/

3295

static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,

3293

static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,

3296

int *busw)

3294

int *busw)

3297

{

3295

{

3298

struct nand_onfi_params *p = &chip->onfi_params;

3296

struct nand_onfi_params *p = &chip->onfi_params;

3299

int i, j;

3297

int i, j;

3300

int val;

3298

int val;

3301

3299

3302

/* Try ONFI for unknown chip or LP */

3300

/* Try ONFI for unknown chip or LP */

3303

chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);

3301

chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);

3304

if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' ||

3302

if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' ||

3305

chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I')

3303

chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I')

3306

return 0;

3304

return 0;

3307

3305

3308

chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);

3306

chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);

3309

for (i = 0; i < 3; i++) {

3307

for (i = 0; i < 3; i++) {

3310

for (j = 0; j < sizeof(*p); j++)

3308

for (j = 0; j < sizeof(*p); j++)

3311

((uint8_t *)p)[j] = chip->read_byte(mtd);

3309

((uint8_t *)p)[j] = chip->read_byte(mtd);

3312

if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) ==

3310

if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) ==

3313

le16_to_cpu(p->crc)) {

3311

le16_to_cpu(p->crc)) {

3314

break;

3312

break;

3315

}

3313

}

3316

}

3314

}

3317

3315

3318

if (i == 3) {

3316

if (i == 3) {

3319

pr_err("Could not find valid ONFI parameter page; aborting\n");

3317

pr_err("Could not find valid ONFI parameter page; aborting\n");

3320

return 0;

3318

return 0;

3321

}

3319

}

3322

3320

3323

/* Check version */

3321

/* Check version */

3324

val = le16_to_cpu(p->revision);

3322

val = le16_to_cpu(p->revision);

3325

if (val & (1 << 5))

3323

if (val & (1 << 5))

3326

chip->onfi_version = 23;

3324

chip->onfi_version = 23;

3327

else if (val & (1 << 4))

3325

else if (val & (1 << 4))

3328

chip->onfi_version = 22;

3326

chip->onfi_version = 22;

3329

else if (val & (1 << 3))

3327

else if (val & (1 << 3))

3330

chip->onfi_version = 21;

3328

chip->onfi_version = 21;

3331

else if (val & (1 << 2))

3329

else if (val & (1 << 2))

3332

chip->onfi_version = 20;

3330

chip->onfi_version = 20;

3333

else if (val & (1 << 1))

3331

else if (val & (1 << 1))

3334

chip->onfi_version = 10;

3332

chip->onfi_version = 10;

3335

3333

3336

if (!chip->onfi_version) {

3334

if (!chip->onfi_version) {

3337

pr_info("unsupported ONFI version: %d\n", val);

3335

pr_info("unsupported ONFI version: %d\n", val);

3338

return 0;

3336

return 0;

3339

}

3337

}

3340

3338

3341

sanitize_string(p->manufacturer, sizeof(p->manufacturer));

3339

sanitize_string(p->manufacturer, sizeof(p->manufacturer));

3342

sanitize_string(p->model, sizeof(p->model));

3340

sanitize_string(p->model, sizeof(p->model));

3343

if (!mtd->name)

3341

if (!mtd->name)

3344

mtd->name = p->model;

3342

mtd->name = p->model;

3345

3343

3346

mtd->writesize = le32_to_cpu(p->byte_per_page);

3344

mtd->writesize = le32_to_cpu(p->byte_per_page);

3347

3345

3348

/*

3346

/*

3349

* pages_per_block and blocks_per_lun may not be a power-of-2 size

3347

* pages_per_block and blocks_per_lun may not be a power-of-2 size

3350

* (don't ask me who thought of this...). MTD assumes that these

3348

* (don't ask me who thought of this...). MTD assumes that these

3351

* dimensions will be power-of-2, so just truncate the remaining area.

3349

* dimensions will be power-of-2, so just truncate the remaining area.

3352

*/

3350

*/

3353

mtd->erasesize = 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1);

3351

mtd->erasesize = 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1);

3354

mtd->erasesize *= mtd->writesize;

3352

mtd->erasesize *= mtd->writesize;

3355

3353

3356

mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);

3354

mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);

3357

3355

3358

/* See erasesize comment */

3356

/* See erasesize comment */

3359

chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1);

3357

chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1);

3360

chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;

3358

chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;

3361

chip->bits_per_cell = p->bits_per_cell;

3359

chip->bits_per_cell = p->bits_per_cell;

3362

3360

3363

if (onfi_feature(chip) & ONFI_FEATURE_16_BIT_BUS)

3361

if (onfi_feature(chip) & ONFI_FEATURE_16_BIT_BUS)

3364

*busw = NAND_BUSWIDTH_16;

3362

*busw = NAND_BUSWIDTH_16;

3365

else

3363

else

3366

*busw = 0;

3364

*busw = 0;

3367

3365

3368

if (p->ecc_bits != 0xff) {

3366

if (p->ecc_bits != 0xff) {

3369

chip->ecc_strength_ds = p->ecc_bits;

3367

chip->ecc_strength_ds = p->ecc_bits;

3370

chip->ecc_step_ds = 512;

3368

chip->ecc_step_ds = 512;

3371

} else if (chip->onfi_version >= 21 &&

3369

} else if (chip->onfi_version >= 21 &&

3372

(onfi_feature(chip) & ONFI_FEATURE_EXT_PARAM_PAGE)) {

3370

(onfi_feature(chip) & ONFI_FEATURE_EXT_PARAM_PAGE)) {

3373

3371

3374

/*

3372

/*

3375

* The nand_flash_detect_ext_param_page() uses the

3373

* The nand_flash_detect_ext_param_page() uses the

3376

* Change Read Column command which maybe not supported

3374

* Change Read Column command which maybe not supported

3377

* by the chip->cmdfunc. So try to update the chip->cmdfunc

3375

* by the chip->cmdfunc. So try to update the chip->cmdfunc

3378

* now. We do not replace user supplied command function.

3376

* now. We do not replace user supplied command function.

3379

*/

3377

*/

3380

if (mtd->writesize > 512 && chip->cmdfunc == nand_command)

3378

if (mtd->writesize > 512 && chip->cmdfunc == nand_command)

3381

chip->cmdfunc = nand_command_lp;

3379

chip->cmdfunc = nand_command_lp;

3382

3380

3383

/* The Extended Parameter Page is supported since ONFI 2.1. */

3381

/* The Extended Parameter Page is supported since ONFI 2.1. */

3384

if (nand_flash_detect_ext_param_page(mtd, chip, p))

3382

if (nand_flash_detect_ext_param_page(mtd, chip, p))

3385

pr_warn("Failed to detect ONFI extended param page\n");

3383

pr_warn("Failed to detect ONFI extended param page\n");

3386

} else {

3384

} else {

3387

pr_warn("Could not retrieve ONFI ECC requirements\n");

3385

pr_warn("Could not retrieve ONFI ECC requirements\n");

3388

}

3386

}

3389

3387

3390

if (p->jedec_id == NAND_MFR_MICRON)

3388

if (p->jedec_id == NAND_MFR_MICRON)

3391

nand_onfi_detect_micron(chip, p);

3389

nand_onfi_detect_micron(chip, p);

3392

3390

3393

return 1;

3391

return 1;

3394

}

3392

}

3395

#else

3393

#else

3396

static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,

3394

static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,

3397

int *busw)

3395

int *busw)

3398

{

3396

{

3399

return 0;

3397

return 0;

3400

}

3398

}

3401

#endif

3399

#endif

3402

3400

3403

/*

3401

/*

3404

* Check if the NAND chip is JEDEC compliant, returns 1 if it is, 0 otherwise.

3402

* Check if the NAND chip is JEDEC compliant, returns 1 if it is, 0 otherwise.

3405

*/

3403

*/

3406

static int nand_flash_detect_jedec(struct mtd_info *mtd, struct nand_chip *chip,

3404

static int nand_flash_detect_jedec(struct mtd_info *mtd, struct nand_chip *chip,

3407

int *busw)

3405

int *busw)

3408

{

3406

{

3409

struct nand_jedec_params *p = &chip->jedec_params;

3407

struct nand_jedec_params *p = &chip->jedec_params;

3410

struct jedec_ecc_info *ecc;

3408

struct jedec_ecc_info *ecc;

3411

int val;

3409

int val;

3412

int i, j;

3410

int i, j;

3413

3411

3414

/* Try JEDEC for unknown chip or LP */

3412

/* Try JEDEC for unknown chip or LP */

3415

chip->cmdfunc(mtd, NAND_CMD_READID, 0x40, -1);

3413

chip->cmdfunc(mtd, NAND_CMD_READID, 0x40, -1);

3416

if (chip->read_byte(mtd) != 'J' || chip->read_byte(mtd) != 'E' ||

3414

if (chip->read_byte(mtd) != 'J' || chip->read_byte(mtd) != 'E' ||

3417

chip->read_byte(mtd) != 'D' || chip->read_byte(mtd) != 'E' ||

3415

chip->read_byte(mtd) != 'D' || chip->read_byte(mtd) != 'E' ||

3418

chip->read_byte(mtd) != 'C')

3416

chip->read_byte(mtd) != 'C')

3419

return 0;

3417

return 0;

3420

3418

3421

chip->cmdfunc(mtd, NAND_CMD_PARAM, 0x40, -1);

3419

chip->cmdfunc(mtd, NAND_CMD_PARAM, 0x40, -1);

3422

for (i = 0; i < 3; i++) {

3420

for (i = 0; i < 3; i++) {

3423

for (j = 0; j < sizeof(*p); j++)

3421

for (j = 0; j < sizeof(*p); j++)

3424

((uint8_t *)p)[j] = chip->read_byte(mtd);

3422

((uint8_t *)p)[j] = chip->read_byte(mtd);

3425

3423

3426

if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 510) ==

3424

if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 510) ==

3427

le16_to_cpu(p->crc))

3425

le16_to_cpu(p->crc))

3428

break;

3426

break;

3429

}

3427

}

3430

3428

3431

if (i == 3) {

3429

if (i == 3) {

3432

pr_err("Could not find valid JEDEC parameter page; aborting\n");

3430

pr_err("Could not find valid JEDEC parameter page; aborting\n");

3433

return 0;

3431

return 0;

3434

}

3432

}

3435

3433

3436

/* Check version */

3434

/* Check version */

3437

val = le16_to_cpu(p->revision);

3435

val = le16_to_cpu(p->revision);

3438

if (val & (1 << 2))

3436

if (val & (1 << 2))

3439

chip->jedec_version = 10;

3437

chip->jedec_version = 10;

3440

else if (val & (1 << 1))

3438

else if (val & (1 << 1))

3441

chip->jedec_version = 1; /* vendor specific version */

3439

chip->jedec_version = 1; /* vendor specific version */

3442

3440

3443

if (!chip->jedec_version) {

3441

if (!chip->jedec_version) {

3444

pr_info("unsupported JEDEC version: %d\n", val);

3442

pr_info("unsupported JEDEC version: %d\n", val);

3445

return 0;

3443

return 0;

3446

}

3444

}

3447

3445

3448

sanitize_string(p->manufacturer, sizeof(p->manufacturer));

3446

sanitize_string(p->manufacturer, sizeof(p->manufacturer));

3449

sanitize_string(p->model, sizeof(p->model));

3447

sanitize_string(p->model, sizeof(p->model));

3450

if (!mtd->name)

3448

if (!mtd->name)

3451

mtd->name = p->model;

3449

mtd->name = p->model;

3452

3450

3453

mtd->writesize = le32_to_cpu(p->byte_per_page);

3451

mtd->writesize = le32_to_cpu(p->byte_per_page);

3454

3452

3455

/* Please reference to the comment for nand_flash_detect_onfi. */

3453

/* Please reference to the comment for nand_flash_detect_onfi. */

3456

mtd->erasesize = 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1);

3454

mtd->erasesize = 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1);

3457

mtd->erasesize *= mtd->writesize;

3455

mtd->erasesize *= mtd->writesize;

3458

3456

3459

mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);

3457

mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);

3460

3458

3461

/* Please reference to the comment for nand_flash_detect_onfi. */

3459

/* Please reference to the comment for nand_flash_detect_onfi. */

3462

chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1);

3460

chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1);

3463

chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;

3461

chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;

3464

chip->bits_per_cell = p->bits_per_cell;

3462

chip->bits_per_cell = p->bits_per_cell;

3465

3463

3466

if (jedec_feature(chip) & JEDEC_FEATURE_16_BIT_BUS)

3464

if (jedec_feature(chip) & JEDEC_FEATURE_16_BIT_BUS)

3467

*busw = NAND_BUSWIDTH_16;

3465

*busw = NAND_BUSWIDTH_16;

3468

else

3466

else

3469

*busw = 0;

3467

*busw = 0;

3470

3468

3471

/* ECC info */

3469

/* ECC info */

3472

ecc = &p->ecc_info[0];

3470

ecc = &p->ecc_info[0];

3473

3471

3474

if (ecc->codeword_size >= 9) {

3472

if (ecc->codeword_size >= 9) {

3475

chip->ecc_strength_ds = ecc->ecc_bits;

3473

chip->ecc_strength_ds = ecc->ecc_bits;

3476

chip->ecc_step_ds = 1 << ecc->codeword_size;

3474

chip->ecc_step_ds = 1 << ecc->codeword_size;

3477

} else {

3475

} else {

3478

pr_warn("Invalid codeword size\n");

3476

pr_warn("Invalid codeword size\n");

3479

}

3477

}

3480

3478

3481

return 1;

3479

return 1;

3482

}

3480

}

3483

3481

3484

/*

3482

/*

3485

* nand_id_has_period - Check if an ID string has a given wraparound period

3483

* nand_id_has_period - Check if an ID string has a given wraparound period

3486

* @id_data: the ID string

3484

* @id_data: the ID string

3487

* @arrlen: the length of the @id_data array

3485

* @arrlen: the length of the @id_data array

3488

* @period: the period of repitition

3486

* @period: the period of repitition

3489

*

3487

*

3490

* Check if an ID string is repeated within a given sequence of bytes at

3488

* Check if an ID string is repeated within a given sequence of bytes at

3491

* specific repetition interval period (e.g., {0x20,0x01,0x7F,0x20} has a

3489

* specific repetition interval period (e.g., {0x20,0x01,0x7F,0x20} has a

3492

* period of 3). This is a helper function for nand_id_len(). Returns non-zero

3490

* period of 3). This is a helper function for nand_id_len(). Returns non-zero

3493

* if the repetition has a period of @period; otherwise, returns zero.

3491

* if the repetition has a period of @period; otherwise, returns zero.

3494

*/

3492

*/

3495

static int nand_id_has_period(u8 *id_data, int arrlen, int period)

3493

static int nand_id_has_period(u8 *id_data, int arrlen, int period)

3496

{

3494

{

3497

int i, j;

3495

int i, j;

3498

for (i = 0; i < period; i++)

3496

for (i = 0; i < period; i++)

3499

for (j = i + period; j < arrlen; j += period)

3497

for (j = i + period; j < arrlen; j += period)

3500

if (id_data[i] != id_data[j])

3498

if (id_data[i] != id_data[j])

3501

return 0;

3499

return 0;

3502

return 1;

3500

return 1;

3503

}

3501

}

3504

3502

3505

/*

3503

/*

3506

* nand_id_len - Get the length of an ID string returned by CMD_READID

3504

* nand_id_len - Get the length of an ID string returned by CMD_READID

3507

* @id_data: the ID string

3505

* @id_data: the ID string

3508

* @arrlen: the length of the @id_data array

3506

* @arrlen: the length of the @id_data array

3509

3507

3510

* Returns the length of the ID string, according to known wraparound/trailing

3508

* Returns the length of the ID string, according to known wraparound/trailing

3511

* zero patterns. If no pattern exists, returns the length of the array.

3509

* zero patterns. If no pattern exists, returns the length of the array.

3512

*/

3510

*/

3513

static int nand_id_len(u8 *id_data, int arrlen)

3511

static int nand_id_len(u8 *id_data, int arrlen)

3514

{

3512

{

3515

int last_nonzero, period;

3513

int last_nonzero, period;

3516

3514

3517

/* Find last non-zero byte */

3515

/* Find last non-zero byte */

3518

for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--)

3516

for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--)

3519

if (id_data[last_nonzero])

3517

if (id_data[last_nonzero])

3520

break;

3518

break;

3521

3519

3522

/* All zeros */

3520

/* All zeros */

3523

if (last_nonzero < 0)

3521

if (last_nonzero < 0)

3524

return 0;

3522

return 0;

3525

3523

3526

/* Calculate wraparound period */

3524

/* Calculate wraparound period */

3527

for (period = 1; period < arrlen; period++)

3525

for (period = 1; period < arrlen; period++)

3528

if (nand_id_has_period(id_data, arrlen, period))

3526

if (nand_id_has_period(id_data, arrlen, period))

3529

break;

3527

break;

3530

3528

3531

/* There's a repeated pattern */

3529

/* There's a repeated pattern */

3532

if (period < arrlen)

3530

if (period < arrlen)

3533

return period;

3531

return period;

3534

3532

3535

/* There are trailing zeros */

3533

/* There are trailing zeros */

3536

if (last_nonzero < arrlen - 1)

3534

if (last_nonzero < arrlen - 1)

3537

return last_nonzero + 1;

3535

return last_nonzero + 1;

3538

3536

3539

/* No pattern detected */

3537

/* No pattern detected */

3540

return arrlen;

3538

return arrlen;

3541

}

3539

}

3542

3540

3543

/* Extract the bits of per cell from the 3rd byte of the extended ID */

3541

/* Extract the bits of per cell from the 3rd byte of the extended ID */

3544

static int nand_get_bits_per_cell(u8 cellinfo)

3542

static int nand_get_bits_per_cell(u8 cellinfo)

3545

{

3543

{

3546

int bits;

3544

int bits;

3547

3545

3548

bits = cellinfo & NAND_CI_CELLTYPE_MSK;

3546

bits = cellinfo & NAND_CI_CELLTYPE_MSK;

3549

bits >>= NAND_CI_CELLTYPE_SHIFT;

3547

bits >>= NAND_CI_CELLTYPE_SHIFT;

3550

return bits + 1;

3548

return bits + 1;

3551

}

3549

}

3552

3550

3553

/*

3551

/*

3554

* Many new NAND share similar device ID codes, which represent the size of the

3552

* Many new NAND share similar device ID codes, which represent the size of the

3555

* chip. The rest of the parameters must be decoded according to generic or

3553

* chip. The rest of the parameters must be decoded according to generic or

3556

* manufacturer-specific "extended ID" decoding patterns.

3554

* manufacturer-specific "extended ID" decoding patterns.

3557

*/

3555

*/

3558

static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip,

3556

static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip,

3559

u8 id_data[8], int *busw)

3557

u8 id_data[8], int *busw)

3560

{

3558

{

3561

int extid, id_len;

3559

int extid, id_len;

3562

/* The 3rd id byte holds MLC / multichip data */

3560

/* The 3rd id byte holds MLC / multichip data */

3563

chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]);

3561

chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]);

3564

/* The 4th id byte is the important one */

3562

/* The 4th id byte is the important one */

3565

extid = id_data[3];

3563

extid = id_data[3];

3566

3564

3567

id_len = nand_id_len(id_data, 8);

3565

id_len = nand_id_len(id_data, 8);

3568

3566

3569

/*

3567

/*

3570

* Field definitions are in the following datasheets:

3568

* Field definitions are in the following datasheets:

3571

* Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32)

3569

* Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32)

3572

* New Samsung (6 byte ID): Samsung K9GAG08U0F (p.44)

3570

* New Samsung (6 byte ID): Samsung K9GAG08U0F (p.44)

3573

* Hynix MLC (6 byte ID): Hynix H27UBG8T2B (p.22)

3571

* Hynix MLC (6 byte ID): Hynix H27UBG8T2B (p.22)

3574

*

3572

*

3575

* Check for ID length, non-zero 6th byte, cell type, and Hynix/Samsung

3573

* Check for ID length, non-zero 6th byte, cell type, and Hynix/Samsung

3576

* ID to decide what to do.

3574

* ID to decide what to do.

3577

*/

3575

*/

3578

if (id_len == 6 && id_data[0] == NAND_MFR_SAMSUNG &&

3576

if (id_len == 6 && id_data[0] == NAND_MFR_SAMSUNG &&

3579

!nand_is_slc(chip) && id_data[5] != 0x00) {

3577

!nand_is_slc(chip) && id_data[5] != 0x00) {

3580

/* Calc pagesize */

3578

/* Calc pagesize */

3581

mtd->writesize = 2048 << (extid & 0x03);

3579

mtd->writesize = 2048 << (extid & 0x03);

3582

extid >>= 2;

3580

extid >>= 2;

3583

/* Calc oobsize */

3581

/* Calc oobsize */

3584

switch (((extid >> 2) & 0x04) | (extid & 0x03)) {

3582

switch (((extid >> 2) & 0x04) | (extid & 0x03)) {

3585

case 1:

3583

case 1:

3586

mtd->oobsize = 128;

3584

mtd->oobsize = 128;

3587

break;

3585

break;

3588

case 2:

3586

case 2:

3589

mtd->oobsize = 218;

3587

mtd->oobsize = 218;

3590

break;

3588

break;

3591

case 3:

3589

case 3:

3592

mtd->oobsize = 400;

3590

mtd->oobsize = 400;

3593

break;

3591

break;

3594

case 4:

3592

case 4:

3595

mtd->oobsize = 436;

3593

mtd->oobsize = 436;

3596

break;

3594

break;

3597

case 5:

3595

case 5:

3598

mtd->oobsize = 512;

3596

mtd->oobsize = 512;

3599

break;

3597

break;

3600

case 6:

3598

case 6:

3601

mtd->oobsize = 640;

3599

mtd->oobsize = 640;

3602

break;

3600

break;

3603

case 7:

3601

case 7:

3604

default: /* Other cases are "reserved" (unknown) */

3602

default: /* Other cases are "reserved" (unknown) */

3605

mtd->oobsize = 1024;

3603

mtd->oobsize = 1024;

3606

break;

3604

break;

3607

}

3605

}

3608

extid >>= 2;

3606

extid >>= 2;

3609

/* Calc blocksize */

3607

/* Calc blocksize */

3610

mtd->erasesize = (128 * 1024) <<

3608

mtd->erasesize = (128 * 1024) <<

3611

(((extid >> 1) & 0x04) | (extid & 0x03));

3609

(((extid >> 1) & 0x04) | (extid & 0x03));

3612

*busw = 0;

3610

*busw = 0;

3613

} else if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX &&

3611

} else if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX &&

3614

!nand_is_slc(chip)) {

3612

!nand_is_slc(chip)) {

3615

unsigned int tmp;

3613

unsigned int tmp;

3616

3614

3617

/* Calc pagesize */

3615

/* Calc pagesize */

3618

mtd->writesize = 2048 << (extid & 0x03);

3616

mtd->writesize = 2048 << (extid & 0x03);

3619

extid >>= 2;

3617

extid >>= 2;

3620

/* Calc oobsize */

3618

/* Calc oobsize */

3621

switch (((extid >> 2) & 0x04) | (extid & 0x03)) {

3619

switch (((extid >> 2) & 0x04) | (extid & 0x03)) {

3622

case 0:

3620

case 0:

3623

mtd->oobsize = 128;

3621

mtd->oobsize = 128;

3624

break;

3622

break;

3625

case 1:

3623

case 1:

3626

mtd->oobsize = 224;

3624

mtd->oobsize = 224;

3627

break;

3625

break;

3628

case 2:

3626

case 2:

3629

mtd->oobsize = 448;

3627

mtd->oobsize = 448;

3630

break;

3628

break;

3631

case 3:

3629

case 3:

3632

mtd->oobsize = 64;

3630

mtd->oobsize = 64;

3633

break;

3631

break;

3634

case 4:

3632

case 4:

3635

mtd->oobsize = 32;

3633

mtd->oobsize = 32;

3636

break;

3634

break;

3637

case 5:

3635

case 5:

3638

mtd->oobsize = 16;

3636

mtd->oobsize = 16;

3639

break;

3637

break;

3640

default:

3638

default:

3641

mtd->oobsize = 640;

3639

mtd->oobsize = 640;

3642

break;

3640

break;

3643

}

3641

}

3644

extid >>= 2;

3642

extid >>= 2;

3645

/* Calc blocksize */

3643

/* Calc blocksize */

3646

tmp = ((extid >> 1) & 0x04) | (extid & 0x03);

3644

tmp = ((extid >> 1) & 0x04) | (extid & 0x03);

3647

if (tmp < 0x03)

3645

if (tmp < 0x03)

3648

mtd->erasesize = (128 * 1024) << tmp;

3646

mtd->erasesize = (128 * 1024) << tmp;

3649

else if (tmp == 0x03)

3647

else if (tmp == 0x03)

3650

mtd->erasesize = 768 * 1024;

3648

mtd->erasesize = 768 * 1024;

3651

else

3649

else

3652

mtd->erasesize = (64 * 1024) << tmp;

3650

mtd->erasesize = (64 * 1024) << tmp;

3653

*busw = 0;

3651

*busw = 0;

3654

} else {

3652

} else {

3655

/* Calc pagesize */

3653

/* Calc pagesize */

3656

mtd->writesize = 1024 << (extid & 0x03);

3654

mtd->writesize = 1024 << (extid & 0x03);

3657

extid >>= 2;

3655

extid >>= 2;

3658

/* Calc oobsize */

3656

/* Calc oobsize */

3659

mtd->oobsize = (8 << (extid & 0x01)) *

3657

mtd->oobsize = (8 << (extid & 0x01)) *

3660

(mtd->writesize >> 9);

3658

(mtd->writesize >> 9);

3661

extid >>= 2;

3659

extid >>= 2;

3662

/* Calc blocksize. Blocksize is multiples of 64KiB */

3660

/* Calc blocksize. Blocksize is multiples of 64KiB */

3663

mtd->erasesize = (64 * 1024) << (extid & 0x03);

3661

mtd->erasesize = (64 * 1024) << (extid & 0x03);

3664

extid >>= 2;

3662

extid >>= 2;

3665

/* Get buswidth information */

3663

/* Get buswidth information */

3666

*busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;

3664

*busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;

3667

3665

3668

/*

3666

/*

3669

* Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per

3667

* Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per

3670

* 512B page. For Toshiba SLC, we decode the 5th/6th byte as

3668

* 512B page. For Toshiba SLC, we decode the 5th/6th byte as

3671

* follows:

3669

* follows:

3672

* - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm,

3670

* - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm,

3673

* 110b -> 24nm

3671

* 110b -> 24nm

3674

* - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC

3672

* - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC

3675

*/

3673

*/

3676

if (id_len >= 6 && id_data[0] == NAND_MFR_TOSHIBA &&

3674

if (id_len >= 6 && id_data[0] == NAND_MFR_TOSHIBA &&

3677

nand_is_slc(chip) &&

3675

nand_is_slc(chip) &&

3678

(id_data[5] & 0x7) == 0x6 /* 24nm */ &&

3676

(id_data[5] & 0x7) == 0x6 /* 24nm */ &&

3679

!(id_data[4] & 0x80) /* !BENAND */) {

3677

!(id_data[4] & 0x80) /* !BENAND */) {

3680

mtd->oobsize = 32 * mtd->writesize >> 9;

3678

mtd->oobsize = 32 * mtd->writesize >> 9;

3681

}

3679

}

3682

3680

3683

}

3681

}

3684

}

3682

}

3685

3683

3686

/*

3684

/*

3687

* Old devices have chip data hardcoded in the device ID table. nand_decode_id

3685

* Old devices have chip data hardcoded in the device ID table. nand_decode_id

3688

* decodes a matching ID table entry and assigns the MTD size parameters for

3686

* decodes a matching ID table entry and assigns the MTD size parameters for

3689

* the chip.

3687

* the chip.

3690

*/

3688

*/

3691

static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip,

3689

static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip,

3692

struct nand_flash_dev *type, u8 id_data[8],

3690

struct nand_flash_dev *type, u8 id_data[8],

3693

int *busw)

3691

int *busw)

3694

{

3692

{

3695

int maf_id = id_data[0];

3693

int maf_id = id_data[0];

3696

3694

3697

mtd->erasesize = type->erasesize;

3695

mtd->erasesize = type->erasesize;

3698

mtd->writesize = type->pagesize;

3696

mtd->writesize = type->pagesize;

3699

mtd->oobsize = mtd->writesize / 32;

3697

mtd->oobsize = mtd->writesize / 32;

3700

*busw = type->options & NAND_BUSWIDTH_16;

3698

*busw = type->options & NAND_BUSWIDTH_16;

3701

3699

3702

/* All legacy ID NAND are small-page, SLC */

3700

/* All legacy ID NAND are small-page, SLC */

3703

chip->bits_per_cell = 1;

3701

chip->bits_per_cell = 1;

3704

3702

3705

/*

3703

/*

3706

* Check for Spansion/AMD ID + repeating 5th, 6th byte since

3704

* Check for Spansion/AMD ID + repeating 5th, 6th byte since

3707

* some Spansion chips have erasesize that conflicts with size

3705

* some Spansion chips have erasesize that conflicts with size

3708

* listed in nand_ids table.

3706

* listed in nand_ids table.

3709

* Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)

3707

* Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)

3710

*/

3708

*/

3711

if (maf_id == NAND_MFR_AMD && id_data[4] != 0x00 && id_data[5] == 0x00

3709

if (maf_id == NAND_MFR_AMD && id_data[4] != 0x00 && id_data[5] == 0x00

3712

&& id_data[6] == 0x00 && id_data[7] == 0x00

3710

&& id_data[6] == 0x00 && id_data[7] == 0x00

3713

&& mtd->writesize == 512) {

3711

&& mtd->writesize == 512) {

3714

mtd->erasesize = 128 * 1024;

3712

mtd->erasesize = 128 * 1024;

3715

mtd->erasesize <<= ((id_data[3] & 0x03) << 1);

3713

mtd->erasesize <<= ((id_data[3] & 0x03) << 1);

3716

}

3714

}

3717

}

3715

}

3718

3716

3719

/*

3717

/*

3720

* Set the bad block marker/indicator (BBM/BBI) patterns according to some

3718

* Set the bad block marker/indicator (BBM/BBI) patterns according to some

3721

* heuristic patterns using various detected parameters (e.g., manufacturer,

3719

* heuristic patterns using various detected parameters (e.g., manufacturer,

3722

* page size, cell-type information).

3720

* page size, cell-type information).

3723

*/

3721

*/

3724

static void nand_decode_bbm_options(struct mtd_info *mtd,

3722

static void nand_decode_bbm_options(struct mtd_info *mtd,

3725

struct nand_chip *chip, u8 id_data[8])

3723

struct nand_chip *chip, u8 id_data[8])

3726

{

3724

{

3727

int maf_id = id_data[0];

3725

int maf_id = id_data[0];

3728

3726

3729

/* Set the bad block position */

3727

/* Set the bad block position */

3730

if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16))

3728

if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16))

3731

chip->badblockpos = NAND_LARGE_BADBLOCK_POS;

3729

chip->badblockpos = NAND_LARGE_BADBLOCK_POS;

3732

else

3730

else

3733

chip->badblockpos = NAND_SMALL_BADBLOCK_POS;

3731

chip->badblockpos = NAND_SMALL_BADBLOCK_POS;

3734

3732

3735

/*

3733

/*

3736

* Bad block marker is stored in the last page of each block on Samsung

3734

* Bad block marker is stored in the last page of each block on Samsung

3737

* and Hynix MLC devices; stored in first two pages of each block on

3735

* and Hynix MLC devices; stored in first two pages of each block on

3738

* Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba,

3736

* Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba,

3739

* AMD/Spansion, and Macronix. All others scan only the first page.

3737

* AMD/Spansion, and Macronix. All others scan only the first page.

3740

*/

3738

*/

3741

if (!nand_is_slc(chip) &&

3739

if (!nand_is_slc(chip) &&

3742

(maf_id == NAND_MFR_SAMSUNG ||

3740

(maf_id == NAND_MFR_SAMSUNG ||

3743

maf_id == NAND_MFR_HYNIX))

3741

maf_id == NAND_MFR_HYNIX))

3744

chip->bbt_options |= NAND_BBT_SCANLASTPAGE;

3742

chip->bbt_options |= NAND_BBT_SCANLASTPAGE;

3745

else if ((nand_is_slc(chip) &&

3743

else if ((nand_is_slc(chip) &&

3746

(maf_id == NAND_MFR_SAMSUNG ||

3744

(maf_id == NAND_MFR_SAMSUNG ||

3747

maf_id == NAND_MFR_HYNIX ||

3745

maf_id == NAND_MFR_HYNIX ||

3748

maf_id == NAND_MFR_TOSHIBA ||

3746

maf_id == NAND_MFR_TOSHIBA ||

3749

maf_id == NAND_MFR_AMD ||

3747

maf_id == NAND_MFR_AMD ||

3750

maf_id == NAND_MFR_MACRONIX)) ||

3748

maf_id == NAND_MFR_MACRONIX)) ||

3751

(mtd->writesize == 2048 &&

3749

(mtd->writesize == 2048 &&

3752

maf_id == NAND_MFR_MICRON))

3750

maf_id == NAND_MFR_MICRON))

3753

chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;

3751

chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;

3754

}

3752

}

3755

3753

3756

static inline bool is_full_id_nand(struct nand_flash_dev *type)

3754

static inline bool is_full_id_nand(struct nand_flash_dev *type)

3757

{

3755

{

3758

return type->id_len;

3756

return type->id_len;

3759

}

3757

}

3760

3758

3761

static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip,

3759

static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip,

3762

struct nand_flash_dev *type, u8 *id_data, int *busw)

3760

struct nand_flash_dev *type, u8 *id_data, int *busw)

3763

{

3761

{

3764

#ifndef __UBOOT__

3762

#ifndef __UBOOT__

3765

if (!strncmp(type->id, id_data, type->id_len)) {

3763

if (!strncmp(type->id, id_data, type->id_len)) {

3766

#else

3764

#else

3767

if (!strncmp((char *)type->id, (char *)id_data, type->id_len)) {

3765

if (!strncmp((char *)type->id, (char *)id_data, type->id_len)) {

3768

#endif

3766

#endif

3769

mtd->writesize = type->pagesize;

3767

mtd->writesize = type->pagesize;

3770

mtd->erasesize = type->erasesize;

3768

mtd->erasesize = type->erasesize;

3771

mtd->oobsize = type->oobsize;

3769

mtd->oobsize = type->oobsize;

3772

3770

3773

chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]);

3771

chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]);

3774

chip->chipsize = (uint64_t)type->chipsize << 20;

3772

chip->chipsize = (uint64_t)type->chipsize << 20;

3775

chip->options |= type->options;

3773

chip->options |= type->options;

3776

chip->ecc_strength_ds = NAND_ECC_STRENGTH(type);

3774

chip->ecc_strength_ds = NAND_ECC_STRENGTH(type);

3777

chip->ecc_step_ds = NAND_ECC_STEP(type);

3775

chip->ecc_step_ds = NAND_ECC_STEP(type);

3778

3776

3779

*busw = type->options & NAND_BUSWIDTH_16;

3777

*busw = type->options & NAND_BUSWIDTH_16;

3780

3778

3781

if (!mtd->name)

3779

if (!mtd->name)

3782

mtd->name = type->name;

3780

mtd->name = type->name;

3783

3781

3784

return true;

3782

return true;

3785

}

3783

}

3786

return false;

3784

return false;

3787

}

3785

}

3788

3786

3789

/*

3787

/*

3790

* Get the flash and manufacturer id and lookup if the type is supported.

3788

* Get the flash and manufacturer id and lookup if the type is supported.

3791

*/

3789

*/

3792

static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,

3790

static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,

3793

struct nand_chip *chip,

3791

struct nand_chip *chip,

3794

int *maf_id, int *dev_id,

3792

int *maf_id, int *dev_id,

3795

struct nand_flash_dev *type)

3793

struct nand_flash_dev *type)

3796

{

3794

{

3797

int busw;

3795

int busw;

3798

int i, maf_idx;

3796

int i, maf_idx;

3799

u8 id_data[8];

3797

u8 id_data[8];

3800

3798

3801

/* Select the device */

3799

/* Select the device */

3802

chip->select_chip(mtd, 0);

3800

chip->select_chip(mtd, 0);

3803

3801

3804

/*

3802

/*

3805

* Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)

3803

* Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)

3806

* after power-up.

3804

* after power-up.

3807

*/

3805

*/

3808

chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);

3806

chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);

3809

3807

3810

/* Send the command for reading device ID */

3808

/* Send the command for reading device ID */

3811

chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);

3809

chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);

3812

3810

3813

/* Read manufacturer and device IDs */

3811

/* Read manufacturer and device IDs */

3814

*maf_id = chip->read_byte(mtd);

3812

*maf_id = chip->read_byte(mtd);

3815

*dev_id = chip->read_byte(mtd);

3813

*dev_id = chip->read_byte(mtd);

3816

3814

3817

/*

3815

/*

3818

* Try again to make sure, as some systems the bus-hold or other

3816

* Try again to make sure, as some systems the bus-hold or other

3819

* interface concerns can cause random data which looks like a

3817

* interface concerns can cause random data which looks like a

3820

* possibly credible NAND flash to appear. If the two results do

3818

* possibly credible NAND flash to appear. If the two results do

3821

* not match, ignore the device completely.

3819

* not match, ignore the device completely.

3822

*/

3820

*/

3823

3821

3824

chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);

3822

chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);

3825

3823

3826

/* Read entire ID string */

3824

/* Read entire ID string */

3827

for (i = 0; i < 8; i++)

3825

for (i = 0; i < 8; i++)

3828

id_data[i] = chip->read_byte(mtd);

3826

id_data[i] = chip->read_byte(mtd);

3829

3827

3830

if (id_data[0] != *maf_id || id_data[1] != *dev_id) {

3828

if (id_data[0] != *maf_id || id_data[1] != *dev_id) {

3831

pr_info("second ID read did not match %02x,%02x against %02x,%02x\n",

3829

pr_info("second ID read did not match %02x,%02x against %02x,%02x\n",

3832

*maf_id, *dev_id, id_data[0], id_data[1]);

3830

*maf_id, *dev_id, id_data[0], id_data[1]);

3833

return ERR_PTR(-ENODEV);

3831

return ERR_PTR(-ENODEV);

3834

}

3832

}

3835

3833

3836

if (!type)

3834

if (!type)

3837

type = nand_flash_ids;

3835

type = nand_flash_ids;

3838

3836

3839

for (; type->name != NULL; type++) {

3837

for (; type->name != NULL; type++) {

3840

if (is_full_id_nand(type)) {

3838

if (is_full_id_nand(type)) {

3841

if (find_full_id_nand(mtd, chip, type, id_data, &busw))

3839

if (find_full_id_nand(mtd, chip, type, id_data, &busw))

3842

goto ident_done;

3840

goto ident_done;

3843

} else if (*dev_id == type->dev_id) {

3841

} else if (*dev_id == type->dev_id) {

3844

break;

3842

break;

3845

}

3843

}

3846

}

3844

}

3847

3845

3848

chip->onfi_version = 0;

3846

chip->onfi_version = 0;

3849

if (!type->name || !type->pagesize) {

3847

if (!type->name || !type->pagesize) {

3850

/* Check is chip is ONFI compliant */

3848

/* Check is chip is ONFI compliant */

3851

if (nand_flash_detect_onfi(mtd, chip, &busw))

3849

if (nand_flash_detect_onfi(mtd, chip, &busw))

3852

goto ident_done;

3850

goto ident_done;

3853

3851

3854

/* Check if the chip is JEDEC compliant */

3852

/* Check if the chip is JEDEC compliant */

3855

if (nand_flash_detect_jedec(mtd, chip, &busw))

3853

if (nand_flash_detect_jedec(mtd, chip, &busw))

3856

goto ident_done;

3854

goto ident_done;

3857

}

3855

}

3858

3856

3859

if (!type->name)

3857

if (!type->name)

3860

return ERR_PTR(-ENODEV);

3858

return ERR_PTR(-ENODEV);

3861

3859

3862

if (!mtd->name)

3860

if (!mtd->name)

3863

mtd->name = type->name;

3861

mtd->name = type->name;

3864

3862

3865

chip->chipsize = (uint64_t)type->chipsize << 20;

3863

chip->chipsize = (uint64_t)type->chipsize << 20;

3866

3864

3867

if (!type->pagesize && chip->init_size) {

3865

if (!type->pagesize && chip->init_size) {

3868

/* Set the pagesize, oobsize, erasesize by the driver */

3866

/* Set the pagesize, oobsize, erasesize by the driver */

3869

busw = chip->init_size(mtd, chip, id_data);

3867

busw = chip->init_size(mtd, chip, id_data);

3870

} else if (!type->pagesize) {

3868

} else if (!type->pagesize) {

3871

/* Decode parameters from extended ID */

3869

/* Decode parameters from extended ID */

3872

nand_decode_ext_id(mtd, chip, id_data, &busw);

3870

nand_decode_ext_id(mtd, chip, id_data, &busw);

3873

} else {

3871

} else {

3874

nand_decode_id(mtd, chip, type, id_data, &busw);

3872

nand_decode_id(mtd, chip, type, id_data, &busw);

3875

}

3873

}

3876

/* Get chip options */

3874

/* Get chip options */

3877

chip->options |= type->options;

3875

chip->options |= type->options;

3878

3876

3879

/*

3877

/*

3880

* Check if chip is not a Samsung device. Do not clear the

3878

* Check if chip is not a Samsung device. Do not clear the

3881

* options for chips which do not have an extended id.

3879

* options for chips which do not have an extended id.

3882

*/

3880

*/

3883

if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize)

3881

if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize)

3884

chip->options &= ~NAND_SAMSUNG_LP_OPTIONS;

3882

chip->options &= ~NAND_SAMSUNG_LP_OPTIONS;

3885

ident_done:

3883

ident_done:

3886

3884

3887

/* Try to identify manufacturer */

3885

/* Try to identify manufacturer */

3888

for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) {

3886

for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) {

3889

if (nand_manuf_ids[maf_idx].id == *maf_id)

3887

if (nand_manuf_ids[maf_idx].id == *maf_id)

3890

break;

3888

break;

3891

}

3889

}

3892

3890

3893

if (chip->options & NAND_BUSWIDTH_AUTO) {

3891

if (chip->options & NAND_BUSWIDTH_AUTO) {

3894

WARN_ON(chip->options & NAND_BUSWIDTH_16);

3892

WARN_ON(chip->options & NAND_BUSWIDTH_16);

3895

chip->options |= busw;

3893

chip->options |= busw;

3896

nand_set_defaults(chip, busw);

3894

nand_set_defaults(chip, busw);

3897

} else if (busw != (chip->options & NAND_BUSWIDTH_16)) {

3895

} else if (busw != (chip->options & NAND_BUSWIDTH_16)) {

3898

/*

3896

/*

3899

* Check, if buswidth is correct. Hardware drivers should set

3897

* Check, if buswidth is correct. Hardware drivers should set

3900

* chip correct!

3898

* chip correct!

3901

*/

3899

*/

3902

pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n",

3900

pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n",

3903

*maf_id, *dev_id);

3901

*maf_id, *dev_id);

3904

pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, mtd->name);

3902

pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, mtd->name);

3905

pr_warn("bus width %d instead %d bit\n",

3903

pr_warn("bus width %d instead %d bit\n",

3906

(chip->options & NAND_BUSWIDTH_16) ? 16 : 8,

3904

(chip->options & NAND_BUSWIDTH_16) ? 16 : 8,

3907

busw ? 16 : 8);

3905

busw ? 16 : 8);

3908

return ERR_PTR(-EINVAL);

3906

return ERR_PTR(-EINVAL);

3909

}

3907

}

3910

3908

3911

nand_decode_bbm_options(mtd, chip, id_data);

3909

nand_decode_bbm_options(mtd, chip, id_data);

3912

3910

3913

/* Calculate the address shift from the page size */

3911

/* Calculate the address shift from the page size */

3914

chip->page_shift = ffs(mtd->writesize) - 1;

3912

chip->page_shift = ffs(mtd->writesize) - 1;

3915

/* Convert chipsize to number of pages per chip -1 */

3913

/* Convert chipsize to number of pages per chip -1 */

3916

chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;

3914

chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;

3917

3915

3918

chip->bbt_erase_shift = chip->phys_erase_shift =

3916

chip->bbt_erase_shift = chip->phys_erase_shift =

3919

ffs(mtd->erasesize) - 1;

3917

ffs(mtd->erasesize) - 1;

3920

if (chip->chipsize & 0xffffffff)

3918

if (chip->chipsize & 0xffffffff)

3921

chip->chip_shift = ffs((unsigned)chip->chipsize) - 1;

3919

chip->chip_shift = ffs((unsigned)chip->chipsize) - 1;

3922

else {

3920

else {

3923

chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32));

3921

chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32));

3924

chip->chip_shift += 32 - 1;

3922

chip->chip_shift += 32 - 1;

3925

}

3923

}

3926

3924

3927

chip->badblockbits = 8;

3925

chip->badblockbits = 8;

3928

chip->erase_cmd = single_erase_cmd;

3926

chip->erase_cmd = single_erase_cmd;

3929

3927

3930

/* Do not replace user supplied command function! */

3928

/* Do not replace user supplied command function! */

3931

if (mtd->writesize > 512 && chip->cmdfunc == nand_command)

3929

if (mtd->writesize > 512 && chip->cmdfunc == nand_command)

3932

chip->cmdfunc = nand_command_lp;

3930

chip->cmdfunc = nand_command_lp;

3933

3931

3934

pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n",

3932

pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n",

3935

*maf_id, *dev_id);

3933

*maf_id, *dev_id);

3936

3934

3937

#ifdef CONFIG_SYS_NAND_ONFI_DETECTION

3935

#ifdef CONFIG_SYS_NAND_ONFI_DETECTION

3938

if (chip->onfi_version)

3936

if (chip->onfi_version)

3939

pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,

3937

pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,

3940

chip->onfi_params.model);

3938

chip->onfi_params.model);

3941

else if (chip->jedec_version)

3939

else if (chip->jedec_version)

3942

pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,

3940

pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,

3943

chip->jedec_params.model);

3941

chip->jedec_params.model);

3944

else

3942

else

3945

pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,

3943

pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,

3946

type->name);

3944

type->name);

3947

#else

3945

#else

3948

if (chip->jedec_version)

3946

if (chip->jedec_version)

3949

pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,

3947

pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,

3950

chip->jedec_params.model);

3948

chip->jedec_params.model);

3951

else

3949

else

3952

pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,

3950

pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,

3953

type->name);

3951

type->name);

3954

3952

3955

pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,

3953

pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,

3956

type->name);

3954

type->name);

3957

#endif

3955

#endif

3958

3956

3959

pr_info("%dMiB, %s, page size: %d, OOB size: %d\n",

3957

pr_info("%dMiB, %s, page size: %d, OOB size: %d\n",

3960

(int)(chip->chipsize >> 20), nand_is_slc(chip) ? "SLC" : "MLC",

3958

(int)(chip->chipsize >> 20), nand_is_slc(chip) ? "SLC" : "MLC",

3961

mtd->writesize, mtd->oobsize);

3959

mtd->writesize, mtd->oobsize);

3962

return type;

3960

return type;

3963

}

3961

}

3964

3962

3965

/**

3963

/**

3966

* nand_scan_ident - [NAND Interface] Scan for the NAND device

3964

* nand_scan_ident - [NAND Interface] Scan for the NAND device

3967

* @mtd: MTD device structure

3965

* @mtd: MTD device structure

3968

* @maxchips: number of chips to scan for

3966

* @maxchips: number of chips to scan for

3969

* @table: alternative NAND ID table

3967

* @table: alternative NAND ID table

3970

*

3968

*

3971

* This is the first phase of the normal nand_scan() function. It reads the

3969

* This is the first phase of the normal nand_scan() function. It reads the

3972

* flash ID and sets up MTD fields accordingly.

3970

* flash ID and sets up MTD fields accordingly.

3973

*

3971

*

3974

* The mtd->owner field must be set to the module of the caller.

3972

* The mtd->owner field must be set to the module of the caller.

3975

*/

3973

*/

3976

int nand_scan_ident(struct mtd_info *mtd, int maxchips,

3974

int nand_scan_ident(struct mtd_info *mtd, int maxchips,

3977

struct nand_flash_dev *table)

3975

struct nand_flash_dev *table)

3978

{

3976

{

3979

int i, nand_maf_id, nand_dev_id;

3977

int i, nand_maf_id, nand_dev_id;

3980

struct nand_chip *chip = mtd->priv;

3978

struct nand_chip *chip = mtd->priv;

3981

struct nand_flash_dev *type;

3979

struct nand_flash_dev *type;

3982

3980

3983

/* Set the default functions */

3981

/* Set the default functions */

3984

nand_set_defaults(chip, chip->options & NAND_BUSWIDTH_16);

3982

nand_set_defaults(chip, chip->options & NAND_BUSWIDTH_16);

3985

3983

3986

/* Read the flash type */

3984

/* Read the flash type */

3987

type = nand_get_flash_type(mtd, chip, &nand_maf_id,

3985

type = nand_get_flash_type(mtd, chip, &nand_maf_id,

3988

&nand_dev_id, table);

3986

&nand_dev_id, table);

3989

3987

3990

if (IS_ERR(type)) {

3988

if (IS_ERR(type)) {

3991

if (!(chip->options & NAND_SCAN_SILENT_NODEV))

3989

if (!(chip->options & NAND_SCAN_SILENT_NODEV))

3992

pr_warn("No NAND device found\n");

3990

pr_warn("No NAND device found\n");

3993

chip->select_chip(mtd, -1);

3991

chip->select_chip(mtd, -1);

3994

return PTR_ERR(type);

3992

return PTR_ERR(type);

3995

}

3993

}

3996

3994

3997

chip->select_chip(mtd, -1);

3995

chip->select_chip(mtd, -1);

3998

3996

3999

/* Check for a chip array */

3997

/* Check for a chip array */

4000

for (i = 1; i < maxchips; i++) {

3998

for (i = 1; i < maxchips; i++) {

4001

chip->select_chip(mtd, i);

3999

chip->select_chip(mtd, i);

4002

/* See comment in nand_get_flash_type for reset */

4000

/* See comment in nand_get_flash_type for reset */

4003

chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);

4001

chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);

4004

/* Send the command for reading device ID */

4002

/* Send the command for reading device ID */

4005

chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);

4003

chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);

4006

/* Read manufacturer and device IDs */

4004

/* Read manufacturer and device IDs */

4007

if (nand_maf_id != chip->read_byte(mtd) ||

4005

if (nand_maf_id != chip->read_byte(mtd) ||

4008

nand_dev_id != chip->read_byte(mtd)) {

4006

nand_dev_id != chip->read_byte(mtd)) {

4009

chip->select_chip(mtd, -1);

4007

chip->select_chip(mtd, -1);

4010

break;

4008

break;

4011

}

4009

}

4012

chip->select_chip(mtd, -1);

4010

chip->select_chip(mtd, -1);

4013

}

4011

}

4014

4012

4015

#ifdef DEBUG

4013

#ifdef DEBUG

4016

if (i > 1)

4014

if (i > 1)

4017

pr_info("%d chips detected\n", i);

4015

pr_info("%d chips detected\n", i);

4018

#endif

4016

#endif

4019

4017

4020

/* Store the number of chips and calc total size for mtd */

4018

/* Store the number of chips and calc total size for mtd */

4021

chip->numchips = i;

4019

chip->numchips = i;

4022

mtd->size = i * chip->chipsize;

4020

mtd->size = i * chip->chipsize;

4023

4021

4024

return 0;

4022

return 0;

4025

}

4023

}

4026

EXPORT_SYMBOL(nand_scan_ident);

4024

EXPORT_SYMBOL(nand_scan_ident);

4027

4025

4028

4026

4029

/**

4027

/**

4030

* nand_scan_tail - [NAND Interface] Scan for the NAND device

4028

* nand_scan_tail - [NAND Interface] Scan for the NAND device

4031

* @mtd: MTD device structure

4029

* @mtd: MTD device structure

4032

*

4030

*

4033

* This is the second phase of the normal nand_scan() function. It fills out

4031

* This is the second phase of the normal nand_scan() function. It fills out

4034

* all the uninitialized function pointers with the defaults and scans for a

4032

* all the uninitialized function pointers with the defaults and scans for a

4035

* bad block table if appropriate.

4033

* bad block table if appropriate.

4036

*/

4034

*/

4037

int nand_scan_tail(struct mtd_info *mtd)

4035

int nand_scan_tail(struct mtd_info *mtd)

4038

{

4036

{

4039

int i;

4037

int i;

4040

struct nand_chip *chip = mtd->priv;

4038

struct nand_chip *chip = mtd->priv;

4041

struct nand_ecc_ctrl *ecc = &chip->ecc;

4039

struct nand_ecc_ctrl *ecc = &chip->ecc;

4042

struct nand_buffers *nbuf;

4040

struct nand_buffers *nbuf;

4043

4041

4044

/* New bad blocks should be marked in OOB, flash-based BBT, or both */

4042

/* New bad blocks should be marked in OOB, flash-based BBT, or both */

4045

BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&

4043

BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&

4046

!(chip->bbt_options & NAND_BBT_USE_FLASH));

4044

!(chip->bbt_options & NAND_BBT_USE_FLASH));

4047

4045

4048

if (!(chip->options & NAND_OWN_BUFFERS)) {

4046

if (!(chip->options & NAND_OWN_BUFFERS)) {

4049

#ifndef __UBOOT__

4047

#ifndef __UBOOT__

4050

nbuf = kzalloc(sizeof(*nbuf) + mtd->writesize

4048

nbuf = kzalloc(sizeof(*nbuf) + mtd->writesize

4051

+ mtd->oobsize * 3, GFP_KERNEL);

4049

+ mtd->oobsize * 3, GFP_KERNEL);

4052

if (!nbuf)

4050

if (!nbuf)

4053

return -ENOMEM;

4051

return -ENOMEM;

4054

nbuf->ecccalc = (uint8_t *)(nbuf + 1);

4052

nbuf->ecccalc = (uint8_t *)(nbuf + 1);

4055

nbuf->ecccode = nbuf->ecccalc + mtd->oobsize;

4053

nbuf->ecccode = nbuf->ecccalc + mtd->oobsize;

4056

nbuf->databuf = nbuf->ecccode + mtd->oobsize;

4054

nbuf->databuf = nbuf->ecccode + mtd->oobsize;

4057

#else

4055

#else

4058

nbuf = kzalloc(sizeof(struct nand_buffers), GFP_KERNEL);

4056

nbuf = kzalloc(sizeof(struct nand_buffers), GFP_KERNEL);

4059

#endif

4057

#endif

4060

4058

4061

chip->buffers = nbuf;

4059

chip->buffers = nbuf;

4062

} else {

4060

} else {

4063

if (!chip->buffers)

4061

if (!chip->buffers)

4064

return -ENOMEM;

4062

return -ENOMEM;

4065

}

4063

}

4066

4064

4067

/* Set the internal oob buffer location, just after the page data */

4065

/* Set the internal oob buffer location, just after the page data */

4068

chip->oob_poi = chip->buffers->databuf + mtd->writesize;

4066

chip->oob_poi = chip->buffers->databuf + mtd->writesize;

4069

4067

4070

/*

4068

/*

4071

* If no default placement scheme is given, select an appropriate one.

4069

* If no default placement scheme is given, select an appropriate one.

4072

*/

4070

*/

4073

if (!ecc->layout && (ecc->mode != NAND_ECC_SOFT_BCH)) {

4071

if (!ecc->layout && (ecc->mode != NAND_ECC_SOFT_BCH)) {

4074

switch (mtd->oobsize) {

4072

switch (mtd->oobsize) {

4075

case 8:

4073

case 8:

4076

ecc->layout = &nand_oob_8;

4074

ecc->layout = &nand_oob_8;

4077

break;

4075

break;

4078

case 16:

4076

case 16:

4079

ecc->layout = &nand_oob_16;

4077

ecc->layout = &nand_oob_16;

4080

break;

4078

break;

4081

case 64:

4079

case 64:

4082

ecc->layout = &nand_oob_64;

4080

ecc->layout = &nand_oob_64;

4083

break;

4081

break;

4084

case 128:

4082

case 128:

4085

ecc->layout = &nand_oob_128;

4083

ecc->layout = &nand_oob_128;

4086

break;

4084

break;

4087

default:

4085

default:

4088

pr_warn("No oob scheme defined for oobsize %d\n",

4086

pr_warn("No oob scheme defined for oobsize %d\n",

4089

mtd->oobsize);

4087

mtd->oobsize);

4090

BUG();

4088

BUG();

4091

}

4089

}

4092

}

4090

}

4093

4091

4094

if (!chip->write_page)

4092

if (!chip->write_page)

4095

chip->write_page = nand_write_page;

4093

chip->write_page = nand_write_page;

4096

4094

4097

/*

4095

/*

4098

* Check ECC mode, default to software if 3byte/512byte hardware ECC is

4096

* Check ECC mode, default to software if 3byte/512byte hardware ECC is

4099

* selected and we have 256 byte pagesize fallback to software ECC

4097

* selected and we have 256 byte pagesize fallback to software ECC

4100

*/

4098

*/

4101

4099

4102

switch (ecc->mode) {

4100

switch (ecc->mode) {

4103

case NAND_ECC_HW_OOB_FIRST:

4101

case NAND_ECC_HW_OOB_FIRST:

4104

/* Similar to NAND_ECC_HW, but a separate read_page handle */

4102

/* Similar to NAND_ECC_HW, but a separate read_page handle */

4105

if (!ecc->calculate || !ecc->correct || !ecc->hwctl) {

4103

if (!ecc->calculate || !ecc->correct || !ecc->hwctl) {

4106

pr_warn("No ECC functions supplied; "

4104

pr_warn("No ECC functions supplied; "

4107

"hardware ECC not possible\n");

4105

"hardware ECC not possible\n");

4108

BUG();

4106

BUG();

4109

}

4107

}

4110

if (!ecc->read_page)

4108

if (!ecc->read_page)

4111

ecc->read_page = nand_read_page_hwecc_oob_first;

4109

ecc->read_page = nand_read_page_hwecc_oob_first;

4112

4110

4113

case NAND_ECC_HW:

4111

case NAND_ECC_HW:

4114

/* Use standard hwecc read page function? */

4112

/* Use standard hwecc read page function? */

4115

if (!ecc->read_page)

4113

if (!ecc->read_page)

4116

ecc->read_page = nand_read_page_hwecc;

4114

ecc->read_page = nand_read_page_hwecc;

4117

if (!ecc->write_page)

4115

if (!ecc->write_page)

4118

ecc->write_page = nand_write_page_hwecc;

4116

ecc->write_page = nand_write_page_hwecc;

4119

if (!ecc->read_page_raw)

4117

if (!ecc->read_page_raw)

4120

ecc->read_page_raw = nand_read_page_raw;

4118

ecc->read_page_raw = nand_read_page_raw;

4121

if (!ecc->write_page_raw)

4119

if (!ecc->write_page_raw)

4122

ecc->write_page_raw = nand_write_page_raw;

4120

ecc->write_page_raw = nand_write_page_raw;

4123

if (!ecc->read_oob)

4121

if (!ecc->read_oob)

4124

ecc->read_oob = nand_read_oob_std;

4122

ecc->read_oob = nand_read_oob_std;

4125

if (!ecc->write_oob)

4123

if (!ecc->write_oob)

4126

ecc->write_oob = nand_write_oob_std;

4124

ecc->write_oob = nand_write_oob_std;

4127

if (!ecc->read_subpage)

4125

if (!ecc->read_subpage)

4128

ecc->read_subpage = nand_read_subpage;

4126

ecc->read_subpage = nand_read_subpage;

4129

if (!ecc->write_subpage)

4127

if (!ecc->write_subpage)

4130

ecc->write_subpage = nand_write_subpage_hwecc;

4128

ecc->write_subpage = nand_write_subpage_hwecc;

4131

4129

4132

case NAND_ECC_HW_SYNDROME:

4130

case NAND_ECC_HW_SYNDROME:

4133

if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) &&

4131

if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) &&

4134

(!ecc->read_page ||

4132

(!ecc->read_page ||

4135

ecc->read_page == nand_read_page_hwecc ||

4133

ecc->read_page == nand_read_page_hwecc ||

4136

!ecc->write_page ||

4134

!ecc->write_page ||

4137

ecc->write_page == nand_write_page_hwecc)) {

4135

ecc->write_page == nand_write_page_hwecc)) {

4138

pr_warn("No ECC functions supplied; "

4136

pr_warn("No ECC functions supplied; "

4139

"hardware ECC not possible\n");

4137

"hardware ECC not possible\n");

4140

BUG();

4138

BUG();

4141

}

4139

}

4142

/* Use standard syndrome read/write page function? */

4140

/* Use standard syndrome read/write page function? */

4143

if (!ecc->read_page)

4141

if (!ecc->read_page)

4144

ecc->read_page = nand_read_page_syndrome;

4142

ecc->read_page = nand_read_page_syndrome;

4145

if (!ecc->write_page)

4143

if (!ecc->write_page)

4146

ecc->write_page = nand_write_page_syndrome;

4144

ecc->write_page = nand_write_page_syndrome;

4147

if (!ecc->read_page_raw)

4145

if (!ecc->read_page_raw)

4148

ecc->read_page_raw = nand_read_page_raw_syndrome;

4146

ecc->read_page_raw = nand_read_page_raw_syndrome;

4149

if (!ecc->write_page_raw)

4147

if (!ecc->write_page_raw)

4150

ecc->write_page_raw = nand_write_page_raw_syndrome;

4148

ecc->write_page_raw = nand_write_page_raw_syndrome;

4151

if (!ecc->read_oob)

4149

if (!ecc->read_oob)

4152

ecc->read_oob = nand_read_oob_syndrome;

4150

ecc->read_oob = nand_read_oob_syndrome;

4153

if (!ecc->write_oob)

4151

if (!ecc->write_oob)

4154

ecc->write_oob = nand_write_oob_syndrome;

4152

ecc->write_oob = nand_write_oob_syndrome;

4155

4153

4156

if (mtd->writesize >= ecc->size) {

4154

if (mtd->writesize >= ecc->size) {

4157

if (!ecc->strength) {

4155

if (!ecc->strength) {

4158

pr_warn("Driver must set ecc.strength when using hardware ECC\n");

4156

pr_warn("Driver must set ecc.strength when using hardware ECC\n");

4159

BUG();

4157

BUG();

4160

}

4158

}

4161

break;

4159

break;

4162

}

4160

}

4163

pr_warn("%d byte HW ECC not possible on "

4161

pr_warn("%d byte HW ECC not possible on "

4164

"%d byte page size, fallback to SW ECC\n",

4162

"%d byte page size, fallback to SW ECC\n",

4165

ecc->size, mtd->writesize);

4163

ecc->size, mtd->writesize);

4166

ecc->mode = NAND_ECC_SOFT;

4164

ecc->mode = NAND_ECC_SOFT;

4167

4165

4168

case NAND_ECC_SOFT:

4166

case NAND_ECC_SOFT:

4169

ecc->calculate = nand_calculate_ecc;

4167

ecc->calculate = nand_calculate_ecc;

4170

ecc->correct = nand_correct_data;

4168

ecc->correct = nand_correct_data;

4171

ecc->read_page = nand_read_page_swecc;

4169

ecc->read_page = nand_read_page_swecc;

4172

ecc->read_subpage = nand_read_subpage;

4170

ecc->read_subpage = nand_read_subpage;

4173

ecc->write_page = nand_write_page_swecc;

4171

ecc->write_page = nand_write_page_swecc;

4174

ecc->read_page_raw = nand_read_page_raw;

4172

ecc->read_page_raw = nand_read_page_raw;

4175

ecc->write_page_raw = nand_write_page_raw;

4173

ecc->write_page_raw = nand_write_page_raw;

4176

ecc->read_oob = nand_read_oob_std;

4174

ecc->read_oob = nand_read_oob_std;

4177

ecc->write_oob = nand_write_oob_std;

4175

ecc->write_oob = nand_write_oob_std;

4178

if (!ecc->size)

4176

if (!ecc->size)

4179

ecc->size = 256;

4177

ecc->size = 256;

4180

ecc->bytes = 3;

4178

ecc->bytes = 3;

4181

ecc->strength = 1;

4179

ecc->strength = 1;

4182

break;

4180

break;

4183

4181

4184

case NAND_ECC_SOFT_BCH:

4182

case NAND_ECC_SOFT_BCH:

4185

if (!mtd_nand_has_bch()) {

4183

if (!mtd_nand_has_bch()) {

4186

pr_warn("CONFIG_MTD_NAND_ECC_BCH not enabled\n");

4184

pr_warn("CONFIG_MTD_NAND_ECC_BCH not enabled\n");

4187

BUG();

4185

BUG();

4188

}

4186

}

4189

ecc->calculate = nand_bch_calculate_ecc;

4187

ecc->calculate = nand_bch_calculate_ecc;

4190

ecc->correct = nand_bch_correct_data;

4188

ecc->correct = nand_bch_correct_data;

4191

ecc->read_page = nand_read_page_swecc;

4189

ecc->read_page = nand_read_page_swecc;

4192

ecc->read_subpage = nand_read_subpage;

4190

ecc->read_subpage = nand_read_subpage;

4193

ecc->write_page = nand_write_page_swecc;

4191

ecc->write_page = nand_write_page_swecc;

4194

ecc->read_page_raw = nand_read_page_raw;

4192

ecc->read_page_raw = nand_read_page_raw;

4195

ecc->write_page_raw = nand_write_page_raw;

4193

ecc->write_page_raw = nand_write_page_raw;

4196

ecc->read_oob = nand_read_oob_std;

4194

ecc->read_oob = nand_read_oob_std;

4197

ecc->write_oob = nand_write_oob_std;

4195

ecc->write_oob = nand_write_oob_std;

4198

/*

4196

/*

4199

* Board driver should supply ecc.size and ecc.bytes values to

4197

* Board driver should supply ecc.size and ecc.bytes values to

4200

* select how many bits are correctable; see nand_bch_init()

4198

* select how many bits are correctable; see nand_bch_init()

4201

* for details. Otherwise, default to 4 bits for large page

4199

* for details. Otherwise, default to 4 bits for large page

4202

* devices.

4200

* devices.

4203

*/

4201

*/

4204

if (!ecc->size && (mtd->oobsize >= 64)) {

4202

if (!ecc->size && (mtd->oobsize >= 64)) {

4205

ecc->size = 512;

4203

ecc->size = 512;

4206

ecc->bytes = 7;

4204

ecc->bytes = 7;

4207

}

4205

}

4208

ecc->priv = nand_bch_init(mtd, ecc->size, ecc->bytes,

4206

ecc->priv = nand_bch_init(mtd, ecc->size, ecc->bytes,

4209

&ecc->layout);

4207

&ecc->layout);

4210

if (!ecc->priv) {

4208

if (!ecc->priv) {

4211

pr_warn("BCH ECC initialization failed!\n");

4209

pr_warn("BCH ECC initialization failed!\n");

4212

BUG();

4210

BUG();

4213

}

4211

}

4214

ecc->strength = ecc->bytes * 8 / fls(8 * ecc->size);

4212

ecc->strength = ecc->bytes * 8 / fls(8 * ecc->size);

4215

break;

4213

break;

4216

4214

4217

case NAND_ECC_NONE:

4215

case NAND_ECC_NONE:

4218

pr_warn("NAND_ECC_NONE selected by board driver. "

4216

pr_warn("NAND_ECC_NONE selected by board driver. "

4219

"This is not recommended!\n");

4217

"This is not recommended!\n");

4220

ecc->read_page = nand_read_page_raw;

4218

ecc->read_page = nand_read_page_raw;

4221

ecc->write_page = nand_write_page_raw;

4219

ecc->write_page = nand_write_page_raw;

4222

ecc->read_oob = nand_read_oob_std;

4220

ecc->read_oob = nand_read_oob_std;

4223

ecc->read_page_raw = nand_read_page_raw;

4221

ecc->read_page_raw = nand_read_page_raw;

4224

ecc->write_page_raw = nand_write_page_raw;

4222

ecc->write_page_raw = nand_write_page_raw;

4225

ecc->write_oob = nand_write_oob_std;

4223

ecc->write_oob = nand_write_oob_std;

4226

ecc->size = mtd->writesize;

4224

ecc->size = mtd->writesize;

4227

ecc->bytes = 0;

4225

ecc->bytes = 0;

4228

ecc->strength = 0;

4226

ecc->strength = 0;

4229

break;

4227

break;

4230

4228

4231

default:

4229

default:

4232

pr_warn("Invalid NAND_ECC_MODE %d\n", ecc->mode);

4230

pr_warn("Invalid NAND_ECC_MODE %d\n", ecc->mode);

4233

BUG();

4231

BUG();

4234

}

4232

}

4235

4233

4236

/* For many systems, the standard OOB write also works for raw */

4234

/* For many systems, the standard OOB write also works for raw */

4237

if (!ecc->read_oob_raw)

4235

if (!ecc->read_oob_raw)

4238

ecc->read_oob_raw = ecc->read_oob;

4236

ecc->read_oob_raw = ecc->read_oob;

4239

if (!ecc->write_oob_raw)

4237

if (!ecc->write_oob_raw)

4240

ecc->write_oob_raw = ecc->write_oob;

4238

ecc->write_oob_raw = ecc->write_oob;

4241

4239

4242

/*

4240

/*

4243

* The number of bytes available for a client to place data into

4241

* The number of bytes available for a client to place data into

4244

* the out of band area.

4242

* the out of band area.

4245

*/

4243

*/

4246

ecc->layout->oobavail = 0;

4244

ecc->layout->oobavail = 0;

4247

for (i = 0; ecc->layout->oobfree[i].length

4245

for (i = 0; ecc->layout->oobfree[i].length

4248

&& i < ARRAY_SIZE(ecc->layout->oobfree); i++)

4246

&& i < ARRAY_SIZE(ecc->layout->oobfree); i++)

4249

ecc->layout->oobavail += ecc->layout->oobfree[i].length;

4247

ecc->layout->oobavail += ecc->layout->oobfree[i].length;

4250

mtd->oobavail = ecc->layout->oobavail;

4248

mtd->oobavail = ecc->layout->oobavail;

4251

4249

4252

/*

4250

/*

4253

* Set the number of read / write steps for one page depending on ECC

4251

* Set the number of read / write steps for one page depending on ECC

4254

* mode.

4252

* mode.

4255

*/

4253

*/

4256

ecc->steps = mtd->writesize / ecc->size;

4254

ecc->steps = mtd->writesize / ecc->size;

4257

if (ecc->steps * ecc->size != mtd->writesize) {

4255

if (ecc->steps * ecc->size != mtd->writesize) {

4258

pr_warn("Invalid ECC parameters\n");

4256

pr_warn("Invalid ECC parameters\n");

4259

BUG();

4257

BUG();

4260

}

4258

}

4261

ecc->total = ecc->steps * ecc->bytes;

4259

ecc->total = ecc->steps * ecc->bytes;

4262

4260

4263

/* Allow subpage writes up to ecc.steps. Not possible for MLC flash */

4261

/* Allow subpage writes up to ecc.steps. Not possible for MLC flash */

4264

if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) {

4262

if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) {

4265

switch (ecc->steps) {

4263

switch (ecc->steps) {

4266

case 2:

4264

case 2:

4267

mtd->subpage_sft = 1;

4265

mtd->subpage_sft = 1;

4268

break;

4266

break;

4269

case 4:

4267

case 4:

4270

case 8:

4268

case 8:

4271

case 16:

4269

case 16:

4272

mtd->subpage_sft = 2;

4270

mtd->subpage_sft = 2;

4273

break;

4271

break;

4274

}

4272

}

4275

}

4273

}

4276

chip->subpagesize = mtd->writesize >> mtd->subpage_sft;

4274

chip->subpagesize = mtd->writesize >> mtd->subpage_sft;

4277

4275

4278

/* Initialize state */

4276

/* Initialize state */

4279

chip->state = FL_READY;

4277

chip->state = FL_READY;

4280

4278

4281

/* Invalidate the pagebuffer reference */

4279

/* Invalidate the pagebuffer reference */

4282

chip->pagebuf = -1;

4280

chip->pagebuf = -1;

4283

4281

4284

/* Large page NAND with SOFT_ECC should support subpage reads */

4282

/* Large page NAND with SOFT_ECC should support subpage reads */

4285

if ((ecc->mode == NAND_ECC_SOFT) && (chip->page_shift > 9))

4283

if ((ecc->mode == NAND_ECC_SOFT) && (chip->page_shift > 9))

4286

chip->options |= NAND_SUBPAGE_READ;

4284

chip->options |= NAND_SUBPAGE_READ;

4287

4285

4288

/* Fill in remaining MTD driver data */

4286

/* Fill in remaining MTD driver data */

4289

mtd->type = nand_is_slc(chip) ? MTD_NANDFLASH : MTD_MLCNANDFLASH;

4287

mtd->type = nand_is_slc(chip) ? MTD_NANDFLASH : MTD_MLCNANDFLASH;

4290

mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM :

4288

mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM :

4291

MTD_CAP_NANDFLASH;

4289

MTD_CAP_NANDFLASH;

4292

mtd->_erase = nand_erase;

4290

mtd->_erase = nand_erase;

4293

#ifndef __UBOOT__

4291

#ifndef __UBOOT__

4294

mtd->_point = NULL;

4292

mtd->_point = NULL;

4295

mtd->_unpoint = NULL;

4293

mtd->_unpoint = NULL;

4296

#endif

4294

#endif

4297

mtd->_read = nand_read;

4295

mtd->_read = nand_read;

4298

mtd->_write = nand_write;

4296

mtd->_write = nand_write;

4299

mtd->_panic_write = panic_nand_write;

4297

mtd->_panic_write = panic_nand_write;

4300

mtd->_read_oob = nand_read_oob;

4298

mtd->_read_oob = nand_read_oob;

4301

mtd->_write_oob = nand_write_oob;

4299

mtd->_write_oob = nand_write_oob;

4302

mtd->_sync = nand_sync;

4300

mtd->_sync = nand_sync;

4303

mtd->_lock = NULL;

4301

mtd->_lock = NULL;

4304

mtd->_unlock = NULL;

4302

mtd->_unlock = NULL;

4305

#ifndef __UBOOT__

4303

#ifndef __UBOOT__

4306

mtd->_suspend = nand_suspend;

4304

mtd->_suspend = nand_suspend;

4307

mtd->_resume = nand_resume;

4305

mtd->_resume = nand_resume;

4308

#endif

4306

#endif

4309

mtd->_block_isbad = nand_block_isbad;

4307

mtd->_block_isbad = nand_block_isbad;

4310

mtd->_block_markbad = nand_block_markbad;

4308

mtd->_block_markbad = nand_block_markbad;

4311

mtd->writebufsize = mtd->writesize;

4309

mtd->writebufsize = mtd->writesize;

4312

4310

4313

/* propagate ecc info to mtd_info */

4311

/* propagate ecc info to mtd_info */

4314

mtd->ecclayout = ecc->layout;

4312

mtd->ecclayout = ecc->layout;

4315

mtd->ecc_strength = ecc->strength;

4313

mtd->ecc_strength = ecc->strength;

4316

mtd->ecc_step_size = ecc->size;

4314

mtd->ecc_step_size = ecc->size;

4317

/*

4315

/*

4318

* Initialize bitflip_threshold to its default prior scan_bbt() call.

4316

* Initialize bitflip_threshold to its default prior scan_bbt() call.

4319

* scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be

4317

* scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be

4320

* properly set.

4318

* properly set.

4321

*/

4319

*/

4322

if (!mtd->bitflip_threshold)

4320

if (!mtd->bitflip_threshold)

4323

mtd->bitflip_threshold = mtd->ecc_strength;

4321

mtd->bitflip_threshold = mtd->ecc_strength;

4324

4322

4325

/* Check, if we should skip the bad block table scan */

4323

/* Check, if we should skip the bad block table scan */

4326

if (chip->options & NAND_SKIP_BBTSCAN)

4324

if (chip->options & NAND_SKIP_BBTSCAN)

4327

return 0;

4325

return 0;

4328

4326

4329

/* Build bad block table */

4327

/* Build bad block table */

4330

return chip->scan_bbt(mtd);

4328

return chip->scan_bbt(mtd);

4331

}

4329

}

4332

EXPORT_SYMBOL(nand_scan_tail);

4330

EXPORT_SYMBOL(nand_scan_tail);

4333

4331

4334

/*

4332

/*

4335

* is_module_text_address() isn't exported, and it's mostly a pointless

4333

* is_module_text_address() isn't exported, and it's mostly a pointless

4336

* test if this is a module _anyway_ -- they'd have to try _really_ hard

4334

* test if this is a module _anyway_ -- they'd have to try _really_ hard

4337

* to call us from in-kernel code if the core NAND support is modular.

4335

* to call us from in-kernel code if the core NAND support is modular.

4338

*/

4336

*/

4339

#ifdef MODULE

4337

#ifdef MODULE

4340

#define caller_is_module() (1)

4338

#define caller_is_module() (1)

4341

#else

4339

#else

4342

#define caller_is_module() \

4340

#define caller_is_module() \

4343

is_module_text_address((unsigned long)__builtin_return_address(0))

4341

is_module_text_address((unsigned long)__builtin_return_address(0))

4344

#endif

4342

#endif

4345

4343

4346

/**

4344

/**

4347

* nand_scan - [NAND Interface] Scan for the NAND device

4345

* nand_scan - [NAND Interface] Scan for the NAND device

4348

* @mtd: MTD device structure

4346

* @mtd: MTD device structure

4349

* @maxchips: number of chips to scan for

4347

* @maxchips: number of chips to scan for

4350

*

4348

*

4351

* This fills out all the uninitialized function pointers with the defaults.

4349

* This fills out all the uninitialized function pointers with the defaults.

4352

* The flash ID is read and the mtd/chip structures are filled with the

4350

* The flash ID is read and the mtd/chip structures are filled with the

4353

* appropriate values. The mtd->owner field must be set to the module of the

4351

* appropriate values. The mtd->owner field must be set to the module of the

4354

* caller.

4352

* caller.

4355

*/

4353

*/

4356

int nand_scan(struct mtd_info *mtd, int maxchips)

4354

int nand_scan(struct mtd_info *mtd, int maxchips)

4357

{

4355

{

4358

int ret;

4356

int ret;

4359

4357

4360

/* Many callers got this wrong, so check for it for a while... */

4358

/* Many callers got this wrong, so check for it for a while... */

4361

if (!mtd->owner && caller_is_module()) {

4359

if (!mtd->owner && caller_is_module()) {

4362

pr_crit("%s called with NULL mtd->owner!\n", __func__);

4360

pr_crit("%s called with NULL mtd->owner!\n", __func__);

4363

BUG();

4361

BUG();

4364

}

4362

}

4365

4363

4366

ret = nand_scan_ident(mtd, maxchips, NULL);

4364

ret = nand_scan_ident(mtd, maxchips, NULL);

4367

if (!ret)

4365

if (!ret)

4368

ret = nand_scan_tail(mtd);

4366

ret = nand_scan_tail(mtd);

4369

return ret;

4367

return ret;

4370

}

4368

}

4371

EXPORT_SYMBOL(nand_scan);

4369

EXPORT_SYMBOL(nand_scan);

4372

4370

4373

#ifndef __UBOOT__

4371

#ifndef __UBOOT__

4374

/**

4372

/**

4375

* nand_release - [NAND Interface] Free resources held by the NAND device

4373

* nand_release - [NAND Interface] Free resources held by the NAND device

4376

* @mtd: MTD device structure

4374

* @mtd: MTD device structure

4377

*/

4375

*/

4378

void nand_release(struct mtd_info *mtd)

4376

void nand_release(struct mtd_info *mtd)

4379

{

4377

{

4380

struct nand_chip *chip = mtd->priv;

4378

struct nand_chip *chip = mtd->priv;

4381

4379

4382

if (chip->ecc.mode == NAND_ECC_SOFT_BCH)

4380

if (chip->ecc.mode == NAND_ECC_SOFT_BCH)

4383

nand_bch_free((struct nand_bch_control *)chip->ecc.priv);

4381

nand_bch_free((struct nand_bch_control *)chip->ecc.priv);

4384

4382

4385

mtd_device_unregister(mtd);

4383

mtd_device_unregister(mtd);

4386

4384

4387

/* Free bad block table memory */

4385

/* Free bad block table memory */

4388

kfree(chip->bbt);

4386

kfree(chip->bbt);

4389

if (!(chip->options & NAND_OWN_BUFFERS))

4387

if (!(chip->options & NAND_OWN_BUFFERS))

4390

kfree(chip->buffers);

4388

kfree(chip->buffers);

4391

4389

4392

/* Free bad block descriptor memory */

4390

/* Free bad block descriptor memory */

4393

if (chip->badblock_pattern && chip->badblock_pattern->options

4391

if (chip->badblock_pattern && chip->badblock_pattern->options

4394

& NAND_BBT_DYNAMICSTRUCT)

4392

& NAND_BBT_DYNAMICSTRUCT)

4395

kfree(chip->badblock_pattern);

4393

kfree(chip->badblock_pattern);

4396

}

4394

}

4397

EXPORT_SYMBOL_GPL(nand_release);

4395

EXPORT_SYMBOL_GPL(nand_release);

4398

4396

4399

static int __init nand_base_init(void)

4397

static int __init nand_base_init(void)

4400

{

4398

{

4401

led_trigger_register_simple("nand-disk", &nand_led_trigger);

4399

led_trigger_register_simple("nand-disk", &nand_led_trigger);

4402

return 0;

4400

return 0;

4403

}

4401

}

4404

4402

4405

static void __exit nand_base_exit(void)

4403

static void __exit nand_base_exit(void)

4406

{

4404

{

4407

led_trigger_unregister_simple(nand_led_trigger);

4405

led_trigger_unregister_simple(nand_led_trigger);

4408

}

4406

}

4409

#endif

4407

#endif

4410

4408

4411

module_init(nand_base_init);

4409

module_init(nand_base_init);

4412

module_exit(nand_base_exit);

4410

module_exit(nand_base_exit);

4413

4411

4414

MODULE_LICENSE("GPL");

4412

MODULE_LICENSE("GPL");

4415

MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>");

4413

MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>");

4416

MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");

4414

MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");

4417

MODULE_DESCRIPTION("Generic NAND flash driver code");

4415

MODULE_DESCRIPTION("Generic NAND flash driver code");

4418

4416

GITLAB

mtd: nand: Fix length bug in ioread16_rep() and iowrite16_rep()