Commit c78dfb4fd2cc8dbcd0baa3d180aeef1a06b1f062
Committed by
Simon Glass
1 parent
348b744b7c
Exists in
v2017.01-smarct4x
and in
30 other branches
x86: superio: Add keyboard controller support to smsc_lpc47m driver
Add an api to enable and configure the integrated keyboard controller on SMSC LPC47m superio chipset. It also adds several macros to help future extension. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Showing 3 changed files with 40 additions and 5 deletions Inline Diff
arch/x86/include/asm/ibmpc.h
1 | /* | 1 | /* |
2 | * (C) Copyright 2002 | 2 | * (C) Copyright 2002 |
3 | * Daniel Engström, Omicron Ceti AB, daniel@omicron.se | 3 | * Daniel Engström, Omicron Ceti AB, daniel@omicron.se |
4 | * | 4 | * |
5 | * SPDX-License-Identifier: GPL-2.0+ | 5 | * SPDX-License-Identifier: GPL-2.0+ |
6 | */ | 6 | */ |
7 | 7 | ||
8 | #ifndef __ASM_IBMPC_H_ | 8 | #ifndef __ASM_IBMPC_H_ |
9 | #define __ASM_IBMPC_H_ 1 | 9 | #define __ASM_IBMPC_H_ 1 |
10 | 10 | ||
11 | /* misc ports in an ibm compatible pc */ | 11 | /* misc ports in an ibm compatible pc */ |
12 | 12 | ||
13 | #define MASTER_PIC 0x20 | 13 | #define MASTER_PIC 0x20 |
14 | #define PIT_BASE 0x40 | 14 | #define PIT_BASE 0x40 |
15 | #define KBDDATA 0x60 | 15 | #define KBDDATA 0x60 |
16 | #define SYSCTLB 0x62 | 16 | #define SYSCTLB 0x62 |
17 | #define KBDCMD 0x64 | 17 | #define KBDCMD 0x64 |
18 | #define SYSCTLA 0x92 | 18 | #define SYSCTLA 0x92 |
19 | #define SLAVE_PIC 0xa0 | 19 | #define SLAVE_PIC 0xa0 |
20 | 20 | ||
21 | #define UART0_BASE 0x3f8 | 21 | #define UART0_BASE 0x3f8 |
22 | #define UART1_BASE 0x2f8 | 22 | #define UART1_BASE 0x2f8 |
23 | 23 | ||
24 | #define UART0_IRQ 4 | 24 | #define UART0_IRQ 4 |
25 | #define UART1_IRQ 3 | 25 | #define UART1_IRQ 3 |
26 | 26 | ||
27 | #define KBD_IRQ 1 | ||
28 | #define MSE_IRQ 12 | ||
29 | |||
27 | #endif | 30 | #endif |
28 | 31 |
drivers/misc/smsc_lpc47m.c
1 | /* | 1 | /* |
2 | * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> | 2 | * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> |
3 | * | 3 | * |
4 | * SPDX-License-Identifier: GPL-2.0+ | 4 | * SPDX-License-Identifier: GPL-2.0+ |
5 | */ | 5 | */ |
6 | 6 | ||
7 | #include <common.h> | 7 | #include <common.h> |
8 | #include <asm/io.h> | 8 | #include <asm/io.h> |
9 | #include <asm/pnp_def.h> | 9 | #include <asm/pnp_def.h> |
10 | 10 | ||
11 | static void pnp_enter_conf_state(u16 dev) | 11 | static void pnp_enter_conf_state(u16 dev) |
12 | { | 12 | { |
13 | u16 port = dev >> 8; | 13 | u16 port = dev >> 8; |
14 | 14 | ||
15 | outb(0x55, port); | 15 | outb(0x55, port); |
16 | } | 16 | } |
17 | 17 | ||
18 | static void pnp_exit_conf_state(u16 dev) | 18 | static void pnp_exit_conf_state(u16 dev) |
19 | { | 19 | { |
20 | u16 port = dev >> 8; | 20 | u16 port = dev >> 8; |
21 | 21 | ||
22 | outb(0xaa, port); | 22 | outb(0xaa, port); |
23 | } | 23 | } |
24 | 24 | ||
25 | void lpc47m_enable_serial(u16 dev, u16 iobase, u8 irq) | 25 | void lpc47m_enable_serial(uint dev, uint iobase, uint irq) |
26 | { | 26 | { |
27 | pnp_enter_conf_state(dev); | 27 | pnp_enter_conf_state(dev); |
28 | pnp_set_logical_device(dev); | 28 | pnp_set_logical_device(dev); |
29 | pnp_set_enable(dev, 0); | 29 | pnp_set_enable(dev, 0); |
30 | pnp_set_iobase(dev, PNP_IDX_IO0, iobase); | 30 | pnp_set_iobase(dev, PNP_IDX_IO0, iobase); |
31 | pnp_set_irq(dev, PNP_IDX_IRQ0, irq); | 31 | pnp_set_irq(dev, PNP_IDX_IRQ0, irq); |
32 | pnp_set_enable(dev, 1); | ||
33 | pnp_exit_conf_state(dev); | ||
34 | } | ||
35 | |||
36 | void lpc47m_enable_kbc(uint dev, uint irq0, uint irq1) | ||
37 | { | ||
38 | pnp_enter_conf_state(dev); | ||
39 | pnp_set_logical_device(dev); | ||
40 | pnp_set_enable(dev, 0); | ||
41 | pnp_set_irq(dev, PNP_IDX_IRQ0, irq0); | ||
42 | pnp_set_irq(dev, PNP_IDX_IRQ1, irq1); | ||
32 | pnp_set_enable(dev, 1); | 43 | pnp_set_enable(dev, 1); |
33 | pnp_exit_conf_state(dev); | 44 | pnp_exit_conf_state(dev); |
34 | } | 45 | } |
35 | 46 |
include/smsc_lpc47m.h
1 | /* | 1 | /* |
2 | * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> | 2 | * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> |
3 | * | 3 | * |
4 | * SPDX-License-Identifier: GPL-2.0+ | 4 | * SPDX-License-Identifier: GPL-2.0+ |
5 | */ | 5 | */ |
6 | 6 | ||
7 | #ifndef _SMSC_LPC47M_H_ | 7 | #ifndef _SMSC_LPC47M_H_ |
8 | #define _SMSC_LPC47M_H_ | 8 | #define _SMSC_LPC47M_H_ |
9 | 9 | ||
10 | /* I/O address of LPC47M */ | ||
11 | #define LPC47M_IO_PORT 0x2e | ||
12 | |||
13 | /* Logical device number */ | ||
14 | #define LPC47M_FDC 0 /* Floppy */ | ||
15 | #define LPC47M_SP2 2 /* Serial Port 2 */ | ||
16 | #define LPC47M_PP 3 /* Parallel Port */ | ||
17 | #define LPC47M_SP1 4 /* Serial Port 1 */ | ||
18 | #define LPC47M_KBC 7 /* Keyboard & Mouse */ | ||
19 | #define LPC47M_PME 10 /* Power Control */ | ||
20 | |||
10 | /** | 21 | /** |
11 | * Configure the base I/O port of the specified serial device and enable the | 22 | * Configure the base I/O port of the specified serial device and enable the |
12 | * serial device. | 23 | * serial device. |
13 | * | 24 | * |
14 | * @dev: High 8 bits = Super I/O port, low 8 bits = logical device number. | 25 | * @dev: high 8 bits = super I/O port, low 8 bits = logical device number |
15 | * @iobase: Processor I/O port address to assign to this serial device. | 26 | * @iobase: processor I/O port address to assign to this serial device |
16 | * @irq: Processor IRQ number to assign to this serial device. | 27 | * @irq: processor IRQ number to assign to this serial device |
17 | */ | 28 | */ |
18 | void lpc47m_enable_serial(u16 dev, u16 iobase, u8 irq); | 29 | void lpc47m_enable_serial(uint dev, uint iobase, uint irq); |
30 | |||
31 | /** | ||
32 | * Configure the specified keyboard controller device and enable the keyboard | ||
33 | * controller device. | ||
34 | * | ||
35 | * @dev: high 8 bits = Super I/O port, low 8 bits = logical device number | ||
36 | * @irq0: processor IRQ number to assign to keyboard | ||
37 | * @irq1: processor IRQ number to assign to mouse | ||
38 | */ | ||
39 | void lpc47m_enable_kbc(uint dev, uint irq0, uint irq1); | ||
19 | 40 | ||
20 | #endif /* _SMSC_LPC47M_H_ */ | 41 | #endif /* _SMSC_LPC47M_H_ */ |
21 | 42 |