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Commit d4c01cd3f6f5ba59ca17ebf52f610f629895ac7a

Authored by Breno Lima
Committed by Ye Li
1 parent 3c79e2d9a7
Exists in smarc-imx_v2017.03_o8.1.0_1.3.0_8m and in 1 other branch smarc-imx_v2017.03_4.9.88_2.0.0_ga

MLK-17897: mx7ulp: Move CONFIG_SECURE_BOOT option to Kconfig 

Since commit 6e1f4d2652e79 ("arm: imx-common: add SECURE_BOOT option
to Kconfig") it's preferable to select CONFIG_SECURE_BOOT via Kconfig.

Add ARCH_MX7ULP as a CONFIG_SECURE_BOOT dependency, do not select
CONFIG_FSL_CAAM since CAAM is not implemented for i.MX7ULP yet.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>

Showing 3 changed files with 2 additions and 8 deletions Inline Diff

arch/arm/imx-common/Kconfig
Diff comments   View file @ d4c01cd
1 config IMX_CONFIG 1 config IMX_CONFIG
2 string 2 string
3 3
4 config IMX_OPTEE 4 config IMX_OPTEE
5 bool "Support OP-TEE" 5 bool "Support OP-TEE"
6 help 6 help
7 Enable support for OP-TEE 7 Enable support for OP-TEE
8 8
9 config GPT_TIMER 9 config GPT_TIMER
10 bool "Using i.MX GPT timer as system tick timer" 10 bool "Using i.MX GPT timer as system tick timer"
11 depends on ARCH_MX6 || ARCH_MX7 11 depends on ARCH_MX6 || ARCH_MX7
12 help 12 help
13 Enable GPT timer driver for system tick timer on i.MX6 and 13 Enable GPT timer driver for system tick timer on i.MX6 and
14 i.MX7. 14 i.MX7.
15 15
16 config ROM_UNIFIED_SECTIONS 16 config ROM_UNIFIED_SECTIONS
17 bool 17 bool
18 18
19 config IMX_RDC 19 config IMX_RDC
20 bool "i.MX Resource domain controller driver" 20 bool "i.MX Resource domain controller driver"
21 depends on ARCH_MX6 || ARCH_MX7 21 depends on ARCH_MX6 || ARCH_MX7
22 help 22 help
23 i.MX Resource domain controller is used to assign masters 23 i.MX Resource domain controller is used to assign masters
24 and peripherals to differet domains. This can be used to 24 and peripherals to differet domains. This can be used to
25 isolate resources. 25 isolate resources.
26 26
27 config IMX_BOOTAUX 27 config IMX_BOOTAUX
28 bool "Support boot auxiliary core" 28 bool "Support boot auxiliary core"
29 depends on ARCH_MX7 || ARCH_MX6 || ARCH_IMX8 29 depends on ARCH_MX7 || ARCH_MX6 || ARCH_IMX8
30 help 30 help
31 bootaux [addr] to boot auxiliary core. 31 bootaux [addr] to boot auxiliary core.
32 32
33 config USE_IMXIMG_PLUGIN 33 config USE_IMXIMG_PLUGIN
34 bool "Use imximage plugin code" 34 bool "Use imximage plugin code"
35 depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX7ULP 35 depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX7ULP
36 help 36 help
37 i.MX6/7 supports DCD and Plugin. Enable this configuration 37 i.MX6/7 supports DCD and Plugin. Enable this configuration
38 to use Plugin, otherwise DCD will be used. 38 to use Plugin, otherwise DCD will be used.
39 39
40 config SECURE_BOOT 40 config SECURE_BOOT
41 bool "Support i.MX HAB features" 41 bool "Support i.MX HAB features"
42 depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX5 || ARCH_IMX8M 42 depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX5 || ARCH_IMX8M || ARCH_MX7ULP
43 select FSL_CAAM if !MX6ULL && !MX6SLL && !MX6SL && !IMX8M 43 select FSL_CAAM if !MX6ULL && !MX6SLL && !MX6SL && !IMX8M && !MX7ULP
44 help 44 help
45 This option enables the support for secure boot (HAB). 45 This option enables the support for secure boot (HAB).
46 See doc/README.mxc_hab for more details. 46 See doc/README.mxc_hab for more details.
47 47
48 config FSL_MFGPROT 48 config FSL_MFGPROT
49 bool "Support the 'mfgprot' command" 49 bool "Support the 'mfgprot' command"
50 depends on SECURE_BOOT && ARCH_MX7 50 depends on SECURE_BOOT && ARCH_MX7
51 help 51 help
52 This option enables the manufacturing protection command 52 This option enables the manufacturing protection command
53 which can be used has a protection feature for Manufacturing 53 which can be used has a protection feature for Manufacturing
54 process. With this tool is possible to authenticate the 54 process. With this tool is possible to authenticate the
55 chip to the OEM's server. 55 chip to the OEM's server.
56 56
57 config DBG_MONITOR 57 config DBG_MONITOR
58 bool "Enable the AXI debug monitor" 58 bool "Enable the AXI debug monitor"
59 depends on ARCH_MX6 || ARCH_MX7 59 depends on ARCH_MX6 || ARCH_MX7
60 help 60 help
61 This option enables the debug monitor which prints out last 61 This option enables the debug monitor which prints out last
62 failed AXI access info when system reboot is caused by AXI 62 failed AXI access info when system reboot is caused by AXI
63 access failure. 63 access failure.
64 64
65 config IMX_M4_BIND 65 config IMX_M4_BIND
66 bool "Bind ULP M4 image to final u-boot" 66 bool "Bind ULP M4 image to final u-boot"
67 depends on ARCH_MX7ULP 67 depends on ARCH_MX7ULP
68 help 68 help
69 Select this to bind a ULP M4 image to final u-boot image 69 Select this to bind a ULP M4 image to final u-boot image
70 User needs put the M4 image ulp_m4.bin under u-boot directory 70 User needs put the M4 image ulp_m4.bin under u-boot directory
71 71
72 config IMX_TRUSTY_OS 72 config IMX_TRUSTY_OS
73 bool "Support Trusty OS related feature" 73 bool "Support Trusty OS related feature"
74 depends on ARCH_MX6 || ARCH_MX7 74 depends on ARCH_MX6 || ARCH_MX7
75 select SYS_ARM_CACHE_WRITEALLOC 75 select SYS_ARM_CACHE_WRITEALLOC
76 76
77 config SYS_ARM_CACHE_WRITEALLOC 77 config SYS_ARM_CACHE_WRITEALLOC
78 bool "support cache write alloc" 78 bool "support cache write alloc"
79 79
include/configs/mx7ulp_arm2.h
Diff comments   View file @ d4c01cd
1 /* 1 /*
2 * Copyright (C) 2016 Freescale Semiconductor, Inc. 2 * Copyright (C) 2016 Freescale Semiconductor, Inc.
3 * 3 *
4 * Configuration settings for the Freescale i.MX7ULP ARM2 board. 4 * Configuration settings for the Freescale i.MX7ULP ARM2 board.
5 * 5 *
6 * SPDX-License-Identifier: GPL-2.0+ 6 * SPDX-License-Identifier: GPL-2.0+
7 */ 7 */
8 8
9 #ifndef __MX7ULP_ARM2_CONFIG_H 9 #ifndef __MX7ULP_ARM2_CONFIG_H
10 #define __MX7ULP_ARM2_CONFIG_H 10 #define __MX7ULP_ARM2_CONFIG_H
11 11
12 #include <linux/sizes.h> 12 #include <linux/sizes.h>
13 #include <asm/arch/imx-regs.h> 13 #include <asm/arch/imx-regs.h>
14 14
15 /*Uncomment it to use secure boot*/
16 /*#define CONFIG_SECURE_BOOT*/
17
18 #ifdef CONFIG_SECURE_BOOT 15 #ifdef CONFIG_SECURE_BOOT
19 #ifndef CONFIG_CSF_SIZE 16 #ifndef CONFIG_CSF_SIZE
20 #define CONFIG_CSF_SIZE 0x4000 17 #define CONFIG_CSF_SIZE 0x4000
21 #endif 18 #endif
22 #endif 19 #endif
23 20
24 #define CONFIG_BOARD_POSTCLK_INIT 21 #define CONFIG_BOARD_POSTCLK_INIT
25 #define CONFIG_SYS_BOOTM_LEN 0x1000000 22 #define CONFIG_SYS_BOOTM_LEN 0x1000000
26 23
27 #define SRC_BASE_ADDR CMC1_RBASE 24 #define SRC_BASE_ADDR CMC1_RBASE
28 #define IRAM_BASE_ADDR OCRAM_0_BASE 25 #define IRAM_BASE_ADDR OCRAM_0_BASE
29 #define IOMUXC_BASE_ADDR IOMUXC1_RBASE 26 #define IOMUXC_BASE_ADDR IOMUXC1_RBASE
30 27
31 /* Fuses */ 28 /* Fuses */
32 #define CONFIG_CMD_FUSE 29 #define CONFIG_CMD_FUSE
33 #define CONFIG_MXC_OCOTP 30 #define CONFIG_MXC_OCOTP
34 31
35 #define CONFIG_BOUNCE_BUFFER 32 #define CONFIG_BOUNCE_BUFFER
36 #define CONFIG_FSL_ESDHC 33 #define CONFIG_FSL_ESDHC
37 #define CONFIG_FSL_USDHC 34 #define CONFIG_FSL_USDHC
38 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 35 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
39 36
40 #define CONFIG_SYS_FSL_USDHC_NUM 2 37 #define CONFIG_SYS_FSL_USDHC_NUM 2
41 38
42 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 39 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
43 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ 40 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
44 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 41 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
45 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ 42 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
46 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 43 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
47 44
48 #define CONFIG_ENV_OFFSET (14 * SZ_64K) 45 #define CONFIG_ENV_OFFSET (14 * SZ_64K)
49 #define CONFIG_ENV_IS_IN_MMC 46 #define CONFIG_ENV_IS_IN_MMC
50 #define CONFIG_ENV_SIZE SZ_8K 47 #define CONFIG_ENV_SIZE SZ_8K
51 48
52 #define CONFIG_CMD_FAT 49 #define CONFIG_CMD_FAT
53 #define CONFIG_DOS_PARTITION 50 #define CONFIG_DOS_PARTITION
54 51
55 /* Using ULP WDOG for reset */ 52 /* Using ULP WDOG for reset */
56 #define WDOG_BASE_ADDR WDG1_RBASE 53 #define WDOG_BASE_ADDR WDG1_RBASE
57 54
58 55
59 #define CONFIG_SYS_ARCH_TIMER 56 #define CONFIG_SYS_ARCH_TIMER
60 #define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1Mhz from TSTMR */ 57 #define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1Mhz from TSTMR */
61 58
62 #define CONFIG_INITRD_TAG 59 #define CONFIG_INITRD_TAG
63 #define CONFIG_CMDLINE_TAG 60 #define CONFIG_CMDLINE_TAG
64 #define CONFIG_SETUP_MEMORY_TAGS 61 #define CONFIG_SETUP_MEMORY_TAGS
65 /*#define CONFIG_REVISION_TAG*/ 62 /*#define CONFIG_REVISION_TAG*/
66 63
67 /* Size of malloc() pool */ 64 /* Size of malloc() pool */
68 #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M) 65 #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
69 66
70 /* UART */ 67 /* UART */
71 #ifdef CONFIG_TARGET_MX7ULP_10X10_ARM2 68 #ifdef CONFIG_TARGET_MX7ULP_10X10_ARM2
72 #define LPUART_BASE LPUART6_RBASE 69 #define LPUART_BASE LPUART6_RBASE
73 #else 70 #else
74 #define LPUART_BASE LPUART4_RBASE 71 #define LPUART_BASE LPUART4_RBASE
75 #endif 72 #endif
76 73
77 /* allow to overwrite serial and ethaddr */ 74 /* allow to overwrite serial and ethaddr */
78 #define CONFIG_ENV_OVERWRITE 75 #define CONFIG_ENV_OVERWRITE
79 #define CONFIG_CONS_INDEX 1 76 #define CONFIG_CONS_INDEX 1
80 #define CONFIG_BAUDRATE 115200 77 #define CONFIG_BAUDRATE 115200
81 78
82 #undef CONFIG_CMD_IMLS 79 #undef CONFIG_CMD_IMLS
83 #define CONFIG_SYS_LONGHELP 80 #define CONFIG_SYS_LONGHELP
84 #define CONFIG_AUTO_COMPLETE 81 #define CONFIG_AUTO_COMPLETE
85 82
86 #define CONFIG_SYS_CACHELINE_SIZE 64 83 #define CONFIG_SYS_CACHELINE_SIZE 64
87 84
88 /* Miscellaneous configurable options */ 85 /* Miscellaneous configurable options */
89 #define CONFIG_SYS_PROMPT "=> " 86 #define CONFIG_SYS_PROMPT "=> "
90 #define CONFIG_SYS_CBSIZE 512 87 #define CONFIG_SYS_CBSIZE 512
91 88
92 /* Print Buffer Size */ 89 /* Print Buffer Size */
93 #define CONFIG_SYS_MAXARGS 256 90 #define CONFIG_SYS_MAXARGS 256
94 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 91 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
95 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 92 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
96 93
97 #define CONFIG_CMDLINE_EDITING 94 #define CONFIG_CMDLINE_EDITING
98 #define CONFIG_STACKSIZE SZ_8K 95 #define CONFIG_STACKSIZE SZ_8K
99 96
100 /* Physical Memory Map */ 97 /* Physical Memory Map */
101 #define CONFIG_NR_DRAM_BANKS 1 98 #define CONFIG_NR_DRAM_BANKS 1
102 99
103 #define CONFIG_SYS_TEXT_BASE 0x67800000 100 #define CONFIG_SYS_TEXT_BASE 0x67800000
104 #define PHYS_SDRAM 0x60000000 101 #define PHYS_SDRAM 0x60000000
105 #ifdef CONFIG_TARGET_MX7ULP_10X10_ARM2 102 #ifdef CONFIG_TARGET_MX7ULP_10X10_ARM2
106 #define PHYS_SDRAM_SIZE SZ_1G /*LPDDR2 1G*/ 103 #define PHYS_SDRAM_SIZE SZ_1G /*LPDDR2 1G*/
107 #define CONFIG_SYS_MEMTEST_END 0x9E000000 104 #define CONFIG_SYS_MEMTEST_END 0x9E000000
108 #else 105 #else
109 #define PHYS_SDRAM_SIZE SZ_512M 106 #define PHYS_SDRAM_SIZE SZ_512M
110 #define CONFIG_SYS_MEMTEST_END 0x7E000000 107 #define CONFIG_SYS_MEMTEST_END 0x7E000000
111 #endif 108 #endif
112 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 109 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
113 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 110 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
114 #define CONFIG_CMD_BOOTZ 111 #define CONFIG_CMD_BOOTZ
115 112
116 #define CONFIG_LOADADDR 0x60800000 113 #define CONFIG_LOADADDR 0x60800000
117 114
118 #define CONFIG_CMD_MEMTEST 115 #define CONFIG_CMD_MEMTEST
119 116
120 #ifdef CONFIG_TARGET_MX7ULP_10X10_ARM2 117 #ifdef CONFIG_TARGET_MX7ULP_10X10_ARM2
121 #define CONFIG_DEFAULT_FDT_FILE "imx7ulp-10x10-arm2.dtb" 118 #define CONFIG_DEFAULT_FDT_FILE "imx7ulp-10x10-arm2.dtb"
122 #else 119 #else
123 #define CONFIG_DEFAULT_FDT_FILE "imx7ulp-14x14-arm2.dtb" 120 #define CONFIG_DEFAULT_FDT_FILE "imx7ulp-14x14-arm2.dtb"
124 #endif 121 #endif
125 122
126 #define CONFIG_MFG_ENV_SETTINGS \ 123 #define CONFIG_MFG_ENV_SETTINGS \
127 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ 124 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
128 "rdinit=/linuxrc " \ 125 "rdinit=/linuxrc " \
129 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ 126 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
130 "g_mass_storage.file=/fat g_mass_storage.ro=1 " \ 127 "g_mass_storage.file=/fat g_mass_storage.ro=1 " \
131 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ 128 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
132 "g_mass_storage.iSerialNumber=\"\" "\ 129 "g_mass_storage.iSerialNumber=\"\" "\
133 "\0" \ 130 "\0" \
134 "initrd_addr=0x63800000\0" \ 131 "initrd_addr=0x63800000\0" \
135 "initrd_high=0xffffffff\0" \ 132 "initrd_high=0xffffffff\0" \
136 "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ 133 "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
137 134
138 135
139 #define CONFIG_EXTRA_ENV_SETTINGS \ 136 #define CONFIG_EXTRA_ENV_SETTINGS \
140 CONFIG_MFG_ENV_SETTINGS \ 137 CONFIG_MFG_ENV_SETTINGS \
141 "script=boot.scr\0" \ 138 "script=boot.scr\0" \
142 "image=zImage\0" \ 139 "image=zImage\0" \
143 "console=ttyLP0\0" \ 140 "console=ttyLP0\0" \
144 "fdt_high=0xffffffff\0" \ 141 "fdt_high=0xffffffff\0" \
145 "initrd_high=0xffffffff\0" \ 142 "initrd_high=0xffffffff\0" \
146 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ 143 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
147 "fdt_addr=0x63000000\0" \ 144 "fdt_addr=0x63000000\0" \
148 "boot_fdt=try\0" \ 145 "boot_fdt=try\0" \
149 "earlycon=lpuart32,0x402D0010\0" \ 146 "earlycon=lpuart32,0x402D0010\0" \
150 "ip_dyn=yes\0" \ 147 "ip_dyn=yes\0" \
151 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 148 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
152 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 149 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
153 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 150 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
154 "mmcautodetect=yes\0" \ 151 "mmcautodetect=yes\0" \
155 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 152 "mmcargs=setenv bootargs console=${console},${baudrate} " \
156 "root=${mmcroot}\0" \ 153 "root=${mmcroot}\0" \
157 "loadbootscript=" \ 154 "loadbootscript=" \
158 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 155 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
159 "bootscript=echo Running bootscript from mmc ...; " \ 156 "bootscript=echo Running bootscript from mmc ...; " \
160 "source\0" \ 157 "source\0" \
161 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 158 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
162 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 159 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
163 "mmcboot=echo Booting from mmc ...; " \ 160 "mmcboot=echo Booting from mmc ...; " \
164 "run mmcargs; " \ 161 "run mmcargs; " \
165 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 162 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
166 "if run loadfdt; then " \ 163 "if run loadfdt; then " \
167 "bootz ${loadaddr} - ${fdt_addr}; " \ 164 "bootz ${loadaddr} - ${fdt_addr}; " \
168 "else " \ 165 "else " \
169 "if test ${boot_fdt} = try; then " \ 166 "if test ${boot_fdt} = try; then " \
170 "bootz; " \ 167 "bootz; " \
171 "else " \ 168 "else " \
172 "echo WARN: Cannot load the DT; " \ 169 "echo WARN: Cannot load the DT; " \
173 "fi; " \ 170 "fi; " \
174 "fi; " \ 171 "fi; " \
175 "else " \ 172 "else " \
176 "bootz; " \ 173 "bootz; " \
177 "fi;\0" \ 174 "fi;\0" \
178 175
179 #define CONFIG_BOOTCOMMAND \ 176 #define CONFIG_BOOTCOMMAND \
180 "mmc dev ${mmcdev}; if mmc rescan; then " \ 177 "mmc dev ${mmcdev}; if mmc rescan; then " \
181 "if run loadbootscript; then " \ 178 "if run loadbootscript; then " \
182 "run bootscript; " \ 179 "run bootscript; " \
183 "else " \ 180 "else " \
184 "if run loadimage; then " \ 181 "if run loadimage; then " \
185 "run mmcboot; " \ 182 "run mmcboot; " \
186 "fi; " \ 183 "fi; " \
187 "fi; " \ 184 "fi; " \
188 "fi" 185 "fi"
189 186
190 187
191 #define CONFIG_SYS_HZ 1000 188 #define CONFIG_SYS_HZ 1000
192 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 189 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
193 190
194 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 191 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
195 #define CONFIG_SYS_INIT_RAM_SIZE SZ_256K 192 #define CONFIG_SYS_INIT_RAM_SIZE SZ_256K
196 193
197 #define CONFIG_SYS_INIT_SP_OFFSET \ 194 #define CONFIG_SYS_INIT_SP_OFFSET \
198 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 195 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
199 #define CONFIG_SYS_INIT_SP_ADDR \ 196 #define CONFIG_SYS_INIT_SP_ADDR \
200 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 197 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
201 198
202 #ifndef CONFIG_SYS_DCACHE_OFF 199 #ifndef CONFIG_SYS_DCACHE_OFF
203 #define CONFIG_CMD_CACHE 200 #define CONFIG_CMD_CACHE
204 #endif 201 #endif
205 202
206 /* USB Configs */ 203 /* USB Configs */
207 #define CONFIG_CMD_USB 204 #define CONFIG_CMD_USB
208 #define CONFIG_USB_EHCI 205 #define CONFIG_USB_EHCI
209 #define CONFIG_USB_EHCI_MX7 206 #define CONFIG_USB_EHCI_MX7
210 #define CONFIG_USB_STORAGE 207 #define CONFIG_USB_STORAGE
211 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 208 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
212 #define CONFIG_USB_HOST_ETHER 209 #define CONFIG_USB_HOST_ETHER
213 #define CONFIG_USB_ETHER_ASIX 210 #define CONFIG_USB_ETHER_ASIX
214 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 211 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
215 #define CONFIG_MXC_USB_FLAGS 0 212 #define CONFIG_MXC_USB_FLAGS 0
216 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 213 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
217 214
218 /* QSPI configs */ 215 /* QSPI configs */
219 #define CONFIG_FSL_QSPI 216 #define CONFIG_FSL_QSPI
220 #ifdef CONFIG_FSL_QSPI 217 #ifdef CONFIG_FSL_QSPI
221 #define CONFIG_CMD_SF 218 #define CONFIG_CMD_SF
222 #define CONFIG_SPI_FLASH 219 #define CONFIG_SPI_FLASH
223 #define CONFIG_SPI_FLASH_STMICRO 220 #define CONFIG_SPI_FLASH_STMICRO
224 #define CONFIG_SPI_FLASH_BAR 221 #define CONFIG_SPI_FLASH_BAR
225 #define CONFIG_SYS_FSL_QSPI_AHB 222 #define CONFIG_SYS_FSL_QSPI_AHB
226 #define CONFIG_SF_DEFAULT_BUS 0 223 #define CONFIG_SF_DEFAULT_BUS 0
227 #define CONFIG_SF_DEFAULT_CS 0 224 #define CONFIG_SF_DEFAULT_CS 0
228 #define CONFIG_SF_DEFAULT_SPEED 40000000 225 #define CONFIG_SF_DEFAULT_SPEED 40000000
229 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 226 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
230 #ifdef CONFIG_TARGET_MX7ULP_10X10_ARM2 227 #ifdef CONFIG_TARGET_MX7ULP_10X10_ARM2
231 #define FSL_QSPI_FLASH_NUM 2 228 #define FSL_QSPI_FLASH_NUM 2
232 #define FSL_QSPI_FLASH_SIZE SZ_32M 229 #define FSL_QSPI_FLASH_SIZE SZ_32M
233 #else 230 #else
234 #define FSL_QSPI_FLASH_NUM 1 231 #define FSL_QSPI_FLASH_NUM 1
235 #define FSL_QSPI_FLASH_SIZE SZ_64M 232 #define FSL_QSPI_FLASH_SIZE SZ_64M
236 #endif 233 #endif
237 #define QSPI0_BASE_ADDR 0x410A5000 234 #define QSPI0_BASE_ADDR 0x410A5000
238 #define QSPI0_AMBA_BASE 0xC0000000 235 #define QSPI0_AMBA_BASE 0xC0000000
239 #endif 236 #endif
240 237
241 #endif /* __CONFIG_H */ 238 #endif /* __CONFIG_H */
242 239
include/configs/mx7ulp_evk.h
Diff comments   View file @ d4c01cd
1 /* 1 /*
2 * Copyright (C) 2016 Freescale Semiconductor, Inc. 2 * Copyright (C) 2016 Freescale Semiconductor, Inc.
3 * Copyright 2017 NXP 3 * Copyright 2017 NXP
4 * 4 *
5 * Configuration settings for the Freescale i.MX7ULP EVK board. 5 * Configuration settings for the Freescale i.MX7ULP EVK board.
6 * 6 *
7 * SPDX-License-Identifier: GPL-2.0+ 7 * SPDX-License-Identifier: GPL-2.0+
8 */ 8 */
9 9
10 #ifndef __MX7ULP_EVK_CONFIG_H 10 #ifndef __MX7ULP_EVK_CONFIG_H
11 #define __MX7ULP_EVK_CONFIG_H 11 #define __MX7ULP_EVK_CONFIG_H
12 12
13 #include <linux/sizes.h> 13 #include <linux/sizes.h>
14 #include <asm/arch/imx-regs.h> 14 #include <asm/arch/imx-regs.h>
15 15
16 /*Uncomment it to use secure boot*/
17 /*#define CONFIG_SECURE_BOOT*/
18
19 #ifdef CONFIG_SECURE_BOOT 16 #ifdef CONFIG_SECURE_BOOT
20 #ifndef CONFIG_CSF_SIZE 17 #ifndef CONFIG_CSF_SIZE
21 #define CONFIG_CSF_SIZE 0x4000 18 #define CONFIG_CSF_SIZE 0x4000
22 #endif 19 #endif
23 #endif 20 #endif
24 21
25 #define CONFIG_BOARD_POSTCLK_INIT 22 #define CONFIG_BOARD_POSTCLK_INIT
26 #define CONFIG_SYS_BOOTM_LEN 0x1000000 23 #define CONFIG_SYS_BOOTM_LEN 0x1000000
27 24
28 #define SRC_BASE_ADDR CMC1_RBASE 25 #define SRC_BASE_ADDR CMC1_RBASE
29 #define IRAM_BASE_ADDR OCRAM_0_BASE 26 #define IRAM_BASE_ADDR OCRAM_0_BASE
30 #define IOMUXC_BASE_ADDR IOMUXC1_RBASE 27 #define IOMUXC_BASE_ADDR IOMUXC1_RBASE
31 28
32 /* Fuses */ 29 /* Fuses */
33 #define CONFIG_CMD_FUSE 30 #define CONFIG_CMD_FUSE
34 #define CONFIG_MXC_OCOTP 31 #define CONFIG_MXC_OCOTP
35 32
36 #define CONFIG_BOUNCE_BUFFER 33 #define CONFIG_BOUNCE_BUFFER
37 #define CONFIG_FSL_ESDHC 34 #define CONFIG_FSL_ESDHC
38 #define CONFIG_FSL_USDHC 35 #define CONFIG_FSL_USDHC
39 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 36 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
40 37
41 #define CONFIG_SYS_FSL_USDHC_NUM 1 38 #define CONFIG_SYS_FSL_USDHC_NUM 1
42 39
43 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 40 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
44 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ 41 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
45 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 42 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
46 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ 43 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
47 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 44 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
48 45
49 #define CONFIG_ENV_OFFSET (14 * SZ_64K) 46 #define CONFIG_ENV_OFFSET (14 * SZ_64K)
50 #define CONFIG_ENV_IS_IN_MMC 47 #define CONFIG_ENV_IS_IN_MMC
51 #define CONFIG_ENV_SIZE SZ_8K 48 #define CONFIG_ENV_SIZE SZ_8K
52 49
53 #define CONFIG_CMD_FAT 50 #define CONFIG_CMD_FAT
54 51
55 /* Using ULP WDOG for reset */ 52 /* Using ULP WDOG for reset */
56 #define WDOG_BASE_ADDR WDG1_RBASE 53 #define WDOG_BASE_ADDR WDG1_RBASE
57 54
58 #define CONFIG_SYS_ARCH_TIMER 55 #define CONFIG_SYS_ARCH_TIMER
59 #define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1Mhz from TSTMR */ 56 #define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1Mhz from TSTMR */
60 57
61 #define CONFIG_INITRD_TAG 58 #define CONFIG_INITRD_TAG
62 #define CONFIG_CMDLINE_TAG 59 #define CONFIG_CMDLINE_TAG
63 #define CONFIG_SETUP_MEMORY_TAGS 60 #define CONFIG_SETUP_MEMORY_TAGS
64 /*#define CONFIG_REVISION_TAG*/ 61 /*#define CONFIG_REVISION_TAG*/
65 62
66 /* Size of malloc() pool */ 63 /* Size of malloc() pool */
67 #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M) 64 #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
68 65
69 /* UART */ 66 /* UART */
70 #define LPUART_BASE LPUART4_RBASE 67 #define LPUART_BASE LPUART4_RBASE
71 68
72 /* allow to overwrite serial and ethaddr */ 69 /* allow to overwrite serial and ethaddr */
73 #define CONFIG_ENV_OVERWRITE 70 #define CONFIG_ENV_OVERWRITE
74 #define CONFIG_CONS_INDEX 1 71 #define CONFIG_CONS_INDEX 1
75 #define CONFIG_BAUDRATE 115200 72 #define CONFIG_BAUDRATE 115200
76 73
77 #undef CONFIG_CMD_IMLS 74 #undef CONFIG_CMD_IMLS
78 #define CONFIG_SYS_LONGHELP 75 #define CONFIG_SYS_LONGHELP
79 #define CONFIG_AUTO_COMPLETE 76 #define CONFIG_AUTO_COMPLETE
80 77
81 #define CONFIG_SYS_CACHELINE_SIZE 64 78 #define CONFIG_SYS_CACHELINE_SIZE 64
82 79
83 /* Miscellaneous configurable options */ 80 /* Miscellaneous configurable options */
84 #define CONFIG_SYS_PROMPT "=> " 81 #define CONFIG_SYS_PROMPT "=> "
85 #define CONFIG_SYS_CBSIZE 512 82 #define CONFIG_SYS_CBSIZE 512
86 83
87 /* Print Buffer Size */ 84 /* Print Buffer Size */
88 #define CONFIG_SYS_MAXARGS 256 85 #define CONFIG_SYS_MAXARGS 256
89 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 86 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
90 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 87 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
91 88
92 #define CONFIG_CMDLINE_EDITING 89 #define CONFIG_CMDLINE_EDITING
93 #define CONFIG_STACKSIZE SZ_8K 90 #define CONFIG_STACKSIZE SZ_8K
94 91
95 /* Physical Memory Map */ 92 /* Physical Memory Map */
96 #define CONFIG_NR_DRAM_BANKS 1 93 #define CONFIG_NR_DRAM_BANKS 1
97 94
98 #define CONFIG_SYS_TEXT_BASE 0x67800000 95 #define CONFIG_SYS_TEXT_BASE 0x67800000
99 #define PHYS_SDRAM 0x60000000 96 #define PHYS_SDRAM 0x60000000
100 #define PHYS_SDRAM_SIZE SZ_1G 97 #define PHYS_SDRAM_SIZE SZ_1G
101 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 98 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
102 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 99 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
103 #define CONFIG_CMD_BOOTZ 100 #define CONFIG_CMD_BOOTZ
104 101
105 #define CONFIG_LOADADDR 0x60800000 102 #define CONFIG_LOADADDR 0x60800000
106 103
107 #define CONFIG_CMD_MEMTEST 104 #define CONFIG_CMD_MEMTEST
108 #define CONFIG_SYS_MEMTEST_END 0x9E000000 105 #define CONFIG_SYS_MEMTEST_END 0x9E000000
109 106
110 #define CONFIG_MFG_ENV_SETTINGS \ 107 #define CONFIG_MFG_ENV_SETTINGS \
111 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ 108 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
112 "rdinit=/linuxrc " \ 109 "rdinit=/linuxrc " \
113 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ 110 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
114 "g_mass_storage.file=/fat g_mass_storage.ro=1 " \ 111 "g_mass_storage.file=/fat g_mass_storage.ro=1 " \
115 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ 112 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
116 "g_mass_storage.iSerialNumber=\"\" "\ 113 "g_mass_storage.iSerialNumber=\"\" "\
117 "\0" \ 114 "\0" \
118 "initrd_addr=0x63800000\0" \ 115 "initrd_addr=0x63800000\0" \
119 "initrd_high=0xffffffff\0" \ 116 "initrd_high=0xffffffff\0" \
120 "bootcmd_mfg=run mfgtool_args; " \ 117 "bootcmd_mfg=run mfgtool_args; " \
121 "if test ${tee} = yes; then " \ 118 "if test ${tee} = yes; then " \
122 "bootm ${tee_addr} ${initrd_addr} ${fdt_addr}; " \ 119 "bootm ${tee_addr} ${initrd_addr} ${fdt_addr}; " \
123 "else " \ 120 "else " \
124 "bootz ${loadaddr} ${initrd_addr} ${fdt_addr}; " \ 121 "bootz ${loadaddr} ${initrd_addr} ${fdt_addr}; " \
125 "fi;\0" 122 "fi;\0"
126 123
127 #define CONFIG_EXTRA_ENV_SETTINGS \ 124 #define CONFIG_EXTRA_ENV_SETTINGS \
128 CONFIG_MFG_ENV_SETTINGS \ 125 CONFIG_MFG_ENV_SETTINGS \
129 TEE_ENV \ 126 TEE_ENV \
130 "script=boot.scr\0" \ 127 "script=boot.scr\0" \
131 "image=zImage\0" \ 128 "image=zImage\0" \
132 "console=ttyLP0\0" \ 129 "console=ttyLP0\0" \
133 "fdt_high=0xffffffff\0" \ 130 "fdt_high=0xffffffff\0" \
134 "initrd_high=0xffffffff\0" \ 131 "initrd_high=0xffffffff\0" \
135 "fdt_file=imx7ulp-evk.dtb\0" \ 132 "fdt_file=imx7ulp-evk.dtb\0" \
136 "fdt_addr=0x63000000\0" \ 133 "fdt_addr=0x63000000\0" \
137 "tee_addr=0x64000000\0" \ 134 "tee_addr=0x64000000\0" \
138 "tee_file=uTee-7ulp\0" \ 135 "tee_file=uTee-7ulp\0" \
139 "boot_fdt=try\0" \ 136 "boot_fdt=try\0" \
140 "earlycon=lpuart32,0x402D0010\0" \ 137 "earlycon=lpuart32,0x402D0010\0" \
141 "ip_dyn=yes\0" \ 138 "ip_dyn=yes\0" \
142 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 139 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
143 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 140 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
144 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 141 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
145 "mmcautodetect=yes\0" \ 142 "mmcautodetect=yes\0" \
146 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 143 "mmcargs=setenv bootargs console=${console},${baudrate} " \
147 "root=${mmcroot}\0" \ 144 "root=${mmcroot}\0" \
148 "loadbootscript=" \ 145 "loadbootscript=" \
149 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 146 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
150 "bootscript=echo Running bootscript from mmc ...; " \ 147 "bootscript=echo Running bootscript from mmc ...; " \
151 "source\0" \ 148 "source\0" \
152 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 149 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
153 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 150 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
154 "loadtee=fatload mmc ${mmcdev}:${mmcpart} ${tee_addr} ${tee_file}\0" \ 151 "loadtee=fatload mmc ${mmcdev}:${mmcpart} ${tee_addr} ${tee_file}\0" \
155 "mmcboot=echo Booting from mmc ...; " \ 152 "mmcboot=echo Booting from mmc ...; " \
156 "run mmcargs; " \ 153 "run mmcargs; " \
157 "if test ${tee} = yes; then " \ 154 "if test ${tee} = yes; then " \
158 "run loadfdt; run loadtee; bootm ${tee_addr} - ${fdt_addr}; " \ 155 "run loadfdt; run loadtee; bootm ${tee_addr} - ${fdt_addr}; " \
159 "else " \ 156 "else " \
160 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 157 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
161 "if run loadfdt; then " \ 158 "if run loadfdt; then " \
162 "bootz ${loadaddr} - ${fdt_addr}; " \ 159 "bootz ${loadaddr} - ${fdt_addr}; " \
163 "else " \ 160 "else " \
164 "if test ${boot_fdt} = try; then " \ 161 "if test ${boot_fdt} = try; then " \
165 "bootz; " \ 162 "bootz; " \
166 "else " \ 163 "else " \
167 "echo WARN: Cannot load the DT; " \ 164 "echo WARN: Cannot load the DT; " \
168 "fi; " \ 165 "fi; " \
169 "fi; " \ 166 "fi; " \
170 "else " \ 167 "else " \
171 "bootz; " \ 168 "bootz; " \
172 "fi; " \ 169 "fi; " \
173 "fi;\0" \ 170 "fi;\0" \
174 "netargs=setenv bootargs console=${console},${baudrate} " \ 171 "netargs=setenv bootargs console=${console},${baudrate} " \
175 "root=/dev/nfs " \ 172 "root=/dev/nfs " \
176 "ip=:::::eth0:dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 173 "ip=:::::eth0:dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
177 "netboot=echo Booting from net ...; " \ 174 "netboot=echo Booting from net ...; " \
178 "run netargs; " \ 175 "run netargs; " \
179 "if test ${ip_dyn} = yes; then " \ 176 "if test ${ip_dyn} = yes; then " \
180 "setenv get_cmd dhcp; " \ 177 "setenv get_cmd dhcp; " \
181 "else " \ 178 "else " \
182 "setenv get_cmd tftp; " \ 179 "setenv get_cmd tftp; " \
183 "fi; " \ 180 "fi; " \
184 "usb start; "\ 181 "usb start; "\
185 "${get_cmd} ${image}; " \ 182 "${get_cmd} ${image}; " \
186 "if test ${tee} = yes; then " \ 183 "if test ${tee} = yes; then " \
187 "${get_cmd} ${tee_addr} ${tee_file}; " \ 184 "${get_cmd} ${tee_addr} ${tee_file}; " \
188 "${get_cmd} ${fdt_addr} ${fdt_file}; " \ 185 "${get_cmd} ${fdt_addr} ${fdt_file}; " \
189 "bootm ${tee_addr} - ${fdt_addr}; " \ 186 "bootm ${tee_addr} - ${fdt_addr}; " \
190 "else " \ 187 "else " \
191 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 188 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
192 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 189 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
193 "bootz ${loadaddr} - ${fdt_addr}; " \ 190 "bootz ${loadaddr} - ${fdt_addr}; " \
194 "else " \ 191 "else " \
195 "if test ${boot_fdt} = try; then " \ 192 "if test ${boot_fdt} = try; then " \
196 "bootz; " \ 193 "bootz; " \
197 "else " \ 194 "else " \
198 "echo WARN: Cannot load the DT; " \ 195 "echo WARN: Cannot load the DT; " \
199 "fi; " \ 196 "fi; " \
200 "fi; " \ 197 "fi; " \
201 "else " \ 198 "else " \
202 "bootz; " \ 199 "bootz; " \
203 "fi; " \ 200 "fi; " \
204 "fi;\0" \ 201 "fi;\0" \
205 202
206 #define CONFIG_BOOTCOMMAND \ 203 #define CONFIG_BOOTCOMMAND \
207 "mmc dev ${mmcdev}; if mmc rescan; then " \ 204 "mmc dev ${mmcdev}; if mmc rescan; then " \
208 "if run loadbootscript; then " \ 205 "if run loadbootscript; then " \
209 "run bootscript; " \ 206 "run bootscript; " \
210 "else " \ 207 "else " \
211 "if run loadimage; then " \ 208 "if run loadimage; then " \
212 "run mmcboot; " \ 209 "run mmcboot; " \
213 "else run netboot; " \ 210 "else run netboot; " \
214 "fi; " \ 211 "fi; " \
215 "fi; " \ 212 "fi; " \
216 "fi" 213 "fi"
217 214
218 #define CONFIG_SYS_HZ 1000 215 #define CONFIG_SYS_HZ 1000
219 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 216 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
220 217
221 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 218 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
222 #define CONFIG_SYS_INIT_RAM_SIZE SZ_256K 219 #define CONFIG_SYS_INIT_RAM_SIZE SZ_256K
223 220
224 #define CONFIG_SYS_INIT_SP_OFFSET \ 221 #define CONFIG_SYS_INIT_SP_OFFSET \
225 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 222 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
226 #define CONFIG_SYS_INIT_SP_ADDR \ 223 #define CONFIG_SYS_INIT_SP_ADDR \
227 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 224 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
228 225
229 #ifndef CONFIG_SYS_DCACHE_OFF 226 #ifndef CONFIG_SYS_DCACHE_OFF
230 #define CONFIG_CMD_CACHE 227 #define CONFIG_CMD_CACHE
231 #endif 228 #endif
232 229
233 /* QSPI configs */ 230 /* QSPI configs */
234 #ifdef CONFIG_FSL_QSPI 231 #ifdef CONFIG_FSL_QSPI
235 #define CONFIG_SYS_FSL_QSPI_AHB 232 #define CONFIG_SYS_FSL_QSPI_AHB
236 #define CONFIG_SF_DEFAULT_BUS 0 233 #define CONFIG_SF_DEFAULT_BUS 0
237 #define CONFIG_SF_DEFAULT_CS 0 234 #define CONFIG_SF_DEFAULT_CS 0
238 #define CONFIG_SF_DEFAULT_SPEED 40000000 235 #define CONFIG_SF_DEFAULT_SPEED 40000000
239 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 236 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
240 #define FSL_QSPI_FLASH_NUM 1 237 #define FSL_QSPI_FLASH_NUM 1
241 #define FSL_QSPI_FLASH_SIZE SZ_8M 238 #define FSL_QSPI_FLASH_SIZE SZ_8M
242 #define QSPI0_BASE_ADDR 0x410A5000 239 #define QSPI0_BASE_ADDR 0x410A5000
243 #define QSPI0_AMBA_BASE 0xC0000000 240 #define QSPI0_AMBA_BASE 0xC0000000
244 #endif 241 #endif
245 242
246 /* USB Configs */ 243 /* USB Configs */
247 #define CONFIG_USB_HOST_ETHER 244 #define CONFIG_USB_HOST_ETHER
248 #define CONFIG_USB_ETHER_ASIX 245 #define CONFIG_USB_ETHER_ASIX
249 #define CONFIG_USB_ETHER_RTL8152 246 #define CONFIG_USB_ETHER_RTL8152
250 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 247 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
251 248
252 #ifdef CONFIG_VIDEO 249 #ifdef CONFIG_VIDEO
253 #define CONFIG_VIDEO_MXS 250 #define CONFIG_VIDEO_MXS
254 #define CONFIG_VIDEO_LOGO 251 #define CONFIG_VIDEO_LOGO
255 #define CONFIG_SPLASH_SCREEN 252 #define CONFIG_SPLASH_SCREEN
256 #define CONFIG_SPLASH_SCREEN_ALIGN 253 #define CONFIG_SPLASH_SCREEN_ALIGN
257 #define CONFIG_CMD_BMP 254 #define CONFIG_CMD_BMP
258 #define CONFIG_BMP_16BPP 255 #define CONFIG_BMP_16BPP
259 #define CONFIG_VIDEO_BMP_RLE8 256 #define CONFIG_VIDEO_BMP_RLE8
260 #define CONFIG_VIDEO_BMP_LOGO 257 #define CONFIG_VIDEO_BMP_LOGO
261 #define CONFIG_IMX_VIDEO_SKIP 258 #define CONFIG_IMX_VIDEO_SKIP
262 259
263 #define CONFIG_MXC_MIPI_DSI_NORTHWEST 260 #define CONFIG_MXC_MIPI_DSI_NORTHWEST
264 #define CONFIG_HX8363 261 #define CONFIG_HX8363
265 #endif 262 #endif
266 263
267 #define CONFIG_OF_SYSTEM_SETUP 264 #define CONFIG_OF_SYSTEM_SETUP
268 265
269 #if defined(CONFIG_ANDROID_SUPPORT) 266 #if defined(CONFIG_ANDROID_SUPPORT)
270 #include "mx7ulp_evk_android.h" 267 #include "mx7ulp_evk_android.h"
271 #endif 268 #endif
272 269
273 #ifdef CONFIG_IMX_OPTEE 270 #ifdef CONFIG_IMX_OPTEE
274 #define CONFIG_SYS_MEM_TOP_HIDE SZ_32M 271 #define CONFIG_SYS_MEM_TOP_HIDE SZ_32M
275 #define TEE_ENV "tee=yes\0" 272 #define TEE_ENV "tee=yes\0"
276 #else 273 #else
277 #define TEE_ENV "tee=no\0" 274 #define TEE_ENV "tee=no\0"
278 #endif 275 #endif
279 #endif /* __CONFIG_H */ 276 #endif /* __CONFIG_H */
280 277