Eric Lee / smarc-uboot

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Commit d6e4baf49987fc6f75e8574c0c27301a828b3132

Authored by TsiChung Liew
Committed by John Rigby
1 parent c3a9e63742
Exists in master and in 54 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

ColdFire: Provide gzip image size V2 & V3 platforms 

Default gzip bootm size is 8MB. Some platforms require
more than 8MB

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>

Showing 8 changed files with 9 additions and 1 deletions Inline Diff

include/configs/M52277EVB.h
Diff comments   View file @ d6e4baf
1 /* 1 /*
2 * Configuation settings for the Freescale MCF52277 EVB board. 2 * Configuation settings for the Freescale MCF52277 EVB board.
3 * 3 *
4 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. 4 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
6 * 6 *
7 * See file CREDITS for list of people who contributed to this 7 * See file CREDITS for list of people who contributed to this
8 * project. 8 * project.
9 * 9 *
10 * This program is free software; you can redistribute it and/or 10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as 11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of 12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version. 13 * the License, or (at your option) any later version.
14 * 14 *
15 * This program is distributed in the hope that it will be useful, 15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details. 18 * GNU General Public License for more details.
19 * 19 *
20 * You should have received a copy of the GNU General Public License 20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software 21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA 23 * MA 02111-1307 USA
24 */ 24 */
25 25
26 /* 26 /*
27 * board/config.h - configuration options, board specific 27 * board/config.h - configuration options, board specific
28 */ 28 */
29 29
30 #ifndef _M52277EVB_H 30 #ifndef _M52277EVB_H
31 #define _M52277EVB_H 31 #define _M52277EVB_H
32 32
33 /* 33 /*
34 * High Level Configuration Options 34 * High Level Configuration Options
35 * (easy to change) 35 * (easy to change)
36 */ 36 */
37 #define CONFIG_MCF5227x /* define processor family */ 37 #define CONFIG_MCF5227x /* define processor family */
38 #define CONFIG_M52277 /* define processor type */ 38 #define CONFIG_M52277 /* define processor type */
39 #define CONFIG_M52277EVB /* M52277EVB board */ 39 #define CONFIG_M52277EVB /* M52277EVB board */
40 40
41 #define CONFIG_MCFUART 41 #define CONFIG_MCFUART
42 #define CONFIG_SYS_UART_PORT (0) 42 #define CONFIG_SYS_UART_PORT (0)
43 #define CONFIG_BAUDRATE 115200 43 #define CONFIG_BAUDRATE 115200
44 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } 44 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
45 45
46 #undef CONFIG_WATCHDOG 46 #undef CONFIG_WATCHDOG
47 47
48 #define CONFIG_TIMESTAMP /* Print image info with timestamp */ 48 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
49 49
50 /* 50 /*
51 * BOOTP options 51 * BOOTP options
52 */ 52 */
53 #define CONFIG_BOOTP_BOOTFILESIZE 53 #define CONFIG_BOOTP_BOOTFILESIZE
54 #define CONFIG_BOOTP_BOOTPATH 54 #define CONFIG_BOOTP_BOOTPATH
55 #define CONFIG_BOOTP_GATEWAY 55 #define CONFIG_BOOTP_GATEWAY
56 #define CONFIG_BOOTP_HOSTNAME 56 #define CONFIG_BOOTP_HOSTNAME
57 57
58 /* Command line configuration */ 58 /* Command line configuration */
59 #include <config_cmd_default.h> 59 #include <config_cmd_default.h>
60 60
61 #define CONFIG_CMD_CACHE 61 #define CONFIG_CMD_CACHE
62 #define CONFIG_CMD_DATE 62 #define CONFIG_CMD_DATE
63 #define CONFIG_CMD_ELF 63 #define CONFIG_CMD_ELF
64 #define CONFIG_CMD_FLASH 64 #define CONFIG_CMD_FLASH
65 #define CONFIG_CMD_I2C 65 #define CONFIG_CMD_I2C
66 #define CONFIG_CMD_JFFS2 66 #define CONFIG_CMD_JFFS2
67 #define CONFIG_CMD_LOADB 67 #define CONFIG_CMD_LOADB
68 #define CONFIG_CMD_LOADS 68 #define CONFIG_CMD_LOADS
69 #define CONFIG_CMD_MEMORY 69 #define CONFIG_CMD_MEMORY
70 #define CONFIG_CMD_MISC 70 #define CONFIG_CMD_MISC
71 #undef CONFIG_CMD_NET 71 #undef CONFIG_CMD_NET
72 #define CONFIG_CMD_REGINFO 72 #define CONFIG_CMD_REGINFO
73 #undef CONFIG_CMD_USB 73 #undef CONFIG_CMD_USB
74 #undef CONFIG_CMD_BMP 74 #undef CONFIG_CMD_BMP
75 #define CONFIG_CMD_SPI 75 #define CONFIG_CMD_SPI
76 #define CONFIG_CMD_SF 76 #define CONFIG_CMD_SF
77 77
78 #define CONFIG_HOSTNAME M52277EVB 78 #define CONFIG_HOSTNAME M52277EVB
79 #define CONFIG_SYS_UBOOT_END 0x3FFFF 79 #define CONFIG_SYS_UBOOT_END 0x3FFFF
80 #define CONFIG_SYS_LOAD_ADDR2 0x40010007 80 #define CONFIG_SYS_LOAD_ADDR2 0x40010007
81 #ifdef CONFIG_SYS_STMICRO_BOOT 81 #ifdef CONFIG_SYS_STMICRO_BOOT
82 /* ST Micro serial flash */ 82 /* ST Micro serial flash */
83 #define CONFIG_EXTRA_ENV_SETTINGS \ 83 #define CONFIG_EXTRA_ENV_SETTINGS \
84 "inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \ 84 "inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \
85 "loadaddr=0x40010000\0" \ 85 "loadaddr=0x40010000\0" \
86 "uboot=u-boot.bin\0" \ 86 "uboot=u-boot.bin\0" \
87 "load=loadb ${loadaddr} ${baudrate};" \ 87 "load=loadb ${loadaddr} ${baudrate};" \
88 "loadb " MK_STR(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \ 88 "loadb " MK_STR(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \
89 "upd=run load; run prog\0" \ 89 "upd=run load; run prog\0" \
90 "prog=sf probe 0:2 10000 1;" \ 90 "prog=sf probe 0:2 10000 1;" \
91 "sf erase 0 30000;" \ 91 "sf erase 0 30000;" \
92 "sf write ${loadaddr} 0 30000;" \ 92 "sf write ${loadaddr} 0 30000;" \
93 "save\0" \ 93 "save\0" \
94 "" 94 ""
95 #endif 95 #endif
96 #ifdef CONFIG_SYS_SPANSION_BOOT 96 #ifdef CONFIG_SYS_SPANSION_BOOT
97 #define CONFIG_EXTRA_ENV_SETTINGS \ 97 #define CONFIG_EXTRA_ENV_SETTINGS \
98 "inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \ 98 "inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \
99 "loadaddr=0x40010000\0" \ 99 "loadaddr=0x40010000\0" \
100 "uboot=u-boot.bin\0" \ 100 "uboot=u-boot.bin\0" \
101 "load=loadb ${loadaddr} ${baudrate}\0" \ 101 "load=loadb ${loadaddr} ${baudrate}\0" \
102 "upd=run load; run prog\0" \ 102 "upd=run load; run prog\0" \
103 "prog=prot off " MK_STR(CONFIG_SYS_FLASH_BASE) \ 103 "prog=prot off " MK_STR(CONFIG_SYS_FLASH_BASE) \
104 " " MK_STR(CONFIG_SYS_UBOOT_END) ";" \ 104 " " MK_STR(CONFIG_SYS_UBOOT_END) ";" \
105 "era " MK_STR(CONFIG_SYS_FLASH_BASE) " " \ 105 "era " MK_STR(CONFIG_SYS_FLASH_BASE) " " \
106 MK_STR(CONFIG_SYS_UBOOT_END) ";" \ 106 MK_STR(CONFIG_SYS_UBOOT_END) ";" \
107 "cp.b ${loadaddr} " MK_STR(CONFIG_SYS_FLASH_BASE) \ 107 "cp.b ${loadaddr} " MK_STR(CONFIG_SYS_FLASH_BASE) \
108 " ${filesize}; save\0" \ 108 " ${filesize}; save\0" \
109 "updsbf=run loadsbf; run progsbf\0" \ 109 "updsbf=run loadsbf; run progsbf\0" \
110 "loadsbf=loadb ${loadaddr} ${baudrate};" \ 110 "loadsbf=loadb ${loadaddr} ${baudrate};" \
111 "loadb " MK_STR(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \ 111 "loadb " MK_STR(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \
112 "progsbf=sf probe 0:2 10000 1;" \ 112 "progsbf=sf probe 0:2 10000 1;" \
113 "sf erase 0 30000;" \ 113 "sf erase 0 30000;" \
114 "sf write ${loadaddr} 0 30000;" \ 114 "sf write ${loadaddr} 0 30000;" \
115 "" 115 ""
116 #endif 116 #endif
117 117
118 #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ 118 #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
119 /* LCD */ 119 /* LCD */
120 #ifdef CONFIG_CMD_BMP 120 #ifdef CONFIG_CMD_BMP
121 #define CONFIG_LCD 121 #define CONFIG_LCD
122 #define CONFIG_SPLASH_SCREEN 122 #define CONFIG_SPLASH_SCREEN
123 #define CONFIG_LCD_LOGO 123 #define CONFIG_LCD_LOGO
124 #define CONFIG_SHARP_LQ035Q7DH06 124 #define CONFIG_SHARP_LQ035Q7DH06
125 #endif 125 #endif
126 126
127 /* USB */ 127 /* USB */
128 #ifdef CONFIG_CMD_USB 128 #ifdef CONFIG_CMD_USB
129 #define CONFIG_USB_EHCI 129 #define CONFIG_USB_EHCI
130 #define CONFIG_USB_STORAGE 130 #define CONFIG_USB_STORAGE
131 #define CONFIG_DOS_PARTITION 131 #define CONFIG_DOS_PARTITION
132 #define CONFIG_MAC_PARTITION 132 #define CONFIG_MAC_PARTITION
133 #define CONFIG_ISO_PARTITION 133 #define CONFIG_ISO_PARTITION
134 #define CONFIG_SYS_USB_EHCI_REGS_BASE 0xFC0B0000 134 #define CONFIG_SYS_USB_EHCI_REGS_BASE 0xFC0B0000
135 #define CONFIG_SYS_USB_EHCI_CPU_INIT 135 #define CONFIG_SYS_USB_EHCI_CPU_INIT
136 #endif 136 #endif
137 137
138 /* Realtime clock */ 138 /* Realtime clock */
139 #define CONFIG_MCFRTC 139 #define CONFIG_MCFRTC
140 #undef RTC_DEBUG 140 #undef RTC_DEBUG
141 #define CONFIG_SYS_RTC_OSCILLATOR (32 * CONFIG_SYS_HZ) 141 #define CONFIG_SYS_RTC_OSCILLATOR (32 * CONFIG_SYS_HZ)
142 142
143 /* Timer */ 143 /* Timer */
144 #define CONFIG_MCFTMR 144 #define CONFIG_MCFTMR
145 #undef CONFIG_MCFPIT 145 #undef CONFIG_MCFPIT
146 146
147 /* I2c */ 147 /* I2c */
148 #define CONFIG_FSL_I2C 148 #define CONFIG_FSL_I2C
149 #define CONFIG_HARD_I2C /* I2C with hardware support */ 149 #define CONFIG_HARD_I2C /* I2C with hardware support */
150 #undef CONFIG_SOFT_I2C /* I2C bit-banged */ 150 #undef CONFIG_SOFT_I2C /* I2C bit-banged */
151 #define CONFIG_SYS_I2C_SPEED 80000 /* I2C speed and slave address */ 151 #define CONFIG_SYS_I2C_SPEED 80000 /* I2C speed and slave address */
152 #define CONFIG_SYS_I2C_SLAVE 0x7F 152 #define CONFIG_SYS_I2C_SLAVE 0x7F
153 #define CONFIG_SYS_I2C_OFFSET 0x58000 153 #define CONFIG_SYS_I2C_OFFSET 0x58000
154 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 154 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
155 155
156 /* DSPI and Serial Flash */ 156 /* DSPI and Serial Flash */
157 #define CONFIG_CF_DSPI 157 #define CONFIG_CF_DSPI
158 #define CONFIG_HARD_SPI 158 #define CONFIG_HARD_SPI
159 #define CONFIG_SYS_SER_FLASH_BASE 0x01000000 159 #define CONFIG_SYS_SER_FLASH_BASE 0x01000000
160 #define CONFIG_SYS_SBFHDR_SIZE 0x7 160 #define CONFIG_SYS_SBFHDR_SIZE 0x7
161 #ifdef CONFIG_CMD_SPI 161 #ifdef CONFIG_CMD_SPI
162 # define CONFIG_SYS_DSPI_CS2 162 # define CONFIG_SYS_DSPI_CS2
163 # define CONFIG_SPI_FLASH 163 # define CONFIG_SPI_FLASH
164 # define CONFIG_SPI_FLASH_STMICRO 164 # define CONFIG_SPI_FLASH_STMICRO
165 165
166 # define CONFIG_SYS_DSPI_DCTAR0 (DSPI_DCTAR_TRSZ(7) | \ 166 # define CONFIG_SYS_DSPI_DCTAR0 (DSPI_DCTAR_TRSZ(7) | \
167 DSPI_DCTAR_CPOL | \ 167 DSPI_DCTAR_CPOL | \
168 DSPI_DCTAR_CPHA | \ 168 DSPI_DCTAR_CPHA | \
169 DSPI_DCTAR_PCSSCK_1CLK | \ 169 DSPI_DCTAR_PCSSCK_1CLK | \
170 DSPI_DCTAR_PASC(0) | \ 170 DSPI_DCTAR_PASC(0) | \
171 DSPI_DCTAR_PDT(0) | \ 171 DSPI_DCTAR_PDT(0) | \
172 DSPI_DCTAR_CSSCK(0) | \ 172 DSPI_DCTAR_CSSCK(0) | \
173 DSPI_DCTAR_ASC(0) | \ 173 DSPI_DCTAR_ASC(0) | \
174 DSPI_DCTAR_PBR(0) | \ 174 DSPI_DCTAR_PBR(0) | \
175 DSPI_DCTAR_DT(1) | \ 175 DSPI_DCTAR_DT(1) | \
176 DSPI_DCTAR_BR(1)) 176 DSPI_DCTAR_BR(1))
177 #endif 177 #endif
178 178
179 /* Input, PCI, Flexbus, and VCO */ 179 /* Input, PCI, Flexbus, and VCO */
180 #define CONFIG_EXTRA_CLOCK 180 #define CONFIG_EXTRA_CLOCK
181 181
182 #define CONFIG_SYS_INPUT_CLKSRC 16000000 182 #define CONFIG_SYS_INPUT_CLKSRC 16000000
183 183
184 #define CONFIG_PRAM 2048 /* 2048 KB */ 184 #define CONFIG_PRAM 2048 /* 2048 KB */
185 185
186 #define CONFIG_SYS_PROMPT "-> " 186 #define CONFIG_SYS_PROMPT "-> "
187 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 187 #define CONFIG_SYS_LONGHELP /* undef to save memory */
188 188
189 #if defined(CONFIG_CMD_KGDB) 189 #if defined(CONFIG_CMD_KGDB)
190 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 190 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
191 #else 191 #else
192 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 192 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
193 #endif 193 #endif
194 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 194 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
195 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 195 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
196 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 196 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
197 197
198 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000) 198 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
199 199
200 #define CONFIG_SYS_HZ 1000 200 #define CONFIG_SYS_HZ 1000
201 201
202 #define CONFIG_SYS_MBAR 0xFC000000 202 #define CONFIG_SYS_MBAR 0xFC000000
203 203
204 /* 204 /*
205 * Low Level Configuration Settings 205 * Low Level Configuration Settings
206 * (address mappings, register initial values, etc.) 206 * (address mappings, register initial values, etc.)
207 * You should know what you are doing if you make changes here. 207 * You should know what you are doing if you make changes here.
208 */ 208 */
209 209
210 /* 210 /*
211 * Definitions for initial stack pointer and data area (in DPRAM) 211 * Definitions for initial stack pointer and data area (in DPRAM)
212 */ 212 */
213 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 213 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
214 #define CONFIG_SYS_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */ 214 #define CONFIG_SYS_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */
215 #define CONFIG_SYS_INIT_RAM_CTRL 0x221 215 #define CONFIG_SYS_INIT_RAM_CTRL 0x221
216 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ 216 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
217 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 32) 217 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 32)
218 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 32) 218 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 32)
219 #define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - 32) 219 #define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - 32)
220 220
221 /* 221 /*
222 * Start addresses for the final memory configuration 222 * Start addresses for the final memory configuration
223 * (Set up by the startup code) 223 * (Set up by the startup code)
224 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 224 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
225 */ 225 */
226 #define CONFIG_SYS_SDRAM_BASE 0x40000000 226 #define CONFIG_SYS_SDRAM_BASE 0x40000000
227 #define CONFIG_SYS_SDRAM_SIZE 64 /* SDRAM size in MB */ 227 #define CONFIG_SYS_SDRAM_SIZE 64 /* SDRAM size in MB */
228 #define CONFIG_SYS_SDRAM_CFG1 0x43711630 228 #define CONFIG_SYS_SDRAM_CFG1 0x43711630
229 #define CONFIG_SYS_SDRAM_CFG2 0x56670000 229 #define CONFIG_SYS_SDRAM_CFG2 0x56670000
230 #define CONFIG_SYS_SDRAM_CTRL 0xE1092000 230 #define CONFIG_SYS_SDRAM_CTRL 0xE1092000
231 #define CONFIG_SYS_SDRAM_EMOD 0x81810000 231 #define CONFIG_SYS_SDRAM_EMOD 0x81810000
232 #define CONFIG_SYS_SDRAM_MODE 0x00CD0000 232 #define CONFIG_SYS_SDRAM_MODE 0x00CD0000
233 #define CONFIG_SYS_SDRAM_DRV_STRENGTH 0x00 233 #define CONFIG_SYS_SDRAM_DRV_STRENGTH 0x00
234 234
235 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 235 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400
236 #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) 236 #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
237 237
238 #ifdef CONFIG_CF_SBF 238 #ifdef CONFIG_CF_SBF
239 # define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400) 239 # define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400)
240 #else 240 #else
241 # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 241 # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
242 #endif 242 #endif
243 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 243 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
244 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ 244 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
245 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ 245 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
246 246
247 /* Initial Memory map for Linux */ 247 /* Initial Memory map for Linux */
248 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 248 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
249 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
249 250
250 /* 251 /*
251 * Configuration for environment 252 * Configuration for environment
252 * Environment is embedded in u-boot in the second sector of the flash 253 * Environment is embedded in u-boot in the second sector of the flash
253 */ 254 */
254 #ifdef CONFIG_CF_SBF 255 #ifdef CONFIG_CF_SBF
255 # define CONFIG_ENV_IS_IN_SPI_FLASH 256 # define CONFIG_ENV_IS_IN_SPI_FLASH
256 # define CONFIG_ENV_SPI_CS 2 257 # define CONFIG_ENV_SPI_CS 2
257 #else 258 #else
258 # define CONFIG_ENV_IS_IN_FLASH 1 259 # define CONFIG_ENV_IS_IN_FLASH 1
259 #endif 260 #endif
260 #define CONFIG_ENV_OVERWRITE 1 261 #define CONFIG_ENV_OVERWRITE 1
261 #undef CONFIG_ENV_IS_EMBEDDED 262 #undef CONFIG_ENV_IS_EMBEDDED
262 263
263 /*----------------------------------------------------------------------- 264 /*-----------------------------------------------------------------------
264 * FLASH organization 265 * FLASH organization
265 */ 266 */
266 #ifdef CONFIG_SYS_STMICRO_BOOT 267 #ifdef CONFIG_SYS_STMICRO_BOOT
267 # define CONFIG_SYS_FLASH_BASE CONFIG_SYS_SER_FLASH_BASE 268 # define CONFIG_SYS_FLASH_BASE CONFIG_SYS_SER_FLASH_BASE
268 # define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_SER_FLASH_BASE 269 # define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_SER_FLASH_BASE
269 # define CONFIG_SYS_FLASH1_BASE CONFIG_SYS_CS0_BASE 270 # define CONFIG_SYS_FLASH1_BASE CONFIG_SYS_CS0_BASE
270 # define CONFIG_ENV_OFFSET 0x30000 271 # define CONFIG_ENV_OFFSET 0x30000
271 # define CONFIG_ENV_SIZE 0x1000 272 # define CONFIG_ENV_SIZE 0x1000
272 # define CONFIG_ENV_SECT_SIZE 0x10000 273 # define CONFIG_ENV_SECT_SIZE 0x10000
273 #endif 274 #endif
274 #ifdef CONFIG_SYS_SPANSION_BOOT 275 #ifdef CONFIG_SYS_SPANSION_BOOT
275 # define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE 276 # define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
276 # define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE 277 # define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE
277 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x8000) 278 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x8000)
278 # define CONFIG_ENV_SIZE 0x1000 279 # define CONFIG_ENV_SIZE 0x1000
279 # define CONFIG_ENV_SECT_SIZE 0x8000 280 # define CONFIG_ENV_SECT_SIZE 0x8000
280 #endif 281 #endif
281 282
282 #define CONFIG_SYS_FLASH_CFI 283 #define CONFIG_SYS_FLASH_CFI
283 #ifdef CONFIG_SYS_FLASH_CFI 284 #ifdef CONFIG_SYS_FLASH_CFI
284 # define CONFIG_FLASH_CFI_DRIVER 1 285 # define CONFIG_FLASH_CFI_DRIVER 1
285 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ 286 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */
286 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 287 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
287 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 288 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
288 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ 289 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
289 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ 290 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
290 # define CONFIG_SYS_FLASH_CHECKSUM 291 # define CONFIG_SYS_FLASH_CHECKSUM
291 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE } 292 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE }
292 #endif 293 #endif
293 294
294 /* 295 /*
295 * This is setting for JFFS2 support in u-boot. 296 * This is setting for JFFS2 support in u-boot.
296 * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support. 297 * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
297 */ 298 */
298 #ifdef CONFIG_CMD_JFFS2 299 #ifdef CONFIG_CMD_JFFS2
299 # define CONFIG_JFFS2_DEV "nor0" 300 # define CONFIG_JFFS2_DEV "nor0"
300 # define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x40000) 301 # define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x40000)
301 # define CONFIG_JFFS2_PART_OFFSET (CONFIG_SYS_FLASH0_BASE + 0x40000) 302 # define CONFIG_JFFS2_PART_OFFSET (CONFIG_SYS_FLASH0_BASE + 0x40000)
302 #endif 303 #endif
303 304
304 /*----------------------------------------------------------------------- 305 /*-----------------------------------------------------------------------
305 * Cache Configuration 306 * Cache Configuration
306 */ 307 */
307 #define CONFIG_SYS_CACHELINE_SIZE 16 308 #define CONFIG_SYS_CACHELINE_SIZE 16
308 309
309 /*----------------------------------------------------------------------- 310 /*-----------------------------------------------------------------------
310 * Memory bank definitions 311 * Memory bank definitions
311 */ 312 */
312 /* 313 /*
313 * CS0 - NOR Flash 314 * CS0 - NOR Flash
314 * CS1 - Available 315 * CS1 - Available
315 * CS2 - Available 316 * CS2 - Available
316 * CS3 - Available 317 * CS3 - Available
317 * CS4 - Available 318 * CS4 - Available
318 * CS5 - Available 319 * CS5 - Available
319 */ 320 */
320 321
321 #ifdef CONFIG_CF_SBF 322 #ifdef CONFIG_CF_SBF
322 #define CONFIG_SYS_CS0_BASE 0x04000000 323 #define CONFIG_SYS_CS0_BASE 0x04000000
323 #define CONFIG_SYS_CS0_MASK 0x00FF0001 324 #define CONFIG_SYS_CS0_MASK 0x00FF0001
324 #define CONFIG_SYS_CS0_CTRL 0x00001FA0 325 #define CONFIG_SYS_CS0_CTRL 0x00001FA0
325 #else 326 #else
326 #define CONFIG_SYS_CS0_BASE 0x00000000 327 #define CONFIG_SYS_CS0_BASE 0x00000000
327 #define CONFIG_SYS_CS0_MASK 0x00FF0001 328 #define CONFIG_SYS_CS0_MASK 0x00FF0001
328 #define CONFIG_SYS_CS0_CTRL 0x00001FA0 329 #define CONFIG_SYS_CS0_CTRL 0x00001FA0
329 #endif 330 #endif
330 331
331 #endif /* _M52277EVB_H */ 332 #endif /* _M52277EVB_H */
332 333
include/configs/M5235EVB.h
Diff comments   View file @ d6e4baf
1 /* 1 /*
2 * Configuation settings for the Freescale MCF5329 FireEngine board. 2 * Configuation settings for the Freescale MCF5329 FireEngine board.
3 * 3 *
4 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. 4 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
6 * 6 *
7 * See file CREDITS for list of people who contributed to this 7 * See file CREDITS for list of people who contributed to this
8 * project. 8 * project.
9 * 9 *
10 * This program is free software; you can redistribute it and/or 10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as 11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of 12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version. 13 * the License, or (at your option) any later version.
14 * 14 *
15 * This program is distributed in the hope that it will be useful, 15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details. 18 * GNU General Public License for more details.
19 * 19 *
20 * You should have received a copy of the GNU General Public License 20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software 21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA 23 * MA 02111-1307 USA
24 */ 24 */
25 25
26 /* 26 /*
27 * board/config.h - configuration options, board specific 27 * board/config.h - configuration options, board specific
28 */ 28 */
29 29
30 #ifndef _M5235EVB_H 30 #ifndef _M5235EVB_H
31 #define _M5235EVB_H 31 #define _M5235EVB_H
32 32
33 /* 33 /*
34 * High Level Configuration Options 34 * High Level Configuration Options
35 * (easy to change) 35 * (easy to change)
36 */ 36 */
37 #define CONFIG_MCF523x /* define processor family */ 37 #define CONFIG_MCF523x /* define processor family */
38 #define CONFIG_M5235 /* define processor type */ 38 #define CONFIG_M5235 /* define processor type */
39 39
40 #define CONFIG_MCFUART 40 #define CONFIG_MCFUART
41 #define CONFIG_SYS_UART_PORT (0) 41 #define CONFIG_SYS_UART_PORT (0)
42 #define CONFIG_BAUDRATE 115200 42 #define CONFIG_BAUDRATE 115200
43 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } 43 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
44 44
45 #undef CONFIG_WATCHDOG 45 #undef CONFIG_WATCHDOG
46 #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ 46 #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
47 47
48 /* 48 /*
49 * BOOTP options 49 * BOOTP options
50 */ 50 */
51 #define CONFIG_BOOTP_BOOTFILESIZE 51 #define CONFIG_BOOTP_BOOTFILESIZE
52 #define CONFIG_BOOTP_BOOTPATH 52 #define CONFIG_BOOTP_BOOTPATH
53 #define CONFIG_BOOTP_GATEWAY 53 #define CONFIG_BOOTP_GATEWAY
54 #define CONFIG_BOOTP_HOSTNAME 54 #define CONFIG_BOOTP_HOSTNAME
55 55
56 /* Command line configuration */ 56 /* Command line configuration */
57 #include <config_cmd_default.h> 57 #include <config_cmd_default.h>
58 58
59 #define CONFIG_CMD_BOOTD 59 #define CONFIG_CMD_BOOTD
60 #define CONFIG_CMD_CACHE 60 #define CONFIG_CMD_CACHE
61 #define CONFIG_CMD_DHCP 61 #define CONFIG_CMD_DHCP
62 #define CONFIG_CMD_ELF 62 #define CONFIG_CMD_ELF
63 #define CONFIG_CMD_FLASH 63 #define CONFIG_CMD_FLASH
64 #define CONFIG_CMD_I2C 64 #define CONFIG_CMD_I2C
65 #define CONFIG_CMD_MEMORY 65 #define CONFIG_CMD_MEMORY
66 #define CONFIG_CMD_MISC 66 #define CONFIG_CMD_MISC
67 #define CONFIG_CMD_MII 67 #define CONFIG_CMD_MII
68 #define CONFIG_CMD_NET 68 #define CONFIG_CMD_NET
69 #define CONFIG_CMD_PCI 69 #define CONFIG_CMD_PCI
70 #define CONFIG_CMD_PING 70 #define CONFIG_CMD_PING
71 #define CONFIG_CMD_REGINFO 71 #define CONFIG_CMD_REGINFO
72 72
73 #undef CONFIG_CMD_LOADB 73 #undef CONFIG_CMD_LOADB
74 #undef CONFIG_CMD_LOADS 74 #undef CONFIG_CMD_LOADS
75 75
76 #define CONFIG_MCFFEC 76 #define CONFIG_MCFFEC
77 #ifdef CONFIG_MCFFEC 77 #ifdef CONFIG_MCFFEC
78 # define CONFIG_NET_MULTI 1 78 # define CONFIG_NET_MULTI 1
79 # define CONFIG_MII 1 79 # define CONFIG_MII 1
80 # define CONFIG_MII_INIT 1 80 # define CONFIG_MII_INIT 1
81 # define CONFIG_SYS_DISCOVER_PHY 81 # define CONFIG_SYS_DISCOVER_PHY
82 # define CONFIG_SYS_RX_ETH_BUFFER 8 82 # define CONFIG_SYS_RX_ETH_BUFFER 8
83 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 83 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
84 84
85 # define CONFIG_SYS_FEC0_PINMUX 0 85 # define CONFIG_SYS_FEC0_PINMUX 0
86 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 86 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
87 # define MCFFEC_TOUT_LOOP 50000 87 # define MCFFEC_TOUT_LOOP 50000
88 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 88 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
89 # ifndef CONFIG_SYS_DISCOVER_PHY 89 # ifndef CONFIG_SYS_DISCOVER_PHY
90 # define FECDUPLEX FULL 90 # define FECDUPLEX FULL
91 # define FECSPEED _100BASET 91 # define FECSPEED _100BASET
92 # else 92 # else
93 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 93 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
94 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 94 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
95 # endif 95 # endif
96 # endif /* CONFIG_SYS_DISCOVER_PHY */ 96 # endif /* CONFIG_SYS_DISCOVER_PHY */
97 #endif 97 #endif
98 98
99 /* Timer */ 99 /* Timer */
100 #define CONFIG_MCFTMR 100 #define CONFIG_MCFTMR
101 #undef CONFIG_MCFPIT 101 #undef CONFIG_MCFPIT
102 102
103 /* I2C */ 103 /* I2C */
104 #define CONFIG_FSL_I2C 104 #define CONFIG_FSL_I2C
105 #define CONFIG_HARD_I2C /* I2C with hw support */ 105 #define CONFIG_HARD_I2C /* I2C with hw support */
106 #undef CONFIG_SOFT_I2C /* I2C bit-banged */ 106 #undef CONFIG_SOFT_I2C /* I2C bit-banged */
107 #define CONFIG_SYS_I2C_SPEED 80000 107 #define CONFIG_SYS_I2C_SPEED 80000
108 #define CONFIG_SYS_I2C_SLAVE 0x7F 108 #define CONFIG_SYS_I2C_SLAVE 0x7F
109 #define CONFIG_SYS_I2C_OFFSET 0x00000300 109 #define CONFIG_SYS_I2C_OFFSET 0x00000300
110 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 110 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
111 #define CONFIG_SYS_I2C_PINMUX_REG (gpio->par_qspi) 111 #define CONFIG_SYS_I2C_PINMUX_REG (gpio->par_qspi)
112 #define CONFIG_SYS_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK) 112 #define CONFIG_SYS_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK)
113 #define CONFIG_SYS_I2C_PINMUX_SET (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA) 113 #define CONFIG_SYS_I2C_PINMUX_SET (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA)
114 114
115 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ 115 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
116 #define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */ 116 #define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */
117 #define CONFIG_BOOTFILE "u-boot.bin" 117 #define CONFIG_BOOTFILE "u-boot.bin"
118 #ifdef CONFIG_MCFFEC 118 #ifdef CONFIG_MCFFEC
119 # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 119 # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
120 # define CONFIG_IPADDR 192.162.1.2 120 # define CONFIG_IPADDR 192.162.1.2
121 # define CONFIG_NETMASK 255.255.255.0 121 # define CONFIG_NETMASK 255.255.255.0
122 # define CONFIG_SERVERIP 192.162.1.1 122 # define CONFIG_SERVERIP 192.162.1.1
123 # define CONFIG_GATEWAYIP 192.162.1.1 123 # define CONFIG_GATEWAYIP 192.162.1.1
124 # define CONFIG_OVERWRITE_ETHADDR_ONCE 124 # define CONFIG_OVERWRITE_ETHADDR_ONCE
125 #endif /* FEC_ENET */ 125 #endif /* FEC_ENET */
126 126
127 #define CONFIG_HOSTNAME M5235EVB 127 #define CONFIG_HOSTNAME M5235EVB
128 #define CONFIG_EXTRA_ENV_SETTINGS \ 128 #define CONFIG_EXTRA_ENV_SETTINGS \
129 "netdev=eth0\0" \ 129 "netdev=eth0\0" \
130 "loadaddr=10000\0" \ 130 "loadaddr=10000\0" \
131 "u-boot=u-boot.bin\0" \ 131 "u-boot=u-boot.bin\0" \
132 "load=tftp ${loadaddr) ${u-boot}\0" \ 132 "load=tftp ${loadaddr) ${u-boot}\0" \
133 "upd=run load; run prog\0" \ 133 "upd=run load; run prog\0" \
134 "prog=prot off ffe00000 ffe3ffff;" \ 134 "prog=prot off ffe00000 ffe3ffff;" \
135 "era ffe00000 ffe3ffff;" \ 135 "era ffe00000 ffe3ffff;" \
136 "cp.b ${loadaddr} ffe00000 ${filesize};"\ 136 "cp.b ${loadaddr} ffe00000 ${filesize};"\
137 "save\0" \ 137 "save\0" \
138 "" 138 ""
139 139
140 #define CONFIG_PRAM 512 /* 512 KB */ 140 #define CONFIG_PRAM 512 /* 512 KB */
141 #define CONFIG_SYS_PROMPT "-> " 141 #define CONFIG_SYS_PROMPT "-> "
142 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 142 #define CONFIG_SYS_LONGHELP /* undef to save memory */
143 143
144 #if defined(CONFIG_KGDB) 144 #if defined(CONFIG_KGDB)
145 # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 145 # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
146 #else 146 #else
147 # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 147 # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
148 #endif 148 #endif
149 149
150 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 150 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
151 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 151 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
152 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 152 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
153 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE+0x20000) 153 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE+0x20000)
154 154
155 #define CONFIG_SYS_HZ 1000 155 #define CONFIG_SYS_HZ 1000
156 #define CONFIG_SYS_CLK 75000000 156 #define CONFIG_SYS_CLK 75000000
157 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2 157 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2
158 158
159 #define CONFIG_SYS_MBAR 0x40000000 159 #define CONFIG_SYS_MBAR 0x40000000
160 160
161 /* 161 /*
162 * Low Level Configuration Settings 162 * Low Level Configuration Settings
163 * (address mappings, register initial values, etc.) 163 * (address mappings, register initial values, etc.)
164 * You should know what you are doing if you make changes here. 164 * You should know what you are doing if you make changes here.
165 */ 165 */
166 /*----------------------------------------------------------------------- 166 /*-----------------------------------------------------------------------
167 * Definitions for initial stack pointer and data area (in DPRAM) 167 * Definitions for initial stack pointer and data area (in DPRAM)
168 */ 168 */
169 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 169 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
170 #define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */ 170 #define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */
171 #define CONFIG_SYS_INIT_RAM_CTRL 0x21 171 #define CONFIG_SYS_INIT_RAM_CTRL 0x21
172 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ 172 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
173 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE - 0x10) 173 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE - 0x10)
174 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 174 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
175 175
176 /*----------------------------------------------------------------------- 176 /*-----------------------------------------------------------------------
177 * Start addresses for the final memory configuration 177 * Start addresses for the final memory configuration
178 * (Set up by the startup code) 178 * (Set up by the startup code)
179 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 179 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
180 */ 180 */
181 #define CONFIG_SYS_SDRAM_BASE 0x00000000 181 #define CONFIG_SYS_SDRAM_BASE 0x00000000
182 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ 182 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
183 183
184 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 184 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400
185 #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) 185 #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
186 186
187 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 187 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
188 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ 188 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
189 189
190 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 190 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
191 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ 191 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
192 192
193 /* 193 /*
194 * For booting Linux, the board info and command line data 194 * For booting Linux, the board info and command line data
195 * have to be in the first 8 MB of memory, since this is 195 * have to be in the first 8 MB of memory, since this is
196 * the maximum mapped by the Linux kernel during initialization ?? 196 * the maximum mapped by the Linux kernel during initialization ??
197 */ 197 */
198 /* Initial Memory map for Linux */ 198 /* Initial Memory map for Linux */
199 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 199 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
200 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
200 201
201 /*----------------------------------------------------------------------- 202 /*-----------------------------------------------------------------------
202 * FLASH organization 203 * FLASH organization
203 */ 204 */
204 #define CONFIG_SYS_FLASH_CFI 205 #define CONFIG_SYS_FLASH_CFI
205 #ifdef CONFIG_SYS_FLASH_CFI 206 #ifdef CONFIG_SYS_FLASH_CFI
206 # define CONFIG_FLASH_CFI_DRIVER 1 207 # define CONFIG_FLASH_CFI_DRIVER 1
207 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ 208 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */
208 #ifdef NORFLASH_PS32BIT 209 #ifdef NORFLASH_PS32BIT
209 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT 210 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
210 #else 211 #else
211 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 212 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
212 #endif 213 #endif
213 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 214 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
214 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ 215 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
215 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ 216 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
216 #endif 217 #endif
217 218
218 #define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) 219 #define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE)
219 220
220 /* Configuration for environment 221 /* Configuration for environment
221 * Environment is embedded in u-boot in the second sector of the flash 222 * Environment is embedded in u-boot in the second sector of the flash
222 */ 223 */
223 #define CONFIG_ENV_IS_IN_FLASH 1 224 #define CONFIG_ENV_IS_IN_FLASH 1
224 #define CONFIG_ENV_IS_EMBEDDED 1 225 #define CONFIG_ENV_IS_EMBEDDED 1
225 #ifdef NORFLASH_PS32BIT 226 #ifdef NORFLASH_PS32BIT
226 # define CONFIG_ENV_OFFSET (0x8000) 227 # define CONFIG_ENV_OFFSET (0x8000)
227 # define CONFIG_ENV_SIZE 0x4000 228 # define CONFIG_ENV_SIZE 0x4000
228 # define CONFIG_ENV_SECT_SIZE 0x4000 229 # define CONFIG_ENV_SECT_SIZE 0x4000
229 #else 230 #else
230 # define CONFIG_ENV_OFFSET (0x4000) 231 # define CONFIG_ENV_OFFSET (0x4000)
231 # define CONFIG_ENV_SIZE 0x2000 232 # define CONFIG_ENV_SIZE 0x2000
232 # define CONFIG_ENV_SECT_SIZE 0x2000 233 # define CONFIG_ENV_SECT_SIZE 0x2000
233 #endif 234 #endif
234 235
235 /*----------------------------------------------------------------------- 236 /*-----------------------------------------------------------------------
236 * Cache Configuration 237 * Cache Configuration
237 */ 238 */
238 #define CONFIG_SYS_CACHELINE_SIZE 16 239 #define CONFIG_SYS_CACHELINE_SIZE 16
239 240
240 /*----------------------------------------------------------------------- 241 /*-----------------------------------------------------------------------
241 * Chipselect bank definitions 242 * Chipselect bank definitions
242 */ 243 */
243 /* 244 /*
244 * CS0 - NOR Flash 1, 2, 4, or 8MB 245 * CS0 - NOR Flash 1, 2, 4, or 8MB
245 * CS1 - Available 246 * CS1 - Available
246 * CS2 - Available 247 * CS2 - Available
247 * CS3 - Available 248 * CS3 - Available
248 * CS4 - Available 249 * CS4 - Available
249 * CS5 - Available 250 * CS5 - Available
250 * CS6 - Available 251 * CS6 - Available
251 * CS7 - Available 252 * CS7 - Available
252 */ 253 */
253 #ifdef NORFLASH_PS32BIT 254 #ifdef NORFLASH_PS32BIT
254 # define CONFIG_SYS_CS0_BASE 0xFFC00000 255 # define CONFIG_SYS_CS0_BASE 0xFFC00000
255 # define CONFIG_SYS_CS0_MASK 0x003f0001 256 # define CONFIG_SYS_CS0_MASK 0x003f0001
256 # define CONFIG_SYS_CS0_CTRL 0x00001D00 257 # define CONFIG_SYS_CS0_CTRL 0x00001D00
257 #else 258 #else
258 # define CONFIG_SYS_CS0_BASE 0xFFE00000 259 # define CONFIG_SYS_CS0_BASE 0xFFE00000
259 # define CONFIG_SYS_CS0_MASK 0x001f0001 260 # define CONFIG_SYS_CS0_MASK 0x001f0001
260 # define CONFIG_SYS_CS0_CTRL 0x00001D80 261 # define CONFIG_SYS_CS0_CTRL 0x00001D80
261 #endif 262 #endif
262 263
263 #endif /* _M5329EVB_H */ 264 #endif /* _M5329EVB_H */
264 265
include/configs/M5253DEMO.h
Diff comments   View file @ d6e4baf
1 /* 1 /*
2 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. 2 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
3 * Hayden Fraser (Hayden.Fraser@freescale.com) 3 * Hayden Fraser (Hayden.Fraser@freescale.com)
4 * 4 *
5 * See file CREDITS for list of people who contributed to this 5 * See file CREDITS for list of people who contributed to this
6 * project. 6 * project.
7 * 7 *
8 * This program is free software; you can redistribute it and/or 8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as 9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of 10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version. 11 * the License, or (at your option) any later version.
12 * 12 *
13 * This program is distributed in the hope that it will be useful, 13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 * 17 *
18 * You should have received a copy of the GNU General Public License 18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software 19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA 21 * MA 02111-1307 USA
22 */ 22 */
23 23
24 #ifndef _M5253DEMO_H 24 #ifndef _M5253DEMO_H
25 #define _M5253DEMO_H 25 #define _M5253DEMO_H
26 26
27 #define CONFIG_MCF52x2 /* define processor family */ 27 #define CONFIG_MCF52x2 /* define processor family */
28 #define CONFIG_M5253 /* define processor type */ 28 #define CONFIG_M5253 /* define processor type */
29 #define CONFIG_M5253DEMO /* define board type */ 29 #define CONFIG_M5253DEMO /* define board type */
30 30
31 #define CONFIG_MCFTMR 31 #define CONFIG_MCFTMR
32 32
33 #define CONFIG_MCFUART 33 #define CONFIG_MCFUART
34 #define CONFIG_SYS_UART_PORT (0) 34 #define CONFIG_SYS_UART_PORT (0)
35 #define CONFIG_BAUDRATE 115200 35 #define CONFIG_BAUDRATE 115200
36 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } 36 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
37 37
38 #undef CONFIG_WATCHDOG /* disable watchdog */ 38 #undef CONFIG_WATCHDOG /* disable watchdog */
39 39
40 #define CONFIG_BOOTDELAY 5 40 #define CONFIG_BOOTDELAY 5
41 41
42 /* Configuration for environment 42 /* Configuration for environment
43 * Environment is embedded in u-boot in the second sector of the flash 43 * Environment is embedded in u-boot in the second sector of the flash
44 */ 44 */
45 #ifdef CONFIG_MONITOR_IS_IN_RAM 45 #ifdef CONFIG_MONITOR_IS_IN_RAM
46 # define CONFIG_ENV_OFFSET 0x4000 46 # define CONFIG_ENV_OFFSET 0x4000
47 # define CONFIG_ENV_SECT_SIZE 0x1000 47 # define CONFIG_ENV_SECT_SIZE 0x1000
48 # define CONFIG_ENV_IS_IN_FLASH 1 48 # define CONFIG_ENV_IS_IN_FLASH 1
49 #else 49 #else
50 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x4000) 50 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x4000)
51 # define CONFIG_ENV_SECT_SIZE 0x1000 51 # define CONFIG_ENV_SECT_SIZE 0x1000
52 # define CONFIG_ENV_IS_IN_FLASH 1 52 # define CONFIG_ENV_IS_IN_FLASH 1
53 #endif 53 #endif
54 54
55 /* 55 /*
56 * Command line configuration. 56 * Command line configuration.
57 */ 57 */
58 #include <config_cmd_default.h> 58 #include <config_cmd_default.h>
59 59
60 #define CONFIG_CMD_LOADB 60 #define CONFIG_CMD_LOADB
61 #define CONFIG_CMD_LOADS 61 #define CONFIG_CMD_LOADS
62 #define CONFIG_CMD_EXT2 62 #define CONFIG_CMD_EXT2
63 #define CONFIG_CMD_FAT 63 #define CONFIG_CMD_FAT
64 #define CONFIG_CMD_IDE 64 #define CONFIG_CMD_IDE
65 #define CONFIG_CMD_MEMORY 65 #define CONFIG_CMD_MEMORY
66 #define CONFIG_CMD_MISC 66 #define CONFIG_CMD_MISC
67 #define CONFIG_CMD_PING 67 #define CONFIG_CMD_PING
68 68
69 #ifdef CONFIG_CMD_IDE 69 #ifdef CONFIG_CMD_IDE
70 /* ATA */ 70 /* ATA */
71 # define CONFIG_DOS_PARTITION 71 # define CONFIG_DOS_PARTITION
72 # define CONFIG_MAC_PARTITION 72 # define CONFIG_MAC_PARTITION
73 # define CONFIG_IDE_RESET 1 73 # define CONFIG_IDE_RESET 1
74 # define CONFIG_IDE_PREINIT 1 74 # define CONFIG_IDE_PREINIT 1
75 # define CONFIG_ATAPI 75 # define CONFIG_ATAPI
76 # undef CONFIG_LBA48 76 # undef CONFIG_LBA48
77 77
78 # define CONFIG_SYS_IDE_MAXBUS 1 78 # define CONFIG_SYS_IDE_MAXBUS 1
79 # define CONFIG_SYS_IDE_MAXDEVICE 2 79 # define CONFIG_SYS_IDE_MAXDEVICE 2
80 80
81 # define CONFIG_SYS_ATA_BASE_ADDR (CONFIG_SYS_MBAR2 + 0x800) 81 # define CONFIG_SYS_ATA_BASE_ADDR (CONFIG_SYS_MBAR2 + 0x800)
82 # define CONFIG_SYS_ATA_IDE0_OFFSET 0 82 # define CONFIG_SYS_ATA_IDE0_OFFSET 0
83 83
84 # define CONFIG_SYS_ATA_DATA_OFFSET 0xA0 /* Offset for data I/O */ 84 # define CONFIG_SYS_ATA_DATA_OFFSET 0xA0 /* Offset for data I/O */
85 # define CONFIG_SYS_ATA_REG_OFFSET 0xA0 /* Offset for normal register accesses */ 85 # define CONFIG_SYS_ATA_REG_OFFSET 0xA0 /* Offset for normal register accesses */
86 # define CONFIG_SYS_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */ 86 # define CONFIG_SYS_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */
87 # define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */ 87 # define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */
88 # define _IO_BASE 0 88 # define _IO_BASE 0
89 #endif 89 #endif
90 90
91 #define CONFIG_DRIVER_DM9000 91 #define CONFIG_DRIVER_DM9000
92 #ifdef CONFIG_DRIVER_DM9000 92 #ifdef CONFIG_DRIVER_DM9000
93 # define CONFIG_DM9000_BASE (CONFIG_SYS_CS1_BASE | 0x300) 93 # define CONFIG_DM9000_BASE (CONFIG_SYS_CS1_BASE | 0x300)
94 # define DM9000_IO CONFIG_DM9000_BASE 94 # define DM9000_IO CONFIG_DM9000_BASE
95 # define DM9000_DATA (CONFIG_DM9000_BASE + 4) 95 # define DM9000_DATA (CONFIG_DM9000_BASE + 4)
96 # undef CONFIG_DM9000_DEBUG 96 # undef CONFIG_DM9000_DEBUG
97 97
98 # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 98 # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
99 # define CONFIG_IPADDR 10.82.121.249 99 # define CONFIG_IPADDR 10.82.121.249
100 # define CONFIG_NETMASK 255.255.252.0 100 # define CONFIG_NETMASK 255.255.252.0
101 # define CONFIG_SERVERIP 10.82.120.80 101 # define CONFIG_SERVERIP 10.82.120.80
102 # define CONFIG_GATEWAYIP 10.82.123.254 102 # define CONFIG_GATEWAYIP 10.82.123.254
103 # define CONFIG_OVERWRITE_ETHADDR_ONCE 103 # define CONFIG_OVERWRITE_ETHADDR_ONCE
104 104
105 # define CONFIG_EXTRA_ENV_SETTINGS \ 105 # define CONFIG_EXTRA_ENV_SETTINGS \
106 "netdev=eth0\0" \ 106 "netdev=eth0\0" \
107 "inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \ 107 "inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \
108 "loadaddr=10000\0" \ 108 "loadaddr=10000\0" \
109 "u-boot=u-boot.bin\0" \ 109 "u-boot=u-boot.bin\0" \
110 "load=tftp ${loadaddr) ${u-boot}\0" \ 110 "load=tftp ${loadaddr) ${u-boot}\0" \
111 "upd=run load; run prog\0" \ 111 "upd=run load; run prog\0" \
112 "prog=prot off 0 2ffff;" \ 112 "prog=prot off 0 2ffff;" \
113 "era 0 2ffff;" \ 113 "era 0 2ffff;" \
114 "cp.b ${loadaddr} 0 ${filesize};" \ 114 "cp.b ${loadaddr} 0 ${filesize};" \
115 "save\0" \ 115 "save\0" \
116 "" 116 ""
117 #endif 117 #endif
118 118
119 #define CONFIG_HOSTNAME M5253DEMO 119 #define CONFIG_HOSTNAME M5253DEMO
120 120
121 /* I2C */ 121 /* I2C */
122 #define CONFIG_FSL_I2C 122 #define CONFIG_FSL_I2C
123 #define CONFIG_HARD_I2C /* I2C with hw support */ 123 #define CONFIG_HARD_I2C /* I2C with hw support */
124 #define CONFIG_SYS_I2C_SPEED 80000 124 #define CONFIG_SYS_I2C_SPEED 80000
125 #define CONFIG_SYS_I2C_SLAVE 0x7F 125 #define CONFIG_SYS_I2C_SLAVE 0x7F
126 #define CONFIG_SYS_I2C_OFFSET 0x00000280 126 #define CONFIG_SYS_I2C_OFFSET 0x00000280
127 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 127 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
128 #define CONFIG_SYS_I2C_PINMUX_REG (*(u32 *) (CONFIG_SYS_MBAR+0x19C)) 128 #define CONFIG_SYS_I2C_PINMUX_REG (*(u32 *) (CONFIG_SYS_MBAR+0x19C))
129 #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFFFE7FF) 129 #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFFFE7FF)
130 #define CONFIG_SYS_I2C_PINMUX_SET (0) 130 #define CONFIG_SYS_I2C_PINMUX_SET (0)
131 131
132 #define CONFIG_SYS_PROMPT "=> " 132 #define CONFIG_SYS_PROMPT "=> "
133 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 133 #define CONFIG_SYS_LONGHELP /* undef to save memory */
134 134
135 #if defined(CONFIG_CMD_KGDB) 135 #if defined(CONFIG_CMD_KGDB)
136 # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 136 # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
137 #else 137 #else
138 # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 138 # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
139 #endif 139 #endif
140 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 140 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
141 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 141 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
142 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 142 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
143 143
144 #define CONFIG_SYS_LOAD_ADDR 0x00100000 144 #define CONFIG_SYS_LOAD_ADDR 0x00100000
145 145
146 #define CONFIG_SYS_MEMTEST_START 0x400 146 #define CONFIG_SYS_MEMTEST_START 0x400
147 #define CONFIG_SYS_MEMTEST_END 0x380000 147 #define CONFIG_SYS_MEMTEST_END 0x380000
148 148
149 #define CONFIG_SYS_HZ 1000 149 #define CONFIG_SYS_HZ 1000
150 150
151 #undef CONFIG_SYS_PLL_BYPASS /* bypass PLL for test purpose */ 151 #undef CONFIG_SYS_PLL_BYPASS /* bypass PLL for test purpose */
152 #define CONFIG_SYS_FAST_CLK 152 #define CONFIG_SYS_FAST_CLK
153 #ifdef CONFIG_SYS_FAST_CLK 153 #ifdef CONFIG_SYS_FAST_CLK
154 # define CONFIG_SYS_PLLCR 0x1243E054 154 # define CONFIG_SYS_PLLCR 0x1243E054
155 # define CONFIG_SYS_CLK 140000000 155 # define CONFIG_SYS_CLK 140000000
156 #else 156 #else
157 # define CONFIG_SYS_PLLCR 0x135a4140 157 # define CONFIG_SYS_PLLCR 0x135a4140
158 # define CONFIG_SYS_CLK 70000000 158 # define CONFIG_SYS_CLK 70000000
159 #endif 159 #endif
160 160
161 /* 161 /*
162 * Low Level Configuration Settings 162 * Low Level Configuration Settings
163 * (address mappings, register initial values, etc.) 163 * (address mappings, register initial values, etc.)
164 * You should know what you are doing if you make changes here. 164 * You should know what you are doing if you make changes here.
165 */ 165 */
166 166
167 #define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ 167 #define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
168 #define CONFIG_SYS_MBAR2 0x80000000 /* Module Base Addrs 2 */ 168 #define CONFIG_SYS_MBAR2 0x80000000 /* Module Base Addrs 2 */
169 169
170 /* 170 /*
171 * Definitions for initial stack pointer and data area (in DPRAM) 171 * Definitions for initial stack pointer and data area (in DPRAM)
172 */ 172 */
173 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 173 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
174 #define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */ 174 #define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */
175 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ 175 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
176 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) 176 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
177 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 177 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
178 178
179 /* 179 /*
180 * Start addresses for the final memory configuration 180 * Start addresses for the final memory configuration
181 * (Set up by the startup code) 181 * (Set up by the startup code)
182 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 182 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
183 */ 183 */
184 #define CONFIG_SYS_SDRAM_BASE 0x00000000 184 #define CONFIG_SYS_SDRAM_BASE 0x00000000
185 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ 185 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
186 186
187 #ifdef CONFIG_MONITOR_IS_IN_RAM 187 #ifdef CONFIG_MONITOR_IS_IN_RAM
188 # define CONFIG_SYS_MONITOR_BASE 0x20000 188 # define CONFIG_SYS_MONITOR_BASE 0x20000
189 #else 189 #else
190 # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 190 # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
191 #endif 191 #endif
192 192
193 #define CONFIG_SYS_MONITOR_LEN 0x40000 193 #define CONFIG_SYS_MONITOR_LEN 0x40000
194 #define CONFIG_SYS_MALLOC_LEN (256 << 10) 194 #define CONFIG_SYS_MALLOC_LEN (256 << 10)
195 #define CONFIG_SYS_BOOTPARAMS_LEN (64*1024) 195 #define CONFIG_SYS_BOOTPARAMS_LEN (64*1024)
196 196
197 /* 197 /*
198 * For booting Linux, the board info and command line data 198 * For booting Linux, the board info and command line data
199 * have to be in the first 8 MB of memory, since this is 199 * have to be in the first 8 MB of memory, since this is
200 * the maximum mapped by the Linux kernel during initialization ?? 200 * the maximum mapped by the Linux kernel during initialization ??
201 */ 201 */
202 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 202 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
203 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
203 204
204 /* FLASH organization */ 205 /* FLASH organization */
205 #define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) 206 #define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE)
206 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 207 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
207 #define CONFIG_SYS_MAX_FLASH_SECT 2048 /* max number of sectors on one chip */ 208 #define CONFIG_SYS_MAX_FLASH_SECT 2048 /* max number of sectors on one chip */
208 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 209 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000
209 210
210 #define FLASH_SST6401B 0x200 211 #define FLASH_SST6401B 0x200
211 #define SST_ID_xF6401B 0x236D236D 212 #define SST_ID_xF6401B 0x236D236D
212 213
213 #undef CONFIG_SYS_FLASH_CFI 214 #undef CONFIG_SYS_FLASH_CFI
214 #ifdef CONFIG_SYS_FLASH_CFI 215 #ifdef CONFIG_SYS_FLASH_CFI
215 /* 216 /*
216 * Unable to use CFI driver, due to incompatible sector erase command by SST. 217 * Unable to use CFI driver, due to incompatible sector erase command by SST.
217 * Amd/Atmel use 0x30 for sector erase, SST use 0x50. 218 * Amd/Atmel use 0x30 for sector erase, SST use 0x50.
218 * 0x30 is block erase in SST 219 * 0x30 is block erase in SST
219 */ 220 */
220 # define CONFIG_FLASH_CFI_DRIVER 1 221 # define CONFIG_FLASH_CFI_DRIVER 1
221 # define CONFIG_SYS_FLASH_SIZE 0x800000 222 # define CONFIG_SYS_FLASH_SIZE 0x800000
222 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 223 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
223 # define CONFIG_FLASH_CFI_LEGACY 224 # define CONFIG_FLASH_CFI_LEGACY
224 #else 225 #else
225 # define CONFIG_SYS_SST_SECT 2048 226 # define CONFIG_SYS_SST_SECT 2048
226 # define CONFIG_SYS_SST_SECTSZ 0x1000 227 # define CONFIG_SYS_SST_SECTSZ 0x1000
227 # define CONFIG_SYS_FLASH_WRITE_TOUT 500 228 # define CONFIG_SYS_FLASH_WRITE_TOUT 500
228 #endif 229 #endif
229 230
230 /* Cache Configuration */ 231 /* Cache Configuration */
231 #define CONFIG_SYS_CACHELINE_SIZE 16 232 #define CONFIG_SYS_CACHELINE_SIZE 16
232 233
233 /* Port configuration */ 234 /* Port configuration */
234 #define CONFIG_SYS_FECI2C 0xF0 235 #define CONFIG_SYS_FECI2C 0xF0
235 236
236 #define CONFIG_SYS_CS0_BASE 0xFF800000 237 #define CONFIG_SYS_CS0_BASE 0xFF800000
237 #define CONFIG_SYS_CS0_MASK 0x007F0021 238 #define CONFIG_SYS_CS0_MASK 0x007F0021
238 #define CONFIG_SYS_CS0_CTRL 0x00001D80 239 #define CONFIG_SYS_CS0_CTRL 0x00001D80
239 240
240 #define CONFIG_SYS_CS1_BASE 0xE0000000 241 #define CONFIG_SYS_CS1_BASE 0xE0000000
241 #define CONFIG_SYS_CS1_MASK 0x00000001 242 #define CONFIG_SYS_CS1_MASK 0x00000001
242 #define CONFIG_SYS_CS1_CTRL 0x00003DD8 243 #define CONFIG_SYS_CS1_CTRL 0x00003DD8
243 244
244 /*----------------------------------------------------------------------- 245 /*-----------------------------------------------------------------------
245 * Port configuration 246 * Port configuration
246 */ 247 */
247 #define CONFIG_SYS_GPIO_FUNC 0x00000008 /* Set gpio pins: none */ 248 #define CONFIG_SYS_GPIO_FUNC 0x00000008 /* Set gpio pins: none */
248 #define CONFIG_SYS_GPIO1_FUNC 0x00df00f0 /* 36-39(SWITCH),48-52(FPGAs),54 */ 249 #define CONFIG_SYS_GPIO1_FUNC 0x00df00f0 /* 36-39(SWITCH),48-52(FPGAs),54 */
249 #define CONFIG_SYS_GPIO_EN 0x00000008 /* Set gpio output enable */ 250 #define CONFIG_SYS_GPIO_EN 0x00000008 /* Set gpio output enable */
250 #define CONFIG_SYS_GPIO1_EN 0x00c70000 /* Set gpio output enable */ 251 #define CONFIG_SYS_GPIO1_EN 0x00c70000 /* Set gpio output enable */
251 #define CONFIG_SYS_GPIO_OUT 0x00000008 /* Set outputs to default state */ 252 #define CONFIG_SYS_GPIO_OUT 0x00000008 /* Set outputs to default state */
252 #define CONFIG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */ 253 #define CONFIG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */
253 #define CONFIG_SYS_GPIO1_LED 0x00400000 /* user led */ 254 #define CONFIG_SYS_GPIO1_LED 0x00400000 /* user led */
254 255
255 #endif /* _M5253DEMO_H */ 256 #endif /* _M5253DEMO_H */
256 257
include/configs/M5253EVBE.h
Diff comments   View file @ d6e4baf
1 /* 1 /*
2 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. 2 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
3 * Hayden Fraser (Hayden.Fraser@freescale.com) 3 * Hayden Fraser (Hayden.Fraser@freescale.com)
4 * 4 *
5 * See file CREDITS for list of people who contributed to this 5 * See file CREDITS for list of people who contributed to this
6 * project. 6 * project.
7 * 7 *
8 * This program is free software; you can redistribute it and/or 8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as 9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of 10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version. 11 * the License, or (at your option) any later version.
12 * 12 *
13 * This program is distributed in the hope that it will be useful, 13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 * 17 *
18 * You should have received a copy of the GNU General Public License 18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software 19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA 21 * MA 02111-1307 USA
22 */ 22 */
23 23
24 #ifndef _M5253EVBE_H 24 #ifndef _M5253EVBE_H
25 #define _M5253EVBE_H 25 #define _M5253EVBE_H
26 26
27 #define CONFIG_MCF52x2 /* define processor family */ 27 #define CONFIG_MCF52x2 /* define processor family */
28 #define CONFIG_M5253 /* define processor type */ 28 #define CONFIG_M5253 /* define processor type */
29 #define CONFIG_M5253EVBE /* define board type */ 29 #define CONFIG_M5253EVBE /* define board type */
30 30
31 #define CONFIG_MCFTMR 31 #define CONFIG_MCFTMR
32 32
33 #define CONFIG_MCFUART 33 #define CONFIG_MCFUART
34 #define CONFIG_SYS_UART_PORT (0) 34 #define CONFIG_SYS_UART_PORT (0)
35 #define CONFIG_BAUDRATE 115200 35 #define CONFIG_BAUDRATE 115200
36 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } 36 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
37 37
38 #undef CONFIG_WATCHDOG /* disable watchdog */ 38 #undef CONFIG_WATCHDOG /* disable watchdog */
39 39
40 #define CONFIG_BOOTDELAY 5 40 #define CONFIG_BOOTDELAY 5
41 41
42 /* Configuration for environment 42 /* Configuration for environment
43 * Environment is embedded in u-boot in the second sector of the flash 43 * Environment is embedded in u-boot in the second sector of the flash
44 */ 44 */
45 #ifndef CONFIG_MONITOR_IS_IN_RAM 45 #ifndef CONFIG_MONITOR_IS_IN_RAM
46 #define CONFIG_ENV_OFFSET 0x4000 46 #define CONFIG_ENV_OFFSET 0x4000
47 #define CONFIG_ENV_SECT_SIZE 0x2000 47 #define CONFIG_ENV_SECT_SIZE 0x2000
48 #define CONFIG_ENV_IS_IN_FLASH 1 48 #define CONFIG_ENV_IS_IN_FLASH 1
49 #else 49 #else
50 #define CONFIG_ENV_ADDR 0xffe04000 50 #define CONFIG_ENV_ADDR 0xffe04000
51 #define CONFIG_ENV_SECT_SIZE 0x2000 51 #define CONFIG_ENV_SECT_SIZE 0x2000
52 #define CONFIG_ENV_IS_IN_FLASH 1 52 #define CONFIG_ENV_IS_IN_FLASH 1
53 #endif 53 #endif
54 54
55 /* 55 /*
56 * BOOTP options 56 * BOOTP options
57 */ 57 */
58 #undef CONFIG_BOOTP_BOOTFILESIZE 58 #undef CONFIG_BOOTP_BOOTFILESIZE
59 #undef CONFIG_BOOTP_BOOTPATH 59 #undef CONFIG_BOOTP_BOOTPATH
60 #undef CONFIG_BOOTP_GATEWAY 60 #undef CONFIG_BOOTP_GATEWAY
61 #undef CONFIG_BOOTP_HOSTNAME 61 #undef CONFIG_BOOTP_HOSTNAME
62 62
63 /* 63 /*
64 * Command line configuration. 64 * Command line configuration.
65 */ 65 */
66 #include <config_cmd_default.h> 66 #include <config_cmd_default.h>
67 #undef CONFIG_CMD_NET 67 #undef CONFIG_CMD_NET
68 #define CONFIG_CMD_LOADB 68 #define CONFIG_CMD_LOADB
69 #define CONFIG_CMD_LOADS 69 #define CONFIG_CMD_LOADS
70 #define CONFIG_CMD_EXT2 70 #define CONFIG_CMD_EXT2
71 #define CONFIG_CMD_FAT 71 #define CONFIG_CMD_FAT
72 #define CONFIG_CMD_IDE 72 #define CONFIG_CMD_IDE
73 #define CONFIG_CMD_MEMORY 73 #define CONFIG_CMD_MEMORY
74 #define CONFIG_CMD_MISC 74 #define CONFIG_CMD_MISC
75 75
76 /* ATA */ 76 /* ATA */
77 #define CONFIG_DOS_PARTITION 77 #define CONFIG_DOS_PARTITION
78 #define CONFIG_MAC_PARTITION 78 #define CONFIG_MAC_PARTITION
79 #define CONFIG_IDE_RESET 1 79 #define CONFIG_IDE_RESET 1
80 #define CONFIG_IDE_PREINIT 1 80 #define CONFIG_IDE_PREINIT 1
81 #define CONFIG_ATAPI 81 #define CONFIG_ATAPI
82 #undef CONFIG_LBA48 82 #undef CONFIG_LBA48
83 83
84 #define CONFIG_SYS_IDE_MAXBUS 1 84 #define CONFIG_SYS_IDE_MAXBUS 1
85 #define CONFIG_SYS_IDE_MAXDEVICE 2 85 #define CONFIG_SYS_IDE_MAXDEVICE 2
86 86
87 #define CONFIG_SYS_ATA_BASE_ADDR (CONFIG_SYS_MBAR2 + 0x800) 87 #define CONFIG_SYS_ATA_BASE_ADDR (CONFIG_SYS_MBAR2 + 0x800)
88 #define CONFIG_SYS_ATA_IDE0_OFFSET 0 88 #define CONFIG_SYS_ATA_IDE0_OFFSET 0
89 89
90 #define CONFIG_SYS_ATA_DATA_OFFSET 0xA0 /* Offset for data I/O */ 90 #define CONFIG_SYS_ATA_DATA_OFFSET 0xA0 /* Offset for data I/O */
91 #define CONFIG_SYS_ATA_REG_OFFSET 0xA0 /* Offset for normal register accesses */ 91 #define CONFIG_SYS_ATA_REG_OFFSET 0xA0 /* Offset for normal register accesses */
92 #define CONFIG_SYS_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */ 92 #define CONFIG_SYS_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */
93 #define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */ 93 #define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */
94 #define _IO_BASE 0 94 #define _IO_BASE 0
95 95
96 #define CONFIG_SYS_PROMPT "=> " 96 #define CONFIG_SYS_PROMPT "=> "
97 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 97 #define CONFIG_SYS_LONGHELP /* undef to save memory */
98 98
99 #if defined(CONFIG_CMD_KGDB) 99 #if defined(CONFIG_CMD_KGDB)
100 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 100 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
101 #else 101 #else
102 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 102 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
103 #endif 103 #endif
104 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 104 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
105 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 105 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
106 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 106 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
107 107
108 #define CONFIG_SYS_LOAD_ADDR 0x00100000 108 #define CONFIG_SYS_LOAD_ADDR 0x00100000
109 109
110 #define CONFIG_SYS_MEMTEST_START 0x400 110 #define CONFIG_SYS_MEMTEST_START 0x400
111 #define CONFIG_SYS_MEMTEST_END 0x380000 111 #define CONFIG_SYS_MEMTEST_END 0x380000
112 112
113 #define CONFIG_SYS_HZ 1000 113 #define CONFIG_SYS_HZ 1000
114 114
115 #undef CONFIG_SYS_PLL_BYPASS /* bypass PLL for test purpose */ 115 #undef CONFIG_SYS_PLL_BYPASS /* bypass PLL for test purpose */
116 #define CONFIG_SYS_FAST_CLK 116 #define CONFIG_SYS_FAST_CLK
117 #ifdef CONFIG_SYS_FAST_CLK 117 #ifdef CONFIG_SYS_FAST_CLK
118 # define CONFIG_SYS_PLLCR 0x1243E054 118 # define CONFIG_SYS_PLLCR 0x1243E054
119 # define CONFIG_SYS_CLK 140000000 119 # define CONFIG_SYS_CLK 140000000
120 #else 120 #else
121 # define CONFIG_SYS_PLLCR 0x135a4140 121 # define CONFIG_SYS_PLLCR 0x135a4140
122 # define CONFIG_SYS_CLK 70000000 122 # define CONFIG_SYS_CLK 70000000
123 #endif 123 #endif
124 124
125 /* 125 /*
126 * Low Level Configuration Settings 126 * Low Level Configuration Settings
127 * (address mappings, register initial values, etc.) 127 * (address mappings, register initial values, etc.)
128 * You should know what you are doing if you make changes here. 128 * You should know what you are doing if you make changes here.
129 */ 129 */
130 130
131 #define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ 131 #define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
132 #define CONFIG_SYS_MBAR2 0x80000000 /* Module Base Addrs 2 */ 132 #define CONFIG_SYS_MBAR2 0x80000000 /* Module Base Addrs 2 */
133 133
134 /* 134 /*
135 * Definitions for initial stack pointer and data area (in DPRAM) 135 * Definitions for initial stack pointer and data area (in DPRAM)
136 */ 136 */
137 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 137 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
138 #define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */ 138 #define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */
139 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ 139 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
140 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) 140 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
141 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 141 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
142 142
143 /* 143 /*
144 * Start addresses for the final memory configuration 144 * Start addresses for the final memory configuration
145 * (Set up by the startup code) 145 * (Set up by the startup code)
146 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 146 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
147 */ 147 */
148 #define CONFIG_SYS_SDRAM_BASE 0x00000000 148 #define CONFIG_SYS_SDRAM_BASE 0x00000000
149 #define CONFIG_SYS_SDRAM_SIZE 8 /* SDRAM size in MB */ 149 #define CONFIG_SYS_SDRAM_SIZE 8 /* SDRAM size in MB */
150 150
151 #ifdef CONFIG_MONITOR_IS_IN_RAM 151 #ifdef CONFIG_MONITOR_IS_IN_RAM
152 #define CONFIG_SYS_MONITOR_BASE 0x20000 152 #define CONFIG_SYS_MONITOR_BASE 0x20000
153 #else 153 #else
154 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 154 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
155 #endif 155 #endif
156 156
157 #define CONFIG_SYS_MONITOR_LEN 0x40000 157 #define CONFIG_SYS_MONITOR_LEN 0x40000
158 #define CONFIG_SYS_MALLOC_LEN (256 << 10) 158 #define CONFIG_SYS_MALLOC_LEN (256 << 10)
159 #define CONFIG_SYS_BOOTPARAMS_LEN (64*1024) 159 #define CONFIG_SYS_BOOTPARAMS_LEN (64*1024)
160 160
161 /* 161 /*
162 * For booting Linux, the board info and command line data 162 * For booting Linux, the board info and command line data
163 * have to be in the first 8 MB of memory, since this is 163 * have to be in the first 8 MB of memory, since this is
164 * the maximum mapped by the Linux kernel during initialization ?? 164 * the maximum mapped by the Linux kernel during initialization ??
165 */ 165 */
166 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 166 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
167 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
167 168
168 /* FLASH organization */ 169 /* FLASH organization */
169 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE 170 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
170 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 171 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
171 #define CONFIG_SYS_MAX_FLASH_SECT 35 /* max number of sectors on one chip */ 172 #define CONFIG_SYS_MAX_FLASH_SECT 35 /* max number of sectors on one chip */
172 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 173 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000
173 174
174 #define CONFIG_SYS_FLASH_CFI 1 175 #define CONFIG_SYS_FLASH_CFI 1
175 #define CONFIG_FLASH_CFI_DRIVER 1 176 #define CONFIG_FLASH_CFI_DRIVER 1
176 #define CONFIG_SYS_FLASH_SIZE 0x200000 177 #define CONFIG_SYS_FLASH_SIZE 0x200000
177 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 178 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
178 179
179 /* Cache Configuration */ 180 /* Cache Configuration */
180 #define CONFIG_SYS_CACHELINE_SIZE 16 181 #define CONFIG_SYS_CACHELINE_SIZE 16
181 182
182 /* Port configuration */ 183 /* Port configuration */
183 #define CONFIG_SYS_FECI2C 0xF0 184 #define CONFIG_SYS_FECI2C 0xF0
184 185
185 #define CONFIG_SYS_CS0_BASE 0xFFE00000 186 #define CONFIG_SYS_CS0_BASE 0xFFE00000
186 #define CONFIG_SYS_CS0_MASK 0x001F0021 187 #define CONFIG_SYS_CS0_MASK 0x001F0021
187 #define CONFIG_SYS_CS0_CTRL 0x00001D80 188 #define CONFIG_SYS_CS0_CTRL 0x00001D80
188 189
189 /*----------------------------------------------------------------------- 190 /*-----------------------------------------------------------------------
190 * Port configuration 191 * Port configuration
191 */ 192 */
192 #define CONFIG_SYS_GPIO_FUNC 0x00000008 /* Set gpio pins: none */ 193 #define CONFIG_SYS_GPIO_FUNC 0x00000008 /* Set gpio pins: none */
193 #define CONFIG_SYS_GPIO1_FUNC 0x00df00f0 /* 36-39(SWITCH),48-52(FPGAs),54 */ 194 #define CONFIG_SYS_GPIO1_FUNC 0x00df00f0 /* 36-39(SWITCH),48-52(FPGAs),54 */
194 #define CONFIG_SYS_GPIO_EN 0x00000008 /* Set gpio output enable */ 195 #define CONFIG_SYS_GPIO_EN 0x00000008 /* Set gpio output enable */
195 #define CONFIG_SYS_GPIO1_EN 0x00c70000 /* Set gpio output enable */ 196 #define CONFIG_SYS_GPIO1_EN 0x00c70000 /* Set gpio output enable */
196 #define CONFIG_SYS_GPIO_OUT 0x00000008 /* Set outputs to default state */ 197 #define CONFIG_SYS_GPIO_OUT 0x00000008 /* Set outputs to default state */
197 #define CONFIG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */ 198 #define CONFIG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */
198 #define CONFIG_SYS_GPIO1_LED 0x00400000 /* user led */ 199 #define CONFIG_SYS_GPIO1_LED 0x00400000 /* user led */
199 200
200 #endif /* _M5253EVB_H */ 201 #endif /* _M5253EVB_H */
201 202
include/configs/M5275EVB.h
Diff comments   View file @ d6e4baf
1 /* 1 /*
2 * Configuation settings for the Motorola MC5275EVB board. 2 * Configuation settings for the Motorola MC5275EVB board.
3 * 3 *
4 * By Arthur Shipkowski <art@videon-central.com> 4 * By Arthur Shipkowski <art@videon-central.com>
5 * Copyright (C) 2005 Videon Central, Inc. 5 * Copyright (C) 2005 Videon Central, Inc.
6 * 6 *
7 * Based off of M5272C3 board code by Josef Baumgartner 7 * Based off of M5272C3 board code by Josef Baumgartner
8 * <josef.baumgartner@telex.de> 8 * <josef.baumgartner@telex.de>
9 * 9 *
10 * See file CREDITS for list of people who contributed to this 10 * See file CREDITS for list of people who contributed to this
11 * project. 11 * project.
12 * 12 *
13 * This program is free software; you can redistribute it and/or 13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as 14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of 15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version. 16 * the License, or (at your option) any later version.
17 * 17 *
18 * This program is distributed in the hope that it will be useful, 18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details. 21 * GNU General Public License for more details.
22 * 22 *
23 * You should have received a copy of the GNU General Public License 23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software 24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA 26 * MA 02111-1307 USA
27 */ 27 */
28 28
29 /* 29 /*
30 * board/config.h - configuration options, board specific 30 * board/config.h - configuration options, board specific
31 */ 31 */
32 32
33 #ifndef _M5275EVB_H 33 #ifndef _M5275EVB_H
34 #define _M5275EVB_H 34 #define _M5275EVB_H
35 35
36 /* 36 /*
37 * High Level Configuration Options 37 * High Level Configuration Options
38 * (easy to change) 38 * (easy to change)
39 */ 39 */
40 #define CONFIG_MCF52x2 /* define processor family */ 40 #define CONFIG_MCF52x2 /* define processor family */
41 #define CONFIG_M5275 /* define processor type */ 41 #define CONFIG_M5275 /* define processor type */
42 #define CONFIG_M5275EVB /* define board type */ 42 #define CONFIG_M5275EVB /* define board type */
43 43
44 #define CONFIG_MCFTMR 44 #define CONFIG_MCFTMR
45 45
46 #define CONFIG_MCFUART 46 #define CONFIG_MCFUART
47 #define CONFIG_SYS_UART_PORT (0) 47 #define CONFIG_SYS_UART_PORT (0)
48 #define CONFIG_BAUDRATE 115200 48 #define CONFIG_BAUDRATE 115200
49 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } 49 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
50 50
51 /* Configuration for environment 51 /* Configuration for environment
52 * Environment is embedded in u-boot in the second sector of the flash 52 * Environment is embedded in u-boot in the second sector of the flash
53 */ 53 */
54 #ifndef CONFIG_MONITOR_IS_IN_RAM 54 #ifndef CONFIG_MONITOR_IS_IN_RAM
55 #define CONFIG_ENV_OFFSET 0x4000 55 #define CONFIG_ENV_OFFSET 0x4000
56 #define CONFIG_ENV_SECT_SIZE 0x2000 56 #define CONFIG_ENV_SECT_SIZE 0x2000
57 #define CONFIG_ENV_IS_IN_FLASH 1 57 #define CONFIG_ENV_IS_IN_FLASH 1
58 #define CONFIG_ENV_IS_EMBEDDED 1 58 #define CONFIG_ENV_IS_EMBEDDED 1
59 #else 59 #else
60 #define CONFIG_ENV_ADDR 0xffe04000 60 #define CONFIG_ENV_ADDR 0xffe04000
61 #define CONFIG_ENV_SECT_SIZE 0x2000 61 #define CONFIG_ENV_SECT_SIZE 0x2000
62 #define CONFIG_ENV_IS_IN_FLASH 1 62 #define CONFIG_ENV_IS_IN_FLASH 1
63 #endif 63 #endif
64 64
65 /* 65 /*
66 * BOOTP options 66 * BOOTP options
67 */ 67 */
68 #define CONFIG_BOOTP_BOOTFILESIZE 68 #define CONFIG_BOOTP_BOOTFILESIZE
69 #define CONFIG_BOOTP_BOOTPATH 69 #define CONFIG_BOOTP_BOOTPATH
70 #define CONFIG_BOOTP_GATEWAY 70 #define CONFIG_BOOTP_GATEWAY
71 #define CONFIG_BOOTP_HOSTNAME 71 #define CONFIG_BOOTP_HOSTNAME
72 72
73 /* Available command configuration */ 73 /* Available command configuration */
74 #include <config_cmd_default.h> 74 #include <config_cmd_default.h>
75 75
76 #define CONFIG_CMD_PING 76 #define CONFIG_CMD_PING
77 #define CONFIG_CMD_MII 77 #define CONFIG_CMD_MII
78 #define CONFIG_CMD_NET 78 #define CONFIG_CMD_NET
79 #define CONFIG_CMD_ELF 79 #define CONFIG_CMD_ELF
80 #define CONFIG_CMD_FLASH 80 #define CONFIG_CMD_FLASH
81 #define CONFIG_CMD_I2C 81 #define CONFIG_CMD_I2C
82 #define CONFIG_CMD_MEMORY 82 #define CONFIG_CMD_MEMORY
83 #define CONFIG_CMD_DHCP 83 #define CONFIG_CMD_DHCP
84 84
85 #undef CONFIG_CMD_LOADS 85 #undef CONFIG_CMD_LOADS
86 #undef CONFIG_CMD_LOADB 86 #undef CONFIG_CMD_LOADB
87 87
88 #define CONFIG_MCFFEC 88 #define CONFIG_MCFFEC
89 #ifdef CONFIG_MCFFEC 89 #ifdef CONFIG_MCFFEC
90 #define CONFIG_NET_MULTI 1 90 #define CONFIG_NET_MULTI 1
91 #define CONFIG_MII 1 91 #define CONFIG_MII 1
92 #define CONFIG_MII_INIT 1 92 #define CONFIG_MII_INIT 1
93 #define CONFIG_SYS_DISCOVER_PHY 93 #define CONFIG_SYS_DISCOVER_PHY
94 #define CONFIG_SYS_RX_ETH_BUFFER 8 94 #define CONFIG_SYS_RX_ETH_BUFFER 8
95 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 95 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
96 #define CONFIG_SYS_FEC0_PINMUX 0 96 #define CONFIG_SYS_FEC0_PINMUX 0
97 #define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 97 #define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
98 #define CONFIG_SYS_FEC1_PINMUX 0 98 #define CONFIG_SYS_FEC1_PINMUX 0
99 #define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE 99 #define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE
100 #define MCFFEC_TOUT_LOOP 50000 100 #define MCFFEC_TOUT_LOOP 50000
101 #define CONFIG_HAS_ETH1 101 #define CONFIG_HAS_ETH1
102 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 102 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
103 #ifndef CONFIG_SYS_DISCOVER_PHY 103 #ifndef CONFIG_SYS_DISCOVER_PHY
104 #define FECDUPLEX FULL 104 #define FECDUPLEX FULL
105 #define FECSPEED _100BASET 105 #define FECSPEED _100BASET
106 #else 106 #else
107 #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 107 #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
108 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 108 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
109 #endif 109 #endif
110 #endif 110 #endif
111 #endif 111 #endif
112 112
113 /* I2C */ 113 /* I2C */
114 #define CONFIG_FSL_I2C 114 #define CONFIG_FSL_I2C
115 #define CONFIG_HARD_I2C /* I2C with hw support */ 115 #define CONFIG_HARD_I2C /* I2C with hw support */
116 #undef CONFIG_SOFT_I2C 116 #undef CONFIG_SOFT_I2C
117 #define CONFIG_SYS_I2C_SPEED 80000 117 #define CONFIG_SYS_I2C_SPEED 80000
118 #define CONFIG_SYS_I2C_SLAVE 0x7F 118 #define CONFIG_SYS_I2C_SLAVE 0x7F
119 #define CONFIG_SYS_I2C_OFFSET 0x00000300 119 #define CONFIG_SYS_I2C_OFFSET 0x00000300
120 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 120 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
121 #define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c) 121 #define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c)
122 #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0) 122 #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0)
123 #define CONFIG_SYS_I2C_PINMUX_SET (0x000F) 123 #define CONFIG_SYS_I2C_PINMUX_SET (0x000F)
124 124
125 #ifdef CONFIG_MCFFEC 125 #ifdef CONFIG_MCFFEC
126 #define CONFIG_ETHADDR 00:06:3b:01:41:55 126 #define CONFIG_ETHADDR 00:06:3b:01:41:55
127 #define CONFIG_ETH1ADDR 00:0e:0c:bc:e5:60 127 #define CONFIG_ETH1ADDR 00:0e:0c:bc:e5:60
128 #endif 128 #endif
129 129
130 #define CONFIG_SYS_PROMPT "-> " 130 #define CONFIG_SYS_PROMPT "-> "
131 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 131 #define CONFIG_SYS_LONGHELP /* undef to save memory */
132 132
133 #if (CONFIG_CMD_KGDB) 133 #if (CONFIG_CMD_KGDB)
134 # define CONFIG_SYS_CBSIZE 1024 134 # define CONFIG_SYS_CBSIZE 1024
135 #else 135 #else
136 # define CONFIG_SYS_CBSIZE 256 136 # define CONFIG_SYS_CBSIZE 256
137 #endif 137 #endif
138 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 138 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
139 #define CONFIG_SYS_MAXARGS 16 139 #define CONFIG_SYS_MAXARGS 16
140 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 140 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
141 141
142 #define CONFIG_SYS_LOAD_ADDR 0x800000 142 #define CONFIG_SYS_LOAD_ADDR 0x800000
143 143
144 #define CONFIG_BOOTDELAY 5 144 #define CONFIG_BOOTDELAY 5
145 #define CONFIG_BOOTCOMMAND "bootm ffe40000" 145 #define CONFIG_BOOTCOMMAND "bootm ffe40000"
146 #define CONFIG_SYS_MEMTEST_START 0x400 146 #define CONFIG_SYS_MEMTEST_START 0x400
147 #define CONFIG_SYS_MEMTEST_END 0x380000 147 #define CONFIG_SYS_MEMTEST_END 0x380000
148 148
149 #define CONFIG_SYS_HZ 1000 149 #define CONFIG_SYS_HZ 1000
150 #define CONFIG_SYS_CLK 150000000 150 #define CONFIG_SYS_CLK 150000000
151 151
152 /* 152 /*
153 * Low Level Configuration Settings 153 * Low Level Configuration Settings
154 * (address mappings, register initial values, etc.) 154 * (address mappings, register initial values, etc.)
155 * You should know what you are doing if you make changes here. 155 * You should know what you are doing if you make changes here.
156 */ 156 */
157 157
158 #define CONFIG_SYS_MBAR 0x40000000 158 #define CONFIG_SYS_MBAR 0x40000000
159 159
160 /*----------------------------------------------------------------------- 160 /*-----------------------------------------------------------------------
161 * Definitions for initial stack pointer and data area (in DPRAM) 161 * Definitions for initial stack pointer and data area (in DPRAM)
162 */ 162 */
163 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 163 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
164 #define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */ 164 #define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */
165 #define CONFIG_SYS_GBL_DATA_SIZE 1000 /* bytes reserved for initial data */ 165 #define CONFIG_SYS_GBL_DATA_SIZE 1000 /* bytes reserved for initial data */
166 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) 166 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
167 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 167 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
168 168
169 /*----------------------------------------------------------------------- 169 /*-----------------------------------------------------------------------
170 * Start addresses for the final memory configuration 170 * Start addresses for the final memory configuration
171 * (Set up by the startup code) 171 * (Set up by the startup code)
172 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 172 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
173 */ 173 */
174 #define CONFIG_SYS_SDRAM_BASE 0x00000000 174 #define CONFIG_SYS_SDRAM_BASE 0x00000000
175 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ 175 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
176 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE 176 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
177 177
178 #ifdef CONFIG_MONITOR_IS_IN_RAM 178 #ifdef CONFIG_MONITOR_IS_IN_RAM
179 #define CONFIG_SYS_MONITOR_BASE 0x20000 179 #define CONFIG_SYS_MONITOR_BASE 0x20000
180 #else 180 #else
181 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 181 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
182 #endif 182 #endif
183 183
184 #define CONFIG_SYS_MONITOR_LEN 0x20000 184 #define CONFIG_SYS_MONITOR_LEN 0x20000
185 #define CONFIG_SYS_MALLOC_LEN (256 << 10) 185 #define CONFIG_SYS_MALLOC_LEN (256 << 10)
186 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 186 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
187 187
188 /* 188 /*
189 * For booting Linux, the board info and command line data 189 * For booting Linux, the board info and command line data
190 * have to be in the first 8 MB of memory, since this is 190 * have to be in the first 8 MB of memory, since this is
191 * the maximum mapped by the Linux kernel during initialization ?? 191 * the maximum mapped by the Linux kernel during initialization ??
192 */ 192 */
193 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial mmap for Linux */ 193 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
194 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
194 195
195 /*----------------------------------------------------------------------- 196 /*-----------------------------------------------------------------------
196 * FLASH organization 197 * FLASH organization
197 */ 198 */
198 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 199 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
199 #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */ 200 #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
200 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 201 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000
201 202
202 #define CONFIG_SYS_FLASH_CFI 1 203 #define CONFIG_SYS_FLASH_CFI 1
203 #define CONFIG_FLASH_CFI_DRIVER 1 204 #define CONFIG_FLASH_CFI_DRIVER 1
204 #define CONFIG_SYS_FLASH_SIZE 0x200000 205 #define CONFIG_SYS_FLASH_SIZE 0x200000
205 206
206 /*----------------------------------------------------------------------- 207 /*-----------------------------------------------------------------------
207 * Cache Configuration 208 * Cache Configuration
208 */ 209 */
209 #define CONFIG_SYS_CACHELINE_SIZE 16 210 #define CONFIG_SYS_CACHELINE_SIZE 16
210 211
211 /*----------------------------------------------------------------------- 212 /*-----------------------------------------------------------------------
212 * Memory bank definitions 213 * Memory bank definitions
213 */ 214 */
214 #define CONFIG_SYS_CS0_BASE 0xffe00000 215 #define CONFIG_SYS_CS0_BASE 0xffe00000
215 #define CONFIG_SYS_CS0_CTRL 0x00001980 216 #define CONFIG_SYS_CS0_CTRL 0x00001980
216 #define CONFIG_SYS_CS0_MASK 0x001F0001 217 #define CONFIG_SYS_CS0_MASK 0x001F0001
217 218
218 #define CONFIG_SYS_CS1_BASE 0x30000000 219 #define CONFIG_SYS_CS1_BASE 0x30000000
219 #define CONFIG_SYS_CS1_CTRL 0x00001900 220 #define CONFIG_SYS_CS1_CTRL 0x00001900
220 #define CONFIG_SYS_CS1_MASK 0x00070001 221 #define CONFIG_SYS_CS1_MASK 0x00070001
221 222
222 /*----------------------------------------------------------------------- 223 /*-----------------------------------------------------------------------
223 * Port configuration 224 * Port configuration
224 */ 225 */
225 #define CONFIG_SYS_FECI2C 0x0FA0 226 #define CONFIG_SYS_FECI2C 0x0FA0
226 227
227 #endif /* _M5275EVB_H */ 228 #endif /* _M5275EVB_H */
228 229
include/configs/M53017EVB.h
Diff comments   View file @ d6e4baf
1 /* 1 /*
2 * Configuation settings for the Freescale MCF53017EVB. 2 * Configuation settings for the Freescale MCF53017EVB.
3 * 3 *
4 * Copyright (C) 2004-2008 Freescale Semiconductor, Inc. 4 * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
6 * 6 *
7 * See file CREDITS for list of people who contributed to this 7 * See file CREDITS for list of people who contributed to this
8 * project. 8 * project.
9 * 9 *
10 * This program is free software; you can redistribute it and/or 10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as 11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of 12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version. 13 * the License, or (at your option) any later version.
14 * 14 *
15 * This program is distributed in the hope that it will be useful, 15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details. 18 * GNU General Public License for more details.
19 * 19 *
20 * You should have received a copy of the GNU General Public License 20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software 21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA 23 * MA 02111-1307 USA
24 */ 24 */
25 25
26 /* 26 /*
27 * board/config.h - configuration options, board specific 27 * board/config.h - configuration options, board specific
28 */ 28 */
29 29
30 #ifndef _M53017EVB_H 30 #ifndef _M53017EVB_H
31 #define _M53017EVB_H 31 #define _M53017EVB_H
32 32
33 /* 33 /*
34 * High Level Configuration Options 34 * High Level Configuration Options
35 * (easy to change) 35 * (easy to change)
36 */ 36 */
37 #define CONFIG_MCF5301x /* define processor family */ 37 #define CONFIG_MCF5301x /* define processor family */
38 #define CONFIG_M53015 /* define processor type */ 38 #define CONFIG_M53015 /* define processor type */
39 39
40 #define CONFIG_MCFUART 40 #define CONFIG_MCFUART
41 #define CONFIG_SYS_UART_PORT (0) 41 #define CONFIG_SYS_UART_PORT (0)
42 #define CONFIG_BAUDRATE 115200 42 #define CONFIG_BAUDRATE 115200
43 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } 43 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
44 44
45 #undef CONFIG_WATCHDOG 45 #undef CONFIG_WATCHDOG
46 #define CONFIG_WATCHDOG_TIMEOUT 5000 46 #define CONFIG_WATCHDOG_TIMEOUT 5000
47 47
48 /* Command line configuration */ 48 /* Command line configuration */
49 #include <config_cmd_default.h> 49 #include <config_cmd_default.h>
50 50
51 #define CONFIG_CMD_CACHE 51 #define CONFIG_CMD_CACHE
52 #define CONFIG_CMD_DATE 52 #define CONFIG_CMD_DATE
53 #define CONFIG_CMD_ELF 53 #define CONFIG_CMD_ELF
54 #define CONFIG_CMD_FLASH 54 #define CONFIG_CMD_FLASH
55 #undef CONFIG_CMD_I2C 55 #undef CONFIG_CMD_I2C
56 #define CONFIG_CMD_MEMORY 56 #define CONFIG_CMD_MEMORY
57 #define CONFIG_CMD_MISC 57 #define CONFIG_CMD_MISC
58 #define CONFIG_CMD_MII 58 #define CONFIG_CMD_MII
59 #define CONFIG_CMD_NET 59 #define CONFIG_CMD_NET
60 #define CONFIG_CMD_PING 60 #define CONFIG_CMD_PING
61 #define CONFIG_CMD_REGINFO 61 #define CONFIG_CMD_REGINFO
62 62
63 #define CONFIG_SYS_UNIFY_CACHE 63 #define CONFIG_SYS_UNIFY_CACHE
64 64
65 #define CONFIG_MCFFEC 65 #define CONFIG_MCFFEC
66 #ifdef CONFIG_MCFFEC 66 #ifdef CONFIG_MCFFEC
67 # define CONFIG_NET_MULTI 1 67 # define CONFIG_NET_MULTI 1
68 # define CONFIG_MII 1 68 # define CONFIG_MII 1
69 # define CONFIG_MII_INIT 1 69 # define CONFIG_MII_INIT 1
70 # define CONFIG_SYS_DISCOVER_PHY 70 # define CONFIG_SYS_DISCOVER_PHY
71 # define CONFIG_SYS_RX_ETH_BUFFER 8 71 # define CONFIG_SYS_RX_ETH_BUFFER 8
72 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 72 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
73 # define CONFIG_HAS_ETH1 73 # define CONFIG_HAS_ETH1
74 74
75 # define CONFIG_SYS_FEC0_PINMUX 0 75 # define CONFIG_SYS_FEC0_PINMUX 0
76 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 76 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
77 # define CONFIG_SYS_FEC1_PINMUX 0 77 # define CONFIG_SYS_FEC1_PINMUX 0
78 # define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE 78 # define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE
79 # define MCFFEC_TOUT_LOOP 50000 79 # define MCFFEC_TOUT_LOOP 50000
80 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 80 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
81 # ifndef CONFIG_SYS_DISCOVER_PHY 81 # ifndef CONFIG_SYS_DISCOVER_PHY
82 # define FECDUPLEX FULL 82 # define FECDUPLEX FULL
83 # define FECSPEED _100BASET 83 # define FECSPEED _100BASET
84 # else 84 # else
85 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 85 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
86 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 86 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
87 # endif 87 # endif
88 # endif /* CONFIG_SYS_DISCOVER_PHY */ 88 # endif /* CONFIG_SYS_DISCOVER_PHY */
89 #endif 89 #endif
90 90
91 #define CONFIG_MCFRTC 91 #define CONFIG_MCFRTC
92 #undef RTC_DEBUG 92 #undef RTC_DEBUG
93 #define CONFIG_SYS_RTC_CNT (0x8000) 93 #define CONFIG_SYS_RTC_CNT (0x8000)
94 #define CONFIG_SYS_RTC_SETUP (RTC_OCEN_OSCBYP | RTC_OCEN_CLKEN) 94 #define CONFIG_SYS_RTC_SETUP (RTC_OCEN_OSCBYP | RTC_OCEN_CLKEN)
95 95
96 /* Timer */ 96 /* Timer */
97 #define CONFIG_MCFTMR 97 #define CONFIG_MCFTMR
98 #undef CONFIG_MCFPIT 98 #undef CONFIG_MCFPIT
99 99
100 /* I2C */ 100 /* I2C */
101 #define CONFIG_FSL_I2C 101 #define CONFIG_FSL_I2C
102 #define CONFIG_HARD_I2C /* I2C with hw support */ 102 #define CONFIG_HARD_I2C /* I2C with hw support */
103 #undef CONFIG_SOFT_I2C /* I2C bit-banged */ 103 #undef CONFIG_SOFT_I2C /* I2C bit-banged */
104 #define CONFIG_SYS_I2C_SPEED 80000 104 #define CONFIG_SYS_I2C_SPEED 80000
105 #define CONFIG_SYS_I2C_SLAVE 0x7F 105 #define CONFIG_SYS_I2C_SLAVE 0x7F
106 #define CONFIG_SYS_I2C_OFFSET 0x58000 106 #define CONFIG_SYS_I2C_OFFSET 0x58000
107 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 107 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
108 108
109 #define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */ 109 #define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */
110 #define CONFIG_UDP_CHECKSUM 110 #define CONFIG_UDP_CHECKSUM
111 111
112 #ifdef CONFIG_MCFFEC 112 #ifdef CONFIG_MCFFEC
113 # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 113 # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
114 # define CONFIG_ETH1ADDR 00:e0:0c:bc:e5:61 114 # define CONFIG_ETH1ADDR 00:e0:0c:bc:e5:61
115 # define CONFIG_IPADDR 192.162.1.2 115 # define CONFIG_IPADDR 192.162.1.2
116 # define CONFIG_NETMASK 255.255.255.0 116 # define CONFIG_NETMASK 255.255.255.0
117 # define CONFIG_SERVERIP 192.162.1.1 117 # define CONFIG_SERVERIP 192.162.1.1
118 # define CONFIG_GATEWAYIP 192.162.1.1 118 # define CONFIG_GATEWAYIP 192.162.1.1
119 # define CONFIG_OVERWRITE_ETHADDR_ONCE 119 # define CONFIG_OVERWRITE_ETHADDR_ONCE
120 #endif /* FEC_ENET */ 120 #endif /* FEC_ENET */
121 121
122 #define CONFIG_HOSTNAME M53017 122 #define CONFIG_HOSTNAME M53017
123 #define CONFIG_EXTRA_ENV_SETTINGS \ 123 #define CONFIG_EXTRA_ENV_SETTINGS \
124 "netdev=eth0\0" \ 124 "netdev=eth0\0" \
125 "loadaddr=40010000\0" \ 125 "loadaddr=40010000\0" \
126 "u-boot=u-boot.bin\0" \ 126 "u-boot=u-boot.bin\0" \
127 "load=tftp ${loadaddr) ${u-boot}\0" \ 127 "load=tftp ${loadaddr) ${u-boot}\0" \
128 "upd=run load; run prog\0" \ 128 "upd=run load; run prog\0" \
129 "prog=prot off 0 3ffff;" \ 129 "prog=prot off 0 3ffff;" \
130 "era 0 3ffff;" \ 130 "era 0 3ffff;" \
131 "cp.b ${loadaddr} 0 ${filesize};" \ 131 "cp.b ${loadaddr} 0 ${filesize};" \
132 "save\0" \ 132 "save\0" \
133 "" 133 ""
134 134
135 #define CONFIG_PRAM 512 /* 512 KB */ 135 #define CONFIG_PRAM 512 /* 512 KB */
136 #define CONFIG_SYS_PROMPT "-> " 136 #define CONFIG_SYS_PROMPT "-> "
137 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 137 #define CONFIG_SYS_LONGHELP /* undef to save memory */
138 138
139 #ifdef CONFIG_CMD_KGDB 139 #ifdef CONFIG_CMD_KGDB
140 # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 140 # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
141 #else 141 #else
142 # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 142 # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
143 #endif 143 #endif
144 144
145 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 145 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
146 #define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */ 146 #define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */
147 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buf Sz */ 147 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buf Sz */
148 #define CONFIG_SYS_LOAD_ADDR 0x40010000 148 #define CONFIG_SYS_LOAD_ADDR 0x40010000
149 149
150 #define CONFIG_SYS_HZ 1000 150 #define CONFIG_SYS_HZ 1000
151 #define CONFIG_SYS_CLK 80000000 151 #define CONFIG_SYS_CLK 80000000
152 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3 152 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3
153 153
154 #define CONFIG_SYS_MBAR 0xFC000000 154 #define CONFIG_SYS_MBAR 0xFC000000
155 155
156 /* 156 /*
157 * Low Level Configuration Settings 157 * Low Level Configuration Settings
158 * (address mappings, register initial values, etc.) 158 * (address mappings, register initial values, etc.)
159 * You should know what you are doing if you make changes here. 159 * You should know what you are doing if you make changes here.
160 */ 160 */
161 /* 161 /*
162 * Definitions for initial stack pointer and data area (in DPRAM) 162 * Definitions for initial stack pointer and data area (in DPRAM)
163 */ 163 */
164 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 164 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
165 #define CONFIG_SYS_INIT_RAM_END 0x20000 /* End of used area in internal SRAM */ 165 #define CONFIG_SYS_INIT_RAM_END 0x20000 /* End of used area in internal SRAM */
166 #define CONFIG_SYS_INIT_RAM_CTRL 0x21 166 #define CONFIG_SYS_INIT_RAM_CTRL 0x21
167 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ 167 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
168 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 0x10) 168 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 0x10)
169 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 169 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
170 170
171 /* 171 /*
172 * Start addresses for the final memory configuration 172 * Start addresses for the final memory configuration
173 * (Set up by the startup code) 173 * (Set up by the startup code)
174 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 174 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
175 */ 175 */
176 #define CONFIG_SYS_SDRAM_BASE 0x40000000 176 #define CONFIG_SYS_SDRAM_BASE 0x40000000
177 #define CONFIG_SYS_SDRAM_SIZE 64 /* SDRAM size in MB */ 177 #define CONFIG_SYS_SDRAM_SIZE 64 /* SDRAM size in MB */
178 #define CONFIG_SYS_SDRAM_CFG1 0x43711630 178 #define CONFIG_SYS_SDRAM_CFG1 0x43711630
179 #define CONFIG_SYS_SDRAM_CFG2 0x56670000 179 #define CONFIG_SYS_SDRAM_CFG2 0x56670000
180 #define CONFIG_SYS_SDRAM_CTRL 0xE1002000 180 #define CONFIG_SYS_SDRAM_CTRL 0xE1002000
181 #define CONFIG_SYS_SDRAM_EMOD 0x80010000 181 #define CONFIG_SYS_SDRAM_EMOD 0x80010000
182 #define CONFIG_SYS_SDRAM_MODE 0x00CD0000 182 #define CONFIG_SYS_SDRAM_MODE 0x00CD0000
183 183
184 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 184 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400
185 #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) 185 #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
186 186
187 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 187 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
188 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ 188 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
189 189
190 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 190 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
191 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ 191 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
192 192
193 /* 193 /*
194 * For booting Linux, the board info and command line data 194 * For booting Linux, the board info and command line data
195 * have to be in the first 8 MB of memory, since this is 195 * have to be in the first 8 MB of memory, since this is
196 * the maximum mapped by the Linux kernel during initialization ?? 196 * the maximum mapped by the Linux kernel during initialization ??
197 */ 197 */
198 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 198 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
199 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
199 200
200 /*----------------------------------------------------------------------- 201 /*-----------------------------------------------------------------------
201 * FLASH organization 202 * FLASH organization
202 */ 203 */
203 #define CONFIG_SYS_FLASH_CFI 204 #define CONFIG_SYS_FLASH_CFI
204 #ifdef CONFIG_SYS_FLASH_CFI 205 #ifdef CONFIG_SYS_FLASH_CFI
205 # define CONFIG_FLASH_CFI_DRIVER 1 206 # define CONFIG_FLASH_CFI_DRIVER 1
206 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ 207 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */
207 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 208 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
208 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 209 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
209 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ 210 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
210 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ 211 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
211 #endif 212 #endif
212 213
213 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE 214 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
214 215
215 /* Configuration for environment 216 /* Configuration for environment
216 * Environment is embedded in u-boot in the second sector of the flash 217 * Environment is embedded in u-boot in the second sector of the flash
217 */ 218 */
218 #define CONFIG_ENV_OFFSET 0x8000 219 #define CONFIG_ENV_OFFSET 0x8000
219 #define CONFIG_ENV_SIZE 0x1000 220 #define CONFIG_ENV_SIZE 0x1000
220 #define CONFIG_ENV_SECT_SIZE 0x8000 221 #define CONFIG_ENV_SECT_SIZE 0x8000
221 #define CONFIG_ENV_IS_IN_FLASH 1 222 #define CONFIG_ENV_IS_IN_FLASH 1
222 223
223 /*----------------------------------------------------------------------- 224 /*-----------------------------------------------------------------------
224 * Cache Configuration 225 * Cache Configuration
225 */ 226 */
226 #define CONFIG_SYS_CACHELINE_SIZE 16 227 #define CONFIG_SYS_CACHELINE_SIZE 16
227 228
228 /*----------------------------------------------------------------------- 229 /*-----------------------------------------------------------------------
229 * Chipselect bank definitions 230 * Chipselect bank definitions
230 */ 231 */
231 /* 232 /*
232 * CS0 - NOR Flash 233 * CS0 - NOR Flash
233 * CS1 - Ext SRAM 234 * CS1 - Ext SRAM
234 * CS2 - Available 235 * CS2 - Available
235 * CS3 - Available 236 * CS3 - Available
236 * CS4 - Available 237 * CS4 - Available
237 * CS5 - Available 238 * CS5 - Available
238 */ 239 */
239 #define CONFIG_SYS_CS0_BASE 0 240 #define CONFIG_SYS_CS0_BASE 0
240 #define CONFIG_SYS_CS0_MASK 0x00FF0001 241 #define CONFIG_SYS_CS0_MASK 0x00FF0001
241 #define CONFIG_SYS_CS0_CTRL 0x00001FA0 242 #define CONFIG_SYS_CS0_CTRL 0x00001FA0
242 243
243 #define CONFIG_SYS_CS1_BASE 0xC0000000 244 #define CONFIG_SYS_CS1_BASE 0xC0000000
244 #define CONFIG_SYS_CS1_MASK 0x00070001 245 #define CONFIG_SYS_CS1_MASK 0x00070001
245 #define CONFIG_SYS_CS1_CTRL 0x00001FA0 246 #define CONFIG_SYS_CS1_CTRL 0x00001FA0
246 247
247 #endif /* _M53017EVB_H */ 248 #endif /* _M53017EVB_H */
248 249
include/configs/M5329EVB.h
Diff comments   View file @ d6e4baf
1 /* 1 /*
2 * Configuation settings for the Freescale MCF5329 FireEngine board. 2 * Configuation settings for the Freescale MCF5329 FireEngine board.
3 * 3 *
4 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. 4 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
6 * 6 *
7 * See file CREDITS for list of people who contributed to this 7 * See file CREDITS for list of people who contributed to this
8 * project. 8 * project.
9 * 9 *
10 * This program is free software; you can redistribute it and/or 10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as 11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of 12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version. 13 * the License, or (at your option) any later version.
14 * 14 *
15 * This program is distributed in the hope that it will be useful, 15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details. 18 * GNU General Public License for more details.
19 * 19 *
20 * You should have received a copy of the GNU General Public License 20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software 21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA 23 * MA 02111-1307 USA
24 */ 24 */
25 25
26 /* 26 /*
27 * board/config.h - configuration options, board specific 27 * board/config.h - configuration options, board specific
28 */ 28 */
29 29
30 #ifndef _M5329EVB_H 30 #ifndef _M5329EVB_H
31 #define _M5329EVB_H 31 #define _M5329EVB_H
32 32
33 /* 33 /*
34 * High Level Configuration Options 34 * High Level Configuration Options
35 * (easy to change) 35 * (easy to change)
36 */ 36 */
37 #define CONFIG_MCF532x /* define processor family */ 37 #define CONFIG_MCF532x /* define processor family */
38 #define CONFIG_M5329 /* define processor type */ 38 #define CONFIG_M5329 /* define processor type */
39 39
40 #define CONFIG_MCFUART 40 #define CONFIG_MCFUART
41 #define CONFIG_SYS_UART_PORT (0) 41 #define CONFIG_SYS_UART_PORT (0)
42 #define CONFIG_BAUDRATE 115200 42 #define CONFIG_BAUDRATE 115200
43 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } 43 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
44 44
45 #undef CONFIG_WATCHDOG 45 #undef CONFIG_WATCHDOG
46 #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ 46 #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
47 47
48 /* Command line configuration */ 48 /* Command line configuration */
49 #include <config_cmd_default.h> 49 #include <config_cmd_default.h>
50 50
51 #define CONFIG_CMD_CACHE 51 #define CONFIG_CMD_CACHE
52 #define CONFIG_CMD_DATE 52 #define CONFIG_CMD_DATE
53 #define CONFIG_CMD_ELF 53 #define CONFIG_CMD_ELF
54 #define CONFIG_CMD_FLASH 54 #define CONFIG_CMD_FLASH
55 #define CONFIG_CMD_I2C 55 #define CONFIG_CMD_I2C
56 #define CONFIG_CMD_MEMORY 56 #define CONFIG_CMD_MEMORY
57 #define CONFIG_CMD_MISC 57 #define CONFIG_CMD_MISC
58 #define CONFIG_CMD_MII 58 #define CONFIG_CMD_MII
59 #define CONFIG_CMD_NET 59 #define CONFIG_CMD_NET
60 #define CONFIG_CMD_PING 60 #define CONFIG_CMD_PING
61 #define CONFIG_CMD_REGINFO 61 #define CONFIG_CMD_REGINFO
62 62
63 #ifdef NANDFLASH_SIZE 63 #ifdef NANDFLASH_SIZE
64 # define CONFIG_CMD_NAND 64 # define CONFIG_CMD_NAND
65 #endif 65 #endif
66 66
67 #define CONFIG_SYS_UNIFY_CACHE 67 #define CONFIG_SYS_UNIFY_CACHE
68 68
69 #define CONFIG_MCFFEC 69 #define CONFIG_MCFFEC
70 #ifdef CONFIG_MCFFEC 70 #ifdef CONFIG_MCFFEC
71 # define CONFIG_NET_MULTI 1 71 # define CONFIG_NET_MULTI 1
72 # define CONFIG_MII 1 72 # define CONFIG_MII 1
73 # define CONFIG_MII_INIT 1 73 # define CONFIG_MII_INIT 1
74 # define CONFIG_SYS_DISCOVER_PHY 74 # define CONFIG_SYS_DISCOVER_PHY
75 # define CONFIG_SYS_RX_ETH_BUFFER 8 75 # define CONFIG_SYS_RX_ETH_BUFFER 8
76 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 76 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
77 77
78 # define CONFIG_SYS_FEC0_PINMUX 0 78 # define CONFIG_SYS_FEC0_PINMUX 0
79 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 79 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
80 # define MCFFEC_TOUT_LOOP 50000 80 # define MCFFEC_TOUT_LOOP 50000
81 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 81 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
82 # ifndef CONFIG_SYS_DISCOVER_PHY 82 # ifndef CONFIG_SYS_DISCOVER_PHY
83 # define FECDUPLEX FULL 83 # define FECDUPLEX FULL
84 # define FECSPEED _100BASET 84 # define FECSPEED _100BASET
85 # else 85 # else
86 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 86 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
87 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 87 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
88 # endif 88 # endif
89 # endif /* CONFIG_SYS_DISCOVER_PHY */ 89 # endif /* CONFIG_SYS_DISCOVER_PHY */
90 #endif 90 #endif
91 91
92 #define CONFIG_MCFRTC 92 #define CONFIG_MCFRTC
93 #undef RTC_DEBUG 93 #undef RTC_DEBUG
94 94
95 /* Timer */ 95 /* Timer */
96 #define CONFIG_MCFTMR 96 #define CONFIG_MCFTMR
97 #undef CONFIG_MCFPIT 97 #undef CONFIG_MCFPIT
98 98
99 /* I2C */ 99 /* I2C */
100 #define CONFIG_FSL_I2C 100 #define CONFIG_FSL_I2C
101 #define CONFIG_HARD_I2C /* I2C with hw support */ 101 #define CONFIG_HARD_I2C /* I2C with hw support */
102 #undef CONFIG_SOFT_I2C /* I2C bit-banged */ 102 #undef CONFIG_SOFT_I2C /* I2C bit-banged */
103 #define CONFIG_SYS_I2C_SPEED 80000 103 #define CONFIG_SYS_I2C_SPEED 80000
104 #define CONFIG_SYS_I2C_SLAVE 0x7F 104 #define CONFIG_SYS_I2C_SLAVE 0x7F
105 #define CONFIG_SYS_I2C_OFFSET 0x58000 105 #define CONFIG_SYS_I2C_OFFSET 0x58000
106 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 106 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
107 107
108 #define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */ 108 #define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */
109 #define CONFIG_UDP_CHECKSUM 109 #define CONFIG_UDP_CHECKSUM
110 110
111 #ifdef CONFIG_MCFFEC 111 #ifdef CONFIG_MCFFEC
112 # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 112 # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
113 # define CONFIG_IPADDR 192.162.1.2 113 # define CONFIG_IPADDR 192.162.1.2
114 # define CONFIG_NETMASK 255.255.255.0 114 # define CONFIG_NETMASK 255.255.255.0
115 # define CONFIG_SERVERIP 192.162.1.1 115 # define CONFIG_SERVERIP 192.162.1.1
116 # define CONFIG_GATEWAYIP 192.162.1.1 116 # define CONFIG_GATEWAYIP 192.162.1.1
117 # define CONFIG_OVERWRITE_ETHADDR_ONCE 117 # define CONFIG_OVERWRITE_ETHADDR_ONCE
118 #endif /* FEC_ENET */ 118 #endif /* FEC_ENET */
119 119
120 #define CONFIG_HOSTNAME M5329EVB 120 #define CONFIG_HOSTNAME M5329EVB
121 #define CONFIG_EXTRA_ENV_SETTINGS \ 121 #define CONFIG_EXTRA_ENV_SETTINGS \
122 "netdev=eth0\0" \ 122 "netdev=eth0\0" \
123 "loadaddr=40010000\0" \ 123 "loadaddr=40010000\0" \
124 "u-boot=u-boot.bin\0" \ 124 "u-boot=u-boot.bin\0" \
125 "load=tftp ${loadaddr) ${u-boot}\0" \ 125 "load=tftp ${loadaddr) ${u-boot}\0" \
126 "upd=run load; run prog\0" \ 126 "upd=run load; run prog\0" \
127 "prog=prot off 0 2ffff;" \ 127 "prog=prot off 0 2ffff;" \
128 "era 0 2ffff;" \ 128 "era 0 2ffff;" \
129 "cp.b ${loadaddr} 0 ${filesize};" \ 129 "cp.b ${loadaddr} 0 ${filesize};" \
130 "save\0" \ 130 "save\0" \
131 "" 131 ""
132 132
133 #define CONFIG_PRAM 512 /* 512 KB */ 133 #define CONFIG_PRAM 512 /* 512 KB */
134 #define CONFIG_SYS_PROMPT "-> " 134 #define CONFIG_SYS_PROMPT "-> "
135 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 135 #define CONFIG_SYS_LONGHELP /* undef to save memory */
136 136
137 #ifdef CONFIG_CMD_KGDB 137 #ifdef CONFIG_CMD_KGDB
138 # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 138 # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
139 #else 139 #else
140 # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 140 # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
141 #endif 141 #endif
142 142
143 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 143 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
144 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 144 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
145 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 145 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
146 #define CONFIG_SYS_LOAD_ADDR 0x40010000 146 #define CONFIG_SYS_LOAD_ADDR 0x40010000
147 147
148 #define CONFIG_SYS_HZ 1000 148 #define CONFIG_SYS_HZ 1000
149 #define CONFIG_SYS_CLK 80000000 149 #define CONFIG_SYS_CLK 80000000
150 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3 150 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3
151 151
152 #define CONFIG_SYS_MBAR 0xFC000000 152 #define CONFIG_SYS_MBAR 0xFC000000
153 153
154 #define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000) 154 #define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000)
155 155
156 /* 156 /*
157 * Low Level Configuration Settings 157 * Low Level Configuration Settings
158 * (address mappings, register initial values, etc.) 158 * (address mappings, register initial values, etc.)
159 * You should know what you are doing if you make changes here. 159 * You should know what you are doing if you make changes here.
160 */ 160 */
161 /*----------------------------------------------------------------------- 161 /*-----------------------------------------------------------------------
162 * Definitions for initial stack pointer and data area (in DPRAM) 162 * Definitions for initial stack pointer and data area (in DPRAM)
163 */ 163 */
164 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 164 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
165 #define CONFIG_SYS_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */ 165 #define CONFIG_SYS_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */
166 #define CONFIG_SYS_INIT_RAM_CTRL 0x221 166 #define CONFIG_SYS_INIT_RAM_CTRL 0x221
167 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ 167 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
168 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 0x10) 168 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 0x10)
169 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 169 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
170 170
171 /*----------------------------------------------------------------------- 171 /*-----------------------------------------------------------------------
172 * Start addresses for the final memory configuration 172 * Start addresses for the final memory configuration
173 * (Set up by the startup code) 173 * (Set up by the startup code)
174 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 174 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
175 */ 175 */
176 #define CONFIG_SYS_SDRAM_BASE 0x40000000 176 #define CONFIG_SYS_SDRAM_BASE 0x40000000
177 #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ 177 #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
178 #define CONFIG_SYS_SDRAM_CFG1 0x53722730 178 #define CONFIG_SYS_SDRAM_CFG1 0x53722730
179 #define CONFIG_SYS_SDRAM_CFG2 0x56670000 179 #define CONFIG_SYS_SDRAM_CFG2 0x56670000
180 #define CONFIG_SYS_SDRAM_CTRL 0xE1092000 180 #define CONFIG_SYS_SDRAM_CTRL 0xE1092000
181 #define CONFIG_SYS_SDRAM_EMOD 0x40010000 181 #define CONFIG_SYS_SDRAM_EMOD 0x40010000
182 #define CONFIG_SYS_SDRAM_MODE 0x018D0000 182 #define CONFIG_SYS_SDRAM_MODE 0x018D0000
183 183
184 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 184 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400
185 #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) 185 #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
186 186
187 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 187 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
188 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ 188 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
189 189
190 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 190 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
191 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ 191 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
192 192
193 /* 193 /*
194 * For booting Linux, the board info and command line data 194 * For booting Linux, the board info and command line data
195 * have to be in the first 8 MB of memory, since this is 195 * have to be in the first 8 MB of memory, since this is
196 * the maximum mapped by the Linux kernel during initialization ?? 196 * the maximum mapped by the Linux kernel during initialization ??
197 */ 197 */
198 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 198 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
199 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
199 200
200 /*----------------------------------------------------------------------- 201 /*-----------------------------------------------------------------------
201 * FLASH organization 202 * FLASH organization
202 */ 203 */
203 #define CONFIG_SYS_FLASH_CFI 204 #define CONFIG_SYS_FLASH_CFI
204 #ifdef CONFIG_SYS_FLASH_CFI 205 #ifdef CONFIG_SYS_FLASH_CFI
205 # define CONFIG_FLASH_CFI_DRIVER 1 206 # define CONFIG_FLASH_CFI_DRIVER 1
206 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ 207 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */
207 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 208 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
208 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 209 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
209 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ 210 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
210 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ 211 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
211 #endif 212 #endif
212 213
213 #ifdef NANDFLASH_SIZE 214 #ifdef NANDFLASH_SIZE
214 # define CONFIG_SYS_MAX_NAND_DEVICE 1 215 # define CONFIG_SYS_MAX_NAND_DEVICE 1
215 # define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE 216 # define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE
216 # define CONFIG_SYS_NAND_SIZE 1 217 # define CONFIG_SYS_NAND_SIZE 1
217 # define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } 218 # define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
218 # define NAND_ALLOW_ERASE_ALL 1 219 # define NAND_ALLOW_ERASE_ALL 1
219 # define CONFIG_JFFS2_NAND 1 220 # define CONFIG_JFFS2_NAND 1
220 # define CONFIG_JFFS2_DEV "nand0" 221 # define CONFIG_JFFS2_DEV "nand0"
221 # define CONFIG_JFFS2_PART_SIZE (CONFIG_SYS_CS2_MASK & ~1) 222 # define CONFIG_JFFS2_PART_SIZE (CONFIG_SYS_CS2_MASK & ~1)
222 # define CONFIG_JFFS2_PART_OFFSET 0x00000000 223 # define CONFIG_JFFS2_PART_OFFSET 0x00000000
223 #endif 224 #endif
224 225
225 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE 226 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
226 227
227 /* Configuration for environment 228 /* Configuration for environment
228 * Environment is embedded in u-boot in the second sector of the flash 229 * Environment is embedded in u-boot in the second sector of the flash
229 */ 230 */
230 #define CONFIG_ENV_OFFSET 0x4000 231 #define CONFIG_ENV_OFFSET 0x4000
231 #define CONFIG_ENV_SECT_SIZE 0x2000 232 #define CONFIG_ENV_SECT_SIZE 0x2000
232 #define CONFIG_ENV_IS_IN_FLASH 1 233 #define CONFIG_ENV_IS_IN_FLASH 1
233 #define CONFIG_ENV_IS_EMBEDDED 1 234 #define CONFIG_ENV_IS_EMBEDDED 1
234 235
235 /*----------------------------------------------------------------------- 236 /*-----------------------------------------------------------------------
236 * Cache Configuration 237 * Cache Configuration
237 */ 238 */
238 #define CONFIG_SYS_CACHELINE_SIZE 16 239 #define CONFIG_SYS_CACHELINE_SIZE 16
239 240
240 /*----------------------------------------------------------------------- 241 /*-----------------------------------------------------------------------
241 * Chipselect bank definitions 242 * Chipselect bank definitions
242 */ 243 */
243 /* 244 /*
244 * CS0 - NOR Flash 1, 2, 4, or 8MB 245 * CS0 - NOR Flash 1, 2, 4, or 8MB
245 * CS1 - CompactFlash and registers 246 * CS1 - CompactFlash and registers
246 * CS2 - NAND Flash 16, 32, or 64MB 247 * CS2 - NAND Flash 16, 32, or 64MB
247 * CS3 - Available 248 * CS3 - Available
248 * CS4 - Available 249 * CS4 - Available
249 * CS5 - Available 250 * CS5 - Available
250 */ 251 */
251 #define CONFIG_SYS_CS0_BASE 0 252 #define CONFIG_SYS_CS0_BASE 0
252 #define CONFIG_SYS_CS0_MASK 0x007f0001 253 #define CONFIG_SYS_CS0_MASK 0x007f0001
253 #define CONFIG_SYS_CS0_CTRL 0x00001fa0 254 #define CONFIG_SYS_CS0_CTRL 0x00001fa0
254 255
255 #define CONFIG_SYS_CS1_BASE 0x10000000 256 #define CONFIG_SYS_CS1_BASE 0x10000000
256 #define CONFIG_SYS_CS1_MASK 0x001f0001 257 #define CONFIG_SYS_CS1_MASK 0x001f0001
257 #define CONFIG_SYS_CS1_CTRL 0x002A3780 258 #define CONFIG_SYS_CS1_CTRL 0x002A3780
258 259
259 #ifdef NANDFLASH_SIZE 260 #ifdef NANDFLASH_SIZE
260 #define CONFIG_SYS_CS2_BASE 0x20000000 261 #define CONFIG_SYS_CS2_BASE 0x20000000
261 #define CONFIG_SYS_CS2_MASK ((NANDFLASH_SIZE << 20) | 1) 262 #define CONFIG_SYS_CS2_MASK ((NANDFLASH_SIZE << 20) | 1)
262 #define CONFIG_SYS_CS2_CTRL 0x00001f60 263 #define CONFIG_SYS_CS2_CTRL 0x00001f60
263 #endif 264 #endif
264 265
265 #endif /* _M5329EVB_H */ 266 #endif /* _M5329EVB_H */
266 267
include/configs/M5373EVB.h
Diff comments   View file @ d6e4baf
1 /* 1 /*
2 * Configuation settings for the Freescale MCF5373 FireEngine board. 2 * Configuation settings for the Freescale MCF5373 FireEngine board.
3 * 3 *
4 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. 4 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
6 * 6 *
7 * See file CREDITS for list of people who contributed to this 7 * See file CREDITS for list of people who contributed to this
8 * project. 8 * project.
9 * 9 *
10 * This program is free software; you can redistribute it and/or 10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as 11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of 12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version. 13 * the License, or (at your option) any later version.
14 * 14 *
15 * This program is distributed in the hope that it will be useful, 15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details. 18 * GNU General Public License for more details.
19 * 19 *
20 * You should have received a copy of the GNU General Public License 20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software 21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA 23 * MA 02111-1307 USA
24 */ 24 */
25 25
26 /* 26 /*
27 * board/config.h - configuration options, board specific 27 * board/config.h - configuration options, board specific
28 */ 28 */
29 29
30 #ifndef _M5373EVB_H 30 #ifndef _M5373EVB_H
31 #define _M5373EVB_H 31 #define _M5373EVB_H
32 32
33 /* 33 /*
34 * High Level Configuration Options 34 * High Level Configuration Options
35 * (easy to change) 35 * (easy to change)
36 */ 36 */
37 #define CONFIG_MCF532x /* define processor family */ 37 #define CONFIG_MCF532x /* define processor family */
38 #define CONFIG_M5373 /* define processor type */ 38 #define CONFIG_M5373 /* define processor type */
39 39
40 #define CONFIG_MCFUART 40 #define CONFIG_MCFUART
41 #define CONFIG_SYS_UART_PORT (0) 41 #define CONFIG_SYS_UART_PORT (0)
42 #define CONFIG_BAUDRATE 115200 42 #define CONFIG_BAUDRATE 115200
43 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } 43 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
44 44
45 #undef CONFIG_WATCHDOG 45 #undef CONFIG_WATCHDOG
46 #define CONFIG_WATCHDOG_TIMEOUT 3360 /* timeout in ms, max is 3.36 sec */ 46 #define CONFIG_WATCHDOG_TIMEOUT 3360 /* timeout in ms, max is 3.36 sec */
47 47
48 /* Command line configuration */ 48 /* Command line configuration */
49 #include <config_cmd_default.h> 49 #include <config_cmd_default.h>
50 50
51 #define CONFIG_CMD_CACHE 51 #define CONFIG_CMD_CACHE
52 #define CONFIG_CMD_DATE 52 #define CONFIG_CMD_DATE
53 #define CONFIG_CMD_ELF 53 #define CONFIG_CMD_ELF
54 #define CONFIG_CMD_FLASH 54 #define CONFIG_CMD_FLASH
55 #define CONFIG_CMD_I2C 55 #define CONFIG_CMD_I2C
56 #define CONFIG_CMD_MEMORY 56 #define CONFIG_CMD_MEMORY
57 #define CONFIG_CMD_MISC 57 #define CONFIG_CMD_MISC
58 #define CONFIG_CMD_MII 58 #define CONFIG_CMD_MII
59 #define CONFIG_CMD_NET 59 #define CONFIG_CMD_NET
60 #define CONFIG_CMD_PING 60 #define CONFIG_CMD_PING
61 #define CONFIG_CMD_REGINFO 61 #define CONFIG_CMD_REGINFO
62 62
63 #ifdef NANDFLASH_SIZE 63 #ifdef NANDFLASH_SIZE
64 # define CONFIG_CMD_NAND 64 # define CONFIG_CMD_NAND
65 #endif 65 #endif
66 66
67 #define CONFIG_SYS_UNIFY_CACHE 67 #define CONFIG_SYS_UNIFY_CACHE
68 68
69 #define CONFIG_MCFFEC 69 #define CONFIG_MCFFEC
70 #ifdef CONFIG_MCFFEC 70 #ifdef CONFIG_MCFFEC
71 # define CONFIG_NET_MULTI 1 71 # define CONFIG_NET_MULTI 1
72 # define CONFIG_MII 1 72 # define CONFIG_MII 1
73 # define CONFIG_MII_INIT 1 73 # define CONFIG_MII_INIT 1
74 # define CONFIG_SYS_DISCOVER_PHY 74 # define CONFIG_SYS_DISCOVER_PHY
75 # define CONFIG_SYS_RX_ETH_BUFFER 8 75 # define CONFIG_SYS_RX_ETH_BUFFER 8
76 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 76 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
77 77
78 # define CONFIG_SYS_FEC0_PINMUX 0 78 # define CONFIG_SYS_FEC0_PINMUX 0
79 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 79 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
80 # define MCFFEC_TOUT_LOOP 50000 80 # define MCFFEC_TOUT_LOOP 50000
81 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 81 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
82 # ifndef CONFIG_SYS_DISCOVER_PHY 82 # ifndef CONFIG_SYS_DISCOVER_PHY
83 # define FECDUPLEX FULL 83 # define FECDUPLEX FULL
84 # define FECSPEED _100BASET 84 # define FECSPEED _100BASET
85 # else 85 # else
86 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 86 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
87 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 87 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
88 # endif 88 # endif
89 # endif /* CONFIG_SYS_DISCOVER_PHY */ 89 # endif /* CONFIG_SYS_DISCOVER_PHY */
90 #endif 90 #endif
91 91
92 #define CONFIG_MCFRTC 92 #define CONFIG_MCFRTC
93 #undef RTC_DEBUG 93 #undef RTC_DEBUG
94 94
95 /* Timer */ 95 /* Timer */
96 #define CONFIG_MCFTMR 96 #define CONFIG_MCFTMR
97 #undef CONFIG_MCFPIT 97 #undef CONFIG_MCFPIT
98 98
99 /* I2C */ 99 /* I2C */
100 #define CONFIG_FSL_I2C 100 #define CONFIG_FSL_I2C
101 #define CONFIG_HARD_I2C /* I2C with hw support */ 101 #define CONFIG_HARD_I2C /* I2C with hw support */
102 #undef CONFIG_SOFT_I2C /* I2C bit-banged */ 102 #undef CONFIG_SOFT_I2C /* I2C bit-banged */
103 #define CONFIG_SYS_I2C_SPEED 80000 103 #define CONFIG_SYS_I2C_SPEED 80000
104 #define CONFIG_SYS_I2C_SLAVE 0x7F 104 #define CONFIG_SYS_I2C_SLAVE 0x7F
105 #define CONFIG_SYS_I2C_OFFSET 0x58000 105 #define CONFIG_SYS_I2C_OFFSET 0x58000
106 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 106 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
107 107
108 #define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */ 108 #define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */
109 #define CONFIG_UDP_CHECKSUM 109 #define CONFIG_UDP_CHECKSUM
110 110
111 #ifdef CONFIG_MCFFEC 111 #ifdef CONFIG_MCFFEC
112 # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 112 # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
113 # define CONFIG_IPADDR 192.162.1.2 113 # define CONFIG_IPADDR 192.162.1.2
114 # define CONFIG_NETMASK 255.255.255.0 114 # define CONFIG_NETMASK 255.255.255.0
115 # define CONFIG_SERVERIP 192.162.1.1 115 # define CONFIG_SERVERIP 192.162.1.1
116 # define CONFIG_GATEWAYIP 192.162.1.1 116 # define CONFIG_GATEWAYIP 192.162.1.1
117 # define CONFIG_OVERWRITE_ETHADDR_ONCE 117 # define CONFIG_OVERWRITE_ETHADDR_ONCE
118 #endif /* FEC_ENET */ 118 #endif /* FEC_ENET */
119 119
120 #define CONFIG_HOSTNAME M5373EVB 120 #define CONFIG_HOSTNAME M5373EVB
121 #define CONFIG_EXTRA_ENV_SETTINGS \ 121 #define CONFIG_EXTRA_ENV_SETTINGS \
122 "netdev=eth0\0" \ 122 "netdev=eth0\0" \
123 "loadaddr=" MK_STR(CONFIG_SYS_LOAD_ADDR) "\0" \ 123 "loadaddr=" MK_STR(CONFIG_SYS_LOAD_ADDR) "\0" \
124 "u-boot=u-boot.bin\0" \ 124 "u-boot=u-boot.bin\0" \
125 "load=tftp ${loadaddr) ${u-boot}\0" \ 125 "load=tftp ${loadaddr) ${u-boot}\0" \
126 "upd=run load; run prog\0" \ 126 "upd=run load; run prog\0" \
127 "prog=prot off 0 2ffff;" \ 127 "prog=prot off 0 2ffff;" \
128 "era 0 2ffff;" \ 128 "era 0 2ffff;" \
129 "cp.b ${loadaddr} 0 ${filesize};" \ 129 "cp.b ${loadaddr} 0 ${filesize};" \
130 "save\0" \ 130 "save\0" \
131 "" 131 ""
132 132
133 #define CONFIG_PRAM 512 /* 512 KB */ 133 #define CONFIG_PRAM 512 /* 512 KB */
134 #define CONFIG_SYS_PROMPT "-> " 134 #define CONFIG_SYS_PROMPT "-> "
135 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 135 #define CONFIG_SYS_LONGHELP /* undef to save memory */
136 136
137 #ifdef CONFIG_CMD_KGDB 137 #ifdef CONFIG_CMD_KGDB
138 # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 138 # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
139 #else 139 #else
140 # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 140 # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
141 #endif 141 #endif
142 142
143 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 143 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
144 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 144 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
145 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 145 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
146 #define CONFIG_SYS_LOAD_ADDR 0x40010000 146 #define CONFIG_SYS_LOAD_ADDR 0x40010000
147 147
148 #define CONFIG_SYS_HZ 1000 148 #define CONFIG_SYS_HZ 1000
149 #define CONFIG_SYS_CLK 80000000 149 #define CONFIG_SYS_CLK 80000000
150 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3 150 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3
151 151
152 #define CONFIG_SYS_MBAR 0xFC000000 152 #define CONFIG_SYS_MBAR 0xFC000000
153 153
154 #define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000) 154 #define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000)
155 155
156 /* 156 /*
157 * Low Level Configuration Settings 157 * Low Level Configuration Settings
158 * (address mappings, register initial values, etc.) 158 * (address mappings, register initial values, etc.)
159 * You should know what you are doing if you make changes here. 159 * You should know what you are doing if you make changes here.
160 */ 160 */
161 /*----------------------------------------------------------------------- 161 /*-----------------------------------------------------------------------
162 * Definitions for initial stack pointer and data area (in DPRAM) 162 * Definitions for initial stack pointer and data area (in DPRAM)
163 */ 163 */
164 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 164 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
165 #define CONFIG_SYS_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */ 165 #define CONFIG_SYS_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */
166 #define CONFIG_SYS_INIT_RAM_CTRL 0x221 166 #define CONFIG_SYS_INIT_RAM_CTRL 0x221
167 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ 167 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
168 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 0x10) 168 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 0x10)
169 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 169 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
170 170
171 /*----------------------------------------------------------------------- 171 /*-----------------------------------------------------------------------
172 * Start addresses for the final memory configuration 172 * Start addresses for the final memory configuration
173 * (Set up by the startup code) 173 * (Set up by the startup code)
174 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 174 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
175 */ 175 */
176 #define CONFIG_SYS_SDRAM_BASE 0x40000000 176 #define CONFIG_SYS_SDRAM_BASE 0x40000000
177 #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ 177 #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
178 #define CONFIG_SYS_SDRAM_CFG1 0x53722730 178 #define CONFIG_SYS_SDRAM_CFG1 0x53722730
179 #define CONFIG_SYS_SDRAM_CFG2 0x56670000 179 #define CONFIG_SYS_SDRAM_CFG2 0x56670000
180 #define CONFIG_SYS_SDRAM_CTRL 0xE1092000 180 #define CONFIG_SYS_SDRAM_CTRL 0xE1092000
181 #define CONFIG_SYS_SDRAM_EMOD 0x40010000 181 #define CONFIG_SYS_SDRAM_EMOD 0x40010000
182 #define CONFIG_SYS_SDRAM_MODE 0x018D0000 182 #define CONFIG_SYS_SDRAM_MODE 0x018D0000
183 183
184 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 184 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400
185 #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) 185 #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
186 186
187 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 187 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
188 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ 188 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
189 189
190 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 190 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
191 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ 191 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
192 192
193 /* 193 /*
194 * For booting Linux, the board info and command line data 194 * For booting Linux, the board info and command line data
195 * have to be in the first 8 MB of memory, since this is 195 * have to be in the first 8 MB of memory, since this is
196 * the maximum mapped by the Linux kernel during initialization ?? 196 * the maximum mapped by the Linux kernel during initialization ??
197 */ 197 */
198 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 198 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
199 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
199 200
200 /*----------------------------------------------------------------------- 201 /*-----------------------------------------------------------------------
201 * FLASH organization 202 * FLASH organization
202 */ 203 */
203 #define CONFIG_SYS_FLASH_CFI 204 #define CONFIG_SYS_FLASH_CFI
204 #ifdef CONFIG_SYS_FLASH_CFI 205 #ifdef CONFIG_SYS_FLASH_CFI
205 # define CONFIG_FLASH_CFI_DRIVER 1 206 # define CONFIG_FLASH_CFI_DRIVER 1
206 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ 207 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */
207 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 208 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
208 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 209 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
209 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ 210 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
210 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ 211 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
211 #endif 212 #endif
212 213
213 #ifdef NANDFLASH_SIZE 214 #ifdef NANDFLASH_SIZE
214 # define CONFIG_SYS_MAX_NAND_DEVICE 1 215 # define CONFIG_SYS_MAX_NAND_DEVICE 1
215 # define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE 216 # define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE
216 # define CONFIG_SYS_NAND_SIZE 1 217 # define CONFIG_SYS_NAND_SIZE 1
217 # define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } 218 # define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
218 # define NAND_ALLOW_ERASE_ALL 1 219 # define NAND_ALLOW_ERASE_ALL 1
219 # define CONFIG_JFFS2_NAND 1 220 # define CONFIG_JFFS2_NAND 1
220 # define CONFIG_JFFS2_DEV "nand0" 221 # define CONFIG_JFFS2_DEV "nand0"
221 # define CONFIG_JFFS2_PART_SIZE (CONFIG_SYS_CS2_MASK & ~1) 222 # define CONFIG_JFFS2_PART_SIZE (CONFIG_SYS_CS2_MASK & ~1)
222 # define CONFIG_JFFS2_PART_OFFSET 0x00000000 223 # define CONFIG_JFFS2_PART_OFFSET 0x00000000
223 #endif 224 #endif
224 225
225 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE 226 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
226 227
227 /* Configuration for environment 228 /* Configuration for environment
228 * Environment is embedded in u-boot in the second sector of the flash 229 * Environment is embedded in u-boot in the second sector of the flash
229 */ 230 */
230 #define CONFIG_ENV_OFFSET 0x4000 231 #define CONFIG_ENV_OFFSET 0x4000
231 #define CONFIG_ENV_SECT_SIZE 0x2000 232 #define CONFIG_ENV_SECT_SIZE 0x2000
232 #define CONFIG_ENV_IS_IN_FLASH 1 233 #define CONFIG_ENV_IS_IN_FLASH 1
233 #define CONFIG_ENV_IS_EMBEDDED 1 234 #define CONFIG_ENV_IS_EMBEDDED 1
234 235
235 /*----------------------------------------------------------------------- 236 /*-----------------------------------------------------------------------
236 * Cache Configuration 237 * Cache Configuration
237 */ 238 */
238 #define CONFIG_SYS_CACHELINE_SIZE 16 239 #define CONFIG_SYS_CACHELINE_SIZE 16
239 240
240 /*----------------------------------------------------------------------- 241 /*-----------------------------------------------------------------------
241 * Chipselect bank definitions 242 * Chipselect bank definitions
242 */ 243 */
243 /* 244 /*
244 * CS0 - NOR Flash 1, 2, 4, or 8MB 245 * CS0 - NOR Flash 1, 2, 4, or 8MB
245 * CS1 - CompactFlash and registers 246 * CS1 - CompactFlash and registers
246 * CS2 - NAND Flash 16, 32, or 64MB 247 * CS2 - NAND Flash 16, 32, or 64MB
247 * CS3 - Available 248 * CS3 - Available
248 * CS4 - Available 249 * CS4 - Available
249 * CS5 - Available 250 * CS5 - Available
250 */ 251 */
251 #define CONFIG_SYS_CS0_BASE 0 252 #define CONFIG_SYS_CS0_BASE 0
252 #define CONFIG_SYS_CS0_MASK 0x007f0001 253 #define CONFIG_SYS_CS0_MASK 0x007f0001
253 #define CONFIG_SYS_CS0_CTRL 0x00001fa0 254 #define CONFIG_SYS_CS0_CTRL 0x00001fa0
254 255
255 #define CONFIG_SYS_CS1_BASE 0x10000000 256 #define CONFIG_SYS_CS1_BASE 0x10000000
256 #define CONFIG_SYS_CS1_MASK 0x001f0001 257 #define CONFIG_SYS_CS1_MASK 0x001f0001
257 #define CONFIG_SYS_CS1_CTRL 0x002A3780 258 #define CONFIG_SYS_CS1_CTRL 0x002A3780
258 259
259 #ifdef NANDFLASH_SIZE 260 #ifdef NANDFLASH_SIZE
260 #define CONFIG_SYS_CS2_BASE 0x20000000 261 #define CONFIG_SYS_CS2_BASE 0x20000000
261 #define CONFIG_SYS_CS2_MASK ((NANDFLASH_SIZE << 20) | 1) 262 #define CONFIG_SYS_CS2_MASK ((NANDFLASH_SIZE << 20) | 1)
262 #define CONFIG_SYS_CS2_CTRL 0x00001f60 263 #define CONFIG_SYS_CS2_CTRL 0x00001f60
263 #endif 264 #endif
264 265
265 #endif /* _M5373EVB_H */ 266 #endif /* _M5373EVB_H */
266 267