Eric Lee / smarc-uboot | Embedian Git Server

Commit dd058bca4a30fff27bcd643575b2935c706d021b

Authored by Breno Lima 2019-03-16 05:42:47 +0800

Committed by Ye Li 2019-04-10 09:33:07 +0800

Exists in smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga and in 4 other branches

MLK-21174 mx7ulp: hab: Add hab_status command for HABv4 M4 boot

When booting in low power or dual boot modes the M4 binary is
authenticated by the M4 ROM code.

Add an option in hab_status command so users can retrieve M4 HAB
failure and warning events.

=> hab_status m4

   Secure boot disabled

   HAB Configuration: 0xf0, HAB State: 0x66
   No HAB Events Found!

Add command documentation in mx6_mx7_secure_boot.txt guide.

As HAB M4 API cannot be called from A7 core the code is parsing
the M4 HAB persistent memory region. The HAB persistent memory
stores HAB events, public keys and others HAB related information.

The HAB persistent memory region addresses and sizes can be found
in AN12263 "HABv4 RVT Guidelines and Recommendations".

Reviewed-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
(cherry picked from commit 0efff16579fabcf57acb9c8857afac8fb58de355)

Showing 3 changed files with 139 additions and 0 deletions Inline Diff

arch/arm/include/asm/mach-imx/hab.h
arch/arm/mach-imx/hab.c
doc/imx/habv4/guides/mx6_mx7_secure_boot.txt

arch/arm/include/asm/mach-imx/hab.h

Diff comments View file @ dd058bc

 /*
  * Copyright (C) 2012-2015 Freescale Semiconductor, Inc. All Rights Reserved.
  *
  * SPDX-License-Identifier:    GPL-2.0+
  *
 */
 #ifndef __SECURE_MX6Q_H__
 #define __SECURE_MX6Q_H__
 #include <linux/types.h>
 #include <linux/compiler.h>
 /*
  * IVT header definitions
  * Security Reference Manual for i.MX 7Dual and 7Solo Applications Processors,
  * Rev. 0, 03/2017
  * Section : 6.7.1.1
  */
 #define IVT_HEADER_MAGIC	0xD1
 #define IVT_TOTAL_LENGTH	0x20
 #define IVT_HEADER_V1		0x40
 #define IVT_HEADER_V2		0x41
 struct __packed ivt_header {
 	uint8_t		magic;
 	uint16_t	length;
 	uint8_t		version;
 };
 struct ivt {
 	struct ivt_header hdr;	/* IVT header above */
 	uint32_t entry;		/* Absolute address of first instruction */
 	uint32_t reserved1;	/* Reserved should be zero */
 	uint32_t dcd;		/* Absolute address of the image DCD */
 	uint32_t boot;		/* Absolute address of the boot data */
 	uint32_t self;		/* Absolute address of the IVT */
 	uint32_t csf;		/* Absolute address of the CSF */
 	uint32_t reserved2;	/* Reserved should be zero */
 };
 struct __packed hab_hdr {
 	u8 tag;              /* Tag field */
 	u8 len[2];           /* Length field in bytes (big-endian) */
 	u8 par;              /* Parameters field */
 };
+/* Default event structure */
+struct __packed evt_def {
+	struct hab_hdr hdr;		/* Header */
+	uint32_t sts;			/* Status */
+	uint32_t ctx;			/* Default context */
+	uint8_t *data;			/* Default data location */
+	size_t bytes;			/* Size of default data */
+};
 /* -------- start of HAB API updates ------------*/
 /* The following are taken from HAB4 SIS */
 /* Status definitions */
 enum hab_status {
 	HAB_STS_ANY = 0x00,
 	HAB_FAILURE = 0x33,
 	HAB_WARNING = 0x69,
 	HAB_SUCCESS = 0xf0
 };
 /* Security Configuration definitions */
 enum hab_config {
 	HAB_CFG_RETURN = 0x33,	/* < Field Return IC */
 	HAB_CFG_OPEN = 0xf0,	/* < Non-secure IC */
 	HAB_CFG_CLOSED = 0xcc	/* < Secure IC */
 };
 /* State definitions */
 enum hab_state {
 	HAB_STATE_INITIAL = 0x33,	/* Initialising state (transitory) */
 	HAB_STATE_CHECK = 0x55,		/* Check state (non-secure) */
 	HAB_STATE_NONSECURE = 0x66,	/* Non-secure state */
 	HAB_STATE_TRUSTED = 0x99,	/* Trusted state */
 	HAB_STATE_SECURE = 0xaa,	/* Secure state */
 	HAB_STATE_FAIL_SOFT = 0xcc, /* Soft fail state */
 	HAB_STATE_FAIL_HARD = 0xff, /* Hard fail state (terminal) */
 	HAB_STATE_NONE = 0xf0,		/* No security state machine */
 	HAB_STATE_MAX
 };
 enum hab_reason {
 	HAB_RSN_ANY = 0x00,			/* Match any reason */
 	HAB_ENG_FAIL = 0x30,		/* Engine failure */
 	HAB_INV_ADDRESS = 0x22,		/* Invalid address: access denied */
 	HAB_INV_ASSERTION = 0x0c,   /* Invalid assertion */
 	HAB_INV_CALL = 0x28,		/* Function called out of sequence */
 	HAB_INV_CERTIFICATE = 0x21, /* Invalid certificate */
 	HAB_INV_COMMAND = 0x06,     /* Invalid command: command malformed */
 	HAB_INV_CSF = 0x11,			/* Invalid csf */
 	HAB_INV_DCD = 0x27,			/* Invalid dcd */
 	HAB_INV_INDEX = 0x0f,		/* Invalid index: access denied */
 	HAB_INV_IVT = 0x05,			/* Invalid ivt */
 	HAB_INV_KEY = 0x1d,			/* Invalid key */
 	HAB_INV_RETURN = 0x1e,		/* Failed callback function */
 	HAB_INV_SIGNATURE = 0x18,   /* Invalid signature */
 	HAB_INV_SIZE = 0x17,		/* Invalid data size */
 	HAB_MEM_FAIL = 0x2e,		/* Memory failure */
 	HAB_OVR_COUNT = 0x2b,		/* Expired poll count */
 	HAB_OVR_STORAGE = 0x2d,		/* Exhausted storage region */
 	HAB_UNS_ALGORITHM = 0x12,   /* Unsupported algorithm */
 	HAB_UNS_COMMAND = 0x03,		/* Unsupported command */
 	HAB_UNS_ENGINE = 0x0a,		/* Unsupported engine */
 	HAB_UNS_ITEM = 0x24,		/* Unsupported configuration item */
 	HAB_UNS_KEY = 0x1b,	        /* Unsupported key type/parameters */
 	HAB_UNS_PROTOCOL = 0x14,	/* Unsupported protocol */
 	HAB_UNS_STATE = 0x09,		/* Unsuitable state */
 	HAB_RSN_MAX
 };
 enum hab_context {
 	HAB_CTX_ANY = 0x00,			/* Match any context */
 	HAB_CTX_FAB = 0xff,		    /* Event logged in hab_fab_test() */
 	HAB_CTX_ENTRY = 0xe1,		/* Event logged in hab_rvt.entry() */
 	HAB_CTX_TARGET = 0x33,	    /* Event logged in hab_rvt.check_target() */
 	HAB_CTX_AUTHENTICATE = 0x0a,/* Logged in hab_rvt.authenticate_image() */
 	HAB_CTX_DCD = 0xdd,         /* Event logged in hab_rvt.run_dcd() */
 	HAB_CTX_CSF = 0xcf,         /* Event logged in hab_rvt.run_csf() */
 	HAB_CTX_COMMAND = 0xc0,     /* Event logged executing csf/dcd command */
 	HAB_CTX_AUT_DAT = 0xdb,		/* Authenticated data block */
 	HAB_CTX_ASSERT = 0xa0,		/* Event logged in hab_rvt.assert() */
 	HAB_CTX_EXIT = 0xee,		/* Event logged in hab_rvt.exit() */
 	HAB_CTX_MAX
 };
 enum hab_target {
 	HAB_TGT_MEMORY		= 0x0f,
 	HAB_TGT_PERIPHERAL	= 0xf0,
 	HAB_TGT_ANY		= 0x55,
 };
 struct imx_sec_config_fuse_t {
 	int bank;
 	int word;
 };
 #if defined(CONFIG_SECURE_BOOT)
 extern struct imx_sec_config_fuse_t const imx_sec_config_fuse;
 #endif
 /*Function prototype description*/
 typedef enum hab_status hab_rvt_report_event_t(enum hab_status, uint32_t,
 		uint8_t* , size_t*);
 typedef enum hab_status hab_rvt_report_status_t(enum hab_config *,
 		enum hab_state *);
 typedef enum hab_status hab_loader_callback_f_t(void**, size_t*, const void*);
 typedef enum hab_status hab_rvt_entry_t(void);
 typedef enum hab_status hab_rvt_exit_t(void);
 typedef void *hab_rvt_authenticate_image_t(uint8_t, ptrdiff_t,
 		void **, size_t *, hab_loader_callback_f_t);
 typedef enum hab_status hab_rvt_check_target_t(enum hab_target, const void *,
 					       size_t);
 typedef void hab_rvt_failsafe_t(void);
 typedef void hapi_clock_init_t(void);
 #define HAB_ENG_ANY		0x00   /* Select first compatible engine */
 #define HAB_ENG_SCC		0x03   /* Security controller */
 #define HAB_ENG_RTIC	0x05   /* Run-time integrity checker */
 #define HAB_ENG_SAHARA  0x06   /* Crypto accelerator */
 #define HAB_ENG_CSU		0x0a   /* Central Security Unit */
 #define HAB_ENG_SRTC	0x0c   /* Secure clock */
 #define HAB_ENG_DCP		0x1b   /* Data Co-Processor */
 #define HAB_ENG_CAAM	0x1d   /* CAAM */
 #define HAB_ENG_SNVS	0x1e   /* Secure Non-Volatile Storage */
 #define HAB_ENG_OCOTP	0x21   /* Fuse controller */
 #define HAB_ENG_DTCP	0x22   /* DTCP co-processor */
 #define HAB_ENG_ROM		0x36   /* Protected ROM area */
 #define HAB_ENG_HDCP	0x24   /* HDCP co-processor */
 #define HAB_ENG_RTL		0x77   /* RTL simulation engine */
 #define HAB_ENG_SW		0xff   /* Software engine */
 #ifdef CONFIG_ARM64
 #ifdef CONFIG_IMX8MQ
 #define HAB_RVT_BASE                   0x00000880
 #else
 #define HAB_RVT_BASE                   0x00000900
 #endif
 #define HAB_RVT_ENTRY			(*(ulong *)(HAB_RVT_BASE + 0x08))
 #define HAB_RVT_EXIT			(*(ulong *)(HAB_RVT_BASE + 0x10))
 #define HAB_RVT_CHECK_TARGET		(*(ulong *)(HAB_RVT_BASE + 0x18))
 #define HAB_RVT_AUTHENTICATE_IMAGE	(*(ulong *)(HAB_RVT_BASE + 0x20))
 #define HAB_RVT_REPORT_EVENT		(*(ulong *)(HAB_RVT_BASE + 0x40))
 #define HAB_RVT_REPORT_STATUS		(*(ulong *)(HAB_RVT_BASE + 0x48))
 #define HAB_RVT_FAILSAFE		(*(ulong *)(HAB_RVT_BASE + 0x50))
 #else
 #ifdef CONFIG_ROM_UNIFIED_SECTIONS
 #define HAB_RVT_BASE			0x00000100
 #else
 #define HAB_RVT_BASE_NEW		0x00000098
 #define HAB_RVT_BASE_OLD		0x00000094
 #define HAB_RVT_BASE ((is_mx6dqp()) ?					\
 			HAB_RVT_BASE_NEW :				\
 			(is_mx6dq() && (soc_rev() >= CHIP_REV_1_3)) ?	\
 			HAB_RVT_BASE_NEW :				\
 			(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ?	\
 			HAB_RVT_BASE_NEW : HAB_RVT_BASE_OLD)
 #endif
 #define HAB_RVT_ENTRY			(*(uint32_t *)(HAB_RVT_BASE + 0x04))
 #define HAB_RVT_EXIT			(*(uint32_t *)(HAB_RVT_BASE + 0x08))
 #define HAB_RVT_CHECK_TARGET		(*(uint32_t *)(HAB_RVT_BASE + 0x0C))
 #define HAB_RVT_AUTHENTICATE_IMAGE	(*(uint32_t *)(HAB_RVT_BASE + 0x10))
 #define HAB_RVT_REPORT_EVENT		(*(uint32_t *)(HAB_RVT_BASE + 0x20))
 #define HAB_RVT_REPORT_STATUS		(*(uint32_t *)(HAB_RVT_BASE + 0x24))
 #define HAB_RVT_FAILSAFE		(*(uint32_t *)(HAB_RVT_BASE + 0x28))
 #endif /*CONFIG_ARM64*/
 #define HAB_CID_ROM 0 /**< ROM Caller ID */
 #define HAB_CID_UBOOT 1 /**< UBOOT Caller ID*/
 #define HAB_CMD_HDR          0xD4  /* CSF Header */
 #define HAB_CMD_WRT_DAT      0xCC  /* Write Data command tag */
 #define HAB_CMD_CHK_DAT      0xCF  /* Check Data command tag */
 #define HAB_CMD_SET          0xB1  /* Set command tag */
 #define HAB_PAR_MID          0x01  /* MID parameter value */
 #define IVT_SIZE			0x20
 #define CSF_PAD_SIZE			0x2000
+#define HAB_TAG_EVT		0xDB
+#define HAB_TAG_EVT_DEF		0x0C
+#define HAB_MAJ_VER		0x40
+#define HAB_MAJ_MASK		0xF0
 /* ----------- end of HAB API updates ------------*/
 int imx_hab_authenticate_image(uint32_t ddr_start, uint32_t image_size,
 			       uint32_t ivt_offset);
 bool imx_hab_is_enabled(void);
 #endif

arch/arm/mach-imx/hab.c

Diff comments View file @ dd058bc

 /*
  * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
  *
  * SPDX-License-Identifier:    GPL-2.0+
  */
 #include <common.h>
 #include <config.h>
 #include <fuse.h>
 #include <asm/io.h>
 #include <asm/system.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/mach-imx/hab.h>
 DECLARE_GLOBAL_DATA_PTR;
 #define ALIGN_SIZE		0x1000
 #define MX6DQ_PU_IROM_MMU_EN_VAR	0x009024a8
 #define MX6DLS_PU_IROM_MMU_EN_VAR	0x00901dd0
 #define MX6SL_PU_IROM_MMU_EN_VAR	0x00900a18
 #define IS_HAB_ENABLED_BIT \
 	(is_soc_type(MXC_SOC_MX7ULP) ? 0x80000000 :	\
 	 ((is_soc_type(MXC_SOC_MX7) || is_soc_type(MXC_SOC_IMX8M))? 0x2000000 : 0x2))
+#ifdef CONFIG_MX7ULP
+#define HAB_M4_PERSISTENT_START	((soc_rev() >= CHIP_REV_2_0) ? 0x20008040 : \
+				  0x20008180)
+#define HAB_M4_PERSISTENT_BYTES		0xB80
+#endif
 static int ivt_header_error(const char *err_str, struct ivt_header *ivt_hdr)
 {
 	printf("%s magic=0x%x length=0x%02x version=0x%x\n", err_str,
 	       ivt_hdr->magic, ivt_hdr->length, ivt_hdr->version);
 	return 1;
 }
 static int verify_ivt_header(struct ivt_header *ivt_hdr)
 {
 	int result = 0;
 	if (ivt_hdr->magic != IVT_HEADER_MAGIC)
 		result = ivt_header_error("bad magic", ivt_hdr);
 	if (be16_to_cpu(ivt_hdr->length) != IVT_TOTAL_LENGTH)
 		result = ivt_header_error("bad length", ivt_hdr);
 	if (ivt_hdr->version != IVT_HEADER_V1 &&
 	    ivt_hdr->version != IVT_HEADER_V2)
 		result = ivt_header_error("bad version", ivt_hdr);
 	return result;
 }
 #ifdef CONFIG_ARM64
 #define FSL_SIP_HAB		0xC2000007
 #define FSL_SIP_HAB_AUTHENTICATE	0x00
 #define FSL_SIP_HAB_ENTRY		0x01
 #define FSL_SIP_HAB_EXIT		0x02
 #define FSL_SIP_HAB_REPORT_EVENT	0x03
 #define FSL_SIP_HAB_REPORT_STATUS	0x04
 #define FSL_SIP_HAB_FAILSAFE		0x05
 #define FSL_SIP_HAB_CHECK_TARGET	0x06
 static volatile gd_t *gd_save;
 #endif
 static inline void save_gd(void)
 {
 #ifdef CONFIG_ARM64
 	gd_save = gd;
 #endif
 }
 static inline void restore_gd(void)
 {
 #ifdef CONFIG_ARM64
 	/*
 	 * Make will already error that reserving x18 is not supported at the
 	 * time of writing, clang: error: unknown argument: '-ffixed-x18'
 	 */
 	__asm__ volatile("mov x18, %0\n" : : "r" (gd_save));
 #endif
 }
 enum hab_status hab_rvt_report_event(enum hab_status status, uint32_t index,
 		uint8_t *event, size_t *bytes)
 {
 	enum hab_status ret;
 	hab_rvt_report_event_t *hab_rvt_report_event_func;
 	hab_rvt_report_event_func =  (hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT;
 #if defined(CONFIG_ARM64)
 	if (current_el() != 3) {
 		/* call sip */
 		ret = (enum hab_status)call_imx_sip(FSL_SIP_HAB, FSL_SIP_HAB_REPORT_EVENT, (unsigned long)index,
 			(unsigned long)event, (unsigned long)bytes);
 		return ret;
 	}
 #endif
 	save_gd();
 	ret = hab_rvt_report_event_func(status, index, event, bytes);
 	restore_gd();
 	return ret;
 }
 enum hab_status hab_rvt_report_status(enum hab_config *config,
 		enum hab_state *state)
 {
 	enum hab_status ret;
 	hab_rvt_report_status_t *hab_rvt_report_status_func;
 	hab_rvt_report_status_func = (hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS;
 #if defined(CONFIG_ARM64)
 	if (current_el() != 3) {
 		/* call sip */
 		ret = (enum hab_status)call_imx_sip(FSL_SIP_HAB, FSL_SIP_HAB_REPORT_STATUS,
 			(unsigned long)config, (unsigned long)state, 0);
 		return ret;
 	}
 #endif
 	save_gd();
 	ret = hab_rvt_report_status_func(config, state);
 	restore_gd();
 	return ret;
 }
 enum hab_status hab_rvt_entry(void)
 {
 	enum hab_status ret;
 	hab_rvt_entry_t *hab_rvt_entry_func;
 	hab_rvt_entry_func = (hab_rvt_entry_t *)HAB_RVT_ENTRY;
 #if defined(CONFIG_ARM64)
 	if (current_el() != 3) {
 		/* call sip */
 		ret = (enum hab_status)call_imx_sip(FSL_SIP_HAB, FSL_SIP_HAB_ENTRY, 0, 0, 0);
 		return ret;
 	}
 #endif
 	save_gd();
 	ret = hab_rvt_entry_func();
 	restore_gd();
 	return ret;
 }
 enum hab_status hab_rvt_exit(void)
 {
 	enum hab_status ret;
 	hab_rvt_exit_t *hab_rvt_exit_func;
 	hab_rvt_exit_func =  (hab_rvt_exit_t *)HAB_RVT_EXIT;
 #if defined(CONFIG_ARM64)
 	if (current_el() != 3) {
 		/* call sip */
 		ret = (enum hab_status)call_imx_sip(FSL_SIP_HAB, FSL_SIP_HAB_EXIT, 0, 0, 0);
 		return ret;
 	}
 #endif
 	save_gd();
 	ret = hab_rvt_exit_func();
 	restore_gd();
 	return ret;
 }
 void hab_rvt_failsafe(void)
 {
 	hab_rvt_failsafe_t *hab_rvt_failsafe_func;
 	hab_rvt_failsafe_func = (hab_rvt_failsafe_t *)HAB_RVT_FAILSAFE;
 #if defined(CONFIG_ARM64)
 	if (current_el() != 3) {
 		/* call sip */
 		call_imx_sip(FSL_SIP_HAB, FSL_SIP_HAB_FAILSAFE, 0, 0, 0);
 		return;
 	}
 #endif
 	save_gd();
 	hab_rvt_failsafe_func();
 	restore_gd();
 }
 enum hab_status hab_rvt_check_target(enum hab_target type, const void *start,
 					       size_t bytes)
 {
 	enum hab_status ret;
 	hab_rvt_check_target_t *hab_rvt_check_target_func;
 	hab_rvt_check_target_func =  (hab_rvt_check_target_t *)HAB_RVT_CHECK_TARGET;
 #if defined(CONFIG_ARM64)
 	if (current_el() != 3) {
 		/* call sip */
 		ret = (enum hab_status)call_imx_sip(FSL_SIP_HAB, FSL_SIP_HAB_CHECK_TARGET, (unsigned long)type,
 			(unsigned long)start, (unsigned long)bytes);
 		return ret;
 	}
 #endif
 	save_gd();
 	ret = hab_rvt_check_target_func(type, start, bytes);
 	restore_gd();
 	return ret;
 }
 void *hab_rvt_authenticate_image(uint8_t cid, ptrdiff_t ivt_offset,
 		void **start, size_t *bytes, hab_loader_callback_f_t loader)
 {
 	void *ret;
 	hab_rvt_authenticate_image_t *hab_rvt_authenticate_image_func;
 	hab_rvt_authenticate_image_func = (hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE;
 #if defined(CONFIG_ARM64)
 	if (current_el() != 3) {
 		/* call sip */
 		ret = (void *)call_imx_sip(FSL_SIP_HAB, FSL_SIP_HAB_AUTHENTICATE, (unsigned long)ivt_offset,
 			(unsigned long)start, (unsigned long)bytes);
 		return ret;
 	}
 #endif
 	save_gd();
 	ret = hab_rvt_authenticate_image_func(cid, ivt_offset, start, bytes, loader);
 	restore_gd();
 	return ret;
 }
 #if !defined(CONFIG_SPL_BUILD)
 #define MAX_RECORD_BYTES     (8*1024) /* 4 kbytes */
 struct record {
 	uint8_t  tag;						/* Tag */
 	uint8_t  len[2];					/* Length */
 	uint8_t  par;						/* Version */
 	uint8_t  contents[MAX_RECORD_BYTES];/* Record Data */
 	bool	 any_rec_flag;
 };
 static char *rsn_str[] = {
 			  "RSN = HAB_RSN_ANY (0x00)\n",
 			  "RSN = HAB_ENG_FAIL (0x30)\n",
 			  "RSN = HAB_INV_ADDRESS (0x22)\n",
 			  "RSN = HAB_INV_ASSERTION (0x0C)\n",
 			  "RSN = HAB_INV_CALL (0x28)\n",
 			  "RSN = HAB_INV_CERTIFICATE (0x21)\n",
 			  "RSN = HAB_INV_COMMAND (0x06)\n",
 			  "RSN = HAB_INV_CSF (0x11)\n",
 			  "RSN = HAB_INV_DCD (0x27)\n",
 			  "RSN = HAB_INV_INDEX (0x0F)\n",
 			  "RSN = HAB_INV_IVT (0x05)\n",
 			  "RSN = HAB_INV_KEY (0x1D)\n",
 			  "RSN = HAB_INV_RETURN (0x1E)\n",
 			  "RSN = HAB_INV_SIGNATURE (0x18)\n",
 			  "RSN = HAB_INV_SIZE (0x17)\n",
 			  "RSN = HAB_MEM_FAIL (0x2E)\n",
 			  "RSN = HAB_OVR_COUNT (0x2B)\n",
 			  "RSN = HAB_OVR_STORAGE (0x2D)\n",
 			  "RSN = HAB_UNS_ALGORITHM (0x12)\n",
 			  "RSN = HAB_UNS_COMMAND (0x03)\n",
 			  "RSN = HAB_UNS_ENGINE (0x0A)\n",
 			  "RSN = HAB_UNS_ITEM (0x24)\n",
 			  "RSN = HAB_UNS_KEY (0x1B)\n",
 			  "RSN = HAB_UNS_PROTOCOL (0x14)\n",
 			  "RSN = HAB_UNS_STATE (0x09)\n",
 			  "RSN = INVALID\n",
 			  NULL
 };
 static char *sts_str[] = {
 			  "STS = HAB_SUCCESS (0xF0)\n",
 			  "STS = HAB_FAILURE (0x33)\n",
 			  "STS = HAB_WARNING (0x69)\n",
 			  "STS = INVALID\n",
 			  NULL
 };
 static char *eng_str[] = {
 			  "ENG = HAB_ENG_ANY (0x00)\n",
 			  "ENG = HAB_ENG_SCC (0x03)\n",
 			  "ENG = HAB_ENG_RTIC (0x05)\n",
 			  "ENG = HAB_ENG_SAHARA (0x06)\n",
 			  "ENG = HAB_ENG_CSU (0x0A)\n",
 			  "ENG = HAB_ENG_SRTC (0x0C)\n",
 			  "ENG = HAB_ENG_DCP (0x1B)\n",
 			  "ENG = HAB_ENG_CAAM (0x1D)\n",
 			  "ENG = HAB_ENG_SNVS (0x1E)\n",
 			  "ENG = HAB_ENG_OCOTP (0x21)\n",
 			  "ENG = HAB_ENG_DTCP (0x22)\n",
 			  "ENG = HAB_ENG_ROM (0x36)\n",
 			  "ENG = HAB_ENG_HDCP (0x24)\n",
 			  "ENG = HAB_ENG_RTL (0x77)\n",
 			  "ENG = HAB_ENG_SW (0xFF)\n",
 			  "ENG = INVALID\n",
 			  NULL
 };
 static char *ctx_str[] = {
 			  "CTX = HAB_CTX_ANY(0x00)\n",
 			  "CTX = HAB_CTX_FAB (0xFF)\n",
 			  "CTX = HAB_CTX_ENTRY (0xE1)\n",
 			  "CTX = HAB_CTX_TARGET (0x33)\n",
 			  "CTX = HAB_CTX_AUTHENTICATE (0x0A)\n",
 			  "CTX = HAB_CTX_DCD (0xDD)\n",
 			  "CTX = HAB_CTX_CSF (0xCF)\n",
 			  "CTX = HAB_CTX_COMMAND (0xC0)\n",
 			  "CTX = HAB_CTX_AUT_DAT (0xDB)\n",
 			  "CTX = HAB_CTX_ASSERT (0xA0)\n",
 			  "CTX = HAB_CTX_EXIT (0xEE)\n",
 			  "CTX = INVALID\n",
 			  NULL
 };
 static uint8_t hab_statuses[5] = {
 	HAB_STS_ANY,
 	HAB_FAILURE,
 	HAB_WARNING,
 	HAB_SUCCESS,
 	-1
 };
 static uint8_t hab_reasons[26] = {
 	HAB_RSN_ANY,
 	HAB_ENG_FAIL,
 	HAB_INV_ADDRESS,
 	HAB_INV_ASSERTION,
 	HAB_INV_CALL,
 	HAB_INV_CERTIFICATE,
 	HAB_INV_COMMAND,
 	HAB_INV_CSF,
 	HAB_INV_DCD,
 	HAB_INV_INDEX,
 	HAB_INV_IVT,
 	HAB_INV_KEY,
 	HAB_INV_RETURN,
 	HAB_INV_SIGNATURE,
 	HAB_INV_SIZE,
 	HAB_MEM_FAIL,
 	HAB_OVR_COUNT,
 	HAB_OVR_STORAGE,
 	HAB_UNS_ALGORITHM,
 	HAB_UNS_COMMAND,
 	HAB_UNS_ENGINE,
 	HAB_UNS_ITEM,
 	HAB_UNS_KEY,
 	HAB_UNS_PROTOCOL,
 	HAB_UNS_STATE,
 	-1
 };
 static uint8_t hab_contexts[12] = {
 	HAB_CTX_ANY,
 	HAB_CTX_FAB,
 	HAB_CTX_ENTRY,
 	HAB_CTX_TARGET,
 	HAB_CTX_AUTHENTICATE,
 	HAB_CTX_DCD,
 	HAB_CTX_CSF,
 	HAB_CTX_COMMAND,
 	HAB_CTX_AUT_DAT,
 	HAB_CTX_ASSERT,
 	HAB_CTX_EXIT,
 	-1
 };
 static uint8_t hab_engines[16] = {
 	HAB_ENG_ANY,
 	HAB_ENG_SCC,
 	HAB_ENG_RTIC,
 	HAB_ENG_SAHARA,
 	HAB_ENG_CSU,
 	HAB_ENG_SRTC,
 	HAB_ENG_DCP,
 	HAB_ENG_CAAM,
 	HAB_ENG_SNVS,
 	HAB_ENG_OCOTP,
 	HAB_ENG_DTCP,
 	HAB_ENG_ROM,
 	HAB_ENG_HDCP,
 	HAB_ENG_RTL,
 	HAB_ENG_SW,
 	-1
 };
 static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)
 {
 	uint8_t idx = 0;
 	uint8_t element = list[idx];
 	while (element != -1) {
 		if (element == tgt)
 			return idx;
 		element = list[++idx];
 	}
 	return -1;
 }
 static void process_event_record(uint8_t *event_data, size_t bytes)
 {
 	struct record *rec = (struct record *)event_data;
 	printf("\n\n%s", sts_str[get_idx(hab_statuses, rec->contents[0])]);
 	printf("%s", rsn_str[get_idx(hab_reasons, rec->contents[1])]);
 	printf("%s", ctx_str[get_idx(hab_contexts, rec->contents[2])]);
 	printf("%s", eng_str[get_idx(hab_engines, rec->contents[3])]);
 }
 static void display_event(uint8_t *event_data, size_t bytes)
 {
 	uint32_t i;
 	if (!(event_data && bytes > 0))
 		return;
 	for (i = 0; i < bytes; i++) {
 		if (i == 0)
 			printf("\t0x%02x", event_data[i]);
 		else if ((i % 8) == 0)
 			printf("\n\t0x%02x", event_data[i]);
 		else
 			printf(" 0x%02x", event_data[i]);
 	}
 	process_event_record(event_data, bytes);
 }
 static int get_hab_status(void)
 {
 	uint32_t index = 0; /* Loop index */
 	uint8_t event_data[128]; /* Event data buffer */
 	size_t bytes = sizeof(event_data); /* Event size in bytes */
 	enum hab_config config = 0;
 	enum hab_state state = 0;
 	if (imx_hab_is_enabled())
 		puts("\nSecure boot enabled\n");
 	else
 		puts("\nSecure boot disabled\n");
 	/* Check HAB status */
 	if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
 		printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
 		       config, state);
 		/* Display HAB events */
 		while (hab_rvt_report_event(HAB_STS_ANY, index, event_data,
 					&bytes) == HAB_SUCCESS) {
 			puts("\n");
 			printf("--------- HAB Event %d -----------------\n",
 			       index + 1);
 			puts("event data:\n");
 			display_event(event_data, bytes);
 			puts("\n");
 			bytes = sizeof(event_data);
 			index++;
 		}
 	}
 	/* Display message if no HAB events are found */
 	else {
 		printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
 		       config, state);
 		puts("No HAB Events Found!\n\n");
 	}
 	return 0;
 }
+#ifdef CONFIG_MX7ULP
+static int get_record_len(struct record *rec)
+{
+	return (size_t)((rec->len[0] << 8) + (rec->len[1]));
+}
+static int get_hab_status_m4(void)
+{
+	unsigned int index = 0;
+	uint8_t event_data[128];
+	size_t record_len, offset = 0;
+	enum hab_config config = 0;
+	enum hab_state state = 0;
+	if (imx_hab_is_enabled())
+		puts("\nSecure boot enabled\n");
+	else
+		puts("\nSecure boot disabled\n");
+	/*
+	 * HAB in both A7 and M4 gather the security state
+	 * and configuration of the chip from
+	 * shared SNVS module
+	 */
+	hab_rvt_report_status(&config, &state);
+	printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
+	       config, state);
+	struct record *rec = (struct record *)(HAB_M4_PERSISTENT_START);
+	record_len = get_record_len(rec);
+	/* Check if HAB persistent memory is valid */
+	if (rec->tag != HAB_TAG_EVT_DEF ||
+	    record_len != sizeof(struct evt_def) ||
+	    (rec->par & HAB_MAJ_MASK) != HAB_MAJ_VER) {
+		puts("\nERROR: Invalid HAB persistent memory\n");
+		return 1;
+	}
+	/* Parse events in HAB M4 persistent memory region */
+	while (offset < HAB_M4_PERSISTENT_BYTES) {
+		rec = (struct record *)(HAB_M4_PERSISTENT_START + offset);
+		record_len = get_record_len(rec);
+		if (rec->tag == HAB_TAG_EVT) {
+			memcpy(&event_data, rec, record_len);
+			puts("\n");
+			printf("--------- HAB Event %d -----------------\n",
+			       index + 1);
+			puts("event data:\n");
+			display_event(event_data, record_len);
+			puts("\n");
+			index++;
+		}
+		offset += record_len;
+		/* Ensure all records start on a word boundary */
+		if ((offset % 4) != 0)
+			offset =  offset + (4 - (offset % 4));
+	}
+	if (!index)
+		puts("No HAB Events Found!\n\n");
+	return 0;
+}
+#endif
 static int do_hab_status(cmd_tbl_t *cmdtp, int flag, int argc,
 			 char * const argv[])
 {
+#ifdef CONFIG_MX7ULP
+	if ((argc > 2)) {
+		cmd_usage(cmdtp);
+		return 1;
+	}
+	if (strcmp("m4", argv[1]) == 0)
+		get_hab_status_m4();
+	else
+		get_hab_status();
+#else
 	if ((argc != 1)) {
 		cmd_usage(cmdtp);
 		return 1;
 	}
 	get_hab_status();
+#endif
 	return 0;
 }
 static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
 				 char * const argv[])
 {
 	ulong	addr, length, ivt_offset;
 	int	rcode = 0;
 	if (argc < 4)
 		return CMD_RET_USAGE;
 	addr = simple_strtoul(argv[1], NULL, 16);
 	length = simple_strtoul(argv[2], NULL, 16);
 	ivt_offset = simple_strtoul(argv[3], NULL, 16);
 	rcode = imx_hab_authenticate_image(addr, length, ivt_offset);
 	if (rcode == 0)
 		rcode = CMD_RET_SUCCESS;
 	else
 		rcode = CMD_RET_FAILURE;
 	return rcode;
 }
 static int do_hab_failsafe(cmd_tbl_t *cmdtp, int flag, int argc,
 			   char * const argv[])
 {
 	if (argc != 1) {
 		cmd_usage(cmdtp);
 		return 1;
 	}
 	hab_rvt_failsafe();
 	return 0;
 }
+#ifdef CONFIG_MX7ULP
 U_BOOT_CMD(
+		hab_status, CONFIG_SYS_MAXARGS, 2, do_hab_status,
+		"display HAB status and events",
+		"hab_status - A7 HAB event and status\n"
+		"hab_status m4 - M4 HAB event and status"
+	  );
+#else
+U_BOOT_CMD(
 		hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
 		"display HAB status",
 		""
 	  );
+#endif
 U_BOOT_CMD(
 		hab_auth_img, 4, 0, do_authenticate_image,
 		"authenticate image via HAB",
 		"addr length ivt_offset\n"
 		"addr - image hex address\n"
 		"length - image hex length\n"
 		"ivt_offset - hex offset of IVT in the image"
 	  );
 U_BOOT_CMD(
 		hab_failsafe, CONFIG_SYS_MAXARGS, 1, do_hab_failsafe,
 		"run BootROM failsafe routine",
 		""
 	  );
 #endif /* !defined(CONFIG_SPL_BUILD) */
 /* Get CSF Header length */
 static int get_hab_hdr_len(struct hab_hdr *hdr)
 {
 	return (size_t)((hdr->len[0] << 8) + (hdr->len[1]));
 }
 /* Check whether addr lies between start and
  * end and is within the length of the image
  */
 static int chk_bounds(u8 *addr, size_t bytes, u8 *start, u8 *end)
 {
 	size_t csf_size = (size_t)((end + 1) - addr);
 	return (addr && (addr >= start) && (addr <= end) &&
 		(csf_size >= bytes));
 }
 /* Get Length of each command in CSF */
 static int get_csf_cmd_hdr_len(u8 *csf_hdr)
 {
 	if (*csf_hdr == HAB_CMD_HDR)
 		return sizeof(struct hab_hdr);
 	return get_hab_hdr_len((struct hab_hdr *)csf_hdr);
 }
 /* Check if CSF is valid */
 static bool csf_is_valid(struct ivt *ivt, ulong start_addr, size_t bytes)
 {
 	u8 *start = (u8 *)start_addr;
 	u8 *csf_hdr;
 	u8 *end;
 	size_t csf_hdr_len;
 	size_t cmd_hdr_len;
 	size_t offset = 0;
 	if (bytes != 0)
 		end = start + bytes - 1;
 	else
 		end = start;
 	/* Verify if CSF pointer content is zero */
 	if (!ivt->csf) {
 		puts("Error: CSF pointer is NULL\n");
 		return false;
 	}
 	csf_hdr = (u8 *)(ulong)ivt->csf;
 	/* Verify if CSF Header exist */
 	if (*csf_hdr != HAB_CMD_HDR) {
 		puts("Error: CSF header command not found\n");
 		return false;
 	}
 	csf_hdr_len = get_hab_hdr_len((struct hab_hdr *)csf_hdr);
 	/* Check if the CSF lies within the image bounds */
 	if (!chk_bounds(csf_hdr, csf_hdr_len, start, end)) {
 		puts("Error: CSF lies outside the image bounds\n");
 		return false;
 	}
 	do {
 		struct hab_hdr *cmd;
 		cmd = (struct hab_hdr *)&csf_hdr[offset];
 		switch (cmd->tag) {
 		case (HAB_CMD_WRT_DAT):
 			puts("Error: Deprecated write command found\n");
 			return false;
 		case (HAB_CMD_CHK_DAT):
 			puts("Error: Deprecated check command found\n");
 			return false;
 		case (HAB_CMD_SET):
 			if (cmd->par == HAB_PAR_MID) {
 				puts("Error: Deprecated Set MID command found\n");
 				return false;
 			}
 		default:
 			break;
 		}
 		cmd_hdr_len = get_csf_cmd_hdr_len(&csf_hdr[offset]);
 		if (!cmd_hdr_len) {
 			puts("Error: Invalid command length\n");
 			return false;
 		}
 		offset += cmd_hdr_len;
 	} while (offset < csf_hdr_len);
 	return true;
 }
 /*
  * Validate IVT structure of the image being authenticated
  */
 static int validate_ivt(struct ivt *ivt_initial)
 {
 	struct ivt_header *ivt_hdr = &ivt_initial->hdr;
 	if ((ulong)ivt_initial & 0x3) {
 		puts("Error: Image's start address is not 4 byte aligned\n");
 		return 0;
 	}
 	/* Check IVT fields before allowing authentication */
 	if ((!verify_ivt_header(ivt_hdr)) && \
 	    (ivt_initial->entry != 0x0) && \
 	    (ivt_initial->reserved1 == 0x0) && \
 	    (ivt_initial->self == \
 		   (uint32_t)((ulong)ivt_initial & 0xffffffff)) && \
 	    (ivt_initial->csf != 0x0) && \
 	    (ivt_initial->reserved2 == 0x0)) {
 		/* Report boot failure if DCD pointer is found in IVT */
 		if (ivt_initial->dcd != 0x0)
 			puts("Error: DCD pointer must be 0\n");
 		else
 			return 1;
 	}
 	puts("Error: Invalid IVT structure\n");
 	puts("\nAllowed IVT structure:\n");
 	puts("IVT HDR       = 0x4X2000D1\n");
 	puts("IVT ENTRY     = 0xXXXXXXXX\n");
 	puts("IVT RSV1      = 0x0\n");
 	puts("IVT DCD       = 0x0\n");		/* Recommended */
 	puts("IVT BOOT_DATA = 0xXXXXXXXX\n");	/* Commonly 0x0 */
 	puts("IVT SELF      = 0xXXXXXXXX\n");	/* = ddr_start + ivt_offset */
 	puts("IVT CSF       = 0xXXXXXXXX\n");
 	puts("IVT RSV2      = 0x0\n");
 	/* Invalid IVT structure */
 	return 0;
 }
 bool imx_hab_is_enabled(void)
 {
 	struct imx_sec_config_fuse_t *fuse =
 		(struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
 	uint32_t reg;
 	int ret;
 	ret = fuse_read(fuse->bank, fuse->word, &reg);
 	if (ret) {
 		puts("\nSecure boot fuse read error\n");
 		return ret;
 	}
 	return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT;
 }
 int imx_hab_authenticate_image(uint32_t ddr_start, uint32_t image_size,
 			       uint32_t ivt_offset)
 {
 	ulong load_addr = 0;
 	size_t bytes;
 	ulong ivt_addr = 0;
 	int result = 1;
 	ulong start;
 	struct ivt *ivt;
 	enum hab_status status;
 	if (!imx_hab_is_enabled())
 		puts("hab fuse not enabled\n");
 	printf("\nAuthenticate image from DDR location 0x%x...\n",
 	       ddr_start);
 	hab_caam_clock_enable(1);
 	/* Calculate IVT address header */
 	ivt_addr = (ulong) (ddr_start + ivt_offset);
 	ivt = (struct ivt *)ivt_addr;
 	/* Verify IVT header bugging out on error */
 	if (!validate_ivt(ivt))
 		goto hab_authentication_exit;
 	start = ddr_start;
 	bytes = image_size;
 	/* Verify CSF */
 	if (!csf_is_valid(ivt, start, bytes))
 		goto hab_authentication_exit;
 	if (hab_rvt_entry() != HAB_SUCCESS) {
 		puts("hab entry function fail\n");
 		goto hab_exit_failure_print_status;
 	}
 	status = hab_rvt_check_target(HAB_TGT_MEMORY, (void *)(ulong)ddr_start, bytes);
 	if (status != HAB_SUCCESS) {
 		printf("HAB check target 0x%08x-0x%08lx fail\n",
 		       ddr_start, ddr_start + bytes);
 		goto hab_exit_failure_print_status;
 	}
 #ifdef DEBUG
 	printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n", ivt_offset, ivt_addr);
 	printf("ivt entry = 0x%08x, dcd = 0x%08x, csf = 0x%08x\n", ivt->entry,
 	       ivt->dcd, ivt->csf);
 	puts("Dumping IVT\n");
 	print_buffer(ivt_addr, (void *)(ivt_addr), 4, 0x8, 0);
 	puts("Dumping CSF Header\n");
 	print_buffer(ivt->csf, (void *)(ivt->csf), 4, 0x10, 0);
 #if  !defined(CONFIG_SPL_BUILD)
 	get_hab_status();
 #endif
 	puts("\nCalling authenticate_image in ROM\n");
 	printf("\tivt_offset = 0x%x\n", ivt_offset);
 	printf("\tstart = 0x%08lx\n", start);
 	printf("\tbytes = 0x%x\n", bytes);
 #endif
 #ifndef CONFIG_ARM64
 	/*
 	 * If the MMU is enabled, we have to notify the ROM
 	 * code, or it won't flush the caches when needed.
 	 * This is done, by setting the "pu_irom_mmu_enabled"
 	 * word to 1. You can find its address by looking in
 	 * the ROM map. This is critical for
 	 * authenticate_image(). If MMU is enabled, without
 	 * setting this bit, authentication will fail and may
 	 * crash.
 	 */
 	/* Check MMU enabled */
 	if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
 		if (is_mx6dq()) {
 			/*
 			 * This won't work on Rev 1.0.0 of
 			 * i.MX6Q/D, since their ROM doesn't
 			 * do cache flushes. don't think any
 			 * exist, so we ignore them.
 			 */
 			if (!is_mx6dqp())
 				writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
 		} else if (is_mx6sdl()) {
 			writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
 		} else if (is_mx6sl()) {
 			writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
 		}
 	}
 #endif
 	load_addr = (ulong)hab_rvt_authenticate_image(
 			HAB_CID_UBOOT,
 			ivt_offset, (void **)&start,
 			(size_t *)&bytes, NULL);
 	if (hab_rvt_exit() != HAB_SUCCESS) {
 		puts("hab exit function fail\n");
 		load_addr = 0;
 	}
 hab_exit_failure_print_status:
 #if !defined(CONFIG_SPL_BUILD)
 	get_hab_status();
 #endif
 hab_authentication_exit:
 	if (load_addr != 0 || !imx_hab_is_enabled())
 		result = 0;
 	return result;
 }
 int authenticate_image(uint32_t ddr_start, uint32_t raw_image_size)
 {
 	uint32_t ivt_offset;
 	size_t bytes;
 	ivt_offset = (raw_image_size + ALIGN_SIZE - 1) &
 					~(ALIGN_SIZE - 1);
 	bytes = ivt_offset + IVT_SIZE + CSF_PAD_SIZE;
 	return imx_hab_authenticate_image(ddr_start, bytes, ivt_offset);
 }

doc/imx/habv4/guides/mx6_mx7_secure_boot.txt

Diff comments View file @ dd058bc

          +=======================================================+
          +   i.MX6, i.MX7 U-Boot Secure Boot guide using HABv4   +
          +=======================================================+
 1. HABv4 secure boot process
 -----------------------------
 This document describes a step-by-step procedure on how to sign and securely
 boot an U-Boot image. It is assumed that the reader is familiar with basic
 HAB concepts and with the PKI tree generation.
 Details about HAB can be found in the application note AN4581[1] and in the
 introduction_habv4.txt document.
 1.1 Building a u-boot-dtb.imx image supporting secure boot
 -----------------------------------------------------------
 The U-Boot provides support to secure boot configuration and also provide
 access to the HAB APIs exposed by the ROM vector table, the support is
 enabled by selecting the CONFIG_SECURE_BOOT option.
 When built with this configuration, the U-Boot provides extra functions for
 HAB, such as the HAB status logs retrievement through the hab_status command
 and support for extending the root of trust.
 The U-Boot also correctly pads the final image by aligning to the next 0xC00
 address, so the CSF signature data generated by CST can be concatenated to
 image.
 The diagram below illustrate a signed u-boot-dtb.imx image layout:
             ------- +-----------------------------+ <-- *start
                 ^   |      Image Vector Table     |
                 |   +-----------------------------+ <-- *boot_data
                 |   |          Boot Data          |
                 |   +-----------------------------+ <-- *dcd
                 |   |          DCD Table          |
                 |   +-----------------------------+
          Signed |   |           Padding           |
           Data  |   +-----------------------------+ <-- *entry
                 |   |                             |
                 |   |                             |
                 |   |       u-boot-dtb.bin        |
                 |   |                             |
                 |   |                             |
                 |   +-----------------------------+
                 v   |           Padding           |
             ------- +-----------------------------+ <-- *csf
                     |                             |
                     | Command Sequence File (CSF) |
                     |                             |
                     +-----------------------------+
                     |      Padding (optional)     |
                     +-----------------------------+
 1.2 Enabling the secure boot support
 -------------------------------------
 The first step is to generate an U-Boot image supporting the HAB features
 mentioned above, this can be achieved by adding CONFIG_SECURE_BOOT to the
 build configuration:
 - Defconfig:
   CONFIG_SECURE_BOOT=y
 - Kconfig:
   ARM architecture -> Support i.MX HAB features
 1.3 Creating the CSF description file
 --------------------------------------
 The CSF contains all the commands that the ROM executes during the secure
 boot. These commands instruct the HAB on which memory areas of the image
 to authenticate, which keys to install, use and etc.
 CSF examples are available under doc/imx/habv4/csf_examples/ directory.
 A build log containing the "Authenticate Data" parameters is available after
 the U-Boot build, the example below is a log for mx7dsabresd_defconfig target:
 - mkimage build log:
   $ cat u-boot-dtb.imx.log
   Image Type:   Freescale IMX Boot Image
   Image Ver:    2 (i.MX53/6/7 compatible)
   Mode:         DCD
   Data Size:    667648 Bytes = 652.00 KiB = 0.64 MiB
   Load Address: 877ff420
   Entry Point:  87800000
   HAB Blocks:   877ff400 00000000 0009ec00
                 ^^^^^^^^ ^^^^^^^^ ^^^^^^^^
                 |        |        |
                 |        |        ------- (1)
                 |        |
                 |        ---------------- (2)
                 |
                 ------------------------- (3)
   (1)   Size of area in file u-boot-dtb.imx to sign.
         This area should include the IVT, the Boot Data the DCD
         and the U-Boot itself.
   (2)   Start of area in u-boot-dtb.imx to sign.
   (3)   Start of area in RAM to authenticate.
 - In "Authenticate Data" CSF command users can copy and past the output
   addresses:
   Block = 0x877ff400 0x00000000 0x0009ec00 "u-boot-dtb.imx"
 1.3.1 Avoiding Kernel crash when OP-TEE is enabled
 ---------------------------------------------------
 For devices prior to HAB v4.4.0, the HAB code locks the Job Ring and DECO
 master ID registers in HAB closed configuration. In case the user specific
 application requires any changes in CAAM MID registers it's necessary to
 add the "Unlock CAAM MID" command in CSF file.
 The current NXP OP-TEE implementation expects the CAAM registers to be unlocked
 when configuring CAAM to operate in non-secure TrustZone world.
 - Add Unlock MID command in CSF:
   [Unlock]
       Engine = CAAM
       Features = MID
 1.4 Signing the U-Boot binary
 ------------------------------
 The CST tool is used for singing the U-Boot binary and generating a CSF binary,
 users should input the CSF description file created in the step above and
 should receive a CSF binary, which contains the CSF commands, SRK table,
 signatures and certificates.
 - Create CSF binary file:
   $ ./cst -i csf_uboot.txt -o csf_uboot.bin
 - Append CSF signature to the end of U-Boot image:
   $ cat u-boot-dtb.imx csf_uboot.bin > u-boot-signed.imx
 The u-boot-signed.imx is the signed binary and should be flashed into the boot
 media.
 - Flash signed U-Boot binary:
   $ sudo dd if=u-boot-signed.imx of=/dev/sd<x> bs=1K seek=1 && sync
 1.5 Programming SRK Hash
 -------------------------
 As explained in AN4581[1] and in introduction_habv4.txt document the SRK Hash
 fuse values are generated by the srktool and should be programmed in the
 SoC SRK_HASH[255:0] fuses.
 Be careful when programming these values, as this data is the basis for the
 root of trust. An error in SRK Hash results in a part that does not boot.
 The U-Boot fuse tool can be used for programming eFuses on i.MX SoCs.
 - Dump SRK Hash fuses values in host machine:
   $ hexdump -e '/4 "0x"' -e '/4 "%X""\n"' SRK_1_2_3_4_fuse.bin
   0x20593752
   0x6ACE6962
   0x26E0D06C
   0xFC600661
   0x1240E88F
   0x1209F144
   0x831C8117
   0x1190FD4D
 - Program SRK_HASH[255:0] fuses, using i.MX6 series as example:
   => fuse prog 3 0 0x20593752
   => fuse prog 3 1 0x6ACE6962
   => fuse prog 3 2 0x26E0D06C
   => fuse prog 3 3 0xFC600661
   => fuse prog 3 4 0x1240E88F
   => fuse prog 3 5 0x1209F144
   => fuse prog 3 6 0x831C8117
   => fuse prog 3 7 0x1190FD4D
 The table below lists the SRK_HASH bank and word according to the i.MX device:
     +-------------------+---------------+---------------+---------------+
     |                   |  i.MX6 Series |    i.MX7D/S   |    i.MX7ULP   |
     +-------------------+---------------+---------------+---------------+
     | SRK_HASH[31:00]   | bank 3 word 0 | bank 6 word 0 | bank 5 word 0 |
     +-------------------+---------------+---------------+---------------+
     | SRK_HASH[63:32]   | bank 3 word 1 | bank 6 word 1 | bank 5 word 1 |
     +-------------------+---------------+---------------+---------------+
     | SRK_HASH[95:64]   | bank 3 word 2 | bank 6 word 2 | bank 5 word 2 |
     +-------------------+---------------+---------------+---------------+
     | SRK_HASH[127:96]  | bank 3 word 3 | bank 6 word 3 | bank 5 word 3 |
     +-------------------+---------------+---------------+---------------+
     | SRK_HASH[159:128] | bank 3 word 4 | bank 7 word 0 | bank 5 word 4 |
     +-------------------+---------------+---------------+---------------+
     | SRK_HASH[191:160] | bank 3 word 5 | bank 7 word 1 | bank 5 word 5 |
     +-------------------+---------------+---------------+---------------+
     | SRK_HASH[223:192] | bank 3 word 6 | bank 7 word 2 | bank 5 word 6 |
     +-------------------+---------------+---------------+---------------+
     | SRK_HASH[255:224] | bank 3 word 7 | bank 7 word 3 | bank 5 word 7 |
     +-------------------+---------------+---------------+---------------+
 1.6 Verifying HAB events
 -------------------------
 The next step is to verify that the signature attached to U-Boot is
 successfully processed without errors. HAB generates events when processing
 the commands if it encounters issues.
 The hab_status U-Boot command call the hab_report_event() and hab_status()
 HAB API functions to verify the processor security configuration and status.
 This command displays any events that were generated during the process.
 Prior to closing the device users should ensure no HAB events were found, as
 the example below:
 - Verify HAB events:
   => hab_status
   Secure boot disabled
   HAB Configuration: 0xf0, HAB State: 0x66
   No HAB Events Found!
+1.6.1 Verifying HAB events in i.MX7ULP
+---------------------------------------
+When booting i.MX7ULP in low power or dual boot modes the M4 binary is
+authenticated by an independent HAB in M4 ROM code using a
+different SRK key set.
+The U-Boot provides a M4 option in hab_status command so users can retrieve
+M4 HAB failure and warning events.
+- Verify HAB M4 events:
+  => hab_status m4
+  Secure boot disabled
+  HAB Configuration: 0xf0, HAB State: 0x66
+  No HAB Events Found!
+As HAB M4 API cannot be called from A7 core the command is parsing the M4 HAB
+persistent memory region, M4 software should not modify this reserved region.
+Details about HAB persistent memory region can be found in AN12263[2].
 1.7 Closing the device
 -----------------------
 After the device successfully boots a signed image without generating any HAB
 events, it is safe to close the device. This is the last step in the HAB
 process, and is achieved by programming the SEC_CONFIG[1] fuse bit.
 Once the fuse is programmed, the chip does not load an image that has not been
 signed using the correct PKI tree.
 - Program SEC_CONFIG[1] fuse, using i.MX6 series as example:
   => fuse prog 0 6 0x00000002
 The table below list the SEC_CONFIG[1] bank and word according to the i.MX
 device:
              +--------------+-----------------+------------+
              |    Device    |  Bank and Word  |    Value   |
              +--------------+-----------------+------------+
              | i.MX6 Series |  bank 0 word 6  | 0x00000002 |
              +--------------+-----------------+------------+
              | i.MX7D/S     |  bank 1 word 3  | 0x02000000 |
              +--------------+-----------------+------------+
              | i.MX7ULP     |  bank 29 word 6 | 0x80000000 |
              +--------------+-----------------+------------+
 1.8 Completely secure the device
 ---------------------------------
 Additional fuses can be programmed for completely secure the device, more
 details about these fuses and their possible impact can be found at AN4581[1].
 - Program SRK_LOCK, using i.MX6 series as example:
   => fuse prog 0 0 0x4000
 - Program DIR_BT_DIS, using i.MX6 series as example:
   => fuse prog 0 6 0x8
 - Program SJC_DISABLE, using i.MX6 series as example:
   => fuse prog 0 6 0x100000
 - JTAG_SMODE, using i.MX6 series as example:
   => fuse prog 0 6 0xC00000
 The table below list the SRK_LOCK, DIR_BT_DIS, SJC_DISABLE, and JTAG_SMODE bank
 and word according to the i.MX device:
               +--------------+---------------+------------+
               |    Device    | Bank and Word |   Value    |
               +--------------+---------------+------------+
               |                  SRK_LOCK                 |
               +-------------------------------------------+
               | i.MX6 Series | bank 0 word 0 | 0x00004000 |
               +--------------+---------------+------------+
               | i.MX7D/S     | bank 0 word 0 | 0x00000200 |
               +--------------+---------------+------------+
               | i.MX7ULP     | bank 1 word 1 | 0x00000080 |
               +--------------+---------------+------------+
               |                 DIR_BT_DIS                |
               +-------------------------------------------+
               | i.MX6 Series | bank 0 word 6 | 0x00000008 |
               +--------------+---------------+------------+
               | i.MX7D/S     | bank 1 word 3 | 0x08000000 |
               +--------------+---------------+------------+
               | i.MX7ULP     | bank 1 word 1 | 0x00002000 |
               +--------------+---------------+------------+
               |                 SJC_DISABLE               |
               +-------------------------------------------+
               | i.MX6 Series | bank 0 word 6 | 0x00100000 |
               +--------------+---------------+------------+
               | i.MX7D/S     | bank 1 word 3 | 0x00200000 |
               +--------------+---------------+------------+
               | i.MX7ULP     | bank 1 word 1 | 0x00000020 |
               +--------------+---------------+------------+
               |                 JTAG_SMODE                |
               +-------------------------------------------+
               | i.MX6 Series | bank 0 word 6 | 0x00C00000 |
               +--------------+---------------+------------+
               | i.MX7D/S     | bank 1 word 3 | 0x00C00000 |
               +--------------+---------------+------------+
               | i.MX7ULP     | bank 1 word 1 | 0x000000C0 |
               +--------------+---------------+------------+
 2. Extending the root of trust
 -------------------------------
 The High Assurance Boot (HAB) code located in the on-chip ROM provides an
 Application Programming Interface (API) making it possible to call back
 into the HAB code for authenticating additional boot images.
 The U-Boot supports this feature and can be used to authenticate the Linux
 Kernel Image.
 The process of signing an additional image is similar to the U-Boot.
 The diagram below illustrate the zImage layout:
             ------- +-----------------------------+ <-- *load_address
                 ^   |                             |
                 |   |                             |
                 |   |                             |
                 |   |                             |
                 |   |           zImage            |
          Signed |   |                             |
           Data  |   |                             |
                 |   |                             |
                 |   +-----------------------------+
                 |   |    Padding Next Boundary    |
                 |   +-----------------------------+ <-- *ivt
                 v   |     Image Vector Table      |
             ------- +-----------------------------+ <-- *csf
                     |                             |
                     | Command Sequence File (CSF) |
                     |                             |
                     +-----------------------------+
                     |     Padding (optional)      |
                     +-----------------------------+
 2.1 Padding the image
 ----------------------
 The zImage must be padded to the next boundary address (0x1000), for instance
 if the image size is 0x649920 it must be padded to 0x64A000.
 The tool objcopy can be used for padding the image.
 - Pad the zImage:
   $ objcopy -I binary -O binary --pad-to 0x6EA000 --gap-fill=0x00 \
 	zImage zImage_pad.bin
 2.2 Generating Image Vector Table
 ----------------------------------
 The HAB code requires an Image Vector Table (IVT) for determining the image
 length and the CSF location. Since zImage does not include an IVT this has
 to be manually created and appended to the end of the padded zImage, the
 script genIVT.pl in script_examples directory can be used as reference.
 - Generate IVT:
   $ genIVT.pl
 Note: The load Address may change depending on the device.
 - Append the ivt.bin at the end of the padded zImage:
   $ cat zImage_pad.bin ivt.bin > zImage_pad_ivt.bin
 2.3 Signing the image
 ----------------------
 A CSF file has to be created to sign the image. HAB does not allow to change
 the SRK once the first image is authenticated, so the same SRK key used in
 U-Boot must be used when extending the root of trust.
 CSF examples are available in ../csf_examples/additional_images/
 directory.
 - Create CSF binary file:
   $ ./cst --i csf_additional_images.txt --o csf_zImage.bin
 - Attach the CSF binary to the end of the image:
   $ cat zImage_pad_ivt.bin csf_zImage.bin > zImage_signed.bin
 2.4 Verifying HAB events
 -------------------------
 The U-Boot includes the hab_auth_img command which can be used for
 authenticating and troubleshooting the signed image, zImage must be
 loaded at the load address specified in the IVT.
 - Authenticate additional image:
   => hab_auth_img <Load Address> <Image Size> <IVT Offset>
 If no HAB events were found the zImage is successfully signed.
 References:
 [1] AN4581: "Secure Boot on i.MX 50, i.MX 53, i.MX 6 and i.MX 7 Series using
  HABv4" - Rev 2.
+[2] AN12263: "HABv4 RVT Guidelines and Recommendations" - Rev 0.