Commit eb5e129a0a1e33003af103bf63939f5c9ae339e2
Committed by
Tom Rini
1 parent
26f7c111fb
Exists in
v2017.01-smarct4x
and in
37 other branches
mcx: update maintainer and convert to generic board
Remove obsolete email address from MAINTAINERS. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Tom Rini <trini@konsulko.com>
Showing 2 changed files with 3 additions and 1 deletions Inline Diff
board/htkw/mcx/MAINTAINERS
1 | MCX BOARD | 1 | MCX BOARD |
2 | M: Ilya Yanok <yanok@emcraft.com> | 2 | M: Anatolij Gustschin <agust@denx.de> |
3 | S: Maintained | 3 | S: Maintained |
4 | F: board/htkw/mcx/ | 4 | F: board/htkw/mcx/ |
5 | F: include/configs/mcx.h | 5 | F: include/configs/mcx.h |
6 | F: configs/mcx_defconfig | 6 | F: configs/mcx_defconfig |
7 | 7 |
include/configs/mcx.h
1 | /* | 1 | /* |
2 | * Copyright (C) 2011 Ilya Yanok, Emcraft Systems | 2 | * Copyright (C) 2011 Ilya Yanok, Emcraft Systems |
3 | * | 3 | * |
4 | * Based on omap3_evm_config.h | 4 | * Based on omap3_evm_config.h |
5 | * | 5 | * |
6 | * SPDX-License-Identifier: GPL-2.0+ | 6 | * SPDX-License-Identifier: GPL-2.0+ |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #ifndef __CONFIG_H | 9 | #ifndef __CONFIG_H |
10 | #define __CONFIG_H | 10 | #define __CONFIG_H |
11 | 11 | ||
12 | /* | 12 | /* |
13 | * High Level Configuration Options | 13 | * High Level Configuration Options |
14 | */ | 14 | */ |
15 | #define CONFIG_OMAP /* in a TI OMAP core */ | 15 | #define CONFIG_OMAP /* in a TI OMAP core */ |
16 | #define CONFIG_OMAP3_MCX /* working with mcx */ | 16 | #define CONFIG_OMAP3_MCX /* working with mcx */ |
17 | #define CONFIG_OMAP_GPIO | 17 | #define CONFIG_OMAP_GPIO |
18 | #define CONFIG_OMAP_COMMON | 18 | #define CONFIG_OMAP_COMMON |
19 | /* Common ARM Erratas */ | 19 | /* Common ARM Erratas */ |
20 | #define CONFIG_ARM_ERRATA_454179 | 20 | #define CONFIG_ARM_ERRATA_454179 |
21 | #define CONFIG_ARM_ERRATA_430973 | 21 | #define CONFIG_ARM_ERRATA_430973 |
22 | #define CONFIG_ARM_ERRATA_621766 | 22 | #define CONFIG_ARM_ERRATA_621766 |
23 | 23 | ||
24 | #define MACH_TYPE_MCX 3656 | 24 | #define MACH_TYPE_MCX 3656 |
25 | #define CONFIG_MACH_TYPE MACH_TYPE_MCX | 25 | #define CONFIG_MACH_TYPE MACH_TYPE_MCX |
26 | #define CONFIG_BOARD_LATE_INIT | 26 | #define CONFIG_BOARD_LATE_INIT |
27 | 27 | ||
28 | #define CONFIG_SYS_GENERIC_BOARD | ||
29 | |||
28 | #define CONFIG_SYS_CACHELINE_SIZE 64 | 30 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
29 | 31 | ||
30 | #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ | 32 | #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ |
31 | 33 | ||
32 | #include <asm/arch/cpu.h> /* get chip and board defs */ | 34 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
33 | #include <asm/arch/omap.h> | 35 | #include <asm/arch/omap.h> |
34 | 36 | ||
35 | #define CONFIG_OF_LIBFDT | 37 | #define CONFIG_OF_LIBFDT |
36 | #define CONFIG_FIT | 38 | #define CONFIG_FIT |
37 | 39 | ||
38 | /* | 40 | /* |
39 | * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader | 41 | * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader |
40 | * and older u-boot.bin with the new U-Boot SPL. | 42 | * and older u-boot.bin with the new U-Boot SPL. |
41 | */ | 43 | */ |
42 | #define CONFIG_SYS_TEXT_BASE 0x80008000 | 44 | #define CONFIG_SYS_TEXT_BASE 0x80008000 |
43 | 45 | ||
44 | /* | 46 | /* |
45 | * Display CPU and Board information | 47 | * Display CPU and Board information |
46 | */ | 48 | */ |
47 | #define CONFIG_DISPLAY_CPUINFO | 49 | #define CONFIG_DISPLAY_CPUINFO |
48 | #define CONFIG_DISPLAY_BOARDINFO | 50 | #define CONFIG_DISPLAY_BOARDINFO |
49 | 51 | ||
50 | /* Clock Defines */ | 52 | /* Clock Defines */ |
51 | #define V_OSCK 26000000 /* Clock output from T2 */ | 53 | #define V_OSCK 26000000 /* Clock output from T2 */ |
52 | #define V_SCLK (V_OSCK >> 1) | 54 | #define V_SCLK (V_OSCK >> 1) |
53 | 55 | ||
54 | #define CONFIG_MISC_INIT_R | 56 | #define CONFIG_MISC_INIT_R |
55 | 57 | ||
56 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ | 58 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
57 | #define CONFIG_SETUP_MEMORY_TAGS | 59 | #define CONFIG_SETUP_MEMORY_TAGS |
58 | #define CONFIG_INITRD_TAG | 60 | #define CONFIG_INITRD_TAG |
59 | #define CONFIG_REVISION_TAG | 61 | #define CONFIG_REVISION_TAG |
60 | 62 | ||
61 | /* | 63 | /* |
62 | * Size of malloc() pool | 64 | * Size of malloc() pool |
63 | */ | 65 | */ |
64 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ | 66 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ |
65 | #define CONFIG_SYS_MALLOC_LEN (1024 << 10) | 67 | #define CONFIG_SYS_MALLOC_LEN (1024 << 10) |
66 | /* | 68 | /* |
67 | * DDR related | 69 | * DDR related |
68 | */ | 70 | */ |
69 | #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) | 71 | #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) |
70 | 72 | ||
71 | /* | 73 | /* |
72 | * Hardware drivers | 74 | * Hardware drivers |
73 | */ | 75 | */ |
74 | 76 | ||
75 | /* | 77 | /* |
76 | * NS16550 Configuration | 78 | * NS16550 Configuration |
77 | */ | 79 | */ |
78 | #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ | 80 | #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ |
79 | 81 | ||
80 | #define CONFIG_SYS_NS16550 | 82 | #define CONFIG_SYS_NS16550 |
81 | #define CONFIG_SYS_NS16550_SERIAL | 83 | #define CONFIG_SYS_NS16550_SERIAL |
82 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | 84 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
83 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK | 85 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK |
84 | 86 | ||
85 | /* | 87 | /* |
86 | * select serial console configuration | 88 | * select serial console configuration |
87 | */ | 89 | */ |
88 | #define CONFIG_CONS_INDEX 3 | 90 | #define CONFIG_CONS_INDEX 3 |
89 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 | 91 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 |
90 | #define CONFIG_SERIAL3 3 /* UART3 */ | 92 | #define CONFIG_SERIAL3 3 /* UART3 */ |
91 | 93 | ||
92 | /* allow to overwrite serial and ethaddr */ | 94 | /* allow to overwrite serial and ethaddr */ |
93 | #define CONFIG_ENV_OVERWRITE | 95 | #define CONFIG_ENV_OVERWRITE |
94 | #define CONFIG_BAUDRATE 115200 | 96 | #define CONFIG_BAUDRATE 115200 |
95 | #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ | 97 | #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ |
96 | 115200} | 98 | 115200} |
97 | #define CONFIG_MMC | 99 | #define CONFIG_MMC |
98 | #define CONFIG_OMAP_HSMMC | 100 | #define CONFIG_OMAP_HSMMC |
99 | #define CONFIG_GENERIC_MMC | 101 | #define CONFIG_GENERIC_MMC |
100 | #define CONFIG_DOS_PARTITION | 102 | #define CONFIG_DOS_PARTITION |
101 | 103 | ||
102 | /* EHCI */ | 104 | /* EHCI */ |
103 | #define CONFIG_USB_STORAGE | 105 | #define CONFIG_USB_STORAGE |
104 | #define CONFIG_OMAP3_GPIO_2 | 106 | #define CONFIG_OMAP3_GPIO_2 |
105 | #define CONFIG_OMAP3_GPIO_5 | 107 | #define CONFIG_OMAP3_GPIO_5 |
106 | #define CONFIG_USB_EHCI | 108 | #define CONFIG_USB_EHCI |
107 | #define CONFIG_USB_EHCI_OMAP | 109 | #define CONFIG_USB_EHCI_OMAP |
108 | #define CONFIG_USB_ULPI | 110 | #define CONFIG_USB_ULPI |
109 | #define CONFIG_USB_ULPI_VIEWPORT_OMAP | 111 | #define CONFIG_USB_ULPI_VIEWPORT_OMAP |
110 | #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57 | 112 | #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57 |
111 | #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 | 113 | #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 |
112 | 114 | ||
113 | /* commands to include */ | 115 | /* commands to include */ |
114 | #include <config_cmd_default.h> | 116 | #include <config_cmd_default.h> |
115 | 117 | ||
116 | #define CONFIG_CMD_EXT2 /* EXT2 Support */ | 118 | #define CONFIG_CMD_EXT2 /* EXT2 Support */ |
117 | #define CONFIG_CMD_FAT /* FAT support */ | 119 | #define CONFIG_CMD_FAT /* FAT support */ |
118 | #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ | 120 | #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ |
119 | 121 | ||
120 | #define CONFIG_CMD_DATE | 122 | #define CONFIG_CMD_DATE |
121 | #define CONFIG_CMD_I2C /* I2C serial bus support */ | 123 | #define CONFIG_CMD_I2C /* I2C serial bus support */ |
122 | #define CONFIG_CMD_MMC /* MMC support */ | 124 | #define CONFIG_CMD_MMC /* MMC support */ |
123 | #define CONFIG_CMD_FAT /* FAT support */ | 125 | #define CONFIG_CMD_FAT /* FAT support */ |
124 | #define CONFIG_CMD_USB | 126 | #define CONFIG_CMD_USB |
125 | #define CONFIG_CMD_NAND /* NAND support */ | 127 | #define CONFIG_CMD_NAND /* NAND support */ |
126 | #define CONFIG_CMD_DHCP | 128 | #define CONFIG_CMD_DHCP |
127 | #define CONFIG_CMD_PING | 129 | #define CONFIG_CMD_PING |
128 | #define CONFIG_CMD_CACHE | 130 | #define CONFIG_CMD_CACHE |
129 | #define CONFIG_CMD_UBI | 131 | #define CONFIG_CMD_UBI |
130 | #define CONFIG_CMD_UBIFS | 132 | #define CONFIG_CMD_UBIFS |
131 | #define CONFIG_RBTREE | 133 | #define CONFIG_RBTREE |
132 | #define CONFIG_LZO | 134 | #define CONFIG_LZO |
133 | #define CONFIG_MTD_PARTITIONS | 135 | #define CONFIG_MTD_PARTITIONS |
134 | #define CONFIG_MTD_DEVICE | 136 | #define CONFIG_MTD_DEVICE |
135 | #define CONFIG_CMD_MTDPARTS | 137 | #define CONFIG_CMD_MTDPARTS |
136 | #define CONFIG_CMD_GPIO | 138 | #define CONFIG_CMD_GPIO |
137 | 139 | ||
138 | #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ | 140 | #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ |
139 | #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ | 141 | #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ |
140 | #undef CONFIG_CMD_IMI /* iminfo */ | 142 | #undef CONFIG_CMD_IMI /* iminfo */ |
141 | #undef CONFIG_CMD_IMLS /* List all found images */ | 143 | #undef CONFIG_CMD_IMLS /* List all found images */ |
142 | 144 | ||
143 | #define CONFIG_SYS_NO_FLASH | 145 | #define CONFIG_SYS_NO_FLASH |
144 | #define CONFIG_SYS_I2C | 146 | #define CONFIG_SYS_I2C |
145 | #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 | 147 | #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 |
146 | #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 | 148 | #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 |
147 | #define CONFIG_SYS_I2C_OMAP34XX | 149 | #define CONFIG_SYS_I2C_OMAP34XX |
148 | 150 | ||
149 | /* RTC */ | 151 | /* RTC */ |
150 | #define CONFIG_RTC_DS1337 | 152 | #define CONFIG_RTC_DS1337 |
151 | #define CONFIG_SYS_I2C_RTC_ADDR 0x68 | 153 | #define CONFIG_SYS_I2C_RTC_ADDR 0x68 |
152 | 154 | ||
153 | #define CONFIG_CMD_NET | 155 | #define CONFIG_CMD_NET |
154 | #define CONFIG_CMD_MII | 156 | #define CONFIG_CMD_MII |
155 | #define CONFIG_CMD_NFS | 157 | #define CONFIG_CMD_NFS |
156 | /* | 158 | /* |
157 | * Board NAND Info. | 159 | * Board NAND Info. |
158 | */ | 160 | */ |
159 | #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ | 161 | #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
160 | /* to access nand */ | 162 | /* to access nand */ |
161 | #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ | 163 | #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ |
162 | /* to access */ | 164 | /* to access */ |
163 | /* nand at CS0 */ | 165 | /* nand at CS0 */ |
164 | 166 | ||
165 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ | 167 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ |
166 | /* NAND devices */ | 168 | /* NAND devices */ |
167 | #define CONFIG_JFFS2_NAND | 169 | #define CONFIG_JFFS2_NAND |
168 | /* nand device jffs2 lives on */ | 170 | /* nand device jffs2 lives on */ |
169 | #define CONFIG_JFFS2_DEV "nand0" | 171 | #define CONFIG_JFFS2_DEV "nand0" |
170 | /* start of jffs2 partition */ | 172 | /* start of jffs2 partition */ |
171 | #define CONFIG_JFFS2_PART_OFFSET 0x680000 | 173 | #define CONFIG_JFFS2_PART_OFFSET 0x680000 |
172 | #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */ | 174 | #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */ |
173 | 175 | ||
174 | /* Environment information */ | 176 | /* Environment information */ |
175 | #define CONFIG_BOOTDELAY 3 | 177 | #define CONFIG_BOOTDELAY 3 |
176 | 178 | ||
177 | #define CONFIG_BOOTFILE "uImage" | 179 | #define CONFIG_BOOTFILE "uImage" |
178 | 180 | ||
179 | /* Setup MTD for NAND on the SOM */ | 181 | /* Setup MTD for NAND on the SOM */ |
180 | #define MTDIDS_DEFAULT "nand0=omap2-nand.0" | 182 | #define MTDIDS_DEFAULT "nand0=omap2-nand.0" |
181 | #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \ | 183 | #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \ |
182 | "1m(u-boot),256k(env1)," \ | 184 | "1m(u-boot),256k(env1)," \ |
183 | "256k(env2),6m(kernel),6m(k_recovery)," \ | 185 | "256k(env2),6m(kernel),6m(k_recovery)," \ |
184 | "8m(fs_recovery),-(common_data)" | 186 | "8m(fs_recovery),-(common_data)" |
185 | 187 | ||
186 | #define CONFIG_HOSTNAME mcx | 188 | #define CONFIG_HOSTNAME mcx |
187 | #define CONFIG_EXTRA_ENV_SETTINGS \ | 189 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
188 | "adddbg=setenv bootargs ${bootargs} trace_buf_size=64M\0" \ | 190 | "adddbg=setenv bootargs ${bootargs} trace_buf_size=64M\0" \ |
189 | "adddebug=setenv bootargs ${bootargs} earlyprintk=serial\0" \ | 191 | "adddebug=setenv bootargs ${bootargs} earlyprintk=serial\0" \ |
190 | "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ | 192 | "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ |
191 | "addfb=setenv bootargs ${bootargs} vram=6M " \ | 193 | "addfb=setenv bootargs ${bootargs} vram=6M " \ |
192 | "omapfb.vram=1:2M,2:2M,3:2M omapdss.def_disp=lcd\0" \ | 194 | "omapfb.vram=1:2M,2:2M,3:2M omapdss.def_disp=lcd\0" \ |
193 | "addip_sta=setenv bootargs ${bootargs} " \ | 195 | "addip_sta=setenv bootargs ${bootargs} " \ |
194 | "ip=${ipaddr}:${serverip}:${gatewayip}:" \ | 196 | "ip=${ipaddr}:${serverip}:${gatewayip}:" \ |
195 | "${netmask}:${hostname}:eth0:off\0" \ | 197 | "${netmask}:${hostname}:eth0:off\0" \ |
196 | "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ | 198 | "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ |
197 | "addip=if test -n ${ipdyn};then run addip_dyn;" \ | 199 | "addip=if test -n ${ipdyn};then run addip_dyn;" \ |
198 | "else run addip_sta;fi\0" \ | 200 | "else run addip_sta;fi\0" \ |
199 | "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ | 201 | "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ |
200 | "addtty=setenv bootargs ${bootargs} " \ | 202 | "addtty=setenv bootargs ${bootargs} " \ |
201 | "console=${consoledev},${baudrate}\0" \ | 203 | "console=${consoledev},${baudrate}\0" \ |
202 | "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ | 204 | "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ |
203 | "baudrate=115200\0" \ | 205 | "baudrate=115200\0" \ |
204 | "consoledev=ttyO2\0" \ | 206 | "consoledev=ttyO2\0" \ |
205 | "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ | 207 | "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ |
206 | "loadaddr=0x82000000\0" \ | 208 | "loadaddr=0x82000000\0" \ |
207 | "load=tftp ${loadaddr} ${u-boot}\0" \ | 209 | "load=tftp ${loadaddr} ${u-boot}\0" \ |
208 | "load_k=tftp ${loadaddr} ${bootfile}\0" \ | 210 | "load_k=tftp ${loadaddr} ${bootfile}\0" \ |
209 | "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ | 211 | "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ |
210 | "loadmlo=tftp ${loadaddr} ${mlo}\0" \ | 212 | "loadmlo=tftp ${loadaddr} ${mlo}\0" \ |
211 | "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \ | 213 | "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \ |
212 | "mmcargs=root=/dev/mmcblk0p2 rw " \ | 214 | "mmcargs=root=/dev/mmcblk0p2 rw " \ |
213 | "rootfstype=ext3 rootwait\0" \ | 215 | "rootfstype=ext3 rootwait\0" \ |
214 | "mmcboot=echo Booting from mmc ...; " \ | 216 | "mmcboot=echo Booting from mmc ...; " \ |
215 | "run mmcargs; " \ | 217 | "run mmcargs; " \ |
216 | "run addip addtty addmtd addfb addeth addmisc;" \ | 218 | "run addip addtty addmtd addfb addeth addmisc;" \ |
217 | "run loaduimage; " \ | 219 | "run loaduimage; " \ |
218 | "bootm ${loadaddr}\0" \ | 220 | "bootm ${loadaddr}\0" \ |
219 | "net_nfs=run load_k; " \ | 221 | "net_nfs=run load_k; " \ |
220 | "run nfsargs; " \ | 222 | "run nfsargs; " \ |
221 | "run addip addtty addmtd addfb addeth addmisc;" \ | 223 | "run addip addtty addmtd addfb addeth addmisc;" \ |
222 | "bootm ${loadaddr}\0" \ | 224 | "bootm ${loadaddr}\0" \ |
223 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ | 225 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ |
224 | "nfsroot=${serverip}:${rootpath}\0" \ | 226 | "nfsroot=${serverip}:${rootpath}\0" \ |
225 | "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \ | 227 | "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \ |
226 | "uboot_addr=0x80000\0" \ | 228 | "uboot_addr=0x80000\0" \ |
227 | "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ | 229 | "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ |
228 | "nand write ${loadaddr} ${uboot_addr} 80000\0" \ | 230 | "nand write ${loadaddr} ${uboot_addr} 80000\0" \ |
229 | "updatemlo=nandecc hw;nand erase 0 20000;" \ | 231 | "updatemlo=nandecc hw;nand erase 0 20000;" \ |
230 | "nand write ${loadaddr} 0 20000\0" \ | 232 | "nand write ${loadaddr} 0 20000\0" \ |
231 | "upd=if run load;then echo Updating u-boot;if run update;" \ | 233 | "upd=if run load;then echo Updating u-boot;if run update;" \ |
232 | "then echo U-Boot updated;" \ | 234 | "then echo U-Boot updated;" \ |
233 | "else echo Error updating u-boot !;" \ | 235 | "else echo Error updating u-boot !;" \ |
234 | "echo Board without bootloader !!;" \ | 236 | "echo Board without bootloader !!;" \ |
235 | "fi;" \ | 237 | "fi;" \ |
236 | "else echo U-Boot not downloaded..exiting;fi\0" \ | 238 | "else echo U-Boot not downloaded..exiting;fi\0" \ |
237 | "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ | 239 | "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ |
238 | "bootscript=echo Running bootscript from mmc ...; " \ | 240 | "bootscript=echo Running bootscript from mmc ...; " \ |
239 | "source ${loadaddr}\0" \ | 241 | "source ${loadaddr}\0" \ |
240 | "nandargs=setenv bootargs ubi.mtd=7 " \ | 242 | "nandargs=setenv bootargs ubi.mtd=7 " \ |
241 | "root=ubi0:rootfs rootfstype=ubifs\0" \ | 243 | "root=ubi0:rootfs rootfstype=ubifs\0" \ |
242 | "nandboot=echo Booting from nand ...; " \ | 244 | "nandboot=echo Booting from nand ...; " \ |
243 | "run nandargs; " \ | 245 | "run nandargs; " \ |
244 | "ubi part nand0,4;" \ | 246 | "ubi part nand0,4;" \ |
245 | "ubi readvol ${loadaddr} kernel;" \ | 247 | "ubi readvol ${loadaddr} kernel;" \ |
246 | "run addtty addmtd addfb addeth addmisc;" \ | 248 | "run addtty addmtd addfb addeth addmisc;" \ |
247 | "bootm ${loadaddr}\0" \ | 249 | "bootm ${loadaddr}\0" \ |
248 | "preboot=ubi part nand0,7;" \ | 250 | "preboot=ubi part nand0,7;" \ |
249 | "ubi readvol ${loadaddr} splash;" \ | 251 | "ubi readvol ${loadaddr} splash;" \ |
250 | "bmp display ${loadaddr};" \ | 252 | "bmp display ${loadaddr};" \ |
251 | "gpio set 55\0" \ | 253 | "gpio set 55\0" \ |
252 | "swupdate_args=setenv bootargs root=/dev/ram " \ | 254 | "swupdate_args=setenv bootargs root=/dev/ram " \ |
253 | "quiet loglevel=1 " \ | 255 | "quiet loglevel=1 " \ |
254 | "consoleblank=0 ${swupdate_misc}\0" \ | 256 | "consoleblank=0 ${swupdate_misc}\0" \ |
255 | "swupdate=echo Running Sw-Update...;" \ | 257 | "swupdate=echo Running Sw-Update...;" \ |
256 | "if printenv mtdparts;then echo Starting SwUpdate...; " \ | 258 | "if printenv mtdparts;then echo Starting SwUpdate...; " \ |
257 | "else mtdparts default;fi; " \ | 259 | "else mtdparts default;fi; " \ |
258 | "ubi part nand0,5;" \ | 260 | "ubi part nand0,5;" \ |
259 | "ubi readvol 0x82000000 kernel_recovery;" \ | 261 | "ubi readvol 0x82000000 kernel_recovery;" \ |
260 | "ubi part nand0,6;" \ | 262 | "ubi part nand0,6;" \ |
261 | "ubi readvol 0x84000000 fs_recovery;" \ | 263 | "ubi readvol 0x84000000 fs_recovery;" \ |
262 | "run swupdate_args; " \ | 264 | "run swupdate_args; " \ |
263 | "setenv bootargs ${bootargs} " \ | 265 | "setenv bootargs ${bootargs} " \ |
264 | "${mtdparts} " \ | 266 | "${mtdparts} " \ |
265 | "vram=6M omapfb.vram=1:2M,2:2M,3:2M " \ | 267 | "vram=6M omapfb.vram=1:2M,2:2M,3:2M " \ |
266 | "omapdss.def_disp=lcd;" \ | 268 | "omapdss.def_disp=lcd;" \ |
267 | "bootm 0x82000000 0x84000000\0" \ | 269 | "bootm 0x82000000 0x84000000\0" \ |
268 | "bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;" \ | 270 | "bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;" \ |
269 | "then source 82000000;else run nandboot;fi\0" | 271 | "then source 82000000;else run nandboot;fi\0" |
270 | 272 | ||
271 | #define CONFIG_AUTO_COMPLETE | 273 | #define CONFIG_AUTO_COMPLETE |
272 | #define CONFIG_CMDLINE_EDITING | 274 | #define CONFIG_CMDLINE_EDITING |
273 | 275 | ||
274 | /* | 276 | /* |
275 | * Miscellaneous configurable options | 277 | * Miscellaneous configurable options |
276 | */ | 278 | */ |
277 | #define V_PROMPT "mcx # " | 279 | #define V_PROMPT "mcx # " |
278 | 280 | ||
279 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | 281 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
280 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ | 282 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ |
281 | #define CONFIG_SYS_PROMPT V_PROMPT | 283 | #define CONFIG_SYS_PROMPT V_PROMPT |
282 | #define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */ | 284 | #define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */ |
283 | /* Print Buffer Size */ | 285 | /* Print Buffer Size */ |
284 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | 286 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
285 | sizeof(CONFIG_SYS_PROMPT) + 16) | 287 | sizeof(CONFIG_SYS_PROMPT) + 16) |
286 | #define CONFIG_SYS_MAXARGS 16 /* max number of command */ | 288 | #define CONFIG_SYS_MAXARGS 16 /* max number of command */ |
287 | /* args */ | 289 | /* args */ |
288 | /* Boot Argument Buffer Size */ | 290 | /* Boot Argument Buffer Size */ |
289 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) | 291 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) |
290 | /* memtest works on */ | 292 | /* memtest works on */ |
291 | #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) | 293 | #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) |
292 | #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ | 294 | #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ |
293 | 0x01F00000) /* 31MB */ | 295 | 0x01F00000) /* 31MB */ |
294 | 296 | ||
295 | #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ | 297 | #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ |
296 | /* address */ | 298 | /* address */ |
297 | #define CONFIG_PREBOOT | 299 | #define CONFIG_PREBOOT |
298 | 300 | ||
299 | /* | 301 | /* |
300 | * AM3517 has 12 GP timers, they can be driven by the system clock | 302 | * AM3517 has 12 GP timers, they can be driven by the system clock |
301 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). | 303 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). |
302 | * This rate is divided by a local divisor. | 304 | * This rate is divided by a local divisor. |
303 | */ | 305 | */ |
304 | #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 | 306 | #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 |
305 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ | 307 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ |
306 | 308 | ||
307 | /* | 309 | /* |
308 | * Physical Memory Map | 310 | * Physical Memory Map |
309 | */ | 311 | */ |
310 | #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ | 312 | #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ |
311 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 | 313 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 |
312 | #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 | 314 | #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 |
313 | 315 | ||
314 | /* | 316 | /* |
315 | * FLASH and environment organization | 317 | * FLASH and environment organization |
316 | */ | 318 | */ |
317 | 319 | ||
318 | /* **** PISMO SUPPORT *** */ | 320 | /* **** PISMO SUPPORT *** */ |
319 | #define CONFIG_NAND_OMAP_GPMC | 321 | #define CONFIG_NAND_OMAP_GPMC |
320 | #define CONFIG_ENV_IS_IN_NAND | 322 | #define CONFIG_ENV_IS_IN_NAND |
321 | #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */ | 323 | #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */ |
322 | 324 | ||
323 | /* Redundant Environment */ | 325 | /* Redundant Environment */ |
324 | #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ | 326 | #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ |
325 | #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET | 327 | #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET |
326 | #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET | 328 | #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET |
327 | #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ | 329 | #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ |
328 | 2 * CONFIG_SYS_ENV_SECT_SIZE) | 330 | 2 * CONFIG_SYS_ENV_SECT_SIZE) |
329 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE | 331 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE |
330 | 332 | ||
331 | /* Flash banks JFFS2 should use */ | 333 | /* Flash banks JFFS2 should use */ |
332 | #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ | 334 | #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ |
333 | CONFIG_SYS_MAX_NAND_DEVICE) | 335 | CONFIG_SYS_MAX_NAND_DEVICE) |
334 | #define CONFIG_SYS_JFFS2_MEM_NAND | 336 | #define CONFIG_SYS_JFFS2_MEM_NAND |
335 | /* use flash_info[2] */ | 337 | /* use flash_info[2] */ |
336 | #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS | 338 | #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS |
337 | #define CONFIG_SYS_JFFS2_NUM_BANKS 1 | 339 | #define CONFIG_SYS_JFFS2_NUM_BANKS 1 |
338 | 340 | ||
339 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | 341 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
340 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 | 342 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 |
341 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 | 343 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 |
342 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ | 344 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
343 | CONFIG_SYS_INIT_RAM_SIZE - \ | 345 | CONFIG_SYS_INIT_RAM_SIZE - \ |
344 | GENERATED_GBL_DATA_SIZE) | 346 | GENERATED_GBL_DATA_SIZE) |
345 | 347 | ||
346 | /* Defines for SPL */ | 348 | /* Defines for SPL */ |
347 | #define CONFIG_SPL_FRAMEWORK | 349 | #define CONFIG_SPL_FRAMEWORK |
348 | #define CONFIG_SPL_BOARD_INIT | 350 | #define CONFIG_SPL_BOARD_INIT |
349 | #define CONFIG_SPL_NAND_SIMPLE | 351 | #define CONFIG_SPL_NAND_SIMPLE |
350 | 352 | ||
351 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | 353 | #define CONFIG_SPL_LIBCOMMON_SUPPORT |
352 | #define CONFIG_SPL_LIBDISK_SUPPORT | 354 | #define CONFIG_SPL_LIBDISK_SUPPORT |
353 | #define CONFIG_SPL_I2C_SUPPORT | 355 | #define CONFIG_SPL_I2C_SUPPORT |
354 | #define CONFIG_SPL_MMC_SUPPORT | 356 | #define CONFIG_SPL_MMC_SUPPORT |
355 | #define CONFIG_SPL_FAT_SUPPORT | 357 | #define CONFIG_SPL_FAT_SUPPORT |
356 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | 358 | #define CONFIG_SPL_LIBGENERIC_SUPPORT |
357 | #define CONFIG_SPL_SERIAL_SUPPORT | 359 | #define CONFIG_SPL_SERIAL_SUPPORT |
358 | #define CONFIG_SPL_POWER_SUPPORT | 360 | #define CONFIG_SPL_POWER_SUPPORT |
359 | #define CONFIG_SPL_NAND_SUPPORT | 361 | #define CONFIG_SPL_NAND_SUPPORT |
360 | #define CONFIG_SPL_NAND_BASE | 362 | #define CONFIG_SPL_NAND_BASE |
361 | #define CONFIG_SPL_NAND_DRIVERS | 363 | #define CONFIG_SPL_NAND_DRIVERS |
362 | #define CONFIG_SPL_NAND_ECC | 364 | #define CONFIG_SPL_NAND_ECC |
363 | #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" | 365 | #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" |
364 | 366 | ||
365 | #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ | 367 | #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ |
366 | #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ | 368 | #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ |
367 | #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK | 369 | #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK |
368 | 370 | ||
369 | /* move malloc and bss high to prevent clashing with the main image */ | 371 | /* move malloc and bss high to prevent clashing with the main image */ |
370 | #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 | 372 | #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 |
371 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 | 373 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 |
372 | #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ | 374 | #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ |
373 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 | 375 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 |
374 | 376 | ||
375 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ | 377 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ |
376 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 | 378 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
377 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" | 379 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
378 | 380 | ||
379 | /* NAND boot config */ | 381 | /* NAND boot config */ |
380 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 | 382 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 |
381 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 | 383 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 |
382 | #define CONFIG_SYS_NAND_OOBSIZE 64 | 384 | #define CONFIG_SYS_NAND_OOBSIZE 64 |
383 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) | 385 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) |
384 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | 386 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
385 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 | 387 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 |
386 | #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ | 388 | #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ |
387 | 48, 49, 50, 51, 52, 53, 54, 55,\ | 389 | 48, 49, 50, 51, 52, 53, 54, 55,\ |
388 | 56, 57, 58, 59, 60, 61, 62, 63} | 390 | 56, 57, 58, 59, 60, 61, 62, 63} |
389 | #define CONFIG_SYS_NAND_ECCSIZE 256 | 391 | #define CONFIG_SYS_NAND_ECCSIZE 256 |
390 | #define CONFIG_SYS_NAND_ECCBYTES 3 | 392 | #define CONFIG_SYS_NAND_ECCBYTES 3 |
391 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW | 393 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW |
392 | #define CONFIG_SPL_NAND_SOFTECC | 394 | #define CONFIG_SPL_NAND_SOFTECC |
393 | 395 | ||
394 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE | 396 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE |
395 | 397 | ||
396 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 | 398 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 |
397 | 399 | ||
398 | /* | 400 | /* |
399 | * ethernet support | 401 | * ethernet support |
400 | * | 402 | * |
401 | */ | 403 | */ |
402 | #if defined(CONFIG_CMD_NET) | 404 | #if defined(CONFIG_CMD_NET) |
403 | #define CONFIG_DRIVER_TI_EMAC | 405 | #define CONFIG_DRIVER_TI_EMAC |
404 | #define CONFIG_DRIVER_TI_EMAC_USE_RMII | 406 | #define CONFIG_DRIVER_TI_EMAC_USE_RMII |
405 | #define CONFIG_MII | 407 | #define CONFIG_MII |
406 | #define CONFIG_BOOTP_DNS | 408 | #define CONFIG_BOOTP_DNS |
407 | #define CONFIG_BOOTP_DNS2 | 409 | #define CONFIG_BOOTP_DNS2 |
408 | #define CONFIG_BOOTP_SEND_HOSTNAME | 410 | #define CONFIG_BOOTP_SEND_HOSTNAME |
409 | #define CONFIG_NET_RETRY_COUNT 10 | 411 | #define CONFIG_NET_RETRY_COUNT 10 |
410 | #endif | 412 | #endif |
411 | 413 | ||
412 | #define CONFIG_VIDEO | 414 | #define CONFIG_VIDEO |
413 | #define CONFIG_CFB_CONSOLE | 415 | #define CONFIG_CFB_CONSOLE |
414 | #define CONFIG_VGA_AS_SINGLE_DEVICE | 416 | #define CONFIG_VGA_AS_SINGLE_DEVICE |
415 | #define CONFIG_SPLASH_SCREEN | 417 | #define CONFIG_SPLASH_SCREEN |
416 | #define CONFIG_VIDEO_BMP_RLE8 | 418 | #define CONFIG_VIDEO_BMP_RLE8 |
417 | #define CONFIG_CMD_BMP | 419 | #define CONFIG_CMD_BMP |
418 | #define CONFIG_VIDEO_OMAP3 | 420 | #define CONFIG_VIDEO_OMAP3 |
419 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | 421 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV |
420 | 422 | ||
421 | #endif /* __CONFIG_H */ | 423 | #endif /* __CONFIG_H */ |
422 | 424 |