Commit f171218e31ce66489b36b6da3221d4e326f1110f

Authored by Masahiro Yamada
Committed by Tom Rini
1 parent 8519227923

powerpc: a3m071: remove redundant CONFIG_SPL_* defines

The CPU directory of this board is arch/powerpc/cpu/mpc5xxx.
Without the CONFIG_SPL_START_S_PATH and CONFIG_SPL_LDSCRIPT defines,
the same start.o and u-boot-spl.lds are selected by default.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>

Showing 1 changed file with 0 additions and 2 deletions Inline Diff

include/configs/a3m071.h
1 /* 1 /*
2 * Copyright 2012-2013 Stefan Roese <sr@denx.de> 2 * Copyright 2012-2013 Stefan Roese <sr@denx.de>
3 * 3 *
4 * SPDX-License-Identifier: GPL-2.0+ 4 * SPDX-License-Identifier: GPL-2.0+
5 */ 5 */
6 6
7 #ifndef __CONFIG_H 7 #ifndef __CONFIG_H
8 #define __CONFIG_H 8 #define __CONFIG_H
9 9
10 /* 10 /*
11 * High Level Configuration Options 11 * High Level Configuration Options
12 * (easy to change) 12 * (easy to change)
13 */ 13 */
14 14
15 #define CONFIG_MPC5200 15 #define CONFIG_MPC5200
16 #define CONFIG_A3M071 /* A3M071 board */ 16 #define CONFIG_A3M071 /* A3M071 board */
17 #define CONFIG_DISPLAY_BOARDINFO 17 #define CONFIG_DISPLAY_BOARDINFO
18 #define CONFIG_SYS_GENERIC_BOARD 18 #define CONFIG_SYS_GENERIC_BOARD
19 19
20 #define CONFIG_SYS_TEXT_BASE 0x01000000 /* boot low for 32 MiB boards */ 20 #define CONFIG_SYS_TEXT_BASE 0x01000000 /* boot low for 32 MiB boards */
21 21
22 #define CONFIG_SPL_TARGET "u-boot-img.bin" 22 #define CONFIG_SPL_TARGET "u-boot-img.bin"
23 23
24 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */ 24 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */
25 25
26 #define CONFIG_MISC_INIT_R 26 #define CONFIG_MISC_INIT_R
27 #define CONFIG_SYS_LOWBOOT /* Enable lowboot */ 27 #define CONFIG_SYS_LOWBOOT /* Enable lowboot */
28 28
29 #ifdef CONFIG_A4M2K 29 #ifdef CONFIG_A4M2K
30 #define CONFIG_HOSTNAME a4m2k 30 #define CONFIG_HOSTNAME a4m2k
31 #else 31 #else
32 #define CONFIG_HOSTNAME a3m071 32 #define CONFIG_HOSTNAME a3m071
33 #endif 33 #endif
34 34
35 #define CONFIG_BOOTCOUNT_LIMIT 35 #define CONFIG_BOOTCOUNT_LIMIT
36 36
37 /* 37 /*
38 * Serial console configuration 38 * Serial console configuration
39 */ 39 */
40 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */ 40 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
41 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ 41 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
42 #define CONFIG_SYS_BAUDRATE_TABLE \ 42 #define CONFIG_SYS_BAUDRATE_TABLE \
43 { 9600, 19200, 38400, 57600, 115200, 230400 } 43 { 9600, 19200, 38400, 57600, 115200, 230400 }
44 44
45 /* 45 /*
46 * Command line configuration. 46 * Command line configuration.
47 */ 47 */
48 #include <config_cmd_default.h> 48 #include <config_cmd_default.h>
49 49
50 #define CONFIG_CMD_BSP 50 #define CONFIG_CMD_BSP
51 #define CONFIG_CMD_CACHE 51 #define CONFIG_CMD_CACHE
52 #define CONFIG_CMD_MII 52 #define CONFIG_CMD_MII
53 #define CONFIG_CMD_REGINFO 53 #define CONFIG_CMD_REGINFO
54 #define CONFIG_CMD_DHCP 54 #define CONFIG_CMD_DHCP
55 #define CONFIG_BOOTP_SEND_HOSTNAME 55 #define CONFIG_BOOTP_SEND_HOSTNAME
56 #define CONFIG_BOOTP_SERVERIP 56 #define CONFIG_BOOTP_SERVERIP
57 #define CONFIG_BOOTP_MAY_FAIL 57 #define CONFIG_BOOTP_MAY_FAIL
58 #define CONFIG_BOOTP_BOOTPATH 58 #define CONFIG_BOOTP_BOOTPATH
59 #define CONFIG_BOOTP_GATEWAY 59 #define CONFIG_BOOTP_GATEWAY
60 #define CONFIG_BOOTP_SERVERIP 60 #define CONFIG_BOOTP_SERVERIP
61 #define CONFIG_NET_RETRY_COUNT 3 61 #define CONFIG_NET_RETRY_COUNT 3
62 #define CONFIG_CMD_LINK_LOCAL 62 #define CONFIG_CMD_LINK_LOCAL
63 #define CONFIG_LIB_RAND 63 #define CONFIG_LIB_RAND
64 #define CONFIG_NETCONSOLE 64 #define CONFIG_NETCONSOLE
65 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 65 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
66 #define CONFIG_CMD_PING 66 #define CONFIG_CMD_PING
67 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 67 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
68 #define CONFIG_MTD_PARTITIONS /* needed for UBI */ 68 #define CONFIG_MTD_PARTITIONS /* needed for UBI */
69 #define CONFIG_FLASH_CFI_MTD 69 #define CONFIG_FLASH_CFI_MTD
70 #define MTDIDS_DEFAULT "nor0=fc000000.flash" 70 #define MTDIDS_DEFAULT "nor0=fc000000.flash"
71 #define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:512k(u-boot)," \ 71 #define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:512k(u-boot)," \
72 "128k(env1)," \ 72 "128k(env1)," \
73 "128k(env2)," \ 73 "128k(env2)," \
74 "128k(hwinfo)," \ 74 "128k(hwinfo)," \
75 "1M(nvramsim)," \ 75 "1M(nvramsim)," \
76 "128k(dtb)," \ 76 "128k(dtb)," \
77 "5M(kernel)," \ 77 "5M(kernel)," \
78 "128k(sysinfo)," \ 78 "128k(sysinfo)," \
79 "7552k(root)," \ 79 "7552k(root)," \
80 "4M(app)," \ 80 "4M(app)," \
81 "5376k(data)," \ 81 "5376k(data)," \
82 "8M(install)" 82 "8M(install)"
83 83
84 #define CONFIG_LZO /* needed for UBI */ 84 #define CONFIG_LZO /* needed for UBI */
85 #define CONFIG_RBTREE /* needed for UBI */ 85 #define CONFIG_RBTREE /* needed for UBI */
86 #define CONFIG_CMD_MTDPARTS 86 #define CONFIG_CMD_MTDPARTS
87 #define CONFIG_CMD_UBI 87 #define CONFIG_CMD_UBI
88 #define CONFIG_CMD_UBIFS 88 #define CONFIG_CMD_UBIFS
89 #define CONFIG_FIT 89 #define CONFIG_FIT
90 90
91 /* 91 /*
92 * IPB Bus clocking configuration. 92 * IPB Bus clocking configuration.
93 */ 93 */
94 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ 94 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
95 /* define for 66MHz speed - undef for 33MHz PCI clock speed */ 95 /* define for 66MHz speed - undef for 33MHz PCI clock speed */
96 #ifdef CONFIG_A4M2K 96 #ifdef CONFIG_A4M2K
97 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 97 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
98 #else 98 #else
99 #undef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 99 #undef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
100 #endif 100 #endif
101 101
102 /* pass open firmware flat tree */ 102 /* pass open firmware flat tree */
103 #define CONFIG_OF_LIBFDT 103 #define CONFIG_OF_LIBFDT
104 #define CONFIG_OF_BOARD_SETUP 104 #define CONFIG_OF_BOARD_SETUP
105 105
106 /* maximum size of the flat tree (8K) */ 106 /* maximum size of the flat tree (8K) */
107 #define OF_FLAT_TREE_MAX_SIZE 8192 107 #define OF_FLAT_TREE_MAX_SIZE 8192
108 108
109 #define OF_CPU "PowerPC,5200@0" 109 #define OF_CPU "PowerPC,5200@0"
110 #define OF_SOC "soc5200@f0000000" 110 #define OF_SOC "soc5200@f0000000"
111 #define OF_TBCLK (bd->bi_busfreq / 4) 111 #define OF_TBCLK (bd->bi_busfreq / 4)
112 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000" 112 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
113 113
114 /* 114 /*
115 * NOR flash configuration 115 * NOR flash configuration
116 */ 116 */
117 #define CONFIG_SYS_FLASH_BASE 0xfc000000 117 #define CONFIG_SYS_FLASH_BASE 0xfc000000
118 #define CONFIG_SYS_FLASH_SIZE 0x02000000 118 #define CONFIG_SYS_FLASH_SIZE 0x02000000
119 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x80000) 119 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x80000)
120 120
121 #define CONFIG_SYS_MAX_FLASH_BANKS 1 121 #define CONFIG_SYS_MAX_FLASH_BANKS 1
122 #define CONFIG_SYS_MAX_FLASH_SECT 256 122 #define CONFIG_SYS_MAX_FLASH_SECT 256
123 #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 123 #define CONFIG_SYS_FLASH_ERASE_TOUT 240000
124 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 124 #define CONFIG_SYS_FLASH_WRITE_TOUT 500
125 #define CONFIG_SYS_FLASH_LOCK_TOUT 5 125 #define CONFIG_SYS_FLASH_LOCK_TOUT 5
126 #define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 126 #define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000
127 #define CONFIG_SYS_FLASH_PROTECTION 127 #define CONFIG_SYS_FLASH_PROTECTION
128 #define CONFIG_FLASH_CFI_DRIVER 128 #define CONFIG_FLASH_CFI_DRIVER
129 #define CONFIG_SYS_FLASH_CFI 129 #define CONFIG_SYS_FLASH_CFI
130 #define CONFIG_SYS_FLASH_EMPTY_INFO 130 #define CONFIG_SYS_FLASH_EMPTY_INFO
131 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 131 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
132 #define CONFIG_FLASH_VERIFY 132 #define CONFIG_FLASH_VERIFY
133 133
134 /* 134 /*
135 * Environment settings 135 * Environment settings
136 */ 136 */
137 #define CONFIG_ENV_IS_IN_FLASH 137 #define CONFIG_ENV_IS_IN_FLASH
138 #define CONFIG_ENV_SIZE 0x10000 138 #define CONFIG_ENV_SIZE 0x10000
139 #define CONFIG_ENV_SECT_SIZE 0x20000 139 #define CONFIG_ENV_SECT_SIZE 0x20000
140 #define CONFIG_ENV_OVERWRITE 140 #define CONFIG_ENV_OVERWRITE
141 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) 141 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
142 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 142 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
143 143
144 /* 144 /*
145 * Memory map 145 * Memory map
146 */ 146 */
147 #define CONFIG_SYS_MBAR 0xf0000000 147 #define CONFIG_SYS_MBAR 0xf0000000
148 #define CONFIG_SYS_SDRAM_BASE 0x00000000 148 #define CONFIG_SYS_SDRAM_BASE 0x00000000
149 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000 149 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
150 150
151 /* Use SRAM until RAM will be available */ 151 /* Use SRAM until RAM will be available */
152 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM 152 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
153 #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE 153 #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
154 154
155 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \ 155 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \
156 GENERATED_GBL_DATA_SIZE) 156 GENERATED_GBL_DATA_SIZE)
157 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 157 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
158 158
159 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 159 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
160 160
161 #define CONFIG_SYS_MONITOR_LEN (512 << 10) 161 #define CONFIG_SYS_MONITOR_LEN (512 << 10)
162 #define CONFIG_SYS_MALLOC_LEN (4 << 20) 162 #define CONFIG_SYS_MALLOC_LEN (4 << 20)
163 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) 163 #define CONFIG_SYS_BOOTMAPSZ (8 << 20)
164 164
165 /* 165 /*
166 * Ethernet configuration 166 * Ethernet configuration
167 */ 167 */
168 #define CONFIG_MPC5xxx_FEC 168 #define CONFIG_MPC5xxx_FEC
169 #define CONFIG_MPC5xxx_FEC_MII100 169 #define CONFIG_MPC5xxx_FEC_MII100
170 #ifdef CONFIG_A4M2K 170 #ifdef CONFIG_A4M2K
171 #define CONFIG_PHY_ADDR 0x01 171 #define CONFIG_PHY_ADDR 0x01
172 #else 172 #else
173 #define CONFIG_PHY_ADDR 0x00 173 #define CONFIG_PHY_ADDR 0x00
174 #endif 174 #endif
175 175
176 /* 176 /*
177 * GPIO configuration 177 * GPIO configuration
178 */ 178 */
179 179
180 /* 180 /*
181 * GPIO-config depends on failsave-level 181 * GPIO-config depends on failsave-level
182 * failsave 0 means just MPX-config, no digiboard, no fpga 182 * failsave 0 means just MPX-config, no digiboard, no fpga
183 * 1 means digiboard ok 183 * 1 means digiboard ok
184 * 2 means fpga ok 184 * 2 means fpga ok
185 */ 185 */
186 186
187 #ifdef CONFIG_A4M2K 187 #ifdef CONFIG_A4M2K
188 #define CONFIG_SYS_GPS_PORT_CONFIG 0x1005C805 188 #define CONFIG_SYS_GPS_PORT_CONFIG 0x1005C805
189 #else 189 #else
190 /* for failsave-level 0 - full failsave */ 190 /* for failsave-level 0 - full failsave */
191 #define CONFIG_SYS_GPS_PORT_CONFIG 0x1005C005 191 #define CONFIG_SYS_GPS_PORT_CONFIG 0x1005C005
192 /* for failsave-level 1 - only digiboard ok */ 192 /* for failsave-level 1 - only digiboard ok */
193 #define CONFIG_SYS_GPS_PORT_CONFIG_1 0x1005C065 193 #define CONFIG_SYS_GPS_PORT_CONFIG_1 0x1005C065
194 /* for failsave-level 2 - all ok */ 194 /* for failsave-level 2 - all ok */
195 #define CONFIG_SYS_GPS_PORT_CONFIG_2 0x1005C065 195 #define CONFIG_SYS_GPS_PORT_CONFIG_2 0x1005C065
196 #endif 196 #endif
197 197
198 #define CONFIG_WDOG_GPIO_PIN GPIO_WKUP_7 198 #define CONFIG_WDOG_GPIO_PIN GPIO_WKUP_7
199 #if defined(CONFIG_A4M2K) && !defined(CONFIG_SPL_BUILD) 199 #if defined(CONFIG_A4M2K) && !defined(CONFIG_SPL_BUILD)
200 #define CONFIG_HW_WATCHDOG /* Use external HW-Watchdog */ 200 #define CONFIG_HW_WATCHDOG /* Use external HW-Watchdog */
201 #endif 201 #endif
202 202
203 /* 203 /*
204 * Configuration matrix 204 * Configuration matrix
205 * MSB LSB 205 * MSB LSB
206 * failsave 0 0x1005C005 00010000000001011100000000000101 ( full failsave ) 206 * failsave 0 0x1005C005 00010000000001011100000000000101 ( full failsave )
207 * failsave 1 0x1005C065 00010000000001011100000001100101 ( digib.-ver ok ) 207 * failsave 1 0x1005C065 00010000000001011100000001100101 ( digib.-ver ok )
208 * failsave 2 0x1005C065 00010000000001011100000001100101 ( all ok ) 208 * failsave 2 0x1005C065 00010000000001011100000001100101 ( all ok )
209 * || ||| || | ||| | | | | 209 * || ||| || | ||| | | | |
210 * || ||| || | ||| | | | | bit rev name 210 * || ||| || | ||| | | | | bit rev name
211 * ++-+++-++--+---+++-+---+---+---+- 0 31 CS1 211 * ++-+++-++--+---+++-+---+---+---+- 0 31 CS1
212 * +-+++-++--+---+++-+---+---+---+- 1 30 LPTZ 212 * +-+++-++--+---+++-+---+---+---+- 1 30 LPTZ
213 * ||| || | ||| | | | | 2 29 ALTs 213 * ||| || | ||| | | | | 2 29 ALTs
214 * +++-++--+---+++-+---+---+---+- 3 28 ALTs 214 * +++-++--+---+++-+---+---+---+- 3 28 ALTs
215 * ++-++--+---+++-+---+---+---+- 4 27 CS7 215 * ++-++--+---+++-+---+---+---+- 4 27 CS7
216 * +-++--+---+++-+---+---+---+- 5 26 CS6 216 * +-++--+---+++-+---+---+---+- 5 26 CS6
217 * || | ||| | | | | 6 25 ATA 217 * || | ||| | | | | 6 25 ATA
218 * ++--+---+++-+---+---+---+- 7 24 ATA 218 * ++--+---+++-+---+---+---+- 7 24 ATA
219 * +--+---+++-+---+---+---+- 8 23 IR_USB_CLK 219 * +--+---+++-+---+---+---+- 8 23 IR_USB_CLK
220 * | ||| | | | | 9 22 IRDA 220 * | ||| | | | | 9 22 IRDA
221 * | ||| | | | | 10 21 IRDA 221 * | ||| | | | | 10 21 IRDA
222 * +---+++-+---+---+---+- 11 20 IRDA 222 * +---+++-+---+---+---+- 11 20 IRDA
223 * ||| | | | | 12 19 Ether 223 * ||| | | | | 12 19 Ether
224 * ||| | | | | 13 18 Ether 224 * ||| | | | | 13 18 Ether
225 * ||| | | | | 14 17 Ether 225 * ||| | | | | 14 17 Ether
226 * +++-+---+---+---+- 15 16 Ether 226 * +++-+---+---+---+- 15 16 Ether
227 * ++-+---+---+---+- 16 15 PCI_DIS 227 * ++-+---+---+---+- 16 15 PCI_DIS
228 * +-+---+---+---+- 17 14 USB_SE 228 * +-+---+---+---+- 17 14 USB_SE
229 * | | | | 18 13 USB 229 * | | | | 18 13 USB
230 * +---+---+---+- 19 12 USB 230 * +---+---+---+- 19 12 USB
231 * | | | 20 11 PSC3 231 * | | | 20 11 PSC3
232 * | | | 21 10 PSC3 232 * | | | 21 10 PSC3
233 * | | | 22 9 PSC3 233 * | | | 22 9 PSC3
234 * +---+---+- 23 8 PSC3 234 * +---+---+- 23 8 PSC3
235 * | | 24 7 - 235 * | | 24 7 -
236 * | | 25 6 PSC2 236 * | | 25 6 PSC2
237 * | | 26 5 PSC2 237 * | | 26 5 PSC2
238 * +---+- 27 4 PSC2 238 * +---+- 27 4 PSC2
239 * | 28 3 - 239 * | 28 3 -
240 * | 29 2 PSC1 240 * | 29 2 PSC1
241 * | 30 1 PSC1 241 * | 30 1 PSC1
242 * +- 31 0 PSC1 242 * +- 31 0 PSC1
243 */ 243 */
244 244
245 245
246 /* 246 /*
247 * Miscellaneous configurable options 247 * Miscellaneous configurable options
248 */ 248 */
249 #define CONFIG_SYS_LONGHELP 249 #define CONFIG_SYS_LONGHELP
250 250
251 #define CONFIG_CMDLINE_EDITING 251 #define CONFIG_CMDLINE_EDITING
252 #define CONFIG_SYS_HUSH_PARSER 252 #define CONFIG_SYS_HUSH_PARSER
253 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 253 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
254 254
255 #if defined(CONFIG_CMD_KGDB) 255 #if defined(CONFIG_CMD_KGDB)
256 #define CONFIG_SYS_CBSIZE 1024 256 #define CONFIG_SYS_CBSIZE 1024
257 #else 257 #else
258 #define CONFIG_SYS_CBSIZE 256 258 #define CONFIG_SYS_CBSIZE 256
259 #endif 259 #endif
260 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 260 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
261 #define CONFIG_SYS_MAXARGS 16 261 #define CONFIG_SYS_MAXARGS 16
262 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 262 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
263 263
264 #define CONFIG_SYS_MEMTEST_START 0x00100000 264 #define CONFIG_SYS_MEMTEST_START 0x00100000
265 #define CONFIG_SYS_MEMTEST_END 0x00f00000 265 #define CONFIG_SYS_MEMTEST_END 0x00f00000
266 266
267 #define CONFIG_SYS_LOAD_ADDR 0x00100000 267 #define CONFIG_SYS_LOAD_ADDR 0x00100000
268 268
269 #define CONFIG_LOOPW 269 #define CONFIG_LOOPW
270 #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/ 270 #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/
271 271
272 /* 272 /*
273 * Various low-level settings 273 * Various low-level settings
274 */ 274 */
275 #define CONFIG_SYS_HID0_INIT (HID0_ICE | HID0_ICFI) 275 #define CONFIG_SYS_HID0_INIT (HID0_ICE | HID0_ICFI)
276 #define CONFIG_SYS_HID0_FINAL HID0_ICE 276 #define CONFIG_SYS_HID0_FINAL HID0_ICE
277 277
278 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE 278 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
279 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE 279 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
280 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE 280 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
281 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE 281 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
282 282
283 #ifdef CONFIG_A4M2K 283 #ifdef CONFIG_A4M2K
284 /* external MRAM */ 284 /* external MRAM */
285 #define CONFIG_SYS_CS1_START 0xf1000000 285 #define CONFIG_SYS_CS1_START 0xf1000000
286 #define CONFIG_SYS_CS1_SIZE (512 << 10) /* 512KiB MRAM */ 286 #define CONFIG_SYS_CS1_SIZE (512 << 10) /* 512KiB MRAM */
287 #endif 287 #endif
288 288
289 #define CONFIG_SYS_CS2_START 0xe0000000 289 #define CONFIG_SYS_CS2_START 0xe0000000
290 #define CONFIG_SYS_CS2_SIZE 0x00100000 290 #define CONFIG_SYS_CS2_SIZE 0x00100000
291 291
292 /* FPGA slave io (512kiB / 1MiB) - see ticket #66 */ 292 /* FPGA slave io (512kiB / 1MiB) - see ticket #66 */
293 #define CONFIG_SYS_CS3_START 0xE9000000 293 #define CONFIG_SYS_CS3_START 0xE9000000
294 #ifdef CONFIG_A4M2K 294 #ifdef CONFIG_A4M2K
295 #define CONFIG_SYS_CS3_SIZE 0x00100000 295 #define CONFIG_SYS_CS3_SIZE 0x00100000
296 #else 296 #else
297 #define CONFIG_SYS_CS3_SIZE 0x00080000 297 #define CONFIG_SYS_CS3_SIZE 0x00080000
298 #endif 298 #endif
299 /* 00000000 00110010 1 0 1 1 10 01 00 00 0 0 0 0 = 0x0032B900 */ 299 /* 00000000 00110010 1 0 1 1 10 01 00 00 0 0 0 0 = 0x0032B900 */
300 #define CONFIG_SYS_CS3_CFG 0x0032B900 300 #define CONFIG_SYS_CS3_CFG 0x0032B900
301 301
302 #ifndef CONFIG_A4M2K 302 #ifndef CONFIG_A4M2K
303 /* Diagnosis Interface - see ticket #63 */ 303 /* Diagnosis Interface - see ticket #63 */
304 #define CONFIG_SYS_CS4_START 0xEA000000 304 #define CONFIG_SYS_CS4_START 0xEA000000
305 #define CONFIG_SYS_CS4_SIZE 0x00000001 305 #define CONFIG_SYS_CS4_SIZE 0x00000001
306 /* 00000000 00000010 1 0 1 1 10 01 00 00 0 0 0 0 = 0x0002B900 */ 306 /* 00000000 00000010 1 0 1 1 10 01 00 00 0 0 0 0 = 0x0002B900 */
307 #define CONFIG_SYS_CS4_CFG 0x0002B900 307 #define CONFIG_SYS_CS4_CFG 0x0002B900
308 #endif 308 #endif
309 309
310 /* FPGA master io (64kiB / 1MiB) - see ticket #66 */ 310 /* FPGA master io (64kiB / 1MiB) - see ticket #66 */
311 #define CONFIG_SYS_CS5_START 0xE8000000 311 #define CONFIG_SYS_CS5_START 0xE8000000
312 #ifdef CONFIG_A4M2K 312 #ifdef CONFIG_A4M2K
313 #define CONFIG_SYS_CS5_SIZE 0x00100000 313 #define CONFIG_SYS_CS5_SIZE 0x00100000
314 #else 314 #else
315 #define CONFIG_SYS_CS5_SIZE 0x00010000 315 #define CONFIG_SYS_CS5_SIZE 0x00010000
316 #endif 316 #endif
317 /* 00000000 00110010 1 0 1 1 10 01 00 00 0 0 0 0 = 0x0032B900 */ 317 /* 00000000 00110010 1 0 1 1 10 01 00 00 0 0 0 0 = 0x0032B900 */
318 #define CONFIG_SYS_CS5_CFG 0x0032B900 318 #define CONFIG_SYS_CS5_CFG 0x0032B900
319 319
320 #ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* for pci_clk = 66 MHz */ 320 #ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* for pci_clk = 66 MHz */
321 #define CONFIG_SYS_BOOTCS_CFG 0x0006F900 321 #define CONFIG_SYS_BOOTCS_CFG 0x0006F900
322 #define CONFIG_SYS_CS1_CFG 0x0008FD00 322 #define CONFIG_SYS_CS1_CFG 0x0008FD00
323 #define CONFIG_SYS_CS2_CFG 0x0006F90C 323 #define CONFIG_SYS_CS2_CFG 0x0006F90C
324 #else /* for pci_clk = 33 MHz */ 324 #else /* for pci_clk = 33 MHz */
325 #define CONFIG_SYS_BOOTCS_CFG 0x0002F900 325 #define CONFIG_SYS_BOOTCS_CFG 0x0002F900
326 #define CONFIG_SYS_CS1_CFG 0x0001FB00 326 #define CONFIG_SYS_CS1_CFG 0x0001FB00
327 #define CONFIG_SYS_CS2_CFG 0x0002F90C 327 #define CONFIG_SYS_CS2_CFG 0x0002F90C
328 #endif 328 #endif
329 329
330 #define CONFIG_SYS_CS_BURST 0x00000000 330 #define CONFIG_SYS_CS_BURST 0x00000000
331 /* set DC for FPGA CS5 and CS3 to 0 - see ticket #66 */ 331 /* set DC for FPGA CS5 and CS3 to 0 - see ticket #66 */
332 /* R 7 R 6 R 5 R 4 R 3 R 2 R 1 R 0 */ 332 /* R 7 R 6 R 5 R 4 R 3 R 2 R 1 R 0 */
333 /* 00 11 00 11 00 00 00 11 00 00 00 00 00 00 00 00 */ 333 /* 00 11 00 11 00 00 00 11 00 00 00 00 00 00 00 00 */
334 #define CONFIG_SYS_CS_DEADCYCLE 0x33030000 334 #define CONFIG_SYS_CS_DEADCYCLE 0x33030000
335 335
336 #define CONFIG_SYS_RESET_ADDRESS 0xff000000 336 #define CONFIG_SYS_RESET_ADDRESS 0xff000000
337 337
338 /* 338 /*
339 * Environment Configuration 339 * Environment Configuration
340 */ 340 */
341 341
342 #define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */ 342 #define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */
343 #undef CONFIG_BOOTARGS 343 #undef CONFIG_BOOTARGS
344 #define CONFIG_ZERO_BOOTDELAY_CHECK 344 #define CONFIG_ZERO_BOOTDELAY_CHECK
345 345
346 #define CONFIG_SYS_AUTOLOAD "n" 346 #define CONFIG_SYS_AUTOLOAD "n"
347 347
348 #define CONFIG_PREBOOT "echo;" \ 348 #define CONFIG_PREBOOT "echo;" \
349 "echo Type \"run flash_mtd\" to boot from flash with mtd filesystem;" \ 349 "echo Type \"run flash_mtd\" to boot from flash with mtd filesystem;" \
350 "echo Type \"run net_nfs\" to boot from tftp with nfs filesystem;" \ 350 "echo Type \"run net_nfs\" to boot from tftp with nfs filesystem;" \
351 "echo" 351 "echo"
352 352
353 #undef CONFIG_BOOTARGS 353 #undef CONFIG_BOOTARGS
354 354
355 #define CONFIG_SYS_OS_BASE 0xfc200000 355 #define CONFIG_SYS_OS_BASE 0xfc200000
356 #define CONFIG_SYS_FDT_BASE 0xfc1e0000 356 #define CONFIG_SYS_FDT_BASE 0xfc1e0000
357 357
358 #define CONFIG_EXTRA_ENV_SETTINGS \ 358 #define CONFIG_EXTRA_ENV_SETTINGS \
359 "netdev=eth0\0" \ 359 "netdev=eth0\0" \
360 "verify=no\0" \ 360 "verify=no\0" \
361 "loadaddr=200000\0" \ 361 "loadaddr=200000\0" \
362 "kernel_addr=" __stringify(CONFIG_SYS_OS_BASE) "\0" \ 362 "kernel_addr=" __stringify(CONFIG_SYS_OS_BASE) "\0" \
363 "kernel_addr_r=1000000\0" \ 363 "kernel_addr_r=1000000\0" \
364 "fdt_addr=" __stringify(CONFIG_SYS_FDT_BASE) "\0" \ 364 "fdt_addr=" __stringify(CONFIG_SYS_FDT_BASE) "\0" \
365 "fdt_addr_r=1800000\0" \ 365 "fdt_addr_r=1800000\0" \
366 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 366 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
367 "fdtfile=" __stringify(CONFIG_HOSTNAME) "/" \ 367 "fdtfile=" __stringify(CONFIG_HOSTNAME) "/" \
368 __stringify(CONFIG_HOSTNAME) ".dtb\0" \ 368 __stringify(CONFIG_HOSTNAME) ".dtb\0" \
369 "rootpath=/opt/eldk-5.2.1/powerpc/" \ 369 "rootpath=/opt/eldk-5.2.1/powerpc/" \
370 "core-image-minimal-mtdutils-dropbear-generic\0" \ 370 "core-image-minimal-mtdutils-dropbear-generic\0" \
371 "consoledev=ttyPSC0\0" \ 371 "consoledev=ttyPSC0\0" \
372 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 372 "nfsargs=setenv bootargs root=/dev/nfs rw " \
373 "nfsroot=${serverip}:${rootpath}\0" \ 373 "nfsroot=${serverip}:${rootpath}\0" \
374 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 374 "ramargs=setenv bootargs root=/dev/ram rw\0" \
375 "mtdargs=setenv bootargs root=/dev/mtdblock8 " \ 375 "mtdargs=setenv bootargs root=/dev/mtdblock8 " \
376 "rootfstype=squashfs,jffs2\0" \ 376 "rootfstype=squashfs,jffs2\0" \
377 "addhost=setenv bootargs ${bootargs} " \ 377 "addhost=setenv bootargs ${bootargs} " \
378 "hostname=${hostname}\0" \ 378 "hostname=${hostname}\0" \
379 "addip=setenv bootargs ${bootargs} " \ 379 "addip=setenv bootargs ${bootargs} " \
380 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 380 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
381 ":${hostname}:${netdev}:off panic=1\0" \ 381 ":${hostname}:${netdev}:off panic=1\0" \
382 "addtty=setenv bootargs ${bootargs} " \ 382 "addtty=setenv bootargs ${bootargs} " \
383 "console=${consoledev},${baudrate}\0" \ 383 "console=${consoledev},${baudrate}\0" \
384 "flash_nfs=run nfsargs addip addtty addmtd addhost;" \ 384 "flash_nfs=run nfsargs addip addtty addmtd addhost;" \
385 "bootm ${kernel_addr} - ${fdt_addr}\0" \ 385 "bootm ${kernel_addr} - ${fdt_addr}\0" \
386 "flash_mtd=run mtdargs addip addtty addmtd addhost;" \ 386 "flash_mtd=run mtdargs addip addtty addmtd addhost;" \
387 "bootm ${kernel_addr} - ${fdt_addr}\0" \ 387 "bootm ${kernel_addr} - ${fdt_addr}\0" \
388 "flash_self=run ramargs addip addtty addmtd addhost;" \ 388 "flash_self=run ramargs addip addtty addmtd addhost;" \
389 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ 389 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
390 "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \ 390 "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
391 "tftp ${fdt_addr_r} ${fdtfile};" \ 391 "tftp ${fdt_addr_r} ${fdtfile};" \
392 "run nfsargs addip addtty addmtd addhost;" \ 392 "run nfsargs addip addtty addmtd addhost;" \
393 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ 393 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
394 "load=tftp ${loadaddr} " __stringify(CONFIG_HOSTNAME) \ 394 "load=tftp ${loadaddr} " __stringify(CONFIG_HOSTNAME) \
395 "/u-boot-img.bin\0" \ 395 "/u-boot-img.bin\0" \
396 "update=protect off fc000000 fc07ffff;" \ 396 "update=protect off fc000000 fc07ffff;" \
397 "era fc000000 fc07ffff;" \ 397 "era fc000000 fc07ffff;" \
398 "cp.b ${loadaddr} fc000000 ${filesize}\0" \ 398 "cp.b ${loadaddr} fc000000 ${filesize}\0" \
399 "upd=run load;run update\0" \ 399 "upd=run load;run update\0" \
400 "upd_fdt=tftp 1800000 a3m071/a3m071.dtb;" \ 400 "upd_fdt=tftp 1800000 a3m071/a3m071.dtb;" \
401 "run mtdargs addip addtty addmtd addhost;" \ 401 "run mtdargs addip addtty addmtd addhost;" \
402 "fdt addr 1800000;fdt boardsetup;fdt chosen;" \ 402 "fdt addr 1800000;fdt boardsetup;fdt chosen;" \
403 "erase fc1e0000 fc1fffff;cp.b 1800000 fc1e0000 20000" \ 403 "erase fc1e0000 fc1fffff;cp.b 1800000 fc1e0000 20000" \
404 "upd_kernel=tftp 1000000 a3m071/uImage-uncompressed;" \ 404 "upd_kernel=tftp 1000000 a3m071/uImage-uncompressed;" \
405 "erase fc200000 fc6fffff;" \ 405 "erase fc200000 fc6fffff;" \
406 "cp.b 1000000 fc200000 ${filesize}" \ 406 "cp.b 1000000 fc200000 ${filesize}" \
407 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 407 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
408 "mtdids=" MTDIDS_DEFAULT "\0" \ 408 "mtdids=" MTDIDS_DEFAULT "\0" \
409 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 409 "mtdparts=" MTDPARTS_DEFAULT "\0" \
410 "" 410 ""
411 411
412 #define CONFIG_BOOTCOMMAND "run flash_mtd" 412 #define CONFIG_BOOTCOMMAND "run flash_mtd"
413 413
414 /* 414 /*
415 * SPL related defines 415 * SPL related defines
416 */ 416 */
417 #define CONFIG_SPL_FRAMEWORK 417 #define CONFIG_SPL_FRAMEWORK
418 #define CONFIG_SPL_BOARD_INIT 418 #define CONFIG_SPL_BOARD_INIT
419 #define CONFIG_SPL_NOR_SUPPORT 419 #define CONFIG_SPL_NOR_SUPPORT
420 #define CONFIG_SPL_TEXT_BASE 0xfc000000 420 #define CONFIG_SPL_TEXT_BASE 0xfc000000
421 #define CONFIG_SPL_START_S_PATH "arch/powerpc/cpu/mpc5xxx"
422 #define CONFIG_SPL_LDSCRIPT "arch/powerpc/cpu/mpc5xxx/u-boot-spl.lds"
423 #define CONFIG_SPL_LIBCOMMON_SUPPORT /* image.c */ 421 #define CONFIG_SPL_LIBCOMMON_SUPPORT /* image.c */
424 #define CONFIG_SPL_LIBGENERIC_SUPPORT /* string.c */ 422 #define CONFIG_SPL_LIBGENERIC_SUPPORT /* string.c */
425 #define CONFIG_SPL_SERIAL_SUPPORT 423 #define CONFIG_SPL_SERIAL_SUPPORT
426 424
427 /* Place BSS for SPL near end of SDRAM */ 425 /* Place BSS for SPL near end of SDRAM */
428 #define CONFIG_SPL_BSS_START_ADDR ((128 - 1) << 20) 426 #define CONFIG_SPL_BSS_START_ADDR ((128 - 1) << 20)
429 #define CONFIG_SPL_BSS_MAX_SIZE (64 << 10) 427 #define CONFIG_SPL_BSS_MAX_SIZE (64 << 10)
430 428
431 #define CONFIG_SPL_OS_BOOT 429 #define CONFIG_SPL_OS_BOOT
432 #define CONFIG_SPL_ENV_SUPPORT 430 #define CONFIG_SPL_ENV_SUPPORT
433 /* Place patched DT blob (fdt) at this address */ 431 /* Place patched DT blob (fdt) at this address */
434 #define CONFIG_SYS_SPL_ARGS_ADDR 0x01800000 432 #define CONFIG_SYS_SPL_ARGS_ADDR 0x01800000
435 433
436 /* Settings for real U-Boot to be loaded from NOR flash */ 434 /* Settings for real U-Boot to be loaded from NOR flash */
437 #ifndef __ASSEMBLY__ 435 #ifndef __ASSEMBLY__
438 extern char __spl_flash_end[]; 436 extern char __spl_flash_end[];
439 #endif 437 #endif
440 #define CONFIG_SYS_UBOOT_BASE __spl_flash_end 438 #define CONFIG_SYS_UBOOT_BASE __spl_flash_end
441 #define CONFIG_SYS_SPL_MAX_LEN (32 << 10) 439 #define CONFIG_SYS_SPL_MAX_LEN (32 << 10)
442 #define CONFIG_SYS_UBOOT_START 0x1000100 440 #define CONFIG_SYS_UBOOT_START 0x1000100
443 441
444 #endif /* __CONFIG_H */ 442 #endif /* __CONFIG_H */
445 443